From e5e38ddf1b8043324175868831da21e941c00aff Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Thu, 29 Aug 2024 09:50:44 -0700 Subject: [PATCH] [AArch64] Make apple-m4 armv8.7-a again (from armv9.2-a). (#106312) This is a partial revert of c66e1d6f3429. Even though that allowed us to declare v9.2-a support without picking up SVE2 in both the backend and the driver, the frontend itself still enabled SVE via the arch version's default extensions. Avoid that by reverting back to v8.7-a while we look into longer-term solutions. --- clang/test/CodeGen/aarch64-targetattr.c | 9 +++++++++ llvm/lib/Target/AArch64/AArch64Processors.td | 7 ++++++- llvm/unittests/TargetParser/TargetParserTest.cpp | 2 +- 3 files changed, 16 insertions(+), 2 deletions(-) diff --git a/clang/test/CodeGen/aarch64-targetattr.c b/clang/test/CodeGen/aarch64-targetattr.c index d6227be2ebef83..1bc78a6e1f8c0f 100644 --- a/clang/test/CodeGen/aarch64-targetattr.c +++ b/clang/test/CodeGen/aarch64-targetattr.c @@ -191,6 +191,14 @@ __attribute__((target("no-v9.3a"))) // void minusarch() {} +__attribute__((target("cpu=apple-m4"))) +// CHECK-LABEL: define {{[^@]+}}@applem4 +// CHECK-SAME: () #[[ATTR18:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT: ret void +// +void applem4() {} + //. // CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+lse,+neon,+ras,+rdm,+v8.1a,+v8.2a,+v8a" } // CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a" } @@ -210,6 +218,7 @@ void minusarch() {} // CHECK: attributes #[[ATTR15]] = { noinline nounwind optnone "branch-target-enforcement" "guarded-control-stack" "no-trapping-math"="true" "sign-return-address"="non-leaf" "sign-return-address-key"="a_key" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-n1" "target-features"="+aes,+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" } // CHECK: attributes #[[ATTR16]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" } // CHECK: attributes #[[ATTR17]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="-v9.3a" } +// CHECK: attributes #[[ATTR18]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="apple-m4" "target-features"="+aes,+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fpac,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+sme,+sme-f64f64,+sme-i16i64,+sme2,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8.7a,+v8a,+wfxt" } //. // CHECK: [[META0:![0-9]+]] = !{i32 1, !"wchar_size", i32 4} // CHECK: [[META1:![0-9]+]] = !{!"{{.*}}clang version {{.*}}"} diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td index 84d8cae3a0a5d1..1d6c71cbbf0ec3 100644 --- a/llvm/lib/Target/AArch64/AArch64Processors.td +++ b/llvm/lib/Target/AArch64/AArch64Processors.td @@ -895,7 +895,12 @@ def ProcessorFeatures { FeatureLSE, FeaturePAuth, FeatureFPAC, FeatureRAS, FeatureRCPC, FeatureRDM, FeatureBF16, FeatureDotProd, FeatureMatMulInt8, FeatureSSBS]; - list AppleM4 = [HasV9_2aOps, FeatureSHA2, FeatureFPARMv8, + // Technically apple-m4 is v9.2a, but we can't use that here. + // Historically, llvm defined v9.0a as requiring SVE, but it's optional + // according to the Arm ARM, and not supported by the core. We decoupled the + // two in the clang driver and in the backend subtarget features, but it's + // still an issue in the clang frontend. v8.7a is the next closest choice. + list AppleM4 = [HasV8_7aOps, FeatureSHA2, FeatureFPARMv8, FeatureNEON, FeaturePerfMon, FeatureSHA3, FeatureFullFP16, FeatureFP16FML, FeatureAES, FeatureBF16, diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 7d999b826252a2..13db80ab5c68ea 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -1122,7 +1122,7 @@ INSTANTIATE_TEST_SUITE_P( AArch64CPUTestParams("apple-a16", "armv8.6-a"), AArch64CPUTestParams("apple-m3", "armv8.6-a"), AArch64CPUTestParams("apple-a17", "armv8.6-a"), - AArch64CPUTestParams("apple-m4", "armv9.2-a"), + AArch64CPUTestParams("apple-m4", "armv8.7-a"), AArch64CPUTestParams("exynos-m3", "armv8-a"), AArch64CPUTestParams("exynos-m4", "armv8.2-a"), AArch64CPUTestParams("exynos-m5", "armv8.2-a"),