From 8749a556da96fb17df1a2e36b860527e557c8c7b Mon Sep 17 00:00:00 2001 From: Usman Nadeem Date: Thu, 2 Sep 2021 14:27:11 -0700 Subject: [PATCH] [NFC] Regenerate SVE ACLE intrinsics tests Change-Id: Ic4ec50f9a53fcf58e86104bf19ba229c1dd132d0 --- .../aarch64-sve-intrinsics/acle_sve_abd.c | 1193 ++++++++++++---- .../aarch64-sve-intrinsics/acle_sve_acge.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_acgt.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_acle.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_aclt.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_add.c | 1192 ++++++++++++---- .../aarch64-sve-intrinsics/acle_sve_and.c | 872 ++++++++--- .../aarch64-sve-intrinsics/acle_sve_asr.c | 748 +++++++--- .../aarch64-sve-intrinsics/acle_sve_bfdot.c | 60 +- .../aarch64-sve-intrinsics/acle_sve_bfmlalb.c | 60 +- .../aarch64-sve-intrinsics/acle_sve_bfmlalt.c | 60 +- .../aarch64-sve-intrinsics/acle_sve_bic.c | 872 ++++++++--- .../aarch64-sve-intrinsics/acle_sve_cmpeq.c | 545 +++++-- .../aarch64-sve-intrinsics/acle_sve_cmpge.c | 656 ++++++--- .../aarch64-sve-intrinsics/acle_sve_cmpgt.c | 656 ++++++--- .../aarch64-sve-intrinsics/acle_sve_cmple.c | 656 ++++++--- .../aarch64-sve-intrinsics/acle_sve_cmplt.c | 656 ++++++--- .../aarch64-sve-intrinsics/acle_sve_cmpne.c | 545 +++++-- .../aarch64-sve-intrinsics/acle_sve_cmpuo.c | 130 +- .../aarch64-sve-intrinsics/acle_sve_div.c | 784 +++++++--- .../aarch64-sve-intrinsics/acle_sve_divr.c | 784 +++++++--- .../aarch64-sve-intrinsics/acle_sve_dot.c | 201 ++- .../acle_sve_dup-bfloat.c | 84 +- .../aarch64-sve-intrinsics/acle_sve_dup.c | 897 +++++++++--- .../aarch64-sve-intrinsics/acle_sve_dupq.c | 756 +++++++--- .../aarch64-sve-intrinsics/acle_sve_eor.c | 871 ++++++++--- .../aarch64-sve-intrinsics/acle_sve_lsl.c | 856 ++++++++--- .../aarch64-sve-intrinsics/acle_sve_lsr.c | 517 +++++-- .../aarch64-sve-intrinsics/acle_sve_mad.c | 1190 +++++++++++---- .../aarch64-sve-intrinsics/acle_sve_max.c | 1191 ++++++++++++---- .../aarch64-sve-intrinsics/acle_sve_maxnm.c | 339 +++-- .../aarch64-sve-intrinsics/acle_sve_min.c | 1191 ++++++++++++---- .../aarch64-sve-intrinsics/acle_sve_minnm.c | 339 +++-- .../aarch64-sve-intrinsics/acle_sve_mla.c | 1268 +++++++++++----- .../aarch64-sve-intrinsics/acle_sve_mls.c | 1268 +++++++++++----- .../aarch64-sve-intrinsics/acle_sve_msb.c | 1190 +++++++++++---- .../aarch64-sve-intrinsics/acle_sve_mul.c | 1270 ++++++++++++----- .../aarch64-sve-intrinsics/acle_sve_mulh.c | 859 ++++++++--- .../aarch64-sve-intrinsics/acle_sve_mulx.c | 340 +++-- .../aarch64-sve-intrinsics/acle_sve_nmad.c | 340 +++-- .../aarch64-sve-intrinsics/acle_sve_nmla.c | 340 +++-- .../aarch64-sve-intrinsics/acle_sve_nmls.c | 340 +++-- .../aarch64-sve-intrinsics/acle_sve_nmsb.c | 340 +++-- .../aarch64-sve-intrinsics/acle_sve_orr.c | 872 ++++++++--- .../aarch64-sve-intrinsics/acle_sve_qadd.c | 239 +++- .../aarch64-sve-intrinsics/acle_sve_qsub.c | 239 +++- .../aarch64-sve-intrinsics/acle_sve_scale.c | 340 +++-- .../aarch64-sve-intrinsics/acle_sve_sub.c | 1192 ++++++++++++---- .../aarch64-sve-intrinsics/acle_sve_subr.c | 1192 ++++++++++++---- .../aarch64-sve-intrinsics/acle_sve_sudot.c | 86 +- .../aarch64-sve-intrinsics/acle_sve_usdot.c | 86 +- 51 files changed, 23076 insertions(+), 8058 deletions(-) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c index d1fff7220ccf58..906a1984f6cbda 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1211 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svabd_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svabd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svabd_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svabd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svabd_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svabd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svabd_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svabd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svabd_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svabd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svabd_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svabd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svabd_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svabd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svabd_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svabd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svabd_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svabd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svabd_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svabd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svabd_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svabd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svabd_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svabd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svabd_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svabd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svabd_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svabd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svabd_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svabd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svabd_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svabd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svabd_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svabd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svabd_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svabd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svabd_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svabd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svabd_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svabd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svabd_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svabd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svabd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svabd_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svabd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svabd_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svabd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svabd_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svabd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svabd_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svabd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svabd_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svabd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svabd_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svabd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svabd_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svabd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svabd_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svabd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svabd_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svabd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svabd_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svabd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svabd_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svabd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svabd_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svabd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svabd_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svabd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svabd_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svabd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svabd_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svabd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svabd_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svabd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svabd_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svabd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svabd_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svabd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svabd_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svabd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svabd_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svabd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svabd_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svabd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svabd_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svabd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svabd_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svabd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svabd_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svabd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svabd_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svabd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svabd_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svabd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svabd_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svabd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svabd_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svabd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svabd_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svabd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svabd_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svabd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svabd_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svabd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svabd_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svabd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svabd_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svabd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svabd_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svabd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svabd_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_x,)(pg, op1, op2); } +// +// CHECK-LABEL: @test_svabd_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svabd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svabd_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svabd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svabd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svabd_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svabd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svabd_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svabd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svabd_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svabd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svabd_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svabd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svabd_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svabd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svabd_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svabd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svabd_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svabd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svabd_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svabd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svabd_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svabd_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svabd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svabd_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c index 12ff88c3f4520e..ba7b124452c7c3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svacge_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svacge_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svacge_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svacge_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacge_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svacge_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacge_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacge_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svacge_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c index 6592ff28e9ac75..670e36aea4e3c5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svacgt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svacgt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svacgt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svacgt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacgt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svacgt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacgt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacgt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svacgt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c index f39e73d31c666d..7471fcc4c418b8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svacle_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacle_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacle_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svacle_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacle_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacle_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svacle_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svacle_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svacle_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svacle_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacle_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacle_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svacle_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svacle_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svacle_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svacle_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svacle_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c index f4b212e5f2aa39..7f52f59e052ce3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,54 +14,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svaclt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svaclt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svaclt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svaclt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svaclt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svaclt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svaclt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z15test_svaclt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svaclt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svaclt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svaclt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svaclt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svaclt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svaclt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svaclt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svaclt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svaclt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c index 5c5458686d3df8..de0d19cf9c5041 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svadd_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svadd_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svadd_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svadd_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svadd_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svadd_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svadd_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svadd_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svadd_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svadd_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svadd_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svadd_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svadd_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svadd_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svadd_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svadd_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svadd_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svadd_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svadd_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svadd_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svadd_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svadd_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svadd_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svadd_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svadd_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svadd_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svadd_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svadd_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svadd_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svadd_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svadd_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svadd_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svadd_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svadd_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svadd_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svadd_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svadd_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svadd_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svadd_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svadd_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svadd_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svadd_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svadd_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svadd_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svadd_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svadd_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svadd_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svadd_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svadd_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svadd_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svadd_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svadd_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svadd_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svadd_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svadd_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svadd_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svadd_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svadd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svadd_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svadd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svadd_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svadd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svadd_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svadd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svadd_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svadd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svadd_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svadd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svadd_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svadd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svadd_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svadd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svadd_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svadd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svadd_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svadd_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svadd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svadd_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c index 36af1dece37302..c688b3c05e0803 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,470 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svand_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svand_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svand_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svand_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svand_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svand_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svand_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svand_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svand_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svand_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svand_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svand_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svand_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svand_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svand_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svand_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svand_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svand_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svand_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svand_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svand_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svand_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svand_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svand_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svand_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svand_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svand_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svand_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svand_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svand_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svand_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svand_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svand_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svand_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svand_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svand_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svand_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svand_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svand_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svand_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svand_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svand_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svand_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svand_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svand_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svand_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svand_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svand_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svand_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svand_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svand_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svand_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svand_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svand_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svand_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svand_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svand_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svand_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svand_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svand_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svand_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svand_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svand_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svand_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svand_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svand_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svand_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svand_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svand_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svand_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svand_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svand_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svand_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svand_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svand_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svand_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svand_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svand_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svand_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svand_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svand_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svand_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svand_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svand_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svand_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svand_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svand_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svand_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svand_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svand_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svand_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svand_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svand_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svand_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svand_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svand_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svand_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svand_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svand_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svand_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svand_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svand_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_svand_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c index 20b12b6f6fabf1..0043ac40fb690c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,403 +14,762 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svasr_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svasr_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svasr_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svasr_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svasr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svasr_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svasr_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svasr_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svasr_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svasr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svasr_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svasr_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svasr_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svasr_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svasr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svasr_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svasr_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_zu10__SVBool_tu11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svasr_n_s64_z(svbool_t pg, svint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_mu10__SVBool_tu11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svasr_n_s64_m(svbool_t pg, svint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_xu10__SVBool_tu11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svasr_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svasr_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svasr_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svasr_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svasr_wide_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_zu10__SVBool_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svasr_n_s8_z(svbool_t pg, svint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svasr_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_zu10__SVBool_tu11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svasr_n_s16_z(svbool_t pg, svint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svasr_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_zu10__SVBool_tu11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svasr_n_s32_z(svbool_t pg, svint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svasr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_mu10__SVBool_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_n_s8_m(svbool_t pg, svint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svasr_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_mu10__SVBool_tu11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_n_s16_m(svbool_t pg, svint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svasr_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_mu10__SVBool_tu11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_n_s32_m(svbool_t pg, svint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svasr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_xu10__SVBool_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svasr_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_xu10__SVBool_tu11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svasr_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_xu10__SVBool_tu11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svasr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svasr_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svasr_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svasr_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svasr_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svasr_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svasr_wide_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svasr_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svasr_wide_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c index 62258237bc5ef6..deab191390c001 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,31 +13,60 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_bfdot_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_bfdot_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfdot_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfdot_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot, _f32, , )(x, y, z); } +// CHECK-LABEL: @test_bfdot_lane_0_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_bfdot_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfdot_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfdot_lane_0_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot.lane( %x, %y, %z, i64 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot_lane, _f32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_bfdot_lane_3_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_bfdot_lane_3_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfdot_lane_3_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfdot_lane_3_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot.lane( %x, %y, %z, i64 3) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot_lane, _f32, , )(x, y, z, 3); } +// CHECK-LABEL: @test_bfdot_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_bfdot_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_bfdot_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { - // CHECK-LABEL: test_bfdot_n_f32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c index 8669de8ea3224d..c5733eb812e7f6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,31 +13,60 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svbfmlalb_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z18test_svbfmlalb_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svbfmlalb_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_svbfmlalb_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb, _f32, , )(x, y, z); } +// CHECK-LABEL: @test_bfmlalb_lane_0_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalb_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalb_lane_0_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb.lane( %x, %y, %z, i64 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb_lane, _f32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_bfmlalb_lane_7_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalb_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalb_lane_7_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb.lane( %x, %y, %z, i64 7) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb_lane, _f32, , )(x, y, z, 7); } +// CHECK-LABEL: @test_bfmlalb_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_bfmlalb_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_bfmlalb_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { - // CHECK-LABEL: test_bfmlalb_n_f32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c index 006ff6bc3200b1..6fdd3206fee6b9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,31 +13,60 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svbfmlalt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z18test_svbfmlalt_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svbfmlalt_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_svbfmlalt_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt, _f32, , )(x, y, z); } +// CHECK-LABEL: @test_bfmlalt_lane_0_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalt_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalt_lane_0_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt.lane( %x, %y, %z, i64 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt_lane, _f32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_bfmlalt_lane_7_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_bfmlalt_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { - // CHECK-LABEL: test_bfmlalt_lane_7_f32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt.lane( %x, %y, %z, i64 7) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt_lane, _f32, , )(x, y, z, 7); } +// CHECK-LABEL: @test_bfmlalt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_bfmlalt_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_bfmlalt_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { - // CHECK-LABEL: test_bfmlalt_n_f32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c index fb11e485ca87ab..f6be16d6a55b34 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,470 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svbic_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svbic_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svbic_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svbic_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svbic_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svbic_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svbic_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svbic_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svbic_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svbic_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svbic_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svbic_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svbic_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svbic_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svbic_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svbic_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svbic_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svbic_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svbic_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svbic_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svbic_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svbic_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svbic_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svbic_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svbic_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svbic_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svbic_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svbic_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svbic_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svbic_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svbic_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svbic_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svbic_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svbic_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svbic_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svbic_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svbic_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svbic_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svbic_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svbic_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svbic_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svbic_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svbic_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svbic_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svbic_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svbic_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svbic_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svbic_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svbic_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svbic_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svbic_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svbic_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svbic_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svbic_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svbic_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svbic_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svbic_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svbic_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svbic_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svbic_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svbic_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svbic_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svbic_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svbic_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svbic_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svbic_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svbic_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svbic_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svbic_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svbic_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svbic_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svbic_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svbic_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svbic_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svbic_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svbic_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svbic_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svbic_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svbic_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svbic_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svbic_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svbic_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svbic_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svbic_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svbic_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svbic_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svbic_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svbic_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svbic_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svbic_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svbic_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svbic_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svbic_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svbic_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svbic_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svbic_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svbic_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svbic_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svbic_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svbic_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svbic_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svbic_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_svbic_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c index 3c267b3c49c3b8..db1b8e7f642f18 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,284 +14,538 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpeq_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpeq_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpeq_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpeq_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpeq_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpeq_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpeq_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpeq_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpeq_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpeq_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpeq_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpeq_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpeq_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpeq_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpeq_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpeq_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpeq_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpeq_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpeq_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpeq_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpeq_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpeq_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpeq_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpeq_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpeq_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpeq_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpeq_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpeq_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpeq_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpeq_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c index 895e49c69af227..85f5b8d90afd10 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpge_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpge_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpge_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpge_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpge_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpge_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpge_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpge_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpge_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpge_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpge_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpge_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpge_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpge_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpge_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpge_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpge_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpge_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpge_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpge_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpge_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpge_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpge_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpge_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpge_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpge_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpge_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpge_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c index 9d11062448b26c..2991f5a563448d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpgt_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpgt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpgt_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpgt_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpgt_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpgt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpgt_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpgt_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpgt_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpgt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpgt_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpgt_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpgt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpgt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpgt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpgt_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpgt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpgt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpgt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpgt_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpgt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpgt_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c index c3f6408b1126fb..5c4bbb4cbee2fb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmple_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmple_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmple_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmple_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmple_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmple_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmple_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmple_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmple_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmple_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmple_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmple_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmple_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmple_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmple_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmple_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmple_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmple_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmple_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmple_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmple_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmple_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmple_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmple_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmple_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmple_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmple_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmple_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmple_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmple_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmple_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmple_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c index 9bd99e17660895..b503e6877d0260 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,343 +14,650 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmplt_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmplt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmplt_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmplt_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmplt_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmplt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmplt_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op2, %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmplt_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmplt_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmplt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmplt_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmplt_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmplt_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmplt_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmplt_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmplt_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %[[DUP]], %op1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmplt_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmplt_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmplt_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmplt_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmplt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmplt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmplt_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op2, %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmplt_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmplt_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmplt_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %[[DUP]], %op1) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmplt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmplt_wide_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmplt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmplt_wide_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c index 878864760f2b12..568473aea43d1a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,284 +14,538 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpne_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpne_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpne_s8(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svcmpne_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_s16(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svcmpne_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_s32(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svcmpne_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_s64(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_s64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svcmpne_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpne_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svcmpne_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svcmpne_u16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svcmpne_u32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svcmpne_u64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s64u10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_n_s64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u64u10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svcmpne_n_u64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svcmpne_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svcmpne_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne_wide,_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_s16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_s32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpne_n_s8u10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpne_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svcmpne_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s16u10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svcmpne_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s32u10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svcmpne_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svcmpne_n_u8u10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpne_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svcmpne_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_n_u8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u16u10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svcmpne_n_u16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u32u10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svcmpne_n_u32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpne_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpne_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpne_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpne_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpne_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpne_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpne_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpne_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svcmpne_wide_n_s8u10__SVBool_tu10__SVInt8_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svcmpne_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s8,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s16u10__SVBool_tu11__SVInt16_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_n_s16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpne_wide_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s32u10__SVBool_tu11__SVInt32_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpne_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { - // CHECK-LABEL: test_svcmpne_wide_n_s32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c index 7531de36f14954..10fce1bbeaaf1f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,65 +14,122 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svcmpuo_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpuo_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svcmpuo_f16 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpuo_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svcmpuo_f32 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svbool_t test_svcmpuo_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svcmpuo_f64 - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f64,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f16u10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpuo_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svcmpuo_n_f16 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f16,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f32u10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpuo_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svcmpuo_n_f32 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f32,,)(pg, op1, op2); } +// CHECK-LABEL: @test_svcmpuo_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f64u10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svbool_t test_svcmpuo_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svcmpuo_n_f64 - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c index b7e02df4c15200..0b7c75a84bc443 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,415 +14,786 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdiv_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdiv_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdiv_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdiv_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdiv_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdiv_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdiv_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdiv_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdiv_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdiv_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdiv_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdiv_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdiv_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdiv_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdiv_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdiv_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdiv_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdiv_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdiv_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdiv_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdiv_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdiv_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdiv_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdiv_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdiv_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svdiv_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdiv_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svdiv_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdiv_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svdiv_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdiv_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svdiv_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdiv_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdiv_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdiv_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdiv_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdiv_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdiv_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdiv_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdiv_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdiv_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdiv_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdiv_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdiv_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdiv_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdiv_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdiv_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdiv_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdiv_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdiv_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdiv_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdiv_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdiv_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdiv_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdiv_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdiv_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdiv_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdiv_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdiv_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdiv_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdiv_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdiv_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdiv_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdiv_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdiv_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdiv_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdiv_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svdiv_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdiv_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svdiv_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdiv_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svdiv_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdiv_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdiv_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdiv_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdiv_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdiv_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdiv_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdiv_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdiv_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdiv_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdiv_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdiv_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdiv_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdiv_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdiv_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c index 7bf735a49a0462..64757d0a1dd10f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,415 +14,786 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdivr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdivr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdivr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdivr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdivr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdivr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdivr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdivr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdivr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdivr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdivr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdivr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdivr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdivr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdivr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdivr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdivr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdivr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svdivr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdivr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svdivr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdivr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svdivr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdivr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svdivr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svdivr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdivr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svdivr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdivr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svdivr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdivr_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svdivr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdivr_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdivr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdivr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdivr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdivr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdivr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdivr_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdivr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdivr_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svdivr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svdivr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svdivr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svdivr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svdivr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svdivr_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svdivr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svdivr_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdivr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdivr_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdivr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdivr_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdivr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdivr_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdivr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdivr_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdivr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdivr_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdivr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdivr_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdivr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svdivr_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdivr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svdivr_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdivr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svdivr_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svdivr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdivr_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svdivr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdivr_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svdivr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdivr_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdivr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdivr_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdivr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdivr_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdivr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdivr_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svdivr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svdivr_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svdivr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svdivr_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svdivr_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svdivr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svdivr_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c index 8a3322df1b3578..e23b97a0d5cc9b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,118 +14,220 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdot_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdot_s32(svint32_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svdot_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_s32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdot_s64(svint64_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svdot_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_s64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdot_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svdot_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv4i32( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_u32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svdot_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdot_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svdot_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv2i64( %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_u64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_s32u11__SVInt32_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdot_n_s32(svint32_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svdot_n_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_s32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_s64u11__SVInt64_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdot_n_s64(svint64_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svdot_n_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_s64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_u32u12__SVUint32_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdot_n_u32(svuint32_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svdot_n_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv4i32( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_u32,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdot_n_u64u12__SVUint64_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdot_n_u64(svuint64_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svdot_n_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv2i64( %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_u64,,)(op1, op2, op3); } +// CHECK-LABEL: @test_svdot_lane_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svdot_lane_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svdot_lane_s32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdot_lane_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svdot_lane_s32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svdot_lane_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdot_lane_s64(svint64_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svdot_lane_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svdot_lane_s64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s64_1u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdot_lane_s64_1(svint64_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svdot_lane_s64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 1); } +// CHECK-LABEL: @test_svdot_lane_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdot_lane_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svdot_lane_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_u32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svdot_lane_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdot_lane_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svdot_lane_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_u64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c index 65e6b93bdb4aad..13180f97495d34 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c @@ -1,10 +1,11 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +15,86 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdup_n_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_bf16u6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbfloat16_t test_svdup_n_bf16(bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16'}} return SVE_ACLE_FUNC(svdup, _n, _bf16, )(op); } +// CHECK-LABEL: @test_svdup_n_bf16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_zu10__SVBool_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_n_bf16_z(svbool_t pg, bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, %[[PG]], bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_z'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_z, )(pg, op); } +// CHECK-LABEL: @test_svdup_n_bf16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_mu14__SVBFloat16_tu10__SVBool_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_n_bf16_m(svbfloat16_t inactive, svbool_t pg, bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( %inactive, %[[PG]], bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_m'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_m, )(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_bf16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_xu10__SVBool_tu6__bf16( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) { - // CHECK-LABEL: test_svdup_n_bf16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, %[[PG]], bfloat %op) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_x'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_x, )(pg, op); } +// CHECK-LABEL: @test_svdup_lane_bf16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBFloat16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_bf16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_lane_bf16'}} return SVE_ACLE_FUNC(svdup_lane,_bf16,,)(data, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c index f632be7b85982a..912109fdb53143 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,515 +14,969 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdup_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svdup_n_s8a( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8(int8_t op) { - // CHECK-LABEL: test_svdup_n_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8,)(op); } +// CHECK-LABEL: @test_svdup_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_s16s( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svdup_n_s16(int16_t op) { - // CHECK-LABEL: test_svdup_n_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16,)(op); } +// CHECK-LABEL: @test_svdup_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_s32i( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdup_n_s32(int32_t op) { - // CHECK-LABEL: test_svdup_n_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32,)(op); } +// CHECK-LABEL: @test_svdup_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_s64l( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdup_n_s64(int64_t op) { - // CHECK-LABEL: test_svdup_n_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64,)(op); } +// CHECK-LABEL: @test_svdup_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svdup_n_u8h( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8(uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8,)(op); } +// CHECK-LABEL: @test_svdup_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_u16t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svdup_n_u16(uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16,)(op); } +// CHECK-LABEL: @test_svdup_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_u32j( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdup_n_u32(uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32,)(op); } +// CHECK-LABEL: @test_svdup_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_u64m( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdup_n_u64(uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64,)(op); } +// CHECK-LABEL: @test_svdup_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_f16Dh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svdup_n_f16(float16_t op) { - // CHECK-LABEL: test_svdup_n_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16,)(op); } +// CHECK-LABEL: @test_svdup_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_f32f( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svdup_n_f32(float32_t op) { - // CHECK-LABEL: test_svdup_n_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32,)(op); } +// CHECK-LABEL: @test_svdup_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_f64d( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svdup_n_f64(float64_t op) { - // CHECK-LABEL: test_svdup_n_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64,)(op); } +// CHECK-LABEL: @test_svdup_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_zu10__SVBool_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8_z(svbool_t pg, int8_t op) { - // CHECK-LABEL: test_svdup_n_s8_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_zu10__SVBool_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_n_s16_z(svbool_t pg, int16_t op) { - // CHECK-LABEL: test_svdup_n_s16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_zu10__SVBool_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_n_s32_z(svbool_t pg, int32_t op) { - // CHECK-LABEL: test_svdup_n_s32_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_zu10__SVBool_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_n_s64_z(svbool_t pg, int64_t op) { - // CHECK-LABEL: test_svdup_n_s64_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_zu10__SVBool_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8_z(svbool_t pg, uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_zu10__SVBool_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_n_u16_z(svbool_t pg, uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_zu10__SVBool_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_n_u32_z(svbool_t pg, uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_zu10__SVBool_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_n_u64_z(svbool_t pg, uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_zu10__SVBool_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_n_f16_z(svbool_t pg, float16_t op) { - // CHECK-LABEL: test_svdup_n_f16_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, %[[PG]], half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_zu10__SVBool_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_n_f32_z(svbool_t pg, float32_t op) { - // CHECK-LABEL: test_svdup_n_f32_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, %[[PG]], float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_zu10__SVBool_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_n_f64_z(svbool_t pg, float64_t op) { - // CHECK-LABEL: test_svdup_n_f64_z - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, %[[PG]], double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_z,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_mu10__SVInt8_tu10__SVBool_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8_m(svint8_t inactive, svbool_t pg, int8_t op) { - // CHECK-LABEL: test_svdup_n_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( %inactive, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_mu11__SVInt16_tu10__SVBool_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_n_s16_m(svint16_t inactive, svbool_t pg, int16_t op) { - // CHECK-LABEL: test_svdup_n_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( %inactive, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_mu11__SVInt32_tu10__SVBool_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_n_s32_m(svint32_t inactive, svbool_t pg, int32_t op) { - // CHECK-LABEL: test_svdup_n_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( %inactive, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_mu11__SVInt64_tu10__SVBool_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_n_s64_m(svint64_t inactive, svbool_t pg, int64_t op) { - // CHECK-LABEL: test_svdup_n_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( %inactive, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_mu11__SVUint8_tu10__SVBool_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8_m(svuint8_t inactive, svbool_t pg, uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( %inactive, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_mu12__SVUint16_tu10__SVBool_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_n_u16_m(svuint16_t inactive, svbool_t pg, uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( %inactive, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_mu12__SVUint32_tu10__SVBool_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_n_u32_m(svuint32_t inactive, svbool_t pg, uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( %inactive, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_mu12__SVUint64_tu10__SVBool_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_n_u64_m(svuint64_t inactive, svbool_t pg, uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( %inactive, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_mu13__SVFloat16_tu10__SVBool_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_n_f16_m(svfloat16_t inactive, svbool_t pg, float16_t op) { - // CHECK-LABEL: test_svdup_n_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( %inactive, %[[PG]], half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_mu13__SVFloat32_tu10__SVBool_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_n_f32_m(svfloat32_t inactive, svbool_t pg, float32_t op) { - // CHECK-LABEL: test_svdup_n_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( %inactive, %[[PG]], float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_mu13__SVFloat64_tu10__SVBool_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_n_f64_m(svfloat64_t inactive, svbool_t pg, float64_t op) { - // CHECK-LABEL: test_svdup_n_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( %inactive, %[[PG]], double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_m,)(inactive, pg, op); } +// CHECK-LABEL: @test_svdup_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_xu10__SVBool_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdup_n_s8_x(svbool_t pg, int8_t op) { - // CHECK-LABEL: test_svdup_n_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_xu10__SVBool_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_n_s16_x(svbool_t pg, int16_t op) { - // CHECK-LABEL: test_svdup_n_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_xu10__SVBool_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_n_s32_x(svbool_t pg, int32_t op) { - // CHECK-LABEL: test_svdup_n_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_xu10__SVBool_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_n_s64_x(svbool_t pg, int64_t op) { - // CHECK-LABEL: test_svdup_n_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_xu10__SVBool_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdup_n_u8_x(svbool_t pg, uint8_t op) { - // CHECK-LABEL: test_svdup_n_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, %pg, i8 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_xu10__SVBool_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_n_u16_x(svbool_t pg, uint16_t op) { - // CHECK-LABEL: test_svdup_n_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, %[[PG]], i16 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_xu10__SVBool_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_n_u32_x(svbool_t pg, uint32_t op) { - // CHECK-LABEL: test_svdup_n_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, %[[PG]], i32 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_xu10__SVBool_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_n_u64_x(svbool_t pg, uint64_t op) { - // CHECK-LABEL: test_svdup_n_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, %[[PG]], i64 %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_xu10__SVBool_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_n_f16_x(svbool_t pg, float16_t op) { - // CHECK-LABEL: test_svdup_n_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, %[[PG]], half %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_xu10__SVBool_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_n_f32_x(svbool_t pg, float32_t op) { - // CHECK-LABEL: test_svdup_n_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, %[[PG]], float %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_xu10__SVBool_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_n_f64_x(svbool_t pg, float64_t op) { - // CHECK-LABEL: test_svdup_n_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, %[[PG]], double %op) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_x,)(pg, op); } +// CHECK-LABEL: @test_svdup_lane_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_lane_s8u10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svdup_lane_s8(svint8_t data, uint8_t index) { - // CHECK-LABEL: test_svdup_lane_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s8,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s16u11__SVInt16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svdup_lane_s16(svint16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_s16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s16,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s32u11__SVInt32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svdup_lane_s32(svint32_t data, uint32_t index) { - // CHECK-LABEL: test_svdup_lane_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s32,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s64u11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svdup_lane_s64(svint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdup_lane_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s64,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svdup_lane_u8u11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svdup_lane_u8(svuint8_t data, uint8_t index) { - // CHECK-LABEL: test_svdup_lane_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u8,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u16u12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svdup_lane_u16(svuint16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_u16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u16,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u32u12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svdup_lane_u32(svuint32_t data, uint32_t index) { - // CHECK-LABEL: test_svdup_lane_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u32,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svdup_lane_u64(svuint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdup_lane_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u64,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f16u13__SVFloat16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svdup_lane_f16(svfloat16_t data, uint16_t index) { - // CHECK-LABEL: test_svdup_lane_f16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f16,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f32u13__SVFloat32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svdup_lane_f32(svfloat32_t data, uint32_t index) { - // CHECK-LABEL: test_svdup_lane_f32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f32,,)(data, index); } +// CHECK-LABEL: @test_svdup_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f64u13__SVFloat64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svdup_lane_f64(svfloat64_t data, uint64_t index) { - // CHECK-LABEL: test_svdup_lane_f64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( %data, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f64,,)(data, index); } +// CHECK-LABEL: @test_svdup_n_b8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 [[OP:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svdup_n_b8b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svdup_n_b8(bool op) { - // CHECK-LABEL: test_svdup_n_b8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 %op) - // CHECK: ret %[[DUP]] return SVE_ACLE_FUNC(svdup,_n,_b8,)(op); } +// CHECK-LABEL: @test_svdup_n_b16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_b16b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svdup_n_b16(bool op) { - // CHECK-LABEL: test_svdup_n_b16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 %op) - // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[DUP]]) - // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b16,)(op); } +// CHECK-LABEL: @test_svdup_n_b32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_b32b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svdup_n_b32(bool op) { - // CHECK-LABEL: test_svdup_n_b32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 %op) - // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[DUP]]) - // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b32,)(op); } +// CHECK-LABEL: @test_svdup_n_b64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 [[OP:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svdup_n_b64b( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 [[OP:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svbool_t test_svdup_n_b64(bool op) { - // CHECK-LABEL: test_svdup_n_b64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 %op) - // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[DUP]]) - // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b64,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c index 680986c6ae0ba3..51130bf10e966d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,317 +14,744 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svdupq_lane_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdupq_lane_s8u10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svdupq_lane_s8(svint8_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s8,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s16u11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svdupq_lane_s16(svint16_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s16,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s32u11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svdupq_lane_s32(svint32_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s32,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s64u11__SVInt64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svdupq_lane_s64(svint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s64,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svdupq_lane_u8u11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svdupq_lane_u8(svuint8_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u8,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u16u12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svdupq_lane_u16(svuint16_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u16,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u32u12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svdupq_lane_u32(svuint32_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u32,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svdupq_lane_u64(svuint64_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u64,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f16u13__SVFloat16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svdupq_lane_f16(svfloat16_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f16,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f32u13__SVFloat32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svdupq_lane_f32(svfloat32_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f32,,)(data, index); } +// CHECK-LABEL: @test_svdupq_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f64u13__SVFloat64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svdupq_lane_f64(svfloat64_t data, uint64_t index) { - // CHECK-LABEL: test_svdupq_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( %data, i64 %index) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f64,,)(data, index); } +// CHECK-LABEL: @test_svdupq_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CHECK-NEXT: ret [[TMP17]] +// +// CPP-CHECK-LABEL: @_Z16test_svdupq_n_s8aaaaaaaaaaaaaaaa( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP17]] +// svint8_t test_svdupq_n_s8(int8_t x0, int8_t x1, int8_t x2, int8_t x3, int8_t x4, int8_t x5, int8_t x6, int8_t x7, int8_t x8, int8_t x9, int8_t x10, int8_t x11, int8_t x12, int8_t x13, int8_t x14, int8_t x15) { - // CHECK-LABEL: test_svdupq_n_s8 - // CHECK: insertelement <16 x i8> undef, i8 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %x15, i32 15 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } +// CHECK-LABEL: @test_svdupq_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s16ssssssss( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svint16_t test_svdupq_n_s16(int16_t x0, int16_t x1, int16_t x2, int16_t x3, int16_t x4, int16_t x5, int16_t x6, int16_t x7) { - // CHECK-LABEL: test_svdupq_n_s16 - // CHECK: insertelement <8 x i16> undef, i16 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %x7, i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CHECK-NEXT: ret [[TMP5]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s32iiii( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP5]] +// svint32_t test_svdupq_n_s32(int32_t x0, int32_t x1, int32_t x2, int32_t x3) { - // CHECK-LABEL: test_svdupq_n_s32 - // CHECK: insertelement <4 x i32> undef, i32 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %x3, i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s64ll( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svdupq_n_s64(int64_t x0, int64_t x1) { - // CHECK-LABEL: test_svdupq_n_s64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %x0, i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %x1, i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s64,)(x0, x1); } +// CHECK-LABEL: @test_svdupq_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CHECK-NEXT: ret [[TMP17]] +// +// CPP-CHECK-LABEL: @_Z16test_svdupq_n_u8hhhhhhhhhhhhhhhh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP17]] +// svuint8_t test_svdupq_n_u8(uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4, uint8_t x5, uint8_t x6, uint8_t x7, uint8_t x8, uint8_t x9, uint8_t x10, uint8_t x11, uint8_t x12, uint8_t x13, uint8_t x14, uint8_t x15) { - // CHECK-LABEL: test_svdupq_n_u8 - // CHECK: insertelement <16 x i8> undef, i8 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %x15, i32 15 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } +// CHECK-LABEL: @test_svdupq_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u16tttttttt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svuint16_t test_svdupq_n_u16(uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3, uint16_t x4, uint16_t x5, uint16_t x6, uint16_t x7) { - // CHECK-LABEL: test_svdupq_n_u16 - // CHECK: insertelement <8 x i16> undef, i16 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %x7, i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CHECK-NEXT: ret [[TMP5]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u32jjjj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP5]] +// svuint32_t test_svdupq_n_u32(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3) { - // CHECK-LABEL: test_svdupq_n_u32 - // CHECK: insertelement <4 x i32> undef, i32 %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %x3, i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u64mm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svdupq_n_u64(uint64_t x0, uint64_t x1) { - // CHECK-LABEL: test_svdupq_n_u64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %x0, i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %x1, i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u64,)(x0, x1); } +// CHECK-LABEL: @test_svdupq_n_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f16DhDhDhDhDhDhDhDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svfloat16_t test_svdupq_n_f16(float16_t x0, float16_t x1, float16_t x2, float16_t x3, float16_t x4, float16_t x5, float16_t x6, float16_t x7) { - // CHECK-LABEL: test_svdupq_n_f16 - // CHECK: insertelement <8 x half> undef, half %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x half> %[[X:.*]], half %x7, i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) +// CHECK-NEXT: ret [[TMP5]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f32ffff( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP5]] +// svfloat32_t test_svdupq_n_f32(float32_t x0, float32_t x1, float32_t x2, float32_t x3) { - // CHECK-LABEL: test_svdupq_n_f32 - // CHECK: insertelement <4 x float> undef, float %x0, i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x float> %[[X:.*]], float %x3, i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f64dd( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svdupq_n_f64(float64_t x0, float64_t x1) { - // CHECK-LABEL: test_svdupq_n_f64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x double> undef, double %x0, i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x double> %[[SVEC]], double %x1, i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( %[[INS]], i64 0) - // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f64,)(x0, x1); } +// CHECK-LABEL: @test_svdupq_n_b8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[X4:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[X8:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[X9:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL10:%.*]] = zext i1 [[X10:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL11:%.*]] = zext i1 [[X11:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL12:%.*]] = zext i1 [[X12:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 +// CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 +// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 +// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) +// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], [[TMP19]]) +// CHECK-NEXT: ret [[TMP20]] +// +// CPP-CHECK-LABEL: @_Z16test_svdupq_n_b8bbbbbbbbbbbbbbbb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[X4:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[X8:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[X9:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL10:%.*]] = zext i1 [[X10:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL11:%.*]] = zext i1 [[X11:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL12:%.*]] = zext i1 [[X12:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 +// CPP-CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 +// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) +// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], [[TMP19]]) +// CPP-CHECK-NEXT: ret [[TMP20]] +// svbool_t test_svdupq_n_b8(bool x0, bool x1, bool x2, bool x3, bool x4, bool x5, bool x6, bool x7, bool x8, bool x9, bool x10, bool x11, bool x12, bool x13, bool x14, bool x15) { - // CHECK-LABEL: test_svdupq_n_b8 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i8 - // CHECK-DAG: %[[X15:.*]] = zext i1 %x15 to i8 - // CHECK: insertelement <16 x i8> undef, i8 %[[X0]], i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %[[X15]], i32 15 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: ret %[[CMP]] return SVE_ACLE_FUNC(svdupq,_n,_b8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } +// CHECK-LABEL: @test_svdupq_n_b16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i16 +// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i16 +// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i16 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i16 +// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[X4:%.*]] to i16 +// CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 +// CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 +// CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 +// CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 +// CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 +// CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 +// CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 +// CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 +// CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 +// CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 +// CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 +// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) +// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) +// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], [[TMP19]]) +// CHECK-NEXT: [[TMP21:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP20]]) +// CHECK-NEXT: ret [[TMP21]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b16bbbbbbbb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[X4:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 +// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 +// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 +// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 +// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 +// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 +// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 +// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 +// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) +// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) +// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) +// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], [[TMP19]]) +// CPP-CHECK-NEXT: [[TMP21:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP20]]) +// CPP-CHECK-NEXT: ret [[TMP21]] +// svbool_t test_svdupq_n_b16(bool x0, bool x1, bool x2, bool x3, bool x4, bool x5, bool x6, bool x7) { - // CHECK-LABEL: test_svdupq_n_b16 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i16 - // CHECK-DAG: %[[X7:.*]] = zext i1 %x7 to i16 - // CHECK: insertelement <8 x i16> undef, i16 %[[X0]], i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %[[X7]], i32 7 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[CMP]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b16,)(x0, x1, x2, x3, x4, x5, x6, x7); } +// CHECK-LABEL: @test_svdupq_n_b32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i32 +// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 +// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 +// CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 +// CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 +// CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 +// CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) +// CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) +// CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], [[TMP11]]) +// CHECK-NEXT: [[TMP13:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP12]]) +// CHECK-NEXT: ret [[TMP13]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b32bbbb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 +// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 +// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 +// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) +// CPP-CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) +// CPP-CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], [[TMP11]]) +// CPP-CHECK-NEXT: [[TMP13:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP12]]) +// CPP-CHECK-NEXT: ret [[TMP13]] +// svbool_t test_svdupq_n_b32(bool x0, bool x1, bool x2, bool x3) { - // CHECK-LABEL: test_svdupq_n_b32 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i32 - // CHECK-DAG: %[[X3:.*]] = zext i1 %x3 to i32 - // CHECK: insertelement <4 x i32> undef, i32 %[[X0]], i32 0 // - // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %[[X3]], i32 3 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[CMP]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b32,)(x0, x1, x2, x3); } +// CHECK-LABEL: @test_svdupq_n_b64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 +// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 +// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 +// CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) +// CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], [[TMP7]]) +// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP8]]) +// CHECK-NEXT: ret [[TMP9]] +// +// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b64bb( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 +// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 +// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 +// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 +// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) +// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) +// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) +// CPP-CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) +// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], [[TMP7]]) +// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP8]]) +// CPP-CHECK-NEXT: ret [[TMP9]] +// svbool_t test_svdupq_n_b64(bool x0, bool x1) { - // CHECK-LABEL: test_svdupq_n_b64 - // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i64 - // CHECK-DAG: %[[X1:.*]] = zext i1 %x1 to i64 - // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %[[X0]], i32 0 - // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %[[X1]], i32 1 - // CHECK-NOT: insertelement - // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) - // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) - // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) - // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) - // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) - // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[CMP]]) - // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b64,)(x0, x1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c index 37c5a93ca4e046..777f7d306e3760 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,469 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_sveor_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_sveor_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_sveor_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_sveor_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_sveor_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_sveor_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_sveor_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_sveor_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_sveor_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_sveor_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_sveor_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_sveor_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_sveor_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_sveor_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_sveor_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_sveor_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_sveor_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_sveor_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_sveor_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_sveor_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_sveor_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_sveor_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_sveor_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_sveor_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_sveor_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_sveor_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_sveor_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_sveor_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_sveor_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_sveor_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_sveor_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_sveor_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_sveor_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_sveor_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_sveor_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_sveor_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_sveor_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_sveor_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_sveor_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_sveor_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_sveor_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_sveor_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_sveor_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_sveor_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_sveor_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_sveor_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_sveor_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_sveor_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_sveor_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_sveor_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_sveor_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_sveor_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_sveor_n_s8_z - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_sveor_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_sveor_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_sveor_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_sveor_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_sveor_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_sveor_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_sveor_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_sveor_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_sveor_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_sveor_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_sveor_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_sveor_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_sveor_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_sveor_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_sveor_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_sveor_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_sveor_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_sveor_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_sveor_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_sveor_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_sveor_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_sveor_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_sveor_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_sveor_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_sveor_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_sveor_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_sveor_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_sveor_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_sveor_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_sveor_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_sveor_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_sveor_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_sveor_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_sveor_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_sveor_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_sveor_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_sveor_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_sveor_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_sveor_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_sveor_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_sveor_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_sveor_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_sveor_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_sveor_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_sveor_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_sveor_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_sveor_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_sveor_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_sveor_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_sveor_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c index 9fd6c0d2830387..34b5c4faccc9bd 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,472 +14,891 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svlsl_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svlsl_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsl_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsl_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsl_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svlsl_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svlsl_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsl_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svlsl_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsl_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsl_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsl_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsl_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsl_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsl_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsl_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svlsl_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svlsl_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svlsl_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsl_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsl_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsl_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svlsl_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svlsl_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svlsl_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svlsl_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svlsl_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsl_wide_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svlsl_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsl_wide_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c index 4357f1a87cd3f8..9558c623de2b14 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,282 +14,532 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svlsr_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsr_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsr_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svlsr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsr_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsr_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svlsr_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svlsr_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svlsr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svlsr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svlsr_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svlsr_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svlsr_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_mu10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_wide_n_u8_m(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_mu10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_wide_n_u16_m(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_mu10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_wide_n_u32_m(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_zu10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svlsr_wide_n_u8_z(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_zu10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svlsr_wide_n_u16_z(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_zu10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svlsr_wide_n_u32_z(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_xu10__SVBool_tu11__SVUint8_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svlsr_wide_n_u8_x(svbool_t pg, svuint8_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_xu10__SVBool_tu12__SVUint16_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svlsr_wide_n_u16_x(svbool_t pg, svuint16_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svlsr_wide_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_xu10__SVBool_tu12__SVUint32_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svlsr_wide_n_u32_x(svbool_t pg, svuint32_t op1, uint64_t op2) { - // CHECK-LABEL: test_svlsr_wide_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c index 49bd973c93d923..ee96c5407e30bc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,637 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmad_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmad_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmad_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmad_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmad_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmad_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmad_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmad_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmad_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmad_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmad_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmad_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmad_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmad_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmad_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmad_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmad_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmad_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmad_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmad_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmad_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmad_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmad_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmad_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmad_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmad_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmad_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmad_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmad_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmad_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmad_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmad_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmad_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmad_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmad_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmad_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmad_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmad_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmad_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmad_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmad_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmad_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmad_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmad_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmad_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmad_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmad_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmad_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmad_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmad_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmad_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmad_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmad_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmad_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmad_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmad_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmad_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmad_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmad_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmad_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmad_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmad_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmad_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmad_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmad_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmad_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmad_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmad_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmad_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmad_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmad_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmad_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmad_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmad_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmad_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmad_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmad_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmad_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmad_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmad_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmad_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmad_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmad_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmad_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmad_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmad_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmad_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmad_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmad_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmad_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmad_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmad_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmad_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmad_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmad_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmad_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmad_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmad_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmad_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmad_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmad_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmad_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmad_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmad_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmad_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmad_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmad_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmad_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmad_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmad_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmad_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmad_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmad_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmad_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmad_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmad_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmad_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c index 246a025fa81cee..c42232960eaaf9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,638 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmax_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmax_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmax_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmax_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmax_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmax_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmax_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmax_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmax_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmax_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmax_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmax_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmax_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmax_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmax_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmax_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmax_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmax_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmax_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmax_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmax_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmax_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmax_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmax_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmax_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmax_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmax_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmax_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmax_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmax_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmax_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmax_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmax_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmax_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmax_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmax_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmax_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmax_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmax_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmax_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmax_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmax_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmax_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmax_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmax_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmax_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmax_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmax_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmax_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmax_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmax_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmax_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmax_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmax_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmax_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmax_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmax_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmax_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmax_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmax_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmax_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmax_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmax_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmax_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmax_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmax_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmax_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmax_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmax_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmax_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmax_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmax_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmax_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmax_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmax_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmax_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmax_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmax_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmax_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmax_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmax_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmax_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmax_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmax_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmax_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmax_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmax_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmax_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmax_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmax_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmax_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmax_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmax_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmax_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmax_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmax_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmax_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmax_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmax_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmax_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmax_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmax_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmax_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmax_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmax_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmax_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmax_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmax_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmax_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmax_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmax_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmax_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmax_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmax_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmax_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmax_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmax_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmax_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmax_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmax_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmax_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmax_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmax_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmax_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmax_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmax_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmax_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmax_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmax_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmax_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmax_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmax_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmax_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmax_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmax_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmax_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c index 881ebec77034df..209ac1c7fd3375 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,178 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmaxnm_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmaxnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmaxnm_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmaxnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmaxnm_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmaxnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmaxnm_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmaxnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmaxnm_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmaxnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmaxnm_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmaxnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmaxnm_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmaxnm_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmaxnm_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmaxnm_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmaxnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmaxnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmaxnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmaxnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmaxnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmaxnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmaxnm_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmaxnm_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c index 0e124707c97a5f..22dd79c604af14 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,638 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmin_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmin_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmin_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmin_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmin_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmin_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmin_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmin_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmin_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmin_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmin_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmin_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmin_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmin_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmin_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmin_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmin_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmin_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmin_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmin_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmin_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmin_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmin_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmin_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmin_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmin_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmin_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmin_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmin_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmin_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmin_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmin_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmin_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmin_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmin_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmin_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmin_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmin_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmin_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmin_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmin_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmin_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmin_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmin_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmin_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmin_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmin_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmin_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmin_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmin_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmin_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmin_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmin_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmin_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmin_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmin_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmin_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmin_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmin_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmin_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmin_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmin_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmin_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmin_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmin_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmin_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmin_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmin_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmin_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmin_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmin_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmin_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmin_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmin_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmin_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmin_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmin_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmin_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmin_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmin_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmin_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmin_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmin_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmin_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmin_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmin_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmin_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmin_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmin_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmin_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmin_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmin_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmin_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmin_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmin_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmin_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmin_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmin_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmin_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmin_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmin_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmin_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmin_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmin_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmin_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmin_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmin_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmin_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmin_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmin_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmin_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmin_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmin_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmin_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmin_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmin_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmin_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmin_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmin_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmin_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmin_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmin_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmin_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmin_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmin_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmin_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmin_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmin_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmin_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmin_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmin_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmin_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmin_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmin_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmin_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmin_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c index 6dbd5e89823dc5..a8e245f0e112ed 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,178 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svminnm_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svminnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svminnm_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svminnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svminnm_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svminnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svminnm_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svminnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svminnm_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svminnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svminnm_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svminnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svminnm_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svminnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svminnm_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svminnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svminnm_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svminnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svminnm_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svminnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svminnm_n_f16_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svminnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svminnm_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svminnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svminnm_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svminnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svminnm_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svminnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svminnm_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svminnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svminnm_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svminnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svminnm_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svminnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svminnm_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svminnm_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svminnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svminnm_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c index cbf591b75ecc24..fe707ec19267cf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,685 +14,1300 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmla_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmla_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmla_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmla_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmla_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmla_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmla_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmla_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmla_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmla_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmla_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmla_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmla_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmla_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmla_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmla_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmla_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmla_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmla_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmla_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmla_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmla_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmla_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmla_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmla_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmla_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmla_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmla_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmla_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmla_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmla_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmla_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmla_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmla_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmla_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmla_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmla_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmla_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmla_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmla_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmla_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmla_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmla_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmla_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmla_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmla_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmla_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmla_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmla_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmla_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmla_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmla_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmla_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmla_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmla_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmla_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmla_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmla_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmla_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmla_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmla_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmla_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmla_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmla_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmla_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmla_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmla_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmla_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmla_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmla_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmla_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmla_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmla_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmla_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmla_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmla_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmla_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmla_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmla_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmla_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmla_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmla_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmla_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmla_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmla_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmla_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmla_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmla_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmla_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmla_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmla_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmla_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmla_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmla_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmla_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmla_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmla_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmla_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmla_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmla_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmla_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmla_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmla_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmla_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmla_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmla_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmla_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmla_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f16,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmla_lane_f16_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmla_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmla_lane_f16_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( %op1, %op2, %op3, i32 7) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f16,,)(op1, op2, op3, 7); } +// CHECK-LABEL: @test_svmla_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmla_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f32,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmla_lane_f32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmla_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmla_lane_f32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svmla_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmla_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f64,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmla_lane_f64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmla_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmla_lane_f64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c index 033b062dad7124..ffb0b9b9e52249 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,685 +14,1300 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmls_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmls_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmls_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmls_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmls_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmls_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmls_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmls_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmls_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmls_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmls_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmls_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmls_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmls_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmls_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmls_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmls_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmls_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmls_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmls_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmls_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmls_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmls_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmls_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmls_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmls_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmls_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmls_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmls_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmls_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmls_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmls_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmls_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmls_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmls_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmls_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmls_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmls_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmls_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmls_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmls_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmls_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmls_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmls_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmls_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmls_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmls_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmls_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmls_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmls_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmls_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmls_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmls_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmls_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmls_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmls_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmls_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmls_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmls_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmls_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmls_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmls_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmls_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmls_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmls_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmls_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmls_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmls_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmls_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmls_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmls_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmls_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmls_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmls_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmls_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmls_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmls_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmls_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmls_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmls_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmls_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmls_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmls_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmls_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmls_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmls_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmls_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmls_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmls_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmls_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmls_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmls_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmls_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmls_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmls_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmls_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmls_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmls_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmls_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmls_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmls_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmls_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmls_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmls_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmls_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmls_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmls_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmls_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmls_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f16,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmls_lane_f16_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmls_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmls_lane_f16_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( %op1, %op2, %op3, i32 7) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f16,,)(op1, op2, op3, 7); } +// CHECK-LABEL: @test_svmls_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmls_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f32,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmls_lane_f32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmls_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmls_lane_f32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( %op1, %op2, %op3, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f32,,)(op1, op2, op3, 3); } +// CHECK-LABEL: @test_svmls_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmls_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( %op1, %op2, %op3, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f64,,)(op1, op2, op3, 0); } +// CHECK-LABEL: @test_svmls_lane_f64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmls_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmls_lane_f64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( %op1, %op2, %op3, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c index 24c9deb86a5070..b3cdba08cf8833 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,637 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmsb_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmsb_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmsb_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmsb_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmsb_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmsb_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmsb_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmsb_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmsb_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmsb_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmsb_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmsb_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmsb_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmsb_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmsb_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmsb_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmsb_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmsb_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmsb_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmsb_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmsb_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmsb_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmsb_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmsb_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmsb_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmsb_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmsb_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmsb_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmsb_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmsb_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmsb_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmsb_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmsb_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmsb_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { - // CHECK-LABEL: test_svmsb_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmsb_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { - // CHECK-LABEL: test_svmsb_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmsb_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { - // CHECK-LABEL: test_svmsb_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmsb_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { - // CHECK-LABEL: test_svmsb_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmsb_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { - // CHECK-LABEL: test_svmsb_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmsb_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { - // CHECK-LABEL: test_svmsb_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmsb_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { - // CHECK-LABEL: test_svmsb_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmsb_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { - // CHECK-LABEL: test_svmsb_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmsb_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmsb_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmsb_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmsb_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmsb_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmsb_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmsb_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmsb_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmsb_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmsb_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmsb_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmsb_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmsb_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmsb_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmsb_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmsb_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmsb_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmsb_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmsb_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmsb_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmsb_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmsb_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmsb_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmsb_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmsb_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmsb_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmsb_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmsb_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmsb_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmsb_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmsb_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmsb_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmsb_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { - // CHECK-LABEL: test_svmsb_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmsb_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { - // CHECK-LABEL: test_svmsb_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmsb_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { - // CHECK-LABEL: test_svmsb_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmsb_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { - // CHECK-LABEL: test_svmsb_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmsb_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { - // CHECK-LABEL: test_svmsb_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmsb_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { - // CHECK-LABEL: test_svmsb_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmsb_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { - // CHECK-LABEL: test_svmsb_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmsb_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { - // CHECK-LABEL: test_svmsb_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmsb_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmsb_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmsb_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmsb_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmsb_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmsb_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svmsb_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svmsb_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svmsb_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmsb_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmsb_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmsb_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmsb_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmsb_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmsb_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svmsb_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svmsb_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svmsb_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svmsb_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c index d2110cd1819b36..293018e96ff421 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,687 +14,1300 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmul_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmul_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmul_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmul_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmul_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmul_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmul_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmul_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmul_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmul_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmul_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmul_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmul_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmul_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmul_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmul_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmul_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmul_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmul_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmul_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmul_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmul_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmul_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmul_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmul_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmul_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmul_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmul_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmul_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmul_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmul_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmul_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmul_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmul_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmul_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmul_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmul_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmul_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmul_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmul_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmul_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svmul_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmul_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmul_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmul_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmul_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmul_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmul_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmul_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmul_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmul_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmul_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmul_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmul_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmul_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmul_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmul_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmul_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmul_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmul_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmul_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmul_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmul_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmul_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmul_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmul_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmul_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmul_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmul_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmul_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmul_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmul_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmul_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmul_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmul_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmul_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmul_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmul_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmul_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmul_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmul_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmul_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmul_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmul_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmul_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmul_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmul_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmul_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmul_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmul_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmul_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmul_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmul_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmul_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmul_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmul_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmul_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmul_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmul_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmul_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmul_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmul_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmul_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmul_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmul_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmul_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmul_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmul_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmul_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmul_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmul_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmul_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmul_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmul_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmul_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmul_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmul_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmul_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmul_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmul_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmul_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmul_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmul_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmul_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmul_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmul_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmul_lane_f16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f16u13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmul_lane_f16(svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_lane_f16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( %op1, %op2, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 0); } +// CHECK-LABEL: @test_svmul_lane_f16_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f16_1u13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat16_t test_svmul_lane_f16_1(svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmul_lane_f16_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( %op1, %op2, i32 7) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 7); } +// CHECK-LABEL: @test_svmul_lane_f32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f32u13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmul_lane_f32(svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_lane_f32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( %op1, %op2, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 0); } +// CHECK-LABEL: @test_svmul_lane_f32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f32_1u13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat32_t test_svmul_lane_f32_1(svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmul_lane_f32_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( %op1, %op2, i32 3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 3); } +// CHECK-LABEL: @test_svmul_lane_f64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f64u13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmul_lane_f64(svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_lane_f64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( %op1, %op2, i32 0) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 0); } +// CHECK-LABEL: @test_svmul_lane_f64_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f64_1u13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svfloat64_t test_svmul_lane_f64_1(svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmul_lane_f64_1 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( %op1, %op2, i32 1) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c index 2614be69dec713..162be519a8941b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,462 +14,874 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmulh_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmulh_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmulh_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmulh_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmulh_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmulh_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmulh_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmulh_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmulh_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmulh_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmulh_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmulh_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmulh_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmulh_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmulh_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmulh_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmulh_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmulh_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmulh_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmulh_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmulh_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmulh_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmulh_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmulh_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmulh_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmulh_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmulh_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmulh_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmulh_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmulh_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmulh_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmulh_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmulh_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svmulh_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svmulh_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svmulh_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svmulh_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svmulh_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svmulh_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svmulh_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svmulh_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svmulh_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svmulh_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svmulh_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svmulh_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svmulh_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svmulh_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svmulh_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svmulh_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svmulh_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmulh_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svmulh_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmulh_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svmulh_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmulh_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svmulh_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmulh_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svmulh_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmulh_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svmulh_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmulh_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svmulh_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmulh_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svmulh_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmulh_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmulh_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmulh_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmulh_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmulh_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmulh_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmulh_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmulh_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmulh_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmulh_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmulh_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmulh_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmulh_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmulh_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmulh_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmulh_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmulh_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svmulh_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svmulh_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svmulh_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svmulh_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svmulh_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svmulh_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svmulh_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svmulh_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svmulh_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svmulh_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svmulh_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svmulh_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svmulh_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svmulh_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulh_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svmulh_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svmulh_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c index 1fb72675273cb0..71846e792b3f9b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svmulx_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmulx_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmulx_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmulx_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmulx_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmulx_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmulx_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmulx_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmulx_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmulx_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmulx_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmulx_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmulx_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svmulx_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svmulx_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svmulx_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svmulx_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svmulx_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svmulx_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svmulx_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmulx_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svmulx_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmulx_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svmulx_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmulx_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmulx_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmulx_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmulx_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmulx_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmulx_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmulx_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svmulx_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svmulx_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svmulx_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svmulx_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svmulx_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svmulx_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svmulx_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c index 80a8f19506dd3f..cd0b371f26fa50 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmad_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmad_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmad_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmad_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmad_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmad_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmad_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmad_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmad_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmad_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmad_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmad_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmad_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmad_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmad_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmad_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmad_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmad_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmad_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmad_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c index 8647fae29868e7..d0c8f8870995e3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmla_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmla_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmla_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmla_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmla_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmla_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmla_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmla_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmla_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmla_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmla_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmla_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmla_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmla_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmla_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmla_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmla_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmla_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmla_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmla_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c index 37547faba3d2f2..665dd49b80f2c3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmls_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmls_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmls_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmls_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmls_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmls_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmls_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmls_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmls_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmls_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmls_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmls_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmls_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmls_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmls_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmls_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmls_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmls_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmls_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmls_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c index e814a0925ccc93..c931855967e917 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svnmsb_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmsb_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmsb_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmsb_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmsb_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmsb_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmsb_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svnmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { - // CHECK-LABEL: test_svnmsb_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svnmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { - // CHECK-LABEL: test_svnmsb_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svnmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { - // CHECK-LABEL: test_svnmsb_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svnmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmsb_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svnmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmsb_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svnmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmsb_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_z,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmsb_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmsb_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmsb_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_m,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svnmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { - // CHECK-LABEL: test_svnmsb_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svnmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { - // CHECK-LABEL: test_svnmsb_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_x,)(pg, op1, op2, op3); } +// CHECK-LABEL: @test_svnmsb_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svnmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { - // CHECK-LABEL: test_svnmsb_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c index 3727afcd38080f..28075e2dcc4072 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,470 +14,889 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svorr_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svorr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svorr_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svorr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svorr_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svorr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svorr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svorr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svorr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svorr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svorr_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svorr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svorr_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svorr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svorr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svorr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svorr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svorr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svorr_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svorr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svorr_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svorr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svorr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svorr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svorr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svorr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svorr_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svorr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svorr_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svorr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svorr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svorr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svorr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svorr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svorr_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svorr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svorr_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svorr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svorr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svorr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svorr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svorr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svorr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svorr_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svorr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svorr_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svorr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svorr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svorr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svorr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svorr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svorr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svorr_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svorr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svorr_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svorr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svorr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svorr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svorr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svorr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svorr_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svorr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svorr_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svorr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svorr_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svorr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svorr_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svorr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svorr_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svorr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svorr_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svorr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svorr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svorr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svorr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svorr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svorr_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svorr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svorr_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svorr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svorr_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svorr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svorr_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svorr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svorr_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svorr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svorr_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svorr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svorr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svorr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svorr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svorr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svorr_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svorr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svorr_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svorr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svorr_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svorr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svorr_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svorr_b_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svorr_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svbool_t test_svorr_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { - // CHECK-LABEL: test_svorr_b_z - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c index 3cb66cc0b85a80..106ff55707da3a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,138 +14,258 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svqadd_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqadd_s8u10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svqadd_s8(svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svqadd_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_s16u11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svqadd_s16(svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svqadd_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_s32u11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svqadd_s32(svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svqadd_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_s64u11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svqadd_s64(svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svqadd_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqadd_u8u11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svqadd_u8(svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svqadd_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_u16u12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svqadd_u16(svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svqadd_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_u32u12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svqadd_u32(svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svqadd_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqadd_u64u12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svqadd_u64(svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svqadd_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u64,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqadd_n_s8u10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svqadd_n_s8(svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svqadd_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s16u11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svqadd_n_s16(svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svqadd_n_s16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s32u11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svqadd_n_s32(svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svqadd_n_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s64u11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svqadd_n_s64(svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svqadd_n_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqadd_n_u8u11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svqadd_n_u8(svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svqadd_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u16u12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svqadd_n_u16(svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svqadd_n_u16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u32u12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svqadd_n_u32(svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svqadd_n_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqadd_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svqadd_n_u64(svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svqadd_n_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c index 3a59667f3c2fd3..bacc2efc1b53b5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,138 +14,258 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svqsub_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqsub_s8u10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svqsub_s8(svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svqsub_s8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_s16u11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint16_t test_svqsub_s16(svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svqsub_s16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_s32u11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svqsub_s32(svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svqsub_s32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_s64u11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint64_t test_svqsub_s64(svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svqsub_s64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z14test_svqsub_u8u11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svqsub_u8(svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svqsub_u8 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_u16u12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint16_t test_svqsub_u16(svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svqsub_u16 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_u32u12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint32_t test_svqsub_u32(svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svqsub_u32 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svqsub_u64u12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint64_t test_svqsub_u64(svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svqsub_u64 - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u64,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqsub_n_s8u10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svqsub_n_s8(svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svqsub_n_s8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s16u11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svqsub_n_s16(svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svqsub_n_s16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s32u11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svqsub_n_s32(svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svqsub_n_s32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_s64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s64u11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svqsub_n_s64(svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svqsub_n_s64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s64,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u8( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svqsub_n_u8u11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svqsub_n_u8(svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svqsub_n_u8 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u8,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u16( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u16u12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svqsub_n_u16(svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svqsub_n_u16 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u16,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u32u12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svqsub_n_u32(svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svqsub_n_u32 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u32,,)(op1, op2); } +// CHECK-LABEL: @test_svqsub_n_u64( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u64u12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svqsub_n_u64(svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svqsub_n_u64 - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c index ef53940b9fa078..6781b1496c98ba 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,179 +14,338 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svscale_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f16_zu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svscale_f16_z(svbool_t pg, svfloat16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svscale_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f32_zu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svscale_f32_z(svbool_t pg, svfloat32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svscale_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f64_zu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svscale_f64_z(svbool_t pg, svfloat64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svscale_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f16_mu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svscale_f16_m(svbool_t pg, svfloat16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svscale_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f32_mu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svscale_f32_m(svbool_t pg, svfloat32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svscale_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f64_mu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svscale_f64_m(svbool_t pg, svfloat64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svscale_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f16_xu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svscale_f16_x(svbool_t pg, svfloat16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svscale_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f32_xu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svscale_f32_x(svbool_t pg, svfloat32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svscale_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svscale_f64_xu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svscale_f64_x(svbool_t pg, svfloat64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svscale_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_zu10__SVBool_tu13__SVFloat16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svscale_n_f16_z(svbool_t pg, svfloat16_t op1, int16_t op2) { - // CHECK-LABEL: test_svscale_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_zu10__SVBool_tu13__SVFloat32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svscale_n_f32_z(svbool_t pg, svfloat32_t op1, int32_t op2) { - // CHECK-LABEL: test_svscale_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_zu10__SVBool_tu13__SVFloat64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svscale_n_f64_z(svbool_t pg, svfloat64_t op1, int64_t op2) { - // CHECK-LABEL: test_svscale_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_mu10__SVBool_tu13__SVFloat16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svscale_n_f16_m(svbool_t pg, svfloat16_t op1, int16_t op2) { - // CHECK-LABEL: test_svscale_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_mu10__SVBool_tu13__SVFloat32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svscale_n_f32_m(svbool_t pg, svfloat32_t op1, int32_t op2) { - // CHECK-LABEL: test_svscale_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_mu10__SVBool_tu13__SVFloat64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svscale_n_f64_m(svbool_t pg, svfloat64_t op1, int64_t op2) { - // CHECK-LABEL: test_svscale_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_xu10__SVBool_tu13__SVFloat16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svscale_n_f16_x(svbool_t pg, svfloat16_t op1, int16_t op2) { - // CHECK-LABEL: test_svscale_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_xu10__SVBool_tu13__SVFloat32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svscale_n_f32_x(svbool_t pg, svfloat32_t op1, int32_t op2) { - // CHECK-LABEL: test_svscale_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svscale_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_xu10__SVBool_tu13__SVFloat64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svscale_n_f64_x(svbool_t pg, svfloat64_t op1, int64_t op2) { - // CHECK-LABEL: test_svscale_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c index 977c7937d0ebfc..2b9fd96f552bc6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svsub_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsub_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsub_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsub_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsub_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsub_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsub_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsub_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsub_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsub_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsub_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsub_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsub_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsub_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsub_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsub_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsub_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsub_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsub_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsub_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsub_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z15test_svsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsub_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsub_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsub_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsub_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsub_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsub_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsub_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsub_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsub_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsub_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsub_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsub_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsub_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsub_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsub_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsub_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsub_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsub_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsub_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsub_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsub_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsub_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsub_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsub_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsub_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsub_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsub_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsub_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsub_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsub_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsub_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsub_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsub_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsub_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsub_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsub_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsub_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsub_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsub_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsub_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsub_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsub_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsub_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsub_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsub_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsub_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsub_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svsub_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsub_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svsub_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsub_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svsub_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsub_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsub_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsub_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsub_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsub_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsub_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsub_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsub_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsub_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsub_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsub_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsub_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsub_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsub_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c index 95dadd7cae1b56..2866975f05a03d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c @@ -1,9 +1,10 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - /dev/null %s #include #ifdef SVE_OVERLOADED_FORMS @@ -13,639 +14,1210 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svsubr_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsubr_s8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsubr_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsubr_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsubr_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsubr_u8_z - // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsubr_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsubr_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsubr_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsubr_s8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsubr_s16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsubr_s32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsubr_s64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsubr_u8_m - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsubr_u16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsubr_u32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsubr_u64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint8_t test_svsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { - // CHECK-LABEL: test_svsubr_s8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint16_t test_svsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { - // CHECK-LABEL: test_svsubr_s16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { - // CHECK-LABEL: test_svsubr_s32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint64_t test_svsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { - // CHECK-LABEL: test_svsubr_s64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svuint8_t test_svsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { - // CHECK-LABEL: test_svsubr_u8_x - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint16_t test_svsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { - // CHECK-LABEL: test_svsubr_u16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint32_t test_svsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { - // CHECK-LABEL: test_svsubr_u32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint64_t test_svsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { - // CHECK-LABEL: test_svsubr_u64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint8_t test_svsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsubr_n_s8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint16_t test_svsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsubr_n_s16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint32_t test_svsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsubr_n_s32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svint64_t test_svsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsubr_n_s64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u8_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint8_t test_svsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsubr_n_u8_z - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint16_t test_svsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsubr_n_u16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint32_t test_svsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsubr_n_u32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svuint64_t test_svsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsubr_n_u64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsubr_n_s8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsubr_n_s16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsubr_n_s32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsubr_n_s64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u8_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsubr_n_u8_m - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsubr_n_u16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsubr_n_u32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsubr_n_u64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint8_t test_svsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { - // CHECK-LABEL: test_svsubr_n_s8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint16_t test_svsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { - // CHECK-LABEL: test_svsubr_n_s16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint32_t test_svsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { - // CHECK-LABEL: test_svsubr_n_s32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_s64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svint64_t test_svsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { - // CHECK-LABEL: test_svsubr_n_s64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u8_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svuint8_t test_svsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { - // CHECK-LABEL: test_svsubr_n_u8_x - // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint16_t test_svsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { - // CHECK-LABEL: test_svsubr_n_u16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint32_t test_svsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { - // CHECK-LABEL: test_svsubr_n_u32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_u64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svuint64_t test_svsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { - // CHECK-LABEL: test_svsubr_n_u64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsubr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsubr_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsubr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsubr_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsubr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsubr_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %[[SEL]], %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsubr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsubr_f16_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsubr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsubr_f32_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsubr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsubr_f64_m - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat16_t test_svsubr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { - // CHECK-LABEL: test_svsubr_f16_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat32_t test_svsubr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { - // CHECK-LABEL: test_svsubr_f32_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svfloat64_t test_svsubr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { - // CHECK-LABEL: test_svsubr_f64_x - // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %op2) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f16_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat16_t test_svsubr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsubr_n_f16_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f32_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat32_t test_svsubr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsubr_n_f32_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f64_z( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP3]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_zu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) +// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP3]] +// svfloat64_t test_svsubr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsubr_n_f64_z - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_z,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f16_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsubr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsubr_n_f16_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f32_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsubr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsubr_n_f32_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f64_m( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_mu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsubr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsubr_n_f64_m - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_m,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f16_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat16_t test_svsubr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { - // CHECK-LABEL: test_svsubr_n_f16_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f32_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat32_t test_svsubr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { - // CHECK-LABEL: test_svsubr_n_f32_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_x,)(pg, op1, op2); } +// CHECK-LABEL: @test_svsubr_n_f64_x( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CHECK-NEXT: ret [[TMP2]] +// +// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_xu10__SVBool_tu13__SVFloat64_td( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) +// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) +// CPP-CHECK-NEXT: ret [[TMP2]] +// svfloat64_t test_svsubr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { - // CHECK-LABEL: test_svsubr_n_f64_x - // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) - // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) - // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %[[DUP]]) - // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c index 6f0e4daaa2d6cf..e23bf6ce10d4d8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,45 +13,88 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svsudot_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svsudot_s32u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_s32(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_s32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %z, %y) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot, _s32, , )(x, y, z); } +// CHECK-LABEL: @test_svsudot_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svsudot_n_s32u11__SVInt32_tu10__SVInt8_th( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svsudot_n_s32(svint32_t x, svint8_t y, uint8_t z) { - // CHECK-LABEL: test_svsudot_n_s32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %[[SPLAT]], %y) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot, _n_s32, , )(x, y, z); } +// CHECK-LABEL: @test_svsudot_lane_s32_0( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_0u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_0(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_0 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_svsudot_lane_s32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_1(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_1 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 1) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 1); } +// CHECK-LABEL: @test_svsudot_lane_s32_2( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_2u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_2(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_2 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 2) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 2); } +// CHECK-LABEL: @test_svsudot_lane_s32_3( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_3u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svsudot_lane_s32_3(svint32_t x, svint8_t y, svuint8_t z) { - // CHECK-LABEL: test_svsudot_lane_s32_3 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 3) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c index e77f509b22c3fb..0eefd34b490b2b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c @@ -1,7 +1,8 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK // RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK #include @@ -12,45 +13,88 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif +// CHECK-LABEL: @test_svusdot_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z16test_svusdot_s32u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_s32(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_s32 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %y, %z) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot, _s32, , )(x, y, z); } +// CHECK-LABEL: @test_svusdot_n_s32( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CHECK-NEXT: ret [[TMP1]] +// +// CPP-CHECK-LABEL: @_Z18test_svusdot_n_s32u11__SVInt32_tu11__SVUint8_ta( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) +// CPP-CHECK-NEXT: ret [[TMP1]] +// svint32_t test_svusdot_n_s32(svint32_t x, svuint8_t y, int8_t z) { - // CHECK-LABEL: test_svusdot_n_s32 - // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z) - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %y, %[[SPLAT]]) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot, _n_s32, , )(x, y, z); } +// CHECK-LABEL: @test_svusdot_lane_s32_0( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_0u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_0(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_0 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 0) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 0); } +// CHECK-LABEL: @test_svusdot_lane_s32_1( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_1u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_1(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_1 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 1) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 1); } +// CHECK-LABEL: @test_svusdot_lane_s32_2( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_2u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_2(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_2 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 2) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 2); } +// CHECK-LABEL: @test_svusdot_lane_s32_3( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CHECK-NEXT: ret [[TMP0]] +// +// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_3u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( +// CPP-CHECK-NEXT: entry: +// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) +// CPP-CHECK-NEXT: ret [[TMP0]] +// svint32_t test_svusdot_lane_s32_3(svint32_t x, svuint8_t y, svint8_t z) { - // CHECK-LABEL: test_svusdot_lane_s32_3 - // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 3) - // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 3); }