Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

add some semantic function of instructions #562

Merged
merged 3 commits into from
Nov 24, 2021
Merged

add some semantic function of instructions #562

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
7abaf4c
add some semantic function of instructions
Nov 23, 2021
6702a3c
Modify
Nov 24, 2021
0b1efab
Merge branch 'master' into add_semtics
pgoodman Nov 24, 2021
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions include/remill/Arch/Runtime/Operators.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,8 @@ MAKE_UNDEF(64)

#undef MAKE_UNDEF

#define READBIT(A, B) ((A >> B) & 1)

#define MAKE_SIGNED_MEM_ACCESS(size) \
ALWAYS_INLINE static int##size##_t __remill_read_memory_s##size( \
Memory *mem, addr_t addr) { \
Expand Down
48 changes: 48 additions & 0 deletions lib/Arch/X86/Semantics/DATAXFER.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1121,3 +1121,51 @@ IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMd_64) = MOVSX<R64W, M32, int64_t>;)
IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMz_64) = MOVSX<R64W, M32, int64_t>;)
IF_64BIT(DEF_ISEL(MOVSXD_GPRv_GPR32_64) = MOVSX<R64W, R32, int64_t>;)
IF_64BIT(DEF_ISEL(MOVSXD_GPRv_GPRz_64) = MOVSX<R64W, R32, int64_t>;)

namespace {
template <typename D, typename K, typename S>
DEF_SEM(VPMOVSXBQ_MASKmskw_SIMD128, D dst, K k1, S src) {
auto src_vec = SReadV8(src);
auto dst_vec = SClearV64(SReadV64(dst));
auto k_vec = Read(k1);
for (int i = 0; i< 2; i++) {
pgoodman marked this conversation as resolved.
Show resolved Hide resolved
if (READBIT(k_vec, i) == 0) {
dst_vec = SInsertV64(dst_vec, i, 0);
}else {
pgoodman marked this conversation as resolved.
Show resolved Hide resolved
auto v = SExtTo<int64_t>(SExtractV8(src_vec, i));
dst_vec = SInsertV64(dst_vec, i, v);
}
}
SWriteV64(dst, dst_vec);
return memory;
}
}

#if HAS_FEATURE_AVX512
pgoodman marked this conversation as resolved.
Show resolved Hide resolved
DEF_ISEL(VPMOVSXBQ_XMMi64_MASKmskw_MEMi8_AVX512) = VPMOVSXBQ_MASKmskw_SIMD128<VV128W, R8, MV16>;
DEF_ISEL(VPMOVSXBQ_XMMi64_MASKmskw_XMMi8_AVX512) = VPMOVSXBQ_MASKmskw_SIMD128<VV128W, R8, V128>;
#endif // HAS_FEATURE_AVX512

namespace {
template <typename D, typename K, typename S>
DEF_SEM(VPMOVSXWD_MASKmskw_SIMD128, D dst, K k1, S src) {
pgoodman marked this conversation as resolved.
Show resolved Hide resolved
auto src_vec = SReadV16(src);
auto dst_vec = SClearV32(SReadV32(dst));
auto k_vec = Read(k1);
for (int i = 0; i< 4; i++) {
pgoodman marked this conversation as resolved.
Show resolved Hide resolved
if (READBIT(k_vec, i) == 0) {
dst_vec = SInsertV32(dst_vec, i, 0);
}else {
yjxxin marked this conversation as resolved.
Show resolved Hide resolved
auto v = SExtTo<int32_t>(SExtractV16(src_vec, i));
dst_vec = SInsertV32(dst_vec, i, v);
}
}
SWriteV32(dst, dst_vec);
return memory;
}
}

#if HAS_FEATURE_AVX512
DEF_ISEL(VPMOVSXWD_XMMi32_MASKmskw_MEMi16_AVX512) = VPMOVSXWD_MASKmskw_SIMD128<VV128W, R8, MV64>;
DEF_ISEL(VPMOVSXWD_XMMi32_MASKmskw_XMMi16_AVX512) = VPMOVSXWD_MASKmskw_SIMD128<VV128W, R8, V128>;
#endif // HAS_FEATURE_AVX512