Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

add some semantic function of instructions #562

Merged
merged 3 commits into from
Nov 24, 2021

Conversation

yjxxin
Copy link
Contributor

@yjxxin yjxxin commented Nov 23, 2021

When I added semantic functions, I found that there are many instructions in remill that did not add corresponding semantic functions, such as VPMOVSXBQ and VPMOVSXWD. I added more than 300 similar instructions when doing related work, such as

namespace {
template <typename D, typename K, typename S>
DEF_SEM(VPMOVSXBQ_MASKmskw_SIMD128, D dst, K k1, S src) {
  auto src_vec = SReadV8(src);
  auto dst_vec = SClearV64(SReadV64(dst));
  auto k_vec = Read(k1);
  for (int i = 0; i< 2; i++) {
    if (READBIT(k_vec, i) == 0) {
      dst_vec = SInsertV64(dst_vec, i, 0);
    }else {
      auto v = SExtTo<int64_t>(SExtractV8(src_vec, i));
      dst_vec = SInsertV64(dst_vec, i, v);
    }
  }
  SWriteV64(dst, dst_vec);
  return memory;
}
}

#if HAS_FEATURE_AVX512
DEF_ISEL(VPMOVSXBQ_XMMi64_MASKmskw_MEMi8_AVX512) = VPMOVSXBQ_MASKmskw_SIMD128<VV128W, R8, MV16>;
DEF_ISEL(VPMOVSXBQ_XMMi64_MASKmskw_XMMi8_AVX512) = VPMOVSXBQ_MASKmskw_SIMD128<VV128W, R8, V128>;
#endif  // HAS_FEATURE_AVX512

namespace {
template <typename D, typename K, typename S>
DEF_SEM(VPMOVSXWD_MASKmskw_SIMD128, D dst, K k1, S src) {
  auto src_vec = SReadV16(src);
  auto dst_vec = SClearV32(SReadV32(dst));
  auto k_vec = Read(k1);
  for (int i = 0; i< 4; i++) {
    if (READBIT(k_vec, i) == 0) {
      dst_vec = SInsertV32(dst_vec, i, 0);
    }else {
      auto v = SExtTo<int32_t>(SExtractV16(src_vec, i));
      dst_vec = SInsertV32(dst_vec, i, v);
    }
  }
  SWriteV32(dst, dst_vec);
  return memory;
}
}

#if HAS_FEATURE_AVX512
DEF_ISEL(VPMOVSXWD_XMMi32_MASKmskw_MEMi16_AVX512) = VPMOVSXWD_MASKmskw_SIMD128<VV128W, R8, MV64>;
DEF_ISEL(VPMOVSXWD_XMMi32_MASKmskw_XMMi16_AVX512) = VPMOVSXWD_MASKmskw_SIMD128<VV128W, R8, V128>;
#endif  // HAS_FEATURE_AVX512

If you are satisfied, I can upload all the instructions I have added to the community to help remill expand and support conversion of more instructions.

Copy link
Collaborator

@pgoodman pgoodman left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Mostly superficial changes requested. We'd be very interested in those other 296 semantics!

lib/Arch/X86/Semantics/DATAXFER.cpp Outdated Show resolved Hide resolved
lib/Arch/X86/Semantics/DATAXFER.cpp Outdated Show resolved Hide resolved
lib/Arch/X86/Semantics/DATAXFER.cpp Outdated Show resolved Hide resolved
lib/Arch/X86/Semantics/DATAXFER.cpp Show resolved Hide resolved
lib/Arch/X86/Semantics/DATAXFER.cpp Outdated Show resolved Hide resolved
lib/Arch/X86/Semantics/DATAXFER.cpp Outdated Show resolved Hide resolved
@pgoodman
Copy link
Collaborator

It looks like this relies on the K registers to be in place, so I'll wait on that PR to be merged. Otherwise, excellent work!

@pgoodman pgoodman merged commit 905f75d into lifting-bits:master Nov 24, 2021
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants