Unable to build demo

[PaladinEng]

Hi,
I'm unable to successfully build the stand-alone demo with the ESP-IDF 4.0 build system. I'm getting the following errors:
../components/spidriver/spi_master_lobo.c:104:11: error: unknown type name 'periph_module_t' const periph_module_t module; //peripheral module, for enabling clock etc
../components/spidriver/spi_master_lobo.c:131:17: error: 'PERIPH_SPI_MODULE' undeclared here (not in a function) .module=PERIPH_SPI_MODULE,
../components/spidriver/spi_master_lobo.c:152:17: error: 'PERIPH_HSPI_MODULE' undeclared here (not in a function); did you mean 'SPI_CS_I_MODE'? .module=PERIPH_HSPI_MODULE,
../components/spidriver/spi_master_lobo.c:173:17: error: 'PERIPH_VSPI_MODULE' undeclared here (not in a function); did you mean 'SPI_CS_I_MODE'? .module=PERIPH_VSPI_MODULE,
../components/spidriver/spi_master_lobo.c: In function 'spi_lobo_periph_claim': ../components/spidriver/spi_master_lobo.c:287:14: error: implicit declaration of function 'periph_module_enable'; did you mean 'esp_intr_enable'? [-Werror=implicit-function-declaration] if (ret) periph_module_enable(io_signal[host].module);
../components/spidriver/spi_master_lobo.c: In function 'spi_lobo_periph_free': ../components/spidriver/spi_master_lobo.c:296:14: error: implicit declaration of function 'periph_module_disable'; did you mean 'esp_intr_disable'? [-Werror=implicit-function-declaration] if (ret) periph_module_disable(io_signal[host].module);
../components/spidriver/spi_master_lobo.c: In function 'spi_lobo_dma_chan_claim': ../components/spidriver/spi_master_lobo.c:312:27: error: 'PERIPH_SPI_DMA_MODULE' undeclared (first use in this function); did you mean 'PERIPHS_IO_MUX_MTDO_U'? periph_module_enable( PERIPH_SPI_DMA_MODULE );
../components/spidriver/spi_master_lobo.c:312:27: note: each undeclared identifier is reported only once for each function it appears in ../components/spidriver/spi_master_lobo.c: In function 'spi_lobo_dma_chan_free': ../components/spidriver/spi_master_lobo.c:328:32: error: 'PERIPH_SPI_DMA_MODULE' undeclared (first use in this function); did you mean 'PERIPHS_IO_MUX_MTDO_U'? periph_module_disable( PERIPH_SPI_DMA_MODULE );
cc1: some warnings being treated as errors [685/914] Building C object esp-idf/tft/CMakeFiles/__idf_tft.dir/tft.c.obj ninja: build stopped: subcommand failed. ninja failed with exit code 1

[MarcoKull]

Add #include "driver/periph_ctrl.h" to the includes in components/spidriver/spi_master_lobo.c and it should build fine.

[PaladinEng]

That fixed it and it builds successfully. Should I do a pull request?

[PaladinEng]

So...it builds as long as the TFT Demo wifi options are not configured.
Disabling that and attempting to flash after a successful build yield the following:
esptool write_flash: error: argument <address> <filename>: Detected overlap at address: 0x8000 for file: partition_table/partition-table.bin esptool.py failed with exit code 2

[MarcoKull]

I think the error means that your boot partition is too big, you can use idf.py menuconfig, go to Partition Table ---> Offset of partition table, change it from 0x8000 to 0x10000 and try again.

[PaladinEng]

OK. well, after much experimenting, that did not fix it. I've also tried switching to the default options:
“Single factory app, no OTA” and “Factory app, two OTA definitions” No luck there. Upon examining partitions_example.csv in the repo, I see the following:
nvs, data, nvs, 0x9000, 0x6000,
phy_init, data, phy, 0xf000, 0x1000,
factory, app, factory, 0x10000, 1M,
storage, data, spiffs, 0x180000, 1M,

Which begs the question: are custom partitions required to build the demo?

[PaladinEng]

By way of experiment, I configured and built with the partions_example.csv and still could not get a successful build until I set the offset to x000. Then I was able to build and apparently flash. Unfortunately, still no progress getting the demo to actually run as expected. Here's the output:

rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:3
load:0x3fff0030,len:48
load:0x3fff0060,len:7736
load:0x40078000,len:20212
ho 0 tail 12 room 4
load:0x40080400,len:6448
0x40080400: _init at ??:?

entry 0x400806b0
I (93) boot: ESP-IDF v4.1-dev-1935-g647cb628a-dirty 2nd stage bootloader
I (93) boot: compile time 19:22:30
I (95) boot: chip revision: 1
I (98) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (114) boot.esp32: SPI Speed : 26.7MHz
I (114) boot.esp32: SPI Mode : DIO
I (115) boot.esp32: SPI Flash Size : 4MB
I (120) boot: Enabling RNG early entropy source...
I (125) boot: Partition Table:
I (129) boot: ## Label Usage Type ST Offset Length
I (136) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (144) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (151) boot: 2 factory factory app 00 00 00010000 00100000
I (159) boot: 3 storage Unknown data 01 82 00180000 00100000
I (166) boot: End of partition table
I (171) boot_comm: chip revision: 1, min. application chip revision: 0
I (178) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x0de00 ( 56832) map
I (223) esp_image: segment 1: paddr=0x0001de28 vaddr=0x3ffb0000 size=0x021f0 ( 8688) load
I (229) esp_image: segment 2: paddr=0x00020020 vaddr=0x400d0020 size=0x2f418 (193560) map
0x400d0020: _stext at ??:?

I (353) esp_image: segment 3: paddr=0x0004f440 vaddr=0x3ffb21f0 size=0x03198 ( 12696) load
I (362) esp_image: segment 4: paddr=0x000525e0 vaddr=0x40080000 size=0x00404 ( 1028) load
0x40080000: _WindowOverflow4 at /Users/username/esp/esp-idf/components/freertos/xtensa_vectors.S:1778

I (363) esp_image: segment 5: paddr=0x000529ec vaddr=0x40080404 size=0x10f38 ( 69432) load
E (421) bootloader_flash: bootloader_flash_read dest 0x3ffe3b7e not 4-byte aligned
E (422) esp_image: Checksum failed. Calculated 0x15 read 0x3c
E (425) boot: Factory app partition is not bootable
E (430) boot: No bootable app partitions in the partition table
ets Jun 8 2016 00:22:57