diff --git a/src/bin/cpuville.rs b/src/bin/cpuville.rs
index 7788b83..e5ead07 100644
--- a/src/bin/cpuville.rs
+++ b/src/bin/cpuville.rs
@@ -3,7 +3,7 @@
 http://cpuville.com/Code/CPM-on-a-new-computer.html
 http://cpuville.com/Code/Tiny-BASIC.html
 */
-use std::io::*;
+use std::io::{BufRead, Read, Write, stdin, stdout};
 use std::sync::mpsc;
 use std::sync::mpsc::Receiver;
 use std::sync::mpsc::TryRecvError;
diff --git a/src/bin/simplest.rs b/src/bin/simplest.rs
index 9bbe640..bb9cf2b 100644
--- a/src/bin/simplest.rs
+++ b/src/bin/simplest.rs
@@ -1,4 +1,4 @@
-use iz80::*;
+use iz80::{Cpu, Machine, PlainMachine};
 
 fn main() {
     // Prepare the device
diff --git a/src/bin/simplest8080.rs b/src/bin/simplest8080.rs
index cefdd28..b11fe6b 100644
--- a/src/bin/simplest8080.rs
+++ b/src/bin/simplest8080.rs
@@ -1,4 +1,4 @@
-use iz80::*;
+use iz80::{Cpu, Machine, PlainMachine};
 
 fn main() {
     // Prepare the device
diff --git a/src/cpu.rs b/src/cpu.rs
index 03e241d..de2a4f2 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -1,10 +1,10 @@
-use super::decoder_z80::*;
-use super::decoder_8080::*;
-use super::environment::*;
-use super::machine::*;
-use super::opcode::*;
-use super::registers::*;
-use super::state::*;
+use super::decoder_z80::DecoderZ80;
+use super::decoder_8080::Decoder8080;
+use super::environment::Environment;
+use super::machine::Machine;
+use super::opcode::Opcode;
+use super::registers::{Reg16, Reg8, Registers};
+use super::state::State;
 
 const IRQ_ADDRESS: u16 = 0x0036;
 const NMI_ADDRESS: u16 = 0x0066;
@@ -24,7 +24,7 @@ pub(crate) trait Decoder {
 
 impl Cpu {
 
-    /// Returns a Z80 Cpu instance. Alias of new_z80()
+    /// Returns a Z80 Cpu instance. Alias of `new_z80()`
     pub fn new() -> Cpu {
         Self::new_z80()
     }
@@ -173,19 +173,19 @@ impl Cpu {
     }
 
     /// Maskable interrupt request. It stays signaled until is is
-    /// deactivated by calling signal_interrupt(false).
+    /// deactivated by calling `signal_interrupt(false)`.
     pub fn signal_interrupt(&mut self, active: bool) {
-        self.state.int_signaled = active
+        self.state.int_signaled = active;
     }
 
     /// Non maskable interrupt request
     pub fn signal_nmi(&mut self) {
-        self.state.nmi_pending = true
+        self.state.nmi_pending = true;
     }
 
     /// Signal reset
     pub fn signal_reset(&mut self) {
-        self.state.reset_pending = true
+        self.state.reset_pending = true;
     }
 
     /// Returns the current cycle count
diff --git a/src/decoder_z80.rs b/src/decoder_z80.rs
index 6e75526..d2a21e6 100644
--- a/src/decoder_z80.rs
+++ b/src/decoder_z80.rs
@@ -33,11 +33,11 @@ impl Decoder for DecoderZ80 {
             if code == 0xdd {
                 // DD prefix
                 env.set_index(Reg16::IX);
-                code = env.advance_pc()
+                code = env.advance_pc();
             } else {
                 // FD prefix
                 env.set_index(Reg16::IY);
-                code = env.advance_pc()
+                code = env.advance_pc();
             }
         }
         
diff --git a/src/environment.rs b/src/environment.rs
index 87344d0..14ce83e 100644
--- a/src/environment.rs
+++ b/src/environment.rs
@@ -1,6 +1,6 @@
-use super::machine::*;
+use super::machine::Machine;
 use super::opcode::Opcode;
-use super::registers::*;
+use super::registers::{Reg16, Reg8};
 use super::state::State;
 
 pub struct Environment<'a> {
diff --git a/src/machine.rs b/src/machine.rs
index 2f902c0..00cf4fa 100644
--- a/src/machine.rs
+++ b/src/machine.rs
@@ -2,7 +2,7 @@
 /// 
 /// The device hosting the CPU has to provide implementations
 /// of the memory and port access. A simple implementation is
-/// provided with PlainMachine
+/// provided with `PlainMachine`
 pub trait Machine {
     /// Returns the memory contents in [address]
     fn peek(&self, address: u16) -> u8;
@@ -40,7 +40,7 @@ pub struct PlainMachine {
 }
 
 impl PlainMachine {
-    /// Returns a new PlainMachine instance
+    /// Returns a new `PlainMachine` instance
     pub fn new() -> PlainMachine {
         PlainMachine {
             mem: [0; 65536],
diff --git a/src/opcode.rs b/src/opcode.rs
index 4a74ccb..ad539b6 100644
--- a/src/opcode.rs
+++ b/src/opcode.rs
@@ -1,5 +1,5 @@
-use super::environment::*;
-use super::registers::*;
+use super::environment::Environment;
+use super::registers::Reg16;
 
 type OpcodeFn = dyn Fn(&mut Environment);
 
@@ -35,18 +35,18 @@ impl Opcode {
         if self.name.contains("nn") {
             // Immediate argument 16 bits
             let nn = env.peek16_pc();
-            let nn_str = format!("{:04x}h", nn);
+            let nn_str = format!("{nn:04x}h");
             name.replace("nn", &nn_str)
         } else if self.name.contains('n') {
             // Immediate argument 8 bits
             let n = env.peek_pc();
-            let n_str = format!("{:02x}h", n);
+            let n_str = format!("{n:02x}h");
             name.replace('n', &n_str)
         } else if self.name.contains('d') {
             // Immediate argument 8 bits signed
             // In assembly it's shown with 2 added as if it were from the opcode pc.
             let d = env.peek_pc() as i8 as i16 + 2;
-            let d_str = format!("{:+x}", d);
+            let d_str = format!("{d:+x}");
             name.replace('d', &d_str)
         } else {
             name
diff --git a/src/opcode_alu.rs b/src/opcode_alu.rs
index 2978915..20c049f 100644
--- a/src/opcode_alu.rs
+++ b/src/opcode_alu.rs
@@ -1,13 +1,13 @@
-use super::opcode::*;
-use super::environment::*;
-use super::registers::*;
-use super::operators::*;
+use super::opcode::Opcode;
+use super::environment::Environment;
+use super::registers::{Flag, Reg16, Reg8};
+use super::operators::{Operator, operator_cp};
 
 pub fn build_operator_a_r(r: Reg8, (op, name): (Operator, &str)) -> Opcode {
     if r != Reg8::_HL && r != Reg8::H && r != Reg8::L {
         // Fast version
         Opcode::new(
-            format!("{} A, {}", name, r),
+            format!("{name} A, {r}"),
             move |env: &mut Environment| {
                 let a = env.state.reg.a();
                 let b = env.state.reg.get8(r);
@@ -17,7 +17,7 @@ pub fn build_operator_a_r(r: Reg8, (op, name): (Operator, &str)) -> Opcode {
         )
     } else {
         Opcode::new(
-            format!("{} A, {}", name, r),
+            format!("{name} A, {r}"),
             move |env: &mut Environment| {
                 let a = env.state.reg.a();
                 let b = env.reg8_ext(r);
@@ -31,7 +31,7 @@ pub fn build_operator_a_r(r: Reg8, (op, name): (Operator, &str)) -> Opcode {
 
 pub fn build_operator_a_n((op, name): (Operator, &str)) -> Opcode {
     Opcode::new(
-        format!("{} A, n", name),
+        format!("{name} A, n"),
         move |env: &mut Environment| {
             let a = env.state.reg.a();
             let b = env.advance_pc();
@@ -44,7 +44,7 @@ pub fn build_operator_a_n((op, name): (Operator, &str)) -> Opcode {
 
 pub fn build_cp_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Opcode {
     Opcode::new(
-        format!("CP{}", postfix),
+        format!("CP{postfix}"),
         move |env: &mut Environment| {
             let a = env.state.reg.a();
             let b = env.reg8_ext(Reg8::_HL);
diff --git a/src/opcode_arith.rs b/src/opcode_arith.rs
index bb62aa2..d2dd910 100644
--- a/src/opcode_arith.rs
+++ b/src/opcode_arith.rs
@@ -1,12 +1,12 @@
-use super::opcode::*;
-use super::environment::*;
+use super::opcode::Opcode;
+use super::environment::Environment;
 use super::operators::*;
-use super::registers::*;
+use super::registers::{Flag, Reg16, Reg8};
 
 // 16 bit ADD opcodes
 pub fn build_add_hl_rr(rr: Reg16) -> Opcode {
     Opcode::new(
-        format!("ADD HL, {:?}", rr),
+        format!("ADD HL, {rr:?}"),
         move |env: &mut Environment| {
             let aa = env.index_value();
             let bb = env.reg16_ext(rr);
@@ -18,7 +18,7 @@ pub fn build_add_hl_rr(rr: Reg16) -> Opcode {
 
 pub fn build_adc_hl_rr(rr: Reg16) -> Opcode {
     Opcode::new(
-        format!("ADC HL, {:?}", rr),
+        format!("ADC HL, {rr:?}"),
         move |env: &mut Environment| {
             let aa = env.index_value(); // This will always be HL.
             let bb = env.reg16_ext(rr);
@@ -30,7 +30,7 @@ pub fn build_adc_hl_rr(rr: Reg16) -> Opcode {
 
 pub fn build_sbc_hl_rr(rr: Reg16) -> Opcode {
     Opcode::new(
-        format!("SBC HL, {:?}", rr),
+        format!("SBC HL, {rr:?}"),
         move |env: &mut Environment| {
             let aa = env.index_value(); // This will always be HL.
             let bb = env.reg16_ext(rr);
@@ -44,7 +44,7 @@ pub fn build_sbc_hl_rr(rr: Reg16) -> Opcode {
 // INC, DEC opcodes
 pub fn build_inc_r(r: Reg8) -> Opcode {
     Opcode::new(
-        format!("INC {}", r),
+        format!("INC {r}"),
         move |env: &mut Environment| {
             let a = env.reg8_ext(r);
             let v = operator_inc(env, a);
@@ -55,7 +55,7 @@ pub fn build_inc_r(r: Reg8) -> Opcode {
 
 pub fn build_dec_r(r: Reg8) -> Opcode {
     Opcode::new(
-        format!("DEC {}", r),
+        format!("DEC {r}"),
         move |env: &mut Environment| {
             let a = env.reg8_ext(r);
             let v = operator_dec(env, a);
@@ -68,7 +68,7 @@ pub fn build_inc_dec_rr(rr: Reg16, inc: bool) -> Opcode {
     let delta = if inc {1} else {-1_i16 as u16};
     let mnemonic = if inc {"INC"} else {"DEC"};
     Opcode::new(
-        format!("{} {:?}", mnemonic, rr),
+        format!("{mnemonic} {rr:?}"),
         move |env: &mut Environment| {
             let mut v = env.reg16_ext(rr);
             v = v.wrapping_add(delta);
diff --git a/src/opcode_bits.rs b/src/opcode_bits.rs
index a974ef9..d99b13f 100644
--- a/src/opcode_bits.rs
+++ b/src/opcode_bits.rs
@@ -1,6 +1,6 @@
-use super::opcode::*;
-use super::environment::*;
-use super::registers::*;
+use super::opcode::Opcode;
+use super::environment::Environment;
+use super::registers::{Flag, Reg8};
 
 #[derive(Copy, Clone)]
 pub enum ShiftMode {
@@ -18,10 +18,10 @@ pub enum ShiftDir {
 
 pub fn build_rot_r(r: Reg8, (dir, mode, name): (ShiftDir, ShiftMode, &str), fast: bool, indexed: bool) -> Opcode {
     let full_name = if indexed {
-        format!("LD {}, {} {}", r, name, Reg8::_HL)
+        format!("LD {r}, {name} {}", Reg8::_HL)
     } else {
         let separator = if fast {""} else {" "};
-        format!("{}{}{}", name, separator, r)
+        format!("{name}{separator}{r}")
     };
 
     Opcode::new(
@@ -82,7 +82,7 @@ pub fn build_rot_r(r: Reg8, (dir, mode, name): (ShiftDir, ShiftMode, &str), fast
 
 pub fn build_bit_r(n: u8, r: Reg8) -> Opcode {
     Opcode::new(
-        format!("BIT {}, {}", n, r),
+        format!("BIT {n}, {r}"),
         move |env: &mut Environment| {
             let v = env.reg8_ext(r);
             let z = v & (1<<n);
@@ -120,7 +120,7 @@ pub fn build_bit_r(n: u8, r: Reg8) -> Opcode {
 pub fn build_set_res_r(bit: u8, r: Reg8, value: bool) -> Opcode {
     let name = if value {"SET"} else {"RES"};
     Opcode::new(
-        format!("{} {}, {}", name, bit, r),
+        format!("{name} {bit}, {r}"),
         move |env: &mut Environment| {
             let mut v = env.reg8_ext(r);
             if value {
diff --git a/src/opcode_io.rs b/src/opcode_io.rs
index 061f445..a98f35a 100644
--- a/src/opcode_io.rs
+++ b/src/opcode_io.rs
@@ -1,6 +1,6 @@
-use super::opcode::*;
-use super::environment::*;
-use super::registers::*;
+use super::opcode::Opcode;
+use super::environment::Environment;
+use super::registers::{Reg16, Reg8};
 
 /*
     From "The undocumented Z80 documented" TUZD-4.4:
@@ -17,7 +17,7 @@ instructions before.
 
 pub fn build_out_c_r(r: Reg8) -> Opcode {
     Opcode::new(
-        format!("OUT (C), {}", r),
+        format!("OUT (C), {r}"),
         move |env: &mut Environment| {
             let address = env.state.reg.get16(Reg16::BC);
             let value = env.state.reg.get8(r);
@@ -49,7 +49,7 @@ pub fn build_out_n_a() -> Opcode {
 
 pub fn build_in_r_c(r: Reg8) -> Opcode {
     Opcode::new(
-        format!("IN {}, (C)", r),
+        format!("IN {r}, (C)"),
         move |env: &mut Environment| {
             let address = env.state.reg.get16(Reg16::BC);
             let value = env.port_in(address);
@@ -91,7 +91,7 @@ instructions before.
 
 pub fn build_in_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Opcode {
     Opcode::new(
-        format!("IN{}", postfix),
+        format!("IN{postfix}"),
         move |env: &mut Environment| {
             // The INI/INIR/IND/INDR instructions use BC after decrementing B
             let b = env.state.reg.inc_dec8(Reg8::B, false /* decrement */);
@@ -120,7 +120,7 @@ pub fn build_in_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Op
 pub fn build_out_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Opcode {
     let n0 = if repeat {"OT"} else {"OUT"};
     Opcode::new(
-        format!("{}{}", n0, postfix),
+        format!("{n0}{postfix}"),
         move |env: &mut Environment| {
             // the OUTI/OTIR/OUTD/OTDR instructions use BC before decrementing B
             let address = env.state.reg.get16(Reg16::BC);
diff --git a/src/opcode_jumps.rs b/src/opcode_jumps.rs
index d2781aa..dfc12b8 100644
--- a/src/opcode_jumps.rs
+++ b/src/opcode_jumps.rs
@@ -1,6 +1,6 @@
-use super::opcode::*;
-use super::environment::*;
-use super::registers::*;
+use super::opcode::Opcode;
+use super::environment::Environment;
+use super::registers::{Flag, Reg8};
 
 // Relative jumps
 pub fn build_djnz() -> Opcode {
@@ -31,7 +31,7 @@ pub fn build_jr_unconditional() -> Opcode {
 
 pub fn build_jr_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
     Opcode::new(
-        format!("JR {}, d", name),
+        format!("JR {name}, d"),
         move |env: &mut Environment| {
             let offset = env.advance_pc();
             if env.state.reg.get_flag(flag) == value {
@@ -62,7 +62,7 @@ pub fn build_jp_unconditional() -> Opcode {
 
 pub fn build_jp_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
     Opcode::new(
-        format!("JP {}, nn", name),
+        format!("JP {name}, nn"),
         move |env: &mut Environment| {
             let address = env.advance_immediate16();
             if env.state.reg.get_flag(flag) == value {
@@ -97,7 +97,7 @@ pub fn build_call() -> Opcode {
 
 pub fn build_call_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
     Opcode::new(
-        format!("CALL {}, nn", name),
+        format!("CALL {name}, nn"),
         move |env: &mut Environment| {
             let address = env.advance_immediate16();
             if env.state.reg.get_flag(flag) == value {
@@ -110,7 +110,7 @@ pub fn build_call_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
 
 pub fn build_rst(d: u8) -> Opcode {
     Opcode::new(
-        format!("RST {:02x}h", d),
+        format!("RST {d:02x}h"),
         move |env: &mut Environment| {
             let address = d as u16;
             env.subroutine_call(address);
@@ -150,7 +150,7 @@ pub fn build_retn() -> Opcode {
 
 pub fn build_ret_eq((flag, value, name): (Flag, bool, &str)) -> Opcode {
     Opcode::new(
-        format!("RET {}", name),
+        format!("RET {name}"),
         move |env: &mut Environment| {
             if env.state.reg.get_flag(flag) == value {
                 env.set_branch_taken();
diff --git a/src/opcode_ld.rs b/src/opcode_ld.rs
index b58e6d5..5b6dfbc 100644
--- a/src/opcode_ld.rs
+++ b/src/opcode_ld.rs
@@ -1,6 +1,6 @@
-use super::opcode::*;
-use super::environment::*;
-use super::registers::*;
+use super::opcode::Opcode;
+use super::environment::Environment;
+use super::registers::{Flag, Reg16, Reg8};
 
 /*
     Load: http://z80-heaven.wikidot.com/instructions-set:ld
@@ -56,7 +56,7 @@ pub fn build_ld_r_r(dst: Reg8, src: Reg8, _special: bool) -> Opcode {
             && src != Reg8::L && dst != Reg8::L {
         // Faster version
         Opcode::new(
-            format!("LD {}, {}", dst, src),
+            format!("LD {dst}, {src}"),
             move |env: &mut Environment| {
                 let value = env.state.reg.get8(src);
                 env.state.reg.set8(dst, value);
@@ -69,7 +69,7 @@ pub fn build_ld_r_r(dst: Reg8, src: Reg8, _special: bool) -> Opcode {
     } else {
         // Full version
         Opcode::new(
-            format!("LD {}, {}", dst, src),
+            format!("LD {dst}, {src}"),
             move |env: &mut Environment| {
                 /*
                 If the next opcode makes use of (HL), it will be replaced by (IX+d), and any other
@@ -93,7 +93,7 @@ pub fn build_ld_r_r(dst: Reg8, src: Reg8, _special: bool) -> Opcode {
 
 pub fn build_ld_r_n(r: Reg8) -> Opcode {
     Opcode::new(
-        format!("LD {}, n", r),
+        format!("LD {r}, n"),
         move |env: &mut Environment| {
             let value = env.advance_pc();
             env.set_reg(r, value);
@@ -104,7 +104,7 @@ pub fn build_ld_r_n(r: Reg8) -> Opcode {
 pub fn build_ld_a_prr(rr: Reg16) -> Opcode {
     // rr can be only BC or DE
     Opcode::new(
-        format!("LD A, ({:?})", rr),
+        format!("LD A, ({rr:?})"),
         move |env: &mut Environment| {
             let address = env.state.reg.get16(rr);
             let value = env.sys.peek(address);
@@ -127,7 +127,7 @@ pub fn build_ld_a_pnn() -> Opcode {
 pub fn build_ld_prr_a(rr: Reg16) -> Opcode {
     // rr can be only BC or DE
     Opcode::new(
-        format!("LD ({:?}), A", rr),
+        format!("LD ({rr:?}), A"),
         move |env: &mut Environment| {
             let value = env.state.reg.a();
             let address = env.state.reg.get16(rr);
@@ -151,7 +151,7 @@ pub fn build_ld_pnn_a() -> Opcode {
 // 16 bit load
 pub fn build_ld_rr_nn(rr: Reg16) -> Opcode {
     Opcode::new(
-        format!("LD {:?}, nn", rr),
+        format!("LD {rr:?}, nn"),
         move |env: &mut Environment| {
             let value = env.advance_immediate16();
             env.set_reg16(rr, value);
@@ -171,7 +171,7 @@ pub fn build_ld_sp_hl() -> Opcode {
 
 pub fn build_ld_pnn_rr(rr: Reg16, _fast: bool) -> Opcode {
     Opcode::new(
-        format!("LD (nn), {:?}", rr),
+        format!("LD (nn), {rr:?}"),
         move |env: &mut Environment| {
             let address = env.advance_immediate16();
             let value = env.reg16_ext(rr);
@@ -182,7 +182,7 @@ pub fn build_ld_pnn_rr(rr: Reg16, _fast: bool) -> Opcode {
 
 pub fn build_ld_rr_pnn(rr: Reg16, _fast: bool) -> Opcode {
     Opcode::new(
-        format!("LD {:?}, (nn)", rr),
+        format!("LD {rr:?}, (nn)"),
         move |env: &mut Environment| {
             let address = env.advance_immediate16();
             let value = env.sys.peek16(address);
@@ -237,7 +237,7 @@ pub fn build_ex_psp_hl() -> Opcode {
 
 pub fn build_ld_block((inc, repeat, postfix) : (bool, bool, &'static str)) -> Opcode {
     Opcode::new(
-        format!("LD{}", postfix),
+        format!("LD{postfix}"),
         move |env: &mut Environment| {
             let value = env.reg8_ext(Reg8::_HL);
             let address = env.state.reg.get16(Reg16::DE);
diff --git a/src/operators.rs b/src/operators.rs
index b8a06e8..482a235 100644
--- a/src/operators.rs
+++ b/src/operators.rs
@@ -1,5 +1,5 @@
-use super::environment::*;
-use super::registers::*;
+use super::environment::Environment;
+use super::registers::Flag;
 
 pub type Operator = fn(&mut Environment, u8, u8) -> u8;
 
diff --git a/src/registers.rs b/src/registers.rs
index 20c6843..024e54a 100644
--- a/src/registers.rs
+++ b/src/registers.rs
@@ -152,18 +152,14 @@ impl Registers {
     /// Returns the value of an 8 bit register
     #[inline]
     pub fn get8(&self, reg: Reg8) -> u8 {
-        if reg == Reg8::_HL {
-            panic!("Can't use the pseudo register (HL)");
-        }
+        assert!(!(reg == Reg8::_HL), "Can't use the pseudo register (HL)");
         self.data[reg as usize]
     }
 
     /// Sets the value of an 8 bit register
     #[inline]
     pub fn set8(&mut self, reg: Reg8, value: u8) {
-        if reg == Reg8::_HL {
-            panic!("Can't use the pseudo register (HL)");
-        }
+        assert!(!(reg == Reg8::_HL), "Can't use the pseudo register (HL)");
         self.data[reg as usize] = value;
     }
 
@@ -367,7 +363,7 @@ impl Registers {
     }
 
     pub(crate) fn update_p_flag_with_iff2(&mut self) {
-        self.put_flag(Flag::P, self.iff2)
+        self.put_flag(Flag::P, self.iff2);
     }
 
     /// Returns the program counter
@@ -434,12 +430,12 @@ mod tests {
         let mut r = Registers::new();
  
         r.set_flag(Flag::P);
-        assert_eq!(true, r.get_flag(Flag::P));
+        assert!(r.get_flag(Flag::P));
         r.clear_flag(Flag::P);
-        assert_eq!(false, r.get_flag(Flag::P));
+        assert!(!r.get_flag(Flag::P));
         r.put_flag(Flag::P, true);
-        assert_eq!(true, r.get_flag(Flag::P));
+        assert!(r.get_flag(Flag::P));
         r.put_flag(Flag::P, false);
-        assert_eq!(false, r.get_flag(Flag::P));
+        assert!(!r.get_flag(Flag::P));
     }
 }
\ No newline at end of file
diff --git a/src/state.rs b/src/state.rs
index bbe83e3..cb0e2c5 100644
--- a/src/state.rs
+++ b/src/state.rs
@@ -1,4 +1,4 @@
-use super::registers::*;
+use super::registers::{Reg16, Registers};
 
 /// Internal state of the CPU
 /// 
diff --git a/src/timed_runner.rs b/src/timed_runner.rs
index 12bf116..e4328b4 100644
--- a/src/timed_runner.rs
+++ b/src/timed_runner.rs
@@ -27,7 +27,7 @@ impl Default for TimedRunner {
 }
 
 impl TimedRunner {
-        /// Define a new CPU speed in MHz
+    /// Define a new CPU speed in `MHz`
     pub fn set_mhz(&mut self, cpu: &Cpu, mhz: f64, quantum_cycles: u64) {
         self.mhz = mhz;
         self.quantum_cycles = quantum_cycles;
diff --git a/tests/cputest.rs b/tests/cputest.rs
index 4305f62..298dbf7 100644
--- a/tests/cputest.rs
+++ b/tests/cputest.rs
@@ -2,7 +2,7 @@ use iz80::*;
 
 // Diagnostics II, version 1.2, CPU test by Supersoft Associates
 
-static CODE: &'static [u8] = include_bytes!("res/CPUTEST.COM");
+static CODE: &[u8] = include_bytes!("res/CPUTEST.COM");
 
 #[test]
 fn test_cpu_test_8080() {
@@ -51,7 +51,7 @@ fn cpu_test(mut cpu: Cpu) {
         }
 
         if cpu.registers().pc() == 0x0000 {
-            println!("");
+            println!();
             break;
         }
 
@@ -60,7 +60,7 @@ fn cpu_test(mut cpu: Cpu) {
                 2 => {
                     // C_WRITE
                     let ch = cpu.registers().get8(Reg8::E) as char;
-                    print!("{}", ch);
+                    print!("{ch}");
                     msg.push(ch);
                 },
                 _ => panic!("BDOS command not implemented")
@@ -68,5 +68,5 @@ fn cpu_test(mut cpu: Cpu) {
         }
     }
 
-    assert_eq!(true, msg.contains("CPU TESTS OK"));
+    assert!(msg.contains("CPU TESTS OK"));
 }
\ No newline at end of file
diff --git a/tests/ex8080.rs b/tests/ex8080.rs
index fcce831..f2148a9 100644
--- a/tests/ex8080.rs
+++ b/tests/ex8080.rs
@@ -4,7 +4,7 @@ use iz80::*;
 8080/8085 CPU Exerciser by Ian Bartholomew and Frank Cringles
 */
 
-static CODE: &'static [u8] = include_bytes!("res/8080EX1.COM");
+static CODE: &[u8] = include_bytes!("res/8080EX1.COM");
 
 #[test]
 #[ignore]
@@ -51,16 +51,16 @@ fn test_ex8080() {
 
         if trace && false {
             // Test state
-            let addr = 0x1d80 as u16;
-            print!("Zex state 0x{:04x}: ", addr);
+            let addr = 0x1d80_u16;
+            print!("Zex state 0x{addr:04x}: ");
             for i in 0..0x10 {
                 print!("{:02x} ", machine.peek(addr + i));
             }
-            println!("");
+            println!();
         }
 
         if cpu.registers().pc() == 0x0000 {
-            println!("");
+            println!();
             break;
         }
 
@@ -86,7 +86,7 @@ fn test_ex8080() {
                     if msg.contains("OK") {
                         tests_passed += 1;
                     }
-                    print!("{}", msg);
+                    print!("{msg}");
                 },
                 _ => panic!("BDOS command not implemented")
             }
diff --git a/tests/opcodes_alu.rs b/tests/opcodes_alu.rs
index a680e7d..91a03a1 100644
--- a/tests/opcodes_alu.rs
+++ b/tests/opcodes_alu.rs
@@ -12,7 +12,7 @@ fn test_cp_a() {
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(false, cpu.registers().get_flag(Flag::H));
+    assert!(!cpu.registers().get_flag(Flag::H));
 }
 
 #[test]
@@ -27,5 +27,5 @@ fn test_cp_a_2() {
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(true, cpu.registers().get_flag(Flag::H));
+    assert!(cpu.registers().get_flag(Flag::H));
 }
diff --git a/tests/opcodes_bits.rs b/tests/opcodes_bits.rs
index 153e23e..2767fa3 100644
--- a/tests/opcodes_bits.rs
+++ b/tests/opcodes_bits.rs
@@ -6,13 +6,13 @@ fn test_rrca_fast() {
     let mut cpu = Cpu::new();
 
     sys.poke(0x0000, 0x0f); // RRCA
-    cpu.registers().set_a(0b10010011);
+    cpu.registers().set_a(0b1001_0011);
     cpu.registers().set_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b11001001, cpu.registers().a());
-    assert_eq!(true, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b1100_1001, cpu.registers().a());
+    assert!(cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -22,13 +22,13 @@ fn test_rrc_a() {
 
     sys.poke(0x0000, 0xcb); // RRC A
     sys.poke(0x0001, 0x0f);
-    cpu.registers().set_a(0b10010011);
+    cpu.registers().set_a(0b1001_0011);
     cpu.registers().set_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b11001001, cpu.registers().a());
-    assert_eq!(true, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b1100_1001, cpu.registers().a());
+    assert!(cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -38,13 +38,13 @@ fn test_rr_b() {
 
     sys.poke(0x0000, 0xcb); // RR B
     sys.poke(0x0001, 0x18);
-    cpu.registers().set8(Reg8::B, 0b10010010);
+    cpu.registers().set8(Reg8::B, 0b1001_0010);
     cpu.registers().set_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b11001001, cpu.registers().get8(Reg8::B));
-    assert_eq!(false, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b1100_1001, cpu.registers().get8(Reg8::B));
+    assert!(!cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -54,13 +54,13 @@ fn test_sra_c() {
 
     sys.poke(0x0000, 0xcb); // SRA C
     sys.poke(0x0001, 0x29);
-    cpu.registers().set8(Reg8::C, 0b10010011);
+    cpu.registers().set8(Reg8::C, 0b1001_0011);
     cpu.registers().clear_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b11001001, cpu.registers().get8(Reg8::C));
-    assert_eq!(true, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b1100_1001, cpu.registers().get8(Reg8::C));
+    assert!(cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -70,13 +70,13 @@ fn test_srl_d() {
 
     sys.poke(0x0000, 0xcb); // SRL D
     sys.poke(0x0001, 0x3a);
-    cpu.registers().set8(Reg8::D, 0b10010011);
+    cpu.registers().set8(Reg8::D, 0b1001_0011);
     cpu.registers().clear_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b01001001, cpu.registers().get8(Reg8::D));
-    assert_eq!(true, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b0100_1001, cpu.registers().get8(Reg8::D));
+    assert!(cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -86,13 +86,13 @@ fn test_rlc_a() {
 
     sys.poke(0x0000, 0xcb); // RLC A
     sys.poke(0x0001, 0x07);
-    cpu.registers().set_a(0b00010011);
+    cpu.registers().set_a(0b0001_0011);
     cpu.registers().set_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b00100110, cpu.registers().a());
-    assert_eq!(false, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b0010_0110, cpu.registers().a());
+    assert!(!cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -102,13 +102,13 @@ fn test_rl_b() {
 
     sys.poke(0x0000, 0xcb); // RL B
     sys.poke(0x0001, 0x10);
-    cpu.registers().set8(Reg8::B, 0b00010011);
+    cpu.registers().set8(Reg8::B, 0b0001_0011);
     cpu.registers().set_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b00100111, cpu.registers().get8(Reg8::B));
-    assert_eq!(false, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b0010_0111, cpu.registers().get8(Reg8::B));
+    assert!(!cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -118,13 +118,13 @@ fn test_sla_c() {
 
     sys.poke(0x0000, 0xcb); // SLA C
     sys.poke(0x0001, 0x21);
-    cpu.registers().set8(Reg8::C, 0b10010011);
+    cpu.registers().set8(Reg8::C, 0b1001_0011);
     cpu.registers().clear_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b00100110, cpu.registers().get8(Reg8::C));
-    assert_eq!(true, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b0010_0110, cpu.registers().get8(Reg8::C));
+    assert!(cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -134,13 +134,13 @@ fn test_sll_d() {
 
     sys.poke(0x0000, 0xcb); // SLL D
     sys.poke(0x0001, 0x32);
-    cpu.registers().set8(Reg8::D, 0b10010011);
+    cpu.registers().set8(Reg8::D, 0b1001_0011);
     cpu.registers().clear_flag(Flag::C);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b00100111, cpu.registers().get8(Reg8::D));
-    assert_eq!(true, cpu.registers().get_flag(Flag::C));
+    assert_eq!(0b0010_0111, cpu.registers().get8(Reg8::D));
+    assert!(cpu.registers().get_flag(Flag::C));
 }
 
 #[test]
@@ -150,13 +150,13 @@ fn test_bit_a() {
 
     sys.poke(0x0000, 0xcb); // BIT 1, A
     sys.poke(0x0001, 0x4f);
-    cpu.registers().set_a(0b00010010);
+    cpu.registers().set_a(0b0001_0010);
     cpu.registers().set_flag(Flag::Z);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b00010010, cpu.registers().a());
-    assert_eq!(false, cpu.registers().get_flag(Flag::Z));
+    assert_eq!(0b0001_0010, cpu.registers().a());
+    assert!(!cpu.registers().get_flag(Flag::Z));
 }
 
 #[test]
@@ -166,13 +166,13 @@ fn test_set_b() {
 
     sys.poke(0x0000, 0xcb); // SET 0, B
     sys.poke(0x0001, 0xc0);
-    cpu.registers().set8(Reg8::B, 0b00010010);
+    cpu.registers().set8(Reg8::B, 0b0001_0010);
     cpu.registers().clear_flag(Flag::Z);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b00010011, cpu.registers().get8(Reg8::B));
-    assert_eq!(false, cpu.registers().get_flag(Flag::Z));
+    assert_eq!(0b0001_0011, cpu.registers().get8(Reg8::B));
+    assert!(!cpu.registers().get_flag(Flag::Z));
 }
 
 #[test]
@@ -182,13 +182,13 @@ fn test_res_c() {
 
     sys.poke(0x0000, 0xcb); // RES 7, C
     sys.poke(0x0001, 0xb9);
-    cpu.registers().set8(Reg8::C, 0b10010011);
+    cpu.registers().set8(Reg8::C, 0b1001_0011);
     cpu.registers().clear_flag(Flag::Z);
 
     cpu.execute_instruction(&mut sys);
 
-    assert_eq!(0b00010011, cpu.registers().get8(Reg8::C));
-    assert_eq!(false, cpu.registers().get_flag(Flag::Z));
+    assert_eq!(0b0001_0011, cpu.registers().get8(Reg8::C));
+    assert!(!cpu.registers().get_flag(Flag::Z));
 }
 
 #[test]
diff --git a/tests/z80test.rs b/tests/z80test.rs
index 8511bcb..59273ef 100644
--- a/tests/z80test.rs
+++ b/tests/z80test.rs
@@ -3,12 +3,12 @@ use iz80::*;
 // From https://github.com/raxoft/z80test
 // Not passing
 
-//static CODE: &'static [u8] = include_bytes!("res/z80doc.out");
-//static CODE: &'static [u8] = include_bytes!("res/z80ccf.out");
-//static CODE: &'static [u8] = include_bytes!("res/z80docflags.out");
-//static CODE: &'static [u8] = include_bytes!("res/z80flags.out");
-//static CODE: &'static [u8] = include_bytes!("res/z80memptr.out");
-static CODE: &'static [u8] = include_bytes!("res/z80full.out");
+//static CODE: &[u8] = include_bytes!("res/z80doc.out");
+//static CODE: &[u8] = include_bytes!("res/z80ccf.out");
+//static CODE: &[u8] = include_bytes!("res/z80docflags.out");
+//static CODE: &[u8] = include_bytes!("res/z80flags.out");
+//static CODE: &[u8] = include_bytes!("res/z80memptr.out");
+static CODE: &[u8] = include_bytes!("res/z80full.out");
 
 const START: u16 = 0x8000;
 
@@ -35,9 +35,9 @@ fn z80test() {
     if run_single_test {
         machine.poke16(0x802b, single_test); // ld bc, 0 to ld bc, test
         let mut test_start = machine.peek16(0x802e);
-        println!("Test table {:x}", test_start);
+        println!("Test table {test_start:x}");
         test_start += single_test*2;
-        println!("Test table {:x}", test_start);
+        println!("Test table {test_start:x}");
         machine.poke16(0x802e, test_start); // Move start
         machine.poke16(test_start + 2 , 0); // NUL terminate test
     }
@@ -50,24 +50,24 @@ fn z80test() {
         cpu.execute_instruction(&mut machine);
 
         if cpu.registers().pc() == 0x0000 {
-            println!("");
+            println!();
             break;
         }
 
         if cpu.registers().pc() == 0x0010 {
             let mut ch = cpu.registers().get8(Reg8::A) as char;
             if ch == '\r' {
-                ch = '\n'
+                ch = '\n';
             } else if ch as u8 == 23 {
-                ch = ' '
+                ch = ' ';
             } else if ch as u8 == 26 {
-                ch = ' '
+                ch = ' ';
             } 
             //print!("{}[{}]", ch, ch as u8);
-            print!("{}", ch);
+            print!("{ch}");
             msg.push(ch);
         }
     }
 
-    assert_eq!(true, msg.contains("CPU TESTS OK"));
+    assert!(msg.contains("CPU TESTS OK"));
 }
\ No newline at end of file
diff --git a/tests/zexall.rs b/tests/zexall.rs
index 1d3acd2..29804c4 100644
--- a/tests/zexall.rs
+++ b/tests/zexall.rs
@@ -1,7 +1,7 @@
 use iz80::*;
 
-//static ZEXDOC: &'static [u8] = include_bytes!("res/zexdoc.com");
-static ZEXALL: &'static [u8] = include_bytes!("res/zexall.com");
+//static ZEXDOC: &[u8] = include_bytes!("res/zexdoc.com");
+static ZEXALL: &[u8] = include_bytes!("res/zexall.com");
 
 #[test]
 #[ignore]
@@ -49,16 +49,16 @@ fn test_zexall() {
 
         if trace {
             // Test state
-            let addr = 0x1d80 as u16;
-            print!("Zex state 0x{:04x}: ", addr);
+            let addr = 0x1d80_u16;
+            print!("Zex state 0x{addr:04x}: ");
             for i in 0..0x10 {
                 print!("{:02x} ", machine.peek(addr + i));
             }
-            println!("");
+            println!();
         }
 
         if cpu.registers().pc() == 0x0000 {
-            println!("");
+            println!();
             break;
         }
 
@@ -84,7 +84,7 @@ fn test_zexall() {
                     if msg.contains("OK") {
                         tests_passed += 1;
                     }
-                    print!("{}", msg);
+                    print!("{msg}");
                 },
                 _ => panic!("BDOS command not implemented")
             }