Elkhart Lake Unsupported

[andkae]

Hello Intel,

the tool looks really nice. But when i try to run it on my Intel Atom Elkhart Lake machine i receive following output:

=====  Processor information  =====
Linux arch_perfmon flag  : yes
Hybrid processor         : no
IBRS and IBPB supported  : yes
STIBP supported          : yes
Spec arch caps supported : yes
Max CPUID level          : 27
CPU model number         : 150
Error: unsupported processor. Only Intel(R) processors are supported (Atom(R) and microarchitecture codename Nehalem/Nehalem-EP, Atom(tm), Westmere/Clarkdale, Sandy Bridge, Westmere-EP, Sandy Bridge-EP/Jaketown, Nehalem-EX, Westmere-EX, unknown, Centerton, Baytrail, Ivy Bridge, Haswell, Broadwell, Ivy Bridge-EP/EN/EX/Ivytown, Haswell-EP/EN/EX, Cherrytrail, Avoton, Skylake U/Y, Broadwell-EP/EX, Skylake-SP, Cascade Lake-SP, Broadwell-DE, Knights Landing, Apollo Lake, Skylake, Denverton, Icelake-SP, Gemini Lake, Icelake, Snowridge, Tiger Lake, Kabylake/Whiskey Lake, Sapphire Rapids-SP, Alder Lake, Kabylake, Comet Lake, Rocket Lake, Meteor Lake, Granite Rapids-SP, Sierra Forest, Raptor Lake, Lunar Lake, Emerald Rapids-SP). CPU model number: 150 Brand: "Intel Atom(R) x6414RE Processor @ 1.50GHz"
Access to Intel(r) Performance Counter Monitor has denied (no MSR or PCI CFG space access).

Is the Elkhart Lake unsupported by this tool?

Thanks for your help.

BR,
Andreas

[rdementi]

Hi Andreas, unfortunately we do not support Elkhart Lake in pcm yet.

[andkae]

Hi @rdementi,

thanks for the clarification.

Do you have a raw guess what is needed to add support to this tool? Is there an guide available how to add the a new processor? In general is the processor appending driven by Intel or the community?

Thanks for your help.

BR,
Andreas

[rdementi]

Hi Andreas,

I see that Elkhart Lake has only core events: https://github.com/intel/perfmon/tree/main/EHL/events therefore the tools/feature support will be limited in PCM, similar to Apollo Lake.

Usually the new processor support is added by Intel employees. This case is more difficult because I don't have access to Elkhart Lake. I prepared a debug change re-using some of the Snowridge code because Elkhart Lake has the same Tremont core:
https://github.com/intel/pcm/tree/EHL-debug

Could you please try it and let me know if the pcm utility works?

[andkae]

Hi @rdementi,

the branch https://github.com/intel/pcm/tree/EHL-debug seems to work:

$ sudo ./pcm -i=1

 Intel(r) Performance Counter Monitor ($Format:%ci ID=%h$)

=====  Processor information  =====
Linux arch_perfmon flag  : yes
Hybrid processor         : no
IBRS and IBPB supported  : yes
STIBP supported          : yes
Spec arch caps supported : yes
Max CPUID level          : 27
CPU model number         : 150
Number of physical cores: 4
Number of logical cores: 4
Number of online logical cores: 4
Threads (logical cores) per physical core: 1
Num sockets: 1
Physical cores per socket: 4
Last level cache slices per socket: 1
Core PMU (perfmon) version: 5
Number of core PMU generic (programmable) counters: 4
Width of generic (programmable) counters: 48 bits
Number of core PMU fixed counters: 3
Width of fixed counters: 48 bits
Nominal core frequency: 1500000000 Hz
IBRS enabled in the kernel   : yes
STIBP enabled in the kernel  : no
The processor is not susceptible to Rogue Data Cache Load: yes
The processor supports enhanced IBRS                     : yes
Package thermal spec power: 9 Watt; Package minimum power: 0 Watt; Package maximum power: 0 Watt;

PCM warning: found 0 uboxes. Expected 1
INFO: Linux perf interface to program uncore PMUs is NOT present
Socket 0: 0 PCU units detected. 0 IIO units detected. 0 IRP units detected. 0 CHA/CBO units detected. 0 MDF units detected. 0 UBOX units detected. 0 CXL units detected. 0 PCIE_GEN5x16 units detected. 0 PCIE_GEN5x8 units detected.

 Disabling NMI watchdog since it consumes one hw-PMU counter. To keep NMI watchdog set environment variable PCM_KEEP_NMI_WATCHDOG=1 (this reduces the core metrics set)
 Closed perf event handles
Trying to use Linux perf events...
Successfully programmed on-core PMU using Linux perf

Detected Intel Atom(R) x6414RE Processor @ 1.50GHz "Intel(r) microarchitecture codename Snowridge" stepping 1 microcode level 0x1a


 UTIL  : utlization (same as core C0 state active state residency, the value is in 0..1) 
 IPC   : instructions per CPU cycle
 CFREQ : core frequency in Ghz
 L3MISS: L3 (read) cache misses 
 L2MISS: L2 (read) cache misses (including other core's L2 cache *hits*) 
 L3HIT : L3 (read) cache hit ratio (0.00-1.00)
 L2HIT : L2 cache hit ratio (0.00-1.00)
 L3MPI : number of L3 (read) cache misses per instruction
 L2MPI : number of L2 (read) cache misses per instruction
 READ  : bytes read from main memory controller (in GBytes)
 WRITE : bytes written to main memory controller (in GBytes)
 TEMP  : Temperature reading in 1 degree Celsius relative to the TjMax temperature (thermal headroom): 0 corresponds to the max temperature
 energy: Energy in Joules


 Core (SKT) | UTIL | IPC  | CFREQ | L3MISS | L2MISS | L3HIT | L2HIT | L3MPI | L2MPI |  TEMP

   0    0     0.00   0.17    1.01    1505     1819      0.89    0.49  0.0048  0.0058     56
   1    0     0.00   0.18    1.08     561      447      0.72    0.75  0.0044  0.0035     56
   2    0     0.01   0.05    0.96    1373     4748      0.97    0.32  0.0031  0.0106     56
   3    0     0.00   0.37    1.03    4142     5445      0.83    0.34  0.0034  0.0045     56
---------------------------------------------------------------------------------------------------------------
 SKT    0     0.00   0.14    0.99    7581       12 K    0.91    0.39  0.0036  0.0059     48
---------------------------------------------------------------------------------------------------------------
 TOTAL  *     0.00   0.14    0.99    7581       12 K    0.91    0.39  0.0036  0.0059     N/A

 Instructions retired: 2094 K ; Active cycles:   15 M ; Time (TSC): 1499 Mticks ; C0 (active,non-halted) core residency: 0.39 %

 C1 core residency: 0.00 %; C3 core residency: 0.00 %; C6 core residency: 99.24 %; C7 core residency: 99.15 %;
 C0 package residency: 100.00 %; C2 package residency: 0.00 %; C4 package residency: 0.00 %; C6 package residency: 0.00 %;
                             ┌──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────┐
 Core    C-state distribution│66666666666666666666666666666666666666666666666666666666666666666666666666666667777777777777777777777777777777777777777777777777777777777777777777777777777777│
                             └──────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────┘
                             ┌────────────────────────────────────────────────────────────────────────────────┐
 Package C-state distribution│00000000000000000000000000000000000000000000000000000000000000000000000000000000│
                             └────────────────────────────────────────────────────────────────────────────────┘
---------------------------------------------------------------------------------------------------------------

MEM (GB)->|  READ |  WRITE | CPU energy |
---------------------------------------------------------------------------------------------------------------
 SKT   0     0.00     0.00       3.14
---------------------------------------------------------------------------------------------------------------

Cleaning up
 Closed perf event handles
 Zeroed uncore PMU registers
 Re-enabling NMI watchdog.

Thanks for adding support.

BR,
Andreas

[andkae]

Now i tried the tool pcm-power there i receive following messages:

$ sudo ./pcm/build/bin/pcm-power -i=1

 Intel(r) Performance Counter Monitor ($Format:%ci ID=%h$)

 Power Monitoring Utility

=====  Processor information  =====
Linux arch_perfmon flag  : yes
Hybrid processor         : no
IBRS and IBPB supported  : yes
STIBP supported          : yes
Spec arch caps supported : yes
Max CPUID level          : 27
CPU model number         : 150
Number of physical cores: 4
Number of logical cores: 4
Number of online logical cores: 4
Threads (logical cores) per physical core: 1
Num sockets: 1
Physical cores per socket: 4
Last level cache slices per socket: 1
Core PMU (perfmon) version: 5
Number of core PMU generic (programmable) counters: 4
Width of generic (programmable) counters: 48 bits
Number of core PMU fixed counters: 3
Width of fixed counters: 48 bits
Nominal core frequency: 1500000000 Hz
IBRS enabled in the kernel   : yes
STIBP enabled in the kernel  : no
The processor is not susceptible to Rogue Data Cache Load: yes
The processor supports enhanced IBRS                     : yes
Package thermal spec power: 9 Watt; Package minimum power: 0 Watt; Package maximum power: 0 Watt;

PCM warning: found 0 uboxes. Expected 1
INFO: Linux perf interface to program uncore PMUs is NOT present
Socket 0: 0 PCU units detected. 0 IIO units detected. 0 IRP units detected. 0 CHA/CBO units detected. 0 MDF units detected. 0 UBOX units detected. 0 CXL units detected. 0 PCIE_GEN5x16 units detected. 0 PCIE_GEN5x8 units detected.

Unsupported processor model (150).
Cleaning up
 Closed perf event handles
 Zeroed uncore PMU registers

For the power tool is the processor still unknown. Would is there also possible to add support for EHL?

Thanks & BR,
Andreas

[rdementi]

Hi Andreas, only the main pcm utility is expected to work on your CPU. Other pcm utilities require special hardware performance monitoring units which are not present in your CPU.

[rdementi]

addressed in 53aab34

[andkae]

Hi Andreas, only the main pcm utility is expected to work on your CPU. Other pcm utilities require special hardware performance monitoring units which are not present in your CPU.

Thanks for clarification and support.