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stm32f103xb.hxx
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stm32f103xb.hxx
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// buck50: Test and measurement firmware for “Blue Pill” STM32F103 development board
// Copyright (C) 2019,2020 Mark R. Rubin aka "thanks4opensource"
//
// This file is part of buck50.
//
// The buck50 program is free software: you can redistribute it
// and/or modify it under the terms of the GNU General Public License
// as published by the Free Software Foundation, either version 3 of
// the License, or (at your option) any later version.
//
// The buck50 program is distributed in the hope that it will be
// useful, but WITHOUT ANY WARRANTY; without even the implied warranty
// of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
// General Public License for more details.
//
// You should have received a copy of the GNU General Public License
// (LICENSE.txt) along with the buck50 program. If not, see
// <https://www.gnu.org/licenses/gpl.html>
#ifndef STM32F103XB_HXX
#define STM32F103XB_HXX
#include <stdint.h>
#include <regbits.hxx>
#if REGBITS_MAJOR_VERSION != 1
#error REGBITS_MAJOR_VERSION != 1
#endif
#define STM32F103XB_MAJOR_VERSION 1
#define STM32F103XB_MINOR_VERSION 3
#define STM32F103XB_MICRO_VERSION 0
namespace stm32f103xb {
using namespace regbits;
struct Rcc {
struct Cr {
using pos_t = Pos<uint32_t, Cr>;
static constexpr pos_t
HSION_POS = pos_t( 0),
HSIRDY_POS = pos_t( 1),
HSITRIM_POS = pos_t( 3),
HSICAL_POS = pos_t( 8),
HSEON_POS = pos_t(16),
HSERDY_POS = pos_t(17),
HSEBYP_POS = pos_t(18),
CSSON_POS = pos_t(19),
PLLON_POS = pos_t(24),
PLLRDY_POS = pos_t(25);
using bits_t = Bits<uint32_t, Cr>;
static constexpr bits_t
HSION = bits_t(1, HSION_POS),
HSIRDY = bits_t(1, HSIRDY_POS),
HSEON = bits_t(1, HSEON_POS),
HSERDY = bits_t(1, HSERDY_POS),
HSEBYP = bits_t(1, HSEBYP_POS),
CSSON = bits_t(1, CSSON_POS),
PLLON = bits_t(1, PLLON_POS),
PLLRDY = bits_t(1, PLLRDY_POS);
static const uint32_t
HSITRIM_MASK = 0x1FU,
HSICAL_MASK = 0xFFU;
using mskd_t = Mskd<uint32_t, Cr>;
using shft_t = Shft<uint32_t, Cr>;
REGBITS_MSKD_RANGE("Rcc::Cr",
HSITRIM,
hsitrim,
HSITRIM_MASK,
HSITRIM_POS,
HSITRIM_MASK);
REGBITS_MSKD_RANGE("Rcc::Cr",
HSICAL,
hsical,
HSICAL_MASK,
HSICAL_POS,
HSICAL_MASK);
}; // struct Cr
using cr_t = Reg<uint32_t, Cr>;
cr_t cr;
struct Cfgr {
using pos_t = Pos<uint32_t, Cfgr>;
static constexpr pos_t
SW_POS = pos_t( 0),
SWS_POS = pos_t( 2),
HPRE_POS = pos_t( 4),
PPRE1_POS = pos_t( 8),
PPRE2_POS = pos_t(11),
ADCPRE_POS = pos_t(14),
PLLSRC_POS = pos_t(16),
PLLXTPRE_POS = pos_t(17),
PLLMULL_POS = pos_t(18),
USBPRE_POS = pos_t(22),
MCO_POS = pos_t(24);
using bits_t = Bits<uint32_t, Cfgr>;
static constexpr bits_t
PLLSRC = bits_t(1, PLLSRC_POS),
PLLXTPRE = bits_t(1, PLLXTPRE_POS),
USBPRE = bits_t(1, USBPRE_POS);
static const uint32_t
SW_MASK = 0x3,
SWS_MASK = 0x3,
HPRE_MASK = 0xF,
PPRE1_MASK = 0x7,
PPRE2_MASK = 0x7,
ADCPRE_MASK = 0x3,
PLLMULL_MASK = 0xF,
MCO_MASK = 0x7;
using mskd_t = Mskd<uint32_t, Cfgr>;
static constexpr mskd_t
SW_HSI = mskd_t( SW_MASK, 0, SW_POS),
SW_HSE = mskd_t( SW_MASK, 1, SW_POS),
SW_PLL = mskd_t( SW_MASK, 2, SW_POS),
SWS_HSI = mskd_t( SWS_MASK, 0, SWS_POS),
SWS_HSE = mskd_t( SWS_MASK, 1, SWS_POS),
SWS_PLL = mskd_t( SWS_MASK, 2, SWS_POS),
HPRE_DIV_NONE = mskd_t(HPRE_MASK, 0b0000, HPRE_POS),
HPRE_DIV_1 = mskd_t(HPRE_MASK, 0b0000, HPRE_POS),
HPRE_DIV_2 = mskd_t(HPRE_MASK, 0b1000, HPRE_POS),
HPRE_DIV_4 = mskd_t(HPRE_MASK, 0b1001, HPRE_POS),
HPRE_DIV_8 = mskd_t(HPRE_MASK, 0b1010, HPRE_POS),
HPRE_DIV_16 = mskd_t(HPRE_MASK, 0b1011, HPRE_POS),
HPRE_DIV_64 = mskd_t(HPRE_MASK, 0b1100, HPRE_POS),
HPRE_DIV_128 = mskd_t(HPRE_MASK, 0b1101, HPRE_POS),
HPRE_DIV_256 = mskd_t(HPRE_MASK, 0b1110, HPRE_POS),
HPRE_DIV_512 = mskd_t(HPRE_MASK, 0b1111, HPRE_POS),
PPRE1_DIV_1 = mskd_t(PPRE1_MASK, 0b000, PPRE1_POS),
PPRE1_DIV_2 = mskd_t(PPRE1_MASK, 0b100, PPRE1_POS),
PPRE1_DIV_4 = mskd_t(PPRE1_MASK, 0b101, PPRE1_POS),
PPRE1_DIV_8 = mskd_t(PPRE1_MASK, 0b110, PPRE1_POS),
PPRE1_DIV_16 = mskd_t(PPRE1_MASK, 0b111, PPRE1_POS),
PPRE2_DIV_1 = mskd_t(PPRE2_MASK, 0b000, PPRE2_POS),
PPRE2_DIV_2 = mskd_t(PPRE2_MASK, 0b100, PPRE2_POS),
PPRE2_DIV_4 = mskd_t(PPRE2_MASK, 0b101, PPRE2_POS),
PPRE2_DIV_8 = mskd_t(PPRE2_MASK, 0b110, PPRE2_POS),
PPRE2_DIV_16 = mskd_t(PPRE2_MASK, 0b111, PPRE2_POS),
ADCPRE_DIV_2 = mskd_t( ADCPRE_MASK, 0b00, ADCPRE_POS),
ADCPRE_DIV_4 = mskd_t( ADCPRE_MASK, 0b01, ADCPRE_POS),
ADCPRE_DIV_6 = mskd_t( ADCPRE_MASK, 0b10, ADCPRE_POS),
ADCPRE_DIV_8 = mskd_t( ADCPRE_MASK, 0b11, ADCPRE_POS),
PLLMULL_2 = mskd_t( PLLMULL_MASK, 0b0000, PLLMULL_POS),
PLLMULL_3 = mskd_t( PLLMULL_MASK, 0b0001, PLLMULL_POS),
PLLMULL_4 = mskd_t( PLLMULL_MASK, 0b0010, PLLMULL_POS),
PLLMULL_5 = mskd_t( PLLMULL_MASK, 0b0011, PLLMULL_POS),
PLLMULL_6 = mskd_t( PLLMULL_MASK, 0b0100, PLLMULL_POS),
PLLMULL_7 = mskd_t( PLLMULL_MASK, 0b0101, PLLMULL_POS),
PLLMULL_8 = mskd_t( PLLMULL_MASK, 0b0110, PLLMULL_POS),
PLLMULL_9 = mskd_t( PLLMULL_MASK, 0b0111, PLLMULL_POS),
PLLMULL_10 = mskd_t( PLLMULL_MASK, 0b1000, PLLMULL_POS),
PLLMULL_11 = mskd_t( PLLMULL_MASK, 0b1001, PLLMULL_POS),
PLLMULL_12 = mskd_t( PLLMULL_MASK, 0b1010, PLLMULL_POS),
PLLMULL_13 = mskd_t( PLLMULL_MASK, 0b1011, PLLMULL_POS),
PLLMULL_14 = mskd_t( PLLMULL_MASK, 0b1100, PLLMULL_POS),
PLLMULL_15 = mskd_t( PLLMULL_MASK, 0b1101, PLLMULL_POS),
PLLMULL_16 = mskd_t( PLLMULL_MASK, 0b1110, PLLMULL_POS),
PLLMULL_16ALT = mskd_t( PLLMULL_MASK, 0b1111, PLLMULL_POS),
MCO_NONE = mskd_t( MCO_MASK, 0b000, MCO_POS),
MCO_SYSCLK = mskd_t( MCO_MASK, 0b100, MCO_POS),
MCO_HSI = mskd_t( MCO_MASK, 0b101, MCO_POS),
MCO_HSE = mskd_t( MCO_MASK, 0b110, MCO_POS),
MCO_PLL_DIV_2 = mskd_t( MCO_MASK, 0b111, MCO_POS);
}; // struct Cfgr
using cfgr_t = Reg<uint32_t, Cfgr>;
cfgr_t cfgr;
struct Cir {
using pos_t = Pos<uint32_t, Cir>;
static constexpr pos_t
LSIRDYF_POS = pos_t( 0),
LSERDYF_POS = pos_t( 1),
HSIRDYF_POS = pos_t( 2),
HSERDYF_POS = pos_t( 3),
PLLRDYF_POS = pos_t( 4),
CSSF_POS = pos_t( 7),
LSIRDYIE_POS = pos_t( 8),
LSERDYIE_POS = pos_t( 9),
HSIRDYIE_POS = pos_t(10),
HSERDYIE_POS = pos_t(11),
PLLRDYIE_POS = pos_t(12),
LSIRDYC_POS = pos_t(16),
LSERDYC_POS = pos_t(17),
HSIRDYC_POS = pos_t(18),
HSERDYC_POS = pos_t(19),
PLLRDYC_POS = pos_t(20),
CSSC_POS = pos_t(23);
using bits_t = Bits<uint32_t, Cir>;
static constexpr bits_t
LSIRDYF = bits_t(1, LSIRDYF_POS),
LSERDYF = bits_t(1, LSERDYF_POS),
HSIRDYF = bits_t(1, HSIRDYF_POS),
HSERDYF = bits_t(1, HSERDYF_POS),
PLLRDYF = bits_t(1, PLLRDYF_POS),
CSSF = bits_t(1, CSSF_POS),
LSIRDYIE = bits_t(1, LSIRDYIE_POS),
LSERDYIE = bits_t(1, LSERDYIE_POS),
HSIRDYIE = bits_t(1, HSIRDYIE_POS),
HSERDYIE = bits_t(1, HSERDYIE_POS),
PLLRDYIE = bits_t(1, PLLRDYIE_POS),
LSIRDYC = bits_t(1, LSIRDYC_POS),
LSERDYC = bits_t(1, LSERDYC_POS),
HSIRDYC = bits_t(1, HSIRDYC_POS),
HSERDYC = bits_t(1, HSERDYC_POS),
PLLRDYC = bits_t(1, PLLRDYC_POS),
CSSC = bits_t(1, CSSC_POS);
}; // struct Cir
using cir_t = Reg<uint32_t, Cir>;
cir_t cir;
struct Apb2rstr {
using pos_t = Pos<uint32_t, Apb2rstr>;
static constexpr pos_t
AFIORST_POS = pos_t( 0),
IOPARST_POS = pos_t( 2),
IOPBRST_POS = pos_t( 3),
IOPCRST_POS = pos_t( 4),
IOPDRST_POS = pos_t( 5),
ADC1RST_POS = pos_t( 9),
ADC2RST_POS = pos_t(10),
TIM1RST_POS = pos_t(11),
SPI1RST_POS = pos_t(12),
USART1RST_POS = pos_t(14),
IOPERST_POS = pos_t( 6);
using bits_t = Bits<uint32_t, Apb2rstr>;
static constexpr bits_t
AFIORST = bits_t(1, AFIORST_POS),
IOPARST = bits_t(1, IOPARST_POS),
IOPBRST = bits_t(1, IOPBRST_POS),
IOPCRST = bits_t(1, IOPCRST_POS),
IOPDRST = bits_t(1, IOPDRST_POS),
ADC1RST = bits_t(1, ADC1RST_POS),
ADC2RST = bits_t(1, ADC2RST_POS),
TIM1RST = bits_t(1, TIM1RST_POS),
SPI1RST = bits_t(1, SPI1RST_POS),
USART1RST = bits_t(1, USART1RST_POS),
IOPERST = bits_t(1, IOPERST_POS);
}; // struct Apb2rstr
using apb2rstr_t = Reg<uint32_t, Apb2rstr>;
apb2rstr_t apb2rstr;
struct Apb1rstr {
using pos_t = Pos<uint32_t, Apb1rstr>;
static constexpr pos_t
TIM2RST_POS = pos_t( 0),
TIM3RST_POS = pos_t( 1),
WWDGRST_POS = pos_t(11),
USART2RST_POS = pos_t(17),
I2C1RST_POS = pos_t(21),
CAN1RST_POS = pos_t(25),
BKPRST_POS = pos_t(27),
PWRRST_POS = pos_t(28),
TIM4RST_POS = pos_t( 2),
SPI2RST_POS = pos_t(14),
USART3RST_POS = pos_t(18),
I2C2RST_POS = pos_t(22),
USBRST_POS = pos_t(23);
using bits_t = Bits<uint32_t, Apb1rstr>;
static constexpr bits_t
TIM2RST = bits_t(1, TIM2RST_POS),
TIM3RST = bits_t(1, TIM3RST_POS),
WWDGRST = bits_t(1, WWDGRST_POS),
USART2RST = bits_t(1, USART2RST_POS),
I2C1RST = bits_t(1, I2C1RST_POS),
CAN1RST = bits_t(1, CAN1RST_POS),
BKPRST = bits_t(1, BKPRST_POS),
PWRRST = bits_t(1, PWRRST_POS),
TIM4RST = bits_t(1, TIM4RST_POS),
SPI2RST = bits_t(1, SPI2RST_POS),
USART3RST = bits_t(1, USART3RST_POS),
I2C2RST = bits_t(1, I2C2RST_POS),
USBRST = bits_t(1, USBRST_POS);
}; // struct Apb1rstr
using apb1rstr_t = Reg<uint32_t, Apb1rstr>;
apb1rstr_t apb1rstr;
struct Ahbenr {
using pos_t = Pos<uint32_t, Ahbenr>;
static constexpr pos_t
DMA1EN_POS = pos_t( 0),
SRAMEN_POS = pos_t( 2),
FLITFEN_POS = pos_t( 4),
CRCEN_POS = pos_t( 6);
using bits_t = Bits<uint32_t, Ahbenr>;
static constexpr bits_t
DMA1EN = bits_t(1, DMA1EN_POS),
SRAMEN = bits_t(1, SRAMEN_POS),
FLITFEN = bits_t(1, FLITFEN_POS),
CRCEN = bits_t(1, CRCEN_POS);
}; // struct Ahbenr
using ahbenr_t = Reg<uint32_t, Ahbenr>;
ahbenr_t ahbenr;
struct Apb2enr {
using pos_t = Pos<uint32_t, Apb2enr>;
static constexpr pos_t
AFIOEN_POS = pos_t( 0),
IOPAEN_POS = pos_t( 2),
IOPBEN_POS = pos_t( 3),
IOPCEN_POS = pos_t( 4),
IOPDEN_POS = pos_t( 5),
ADC1EN_POS = pos_t( 9),
ADC2EN_POS = pos_t(10),
TIM1EN_POS = pos_t(11),
SPI1EN_POS = pos_t(12),
USART1EN_POS = pos_t(14),
IOPEEN_POS = pos_t( 6);
using bits_t = Bits<uint32_t, Apb2enr>;
static constexpr bits_t
AFIOEN = bits_t(1, AFIOEN_POS),
IOPAEN = bits_t(1, IOPAEN_POS),
IOPBEN = bits_t(1, IOPBEN_POS),
IOPCEN = bits_t(1, IOPCEN_POS),
IOPDEN = bits_t(1, IOPDEN_POS),
ADC1EN = bits_t(1, ADC1EN_POS),
ADC2EN = bits_t(1, ADC2EN_POS),
TIM1EN = bits_t(1, TIM1EN_POS),
SPI1EN = bits_t(1, SPI1EN_POS),
USART1EN = bits_t(1, USART1EN_POS),
IOPEEN = bits_t(1, IOPEEN_POS);
}; // struct Apb2enr
using apb2enr_t = Reg<uint32_t, Apb2enr>;
apb2enr_t apb2enr;
struct Apb1enr {
using pos_t = Pos<uint32_t, Apb1enr>;
static constexpr pos_t
TIM2EN_POS = pos_t( 0),
TIM3EN_POS = pos_t( 1),
WWDGEN_POS = pos_t(11),
USART2EN_POS = pos_t(17),
I2C1EN_POS = pos_t(21),
CAN1EN_POS = pos_t(25),
BKPEN_POS = pos_t(27),
PWREN_POS = pos_t(28),
TIM4EN_POS = pos_t( 2),
SPI2EN_POS = pos_t(14),
USART3EN_POS = pos_t(18),
I2C2EN_POS = pos_t(22),
USBEN_POS = pos_t(23);
using bits_t = Bits<uint32_t, Apb1enr>;
static constexpr bits_t
TIM2EN = bits_t(1, TIM2EN_POS),
TIM3EN = bits_t(1, TIM3EN_POS),
WWDGEN = bits_t(1, WWDGEN_POS),
USART2EN = bits_t(1, USART2EN_POS),
I2C1EN = bits_t(1, I2C1EN_POS),
CAN1EN = bits_t(1, CAN1EN_POS),
BKPEN = bits_t(1, BKPEN_POS),
PWREN = bits_t(1, PWREN_POS),
TIM4EN = bits_t(1, TIM4EN_POS),
SPI2EN = bits_t(1, SPI2EN_POS),
USART3EN = bits_t(1, USART3EN_POS),
I2C2EN = bits_t(1, I2C2EN_POS),
USBEN = bits_t(1, USBEN_POS);
}; // struct Apb1enr
using apb1enr_t = Reg<uint32_t, Apb1enr>;
apb1enr_t apb1enr;
struct Bdcr {
using pos_t = Pos<uint32_t, Bdcr>;
static constexpr pos_t
LSEON_POS = pos_t( 0),
LSERDY_POS = pos_t( 1),
LSEBYP_POS = pos_t( 2),
RTCSEL_POS = pos_t( 8),
RTCEN_POS = pos_t(15),
BDRST_POS = pos_t(16);
using bits_t = Bits<uint32_t, Bdcr>;
static constexpr bits_t
LSEON = bits_t(1, LSEON_POS),
LSERDY = bits_t(1, LSERDY_POS),
LSEBYP = bits_t(1, LSEBYP_POS),
RTCEN = bits_t(1, RTCEN_POS);
static const uint32_t
RTCSEL_MASK = 0x3U;
using mskd_t = Mskd<uint32_t, Bdcr>;
static constexpr mskd_t
RTCSEL_NOCLOCK = mskd_t( RTCSEL_MASK, 0b00, RTCSEL_POS),
RTCSEL_LSE = mskd_t( RTCSEL_MASK, 0b01, RTCSEL_POS),
RTCSEL_LSI = mskd_t( RTCSEL_MASK, 0b10, RTCSEL_POS),
RTCSEL_HSE = mskd_t( RTCSEL_MASK, 0b11, RTCSEL_POS);
}; // struct Bdcr
using bdcr_t = Reg<uint32_t, Bdcr>;
bdcr_t bdcr;
struct Csr {
using pos_t = Pos<uint32_t, Csr>;
static constexpr pos_t
LSION_POS = pos_t( 0),
LSIRDY_POS = pos_t( 1),
RMVF_POS = pos_t(24),
PINRSTF_POS = pos_t(26),
PORRSTF_POS = pos_t(27),
SFTRSTF_POS = pos_t(28),
IWDGRSTF_POS = pos_t(29),
WWDGRSTF_POS = pos_t(30),
LPWRRSTF_POS = pos_t(31);
using bits_t = Bits<uint32_t, Csr>;
static constexpr bits_t
LSION = bits_t(1, LSION_POS),
LSIRDY = bits_t(1, LSIRDY_POS),
RMVF = bits_t(1, RMVF_POS),
PINRSTF = bits_t(1, PINRSTF_POS),
PORRSTF = bits_t(1, PORRSTF_POS),
SFTRSTF = bits_t(1, SFTRSTF_POS),
IWDGRSTF = bits_t(1, IWDGRSTF_POS),
WWDGRSTF = bits_t(1, WWDGRSTF_POS),
LPWRRSTF = bits_t(1, LPWRRSTF_POS);
}; // struct Csr
using csr_t = Reg<uint32_t, Csr>;
csr_t csr;
}; // struct Rcc
static_assert(sizeof(Rcc) == 40, "sizeof(Rcc) != 40");
struct Gpio {
struct Crl {
using pos_t = Pos<uint32_t, Crl>;
static constexpr pos_t
MODE0_POS = pos_t( 0),
MODE1_POS = pos_t( 4),
MODE2_POS = pos_t( 8),
MODE3_POS = pos_t(12),
MODE4_POS = pos_t(16),
MODE5_POS = pos_t(20),
MODE6_POS = pos_t(24),
MODE7_POS = pos_t(28),
CNF0_POS = pos_t( 2),
CNF1_POS = pos_t( 6),
CNF2_POS = pos_t(10),
CNF3_POS = pos_t(14),
CNF4_POS = pos_t(18),
CNF5_POS = pos_t(22),
CNF6_POS = pos_t(26),
CNF7_POS = pos_t(30);
static const uint32_t MASK = 0b11,
INPUT_ANALOG = 0b00,
INPUT_FLOATING = 0b01,
INPUT_PULL_UP_DOWN = 0b10,
OUTPUT_PUSH_PULL = 0b00,
OUTPUT_OPEN_DRAIN = 0b01,
ALTFUNC_PUSH_PULL = 0b10,
ALTFUNC_OPEN_DRAIN = 0b11,
INPUT = 0b00,
OUTPUT_10_MHZ = 0b01,
OUTPUT_2_MHZ = 0b10,
OUTPUT_50_MHZ = 0b11;
using mskd_t = Mskd<uint32_t, Crl>;
static constexpr mskd_t
CNF0_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF0_POS),
CNF0_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF0_POS),
CNF0_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF0_POS),
CNF0_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF0_POS),
CNF0_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF0_POS),
CNF0_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF0_POS),
CNF0_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF0_POS),
CNF1_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF1_POS),
CNF1_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF1_POS),
CNF1_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF1_POS),
CNF1_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF1_POS),
CNF1_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF1_POS),
CNF1_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF1_POS),
CNF1_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF1_POS),
CNF2_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF2_POS),
CNF2_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF2_POS),
CNF2_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF2_POS),
CNF2_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF2_POS),
CNF2_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF2_POS),
CNF2_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF2_POS),
CNF2_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF2_POS),
CNF3_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF3_POS),
CNF3_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF3_POS),
CNF3_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF3_POS),
CNF3_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF3_POS),
CNF3_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF3_POS),
CNF3_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF3_POS),
CNF3_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF3_POS),
CNF4_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF4_POS),
CNF4_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF4_POS),
CNF4_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF4_POS),
CNF4_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF4_POS),
CNF4_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF4_POS),
CNF4_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF4_POS),
CNF4_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF4_POS),
CNF5_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF5_POS),
CNF5_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF5_POS),
CNF5_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF5_POS),
CNF5_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF5_POS),
CNF5_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF5_POS),
CNF5_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF5_POS),
CNF5_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF5_POS),
CNF6_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF6_POS),
CNF6_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF6_POS),
CNF6_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF6_POS),
CNF6_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF6_POS),
CNF6_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF6_POS),
CNF6_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF6_POS),
CNF6_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF6_POS),
CNF7_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF7_POS),
CNF7_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF7_POS),
CNF7_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF7_POS),
CNF7_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF7_POS),
CNF7_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF7_POS),
CNF7_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF7_POS),
CNF7_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF7_POS),
MODE0_INPUT = mskd_t(MASK, INPUT , MODE0_POS),
MODE0_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE0_POS),
MODE0_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE0_POS),
MODE0_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE0_POS),
MODE1_INPUT = mskd_t(MASK, INPUT , MODE1_POS),
MODE1_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE1_POS),
MODE1_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE1_POS),
MODE1_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE1_POS),
MODE2_INPUT = mskd_t(MASK, INPUT , MODE2_POS),
MODE2_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE2_POS),
MODE2_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE2_POS),
MODE2_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE2_POS),
MODE3_INPUT = mskd_t(MASK, INPUT , MODE3_POS),
MODE3_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE3_POS),
MODE3_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE3_POS),
MODE3_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE3_POS),
MODE4_INPUT = mskd_t(MASK, INPUT , MODE4_POS),
MODE4_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE4_POS),
MODE4_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE4_POS),
MODE4_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE4_POS),
MODE5_INPUT = mskd_t(MASK, INPUT , MODE5_POS),
MODE5_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE5_POS),
MODE5_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE5_POS),
MODE5_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE5_POS),
MODE6_INPUT = mskd_t(MASK, INPUT , MODE6_POS),
MODE6_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE6_POS),
MODE6_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE6_POS),
MODE6_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE6_POS),
MODE7_INPUT = mskd_t(MASK, INPUT , MODE7_POS),
MODE7_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE7_POS),
MODE7_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE7_POS),
MODE7_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE7_POS);
}; // struct Crl
using crl_t = Reg<uint32_t, Crl>;
crl_t crl;
struct Crh {
using pos_t = Pos<uint32_t, Crh>;
static constexpr pos_t
MODE_POS = pos_t( 0),
MODE8_POS = pos_t( 0),
MODE9_POS = pos_t( 4),
MODE10_POS = pos_t( 8),
MODE11_POS = pos_t(12),
MODE12_POS = pos_t(16),
MODE13_POS = pos_t(20),
MODE14_POS = pos_t(24),
MODE15_POS = pos_t(28),
CNF_POS = pos_t( 2),
CNF8_POS = pos_t( 2),
CNF9_POS = pos_t( 6),
CNF10_POS = pos_t(10),
CNF11_POS = pos_t(14),
CNF12_POS = pos_t(18),
CNF13_POS = pos_t(22),
CNF14_POS = pos_t(26),
CNF15_POS = pos_t(30);
static const uint32_t MASK = 0b11,
INPUT_ANALOG = 0b00,
INPUT_FLOATING = 0b01,
INPUT_PULL_UP_DOWN = 0b10,
OUTPUT_PUSH_PULL = 0b00,
OUTPUT_OPEN_DRAIN = 0b01,
ALTFUNC_PUSH_PULL = 0b10,
ALTFUNC_OPEN_DRAIN = 0b11,
INPUT = 0b00,
OUTPUT_10_MHZ = 0b01,
OUTPUT_2_MHZ = 0b10,
OUTPUT_50_MHZ = 0b11;
using mskd_t = Mskd<uint32_t, Crh>;
static constexpr mskd_t
CNF8_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF8_POS),
CNF8_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF8_POS),
CNF8_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF8_POS),
CNF8_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF8_POS),
CNF8_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF8_POS),
CNF8_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF8_POS),
CNF8_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF8_POS),
CNF9_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF9_POS),
CNF9_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF9_POS),
CNF9_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF9_POS),
CNF9_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF9_POS),
CNF9_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF9_POS),
CNF9_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF9_POS),
CNF9_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF9_POS),
CNF10_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF10_POS),
CNF10_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF10_POS),
CNF10_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF10_POS),
CNF10_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF10_POS),
CNF10_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF10_POS),
CNF10_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF10_POS),
CNF10_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF10_POS),
CNF11_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF11_POS),
CNF11_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF11_POS),
CNF11_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF11_POS),
CNF11_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF11_POS),
CNF11_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF11_POS),
CNF11_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF11_POS),
CNF11_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF11_POS),
CNF12_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF12_POS),
CNF12_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF12_POS),
CNF12_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF12_POS),
CNF12_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF12_POS),
CNF12_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF12_POS),
CNF12_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF12_POS),
CNF12_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF12_POS),
CNF13_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF13_POS),
CNF13_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF13_POS),
CNF13_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF13_POS),
CNF13_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF13_POS),
CNF13_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF13_POS),
CNF13_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF13_POS),
CNF13_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF13_POS),
CNF14_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF14_POS),
CNF14_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF14_POS),
CNF14_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF14_POS),
CNF14_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF14_POS),
CNF14_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF14_POS),
CNF14_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF14_POS),
CNF14_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF14_POS),
CNF15_INPUT_ANALOG = mskd_t(MASK, INPUT_ANALOG , CNF15_POS),
CNF15_INPUT_FLOATING = mskd_t(MASK, INPUT_FLOATING , CNF15_POS),
CNF15_INPUT_PULL_UP_DOWN = mskd_t(MASK, INPUT_PULL_UP_DOWN, CNF15_POS),
CNF15_OUTPUT_PUSH_PULL = mskd_t(MASK, OUTPUT_PUSH_PULL , CNF15_POS),
CNF15_OUTPUT_OPEN_DRAIN = mskd_t(MASK, OUTPUT_OPEN_DRAIN , CNF15_POS),
CNF15_ALTFUNC_PUSH_PULL = mskd_t(MASK, ALTFUNC_PUSH_PULL , CNF15_POS),
CNF15_ALTFUNC_OPEN_DRAIN = mskd_t(MASK, ALTFUNC_OPEN_DRAIN, CNF15_POS),
MODE8_INPUT = mskd_t(MASK, INPUT , MODE8_POS),
MODE8_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE8_POS),
MODE8_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE8_POS),
MODE8_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE8_POS),
MODE9_INPUT = mskd_t(MASK, INPUT , MODE9_POS),
MODE9_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE9_POS),
MODE9_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE9_POS),
MODE9_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE9_POS),
MODE10_INPUT = mskd_t(MASK, INPUT , MODE10_POS),
MODE10_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE10_POS),
MODE10_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE10_POS),
MODE10_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE10_POS),
MODE11_INPUT = mskd_t(MASK, INPUT , MODE11_POS),
MODE11_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE11_POS),
MODE11_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE11_POS),
MODE11_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE11_POS),
MODE12_INPUT = mskd_t(MASK, INPUT , MODE12_POS),
MODE12_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE12_POS),
MODE12_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE12_POS),
MODE12_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE12_POS),
MODE13_INPUT = mskd_t(MASK, INPUT , MODE13_POS),
MODE13_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE13_POS),
MODE13_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE13_POS),
MODE13_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE13_POS),
MODE14_INPUT = mskd_t(MASK, INPUT , MODE14_POS),
MODE14_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE14_POS),
MODE14_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE14_POS),
MODE14_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE14_POS),
MODE15_INPUT = mskd_t(MASK, INPUT , MODE15_POS),
MODE15_OUTPUT_10_MHZ = mskd_t(MASK, OUTPUT_10_MHZ , MODE15_POS),
MODE15_OUTPUT_2_MHZ = mskd_t(MASK, OUTPUT_2_MHZ , MODE15_POS),
MODE15_OUTPUT_50_MHZ = mskd_t(MASK, OUTPUT_50_MHZ , MODE15_POS);
}; // struct Crh
using crh_t = Reg<uint32_t, Crh>;
crh_t crh;
struct Idr {
using pos_t = Pos<uint32_t, Idr>;
static constexpr pos_t
IDR0_POS = pos_t( 0),
IDR1_POS = pos_t( 1),
IDR2_POS = pos_t( 2),
IDR3_POS = pos_t( 3),
IDR4_POS = pos_t( 4),
IDR5_POS = pos_t( 5),
IDR6_POS = pos_t( 6),
IDR7_POS = pos_t( 7),
IDR8_POS = pos_t( 8),
IDR9_POS = pos_t( 9),
IDR10_POS = pos_t(10),
IDR11_POS = pos_t(11),
IDR12_POS = pos_t(12),
IDR13_POS = pos_t(13),
IDR14_POS = pos_t(14),
IDR15_POS = pos_t(15);
using bits_t = Bits<uint32_t, Idr>;
static constexpr bits_t
IDR0 = bits_t(1, IDR0_POS),
IDR1 = bits_t(1, IDR1_POS),
IDR2 = bits_t(1, IDR2_POS),
IDR3 = bits_t(1, IDR3_POS),
IDR4 = bits_t(1, IDR4_POS),
IDR5 = bits_t(1, IDR5_POS),
IDR6 = bits_t(1, IDR6_POS),
IDR7 = bits_t(1, IDR7_POS),
IDR8 = bits_t(1, IDR8_POS),
IDR9 = bits_t(1, IDR9_POS),
IDR10 = bits_t(1, IDR10_POS),
IDR11 = bits_t(1, IDR11_POS),
IDR12 = bits_t(1, IDR12_POS),
IDR13 = bits_t(1, IDR13_POS),
IDR14 = bits_t(1, IDR14_POS),
IDR15 = bits_t(1, IDR15_POS);
}; // struct Idr
using idr_t = Reg<uint32_t, Idr>;
idr_t idr;
struct Odr {
using pos_t = Pos<uint32_t, Odr>;
static constexpr pos_t
ODR0_POS = pos_t( 0),
ODR1_POS = pos_t( 1),
ODR2_POS = pos_t( 2),
ODR3_POS = pos_t( 3),
ODR4_POS = pos_t( 4),
ODR5_POS = pos_t( 5),
ODR6_POS = pos_t( 6),
ODR7_POS = pos_t( 7),
ODR8_POS = pos_t( 8),
ODR9_POS = pos_t( 9),
ODR10_POS = pos_t(10),
ODR11_POS = pos_t(11),
ODR12_POS = pos_t(12),
ODR13_POS = pos_t(13),
ODR14_POS = pos_t(14),
ODR15_POS = pos_t(15);
using bits_t = Bits<uint32_t, Odr>;
static constexpr bits_t
ODR0 = bits_t(1, ODR0_POS),
ODR1 = bits_t(1, ODR1_POS),
ODR2 = bits_t(1, ODR2_POS),
ODR3 = bits_t(1, ODR3_POS),
ODR4 = bits_t(1, ODR4_POS),
ODR5 = bits_t(1, ODR5_POS),
ODR6 = bits_t(1, ODR6_POS),
ODR7 = bits_t(1, ODR7_POS),
ODR8 = bits_t(1, ODR8_POS),
ODR9 = bits_t(1, ODR9_POS),
ODR10 = bits_t(1, ODR10_POS),
ODR11 = bits_t(1, ODR11_POS),
ODR12 = bits_t(1, ODR12_POS),
ODR13 = bits_t(1, ODR13_POS),
ODR14 = bits_t(1, ODR14_POS),
ODR15 = bits_t(1, ODR15_POS);
}; // struct Odr
using odr_t = Reg<uint32_t, Odr>;
odr_t odr;
struct Bsrr {
using pos_t = Pos<uint32_t, Bsrr>;
static constexpr pos_t
BS0_POS = pos_t( 0),
BS1_POS = pos_t( 1),
BS2_POS = pos_t( 2),
BS3_POS = pos_t( 3),
BS4_POS = pos_t( 4),
BS5_POS = pos_t( 5),
BS6_POS = pos_t( 6),
BS7_POS = pos_t( 7),
BS8_POS = pos_t( 8),
BS9_POS = pos_t( 9),
BS10_POS = pos_t(10),
BS11_POS = pos_t(11),
BS12_POS = pos_t(12),
BS13_POS = pos_t(13),
BS14_POS = pos_t(14),
BS15_POS = pos_t(15),
BR0_POS = pos_t(16),
BR1_POS = pos_t(17),
BR2_POS = pos_t(18),
BR3_POS = pos_t(19),
BR4_POS = pos_t(20),
BR5_POS = pos_t(21),
BR6_POS = pos_t(22),
BR7_POS = pos_t(23),
BR8_POS = pos_t(24),
BR9_POS = pos_t(25),
BR10_POS = pos_t(26),
BR11_POS = pos_t(27),
BR12_POS = pos_t(28),
BR13_POS = pos_t(29),
BR14_POS = pos_t(30),
BR15_POS = pos_t(31);
using bits_t = Bits<uint32_t, Bsrr>;
static constexpr bits_t
BS0 = bits_t(1, BS0_POS),
BS1 = bits_t(1, BS1_POS),
BS2 = bits_t(1, BS2_POS),
BS3 = bits_t(1, BS3_POS),
BS4 = bits_t(1, BS4_POS),
BS5 = bits_t(1, BS5_POS),
BS6 = bits_t(1, BS6_POS),
BS7 = bits_t(1, BS7_POS),
BS8 = bits_t(1, BS8_POS),
BS9 = bits_t(1, BS9_POS),
BS10 = bits_t(1, BS10_POS),
BS11 = bits_t(1, BS11_POS),
BS12 = bits_t(1, BS12_POS),
BS13 = bits_t(1, BS13_POS),
BS14 = bits_t(1, BS14_POS),
BS15 = bits_t(1, BS15_POS),
BR0 = bits_t(1, BR0_POS),
BR1 = bits_t(1, BR1_POS),
BR2 = bits_t(1, BR2_POS),
BR3 = bits_t(1, BR3_POS),
BR4 = bits_t(1, BR4_POS),
BR5 = bits_t(1, BR5_POS),
BR6 = bits_t(1, BR6_POS),
BR7 = bits_t(1, BR7_POS),
BR8 = bits_t(1, BR8_POS),
BR9 = bits_t(1, BR9_POS),
BR10 = bits_t(1, BR10_POS),
BR11 = bits_t(1, BR11_POS),
BR12 = bits_t(1, BR12_POS),
BR13 = bits_t(1, BR13_POS),
BR14 = bits_t(1, BR14_POS),
BR15 = bits_t(1, BR15_POS);
}; // struct Bsrr
using bsrr_t = Reg<uint32_t, Bsrr>;
bsrr_t bsrr;
struct Brr {
using pos_t = Pos<uint32_t, Brr>;
static constexpr pos_t
BR0_POS = pos_t( 0),
BR1_POS = pos_t( 1),
BR2_POS = pos_t( 2),
BR3_POS = pos_t( 3),
BR4_POS = pos_t( 4),
BR5_POS = pos_t( 5),
BR6_POS = pos_t( 6),
BR7_POS = pos_t( 7),
BR8_POS = pos_t( 8),
BR9_POS = pos_t( 9),
BR10_POS = pos_t(10),
BR11_POS = pos_t(11),
BR12_POS = pos_t(12),
BR13_POS = pos_t(13),
BR14_POS = pos_t(14),
BR15_POS = pos_t(15);
using bits_t = Bits<uint32_t, Brr>;
static constexpr bits_t
BR0 = bits_t(1, BR0_POS),
BR1 = bits_t(1, BR1_POS),
BR2 = bits_t(1, BR2_POS),
BR3 = bits_t(1, BR3_POS),
BR4 = bits_t(1, BR4_POS),
BR5 = bits_t(1, BR5_POS),
BR6 = bits_t(1, BR6_POS),
BR7 = bits_t(1, BR7_POS),
BR8 = bits_t(1, BR8_POS),
BR9 = bits_t(1, BR9_POS),
BR10 = bits_t(1, BR10_POS),
BR11 = bits_t(1, BR11_POS),
BR12 = bits_t(1, BR12_POS),
BR13 = bits_t(1, BR13_POS),
BR14 = bits_t(1, BR14_POS),
BR15 = bits_t(1, BR15_POS);
}; // struct Brr
using brr_t = Reg<uint32_t, Brr>;
brr_t brr;
struct Lckr {
using pos_t = Pos<uint32_t, Lckr>;
static constexpr pos_t
LCK0_POS = pos_t( 0),
LCK1_POS = pos_t( 1),
LCK2_POS = pos_t( 2),
LCK3_POS = pos_t( 3),
LCK4_POS = pos_t( 4),
LCK5_POS = pos_t( 5),
LCK6_POS = pos_t( 6),
LCK7_POS = pos_t( 7),
LCK8_POS = pos_t( 8),
LCK9_POS = pos_t( 9),
LCK10_POS = pos_t(10),
LCK11_POS = pos_t(11),
LCK12_POS = pos_t(12),
LCK13_POS = pos_t(13),
LCK14_POS = pos_t(14),
LCK15_POS = pos_t(15),
LCKK_POS = pos_t(16);
using bits_t = Bits<uint32_t, Lckr>;
static constexpr bits_t
LCK0 = bits_t(1, LCK0_POS),
LCK1 = bits_t(1, LCK1_POS),
LCK2 = bits_t(1, LCK2_POS),
LCK3 = bits_t(1, LCK3_POS),
LCK4 = bits_t(1, LCK4_POS),
LCK5 = bits_t(1, LCK5_POS),
LCK6 = bits_t(1, LCK6_POS),
LCK7 = bits_t(1, LCK7_POS),
LCK8 = bits_t(1, LCK8_POS),
LCK9 = bits_t(1, LCK9_POS),
LCK10 = bits_t(1, LCK10_POS),
LCK11 = bits_t(1, LCK11_POS),
LCK12 = bits_t(1, LCK12_POS),
LCK13 = bits_t(1, LCK13_POS),
LCK14 = bits_t(1, LCK14_POS),
LCK15 = bits_t(1, LCK15_POS),
LCKK = bits_t(1, LCKK_POS);
}; // struct Lckr
using lckr_t = Reg<uint32_t, Lckr>;
lckr_t lckr;
}; // struct Gpio
static_assert(sizeof(Gpio) == 28, "sizeof(Gpio) != 28");