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SamplerX86.cpp
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SamplerX86.cpp
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// Copyright (c) 2017- PPSSPP Project.
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, version 2.0 or later versions.
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License 2.0 for more details.
// A copy of the GPL 2.0 should have been included with the program.
// If not, see http://www.gnu.org/licenses/
// Official git repository and contact information can be found at
// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
#include "ppsspp_config.h"
#if PPSSPP_ARCH(X86) || PPSSPP_ARCH(AMD64)
#include <emmintrin.h>
#include "Common/x64Emitter.h"
#include "Common/BitScan.h"
#include "Common/CPUDetect.h"
#include "GPU/GPUState.h"
#include "GPU/Software/Sampler.h"
#include "GPU/ge_constants.h"
using namespace Gen;
using namespace Rasterizer;
namespace Sampler {
FetchFunc SamplerJitCache::CompileFetch(const SamplerID &id) {
_assert_msg_(id.fetch && !id.linear, "Only fetch should be set on sampler id");
regCache_.SetupABI({
RegCache::GEN_ARG_U,
RegCache::GEN_ARG_V,
RegCache::GEN_ARG_TEXPTR,
RegCache::GEN_ARG_BUFW,
RegCache::GEN_ARG_LEVEL,
RegCache::GEN_ARG_ID,
});
regCache_.ChangeReg(RAX, RegCache::GEN_RESULT);
regCache_.ForceRetain(RegCache::GEN_RESULT);
regCache_.ChangeReg(XMM0, RegCache::VEC_RESULT);
BeginWrite(2048);
Describe("Init");
const u8 *start = AlignCode16();
#if PPSSPP_PLATFORM(WINDOWS)
// RET and shadow space.
stackArgPos_ = 8 + 32;
stackIDOffset_ = 8;
stackLevelOffset_ = 0;
#else
stackArgPos_ = 0;
stackIDOffset_ = -1;
stackLevelOffset_ = -1;
#endif
// Early exit on !srcPtr.
FixupBranch zeroSrc;
if (id.hasInvalidPtr) {
X64Reg srcReg = regCache_.Find(RegCache::GEN_ARG_TEXPTR);
CMP(PTRBITS, R(srcReg), Imm8(0));
regCache_.Unlock(srcReg, RegCache::GEN_ARG_TEXPTR);
FixupBranch nonZeroSrc = J_CC(CC_NZ);
X64Reg vecResultReg = regCache_.Find(RegCache::VEC_RESULT);
PXOR(vecResultReg, R(vecResultReg));
regCache_.Unlock(vecResultReg, RegCache::VEC_RESULT);
zeroSrc = J(true);
SetJumpTarget(nonZeroSrc);
}
// This reads the pixel data into resultReg from the args.
if (!Jit_ReadTextureFormat(id)) {
regCache_.Reset(false);
EndWrite();
ResetCodePtr(GetOffset(start));
ERROR_LOG(G3D, "Failed to compile fetch %s", DescribeSamplerID(id).c_str());
return nullptr;
}
if (regCache_.Has(RegCache::GEN_ARG_LEVEL))
regCache_.ForceRelease(RegCache::GEN_ARG_LEVEL);
if (regCache_.Has(RegCache::GEN_ARG_ID))
regCache_.ForceRelease(RegCache::GEN_ARG_ID);
X64Reg vecResultReg = regCache_.Find(RegCache::VEC_RESULT);
X64Reg resultReg = regCache_.Find(RegCache::GEN_RESULT);
MOVD_xmm(vecResultReg, R(resultReg));
regCache_.Unlock(resultReg, RegCache::GEN_RESULT);
regCache_.ForceRelease(RegCache::GEN_RESULT);
if (cpu_info.bSSE4_1) {
PMOVZXBD(vecResultReg, R(vecResultReg));
} else {
X64Reg vecTempReg = regCache_.Alloc(RegCache::VEC_TEMP0);
PXOR(vecTempReg, R(vecTempReg));
PUNPCKLBW(vecResultReg, R(vecTempReg));
PUNPCKLWD(vecResultReg, R(vecTempReg));
regCache_.Release(vecTempReg, RegCache::VEC_TEMP0);
}
regCache_.Unlock(vecResultReg, RegCache::VEC_RESULT);
Describe("Init");
if (id.hasInvalidPtr) {
SetJumpTarget(zeroSrc);
}
RET();
regCache_.Reset(true);
EndWrite();
return (FetchFunc)start;
}
NearestFunc SamplerJitCache::CompileNearest(const SamplerID &id) {
_assert_msg_(!id.fetch && !id.linear, "Fetch and linear should be cleared on sampler id");
BeginWrite(2048);
Describe("Init");
// Let's drop some helpful constants here.
WriteConstantPool(id);
const u8 *start = AlignCode16();
regCache_.SetupABI({
RegCache::VEC_ARG_S,
RegCache::VEC_ARG_T,
RegCache::VEC_ARG_COLOR,
RegCache::GEN_ARG_TEXPTR_PTR,
RegCache::GEN_ARG_BUFW_PTR,
RegCache::GEN_ARG_LEVEL,
RegCache::GEN_ARG_LEVELFRAC,
RegCache::GEN_ARG_ID,
});
#if PPSSPP_PLATFORM(WINDOWS)
// RET + shadow space.
stackArgPos_ = 8 + 32;
// Positions: stackArgPos_+0=bufwptr, stackArgPos_+8=level, stackArgPos_+16=levelFrac
stackIDOffset_ = 24;
stackLevelOffset_ = 8;
#else
stackArgPos_ = 0;
// No args on the stack.
stackIDOffset_ = -1;
stackLevelOffset_ = -1;
#endif
// Start out by saving some registers, since we'll need more.
PUSH(R15);
PUSH(R14);
PUSH(R13);
PUSH(R12);
regCache_.Add(R15, RegCache::GEN_INVALID);
regCache_.Add(R14, RegCache::GEN_INVALID);
regCache_.Add(R13, RegCache::GEN_INVALID);
regCache_.Add(R12, RegCache::GEN_INVALID);
stackArgPos_ += 32;
#if PPSSPP_PLATFORM(WINDOWS)
// Use the shadow space to save U1/V1.
stackUV1Offset_ = -8;
#else
// Use the red zone, but account for the R15-R12 we push just below.
stackUV1Offset_ = -stackArgPos_ - 8;
#endif
// We can throw these away right off if there are no mips.
if (!id.hasAnyMips && regCache_.Has(RegCache::GEN_ARG_LEVEL) && id.useSharedClut)
regCache_.ForceRelease(RegCache::GEN_ARG_LEVEL);
if (!id.hasAnyMips && regCache_.Has(RegCache::GEN_ARG_LEVELFRAC))
regCache_.ForceRelease(RegCache::GEN_ARG_LEVELFRAC);
if (regCache_.Has(RegCache::GEN_ARG_LEVELFRAC)) {
// On Linux, RCX is currently levelFrac, but we'll need it for other things.
if (!cpu_info.bBMI2) {
X64Reg levelFracReg = regCache_.Find(RegCache::GEN_ARG_LEVELFRAC);
MOV(64, R(R15), R(levelFracReg));
regCache_.Unlock(levelFracReg, RegCache::GEN_ARG_LEVELFRAC);
regCache_.ForceRelease(RegCache::GEN_ARG_LEVELFRAC);
regCache_.ChangeReg(R15, RegCache::GEN_ARG_LEVELFRAC);
regCache_.ForceRetain(RegCache::GEN_ARG_LEVELFRAC);
}
} else if (!regCache_.Has(RegCache::GEN_ARG_BUFW_PTR)) {
// Let's load bufwptr into regs. RDX is free.
MOV(64, R(RDX), MDisp(RSP, stackArgPos_ + 0));
regCache_.ChangeReg(RDX, RegCache::GEN_ARG_BUFW_PTR);
regCache_.ForceRetain(RegCache::GEN_ARG_BUFW_PTR);
}
// Okay, now lock RCX as a shifting reg.
if (!cpu_info.bBMI2) {
regCache_.ChangeReg(RCX, RegCache::GEN_SHIFTVAL);
regCache_.ForceRetain(RegCache::GEN_SHIFTVAL);
}
bool success = true;
// Convert S/T + X/Y to U/V (and U1/V1 if appropriate.)
success = success && Jit_GetTexelCoords(id);
// At this point, XMM0 should be free. Swap it to the result.
success = success && regCache_.ChangeReg(XMM0, RegCache::VEC_RESULT);
// Let's also pick a reg for GEN_RESULT - doesn't matter which.
X64Reg resultReg = regCache_.Alloc(RegCache::GEN_RESULT);
regCache_.Unlock(resultReg, RegCache::GEN_RESULT);
regCache_.ForceRetain(RegCache::GEN_RESULT);
// Early exit on !srcPtr (either one.)
FixupBranch zeroSrc;
if (id.hasInvalidPtr) {
Describe("NullCheck");
X64Reg srcReg = regCache_.Find(RegCache::GEN_ARG_TEXPTR_PTR);
if (id.hasAnyMips) {
X64Reg tempReg = regCache_.Alloc(RegCache::GEN_TEMP0);
MOV(64, R(tempReg), MDisp(srcReg, 0));
AND(64, R(tempReg), MDisp(srcReg, 8));
CMP(PTRBITS, R(tempReg), Imm8(0));
regCache_.Release(tempReg, RegCache::GEN_TEMP0);
} else {
CMP(PTRBITS, MatR(srcReg), Imm8(0));
}
FixupBranch nonZeroSrc = J_CC(CC_NZ);
PXOR(XMM0, R(XMM0));
zeroSrc = J(true);
SetJumpTarget(nonZeroSrc);
regCache_.Unlock(srcReg, RegCache::GEN_ARG_TEXPTR_PTR);
}
auto loadPtrs = [&](bool level1) {
X64Reg bufwReg = regCache_.Alloc(RegCache::GEN_ARG_BUFW);
X64Reg bufwPtrReg = regCache_.Find(RegCache::GEN_ARG_BUFW_PTR);
MOVZX(32, 16, bufwReg, MDisp(bufwPtrReg, level1 ? 2 : 0));
regCache_.Unlock(bufwPtrReg, RegCache::GEN_ARG_BUFW_PTR);
regCache_.Unlock(bufwReg, RegCache::GEN_ARG_BUFW);
regCache_.ForceRetain(RegCache::GEN_ARG_BUFW);
X64Reg srcReg = regCache_.Alloc(RegCache::GEN_ARG_TEXPTR);
X64Reg srcPtrReg = regCache_.Find(RegCache::GEN_ARG_TEXPTR_PTR);
MOV(64, R(srcReg), MDisp(srcPtrReg, level1 ? 8 : 0));
regCache_.Unlock(srcPtrReg, RegCache::GEN_ARG_TEXPTR_PTR);
regCache_.Unlock(srcReg, RegCache::GEN_ARG_TEXPTR);
regCache_.ForceRetain(RegCache::GEN_ARG_TEXPTR);
};
loadPtrs(false);
success = success && Jit_ReadTextureFormat(id);
// Convert that to 16-bit from 8-bit channels.
X64Reg vecResultReg = regCache_.Find(RegCache::VEC_RESULT);
resultReg = regCache_.Find(RegCache::GEN_RESULT);
MOVD_xmm(vecResultReg, R(resultReg));
if (cpu_info.bSSE4_1) {
PMOVZXBW(vecResultReg, R(vecResultReg));
} else {
X64Reg zeroReg = GetZeroVec();
PUNPCKLBW(vecResultReg, R(zeroReg));
regCache_.Unlock(zeroReg, RegCache::VEC_ZERO);
}
regCache_.Unlock(resultReg, RegCache::GEN_RESULT);
regCache_.Unlock(vecResultReg, RegCache::VEC_RESULT);
if (id.hasAnyMips) {
X64Reg vecResultReg = regCache_.Alloc(RegCache::VEC_RESULT1);
if (regCache_.Has(RegCache::GEN_ARG_LEVELFRAC)) {
X64Reg levelFracReg = regCache_.Find(RegCache::GEN_ARG_LEVELFRAC);
CMP(8, R(levelFracReg), Imm8(0));
regCache_.Unlock(levelFracReg, RegCache::GEN_ARG_LEVELFRAC);
} else {
CMP(8, MDisp(RSP, stackArgPos_ + 16), Imm8(0));
}
FixupBranch skip = J_CC(CC_Z, true);
// Modify the level, so the new level value is used. We don't need the old.
if (regCache_.Has(RegCache::GEN_ARG_LEVEL)) {
X64Reg levelReg = regCache_.Find(RegCache::GEN_ARG_LEVEL);
ADD(32, R(levelReg), Imm8(1));
regCache_.Unlock(levelReg, RegCache::GEN_ARG_LEVEL);
} else {
// It's fine to just modify this in place.
ADD(32, MDisp(RSP, stackArgPos_ + stackLevelOffset_), Imm8(1));
}
// This is inside the conditional, but it's okay because we throw it away after.
loadPtrs(true);
regCache_.ForceRelease(RegCache::GEN_ARG_BUFW_PTR);
regCache_.ForceRelease(RegCache::GEN_ARG_TEXPTR_PTR);
X64Reg uReg = regCache_.Alloc(RegCache::GEN_ARG_U);
MOV(32, R(uReg), MDisp(RSP, stackArgPos_ + stackUV1Offset_ + 0));
regCache_.Unlock(uReg, RegCache::GEN_ARG_U);
regCache_.ForceRetain(RegCache::GEN_ARG_U);
X64Reg vReg = regCache_.Alloc(RegCache::GEN_ARG_V);
MOV(32, R(vReg), MDisp(RSP, stackArgPos_ + stackUV1Offset_ + 4));
regCache_.Unlock(vReg, RegCache::GEN_ARG_V);
regCache_.ForceRetain(RegCache::GEN_ARG_V);
bool hadId = regCache_.Has(RegCache::GEN_ID);
bool hadZero = regCache_.Has(RegCache::VEC_ZERO);
success = success && Jit_ReadTextureFormat(id);
X64Reg resultReg = regCache_.Find(RegCache::GEN_RESULT);
MOVD_xmm(vecResultReg, R(resultReg));
if (cpu_info.bSSE4_1) {
PMOVZXBW(vecResultReg, R(vecResultReg));
} else {
X64Reg zeroReg = GetZeroVec();
PUNPCKLBW(vecResultReg, R(zeroReg));
regCache_.Unlock(zeroReg, RegCache::VEC_ZERO);
}
regCache_.Unlock(resultReg, RegCache::GEN_RESULT);
// Since we're inside a conditional, make sure these go away if we allocated them.
if (!hadId && regCache_.Has(RegCache::GEN_ID))
regCache_.ForceRelease(RegCache::GEN_ID);
if (!hadZero && regCache_.Has(RegCache::VEC_ZERO))
regCache_.ForceRelease(RegCache::VEC_ZERO);
SetJumpTarget(skip);
regCache_.Unlock(vecResultReg, RegCache::VEC_RESULT1);
} else {
regCache_.ForceRelease(RegCache::GEN_ARG_BUFW_PTR);
regCache_.ForceRelease(RegCache::GEN_ARG_TEXPTR_PTR);
}
// We're done with these now.
if (regCache_.Has(RegCache::GEN_ARG_TEXPTR_PTR))
regCache_.ForceRelease(RegCache::GEN_ARG_TEXPTR_PTR);
if (regCache_.Has(RegCache::GEN_ARG_BUFW_PTR))
regCache_.ForceRelease(RegCache::GEN_ARG_BUFW_PTR);
if (regCache_.Has(RegCache::GEN_ARG_LEVEL))
regCache_.ForceRelease(RegCache::GEN_ARG_LEVEL);
if (regCache_.Has(RegCache::GEN_SHIFTVAL))
regCache_.ForceRelease(RegCache::GEN_SHIFTVAL);
regCache_.ForceRelease(RegCache::GEN_RESULT);
if (id.hasAnyMips) {
Describe("BlendMips");
if (!regCache_.Has(RegCache::GEN_ARG_LEVELFRAC)) {
X64Reg levelFracReg = regCache_.Alloc(RegCache::GEN_ARG_LEVELFRAC);
MOVZX(32, 8, levelFracReg, MDisp(RSP, stackArgPos_ + 16));
regCache_.Unlock(levelFracReg, RegCache::GEN_ARG_LEVELFRAC);
regCache_.ForceRetain(RegCache::GEN_ARG_LEVELFRAC);
}
X64Reg levelFracReg = regCache_.Find(RegCache::GEN_ARG_LEVELFRAC);
CMP(8, R(levelFracReg), Imm8(0));
FixupBranch skip = J_CC(CC_Z, true);
// TODO: PMADDWD? Refactor shared?
// First, broadcast the levelFrac value into an XMM.
X64Reg fracReg = regCache_.Alloc(RegCache::VEC_TEMP0);
MOVD_xmm(fracReg, R(levelFracReg));
PSHUFLW(fracReg, R(fracReg), _MM_SHUFFLE(0, 0, 0, 0));
regCache_.Unlock(levelFracReg, RegCache::GEN_ARG_LEVELFRAC);
regCache_.ForceRelease(RegCache::GEN_ARG_LEVELFRAC);
// Multiply level1 color by the fraction.
X64Reg color1Reg = regCache_.Find(RegCache::VEC_RESULT1);
PMULLW(color1Reg, R(fracReg));
// Okay, next we need an inverse for color 0.
X64Reg invFracReg = regCache_.Alloc(RegCache::VEC_TEMP1);
MOVDQA(invFracReg, M(const10All16_));
PSUBW(invFracReg, R(fracReg));
// And multiply.
PMULLW(XMM0, R(invFracReg));
regCache_.Release(fracReg, RegCache::VEC_TEMP0);
regCache_.Release(invFracReg, RegCache::VEC_TEMP1);
// Okay, now sum and divide by 16 (which is what the fraction maxed at.)
PADDW(XMM0, R(color1Reg));
PSRLW(XMM0, 4);
// And now we're done with color1Reg/VEC_RESULT1.
regCache_.Unlock(color1Reg, RegCache::VEC_RESULT1);
regCache_.ForceRelease(RegCache::VEC_RESULT1);
SetJumpTarget(skip);
}
// Finally, it's time to apply the texture function.
success = success && Jit_ApplyTextureFunc(id);
// Last of all, convert to 32-bit channels.
Describe("Init");
if (cpu_info.bSSE4_1) {
PMOVZXWD(XMM0, R(XMM0));
} else {
X64Reg zeroReg = GetZeroVec();
PUNPCKLWD(XMM0, R(zeroReg));
regCache_.Unlock(zeroReg, RegCache::VEC_ZERO);
}
regCache_.ForceRelease(RegCache::VEC_RESULT);
if (regCache_.Has(RegCache::GEN_ARG_ID))
regCache_.ForceRelease(RegCache::GEN_ARG_ID);
if (!success) {
regCache_.Reset(false);
EndWrite();
ResetCodePtr(GetOffset(start));
ERROR_LOG(G3D, "Failed to compile nearest %s", DescribeSamplerID(id).c_str());
return nullptr;
}
if (id.hasInvalidPtr) {
SetJumpTarget(zeroSrc);
}
POP(R12);
POP(R13);
POP(R14);
POP(R15);
RET();
regCache_.Reset(true);
EndWrite();
return (NearestFunc)start;
}
LinearFunc SamplerJitCache::CompileLinear(const SamplerID &id) {
_assert_msg_(id.linear && !id.fetch, "Only linear should be set on sampler id");
BeginWrite(2048);
Describe("Init");
// We don't use stackArgPos_ here, this is just for DXT.
stackArgPos_ = -1;
// Let's drop some helpful constants here.
WriteConstantPool(id);
const u8 *nearest = nullptr;
if (id.TexFmt() >= GE_TFMT_DXT1) {
regCache_.SetupABI({
RegCache::GEN_ARG_U,
RegCache::GEN_ARG_V,
RegCache::GEN_ARG_TEXPTR,
RegCache::GEN_ARG_BUFW,
RegCache::GEN_ARG_LEVEL,
// Avoid clobber.
RegCache::GEN_ARG_LEVELFRAC,
});
auto lockReg = [&](X64Reg r, RegCache::Purpose p) {
regCache_.ChangeReg(r, p);
regCache_.ForceRetain(p);
};
lockReg(RAX, RegCache::GEN_RESULT);
lockReg(XMM0, RegCache::VEC_ARG_U);
lockReg(XMM1, RegCache::VEC_ARG_V);
lockReg(XMM5, RegCache::VEC_RESULT);
#if !PPSSPP_PLATFORM(WINDOWS)
if (id.hasAnyMips) {
lockReg(XMM6, RegCache::VEC_U1);
lockReg(XMM7, RegCache::VEC_V1);
lockReg(XMM8, RegCache::VEC_RESULT1);
lockReg(XMM12, RegCache::VEC_INDEX1);
}
lockReg(XMM9, RegCache::VEC_ARG_COLOR);
lockReg(XMM10, RegCache::VEC_FRAC);
lockReg(XMM11, RegCache::VEC_INDEX);
#endif
// We'll first write the nearest sampler, which we will CALL.
// This may differ slightly based on the "linear" flag.
nearest = AlignCode16();
if (!Jit_ReadTextureFormat(id)) {
regCache_.Reset(false);
EndWrite();
ResetCodePtr(GetOffset(nearest));
ERROR_LOG(G3D, "Failed to compile linear nearest %s", DescribeSamplerID(id).c_str());
return nullptr;
}
Describe("Init");
RET();
regCache_.ForceRelease(RegCache::GEN_RESULT);
regCache_.ForceRelease(RegCache::VEC_ARG_U);
regCache_.ForceRelease(RegCache::VEC_ARG_V);
regCache_.ForceRelease(RegCache::VEC_RESULT);
auto unlockOptReg = [&](RegCache::Purpose p) {
if (regCache_.Has(p))
regCache_.ForceRelease(p);
};
unlockOptReg(RegCache::GEN_ARG_LEVEL);
unlockOptReg(RegCache::GEN_ARG_LEVELFRAC);
unlockOptReg(RegCache::VEC_U1);
unlockOptReg(RegCache::VEC_V1);
unlockOptReg(RegCache::VEC_RESULT1);
unlockOptReg(RegCache::VEC_ARG_COLOR);
unlockOptReg(RegCache::VEC_FRAC);
unlockOptReg(RegCache::VEC_INDEX);
unlockOptReg(RegCache::VEC_INDEX1);
regCache_.Reset(true);
}
EndWrite();
// Now the actual linear func, which is exposed externally.
const u8 *linearResetPos = GetCodePointer();
Describe("Init");
regCache_.SetupABI({
RegCache::VEC_ARG_S,
RegCache::VEC_ARG_T,
RegCache::VEC_ARG_COLOR,
RegCache::GEN_ARG_TEXPTR_PTR,
RegCache::GEN_ARG_BUFW_PTR,
RegCache::GEN_ARG_LEVEL,
RegCache::GEN_ARG_LEVELFRAC,
RegCache::GEN_ARG_ID,
});
#if PPSSPP_PLATFORM(WINDOWS)
// RET + shadow space.
stackArgPos_ = 8 + 32;
// Free up some more vector regs on Windows too, where we're a bit tight.
stackArgPos_ += WriteProlog(0, { XMM6, XMM7, XMM8, XMM9, XMM10, XMM11, XMM12 }, { R15, R14, R13, R12 });
// Positions: stackArgPos_+0=bufwptr, stackArgPos_+8=level, stackArgPos_+16=levelFrac
stackIDOffset_ = 24;
stackLevelOffset_ = 8;
// If needed, we could store UV1 data in shadow space, but we no longer do.
stackUV1Offset_ = -8;
#else
stackArgPos_ = 0;
stackArgPos_ += WriteProlog(0, {}, { R15, R14, R13, R12 });
stackIDOffset_ = -1;
stackLevelOffset_ = -1;
// Use the red zone.
stackUV1Offset_ = -stackArgPos_ - 8;
#endif
// This is what we'll put in them, anyway...
if (nearest != nullptr) {
regCache_.ChangeReg(XMM10, RegCache::VEC_FRAC);
regCache_.ForceRetain(RegCache::VEC_FRAC);
regCache_.ChangeReg(XMM11, RegCache::VEC_INDEX);
regCache_.ForceRetain(RegCache::VEC_INDEX);
if (id.hasAnyMips) {
regCache_.ChangeReg(XMM12, RegCache::VEC_INDEX1);
regCache_.ForceRetain(RegCache::VEC_INDEX1);
}
}
// Reserve a couple regs that the nearest CALL won't use.
if (id.hasAnyMips) {
regCache_.ChangeReg(XMM6, RegCache::VEC_U1);
regCache_.ChangeReg(XMM7, RegCache::VEC_V1);
regCache_.ForceRetain(RegCache::VEC_U1);
regCache_.ForceRetain(RegCache::VEC_V1);
} else if (regCache_.Has(RegCache::GEN_ARG_LEVELFRAC)) {
regCache_.ForceRelease(RegCache::GEN_ARG_LEVELFRAC);
}
// Save prim color for later in a different XMM too if we're using the nearest helper.
if (nearest != nullptr) {
X64Reg primColorReg = regCache_.Find(RegCache::VEC_ARG_COLOR);
MOVDQA(XMM9, R(primColorReg));
regCache_.Unlock(primColorReg, RegCache::VEC_ARG_COLOR);
regCache_.ForceRelease(RegCache::VEC_ARG_COLOR);
regCache_.ChangeReg(XMM9, RegCache::VEC_ARG_COLOR);
regCache_.ForceRetain(RegCache::VEC_ARG_COLOR);
}
// We also want to save src and bufw for later. Might be in a reg already.
if (regCache_.Has(RegCache::GEN_ARG_TEXPTR_PTR) && regCache_.Has(RegCache::GEN_ARG_BUFW_PTR)) {
X64Reg srcReg = regCache_.Find(RegCache::GEN_ARG_TEXPTR_PTR);
X64Reg bufwReg = regCache_.Find(RegCache::GEN_ARG_BUFW_PTR);
MOV(64, R(R14), R(srcReg));
MOV(64, R(R15), R(bufwReg));
regCache_.Unlock(srcReg, RegCache::GEN_ARG_TEXPTR_PTR);
regCache_.Unlock(bufwReg, RegCache::GEN_ARG_BUFW_PTR);
regCache_.ForceRelease(RegCache::GEN_ARG_TEXPTR_PTR);
regCache_.ForceRelease(RegCache::GEN_ARG_BUFW_PTR);
} else if (regCache_.Has(RegCache::GEN_ARG_TEXPTR_PTR)) {
X64Reg srcReg = regCache_.Find(RegCache::GEN_ARG_TEXPTR_PTR);
MOV(64, R(R14), R(srcReg));
regCache_.Unlock(srcReg, RegCache::GEN_ARG_TEXPTR_PTR);
regCache_.ForceRelease(RegCache::GEN_ARG_TEXPTR_PTR);
MOV(64, R(R15), MDisp(RSP, stackArgPos_ + 0));
} else {
MOV(64, R(R14), MDisp(RSP, stackArgPos_ + 0));
MOV(64, R(R15), MDisp(RSP, stackArgPos_ + 8));
}
// Okay, and now remember we moved to R14/R15.
regCache_.ChangeReg(R14, RegCache::GEN_ARG_TEXPTR_PTR);
regCache_.ForceRetain(RegCache::GEN_ARG_TEXPTR_PTR);
if (!regCache_.Has(RegCache::GEN_ARG_BUFW_PTR)) {
regCache_.ChangeReg(R15, RegCache::GEN_ARG_BUFW_PTR);
regCache_.ForceRetain(RegCache::GEN_ARG_BUFW_PTR);
}
bool success = true;
// Our first goal is to convert S/T and X/Y into U/V and frac_u/frac_v.
success = success && Jit_GetTexelCoordsQuad(id);
// Early exit on !srcPtr (either one.)
FixupBranch zeroSrc;
if (id.hasInvalidPtr) {
Describe("NullCheck");
X64Reg srcReg = regCache_.Find(RegCache::GEN_ARG_TEXPTR_PTR);
if (id.hasAnyMips) {
X64Reg tempReg = regCache_.Alloc(RegCache::GEN_TEMP0);
MOV(64, R(tempReg), MDisp(srcReg, 0));
AND(64, R(tempReg), MDisp(srcReg, 8));
CMP(PTRBITS, R(tempReg), Imm8(0));
regCache_.Release(tempReg, RegCache::GEN_TEMP0);
} else {
CMP(PTRBITS, MatR(srcReg), Imm8(0));
}
FixupBranch nonZeroSrc = J_CC(CC_NZ);
PXOR(XMM0, R(XMM0));
zeroSrc = J(true);
SetJumpTarget(nonZeroSrc);
regCache_.Unlock(srcReg, RegCache::GEN_ARG_TEXPTR_PTR);
}
auto prepareDataOffsets = [&](RegCache::Purpose uPurpose, RegCache::Purpose vPurpose, bool level1) {
X64Reg uReg = regCache_.Find(uPurpose);
X64Reg vReg = regCache_.Find(vPurpose);
success = success && Jit_PrepareDataOffsets(id, uReg, vReg, level1);
regCache_.Unlock(uReg, uPurpose);
regCache_.Unlock(vReg, vPurpose);
};
Describe("DataOffsets");
prepareDataOffsets(RegCache::VEC_ARG_U, RegCache::VEC_ARG_V, false);
if (id.hasAnyMips)
prepareDataOffsets(RegCache::VEC_U1, RegCache::VEC_V1, true);
// The data offset goes into V, except in the CLUT4 case and DXT (nearest func) cases.
if (nearest == nullptr && id.TexFmt() != GE_TFMT_CLUT4)
regCache_.ForceRelease(RegCache::VEC_ARG_U);
// Hard allocate results if we're using the func method.
if (nearest != nullptr) {
regCache_.ChangeReg(XMM5, RegCache::VEC_RESULT);
regCache_.ForceRetain(RegCache::VEC_RESULT);
if (id.hasAnyMips) {
regCache_.ChangeReg(XMM8, RegCache::VEC_RESULT1);
regCache_.ForceRetain(RegCache::VEC_RESULT1);
}
}
// This stores the result in an XMM for later processing.
// We map lookups to nearest CALLs, with arg order: u, v, src, bufw, level
auto doNearestCall = [&](int off, bool level1) {
#if PPSSPP_PLATFORM(WINDOWS)
static const X64Reg uArgReg = RCX;
static const X64Reg vArgReg = RDX;
static const X64Reg srcArgReg = R8;
static const X64Reg bufwArgReg = R9;
#else
static const X64Reg uArgReg = RDI;
static const X64Reg vArgReg = RSI;
static const X64Reg srcArgReg = RDX;
static const X64Reg bufwArgReg = RCX;
#endif
static const X64Reg resultReg = RAX;
X64Reg uReg = regCache_.Find(level1 ? RegCache::VEC_U1 : RegCache::VEC_ARG_U);
X64Reg vReg = regCache_.Find(level1 ? RegCache::VEC_V1 : RegCache::VEC_ARG_V);
// Otherwise, we'll overwrite them...
_assert_(level1 || (uReg == XMM0 && vReg == XMM1));
if (cpu_info.bSSE4_1) {
PEXTRD(R(uArgReg), uReg, off / 4);
PEXTRD(R(vArgReg), vReg, off / 4);
} else {
MOVD_xmm(R(uArgReg), uReg);
MOVD_xmm(R(vArgReg), vReg);
PSRLDQ(uReg, 4);
PSRLDQ(vReg, 4);
}
regCache_.Unlock(uReg, level1 ? RegCache::VEC_U1 : RegCache::VEC_ARG_U);
regCache_.Unlock(vReg, level1 ? RegCache::VEC_V1 : RegCache::VEC_ARG_V);
X64Reg indexReg = regCache_.Find(level1 ? RegCache::VEC_INDEX1 : RegCache::VEC_INDEX);
if (cpu_info.bSSE4_1) {
PEXTRD(R(srcArgReg), indexReg, off / 4);
} else {
MOVD_xmm(R(srcArgReg), indexReg);
PSRLDQ(indexReg, 4);
}
regCache_.Unlock(indexReg, level1 ? RegCache::VEC_INDEX1 : RegCache::VEC_INDEX);
X64Reg srcReg = regCache_.Find(RegCache::GEN_ARG_TEXPTR_PTR);
X64Reg bufwReg = regCache_.Find(RegCache::GEN_ARG_BUFW_PTR);
ADD(64, R(srcArgReg), MDisp(srcReg, level1 ? 8 : 0));
MOVZX(32, 16, bufwArgReg, MDisp(bufwReg, level1 ? 2 : 0));
// Leave level/levelFrac, we just always load from RAM on Windows and lock on POSIX.
regCache_.Unlock(srcReg, RegCache::GEN_ARG_TEXPTR_PTR);
regCache_.Unlock(bufwReg, RegCache::GEN_ARG_BUFW_PTR);
CALL(nearest);
X64Reg vecResultReg = regCache_.Find(level1 ? RegCache::VEC_RESULT1 : RegCache::VEC_RESULT);
if (cpu_info.bSSE4_1) {
PINSRD(vecResultReg, R(resultReg), off / 4);
} else if (off == 0) {
MOVD_xmm(vecResultReg, R(resultReg));
} else {
X64Reg tempReg = regCache_.Alloc(RegCache::VEC_TEMP0);
MOVD_xmm(tempReg, R(resultReg));
PSLLDQ(tempReg, off);
POR(vecResultReg, R(tempReg));
regCache_.Release(tempReg, RegCache::VEC_TEMP0);
}
regCache_.Unlock(vecResultReg, level1 ? RegCache::VEC_RESULT1 : RegCache::VEC_RESULT);
};
if (nearest != nullptr) {
Describe("Calls");
doNearestCall(0, false);
doNearestCall(4, false);
doNearestCall(8, false);
doNearestCall(12, false);
// After doing the calls, certain cached things aren't safe.
if (regCache_.Has(RegCache::GEN_ID))
regCache_.ForceRelease(RegCache::GEN_ID);
if (regCache_.Has(RegCache::VEC_ZERO))
regCache_.ForceRelease(RegCache::VEC_ZERO);
} else {
success = success && Jit_FetchQuad(id, false);
}
if (id.hasAnyMips) {
Describe("MipsCalls");
if (regCache_.Has(RegCache::GEN_ARG_LEVELFRAC)) {
X64Reg levelFracReg = regCache_.Find(RegCache::GEN_ARG_LEVELFRAC);
CMP(8, R(levelFracReg), Imm8(0));
regCache_.Unlock(levelFracReg, RegCache::GEN_ARG_LEVELFRAC);
} else {
CMP(8, MDisp(RSP, stackArgPos_ + 16), Imm8(0));
}
FixupBranch skip = J_CC(CC_Z, true);
// Modify the level, so the new level value is used. We don't need the old.
if (regCache_.Has(RegCache::GEN_ARG_LEVEL)) {
X64Reg levelReg = regCache_.Find(RegCache::GEN_ARG_LEVEL);
ADD(32, R(levelReg), Imm8(1));
regCache_.Unlock(levelReg, RegCache::GEN_ARG_LEVEL);
} else {
// It's fine to just modify this in place.
ADD(32, MDisp(RSP, stackArgPos_ + stackLevelOffset_), Imm8(1));
}
if (nearest != nullptr) {
Describe("MipsCalls");
doNearestCall(0, true);
doNearestCall(4, true);
doNearestCall(8, true);
doNearestCall(12, true);
} else {
success = success && Jit_FetchQuad(id, true);
}
SetJumpTarget(skip);
}
// We're done with these now.
if (nearest != nullptr) {
regCache_.ForceRelease(RegCache::VEC_ARG_U);
regCache_.ForceRelease(RegCache::VEC_ARG_V);
regCache_.ForceRelease(RegCache::VEC_INDEX);
}
if (regCache_.Has(RegCache::VEC_INDEX1))
regCache_.ForceRelease(RegCache::VEC_INDEX1);
if (regCache_.Has(RegCache::VEC_U1))
regCache_.ForceRelease(RegCache::VEC_U1);
if (regCache_.Has(RegCache::VEC_V1))
regCache_.ForceRelease(RegCache::VEC_V1);
regCache_.ForceRelease(RegCache::GEN_ARG_TEXPTR_PTR);
regCache_.ForceRelease(RegCache::GEN_ARG_BUFW_PTR);
if (regCache_.Has(RegCache::GEN_ARG_LEVEL))
regCache_.ForceRelease(RegCache::GEN_ARG_LEVEL);
success = success && Jit_DecodeQuad(id, false);
success = success && Jit_BlendQuad(id, false);
if (id.hasAnyMips) {
Describe("BlendMips");
if (!regCache_.Has(RegCache::GEN_ARG_LEVELFRAC)) {
X64Reg levelFracReg = regCache_.Alloc(RegCache::GEN_ARG_LEVELFRAC);
MOVZX(32, 8, levelFracReg, MDisp(RSP, stackArgPos_ + 16));
regCache_.Unlock(levelFracReg, RegCache::GEN_ARG_LEVELFRAC);
regCache_.ForceRetain(RegCache::GEN_ARG_LEVELFRAC);
}
X64Reg levelFracReg = regCache_.Find(RegCache::GEN_ARG_LEVELFRAC);
CMP(8, R(levelFracReg), Imm8(0));
FixupBranch skip = J_CC(CC_Z, true);
success = success && Jit_DecodeQuad(id, true);
success = success && Jit_BlendQuad(id, true);
Describe("BlendMips");
// First, broadcast the levelFrac value into an XMM.
X64Reg fracReg = regCache_.Alloc(RegCache::VEC_TEMP0);
MOVD_xmm(fracReg, R(levelFracReg));
PSHUFLW(fracReg, R(fracReg), _MM_SHUFFLE(0, 0, 0, 0));
regCache_.Unlock(levelFracReg, RegCache::GEN_ARG_LEVELFRAC);
regCache_.ForceRelease(RegCache::GEN_ARG_LEVELFRAC);
// Multiply level1 color by the fraction.
X64Reg color1Reg = regCache_.Find(RegCache::VEC_RESULT1);
PMULLW(color1Reg, R(fracReg));
// Okay, next we need an inverse for color 0.
X64Reg invFracReg = regCache_.Alloc(RegCache::VEC_TEMP1);
MOVDQA(invFracReg, M(const10All16_));
PSUBW(invFracReg, R(fracReg));
// And multiply.
PMULLW(XMM0, R(invFracReg));
regCache_.Release(fracReg, RegCache::VEC_TEMP0);
regCache_.Release(invFracReg, RegCache::VEC_TEMP1);
// Okay, now sum and divide by 16 (which is what the fraction maxed at.)
PADDW(XMM0, R(color1Reg));
PSRLW(XMM0, 4);
// And now we're done with color1Reg/VEC_RESULT1.
regCache_.Unlock(color1Reg, RegCache::VEC_RESULT1);
regCache_.ForceRelease(RegCache::VEC_RESULT1);
SetJumpTarget(skip);
}
if (regCache_.Has(RegCache::VEC_FRAC))
regCache_.ForceRelease(RegCache::VEC_FRAC);
// Finally, it's time to apply the texture function.
success = success && Jit_ApplyTextureFunc(id);
// Last of all, convert to 32-bit channels.
Describe("Init");
if (cpu_info.bSSE4_1) {
PMOVZXWD(XMM0, R(XMM0));
} else {
X64Reg zeroReg = GetZeroVec();
PUNPCKLWD(XMM0, R(zeroReg));
regCache_.Unlock(zeroReg, RegCache::VEC_ZERO);
}
regCache_.ForceRelease(RegCache::VEC_RESULT);
if (regCache_.Has(RegCache::GEN_ARG_ID))
regCache_.ForceRelease(RegCache::GEN_ARG_ID);
if (!success) {
regCache_.Reset(false);
EndWrite();
ResetCodePtr(GetOffset(nearest ? nearest : linearResetPos));
ERROR_LOG(G3D, "Failed to compile linear %s", DescribeSamplerID(id).c_str());
return nullptr;
}
if (id.hasInvalidPtr) {
SetJumpTarget(zeroSrc);
}
const u8 *start = WriteFinalizedEpilog();
regCache_.Reset(true);
return (LinearFunc)start;
}
void SamplerJitCache::WriteConstantPool(const SamplerID &id) {
// We reuse constants in any pool, because our code space is small.
WriteSimpleConst8x16(const10All16_, 0x10);
WriteSimpleConst16x8(const10All8_, 0x10);
if (const10Low_ == nullptr) {
const10Low_ = AlignCode16();
for (int i = 0; i < 4; ++i)
Write16(0x10);
for (int i = 0; i < 4; ++i)
Write16(0);
}
WriteSimpleConst4x32(constOnes32_, 1);
WriteSimpleConst8x16(constOnes16_, 1);
// This is the mask for clamp or wrap, the max texel in the S or T direction.
WriteSimpleConst4x32(constMaxTexel32_, 511);
if (constUNext_ == nullptr) {
constUNext_ = AlignCode16();
Write32(0); Write32(1); Write32(0); Write32(1);
}
if (constVNext_ == nullptr) {
constVNext_ = AlignCode16();
Write32(0); Write32(0); Write32(1); Write32(1);
}
WriteSimpleConst4x32(const5551Swizzle_, 0x00070707);
WriteSimpleConst4x32(const5650Swizzle_, 0x00070307);
// These are unique to the sampler ID.
if (!id.hasAnyMips) {
float w256f = (1 << id.width0Shift) * 256;
float h256f = (1 << id.height0Shift) * 256;
constWidthHeight256f_ = AlignCode16();
Write32(*(uint32_t *)&w256f);
Write32(*(uint32_t *)&h256f);
Write32(*(uint32_t *)&w256f);
Write32(*(uint32_t *)&h256f);
WriteDynamicConst4x32(constWidthMinus1i_, id.width0Shift > 9 ? 511 : (1 << id.width0Shift) - 1);
WriteDynamicConst4x32(constHeightMinus1i_, id.height0Shift > 9 ? 511 : (1 << id.height0Shift) - 1);
} else {
constWidthHeight256f_ = nullptr;
constWidthMinus1i_ = nullptr;
constHeightMinus1i_ = nullptr;
}
}
RegCache::Reg SamplerJitCache::GetSamplerID() {
if (regCache_.Has(RegCache::GEN_ARG_ID))
return regCache_.Find(RegCache::GEN_ARG_ID);
if (!regCache_.Has(RegCache::GEN_ID)) {
X64Reg r = regCache_.Alloc(RegCache::GEN_ID);
_assert_(stackIDOffset_ != -1);
MOV(PTRBITS, R(r), MDisp(RSP, stackArgPos_ + stackIDOffset_));
return r;
}
return regCache_.Find(RegCache::GEN_ID);
}
void SamplerJitCache::UnlockSamplerID(RegCache::Reg &r) {
if (regCache_.Has(RegCache::GEN_ARG_ID))
regCache_.Unlock(r, RegCache::GEN_ARG_ID);
else
regCache_.Unlock(r, RegCache::GEN_ID);
}
bool SamplerJitCache::Jit_FetchQuad(const SamplerID &id, bool level1) {
bool success = true;
switch (id.TexFmt()) {
case GE_TFMT_5650:
case GE_TFMT_5551:
case GE_TFMT_4444:
success = Jit_GetDataQuad(id, level1, 16);
// Mask away the high bits, if loaded via AVX2.
if (cpu_info.bAVX2) {
X64Reg destReg = regCache_.Find(level1 ? RegCache::VEC_RESULT1 : RegCache::VEC_RESULT);
PSLLD(destReg, 16);
PSRLD(destReg, 16);
regCache_.Unlock(destReg, level1 ? RegCache::VEC_RESULT1 : RegCache::VEC_RESULT);
}
break;
case GE_TFMT_8888:
success = Jit_GetDataQuad(id, level1, 32);
break;
case GE_TFMT_CLUT32:
success = Jit_GetDataQuad(id, level1, 32);
if (success)
success = Jit_TransformClutIndexQuad(id, 32);
if (success)
success = Jit_ReadClutQuad(id, level1);
break;
case GE_TFMT_CLUT16:
success = Jit_GetDataQuad(id, level1, 16);
if (success)
success = Jit_TransformClutIndexQuad(id, 16);
if (success)
success = Jit_ReadClutQuad(id, level1);
break;
case GE_TFMT_CLUT8:
success = Jit_GetDataQuad(id, level1, 8);