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CHROMIUM: ASOC: Samsung: Change MAX98095 MCLK input clk
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This patch configures the codec system clock with xclkout.
with out this patch there is a error while playing 8,22.05,
32KHz sampling rate files. The error was

max98095 7-0011: Invalid master clock frequency
[ 46.194905] asoc: machine hw_params failed: -22
Stream error -22

BUG=chrome-os-partner:12733
TEST=Tested with all supported sampling frequencys in cramfs.
All are playing fine except 8KHz and 32KHz are playing with
some error messages like below

[ 1262.417869] exynos5_epll_set_rate: Invalid Clock EPLL Frequency
[ 1262.417885] failed to clk_set_rate of fout_epll for audio

Change-Id: I5891ac9bbae1eeb6befb6992699e59e3e8977c24
Signed-off-by: R. Chandrasekar <[email protected]>
Signed-off-by: Padmavathi Venna <[email protected]>
Reviewed-on: https://gerrit.chromium.org/gerrit/30538
Reviewed-by: Dylan Reid <[email protected]>
Commit-Ready: Doug Anderson <[email protected]>
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padmav16 authored and hsnaves committed Jun 30, 2014
1 parent ce029e0 commit 3afa3f9
Showing 1 changed file with 12 additions and 1 deletion.
13 changes: 12 additions & 1 deletion sound/soc/samsung/daisy_max98095.c
Original file line number Diff line number Diff line change
Expand Up @@ -148,6 +148,8 @@ static int daisy_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
int bfs, psr, rfs, ret;
unsigned long rclk;
unsigned long xtal;
struct clk *xtal_clk;

switch (params_format(params)) {
case SNDRV_PCM_FORMAT_U24:
Expand Down Expand Up @@ -239,7 +241,16 @@ static int daisy_hw_params(struct snd_pcm_substream *substream,
if (ret < 0)
return ret;

ret = snd_soc_dai_set_sysclk(codec_dai, 0, rclk, SND_SOC_CLOCK_IN);
xtal_clk = clk_get(NULL, "xtal"); /*xtal clk is input to codec MCLK1*/
if (IS_ERR(xtal_clk)) {
printk(KERN_ERR "%s: failed to get xtal clock\n", __func__);
return PTR_ERR(xtal_clk);
}

xtal = clk_get_rate(xtal_clk);
clk_put(xtal_clk);

ret = snd_soc_dai_set_sysclk(codec_dai, 0, xtal, SND_SOC_CLOCK_IN);
if (ret < 0)
return ret;

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