From d94a49ccf86bd00fc4d957bccc83a0ef9eaad829 Mon Sep 17 00:00:00 2001 From: Iggy Drougge Date: Sun, 1 Sep 2019 17:46:44 +0200 Subject: [PATCH 1/4] Add common extensions to Motorola 68k --- lib/linguist/languages.yml | 11 +- .../Motorola 68K Assembly/bls_routines.inc | 280 ++ samples/Motorola 68K Assembly/cpu.s | 70 + samples/Motorola 68K Assembly/iff_ilbm.i | 130 + .../Motorola 68K Assembly/rom_testbench.asm | 2983 +++++++++++++++++ samples/Motorola 68K Assembly/system.s | 384 +++ 6 files changed, 3855 insertions(+), 3 deletions(-) create mode 100644 samples/Motorola 68K Assembly/bls_routines.inc create mode 100644 samples/Motorola 68K Assembly/cpu.s create mode 100644 samples/Motorola 68K Assembly/iff_ilbm.i create mode 100644 samples/Motorola 68K Assembly/rom_testbench.asm create mode 100644 samples/Motorola 68K Assembly/system.s diff --git a/lib/linguist/languages.yml b/lib/linguist/languages.yml index 4adb6e2e30..649192b369 100755 --- a/lib/linguist/languages.yml +++ b/lib/linguist/languages.yml @@ -3224,11 +3224,16 @@ MoonScript: language_id: 238 Motorola 68K Assembly: type: programming - group: Assembly + aliases: + - m68k extensions: - - ".X68" + - ".asm" + - ".i" + - ".inc" + - ".s" + - ".x68" tm_scope: source.m68k - ace_mode: assembly_x86 + ace_mode: text language_id: 477582706 Myghty: type: programming diff --git a/samples/Motorola 68K Assembly/bls_routines.inc b/samples/Motorola 68K Assembly/bls_routines.inc new file mode 100644 index 0000000000..8861f84a08 --- /dev/null +++ b/samples/Motorola 68K Assembly/bls_routines.inc @@ -0,0 +1,280 @@ +; Fill memory with the same word value +BLSFASTFILL_WORD macro dest, words, value + if words == 0 + elsif words == 1 + move.w dest, value + else + lea dest, a1 + if words <= 128 + clr d0 + moveq words - 1, d0 + else + move.w words - 1, d0 + endif +.fastfill\? + move.w value, (a0)+ + dbra d0, .fastfill\? + endif + endm + +BLSFASTFILL macro dest, value, bytes + if bytes > 0 + if bytes == 1 + if value == 0 + clr.b dest + else + move.b #value, dest + endif + elsif bytes == 2 + if value == 0 + clr.w dest + else + move.w #(value<<8) | value, dest + endif + elsif bytes == 4 + if value == 0 + clr.l dest + else + move.l #(value<<24)|(value<<16)|(value<<8)|value, dest + endif + else + lea dest + bytes, a0 + if bytes == 3 && value == 0 + clr.w -(a0) + clr.b -(a0) + else + + if value == 0 + moveq #0, d0 + else + movei.l #(value<<24)|(value<<16)|(value<<8)|value, d0 + endif + + if bytes & 1 + move.b d0, -(a0) + endif + + if bytes < 32 + BLSREPEAT2 bytes / 4, move.l d0, -(a0) + BLSREPEAT2 (bytes / 2) * 2 - (bytes / 4) * 4, move.w d0, -(a0) + elsif bytes < 128 + move.l d0, a1 + move.l d0, d1 + BLSREPEAT2 bytes / 12, movem.l d0-d1/a1, -(a0) + if (bytes % 12) >= 10 + movem.l d0-d1, -(a0) + move.w d0, -(a0) + elsif (bytes % 12) >= 8 + movem.l d0-d1, -(a0) + elsif (bytes % 12) >= 6 + move.l d0, -(a0) + move.w d0, -(a0) + elsif (bytes % 12) >= 4 + move.l d0, -(a0) + elsif (bytes % 12) >= 2 + move.w d0, -(a0) + endif + else + if bytes & 2 + move.w d0, -(a0) + endif + + movem.l d2-d7, -(sp) + move.l d0, a1 + move.l d0, d2 + move.l d0, d3 + move.l d0, d4 + move.l d0, d5 + move.l d0, d6 + move.l d0, d7 + if bytes < 512 + BLSREPEAT2 bytes / 32, movem.l d0/a1/d2-d7, -(a0) + if (bytes % 32) >= 28 + movem.l d0/a1/d2-d6, -(a0) + elsif (bytes % 32) >= 24 + movem.l d0/a1/d2-d5, -(a0) + elsif (bytes % 32) >= 20 + movem.l d0/a1/d2-d4, -(a0) + elsif (bytes % 32) >= 16 + movem.l d0/a1/d2-d3, -(a0) + elsif (bytes % 32) >= 12 + movem.l d0/a1/d2, -(a0) + elsif (bytes % 32) >= 8 + movem.l d0/a1, -(a0) + elsif (bytes % 32) >= 4 + move.l d0, -(a0) + endif + else + if bytes / 32 < 256 + moveq #(bytes / 32) - 1, d1 + else + movei.w #(bytes / 32) - 1, d1 + endif +.blsfill_loop\? + movem.l d0/a1/d2-d7, -(a0) + dbra d1, .blsfill_loop\? + if (bytes % 32) >= 28 + movem.l d0/a1/d2-d6, -(a0) + elsif (bytes % 32) >= 24 + movem.l d0/a1/d2-d5, -(a0) + elsif (bytes % 32) >= 20 + movem.l d0/a1/d2-d4, -(a0) + elsif (bytes % 32) >= 16 + movem.l d0/a1/d2-d3, -(a0) + elsif (bytes % 32) >= 12 + movem.l d0/a1/d2, -(a0) + elsif (bytes % 32) >= 8 + movem.l d0/a1, -(a0) + elsif (bytes % 32) >= 4 + move.l d0, -(a0) + endif + endif + movem.l (sp)+, d2-d7 + endif + + + endif + endif + endif + endm + + +; Copy memory from word-aligned addresses. +; dest and src can be anything supported by LEA. +; Addresses must be aligned to a word boundary. +; bytes is the number of bytes to copy. It must be <= 2097152. +; returns address past dest in a1 and past src in a0 +BLSFASTCOPY_ALIGNED macro dest, src, bytes + if bytes == 0 + else + + lea src, a0 ; a0 = src : Load source and dest address + lea dest, a1 ; a1 = dst + + if bytes >= $60 + + movem.l d2-d7/a2, -(a7) + ; Compute d0 = block count, a0 = src address, a1 = dest address + if bytes < ($100*$20) ; Try to load value into d0 using moveq + moveq #(bytes/$20)-1, d0 ; Compute number of $20 bytes blocks + else + move.w #(bytes/$20)-1, d0 ; Use slower move immediate + endif + + ; Do block copy +.blockcopy_loop\? + movem.l (a0)+, d1-d7/a2 + movem.l d1-d7/a2, (a1) + lea $20(a1), a1 + dbra d0, .blockcopy_loop\? + + movem.l (a7)+, d2-d7/a2 + + ; Copy long data remainder with move.l expansion + BLSREPEAT2 (bytes & $1F) / 4, move.l (a0)+, (a1)+ + + else + ; Expanded move.l copy + BLSREPEAT2 bytes / 4, move.l (a0)+, (a1)+ + endif + + BLSREPEAT2 (bytes & 3) / 2, move.w (a0)+, (a1)+ + BLSREPEAT2 (bytes & 1), move.b (a0)+, (a1)+ + + endif + endm + +BLS_SETINTVECTOR macro vect, target + if SCD != 0 + movem.l d0/a0, -(a7) + ; Put target in d0 and vector in a0 + move.l #target, d0 + lea vect, a0 + cmp.l d0, (a0) ; Check if vector in ROM already jumps to the correct address + beq.b .vector_set\? + move.l (a0), a0 ; Point a0 to the target of the interrupt handler + move.w #$4EF9, (a0)+ ; Write JMP instruction + move.l d0, (a0)+ ; JMP to the target +.vector_set\? + movem.l (a7)+, d0/a0 + endif + endm + + +BLS_ENABLE_INTERRUPTS macro + andi #$F8FF, SR + endm + +BLS_DISABLE_INTERRUPTS macro + ori #$0700, SR + endm + +ENTER_MONITOR macro + trap #07 + endm + +; Delay for a number of CPU cycles +DELAY_CYCLES macro cycles + if cycles < 68 + BLSREPEAT cycles / 4, nop + else + move sr, -(sp) ; 18 + move.w d0, -(sp) ; 18 + if cycles >= 72 && cycles < 2632 + moveq #(cycles - 72) / 10, d0 ; 4 + elsif cycles < 655432 + move.w #(cycles - 76) / 10, d0 ; 8 + elsif cycles < 2752588 + move.w #(cycles - 76) / 42, d0 + else + assert cycles < 2752588 ; Longer loops unimplemented + endif + if cycles < 88 + BLSREPEAT (cycles - 72) / 4, nop ; Delay too short to make a loop + else +.delayloop\? + if cycles >= 655432 + BLSREPEAT 8, nop ; Slow down loop for very long waits + endif + dbra d0, .delayloop\? + endif + move.w (sp)+, d0 ; 16 + move (sp)+, ccr ; 16 + endif + endm + +; Delay for millis milliseconds +DELAY_MILLIS macro millis + if millis < 200 + if BUS == BUS_MAIN + DELAY_CYCLES 7620 * millis + else + DELAY_CYCLES 12500 * millis + endif + else + move sr, -(sp) ; 18 + move.w d0, -(sp) ; 18 + move.w #(millis - 1), d0 ; 8 + ; First loop is shorter to counter setup time + if BUS == BUS_MAIN + DELAY_CYCLES 7620 - 76 + else + DELAY_CYCLES 12500 - 76 + endif + if millis > 1 +.delaymillisloop\? + if BUS == BUS_MAIN + DELAY_CYCLES 7620 - 10 + else + DELAY_CYCLES 12500 - 10 + endif + dbra d0, .delaymillisloop\? + move.w (sp)+, d0 ; 16 + move (sp)+, ccr ; 16 + endif + endif + endm + + endif + +; vim: ts=8 sw=8 sts=8 et diff --git a/samples/Motorola 68K Assembly/cpu.s b/samples/Motorola 68K Assembly/cpu.s new file mode 100644 index 0000000000..0a718c4939 --- /dev/null +++ b/samples/Motorola 68K Assembly/cpu.s @@ -0,0 +1,70 @@ +;;; Created by Miguel Mendez. +;;; This file is public domain. + + machine 68060 + + section text + public _getCPU + public _getVBR + public _getMEM + +LVOSuperVisor EQU -30 +LVOAvailMem EQU -216 +AttnFlags EQU 296 + +_getCPU: + movem.l d1/a6, -(sp) + move.l 4.w, a6 ; exec base. + move.w AttnFlags(a6), d1 ; AttnFlags + + btst #0, d1 + bne.s _010 ; 68010 + moveq #0, d0 + bra.b _cpuDone + +_010 btst #1, d1 + bne.s _020 ; 68020 + moveq #1,d0 + bra.b _cpuDone + +_020 btst #2, d1 + bne.s _030 ; 68030 + moveq #2, d0 + bra.b _cpuDone +_030 btst #3, d1 + bne.s _040 ; 68040 + moveq #3, d0 + bra.b _cpuDone +_040 btst #7, d1 + bne.s _060 ; 68060 + moveq #4, d0 + bra.b _cpuDone +_060 btst #10, d1 ; Apollo 68080 + bne.s _080 + moveq #6, d0 + bra.b _cpuDone +_080 moveq #8, d0 +_cpuDone: + movem.l (sp)+, d1/a6 + rts + +_getVBR: + movem.l a5-a6, -(sp) + move.l $4.w, a6 + lea.l movecTrap, a5 + jsr LVOSuperVisor(a6) + movem.l (sp)+, a5-a6 + rts + +movecTrap: + movec.l VBR, d0 + rte + + +_getMEM: + movem.l a6, -(sp) + move.l 4.w,a6 + moveq #0, d0 + jsr LVOAvailMem(a6) + movem.l (sp)+, a6 + rts diff --git a/samples/Motorola 68K Assembly/iff_ilbm.i b/samples/Motorola 68K Assembly/iff_ilbm.i new file mode 100644 index 0000000000..a6057fec84 --- /dev/null +++ b/samples/Motorola 68K Assembly/iff_ilbm.i @@ -0,0 +1,130 @@ +; See http://wiki.amigaos.net/wiki/ILBM_IFF_Interleaved_Bitmap + +; ******** IFF_GetSize ******** +; Retrieves Width, Height and the number of bitplans of a IFF Picture +; INPUT: a0 = IFF buffer +; OUTPUT: d0 = width or 0 if error +; d1 = height, or 0 if error +; d2 = bitplans, or 0 if error +IFF_GetSize: + movem.l d3-d7/a0-a6,-(a7) + bsr iff_getBMHDInfo + movem.l (a7)+,d3-d7/a0-a6 + rts + + +; ******** IFF_GetPicture ******** +; Uncompress a IFF ILBM picture to a pre-allocated buffer +; INPUT: a0 = IFF ILBM source +; a1 = destination buffer +; OUTPUT: d0 = error code (0 = success, 1 = invalid format) +IFF_GetPicture: + movem.l d1-d7/a0-a6,-(a7) + bsr iff_uncompress + movem.l (a7)+,d1-d7/a0-a6 + rts + +; ******** IFF_GetPalette ******** +; Finds the Palette in R,G,B format in the IFF buffer +; INPUT: a0 = IFF ILBM source +; OUTPUT: d0 = Palette pointer, or 0 if not found +IFF_GetPalette: + movem.l d1-d7/a0-a6,-(a7) + bsr iff_get_palette + movem.l (a7)+,d1-d7/a0-a6 + rts + +; ************************************************************************************************* +iff_get_palette: + moveq #0, d0 + cmp.l #"FORM",(a0)+ + bne .palette_end + move.l (a0)+,d7 ; remaining size + add.l a0,d7 ; d0 = end of file + cmp.l #"ILBM",(a0)+ + bne .palette_end +.palette_next_chunk: + cmp.l #"CMAP",(a0)+ + beq .palette_chunk + add.l (a0)+,a0 ; skip this chunk (BODY, CMAP...) + cmp.l d7, a0 + blo .palette_next_chunk + bra .palette_end ; no BMHD chunk! +.palette_chunk: + addq #4, a0 ; chunck size + move.l a0, d0 +.palette_end + rts + +; ************************************************************************************************* +iff_getBMHDInfo: + moveq #0, d0 + moveq #0, d1 + moveq #0, d2 + cmp.l #"FORM",(a0)+ + bne .bmhd_end + move.l (a0)+,d7 ; remaining size + add.l a0,d7 ; d0 = end of file + cmp.l #"ILBM",(a0)+ + bne .bmhd_end +.bmhd_next_chunk: + cmp.l #"BMHD",(a0)+ + beq .bmhd_chunk + add.l (a0)+,a0 ; skip this chunk (BODY, CMAP...) + cmp.l d7, a0 + blo .bmhd_next_chunk + bra .bmhd_end ; no BMHD chunk! +.bmhd_chunk: + addq #4, a0 ; chunck size + move.w (a0),d0 + move.w 2(a0),d1 + move.b 8(a0),d2 +.bmhd_end + rts + +; ************************************************************************************************* +iff_uncompress: + cmp.l #"FORM",(a0)+ + bne .iff_failure + move.l (a0)+,d0 ; remaining size + add.l a0,d0 ; d0 = end of file + cmp.l #"ILBM",(a0)+ + bne .iff_failure +.iff_next_chunk: + cmp.l #"BODY",(a0)+ + beq .iff_body + add.l (a0)+,a0 ; skip this chunk (BMHD, CMAP...) + cmp.l d0, a0 + blo .iff_next_chunk + bra .iff_failure ; no body chunk! +.iff_body: + move.l (a0)+,d0 ; size of body chunk + add.l a0,d0 ; end of body chunk +.iff_next_byte: + moveq.l #0,d1 + move.b (a0)+,d1 ; read next compressed byte + cmp.b #128,d1 + bhs .iff_repeat +.iff_copy: + move.b (a0)+,(a1)+ + dbf d1, .iff_copy + cmp.l d0,a0 + blo .iff_next_byte + bra .iff_success +.iff_repeat: + neg.b d1 + move.b (a0)+,d2 +.iff_repeat_loop: + move.b d2,(a1)+ + dbf d1, .iff_repeat_loop + cmp.l d0,a0 + blo .iff_next_byte +.iff_success: + moveq.l #0, d0 + bra .iff_exit +.iff_failure: + moveq.l #1, d0 +.iff_exit: + rts +; ******** end iff_uncompress ******** + diff --git a/samples/Motorola 68K Assembly/rom_testbench.asm b/samples/Motorola 68K Assembly/rom_testbench.asm new file mode 100644 index 0000000000..822fdc5522 --- /dev/null +++ b/samples/Motorola 68K Assembly/rom_testbench.asm @@ -0,0 +1,2983 @@ +; Copyright 2011-2018 Frederic Requin +; +; Non regression tests for 68000 (1500+ cases) + + org 0 +vectors: + dc.l $00006000 ; 0 : Initial SSP + dc.l start ; 1 : Initial PC + dc.l 0 ; 2 + dc.l trap_addr ; 3 : Address error + dc.l trap_ill ; 4 : Illegal instruction + dc.l 0 ; 5 + dc.l trap_chk ; 6 : CHK instruction + dc.l trap_v ; 7 : TRAPV instruction + blk.l 24,0 ; 8 - 31 + dc.l trap_0 ; 32 + dc.l trap_1 ; 33 + dc.l trap_2 ; 34 + dc.l trap_3 ; 35 + dc.l trap_4 ; 36 + dc.l trap_5 ; 37 + dc.l trap_6 ; 38 + dc.l trap_7 ; 39 + dc.l trap_8 ; 40 + dc.l trap_9 ; 41 + dc.l trap_A ; 42 + dc.l trap_B ; 43 + dc.l trap_C ; 44 + dc.l trap_D ; 45 + dc.l trap_E ; 46 + dc.l trap_F ; 47 +trap_addr: + move.w (SP),D0 + move.l 2(SP),A0 + move.w 6(SP),D1 + move.l 10(SP),D2 + bclr #0,D2 + move.l D2,10(SP) + addq.l #8,SP + rte +trap_ill: + addq.l #2,2(SP) + rte +trap_chk: + rte +trap_v: + rte +trap_0: + rte +trap_1: + rte +trap_2: + rte +trap_3: + rte +trap_4: + rte +trap_5: + rte +trap_6: + rte +trap_7: + rte +trap_8: + rte +trap_9: + rte +trap_A: + rte +trap_B: + rte +trap_C: + rte +trap_D: + rte +trap_E: + rte +trap_F: + rte +start: + ; Exceptions tests + illegal + trap #0 + trap #15 + + move #%00010,CCR + trapv + + bsr.w movep_test + + pea return(pc) + jmp bcd_test +return: + jsr sub_b_test + jsr sub_w_test + jsr sub_l_test + + bsr.w add_b_test + bsr.w add_w_test + bsr.w add_l_test + + bsr neg_test + + moveq #0,D0 + tas D0 + moveq #5,D0 + moveq #3,D1 + chk.w D1,D0 + moveq #-1,D0 + chk.w D1,D0 + + jsr movem_test + + lea $12345678,A5 + link A5,#-12 + unlk A5 + + move.l A7,USP + move.l USP,A0 + + exg A0,A5 + exg A5,D0 + exg D0,D1 + + move.w #$0080,D0 + ext.w D0 + move.w #$FF00,D0 + ext.w D0 + move.l #$00008000,D0 + ext.l D0 + move.w #$0000,D0 + ext.l D0 + + jsr cmpa_w_test + jsr cmpa_l_test + + jsr cmp_b_test + jsr cmp_w_test + jsr cmp_l_test + + jsr cmpi_b_test + jsr cmpi_w_test + jsr cmpi_l_test + + jsr scc_test + jsr bcc_test + jsr dbcc_test + + jsr div_test + jsr mult_test + + jsr biti_test + jsr bitr_test + + jsr clr_tst_test + jsr not_test + jsr neg_test + + jsr addq_test + jsr subq_test + + jsr adda_w_test + jsr adda_l_test + + jsr suba_w_test + jsr suba_l_test + + jsr move_l_test_0 + jsr move_l_test_1 + jsr move_l_test_2 + jsr move_l_test_3 + jsr move_l_test_4 + jsr move_l_test_5 + jsr move_l_test_6 + jsr move_l_test_7 + jsr move_l_test_8 + + jsr move_w_test_0 + jsr move_w_test_1 + jsr move_w_test_2 + jsr move_w_test_3 + jsr move_w_test_4 + jsr move_w_test_5 + jsr move_w_test_6 + jsr move_w_test_7 + jsr move_w_test_8 + + jsr move_b_test_0 + jsr move_b_test_2 + jsr move_b_test_3 + jsr move_b_test_4 + jsr move_b_test_5 + jsr move_b_test_6 + jsr move_b_test_7 + jsr move_b_test_8 + + jsr shifti_test + jsr shiftr_test + jsr shiftm_test + + jsr addi_b_test + jsr addi_w_test + jsr addi_l_test + + jsr subi_b_test + jsr subi_w_test + jsr subi_l_test + + bsr.w log_b_test + bsr.w log_w_test + bsr.w log_l_test + + bsr.w logi_b_test + bsr.w logi_w_test + bsr.w logi_l_test + + bra.w start + + ; MOVEP tests + ;------------ +movep_test: + lea $8000.l,A0 + move.l #$01234567,(A0) + move.l #$89ABCDEF,4(A0) + moveq #0,D0 + movep.w 0(A0),D0 + movep.w 1(A0),D0 + movep.l 0(A0),D0 + movep.l 1(A0),D0 + move.l #$00001122,D0 + move.l #$00003344,D1 + movep.w D0,0(A0) + movep.w D1,1(A0) + move.l (A0),D0 + move.l #$11223344,D0 + move.l #$55667788,D1 + movep.l D0,0(A0) + movep.l D1,1(A0) + move.l (A0)+,D0 + move.l (A0),D1 + rts + + ; ABCD, SBCD, NBCD tests + ;----------------------- +bcd_test: + lea $8000.l,A0 + move #%10000,CCR + move.b #$99,D0 + move.b #$01,D1 + abcd D0,D1 + move.l #$01990099,(A0)+ + move.l A0,A1 + move.l #$09010101,(A1)+ + abcd -(A0),-(A1) + abcd -(A0),-(A1) + abcd -(A0),-(A1) + abcd -(A0),-(A1) + move.l (A0),D0 + move.l (A1),D1 + + addq.l #4,A0 + addq.l #4,A1 + move.b #$99,D0 + move.b #$00,D1 + move #%10000,CCR + sbcd D0,D1 + sbcd -(A0),-(A1) + sbcd -(A0),-(A1) + sbcd -(A0),-(A1) + sbcd -(A0),-(A1) + move.l (A0),D0 + move.l (A1),D1 + + moveq #1,D1 + nbcd D0 + nbcd (A0) + move.b (A0),D0 + nbcd (A0)+ + move.b -1(A0),D0 + nbcd 1(A0) + move.b 1(A0),D0 + nbcd -(A0) + move.b (A0),D0 + nbcd 0(A0,D1.w) + move.b 0(A0,d1.w),D0 + nbcd $8000 + move.b $8000,D0 + rts + + ; BTST, BCHG, BCLR, BSET tests + ;----------------------------- +biti_test: + lea $8000.l,A0 + move.l #$55555555,D0 + move.l D0,(A0) + move.l D0,-$1000(A0) + moveq #1,D1 + + btst #0,D0 + btst #7,D0 + btst #8,D0 + btst #15,D0 + btst #16,D0 + btst #23,D0 + btst #24,D0 + btst #31,D0 + btst #0,(A0) + btst #7,(A0)+ + btst #0,-1(A0) + btst #7,-(A0) + btst #0,1(A0,D1.w) + btst #7,$7000.w + btst #0,$8000.l + + bchg #0,D0 + bchg #7,D0 + bchg #8,D0 + bchg #15,D0 + bchg #16,D0 + bchg #23,D0 + bchg #24,D0 + bchg #31,D0 + bchg #0,(A0) + bchg #7,(A0)+ + bchg #0,-1(A0) + bchg #7,-(A0) + bchg #0,1(A0,D1.w) + bchg #7,$7000.w + bchg #0,$8000.l + + bclr #0,D0 + bclr #7,D0 + bclr #8,D0 + bclr #15,D0 + bclr #16,D0 + bclr #23,D0 + bclr #24,D0 + bclr #31,D0 + bclr #0,(A0) + bclr #7,(A0)+ + bclr #0,-1(A0) + bclr #7,-(A0) + bclr #0,1(A0,D1.w) + bclr #7,$7000.w + bclr #0,$8000.l + + bset #0,D0 + bset #7,D0 + bset #8,D0 + bset #15,D0 + bset #16,D0 + bset #23,D0 + bset #24,D0 + bset #31,D0 + bset #0,(A0) + bset #7,(A0)+ + bset #0,-1(A0) + bset #7,-(A0) + bset #0,1(A0,D1.w) + bset #7,$7000.w + bset #0,$8000.l + + rts + +bitr_test: + lea $8000.l,A0 + move.l #$55555555,D0 + move.l D0,(A0) + move.l D0,-$1000(A0) + moveq #1,D1 + + moveq #0,D2 + btst D2,D0 + addq.l #7,D2 + btst D2,D0 + addq.l #1,D2 + btst D2,D0 + addq.l #7,D2 + btst D2,D0 + addq.l #1,D2 + btst D2,D0 + addq.l #7,D2 + btst D2,D0 + addq.l #1,D2 + btst D2,D0 + addq.l #7,D2 + btst D2,D0 + + moveq #0,D2 + moveq #7,D3 + btst D2,(A0) + btst D3,(A0)+ + btst D2,-1(A0) + btst D3,-(A0) + btst D2,1(A0,D1.w) + btst D3,$7000.w + btst D2,$8000.l + + moveq #0,D2 + bchg D2,D0 + addq.l #7,D2 + bchg D2,D0 + addq.l #1,D2 + bchg D2,D0 + addq.l #7,D2 + bchg D2,D0 + addq.l #1,D2 + bchg D2,D0 + addq.l #7,D2 + bchg D2,D0 + addq.l #1,D2 + bchg D2,D0 + addq.l #7,D2 + bchg D2,D0 + + moveq #0,D2 + moveq #7,D3 + bchg D2,(A0) + bchg D3,(A0)+ + bchg D2,-1(A0) + bchg D3,-(A0) + bchg D2,1(A0,D1.w) + bchg D3,$7000.w + bchg D2,$8000.l + + moveq #0,D2 + bclr D2,D0 + addq.l #7,D2 + bclr D2,D0 + addq.l #1,D2 + bclr D2,D0 + addq.l #7,D2 + bclr D2,D0 + addq.l #1,D2 + bclr D2,D0 + addq.l #7,D2 + bclr D2,D0 + addq.l #1,D2 + bclr D2,D0 + addq.l #7,D2 + bclr D2,D0 + + moveq #0,D2 + moveq #7,D3 + bclr D2,(A0) + bclr D3,(A0)+ + bclr D2,-1(A0) + bclr D3,-(A0) + bclr D2,1(A0,D1.w) + bclr D3,$7000.w + bclr D2,$8000.l + + moveq #0,D2 + bset D2,D0 + addq.l #7,D2 + bset D2,D0 + addq.l #1,D2 + bset D2,D0 + addq.l #7,D2 + bset D2,D0 + addq.l #1,D2 + bset D2,D0 + addq.l #7,D2 + bset D2,D0 + addq.l #1,D2 + bset D2,D0 + addq.l #7,D2 + bset D2,D0 + + moveq #0,D2 + moveq #7,D3 + bset D2,(A0) + bset D3,(A0)+ + bset D2,-1(A0) + bset D3,-(A0) + bset D2,1(A0,D1.w) + bset D3,$7000.w + bset D2,$8000.l + + rts + + ; AND.B, EOR.B, OR.B tests + ;------------------------- +log_b_test: + lea $8000.l,A0 + move.w #$55AA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0)+ + moveq #0,D0 + moveq #4,D1 + + move.b #$FF,D0 + and.b log_b_test+1(PC),D0 + or.b log_b_test+1(PC),D0 + and.b log_b_test-1(PC,D1.w),D0 + or.b log_b_test-1(PC,D1.l),D0 + + move.b #$FF,D0 + eor.b D0,(A0)+ + and.b (A0)+,D0 + or.b D0,(A0)+ + or.b (A0)+,D0 + and.b D0,(A0)+ + eor.b D0,(A0) + and.b (A0),D0 + or.b D0,(A0) + or.b (A0),D0 + and.b D0,(A0) + + move.b #$FF,D0 + eor.b D0,-(A0) + and.b -(A0),D0 + or.b D0,-(A0) + or.b -(A0),D0 + and.b D0,-(A0) + eor.b D0,1(A0) + and.b 2(A0),D0 + or.b D0,2(A0) + or.b 3(A0),D0 + and.b D0,3(A0) + + move.b #$FF,D0 + eor.b D0,-1(A0,D1.w) + and.b -2(A0,D1.l),D0 + or.b D0,-2(A0,D1.l) + or.b -3(A0,D1.w),D0 + and.b D0,-3(A0,D1.w) + eor.b D1,D0 + and.b D1,D0 + or.b D1,D0 + + rts + + ; AND.W, EOR.W, OR.W tests + ;------------------------- +log_w_test: + lea $8000.l,A0 + move.w #$5555,(A0)+ + move.w #$AAAA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0)+ + moveq #8,D1 + + move.w #$FFFF,D0 + and.w log_w_test+2(PC),D0 + or.w log_w_test+2(PC),D0 + and.w log_w_test(PC,D1.w),D0 + or.w log_w_test(PC,D1.l),D0 + + move.w #$FFFF,D0 + eor.w D0,(A0)+ + and.w (A0)+,D0 + or.w D0,(A0)+ + or.w (A0)+,D0 + and.w D0,(A0)+ + eor.w D0,(A0) + and.w (A0),D0 + or.w D0,(A0) + or.w (A0),D0 + and.w D0,(A0) + + move.w #$FFFF,D0 + eor.w D0,-(A0) + and.w -(A0),D0 + or.w D0,-(A0) + or.w -(A0),D0 + and.w D0,-(A0) + eor.w D0,2(A0) + and.w 4(A0),D0 + or.w D0,4(A0) + or.w 6(A0),D0 + and.w D0,6(A0) + + move.w #$FFFF,D0 + eor.w D0,-2(A0,D1.w) + and.w -4(A0,D1.l),D0 + or.w D0,-4(A0,D1.l) + or.w -6(A0,D1.w),D0 + and.w D0,-6(A0,D1.w) + eor.w D1,D0 + and.w D1,D0 + or.w D1,D0 + + rts + + ; AND.L, EOR.L, OR.L tests + ;------------------------- +log_l_test: + lea $8000.l,A0 + move.l #$55555555,(A0)+ + move.l #$AAAAAAAA,(A0)+ + move.l #$12345678,(A0)+ + move.l #$9ABCDEF0,(A0)+ + move.l #$FFFFFFFF,(A0)+ + moveq #16,D1 + + move.l #$FFFFFFFF,D0 + and.l log_l_test+2(PC),D0 + or.l log_l_test+2(PC),D0 + and.l log_l_test(PC,D1.w),D0 + or.l log_l_test(PC,D1.l),D0 + + move.l #$FFFFFFFF,D0 + eor.l D0,(A0)+ + and.l (A0)+,D0 + or.l D0,(A0)+ + or.l (A0)+,D0 + and.l D0,(A0)+ + eor.l D0,(A0) + and.l (A0),D0 + or.l D0,(A0) + or.l (A0),D0 + and.l D0,(A0) + + move.l #$FFFFFFFF,D0 + eor.l D0,-(A0) + and.l -(A0),D0 + or.l D0,-(A0) + or.l -(A0),D0 + and.l D0,-(A0) + eor.l D0,4(A0) + and.l 8(A0),D0 + or.l D0,8(A0) + or.l 12(A0),D0 + and.l D0,12(A0) + + move.l #$FFFFFFFF,D0 + eor.l D0,-4(A0,D1.w) + and.l -8(A0,D1.l),D0 + or.l D0,-8(A0,D1.l) + or.l -12(A0,D1.w),D0 + and.l D0,-12(A0,D1.w) + eor.l D1,D0 + and.l D1,D0 + or.l D1,D0 + + rts + + ; ANDI, EORI, ORI tests + ;---------------------- +logi_b_test: + lea $8000.l,A0 + move.w #$55AA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0)+ + moveq #0,D0 + moveq #4,D1 + + move.b #$FF,D0 + andi.b #$12,D0 + eori.b #$34,D0 + ori.b #$56,D0 + + andi.b #$12,(A0)+ + eori.b #$34,(A0)+ + ori.b #$56,(A0)+ + andi.b #$78,(A0) + eori.b #$9A,(A0) + ori.b #$BC,(A0) + + andi.b #$12,-(A0) + eori.b #$34,-(A0) + ori.b #$56,-(A0) + andi.b #$78,1(A0) + eori.b #$9A,2(A0) + ori.b #$BC,3(A0) + + andi.b #$12,-1(A0,D1.w) + eori.b #$34,-2(A0,D1.l) + ori.b #$56,-3(A0,D1.w) + + andi.b #$12,$7000.w + eori.b #$34,$7000.w + ori.b #$56,$7000.w + andi.b #$78,$8000.l + eori.b #$9A,$8000.l + ori.b #$BC,$8000.l + + rts + + ; ANDI.W, EORI.W, ORI.W tests + ;---------------------------- +logi_w_test: + lea $8000.l,A0 + move.w #$5555,(A0)+ + move.w #$AAAA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0)+ + moveq #0,D0 + moveq #8,D1 + + move.w #$FFFF,D0 + andi.w #$1212,D0 + eori.w #$3434,D0 + ori.w #$5656,D0 + + andi.w #$1212,(A0)+ + eori.w #$3434,(A0)+ + ori.w #$5656,(A0)+ + andi.w #$7878,(A0) + eori.w #$9A9A,(A0) + ori.w #$BCBC,(A0) + + andi.w #$1212,-(A0) + eori.w #$3434,-(A0) + ori.w #$5656,-(A0) + andi.w #$7878,2(A0) + eori.w #$9A9A,4(A0) + ori.w #$BCBC,6(A0) + + andi.w #$1212,-2(A0,D1.w) + eori.w #$3434,-4(A0,D1.l) + ori.w #$5656,-6(A0,D1.w) + + andi.w #$1212,$7000.w + eori.w #$3434,$7000.w + ori.w #$5656,$7000.w + andi.w #$7878,$8000.l + eori.w #$9A9A,$8000.l + ori.w #$BCBC,$8000.l + + rts + + ; ANDI.L, EORI.L, ORI.L tests + ;---------------------------- +logi_l_test: + lea $8000.l,A0 + move.l #$55555555,(A0)+ + move.l #$AAAAAAAA,(A0)+ + move.l #$12345678,(A0)+ + move.l #$9ABCDEF0,(A0)+ + move.l #$FFFFFFFF,(A0)+ + moveq #16,D1 + + move.l #$FFFFFFFF,D0 + andi.l #$12121212,D0 + eori.l #$34343434,D0 + ori.l #$56565656,D0 + + andi.l #$12121212,(A0)+ + eori.l #$34343434,(A0)+ + ori.l #$56565656,(A0)+ + andi.l #$78787878,(A0) + eori.l #$9A9A9A9A,(A0) + ori.l #$BCBCBCBC,(A0) + + andi.l #$12121212,-(A0) + eori.l #$34343434,-(A0) + ori.l #$56565656,-(A0) + andi.l #$78787878,4(A0) + eori.l #$9A9A9A9A,8(A0) + ori.l #$BCBCBCBC,12(A0) + + andi.l #$12121212,-4(A0,D1.w) + eori.l #$34343434,-8(A0,D1.l) + ori.l #$56565656,-12(A0,D1.w) + + andi.l #$12121212,$7000.w + eori.l #$34343434,$7000.w + ori.l #$56565656,$7000.w + andi.l #$78787878,$8000.l + eori.l #$9A9A9A9A,$8000.l + ori.l #$BCBCBCBC,$8000.l + + rts + + ; ADD tests + ;---------- +add_b_test: + lea $8000.l,A0 + move.l #$12345678,(A0) + move.l #$9ABCDEF0,4(A0) + moveq #$7F,D0 + moveq #2,D1 + add.b (A0)+,D0 + add.b D0,(A0)+ + add.b (A0),D0 + add.b D0,(A0) + add.b -(A0),D0 + add.b D0,-(A0) + add.b 1(A0),D0 + add.b D0,1(A0) + add.b 3(A0,D1.w),D0 + add.b D0,3(A0,D1.w) + add.b D1,D0 + add.b $7000.w,D0 + add.b $8000.l,D0 + add.b add_b_test+1(PC),D0 + add.b add_b_test-1(PC,D1),D0 + add.b #$12,D0 + rts + +add_w_test: + lea $8000.l,A0 + move.l #$12345678,(A0) + move.l #$9ABCDEF0,4(A0) + move.w #$7FFF,D0 + moveq #2,D1 + add.w (A0)+,D0 + add.w D0,(A0)+ + add.w (A0),D0 + add.w D0,(A0) + add.w -(A0),D0 + add.w D0,-(A0) + add.w 2(A0),D0 + add.w D0,2(A0) + add.w 2(A0,D1.w),D0 + add.w D0,4(A0,D1.w) + add.w D1,D0 + add.w A0,D0 + add.w $7000.w,D0 + add.w $8000.l,D0 + add.w add_w_test+2(PC),D0 + add.w add_w_test(PC,D1),D0 + add.w #$1234,D0 + rts + +add_l_test: + lea $8000.l,A0 + move.l #$12345678,(A0) + move.l #$9ABCDEF0,4(A0) + move.l #$12345678,8(A0) + move.l #$7FFFFFFF,D0 + moveq #2,D1 + add.l (A0)+,D0 + add.l D0,(A0)+ + add.l (A0),D0 + add.l D0,(A0) + add.l -(A0),D0 + add.l D0,-(A0) + add.l 4(A0),D0 + add.l D0,4(A0) + add.l 6(A0,D1.w),D0 + add.l D0,2(A0,D1.w) + add.l D1,D0 + add.l A0,D0 + add.l $7000.w,D0 + add.l $8000.l,D0 + add.l add_l_test+2(PC),D0 + add.l add_l_test(PC,D1),D0 + add.l #$12345678,D0 + rts + + ; ADDQ tests + ;----------- +addq_test: + lea $7000.w,A0 + lea $8000.l,A1 + suba.l A2,A2 + moveq #0,D0 + moveq #2,D1 + + clr.b (A0) + clr.b (A1) + addq.b #8,D0 + addq.b #1,(A0) + addq.b #7,(A1)+ + addq.b #8,-1(A1) + addq.b #8,-3(A1,D1.w) + addq.b #8,-(A1) + addq.b #1,$7000.w + addq.b #1,$8000.l + move.b (A0),D0 + move.b (A1),D0 + + clr.w (A0) + move.w (A0),D0 + clr.w (A1) + addq.w #8,D0 + addq.w #8,A2 + addq.w #1,(A0) + move.w (A0),D0 + addq.w #7,(A1)+ + addq.w #8,-2(A1) + addq.w #8,-4(A1,D1.w) + addq.w #8,-(A1) + addq.w #1,$7000.w + addq.w #1,$8000.l + move.w (A0),D0 + move.w (A1),D0 + + clr.l (A0) + clr.l (A1) + addq.l #8,D0 + addq.l #8,A2 + addq.l #1,(A0) + addq.l #7,(A1)+ + addq.l #8,-4(A1) + addq.l #8,-6(A1,D1.w) + addq.l #8,-(A1) + addq.l #1,$7000.w + addq.l #1,$8000.l + move.l (A0),D0 + move.l (A1),D0 + + rts + + ; ADDA.W tests + ;------------- +adda_w_test: + lea $7FF0.w,A0 + lea $7FF0.w,A1 + lea $8000.l,A2 + move.l #$12345678,(A2) + moveq #2,D1 + adda.w A1,A0 + adda.w D1,A0 + adda.w (A2)+,A0 + adda.w (A2),A0 + adda.w -(A2),A0 + adda.w 2(A2),A0 + adda.w 6(A2,D1.w),A0 + adda.w $7000.w,A0 + adda.w $8000.l,A0 + adda.w adda_w_test+2(PC),A0 + adda.w adda_w_test(PC,D1.l),A0 + adda.w #$1234,A0 + rts + + ; ADDA.L tests + ;------------- +adda_l_test: + lea $7FFFFFF0.l,A0 + lea $7FFFFFF0.l,A1 + lea $8000.l,A2 + move.l #$12345678,(A2) + move.l #$9ABCDEF0,4(A2) + moveq #2,D1 + adda.l A1,A0 + adda.l #32,A0 + adda.l D1,A0 + adda.l (A2)+,A0 + adda.l (A2),A0 + adda.l -(A2),A0 + adda.l 4(A2),A0 + adda.l 6(A2,D1.w),A0 + adda.l $7000.w,A0 + adda.l $8000.l,A0 + adda.l adda_l_test+2(PC),A0 + adda.l adda_l_test(PC,D1.l),A0 + adda.l #$12345678,A0 + rts + + ; ADDI.B tests + ;------------- +addi_b_test: + lea $8000.l,A0 + move.w #$55AA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0) + subq.l #4,A0 + moveq #0,D0 + + move.b #$7F,D0 + addi.b #$7F,D0 + addq.b #2,D0 + move.b #$7F,D1 + moveq #0,D2 + addx.b D2,D1 + + moveq #4,D1 + addi.b #$12,(A0)+ + addi.b #$23,(A0) + addi.b #$45,-(A0) + addi.b #$56,1(A0) + addi.b #$78,-3(A0,D1.w) + addi.b #$9A,$7000.w + addi.b #$BC,$8000.l + + rts + + ; ADDI.W tests + ;------------- +addi_w_test: + lea $8000.l,A0 + move.w #$5555,(A0)+ + move.w #$AAAA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0) + subq.l #6,A0 + moveq #0,D0 + + move.w #$7FFF,D0 + addi.w #$7FFF,D0 + addq.w #2,D0 + move.w #$7FFF,D1 + moveq #0,D2 + addx.w D2,D1 + + moveq #8,D1 + addi.w #$1212,(A0)+ + addi.w #$2323,(A0) + addi.w #$4545,-(A0) + addi.w #$5656,2(A0) + addi.w #$7878,-6(A0,D1.w) + addi.w #$9A9A,$7000.w + addi.w #$BCBC,$8000.l + + rts + + ; ADDI.L tests + ;------------- +addi_l_test: + lea $8000.l,A0 + move.l #$55555555,(A0)+ + move.l #$AAAAAAAA,(A0)+ + move.l #$12345678,(A0)+ + move.l #$9ABCDEF0,(A0)+ + move.l #$FFFFFFFF,(A0) + lea -16(A0),A0 + + move.l #$7FFFFFFF,D0 + addi.l #$7FFFFFFF,D0 + addq.l #2,D0 + move.l #$7FFFFFFF,D1 + moveq #0,D2 + addx.l D2,D1 + + moveq #16,D1 + addi.l #$12121212,(A0)+ + addi.l #$23232323,(A0) + addi.l #$45454545,-(A0) + addi.l #$56565656,4(A0) + addi.l #$78787878,-12(A0,D1.w) + addi.l #$9A9A9A9A,$7000.w + addi.l #$BCBCBCBC,$8000.l + + rts + + ; SUB tests + ;---------- +sub_b_test: + lea $8000.l,A0 + moveq #$7F,D0 + moveq #2,D1 + sub.b (A0)+,D0 + sub.b (A0),D0 + sub.b -(A0),D0 + sub.b 1(A0),D0 + sub.b 6(A0,D1.w),D0 + sub.b D1,D0 + sub.b $7000.w,D0 + sub.b $8000.l,D0 + sub.b sub_b_test+1(PC),D0 + sub.b sub_b_test-1(PC,D1),D0 + sub.b #$12,D0 + rts + +sub_w_test: + lea $8000.l,A0 + move.w #$7FFF,D0 + moveq #2,D1 + sub.w (A0)+,D0 + sub.w (A0),D0 + sub.w -(A0),D0 + sub.w 2(A0),D0 + sub.w 6(A0,D1.w),D0 + sub.w D1,D0 + sub.w A0,D0 + sub.w $7000.w,D0 + sub.w $8000.l,D0 + sub.w sub_w_test+2(PC),D0 + sub.w sub_w_test(PC,D1),D0 + sub.w #$1234,D0 + rts + +sub_l_test: + lea $8000.l,A0 + move.l #$7FFFFFFF,D0 + moveq #2,D1 + sub.l (A0)+,D0 + sub.l (A0),D0 + sub.l -(A0),D0 + sub.l 4(A0),D0 + sub.l 6(A0,D1.w),D0 + sub.l D1,D0 + sub.l A0,D0 + sub.l $7000.w,D0 + sub.l $8000.l,D0 + sub.l sub_l_test+2(PC),D0 + sub.l sub_l_test(PC,D1),D0 + sub.l #$12345678,D0 + rts + + ; CMP tests + ;---------- +cmp_b_test: + lea $8000.l,A0 + move.l #$7F7F7F7F,(A0) + moveq #$7F,D0 + moveq #1,D1 + cmp.b (A0)+,D0 + cmp.b (A0),D0 + cmp.b -(A0),D0 + cmp.b 1(A0),D0 + cmp.b 6(A0,D1.w),D0 + cmp.b D1,D0 + cmp.b $7000.w,D0 + cmp.b $8000.l,D0 + cmp.b cmp_b_test+1(PC),D0 + cmp.b cmp_b_test-1(PC,D1),D0 + cmp.b #$12,D0 + rts + +cmp_w_test: + lea $8000.l,A0 + move.l #$7FFF7FFF,(A0) + move.w #$7FFF,D0 + moveq #2,D1 + cmp.w (A0)+,D0 + cmp.w (A0),D0 + cmp.w -(A0),D0 + cmp.w 2(A0),D0 + cmp.w 6(A0,D1.w),D0 + cmp.w D1,D0 + cmp.w A0,D0 + cmp.w $7000.w,D0 + cmp.w $8000.l,D0 + cmp.w cmp_w_test+2(PC),D0 + cmp.w cmp_w_test(PC,D1),D0 + cmp.w #$1234,D0 + rts + +cmp_l_test: + lea $8000.l,A0 + move.l #$7FFFFFFF,(A0) + move.l #$7FFFFFFF,D0 + moveq #2,D1 + cmp.l (A0)+,D0 + cmp.l (A0),D0 + cmp.l -(A0),D0 + cmp.l 4(A0),D0 + cmp.l 6(A0,D1.w),D0 + cmp.l D1,D0 + cmp.l A0,D0 + cmp.l $7000.w,D0 + cmp.l $8000.l,D0 + cmp.l cmp_l_test+2(PC),D0 + cmp.l cmp_l_test(PC,D1),D0 + cmp.l #$12345678,D0 + rts + + ; CMPA.W tests + ;------------- +cmpa_w_test: + lea $7FFF.w,A0 + lea $7FFF.w,A1 + lea $8000.l,A2 + move.l #12345678,(A2) + moveq #2,D1 + cmpa.w A1,A0 + cmpa.w D1,A0 + cmpa.w (A2)+,A0 + cmpa.w (A2),A0 + cmpa.w -(A2),A0 + cmpa.w 2(A2),A0 + cmpa.w 6(A2,D1.w),A0 + cmpa.w $7000.w,A0 + cmpa.w $8000.l,A0 + cmpa.w cmpa_w_test+2(PC),A0 + cmpa.w cmpa_w_test(PC,D1.l),A0 + cmpa.w #$1234,A0 + rts + + ; CMPA.L tests + ;------------- +cmpa_l_test: + lea $7FFFFFFF.l,A0 + lea $7FFFFFFF.l,A1 + lea $8000.l,A2 + move.l #$12345678,(A2) + move.l #$9ABCDEF0,4(A2) + moveq #2,D1 + cmpa.l A1,A0 + cmpa.l D1,A0 + cmpa.l (A2)+,A0 + cmpa.l (A2),A0 + cmpa.l -(A2),A0 + cmpa.l 4(A2),A0 + cmpa.l 6(A2,D1.w),A0 + cmpa.l $7000.w,A0 + cmpa.l $8000.l,A0 + cmpa.l cmpa_l_test+2(PC),A0 + cmpa.l cmpa_l_test(PC,D1.l),A0 + cmpa.l #$12345678,A0 + + move.w #$FFFF,-(SP) + rtr + + ; SUBQ tests + ;----------- +subq_test: + lea $7000.w,A0 + lea $8000.l,A1 + suba.l A2,A2 + moveq #0,D0 + moveq #2,D1 + + clr.b (A0) + clr.b (A1) + subq.b #8,D0 + subq.b #1,(A0) + subq.b #7,(A1)+ + subq.b #8,-1(A1) + subq.b #8,-3(A1,D1.w) + subq.b #8,-(A1) + subq.b #1,$7000.w + subq.b #1,$8000.l + move.b (A0),D0 + move.b (A1),D0 + + clr.w (A0) + move.w (A0),D0 + clr.w (A1) + subq.w #8,D0 + subq.w #8,A2 + subq.w #1,(A0) + move.w (A0),D0 + subq.w #7,(A1)+ + subq.w #8,-2(A1) + subq.w #8,-4(A1,D1.w) + subq.w #8,-(A1) + subq.w #1,$7000.w + subq.w #1,$8000.l + move.w (A0),D0 + move.w (A1),D0 + + clr.l (A0) + clr.l (A1) + subq.l #8,D0 + subq.l #8,A2 + subq.l #1,(A0) + subq.l #7,(A1)+ + subq.l #8,-4(A1) + subq.l #8,-6(A1,D1.w) + subq.l #8,-(A1) + subq.l #1,$7000.w + subq.l #1,$8000.l + move.l (A0),D0 + move.l (A1),D0 + + rts + + ; SUBA.W tests + ;------------- +suba_w_test: + lea $7FFF.w,A0 + lea $7FFF.w,A1 + lea $8000.l,A2 + move.l #$12345678,(A2) + moveq #2,D1 + suba.w A1,A0 + suba.w D1,A0 + suba.w (A2)+,A0 + suba.w (A2),A0 + suba.w -(A2),A0 + suba.w 2(A2),A0 + suba.w 6(A2,D1.w),A0 + suba.w $7000.w,A0 + suba.w $8000.l,A0 + suba.w suba_w_test+2(PC),A0 + suba.w suba_w_test(PC,D1.l),A0 + suba.w #$1234,A0 + rts + + ; SUBA.L tests + ;------------- +suba_l_test: + lea $7FFFFFFF.l,A0 + lea $7FFFFFFF.l,A1 + lea $8000.l,A2 + move.l #$12345678,(A2) + move.l #$9ABCDEF0,4(A2) + moveq #2,D1 + suba.l A1,A0 + suba.l D1,A0 + suba.l (A2)+,A0 + suba.l (A2),A0 + suba.l -(A2),A0 + suba.l 4(A2),A0 + suba.l 6(A2,D1.w),A0 + suba.l $7000.w,A0 + suba.l $8000.l,A0 + suba.l suba_l_test+2(PC),A0 + suba.l suba_l_test(PC,D1.l),A0 + suba.l #$12345678,A0 + rts + + ; SUBI.B tests + ;------------- +subi_b_test: + lea $8000.l,A0 + move.w #$55AA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0) + subq.l #4,A0 + moveq #0,D0 + moveq #4,D1 + + move.b #$7F,D0 + subi.b #$7F,D0 + subq.b #1,D0 + move.b #$7F,D1 + moveq #0,D2 + subx.b D2,D1 + subi.b #$12,(A0)+ + subi.b #$23,(A0) + subi.b #$45,-(A0) + subi.b #$56,1(A0) + subi.b #$78,-3(A0,D1.w) + subi.b #$9A,$7000.w + subi.b #$BC,$8000.l + + rts + + ; SUBI.W tests + ;------------- +subi_w_test: + lea $8000.l,A0 + move.w #$5555,(A0)+ + move.w #$AAAA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0) + subq.l #6,A0 + moveq #0,D0 + moveq #8,D1 + + move.w #$7FFF,D0 + subi.w #$7FFF,D0 + subq.w #1,D0 + move.w #$7FFF,D1 + moveq #0,D2 + subx.w D2,D1 + subi.w #$1212,(A0)+ + subi.w #$2323,(A0) + subi.w #$4545,-(A0) + subi.w #$5656,2(A0) + subi.w #$7878,-6(A0,D1.w) + subi.w #$9A9A,$7000.w + subi.w #$BCBC,$8000.l + + rts + + ; SUBI.L tests + ;------------- +subi_l_test: + lea $8000.l,A0 + move.l #$55555555,(A0)+ + move.l #$AAAAAAAA,(A0)+ + move.l #$12345678,(A0)+ + move.l #$9ABCDEF0,(A0)+ + move.l #$FFFFFFFF,(A0) + lea -16(A0),A0 + moveq #16,D1 + + move.l #$7FFFFFFF,D0 + subi.l #$7FFFFFFF,D0 + subq.l #1,D0 + move.l #$7FFFFFFF,D1 + moveq #0,D2 + subx.l D2,D1 + subi.l #$12121212,(A0)+ + subi.l #$23232323,(A0) + subi.l #$45454545,-(A0) + subi.l #$56565656,4(A0) + subi.l #$78787878,-12(A0,D1.w) + subi.l #$9A9A9A9A,$7000.w + subi.l #$BCBCBCBC,$8000.l + + rts + + ; CMPI.B tests + ;------------- +cmpi_b_test: + lea $8000.l,A0 + move.w #$55AA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0) + subq.l #4,A0 + moveq #0,D0 + moveq #4,D1 + + move.b #$7F,D0 + cmpi.b #$7F,D0 + cmpi.b #$12,(A0)+ + cmpi.b #$23,(A0) + cmpi.b #$45,-(A0) + cmpi.b #$56,1(A0) + cmpi.b #$78,-3(A0,D1.w) + cmpi.b #$9A,$7000.w + cmpi.b #$BC,$8000.l + + rts + + ; CMPI.W tests + ;------------- +cmpi_w_test: + lea $8000.l,A0 + move.w #$5555,(A0)+ + move.w #$AAAA,(A0)+ + move.w #$1234,(A0)+ + move.w #$5678,(A0) + subq.l #6,A0 + moveq #0,D0 + moveq #8,D1 + + move.w #$7FFF,D0 + cmpi.w #$7FFF,D0 + cmpi.w #$1212,(A0)+ + cmpi.w #$2323,(A0) + cmpi.w #$4545,-(A0) + cmpi.w #$5656,2(A0) + cmpi.w #$7878,-6(A0,D1.w) + cmpi.w #$9A9A,$7000.w + cmpi.w #$BCBC,$8000.l + + rts + + ; CMPI.L tests + ;------------- +cmpi_l_test: + lea $8000.l,A0 + move.l #$55555555,(A0)+ + move.l #$AAAAAAAA,(A0)+ + move.l #$12345678,(A0)+ + move.l #$9ABCDEF0,(A0)+ + move.l #$FFFFFFFF,(A0) + lea -16(A0),A0 + moveq #16,D1 + + move.l #$7FFFFFFF,D0 + cmpi.l #$7FFFFFFF,D0 + cmpi.l #$12121212,(A0)+ + cmpi.l #$23232323,(A0) + cmpi.l #$45454545,-(A0) + cmpi.l #$56565656,4(A0) + cmpi.l #$78787878,-12(A0,D1.w) + cmpi.l #$9A9A9A9A,$7000.w + cmpi.l #$BCBCBCBC,$8000.l + + rts + + ; CLR and TST tests + ;------------------ +clr_tst_test: + lea $8000.l,A0 + moveq #1,D1 + move.b #$55,D0 + clr.b D0 + tst.b D0 + move.b #$55,(A0) + clr.b (A0) + tst.b (A0) + move.b #$55,(A0) + clr.b (A0)+ + tst.b -(A0) + move.b #$55,(A0)+ + clr.b -(A0) + tst.b (A0)+ + move.b #$55,1(A0) + clr.b 1(A0) + tst.b 1(A0) + move.b #$55,1(A0,D1.w) + clr.b 1(A0,D1.w) + tst.b 1(A0,D1.w) + move.b #$55,$7000.w + clr.b $7000.w + tst.b $7000.w + move.b #$55,$8000.l + clr.b $8000.l + tst.b $8000.l + + lea $8000.l,A0 + moveq #2,D1 + move.w #$5555,D0 + clr.w D0 + tst.w D0 + move.w #$5555,(A0) + clr.w (A0) + tst.w (A0) + move.w #$5555,(A0) + clr.w (A0)+ + tst.w -(A0) + move.w #$5555,(A0)+ + clr.w -(A0) + tst.w (A0)+ + move.w #$5555,2(A0) + clr.w 2(A0) + tst.w 2(A0) + move.w #$5555,2(A0,D1.w) + clr.w 2(A0,D1.w) + tst.w 2(A0,D1.w) + move.w #$55,$7000.w + clr.w $7000.w + tst.w $7000.w + move.w #$5555,$8000.l + clr.w $8000.l + tst.w $8000.l + + lea $8000.l,A0 + moveq #4,D1 + move.l #$55555555,D0 + clr.l D0 + tst.l D0 + move.l #$55555555,(A0) + clr.l (A0) + tst.l (A0) + move.l #$55555555,(A0) + clr.l (A0)+ + tst.l -(A0) + move.l #$55555555,(A0)+ + clr.l -(A0) + tst.l (A0)+ + move.l #$55555555,4(A0) + clr.l 4(A0) + tst.l 4(A0) + move.l #$55555555,4(A0,D1.w) + clr.l 4(A0,D1.w) + tst.l 4(A0,D1.w) + move.l #$55555555,$7000.w + clr.l $7000.w + tst.l $7000.w + move.l #$55555555,$8000.l + clr.l $8000.l + tst.l $8000.l + + rts + + ; NEG and NEGX tests + ;------------------- +neg_test: + lea $8000.l,A0 + + move.l #$12345678,(A0) + move.b #$89,-$1000(A0) + moveq #-128,D0 + moveq #127,D1 + moveq #0,D2 + moveq #1,D3 + + neg.b D0 + negx.b D1 + negx.b D2 + neg.b (A0) + move.b (A0),D0 + negx.b 1(A0) + move.b 1(A0),D0 + neg.b (A0)+ + move.b (A0),D0 + negx.b (A0)+ + move.b (A0),D0 + neg.b -2(A0) + move.b -2(A0),D0 + negx.b -1(A0) + move.b -1(A0),D0 + neg.b -(A0) + move.b (A0),D0 + negx.b -(A0) + move.b (A0),D0 + neg.b 1(A0,D3) + move.b 1(A0,D3),D0 + negx.b 2(A0,D3) + move.b 2(A0,D3),D0 + neg.b $7000.w + move.b $7000.w,D0 + negx.b $7001.w + move.b $7001.w,D0 + neg.b $8000.l + move.b $8000.l,D0 + negx.b $8001.l + move.b $8001.l,D0 + + move.l #$12345678,(A0) + move.l #$9ABCDEF0,4(A0) + move.w #$89AB,-$1000(A0) + move.w #$8000,D0 + move.w #$7FFF,D1 + moveq #0,D2 + moveq #2,D3 + + neg.w D0 + negx.w D1 + negx.w D2 + neg.w (A0) + move.w (A0),D0 + negx.w 2(A0) + move.w 2(A0),D0 + neg.w (A0)+ + move.w (A0),D0 + negx.w (A0)+ + move.w (A0),D0 + neg.w -4(A0) + move.w -4(A0),D0 + negx.w -2(A0) + move.w -2(A0),D0 + neg.w -(A0) + move.w (A0),D0 + negx.w -(A0) + move.w (A0),D0 + neg.w 2(A0,D3) + move.w 2(A0,D3),D0 + negx.w 4(A0,D3) + move.w 4(A0,D3),D0 + neg.w $7000.w + move.w $7000.w,D0 + negx.w $7002.w + move.w $7002.w,D0 + neg.w $8000.l + move.w $8000.l,D0 + negx.w $8002.l + move.w $8002.l,D0 + + move.l #$12345678,(A0) + move.l #$9ABCDEF0,4(A0) + move.l #$12345678,8(A0) + move.l #$9ABCDEF0,12(A0) + move.l #$01234567,-$1000(A0) + move.l #$89ABCDEF,-$0FFC(A0) + move.l #$80000000,D0 + move.l #$7FFFFFFF,D1 + moveq #0,D2 + moveq #4,D3 + + neg.l D0 + negx.l D1 + negx.l D2 + neg.l (A0) + move.l (A0),D0 + negx.l 4(A0) + move.l 4(A0),D0 + neg.l (A0)+ + move.l (A0),D0 + negx.l (A0)+ + move.l (A0),D0 + neg.l -8(A0) + move.l -8(A0),D0 + negx.l -4(A0) + move.l -4(A0),D0 + neg.l -(A0) + move.l (A0),D0 + negx.l -(A0) + move.l (A0),D0 + neg.l 0(A0,D3) + move.l 0(A0,D3),D0 + negx.l 4(A0,D3) + move.l 4(A0,D3),D0 + neg.l $7000.w + move.l $7000.w,D0 + negx.l $7004.w + move.l $7004.w,D0 + neg.l $8000.l + move.l $8000.l,D0 + negx.l $8004.l + move.l $8004.l,D0 + + rts + + ; NOT tests + ;---------- +not_test: + lea $8000.l,A0 + + move.l #$12345678,(A0) + move.b #$89,-$1000(A0) + moveq #-128,D0 + moveq #127,D1 + moveq #0,D2 + moveq #1,D3 + not.b D0 + not.b D1 + not.b D2 + not.b (A0) + move.b (A0),D0 + not.b (A0)+ + move.b (A0),D0 + not.b -1(A0) + move.b -1(A0),D0 + not.b -(A0) + move.b (A0),D0 + not.b 1(A0,D3) + move.b 1(A0,D3),D0 + not.b $7000.w + move.b $7000.w,D0 + not.b $8000.l + move.b $8000.l,D0 + + move.l #$12345678,(A0) + move.l #$9ABCDEF0,4(A0) + move.w #$89AB,-$1000(A0) + move.w #$8000,D0 + move.w #$7FFF,D1 + moveq #0,D2 + moveq #2,D3 + not.w D0 + not.w D1 + not.w D2 + not.w (A0) + move.w (A0),D0 + not.w (A0)+ + move.w (A0),D0 + not.w -2(A0) + move.w -2(A0),D0 + not.w -(A0) + move.w (A0),D0 + not.w 2(A0,D3) + move.w 2(A0,D3),D0 + not.w $7000.w + move.w $7000.w,D0 + not.w $8000.l + move.w $8000.l,D0 + + move.l #$12345678,(A0) + move.l #$9ABCDEF0,8(A0) + move.l #$89ABCDEF,-$1000(A0) + move.l #$80000000,D0 + move.l #$7FFFFFFF,D1 + moveq #0,D2 + moveq #4,D3 + not.l D0 + not.l D1 + not.l D2 + not.l (A0) + move.l (A0),D0 + not.l (A0)+ + move.l (A0),D0 + not.l -4(A0) + move.l -4(A0),D0 + not.l -(A0) + move.l (A0),D0 + not.l 4(A0,D3) + move.l 4(A0,D3),D0 + not.l $7000.w + move.l $7000.w,D0 + not.l $8000.l + move.l $8000.l,D0 + + rts + + ; MULU, MULS tests + ;----------------- +mult_test: + move.w #$5555,D0 + move.w #$AAAA,D1 + lea $8000.l,A0 + moveq #2,D2 + move.w D0,(A0) + move.w D1,4(A0) + move.w D1,-$1000(A0) + + mulu.w D1,D0 + mulu.w (A0),D0 + mulu.w (A0)+,D0 + mulu.w -2(A0),D0 + mulu.w -(A0),D0 + mulu.w 2(A0,D2.w),D0 + mulu.w $7000.w,D0 + mulu.w $8000.l,D0 + mulu.w mult_test+2(PC),D0 + mulu.w mult_test+4(PC,D2.w),D0 + mulu.w #$1234,D0 + + muls.w D1,D0 + muls.w (A0),D0 + muls.w (A0)+,D0 + muls.w -2(A0),D0 + muls.w -(A0),D0 + muls.w 2(A0,D2.w),D0 + muls.w $7000.w,D0 + muls.w $8000.l,D0 + muls.w mult_test+2(PC),D0 + muls.w mult_test+4(PC,D2.w),D0 + muls.w #$1234,D0 + + rts + + ; DIVU, DIVS tests + ;----------------- +div_test: + move.l D0,D0 + move.w #$AAAA,D1 + move.l #$12345678,D2 + lea $8000.l,A0 + moveq #2,D3 + move.w D1,(A0) + move.w D2,4(A0) + move.w D1,-$1000(A0) + + move.l D2,D0 + divu div_test+2(PC),D0 + move.l D2,D0 + divu div_test+4(PC,D3.w),D0 + + move.l D2,D0 + divs div_test+2(PC),D0 + move.l D2,D0 + divs div_test+4(PC,D3.w),D0 + + move.l D2,D0 + divu D1,D0 + move.l D2,D0 + divu (A0),D0 + move.l D2,D0 + divu (A0)+,D0 + move.l D2,D0 + divu -2(A0),D0 + move.l D2,D0 + divu -(A0),D0 + move.l D2,D0 + divu 2(A0,D3.w),D0 + move.l D2,D0 + divu $7000.w,D0 + move.l D2,D0 + divu $8000.l,D0 + move.l D2,D0 + divu #$1234,D0 + + move.l D2,D0 + divs D1,D0 + move.l D2,D0 + divs (A0),D0 + move.l D2,D0 + divs (A0)+,D0 + move.l D2,D0 + divs -2(A0),D0 + move.l D2,D0 + divs -(A0),D0 + move.l D2,D0 + divs 2(A0,D3.w),D0 + move.l D2,D0 + divs $7000.w,D0 + move.l D2,D0 + divs $8000.l,D0 + move.l D2,D0 + divs #$1234,D0 + + move.l #$12345678,D0 + divu #$1234,D0 + move.l #$55555555,D0 + divu #$AAAA,D0 + move.l #$AAAAAAAA,D0 + divu #$5555,D0 + move.l #$2AAAAAAA,D0 + divu #$5555,D0 + move.l #$12345678,D0 + divs #$1235,D0 + move.l #$12345678,D0 + divs #$1234,D0 + move.l #$55555555,D0 + divs #$AAAA,D0 + move.l #$AAAAAAAA,D0 + divs #$5555,D0 + move.l #$2AAAAAAA,D0 + divs #$5555,D0 + rts + + ; MOVE.B tests + ;------------- +move_b_test_0: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,D3 + move.b D1,D3 + move.b (A0),D3 + move.b (A0)+,D3 + move.b -(A0),D3 + move.b 1(A0),D3 + move.b -3(A0,D2.w),D3 + move.b $7000.w,D3 + move.b $8000.l,D3 + move.b move_b_test_0(PC),D3 + move.b move_b_test_0(PC,D2.w),D3 + move.b #$12,D3 + + rts + +move_b_test_2: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,(A1) + move.b D1,(A1) + move.b (A0),(A1) + move.b (A0)+,(A1) + move.b -(A0),(A1) + move.b 1(A0),(A1) + move.b -3(A0,D2.w),(A1) + move.b $7000.w,(A1) + move.b $8000.l,(A1) + move.b move_b_test_2(PC),(A1) + move.b move_b_test_2(PC,D2.w),(A1) + move.b #$12,(A1) + + rts + +move_b_test_3: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,(A1)+ + move.b D1,(A1)+ + move.b (A0),(A1)+ + move.b (A0)+,(A1)+ + move.b -(A0),(A1)+ + move.b 1(A0),(A1)+ + move.b -3(A0,D2.w),(A1)+ + move.b $7000.w,(A1)+ + move.b $8000.l,(A1)+ + move.b move_b_test_3(PC),(A1)+ + move.b move_b_test_3(PC,D2.w),(A1)+ + move.b #$12,(A1)+ + + rts + +move_b_test_4: + lea $8000.l,A0 + lea 12(A0),A1 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,-(A1) + move.b D1,-(A1) + move.b (A0),-(A1) + move.b (A0)+,-(A1) + move.b -(A0),-(A1) + move.b 1(A0),-(A1) + move.b -3(A0,D2.w),-(A1) + move.b $7000.w,-(A1) + move.b $8000.l,-(A1) + move.b move_b_test_4(PC),-(A1) + move.b move_b_test_4(PC,D2.w),-(A1) + move.b #$12,-(A1) + + rts + +move_b_test_5: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,1(A1) + move.b D1,2(A1) + move.b (A0),3(A1) + move.b (A0)+,4(A1) + move.b -(A0),5(A1) + move.b 1(A0),6(A1) + move.b -3(A0,D2.w),7(A1) + move.b $7000.w,8(A1) + move.b $8000.l,9(A1) + move.b move_b_test_5(PC),10(A1) + move.b move_b_test_5(PC,D2.w),11(A1) + move.b #$12,12(A1) + + rts + +move_b_test_6: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,1(A1,D2.w) + move.b D1,2(A1,D2.w) + move.b (A0),3(A1,D2.w) + move.b (A0)+,4(A1,D2.w) + move.b -(A0),5(A1,D2.w) + move.b 1(A0),6(A1,D2.w) + move.b -3(A0,D2.w),7(A1,D2.w) + move.b $7000.w,8(A1,D2.w) + move.b $8000.l,9(A1,D2.w) + move.b move_b_test_6(PC),10(A1,D2.w) + move.b move_b_test_6(PC,D2.w),11(A1,D2.w) + move.b #$12,12(A1,D2.w) + + rts + +move_b_test_7: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,$7001.w + move.b D1,$7002.w + move.b (A0),$7003.w + move.b (A0)+,$7004.w + move.b -(A0),$7005.w + move.b 1(A0),$7006.w + move.b -3(A0,D2.w),$7007.w + move.b $7000.w,$7008.w + move.b $8000.l,$7009.w + move.b move_b_test_7(PC),$700A.w + move.b move_b_test_7(PC,D2.w),$700B.w + move.b #$12,$700C.w + + rts + +move_b_test_8: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #2,D2 + move.b D0,$8001.l + move.b D1,$8002.l + move.b (A0),$8003.l + move.b (A0)+,$8004.l + move.b -(A0),$8005.l + move.b 1(A0),$8006.l + move.b -3(A0,D2.w),$8007.l + move.b $7000.w,$8008.l + move.b $8000.l,$8009.l + move.b move_b_test_8(PC),$800A.l + move.b move_b_test_8(PC,D2.w),$800B.l + move.b #$12,$800C.l + + rts + + ; MOVE.W tests + ;------------- +move_w_test_0: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,D3 + move.w D1,D3 + move.w A0,D3 + move.w (A0),D3 + move.w (A0)+,D3 + move.w -(A0),D3 + move.w 2(A0),D3 + move.w -4(A0,D2.w),D3 + move.w $7000.w,D3 + move.w $8000.l,D3 + move.w move_w_test_0(PC),D3 + move.w move_w_test_0(PC,D2.w),D3 + move.w #$1234,D3 + + rts + +move_w_test_1: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + movea.w D0,A3 + movea.w D1,A3 + movea.w A0,A3 + movea.w (A0),A3 + movea.w (A0)+,A3 + movea.w -(A0),A3 + movea.w 2(A0),A3 + movea.w -4(A0,D2.w),A3 + movea.w $7000.w,A3 + movea.w $8000.l,A3 + movea.w move_w_test_0(PC),A3 + movea.w move_w_test_0(PC,D2.w),A3 + movea.w #$1234,A3 + + rts + +move_w_test_2: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,(A1) + move.w D1,(A1) + move.w A0,(A1) + move.w (A0),(A1) + move.w (A0)+,(A1) + move.w -(A0),(A1) + move.w 2(A0),(A1) + move.w -4(A0,D2.w),(A1) + move.w $7000.w,(A1) + move.w $8000.l,(A1) + move.w move_w_test_2(PC),(A1) + move.w move_w_test_2(PC,D2.w),(A1) + move.w #$1234,(A1) + + rts + +move_w_test_3: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,(A1)+ + move.w D1,(A1)+ + move.w A0,(A1)+ + move.w (A0),(A1)+ + move.w (A0)+,(A1)+ + move.w -(A0),(A1)+ + move.w 2(A0),(A1)+ + move.w -4(A0,D2.w),(A1)+ + move.w $7000.w,(A1)+ + move.w $8000.l,(A1)+ + move.w move_w_test_3(PC),(A1)+ + move.w move_w_test_3(PC,D2.w),(A1)+ + move.w #$1234,(A1)+ + + rts + +move_w_test_4: + lea $8000.l,A0 + lea 26(A0),A1 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,-(A1) + move.w D1,-(A1) + move.w A0,-(A1) + move.w (A0),-(A1) + move.w (A0)+,-(A1) + move.w -(A0),-(A1) + move.w 2(A0),-(A1) + move.w -4(A0,D2.w),-(A1) + move.w $7000.w,-(A1) + move.w $8000.l,-(A1) + move.w move_w_test_4(PC),-(A1) + move.w move_w_test_4(PC,D2.w),-(A1) + move.w #$1234,-(A1) + + rts + +move_w_test_5: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,2(A1) + move.w D1,4(A1) + move.w A0,6(A1) + move.w (A0),8(A1) + move.w (A0)+,10(A1) + move.w -(A0),12(A1) + move.w 2(A0),14(A1) + move.w -4(A0,D2.w),16(A1) + move.w $7000.w,18(A1) + move.w $8000.l,20(A1) + move.w move_w_test_5(PC),22(A1) + move.w move_w_test_5(PC,D2.w),24(A1) + move.w #$1234,26(A1) + + rts + +move_w_test_6: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,2(A1,D2.w) + move.w D1,4(A1,D2.w) + move.w A0,6(A1,D2.w) + move.w (A0),8(A1,D2.w) + move.w (A0)+,10(A1,D2.w) + move.w -(A0),12(A1,D2.w) + move.w 2(A0),14(A1,D2.w) + move.w -4(A0,D2.w),16(A1,D2.w) + move.w $7000.w,18(A1,D2.w) + move.w $8000.l,20(A1,D2.w) + move.w move_w_test_6(PC),22(A1,D2.w) + move.w move_w_test_6(PC,D2.w),24(A1,D2.w) + move.w #$1234,26(A1,D2.w) + + rts + +move_w_test_7: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,$7002.w + move.w D1,$7004.w + move.w A0,$7006.w + move.w (A0),$7008.w + move.w (A0)+,$700A.w + move.w -(A0),$700C.w + move.w 2(A0),$700E.w + move.w -4(A0,D2.w),$7010.w + move.w $7000.w,$7012.w + move.w $8000.l,$7014.w + move.w move_w_test_7(PC),$7016.w + move.w move_w_test_7(PC,D2.w),$7018.w + move.w #$1234,$701A.w + + rts + +move_w_test_8: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #6,D2 + move.w D0,$8002.l + move.w D1,$8004.l + move.w A0,$8006.l + move.w (A0),$8008.l + move.w (A0)+,$800A.l + move.w -(A0),$800C.l + move.w 2(A0),$800E.l + move.w -4(A0,D2.w),$8010.l + move.w $7000.w,$8012.l + move.w $8000.l,$8014.l + move.w move_w_test_8(PC),$8016.l + move.w move_w_test_8(PC,D2.w),$8018.l + move.w #$1234,$801A.l + + rts + + ; MOVE.L tests + ;------------- +move_l_test_0: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,D3 + move.l D1,D3 + move.l A0,D3 + move.l (A0),D3 + move.l (A0)+,D3 + move.l -(A0),D3 + move.l 4(A0),D3 + move.l -6(A0,D2.w),D3 + move.l $7000.w,D3 + move.l $8000.l,D3 + move.l move_l_test_0(PC),D3 + move.l move_l_test_0(PC,D2.w),D3 + move.l #$12345678,D3 + + rts + +move_l_test_1: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + movea.l D0,A3 + movea.l D1,A3 + movea.l A0,A3 + movea.l (A0),A3 + movea.l (A0)+,A3 + movea.l -(A0),A3 + movea.l 4(A0),A3 + movea.l -6(A0,D2.w),A3 + movea.l $7000.w,A3 + movea.l $8000.l,A3 + movea.l move_l_test_0(PC),A3 + movea.l move_l_test_0(PC,D2.w),A3 + movea.l #$12345678,A3 + + rts + +move_l_test_2: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,(A1) + move.l D1,(A1) + move.l A0,(A1) + move.l (A0),(A1) + move.l (A0)+,(A1) + move.l -(A0),(A1) + move.l 4(A0),(A1) + move.l -6(A0,D2.w),(A1) + move.l $7000.w,(A1) + move.l $8000.l,(A1) + move.l move_l_test_2(PC),(A1) + move.l move_l_test_2(PC,D2.w),(A1) + move.l #$12345678,(A1) + + rts + +move_l_test_3: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,(A1)+ + move.l D1,(A1)+ + move.l A0,(A1)+ + move.l (A0),(A1)+ + move.l (A0)+,(A1)+ + move.l -(A0),(A1)+ + move.l 4(A0),(A1)+ + move.l -6(A0,D2.w),(A1)+ + move.l $7000.w,(A1)+ + move.l $8000.l,(A1)+ + move.l move_l_test_3(PC),(A1)+ + move.l move_l_test_3(PC,D2.w),(A1)+ + move.l #$12345678,(A1)+ + + rts + +move_l_test_4: + lea $8000.l,A0 + lea 52(A0),A1 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,-(A1) + move.l D1,-(A1) + move.l A0,-(A1) + move.l (A0),-(A1) + move.l (A0)+,-(A1) + move.l -(A0),-(A1) + move.l 4(A0),-(A1) + move.l -6(A0,D2.w),-(A1) + move.l $7000.w,-(A1) + move.l $8000.l,-(A1) + move.l move_l_test_4(PC),-(A1) + move.l move_l_test_4(PC,D2.w),-(A1) + move.l #$12345678,-(A1) + + rts + +move_l_test_5: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,4(A1) + move.l D1,8(A1) + move.l A0,12(A1) + move.l (A0),16(A1) + move.l (A0)+,20(A1) + move.l -(A0),24(A1) + move.l 4(A0),28(A1) + move.l -6(A0,D2.w),32(A1) + move.l $7000.w,36(A1) + move.l $8000.l,40(A1) + move.l move_l_test_5(PC),44(A1) + move.l move_l_test_5(PC,D2.w),48(A1) + move.l #$12345678,52(A1) + + rts + +move_l_test_6: + lea $8000.l,A0 + move.l A0,A1 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,4(A1,D2.w) + move.l D1,8(A1,D2.w) + move.l A0,12(A1,D2.w) + move.l (A0),16(A1,D2.w) + move.l (A0)+,20(A1,D2.w) + move.l -(A0),24(A1,D2.w) + move.l 4(A0),28(A1,D2.w) + move.l -6(A0,D2.w),32(A1,D2.w) + move.l $7000.w,36(A1,D2.w) + move.l $8000.l,40(A1,D2.w) + move.l move_l_test_6(PC),44(A1,D2.w) + move.l move_l_test_6(PC,D2.w),48(A1,D2.w) + move.l #$12345678,52(A1,D2.w) + + rts + +move_l_test_7: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,$7002.w + move.l D1,$7004.w + move.l A0,$7006.w + move.l (A0),$7008.w + move.l (A0)+,$700A.w + move.l -(A0),$700C.w + move.l 4(A0),$700E.w + move.l -6(A0,D2.w),$7010.w + move.l $7000.w,$7012.w + move.l $8000.l,$7014.w + move.l move_l_test_7(PC),$7016.w + move.l move_l_test_7(PC,D2.w),$7018.w + move.l #$12345678,$701A.w + + rts + +move_l_test_8: + lea $8000.l,A0 + moveq #0,D0 + moveq #-128,D1 + moveq #8,D2 + move.l D0,$8002.l + move.l D1,$8004.l + move.l A0,$8006.l + move.l (A0),$8008.l + move.l (A0)+,$800A.l + move.l -(A0),$800C.l + move.l 4(A0),$800E.l + move.l -6(A0,D2.w),$8010.l + move.l $7000.w,$8012.l + move.l $8000.l,$8014.l + move.l move_l_test_8(PC),$8016.l + move.l move_l_test_8(PC,D2.w),$8018.l + move.l #$12345678,$801A.l + + rts + +movem_test: + moveq #-1,D0 + moveq #-2,D1 + moveq #-3,D2 + moveq #-4,D3 + moveq #0,D4 + moveq #1,D5 + moveq #2,D6 + moveq #3,D7 + + movem.l D0-D7,-(SP) + movem.l 16(SP),A0-A3 + movem.l D0-D7,(SP) + movem.l (SP),A0-A3 + movem.l 16(SP),A0-A3 + movem.l D4-D7,16(SP) + movem.l 16(SP),A0-A3 + movem.l D0-D3,16(SP,D4) + movem.l 16(SP),A0-A3 + movem.l (SP)+,D0-D7 + + moveq #-1,D0 + moveq #-2,D1 + moveq #-3,D2 + moveq #-4,D3 + moveq #0,D4 + moveq #1,D5 + moveq #2,D6 + moveq #3,D7 + + movem.w D0-D7,-(SP) + movem.w 8(SP),A0-A3 + movem.w D0-D7,(SP) + movem.w (SP),A0-A3 + movem.w 8(SP),A0-A3 + movem.w D4-D7,8(SP) + movem.w 8(SP),A0-A3 + movem.w D0-D3,8(SP,D4) + movem.w 8(SP),A0-A3 + movem.w (SP)+,D0-D7 + + rts + + ; Shifts immediate tests + ;----------------------- +shifti_test: + moveq #$55,D0 + asr.b #3,D0 + moveq #-1,D0 + lsr.b #3,D0 + moveq #-10,D0 + ror.b #8,D0 + moveq #-128,D0 + roxr.b #3,D0 + + moveq #$55,D0 + asr.w #3,D0 + moveq #-1,D0 + lsr.w #3,D0 + moveq #-10,D0 + ror.w #8,D0 + moveq #-128,D0 + roxr.w #3,D0 + + moveq #$55,D0 + asr.l #3,D0 + moveq #-1,D0 + lsr.l #3,D0 + moveq #-10,D0 + ror.l #8,D0 + moveq #-128,D0 + roxr.l #3,D0 + + moveq #$55,D0 + asl.b #3,D0 + moveq #-1,D0 + lsl.b #3,D0 + moveq #-10,D0 + rol.b #8,D0 + moveq #-128,D0 + roxl.b #3,D0 + + moveq #$55,D0 + asl.w #3,D0 + moveq #-1,D0 + lsl.w #3,D0 + moveq #-10,D0 + rol.w #8,D0 + moveq #-128,D0 + roxl.w #3,D0 + + moveq #$55,D0 + asl.l #3,D0 + moveq #-1,D0 + lsl.l #3,D0 + moveq #-10,D0 + rol.l #8,D0 + moveq #-128,D0 + roxl.l #3,D0 + rts + + ; Shifts register tests + ;---------------------- +shiftr_test: + moveq #$55,D0 + moveq #1,D1 + asr.b D1,D0 + moveq #-1,D0 + moveq #3,D1 + lsr.b D1,D0 + moveq #-10,D0 + moveq #5,D1 + ror.b D1,D0 + moveq #-128,D0 + moveq #7,D1 + roxr.b D1,D0 + + moveq #$55,D0 + moveq #9,D1 + asr.w D1,D0 + moveq #-1,D0 + moveq #11,D1 + lsr.w D1,D0 + moveq #-10,D0 + moveq #13,D1 + ror.w D1,D0 + moveq #-128,D0 + moveq #15,D1 + roxr.w D1,D0 + + moveq #$55,D0 + moveq #17,D1 + asr.l D1,D0 + moveq #-1,D0 + moveq #19,D1 + lsr.l D1,D0 + moveq #-10,D0 + moveq #21,D1 + ror.l D1,D0 + moveq #-128,D0 + moveq #23,D1 + roxr.l D1,D0 + + moveq #$55,D0 + moveq #1,D1 + asl.b D1,D0 + moveq #-1,D0 + moveq #3,D1 + lsl.b D1,D0 + moveq #-10,D0 + moveq #5,D1 + rol.b D1,D0 + moveq #-128,D0 + moveq #7,D1 + roxl.b D1,D0 + + moveq #$55,D0 + moveq #9,D1 + asl.w D1,D0 + moveq #-1,D0 + moveq #11,D1 + lsl.w D1,D0 + moveq #-10,D0 + moveq #13,D1 + rol.w D1,D0 + moveq #-128,D0 + moveq #15,D1 + roxl.w D1,D0 + + moveq #$55,D0 + moveq #17,D1 + asl.l D1,D0 + moveq #-1,D0 + moveq #19,D1 + lsl.l D1,D0 + moveq #-10,D0 + moveq #21,D1 + rol.l D1,D0 + moveq #-128,D0 + moveq #23,D1 + roxl.l D1,D0 + rts + + ; Shifts memory tests + ;-------------------- +shiftm_test: + lea $8000.l,A0 + moveq #8,D1 + + move.l #$5555AAAA,(A0) + asr (A0)+ + asr (A0) + asr -(A0) + asr 2(A0) + asr -6(A0,D1.w) + asr $7000.w + asr $8000.l + + move.l #$5555AAAA,(A0) + lsr (A0)+ + lsr (A0) + lsr -(A0) + lsr 2(A0) + lsr -6(A0,D1.w) + lsr $7000.w + lsr $8000.l + + move.l #$5555AAAA,(A0) + ror (A0)+ + ror (A0) + ror -(A0) + ror 2(A0) + ror -6(A0,D1.w) + ror $7000.w + ror $8000.l + + move.l #$5555AAAA,(A0) + roxr (A0)+ + roxr (A0) + roxr -(A0) + roxr 2(A0) + roxr -6(A0,D1.w) + roxr $7000.w + roxr $8000.l + + move.l #$5555AAAA,(A0) + asl (A0)+ + asl (A0) + asl -(A0) + asl 2(A0) + asl -6(A0,D1.w) + asl $7000.w + asl $8000.l + + move.l #$5555AAAA,(A0) + lsl (A0)+ + lsl (A0) + lsl -(A0) + lsl 2(A0) + lsl -6(A0,D1.w) + lsl $7000.w + lsl $8000.l + + move.l #$5555AAAA,(A0) + rol (A0)+ + rol (A0) + rol -(A0) + rol 2(A0) + rol -6(A0,D1.w) + rol $7000.w + rol $8000.l + + move.l #$5555AAAA,(A0) + roxl (A0)+ + roxl (A0) + roxl -(A0) + roxl 2(A0) + roxl -6(A0,D1.w) + roxl $7000.w + roxl $8000.l + + rts + ; DBcc tests + ;----------- +dbcc_test: + moveq #3,d0 +.loop1 + dbra d0,.loop1 + + moveq #3,d0 +.loop2 + move #%0101,CCR + dbhi d0,.loop2 + + moveq #3,d0 +.loop3 + move #%0000,CCR + dbhi d0,.loop3 + + moveq #3,d0 +.loop4 + move #%0101,CCR + dbls d0,.loop4 + + moveq #3,d0 +.loop5 + move #%0000,CCR + dbls d0,.loop5 + + moveq #3,d0 +.loop6 + move #%0001,CCR + dbcc d0,.loop6 + + moveq #3,d0 +.loop7 + move #%0000,CCR + dbcc d0,.loop7 + + moveq #3,d0 +.loop8 + move #%0001,CCR + dbcs d0,.loop8 + + moveq #3,d0 +.loop9 + move #%0000,CCR + dbcs d0,.loop9 + + moveq #3,d0 +.loop10 + move #%0100,CCR + dbne d0,.loop10 + + moveq #3,d0 +.loop11 + move #%0000,CCR + dbne d0,.loop11 + + moveq #3,d0 +.loop12 + move #%0100,CCR + dbeq d0,.loop12 + + moveq #3,d0 +.loop13 + move #%0000,CCR + dbeq d0,.loop13 + + moveq #3,d0 +.loop14 + move #%0001,CCR + dbvc d0,.loop14 + + moveq #3,d0 +.loop15 + move #%0000,CCR + dbvc d0,.loop15 + + moveq #3,d0 +.loop16 + move #%0001,CCR + dbvs d0,.loop16 + + moveq #3,d0 +.loop17 + move #%0000,CCR + dbvs d0,.loop17 + + moveq #3,d0 +.loop18 + move #%1000,CCR + dbpl d0,.loop18 + + moveq #3,d0 +.loop19 + move #%0000,CCR + dbpl d0,.loop19 + + moveq #3,d0 +.loop20 + move #%1000,CCR + dbmi d0,.loop20 + + moveq #3,d0 +.loop21 + move #%0000,CCR + dbmi d0,.loop21 + + moveq #3,d0 +.loop22 + move #%1010,CCR + dbge d0,.loop22 + + moveq #3,d0 +.loop23 + move #%0000,CCR + dbge d0,.loop23 + + moveq #3,d0 +.loop24 + move #%1000,CCR + dblt d0,.loop24 + + moveq #3,d0 +.loop25 + move #%0000,CCR + dblt d0,.loop25 + + moveq #3,d0 +.loop26 + move #%1010,CCR + dbgt d0,.loop26 + + moveq #3,d0 +.loop27 + move #%0000,CCR + dbgt d0,.loop27 + + moveq #3,d0 +.loop28 + move #%0100,CCR + dble d0,.loop28 + + moveq #3,d0 +.loop29 + move #%0000,CCR + dble d0,.loop29 + + rts + ; Bcc tests + ;----------- +bcc_test: + move #%0000,CCR + bhi .next0 + rts +.next0 + move #%0001,CCR + bls .next1 + rts +.next1 + move #%0000,CCR + bcc .next2 + rts +.next2 + move #%0001,CCR + bcs .next3 + rts +.next3 + move #%0000,CCR + bne .next4 + rts +.next4 + move #%0100,CCR + beq .next5 + rts +.next5 + move #%0000,CCR + bvc .next6 + rts +.next6 + move #%0010,CCR + bvs .next7 + rts +.next7 + move #%0000,CCR + bpl .next8 + rts +.next8 + move #%1000,CCR + bmi .next9 + rts +.next9 + move #%1010,CCR + bge .next10 + rts +.next10 + move #%1000,CCR + blt .next11 + rts +.next11 + move #%1010,CCR + bgt .next12 + rts +.next12 + move #%0100,CCR + ble .next13 + rts +.next13 + rts + ; Scc tests + ;----------- +scc_test: + lea $8000.l,A0 + moveq #1,D1 + + st d0 + + move #%0101,CCR + shi (a0) + move.b (a0),d0 + + andi #%1010,CCR ;%0000 + shi (a0)+ + move.b -1(a0),d0 + + ori #%0101,CCR ;%0101 + sls -1(a0) + move.b -1(a0),d0 + + eori #%0101,CCR ;%0000 + sls -(a0) + move.b (a0),d0 + + move #%0001,CCR + scc 1(a0,d1.w) + + andi #%1110,CCR ;%0000 + scc $8000.l + + ori #%0001,CCR ;%0001 + scs d0 + + eori #%0001,CCR ;%0000 + scs d0 + + move #%0100,CCR + sne d0 + + move #%0000,CCR + sne d0 + + move #%0100,CCR + seq d0 + + move #%0000,CCR + seq d0 + + move #%0001,CCR + svc d0 + + move #%0000,CCR + svc d0 + + move #%0001,CCR + svs d0 + + move #%0000,CCR + svs d0 + + move #%1000,CCR + spl d0 + + move #%0000,CCR + spl d0 + + move #%1000,CCR + smi d0 + + move #%0000,CCR + smi d0 + + move #%1010,CCR + sge d0 + + move #%0000,CCR + sge d0 + + move #%1000,CCR + slt d0 + + move #%0000,CCR + slt d0 + + move #%1010,CCR + sgt d0 + + move #%0000,CCR + sgt d0 + + move #%0100,CCR + sle d0 + + move #%0000,CCR + sle d0 + + rts diff --git a/samples/Motorola 68K Assembly/system.s b/samples/Motorola 68K Assembly/system.s new file mode 100644 index 0000000000..d7d96efbdc --- /dev/null +++ b/samples/Motorola 68K Assembly/system.s @@ -0,0 +1,384 @@ +;;; Created by Miguel Mendez. +;;; This file is public domain. + + section text + public _installLevel2 + public _installLevel3 + public _ciab_start + public _ciab_stop + public _closeOS + public _getKeyPress + public _restoreOS + public _getMasterTimer + public _resetMasterTimer + public _mouse_left + public _mouse_right + public _mousePressL + public _mousePressR + public _mousePosX + public _mousePosY + public _serialPutc + +LVOOpenLibrary EQU -552 +LVOCloseLibrary EQU -414 +LVOWaitBlitt EQU -228 +LVODisownBlitter EQU -462 +LVOOwnBlitter EQU -456 +LVOLoadView EQU -222 +LVOWaitTOF EQU -270 +LVOForbid EQU -132 +LVOPermit EQU -138 +SERDAT EQU $dff030 +SERDATR EQU $dff018 +CIAB EQU $bfd000 +CIAA EQU $bfe001 +CIASDR EQU $0C00 +CIAA_CRA EQU $e00 +CIAB_CRA EQU $e00 +CIAA_ICR EQU $d00 +CIAB_ICR EQU $d00 +CIAB_TALO EQU $400 +CIAB_TAHI EQU $500 +CIAICRB_SP EQU 3 +INTB_PORTS EQU (3) +INTF_PORTS EQU (1<<3) +INTREQR EQU $1e +INTREQ EQU $9c +CIACRAF_SPMODE EQU (1<<6) +VHPOSR EQU $006 + + +_closeOS: + movem.l d0-a6, -(sp) + move.l $6c(a0),_int3save ; store original vblank int + move.l $68(a0),_int2save ; store original level 2 int + + lea gfx_lib,a1 ; open graphics.library + moveq #0,d0 + move.l 4.w,a6 ; exec base + jsr LVOOpenLibrary(a6) + + move.l d0,_gfxbase ; store open gfxlibrary pointer + move.l d0,a6 + move.l 38(a6),_oldcopper ; store old copper list address + move.l 34(a6),_oldview ; store old WB view. + + jsr LVOWaitBlitt(a6) + jsr LVOOwnBlitter(a6) ; _LVOOwnBlitter + jsr LVOWaitBlitt(a6) ; _LVOWaitBlitt + + moveq #0,d7 + move.l d7,a1 + + jsr LVOLoadView(a6) ; _LVOLoadView(Null) + jsr LVOWaitTOF(a6) ; _LVOWaitTOF + jsr LVOWaitTOF(a6) ; _LVOWaitTOF + + move.l 4.w,a6 + jsr LVOForbid(a6) ; _LVOForbid + + move.w $DFF01C,_intenar + move.w $DFF01E,_intreqr + move.w $DFF002,_dmaconr + move.w $DFF010,_adkconr + + move.w #%0111111111111111,$DFF09A ; Intena + + lea CIAA, a4 ; save CIAA registers and setup + move.b CIAA_CRA(a4), _ciaa_cra + move.b CIAA_ICR(a4), _ciaa_icr + + lea CIAB, a4 ; save CIAB registers and setup + move.b CIAB_CRA(a4), _ciab_cra + move.b CIAB_ICR(a4), _ciab_icr + + move.b _ciab_cra, d0 + and.b #%11000000,d0 ;Don't trash bits we are not + or.b #%00001000,d0 ;using... + move.b d0, CIAB_CRA(a4) + move.b #%01111111, CIAB_ICR(a4) + move.b CIAB_TALO(a4), _ciab_ta_lo + move.b CIAB_TAHI(a4), _ciab_ta_hi + + move.w #%1110000000100000,$DFF09A ; enable needed IRQs + + move.l _gfxbase,a6 + jsr LVOWaitTOF(a6) ; WaitTOF + + move.w #%0111111111111111,$DFF096 ; DMACONW + move.w #%1000001111000000,$DFF096 + + ;; bsr _setupFPCR + + movem.l (sp)+,d0-a6 + moveq #0, d0 + rts + +_restoreOS: + movem.l d0-a6,-(sp) + + ;; bsr _restoreFPCR + + lea CIAA, a4 ; restore CIAA registers + move.b _ciaa_cra, CIAA_CRA(a4) + nop + move.b _ciaa_icr, CIAA_ICR(a4) + nop + + lea CIAB, a4 ; restore CIAB registers + move.b _ciab_ta_lo, CIAB_TALO(a4) + nop + move.b _ciab_ta_hi, CIAB_TAHI(a4) + nop + move.b _ciab_cra, CIAB_CRA(a4) + nop + move.b _ciab_icr, CIAB_ICR(a4) + nop + + move.l _int3save,$6c(a0) ; restore old level3 int. + + move.l _int2save,$68(a0) ;restore old level2 int. + + move _intenar,d7 + bset #$f,d7 + move d7,$DFF09A ; restore old interrupts. + + + move _intreqr,d7 + bset #$f,d7 + move d7,$DFF09C ; the same... + + move _dmaconr,d7 + bset #$f,d7 + move d7,$DFF096 ; restore old DMAs + + move _adkconr,d7 + bset #$f,d7 + move d7,$DFF09E ; restore Adkcon + + move.l _gfxbase,a6 + move.l _oldview,a1 + jsr LVOLoadView(a6) ; _LVOLoadview(OldView) + + move.l _oldcopper,$dff080 ; restore old copper list. + + jsr LVODisownBlitter(a6) ; _LVODisownBlitter + + move.l 4.w,a6 + move.l _gfxbase,a1 + jsr LVOCloseLibrary(a6) ; close graphics.library + + jsr LVOPermit(a6) ; _LVOPermit + movem.l (sp)+,d0-a6 + moveq #0, d0 + rts + +; Clear DZ bit --> return infinity when dividing by zero. +; Infinity is supported in hardware in 040 and 060, +; and the register can be read and written in user mode. +; See pages 6-3, 6-4, 6-7 and 6-32 in 68060 manual. +_setupFPCR: + fmove.l fpcr,d0 + move.l d0,_fpcr + ; clear DA + not.l d0 + or.l #$00000400,d0 + not.l d0 + ; set round-to-zero (01) + not.l d0 + or.l #$00000030,d0 + not.l d0 + or.l #$00000010,d0 + ; set always single (01) + ;not.l d0 + ;or.l #$000000c0,d0 + ;not.l d0 + ;or.l #$00000040,d0 + fmove.l d0,fpcr + rts + +_restoreFPCR: + move.l _fpcr,d0 + fmove.l d0,fpcr + moveq.l #0,d0 + rts + +_installLevel3: + move.l a1, _vblcallback + move.l a2, _vblcallback2 + lea Level3(pc), a1 + move.l a1, $6c(a0) + rts + +_installLevel2: + lea Level2(pc), a1 + + move.l a1, $68(a0) + nop + nop + move.w #%1000000000001000,$DFF09A ; enable level2 IRQ + rts + +_mousePressL: + moveq.l #0,d0 + btst #6,$bfe001 + seq d0 + rts + +_mousePressR: + moveq.l #0,d0 + btst #10,$dff016 + seq d0 + rts + +_mousePosX: +_mousePosY: + moveq #0,d0 + rts + +Level3: + movem.l d0-d7/a0-a6,-(sp) + lea $dff000,a6 + move.w $dff01e,d0 ; intreq-read + btst #5,d0 ; Vertical Blanc? + bne .vertb + btst #6,d0 ; Blitter + bne .blit + bra .quitL3 + +;--- Blitter +.blit: + move.w #$4040,$dff09c + move.w #$4040,$dff09c + bra .quitL3 + +;--- Vertical Blank +.vertb: + addq.l #1, _master_timer ; increase timer by 1 + move.w #$4020,$dff09c + move.w #$4020,$dff09c + move.l _vblcallback, a5 ; Paula replay callback. + cmp.l #0,a5 + beq .skip_callback1 + jsr (a5) +.skip_callback1 + move.l _vblcallback2, a5 ; Lerp callback. + cmp.l #0,a5 + beq .quitL3 + jsr (a5) + bra.w .quitL3 +.quitL3: + movem.l (sp)+,d0-d7/a0-a6 + nop + nop + rte + +Level2: + movem.l d0-d1/a0-a2, -(sp) + lea $dff000,a0 + move.w INTREQR(a0), d0 + btst #INTB_PORTS, d0 + beq l2_end + + lea CIAA, a1 + btst #CIAICRB_SP, CIAA_ICR(a1) + beq l2_end + + move.b CIASDR(a1),d0 + or.b #CIACRAF_SPMODE,CIAA_CRA(a1) + not.b d0 + ror.b #1,d0 + move.b d0, _rawkey + + ;handshake + moveq #3-1,d1 +.wait1 move.b VHPOSR(a0),d0 +.wait2 cmp.b VHPOSR(a0),d0 + beq .wait2 + dbf d1,.wait1 + + ;set input mode + and.b #~(CIACRAF_SPMODE),CIAA_CRA(a1) + +l2_end: move.w #INTF_PORTS, INTREQ(a0) + tst.w INTREQR(a0) + movem.l (sp)+,d0-d1/a0-a2 + nop + nop + rte + +_getKeyPress: + moveq #0, d0 + moveq #0, d1 + move.b _rawkey, d0 + move.b d1, _rawkey + rts + +_getMasterTimer: + move.l _master_timer,d0 + rts + +_resetMasterTimer: + moveq.l #0,d0 + move.l d0, _master_timer + rts + +_serialPutc: + move.w SERDATR, d1 + btst #13, d1 + beq.s _serialPutc ; Wait for character to finish + and.b #$7f, d1 + cmp.b #$18, d1 ; Ctrl-X? + beq.s spc_exit + cmp.b #$13, d1 ; Ctrl-S? + beq.s _serialPutc + and.w #$ff, d0 + or.w #$100, d0 + move.w d0, SERDAT +spc_exit: + rts + +_ciab_start: + lea CIAB, a0 + move.b #$ff, CIAB_TALO(a0) + nop + move.b #$ff, CIAB_TAHI(a0) + nop + bset.b #0, CIAB_CRA(a0) + rts + +_ciab_stop: + lea CIAB, a0 + bclr.b #0, CIAB_CRA(a0) + moveq #0, d0 + move.b CIAB_TAHI(a0), d0 + lsl.w #8, d0 + move.b CIAB_TALO(a0), d0 + rts + + section data, data + +gfx_lib dc.b "graphics.library",0,0 +_vblcallback dc.l 0 +_vblcallback2 dc.l 0 +_vbr dc.l 0 +_fpcr dc.l 0 +_gfxbase dc.l 0 +_oldcopper dc.l 0 +_oldview dc.l 0 +_intenar dc.w 0 +_intreqr dc.w 0 +_dmaconr dc.w 0 +_adkconr dc.w 0 +_int2save dc.l 0 +_int3save dc.l 0 +_master_timer dc.l 0 +_mouse_left dc.l 0 +_mouse_right dc.l 0 +_ciab_ta_lo dc.b 0 +_ciab_ta_hi dc.b 0 +_ciab_icr dc.b 0 +_ciaa_icr dc.b 0 +_ciab_cra dc.b 0 +_ciaa_cra dc.b 0 +_rawkey dcb.b 0 From de3c2d4a1641769c347780db3d6bea58e5814649 Mon Sep 17 00:00:00 2001 From: Iggy Drougge Date: Thu, 3 Oct 2019 11:27:01 +0200 Subject: [PATCH 2/4] Revert ACE mode for m68k assembly --- lib/linguist/languages.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/linguist/languages.yml b/lib/linguist/languages.yml index 649192b369..e0253e10c6 100755 --- a/lib/linguist/languages.yml +++ b/lib/linguist/languages.yml @@ -3233,7 +3233,7 @@ Motorola 68K Assembly: - ".s" - ".x68" tm_scope: source.m68k - ace_mode: text + ace_mode: assembly_x86 language_id: 477582706 Myghty: type: programming From c8bface8d18271c7258ab3d16167449b2f074680 Mon Sep 17 00:00:00 2001 From: Alhadis Date: Fri, 10 Jan 2020 15:43:50 +1100 Subject: [PATCH 3/4] Add heuristics for Motorola 68K Assembly --- lib/linguist/heuristics.yml | 18 ++++++++++++++++++ test/test_heuristics.rb | 23 ++++++++++++++++++++--- 2 files changed, 38 insertions(+), 3 deletions(-) diff --git a/lib/linguist/heuristics.yml b/lib/linguist/heuristics.yml index aa9d578416..6685fa1246 100644 --- a/lib/linguist/heuristics.yml +++ b/lib/linguist/heuristics.yml @@ -58,6 +58,10 @@ disambiguations: pattern: '^[=-]+(\s|\n)|{{[A-Za-z]' - language: AGS Script pattern: '^(\/\/.+|((import|export)\s+)?(function|int|float|char)\s+((room|repeatedly|on|game)_)?([A-Za-z]+[A-Za-z_0-9]+)\s*[;\(])' +- extensions: ['.asm'] + rules: + - language: Motorola 68K Assembly + named_pattern: m68k - extensions: ['.asy'] rules: - language: LTspice Symbol @@ -198,6 +202,8 @@ disambiguations: - language: Slice - extensions: ['.inc'] rules: + - language: Motorola 68K Assembly + named_pattern: m68k - language: PHP pattern: '^<\?(?:php)?' - language: SourcePawn @@ -403,6 +409,10 @@ disambiguations: pattern: '^(use |fn |mod |pub |macro_rules|impl|#!?\[)' - language: RenderScript pattern: '#include|#pragma\s+(rs|version)|__attribute__' +- extensions: ['.s'] + rules: + - language: Motorola 68K Assembly + named_pattern: m68k - extensions: ['.sc'] rules: - language: SuperCollider @@ -508,6 +518,14 @@ named_patterns: - 'std::\w+' fortran: '^(?i:[c*][^abd-z]| (subroutine|program|end|data)\s|\s*!)' key_equals_value: '^[^#!;][^=]*=' + m68k: + - '(?im)\bmoveq(?:\.l)?\s+#(?:\$-?[0-9a-f]{1,3}|%[0-1]{1,8}|-?[0-9]{1,3}),\s*d[0-7]\b' + - '(?im)^\s*move(?:\.[bwl])?\s+(?:sr|usp),\s*[^\s]+' + - '(?im)^\s*move\.[bwl]\s+.*\b[ad]\d' + - '(?im)^\s*movem\.[bwl]\b' + - '(?im)^\s*move[mp](?:\.[wl])?\b' + - '(?im)^\s*btst\b' + - '(?im)^\s*dbra\b' objectivec: '^\s*(@(interface|class|protocol|property|end|synchronised|selector|implementation)\b|#import\s+.+\.h[">])' perl5: '\buse\s+(?:strict\b|v?5\.)' perl6: '^\s*(?:use\s+v6\b|\bmodule\b|\b(?:my\s+)?class\b)' diff --git a/test/test_heuristics.rb b/test/test_heuristics.rb index 3a16963e9d..409b0b514b 100644 --- a/test/test_heuristics.rb +++ b/test/test_heuristics.rb @@ -36,7 +36,7 @@ def test_symlink_empty # alt_name is a file name that will be used instead of the file name of the # original sample. This is used to force a sample to go through a specific - # heuristic even if it's extension doesn't match. + # heuristic even if its extension doesn't match. def assert_heuristics(hash, alt_name=nil) candidates = hash.keys.map { |l| Language[l] } @@ -76,6 +76,14 @@ def test_asc_by_heuristics }, "test.asc") end + def test_asm_by_heuristics + assert_heuristics({ + "Motorola 68K Assembly" => all_fixtures("Motorola 68K Assembly", "*.asm"), + # Assembly lacks a heuristic + nil => all_fixtures("Assembly", "*.asm") + }) + end + def test_asy_by_heuristics assert_heuristics({ "Asymptote" => all_fixtures("Asymptote", "*.asy"), @@ -225,10 +233,11 @@ def test_ice_by_heuristics }) end - # Candidate languages = ["Assembly", "C++", "HTML", "PAWN", "PHP", - # "POV-Ray SDL", "Pascal", "SQL", "SourcePawn"] + # Candidate languages = ["Assembly", "C++", "HTML", "Motorola 68K Assembly", "PAWN", + # "PHP", "POV-Ray SDL", "Pascal", "SQL", "SourcePawn"] def test_inc_by_heuristics assert_heuristics({ + "Motorola 68K Assembly" => all_fixtures("Motorola 68K Assembly", "*.inc"), "PHP" => all_fixtures("PHP", "*.inc"), "POV-Ray SDL" => all_fixtures("POV-Ray SDL", "*.inc") }) @@ -450,6 +459,14 @@ def test_rs_by_heuristics }) end + def test_s_by_heuristics + assert_heuristics({ + "Motorola 68K Assembly" => all_fixtures("Motorola 68K Assembly", "*.s"), + # Unix Assembly lacks a heuristic + nil => all_fixtures("Unix Assembly", "*.s") + }) + end + # Candidate languages = ["Scala", "SuperCollider"] def test_sc_supercollider_scala_by_heuristics assert_heuristics({ From 3547e2fbee6f521c8ef251af28d9067fd63a7e11 Mon Sep 17 00:00:00 2001 From: Alhadis Date: Fri, 10 Jan 2020 17:17:58 +1100 Subject: [PATCH 4/4] Add SWIG language and `.i` Assembly extension --- lib/linguist/heuristics.yml | 6 + lib/linguist/languages.yml | 10 + samples/Assembly/3D_PRG.I | 82 ++++ samples/Assembly/A8514.I | 230 ++++++++++ samples/Assembly/audio.i | 108 +++++ samples/SWIG/CGAL_AABB_tree.i | 146 +++++++ samples/SWIG/dictionary.i | 25 ++ samples/SWIG/gauss.i | 767 ++++++++++++++++++++++++++++++++++ test/test_heuristics.rb | 9 + vendor/README.md | 1 + 10 files changed, 1384 insertions(+) create mode 100644 samples/Assembly/3D_PRG.I create mode 100644 samples/Assembly/A8514.I create mode 100644 samples/Assembly/audio.i create mode 100644 samples/SWIG/CGAL_AABB_tree.i create mode 100644 samples/SWIG/dictionary.i create mode 100644 samples/SWIG/gauss.i diff --git a/lib/linguist/heuristics.yml b/lib/linguist/heuristics.yml index 6685fa1246..79f90184dd 100644 --- a/lib/linguist/heuristics.yml +++ b/lib/linguist/heuristics.yml @@ -195,6 +195,12 @@ disambiguations: rules: - language: Hack pattern: '<\?hh' +- extensions: ['.i'] + rules: + - language: Motorola 68K Assembly + named_pattern: m68k + - language: SWIG + pattern: '^[ \t]*%[a-z_]+\b|^%[{}]$' - extensions: ['.ice'] rules: - language: JSON diff --git a/lib/linguist/languages.yml b/lib/linguist/languages.yml index 0700ce9072..9687404b62 100755 --- a/lib/linguist/languages.yml +++ b/lib/linguist/languages.yml @@ -334,6 +334,7 @@ Assembly: extensions: - ".asm" - ".a51" + - ".i" - ".inc" - ".nasm" tm_scope: source.assembly @@ -4800,6 +4801,15 @@ SVG: codemirror_mode: xml codemirror_mime_type: text/xml language_id: 337 +SWIG: + type: programming + extensions: + - ".i" + tm_scope: source.c++ + ace_mode: c_cpp + codemirror_mode: clike + codemirror_mime_type: text/x-c++src + language_id: 1066250075 Sage: type: programming group: Python diff --git a/samples/Assembly/3D_PRG.I b/samples/Assembly/3D_PRG.I new file mode 100644 index 0000000000..a48f154490 --- /dev/null +++ b/samples/Assembly/3D_PRG.I @@ -0,0 +1,82 @@ +; this file is part of Release, written by Malban in 2017 +; +*********************************************************** +; input list in X +; destroys u +; 0 move +; negative use as shift +; positive end +asm_draw_3ds: + ldu 2,x + lda 1,x; +starts: + sta $d004; + ldd ,u; + sta $d001; + clr $d000; + lda ,x; + inc $d000; + stb $d001; + sta $d00A; + clr $d005; + leax 4,x; + ldu 2,x; + lda ,x; + bgt end1s; + lda 1,x; + ldb #$40; +waits: bitb $d00D; + beq waits; + ldb #0 + stb $d00A; + bra starts; +end1s: ldd #$0040; +ends: bitb $d00D; + beq ends; + sta $d00A + rts + + +asm_draw_3d: + ldu 1,x +start: ldd ,u; + sta $d001; + clr $d000; + lda ,x; + inc $d000; + stb $d001; + sta $d00A; + clr $d005; + leax 3,x; + ldu 1,x; + lda ,x; + bgt end1; + ldd #$0040; +wait: bitb $d00D; + beq wait; + sta $d00A; + bra start; +end1: ldd #$0040; +end: bitb $d00D; + beq end; + sta $d00A + rts + + + +; Cosinus data +cosinus3d: + DB 63, 62, 61, 60, 58, 55, 52, 48, 43, 39, 34 ; 11 + DB 28, 23, 17, 10, 4, -1, -7, -14, -20, -25, -31 ; 22 + DB -36, -41, -46, -50, -53, -56, -59, -61, -62, -62, -62 ; 33 + DB -62, -61, -59, -56, -53, -50, -46, -41, -36, -31, -25 ; 44 + DB -20, -14, -7, -1, 4, 10, 17, 23, 28, 34, 39 ; 55 + DB 43, 48, 52, 55, 58, 60, 61, 62, 63 +; Sinus data +sinus3d: + DB 0, 6, 12, 18, 24, 30, 35, 40, 45, 49, 52 ; 11 + DB 56, 58, 60, 62, 62, 62, 62, 61, 59, 57, 54 ; 22 + DB 51, 47, 42, 38, 32, 27, 21, 15, 9, 3, -3 ; 33 + DB -9, -15, -21, -27, -32, -38, -42, -47, -51, -54, -57 ; 44 + DB -59, -61, -62, -62, -62, -62, -60, -58, -56, -52, -49 ; 55 + DB -45, -40, -35, -30, -24, -18, -12, -6, -3 diff --git a/samples/Assembly/A8514.I b/samples/Assembly/A8514.I new file mode 100644 index 0000000000..6f311c385f --- /dev/null +++ b/samples/Assembly/A8514.I @@ -0,0 +1,230 @@ + + +;;/*....................Bit Definitions....................................*/ +NOERROR equ 00h +NO8514A equ 80h +;;/*....................GC250 REGISTERS....................................*/ +DISP_STAT equ 02E8h ;/* Display Status Register */ +H_TOTAL equ 02E8h ;/* Horizontal Total Register */ +DAC_MASK equ 02EAh ;/* DAC Mask */ +DAC_RINDEX equ 02EBh ;/* DAC read index register */ +DAC_WINDEX equ 02ECh ;/* DAC write index register */ +DAC_DATA equ 02EDh ;/* DAC Data register */ +H_DISPLAYED equ 06E8h ;/* Horiz Displayed Reg */ +H_SYNC_STRT equ 0AE8h ;/* Horiz Sync Start Reg */ +H_SYNC_WID equ 0EE8h ;/* Horiz Sync Width Reg */ +V_TOTAL equ 12E8h ;/* Vertical Total Reg */ +V_DISPLAYED equ 16E8h ;/* Vertical Displayed Reg */ +V_SYNC_STRT equ 1AE8h ;/* Vertical Sync Start Reg */ +V_SYNC_WID equ 1EE8h ;/* Vertical Sync Width Reg */ +DISP_CNTL equ 22E8h ;/* Display Control Register */ +SUBSYS_CNTL equ 42E8h ;/* Subsystem Control Reg */ +SUBSYS_STAT equ 42E8h ;/* Subsystem Status Reg */ +ROM_PAGE_SEL equ 46E8h ;/* ROM Page Select Reg */ +ADVFUNC_CNTL equ 4AE8h ;/* Adv Func Control Reg */ +CUR_Y_POS equ 82E8h ;/* Current Y Position */ +CUR_X_POS equ 86E8h ;/* Current Y Position */ +DESTY_AXSTP equ 8AE8h ;/* Dest Y/Axial Step Reg */ +DESTX_DIASTP equ 8EE8h ;/* Dest X/Diagl Step Reg */ +ERR_TERM equ 92E8h ;/* Error Term Register */ +MAJ_AXIS_PCNT equ 96E8h ;/* Major Axis Pixel Count */ +COMMAND equ 9AE8h ;/* Command register */ +GP_STATUS equ 9AE8h ;/* Graphics Processor Status */ +CMD_STATUS equ 9AE9h ;/* Command status register */ +SHORT_STROKE equ 9EE8h ;/* Short Stroke Vector Reg */ +BKGD_COLOR equ 0A2E8h ;/* Background Color */ +FRGD_COLOR equ 0A6E8h ;/* Foreground Color */ +WRT_MASK equ 0AAE8h ;/* Write Mask */ +RD_MASK equ 0AEE8h ;/* Read Mask */ +COLOR_CMP equ 0B2E8h ;/* Color Compare Register */ +BKGD_MIX equ 0B6E8h ;/* Background Mix Register */ +FGRD_MIX equ 0BAE8h ;/* Foreground Mix Register */ +MLTFUNC_CNTL equ 0BEE8h ;/* Multifunction Control */ +PIX_TRANS equ 0E2E8h ;/* Pixel Data Transfer Reg. */ +;/* ..................Bit definitions of Registers .....................*/ +CMD_ACTIVE equ 02h ;/* Command is active? */ +DATA_AVAIL equ 01h ;/* Input Data Available? */ +NO8514 equ 40h ;/* No 8514 Monitor present */ +MONOCHROME equ 10h ;/* Monochrome Monitor? */ +PLANE8 equ 80h ;/* 8 plane memory available */ +;/* ..................COMMAND mask bits ................................*/ +WRITCMD equ 01h +PLANAR equ 02h +LSTPELNULL equ 04h +STROKE_ALG equ 08h +DRAWCMD equ 10h +INCX equ 20h +YMAJAXIS equ 40h +INCY equ 80h +PC_TRANS equ 100h +BIT16 equ 200h +BYTE_SWAP equ 1000h +NO_FCN equ 0000h +LINE_DRAW equ 2000h +FILL_X_RECT equ 4000h +FILL_Y_RECT equ 6000h +FILL_RECT equ 8000h +AXIAL_LINE equ 0A000h +COPY_RECT equ 0C000h +HANG equ 0E000h +;/* ..................MIX Defines ........................................*/ +MIX_NOT_DEST equ 00h +MIX_ZERO equ 01h +MIX_ONE equ 02h +MIX_DEST equ 03h +MIX_NOT_SRC equ 04h +MIX_SRC_XOR_DEST equ 05h +MIX_NOT equ 06h +MIX_SRC equ 07h +;/* .................MIX Sources .........................................*/ +B_CLR_ACTIVE equ 00h +F_CLR_ACTIVE equ 20h +PTRANS_ACTIVE equ 40h +ALL_PLANE_CPY equ 60h +;/* .................MLTFUNC_CNTL ... high order nibble is an index .......*/ +MINOR_AXIS_PCNT equ 0000h +SCISSOR_T equ 1000h +SCISSOR_L equ 2000h +SCISSOR_B equ 3000h +SCISSOR_R equ 4000h +MEM_CNTL equ 5000h +PIX_CNTL equ 0A000h +;/* Mix operation select */ +ONE_PLN_COPY equ 0C0h +;/* Write transfers use fgdmix for 1's and bkgdmix for 0's */ +WRT_PLN_MODE equ 080h +;/* Write transfers use fgdmix for 1's and bkgdmix for 0's */ +PIX_MIX_SEL equ 040h +FGD_MIX_ACT equ 0000h +;/* Misc bit deinitions */ +STOP_SEQ equ 9000h ;/* subsystem cntl reg */ +START_SEQ equ 5000h ;/* subsystem cntl reg */ +RESET_QUEUE_FULL equ 04h + +VP1024 equ 0 ;/* AI Monde 0,2,3 */ +VP644 equ 1 ;/* AI Mode 1 (4 plane) */ +VP648 equ 2 ;/* AI Mode 1 (8 plane) */ + + +;/*.........................CONTROL WORD BITFIELDS...................*/ +GP_READ equ 0 +GP_WRITE equ 1 ;/* Writing or reading screen */ +GP_PIXEL equ 0 +GP_PLANE equ (1<<1) ;/* Bitplane or chunky pixels */ +GP_SETL equ 0 +GP_SKIPL equ (1<<2) ;/* Skip last pixel in line? */ +GP_LINEL equ 0 +GP_LINES equ (1<<3) ;/* Short stroke or long line? */ +GP_MOVE equ 0 +GP_DRAW equ (1<<4) ;/* Draw pixels or just move x/y position */ +GP_DECX equ 0 +GP_INCX equ (1<<5) ;/* Increment or decrement x position? */ +GP_AXISX equ 0 +GP_AXISY equ (1<<6) ;/* Is Y or X the major axis? */ +GP_DECY equ 0 +GP_INCY equ (1<<7) ;/* Increment or decrement y position? */ +GP_NODATA equ 0 +GP_DATA equ (1<<8) ;/* Pixel Data Transfer register used? */ +GP_BUS8 equ 0 +GP_BUS16 equ (1<<9) ;/* 16 or 8 bit buss access */ +GP_PIXEL8 equ 0 +GP_PIXEL16 equ (1<<10) ;/* Always enabled - 16 bit internal */ +GP_RESERVED equ (0<<11) +GP_NOSWAP equ 0 +GP_SWAP equ (1<<12) ;/* Swap bytes on 16 bit PC transfers */ +GPC_NOP equ (0<<13) ;/* Do nothing */ +GPC_LINE equ (1<<13) ;/* Draw a line */ +GPC_RECTX equ (2<<13) ;/* Rectangle drawn x-wise. Pos updated */ +GPC_RECTY equ (3<<13) ;/* Rectangle drawn y-wise. Pos updated */ +GPC_RECTS equ (4<<13) ;/* Rectangle. XY Pos not updated at end */ +GPC_LINEF equ (5<<13) ;/* Line for doing poly-fills. */ +GPC_COPY equ (6<<13) ;/* Copy to/from memory */ +GPC_HANG equ (7<<13) ;/* Make adapter hang & need reboot */ + + +Wait_free MACRO + LOCAL WaitLoop + + mov DX, CMD_STATUS ; Make sure the board's not busy... +WaitLoop: in AX, DX ; Read the status. + test AX, CMD_ACTIVE ; Is the machine busy? + jnz WaitLoop ; Yes, try again. + ENDM + +Wait_queue macro + local bloop + mov dx,GP_STATUS +bloop: + in al,dx + test al,02h + jnz bloop + endm + + + + + +rast8514 struc + vm_type dw ? + vm_pdepth dw ? + vm_lib dd ? + vm_aspect_dx dw ? + vm_aspect_dy dw ? + vm_reserved dd ? + vm_w dw ? + vm_h dw ? + vm_x dw ? + vm_y dw ? + vm_xcard dd ? + vm_ycard dd ? + vm_screen_ix dd ? + vm_driver_reserved dd ? +rast8514 ends + + +; +; WAITQ +; +; Waits until the specified number of entries are available in the +; command queue. AX, BX, and DX are destroyed. No error checking on the +; input parameter is performed, but it must be <= 8. + +WAITQ MACRO qEntries + LOCAL CheckQ + + Mov DX, GP_STATUS ; Get the queue status address. +CheckQ: + In AL, DX ; Get the status + test AL, 0100H SHR (qEntries) ; Is the queue entry available? + Jnz CheckQ ; Yes if result is Zero. + ENDM +; +; CLRCMD +; +; Waits until no more commands are active. +; AX, and DX may be destroyed. + +CLRCMD MACRO + LOCAL WaitLoop + + mov DX, CMD_STATUS ; Make sure the board's not busy... +WaitLoop: in AL, DX ; Read the status. + test AL, CMD_ACTIVE ; Is the machine busy? + jnz WaitLoop ; Yes, try again. + ENDM + +; +; CANC_XFER +; +; If we are in the pixel transfer mode, cancel out of it. + +CANC_XFER MACRO + LOCAL OK + Cmp xferMode, 0 ; Are we in pixel transfer mode? + Je OK ; No, all is well. + OUTPW FRGD_MIX_REG, foreMix ; Yes, restore to previous mode. + OUTPW BKGD_MIX_REG, backMix ; Restore all. + Mov xferMode, 0 ; Remember that we restored it. +OK: + ENDM + diff --git a/samples/Assembly/audio.i b/samples/Assembly/audio.i new file mode 100644 index 0000000000..40b65d7c6f --- /dev/null +++ b/samples/Assembly/audio.i @@ -0,0 +1,108 @@ +resetAudio LDWI 0x0000 + STW midiCommand + STW midiDelay + STW midiNote + LDWI giga_soundChan1 + STW midiScratch + LDWI title_screenMidi00 ; midi score + STW midiStreamPtr + + LDI 0x04 + ST ii + +resetA_loop LDI giga_soundChan1 ; reset low byte + ST midiScratch + LDWI 0x0200 + DOKE midiScratch ; wavA and wavX + INC midiScratch + INC midiScratch + LDWI 0x0000 + DOKE midiScratch ; keyL and keyH + INC midiScratch + INC midiScratch + DOKE midiScratch ; oscL and oscH + INC midiScratch + 1 ; increment high byte + LoopCounter ii resetA_loop + RET + + +playMidi LDI 0x05 ; keep pumping soundTimer, so that global sound stays alive + ST giga_soundTimer + LD giga_frameCount + SUBW midiDelay + BEQ playM_start + RET + +playM_start PUSH +playM_process LDW midiStreamPtr + PEEK ; get midi stream byte + STW midiCommand + LDW midiStreamPtr + ADDI 0x01 + STW midiStreamPtr + LDI 0xF0 + ANDW midiCommand + XORI 0x90 ; check for start note + BNE playM_endnote + + CALL midiStartNote ; start note + BRA playM_process + +playM_endnote XORI 0x10 ; check for end note + BNE playM_segment + + CALL midiEndNote ; end note + BRA playM_process + + +playM_segment XORI 0x50 ; check for new segment + BNE playM_delay + + LDW midiStreamPtr ; midi score + DEEK + STW midiStreamPtr ; 0xD0 new midi segment address + BRA playM_process + +playM_delay LD giga_frameCount ; midiDelay = (midiCommand + peek(frameCount)) & 0x00FF + ADDW midiCommand + ST midiDelay + POP + RET + + +midiStartNote LDWI giga_notesTable ; note table in ROM + STW midiScratch + LDW midiStreamPtr ; midi score + PEEK + SUBI 11 + LSLW + ADDW midiScratch + STW midiScratch + LUP 0x00 ; get ROM midi note low byte + ST midiNote + LDW midiScratch + LUP 0x01 ; get ROM midi note high byte + ST midiNote + 1 + LDW midiCommand + ANDI 0x03 ; get channel + ADDI 0x01 + ST midiScratch + 1 + LDI 0xFC + ST midiScratch ; channels address 0x01FC <-> 0x04FC + LDW midiNote + DOKE midiScratch ; set note + LDW midiStreamPtr + ADDI 0x01 ; midiStreamPtr++ + STW midiStreamPtr + RET + + +midiEndNote LDW midiCommand + ANDI 0x03 ; get channel + ADDI 0x01 + ST midiScratch + 1 + LDI 0xFC + ST midiScratch ; channels address 0x01FC <-> 0x04FC + LDWI 0x0000 + DOKE midiScratch ; end note + RET \ No newline at end of file diff --git a/samples/SWIG/CGAL_AABB_tree.i b/samples/SWIG/CGAL_AABB_tree.i new file mode 100644 index 0000000000..522c54ebd7 --- /dev/null +++ b/samples/SWIG/CGAL_AABB_tree.i @@ -0,0 +1,146 @@ +// ------------------------------------------------------------------------------ +// Copyright (c) 2011 GeometryFactory (FRANCE) +// Distributed under the Boost Software License, Version 1.0. (See accompany- +// ing file LICENSE_1_0.txt or copy at http://www.boost.org/LICENSE_1_0.txt) +// ------------------------------------------------------------------------------ + + +%module (package="CGAL") CGAL_AABB_tree + +%include "SWIG_CGAL/common.i" +Decl_void_type() + +SWIG_CGAL_add_java_loadLibrary(CGAL_AABB_tree) +SWIG_CGAL_package_common() + +%import "SWIG_CGAL/Common/Macros.h" +%include "SWIG_CGAL/Common/Iterator.h" +%include "SWIG_CGAL/Common/Optional.h" +%import "SWIG_CGAL/Kernel/CGAL_Kernel.i" + +//include files +%{ + #define CGAL_INTERSECTION_VERSION 1 + #include + #include + #include + #include + #include + #include + #include +%} + +//import definitions of Polyhedron objects +%import "SWIG_CGAL/Polyhedron_3/CGAL_Polyhedron_3.i" + +//definitions +%include "SWIG_CGAL/AABB_tree/AABB_tree.h" + +%pragma(java) jniclassimports=%{ + import CGAL.Kernel.Triangle_3; import CGAL.Kernel.Segment_3; import CGAL.Kernel.Plane_3; import CGAL.Kernel.Ray_3; import CGAL.Kernel.Point_3; + import CGAL.Polyhedron_3.Polyhedron_3_Halfedge_handle; import CGAL.Polyhedron_3.Polyhedron_3_Facet_handle; import java.util.Iterator; import java.util.Collection; +%} + +//local Object class: we cannot use the class from Kernel module as CGAL::Object uses RTTI +#ifdef SWIG_CGAL_AABB_tree_MODULE +%include "SWIG_CGAL/Common/Object.i" +#endif + +//import Polyhedron_3 wrapper types +SWIG_CGAL_import_Polyhedron_3_Facet_handle_SWIG_wrapper +SWIG_CGAL_import_Polyhedron_3_Halfedge_handle_SWIG_wrapper + + +%include "std_pair.i" +//Point_and_primitive_id +%typemap(javaimports) std::pair %{import CGAL.Kernel.Point_3; import CGAL.Polyhedron_3.Polyhedron_3_Facet_handle;%} +SWIG_CGAL_declare_identifier_of_template_class(Point_and_Polyhedron_3_Facet_handle,std::pair) +%typemap(javaimports) std::pair %{import CGAL.Kernel.Point_3; import CGAL.Polyhedron_3.Polyhedron_3_Halfedge_handle;%} +SWIG_CGAL_declare_identifier_of_template_class(Point_and_Polyhedron_3_Halfedge_handle,std::pair) +%typemap(javaimports) std::pair %{import CGAL.Kernel.Point_3;%} +SWIG_CGAL_declare_identifier_of_template_class(Point_and_Integer,std::pair) +//Object_and_primitive_id +%typemap(javaimports) std::pair %{import CGAL.Polyhedron_3.Polyhedron_3_Facet_handle;%} +SWIG_CGAL_declare_identifier_of_template_class(Object_and_Polyhedron_3_Facet_handle,std::pair) +%typemap(javaimports) std::pair %{import CGAL.Polyhedron_3.Polyhedron_3_Halfedge_handle;%} +SWIG_CGAL_declare_identifier_of_template_class(Object_and_Polyhedron_3_Halfedge_handle,std::pair) +%typemap(javaimports) std::pair %{import CGAL.Polyhedron_3.Polyhedron_3_Halfedge_handle;%} +SWIG_CGAL_declare_identifier_of_template_class(Object_and_Integer,std::pair) +//Optional +%typemap(javaimports) Optional %{import CGAL.Polyhedron_3.Polyhedron_3_Halfedge_handle;%} +SWIG_CGAL_declare_identifier_of_template_class(Optional_Polyhedron_3_Halfedge_handle,Optional); +%typemap(javaimports) Optional %{import CGAL.Polyhedron_3.Polyhedron_3_Facet_handle;%} +SWIG_CGAL_declare_identifier_of_template_class(Optional_Polyhedron_3_Facet_handle,Optional) +SWIG_CGAL_declare_identifier_of_template_class(Optional_Integer,Optional< int >); +//Optional +SWIG_CGAL_declare_identifier_of_template_class(Optional_Object_and_Polyhedron_3_Halfedge_handle,Optional< std::pair >) +SWIG_CGAL_declare_identifier_of_template_class(Optional_Object_and_Polyhedron_3_Facet_handle,Optional< std::pair >) +SWIG_CGAL_declare_identifier_of_template_class(Optional_Object_and_Integer,Optional< std::pair >) + + +#if !SWIG_CGAL_NON_SUPPORTED_TARGET_LANGUAGE +SWIG_CGAL_input_iterator_typemap_in(Primitive_iterator_helper< Polyhedron_3_Facet_handle_SWIG_wrapper_for_typemap >::input,Polyhedron_3_Facet_handle_SWIG_wrapper,Polyhedron_3_Facet_handle,Polyhedron_3_Facet_handle_SWIG_wrapper::cpp_base,SWIGTYPE_p_SWIG_Polyhedron_3__CGAL_Facet_handleT_Polyhedron_3__t,"(LCGAL/Polyhedron_3/Polyhedron_3_Facet_handle;)J",rebuild) +SWIG_CGAL_input_iterator_typemap_in(Primitive_iterator_helper< Polyhedron_3_Halfedge_handle_SWIG_wrapper_for_typemap >::input,Polyhedron_3_Halfedge_handle_SWIG_wrapper,Polyhedron_3_Halfedge_handle,Polyhedron_3_Halfedge_handle_SWIG_wrapper::cpp_base,SWIGTYPE_p_SWIG_Polyhedron_3__CGAL_Halfedge_handleT_Polyhedron_3__t,"(LCGAL/Polyhedron_3/Polyhedron_3_Halfedge_handle;)J",rebuild) +SWIG_CGAL_input_iterator_typemap_in(Primitive_iterator_helper< Triangle_3 >::input,Triangle_3,Triangle_3,Triangle_3::cpp_base,SWIGTYPE_p_Triangle_3,"(LCGAL/Kernel/Triangle_3;)J",rebuild) +SWIG_CGAL_input_iterator_typemap_in(Primitive_iterator_helper< Segment_3 >::input,Segment_3,Segment_3,Segment_3::cpp_base,SWIGTYPE_p_Segment_3,"(LCGAL/Kernel/Segment_3;)J",rebuild) +#ifdef SWIGPYTHON +SWIG_CGAL_input_iterator_typemap_in_python_extra_function(AABB_tree_wrapper::AABB_tree_wrapper) +#endif +SWIG_CGAL_input_iterator_typemap_in(Point_range,Point_3,Point_3,Point_3::cpp_base,SWIGTYPE_p_Point_3,"(LCGAL/Kernel/Point_3;)J",accelerate_distance_queries) +#else //!SWIG_CGAL_NON_SUPPORTED_TARGET_LANGUAGE +SWIG_CGAL_declare_identifier_of_template_class(Polyhedron_3_Facet_handle_input_iterator,Generic_input_iterator< Polyhedron_3_Facet_handle_SWIG_wrapper >) +SWIG_CGAL_declare_identifier_of_template_class(Polyhedron_3_Halfedge_handle_input_iterator,Generic_input_iterator< Polyhedron_3_Halfedge_handle_SWIG_wrapper >) +#endif //!SWIG_CGAL_NON_SUPPORTED_TARGET_LANGUAGE + +#if !SWIG_CGAL_NON_SUPPORTED_TARGET_LANGUAGE +//intersected primitive output iterator +SWIG_CGAL_output_iterator_typemap_in(Primitive_iterator_helper::output,Polyhedron_3_Facet_handle_SWIG_wrapper ,Polyhedron_3_Facet_handle,Polyhedron_3_Facet_handle_SWIG_wrapper ::cpp_base,SWIGTYPE_p_SWIG_Polyhedron_3__CGAL_Facet_handleT_Polyhedron_3__t,"LCGAL/Polyhedron_3/Polyhedron_3_Facet_handle;") +SWIG_CGAL_output_iterator_typemap_in(Primitive_iterator_helper::output,Polyhedron_3_Halfedge_handle_SWIG_wrapper,Polyhedron_3_Halfedge_handle,Polyhedron_3_Halfedge_handle_SWIG_wrapper::cpp_base,SWIGTYPE_p_SWIG_Polyhedron_3__CGAL_Halfedge_handleT_Polyhedron_3__t,"LCGAL/Polyhedron_3/Polyhedron_3_Halfedge_handle;") +SWIG_CGAL_output_iterator_typemap_in(Primitive_iterator_helper< int >::output,int,Integer,int,swig_types[0],"Ljava/lang/Integer;") + +//intersection output iterator +%{ typedef std::pair Object_and_Polyhedron_3_Facet_handle; %} +%define Object_and_Polyhedron_3_Facet_handle_base std::pair %enddef +SWIG_CGAL_output_iterator_typemap_in(Primitive_iterator_helper::output2,Object_and_Polyhedron_3_Facet_handle,Object_and_Polyhedron_3_Facet_handle,Object_and_Polyhedron_3_Facet_handle_base,SWIGTYPE_p_std__pairT_Object_SWIG_Polyhedron_3__CGAL_Facet_handleT_Polyhedron_3__t_t,"LCGAL/AABB_tree/Object_and_Polyhedron_3_Facet_handle;") +%{ typedef std::pair Object_and_Polyhedron_3_Halfedge_handle; %} +%define Object_and_Polyhedron_3_Halfedge_handle_base std::pair %enddef +SWIG_CGAL_output_iterator_typemap_in(Primitive_iterator_helper::output2,Object_and_Polyhedron_3_Halfedge_handle,Object_and_Polyhedron_3_Halfedge_handle,Object_and_Polyhedron_3_Halfedge_handle_base,SWIGTYPE_p_std__pairT_Object_SWIG_Polyhedron_3__CGAL_Halfedge_handleT_Polyhedron_3__t_t,"LCGAL/AABB_tree/Object_and_Polyhedron_3_Halfedge_handle;") + +%{ typedef std::pair Object_and_Integer; %} +%define Object_and_Integer_base std::pair %enddef +SWIG_CGAL_output_iterator_typemap_in(Primitive_iterator_helper< int >::output2,Object_and_Integer,Object_and_Integer,Object_and_Integer_base,SWIGTYPE_p_std__pairT_Object_int_t,"LCGAL/AABB_tree/Object_and_Integer;") +#else +%include "SWIG_CGAL/Common/Output_iterator_wrapper.h" +SWIG_CGAL_declare_generic_output_iterator(Polyhedron_3_Facet_output_iterator,Polyhedron_3_Facet_output_iterator_nested_iterator,Polyhedron_3_Facet_handle_SWIG_wrapper) +SWIG_CGAL_declare_generic_output_iterator(Polyhedron_3_Halfedge_output_iterator,Polyhedron_3_Halfedge_output_iterator_nested_iterator,Polyhedron_3_Halfedge_handle_SWIG_wrapper) +SWIG_CGAL_declare_generic_output_iterator(Integer_output_iterator,Integer_output_iterator_nested_iterator,int) +%define iObject_and_Facet std::pair %enddef +SWIG_CGAL_declare_generic_output_iterator(Polyhedron_3_Facet_and_Object_output_iterator,Polyhedron_3_Facet_and_Object_output_iterator_nested_iterator,iObject_and_Facet) +%define iObject_and_Halfedge std::pair %enddef +SWIG_CGAL_declare_generic_output_iterator(Polyhedron_3_Halfedge_and_Object_output_iterator,Polyhedron_3_Halfedge_and_Object_output_iterator_nested_iterator,iObject_and_Halfedge) +%define iObject_and_Integer std::pair %enddef +SWIG_CGAL_declare_generic_output_iterator(Object_and_Integer_output_iterator,Object_and_Integer_output_iterator_nested_iterator,iObject_and_Integer) +#endif + +#if !SWIG_CGAL_NON_SUPPORTED_TARGET_LANGUAGE +%include "SWIG_CGAL/typemaps.i" +SWIG_CGAL_array_of_array6_of_double_to_vector_of_segment_3_typemap_in +SWIG_CGAL_array_of_array9_of_double_to_vector_of_triangle_3_typemap_in +#endif + +%ignore AABB_tree_wrapper::insert_from_array; +%ignore AABB_tree_wrapper::insert_from_array; + +//Declaration of the main classes +%typemap(javaimports) AABB_tree_wrapper%{import CGAL.Polyhedron_3.Polyhedron_3_Facet_handle; import CGAL.Kernel.Triangle_3; import CGAL.Kernel.Segment_3; import CGAL.Kernel.Plane_3; import CGAL.Kernel.Ray_3; import CGAL.Kernel.Point_3; import java.util.Iterator; import java.util.Collection;%} +SWIG_CGAL_declare_identifier_of_template_class(AABB_tree_Polyhedron_3_Facet_handle,AABB_tree_wrapper) +%typemap(javaimports) AABB_tree_wrapper%{import CGAL.Polyhedron_3.Polyhedron_3_Halfedge_handle; import CGAL.Kernel.Triangle_3; import CGAL.Kernel.Segment_3; import CGAL.Kernel.Plane_3; import CGAL.Kernel.Ray_3; import CGAL.Kernel.Point_3; import java.util.Iterator; import java.util.Collection;%} +SWIG_CGAL_declare_identifier_of_template_class(AABB_tree_Polyhedron_3_Halfedge_handle,AABB_tree_wrapper) +%typemap(javaimports) AABB_tree_wrapper%{import CGAL.Kernel.Triangle_3; import CGAL.Kernel.Segment_3; import CGAL.Kernel.Plane_3; import CGAL.Kernel.Ray_3; import CGAL.Kernel.Point_3; import java.util.Iterator; import java.util.Collection;%} + +SWIG_CGAL_declare_identifier_of_template_class(AABB_tree_Segment_3_soup,AABB_tree_wrapper) +SWIG_CGAL_declare_identifier_of_template_class(AABB_tree_Triangle_3_soup,AABB_tree_wrapper) + +#ifdef SWIG_CGAL_HAS_AABB_tree_USER_PACKAGE +%include "SWIG_CGAL/User_packages/AABB_tree/extensions.i" +#endif diff --git a/samples/SWIG/dictionary.i b/samples/SWIG/dictionary.i new file mode 100644 index 0000000000..a6cfdc052f --- /dev/null +++ b/samples/SWIG/dictionary.i @@ -0,0 +1,25 @@ +// mds_utils/python/dictionary.i +// +// Copyright (c) 2014 - Michele De Stefano (micdestefano@users.sourceforge.net) +// +// Distributed under the MIT License (See accompanying file LICENSE) + +%include "mds_utils/python/obj.i" + +%typemap(in) (mds_utils::python::Dictionary) { + try { + if (!PyDict_Check($input)) { + throw std::invalid_argument("The dictionary argument is not a dictionary."); + } + $1 = $input; + } catch (std::exception& e) { + PyErr_SetString(PyExc_RuntimeError,e.what()); + SWIG_fail; + } +} + +%typemap(out) mds_utils::python::Dictionary = mds_utils::python::Obj; + +%typecheck(SWIG_TYPECHECK_POINTER) mds_utils::python::Dictionary { + $1 = PyDict_Check($input); +} diff --git a/samples/SWIG/gauss.i b/samples/SWIG/gauss.i new file mode 100644 index 0000000000..7703962b2a --- /dev/null +++ b/samples/SWIG/gauss.i @@ -0,0 +1,767 @@ +%feature("director") IGEProgramOutput; +%feature("director") IGEProgramFlushOutput; +%feature("director") IGEProgramInputString; +%feature("director") IGEProgramInputChar; +%feature("director") IGEProgramInputCheck; +%include "std_string.i" +%include "std_vector.i" +%include "std_pair.i" +%include "typemaps.i" + +#ifndef SWIGJAVASCRIPT +%include "factory.i" +#endif + +#ifdef SWIGPYTHON +%include "pyabc.i" +#endif + +#ifdef SWIGWIN +%include "windows.i" +#endif + +namespace std { + %template(DoubleVector) vector; + %template(DoubleDoubleVector) vector >; + %template(FloatVector) vector; + %template(IntVector) vector; + %template(StringVector) vector; + %template(StringStringVector) vector >; +} + +#ifdef SWIGCSHARP +%include "arrays_csharp.i" +%apply double INPUT[] {const double *data} +%apply double INPUT[] {const double *imag_data} +%apply int INPUT[] {int *orders} +#endif + +#ifdef SWIGJAVASCRIPT +%include "arrays_javascript.i" +%apply double[] {const double *data} +%apply double[] {const double *imag_data} +%apply int[] {int *orders} + +%typemap(in) const std::vector & { + if ($input->IsArray()) + { + v8::Isolate* isolate = args.GetIsolate(); + v8::Local context = isolate->GetCurrentContext(); + + // Convert into Array + v8::Local array = v8::Local::Cast($input); + + int length = array->Length(); + + $1 = new std::vector(length); + + // Get each element from array + for (int i = 0; i < length; i++) + { + v8::Local jsvalue = array->Get(context, i).ToLocalChecked(); + + double temp; + + // Get primitive value from JSObject + int res = SWIG_AsVal_double(jsvalue, &temp); + if (!SWIG_IsOK(res)) + { + SWIG_exception_fail(SWIG_ERROR, "Failed to convert $input to double"); + } + (*arg$argnum)[i] = temp; + } + } + else + { + SWIG_exception_fail(SWIG_ERROR, "$input is not an array"); + } +} + +%typemap(freearg) const std::vector & { + delete $1; +} + +%typemap(in) std::vector { + if ($input->IsArray()) + { + v8::Isolate* isolate = args.GetIsolate(); + v8::Local context = isolate->GetCurrentContext(); + + // Convert into Array + v8::Local array = v8::Local::Cast($input); + + int length = array->Length(); + + $1.resize(length); + + // Get each element from array + for (int i = 0; i < length; i++) + { + v8::Local jsvalue = array->Get(context, i).ToLocalChecked(); + + int temp; + + // Get primitive value from JSObject + int res = SWIG_AsVal_int(jsvalue, &temp); + if (!SWIG_IsOK(res)) + { + SWIG_exception_fail(SWIG_ERROR, "Failed to convert $input to int"); + } + arg$argnum[i] = temp; + } + } + else + { + SWIG_exception_fail(SWIG_ERROR, "$input is not an array"); + } +} + +%typemap(in) const std::vector & { + if ($input->IsArray()) + { + v8::Isolate* isolate = args.GetIsolate(); + v8::Local context = isolate->GetCurrentContext(); + + // Convert into Array + v8::Local array = v8::Local::Cast($input); + + int length = array->Length(); + + $1 = new std::vector(length); + + // Get each element from array + for (int i = 0; i < length; i++) + { + v8::Local jsvalue = array->Get(context, i).ToLocalChecked(); + + std::string *ptr = (std::string *)0; + int res = SWIG_AsPtr_std_string(jsvalue, &ptr); + if (!SWIG_IsOK(res) || !ptr) { + SWIG_exception_fail(SWIG_ArgError((ptr ? res : SWIG_TypeError)), "Failed to convert $input to std::string"); + } + (*arg$argnum)[i] = *ptr; + if (SWIG_IsNewObj(res)) delete ptr; + } + } + else + { + SWIG_exception_fail(SWIG_ERROR, "$input is not an array"); + } +} + +%typemap(freearg) const std::vector & { + delete $1; +} + +%typemap(out) std::vector %{ +{ + int length = $1.size(); + v8::Local context = SWIGV8_CURRENT_CONTEXT(); + v8::Local array = SWIGV8_ARRAY_NEW(length); + + for (int i = 0; i < length; i++) + { + array->Set(context, i, SWIGV8_STRING_NEW($1.at(i).c_str())); + } + + $result = array; +} +%} + +%define JAVASCRIPT_OUT_STD_VECTOR_NUMERIC(CTYPE, SWIG_NEW_FN) + +%typemap(out) std::vector %{ +{ + int length = $1.size(); + v8::Local context = SWIGV8_CURRENT_CONTEXT(); + v8::Local array = SWIGV8_ARRAY_NEW(length); + + for (int i = 0; i < length; i++) + { + array->Set(context, i, SWIG_NEW_FN($1.at(i))); + } + + $result = array; +} +%} + +%enddef + +JAVASCRIPT_OUT_STD_VECTOR_NUMERIC(double, SWIGV8_NUMBER_NEW) +JAVASCRIPT_OUT_STD_VECTOR_NUMERIC(int, SWIGV8_INTEGER_NEW) + +#endif + +/*%rename(GESymType) GESymTypeNS;*/ + +%{ + /* Includes the header in the wrapper code */ + #include "src/gauss.h" + #include "src/gesymbol.h" + #include "src/gearray.h" + #include "src/gematrix.h" + #include "src/gestringarray.h" + #include "src/geworkspace.h" + #include "src/workspacemanager.h" + #include "src/gefuncwrapper.h" + #include "src/gesymtype.h" +%} + +#ifdef SWIGCSHARP +/* +public int this[int key] +{ + get + { + return GetValue(key); + } + set + { + SetValue(key,value); + } +} +*/ +#endif + +%newobject GAUSS::getSymbol; +%factory(GESymbol *GAUSS::getSymbol, GEMatrix, GEArray, GEStringArray); + +#ifndef SWIGPHP +%newobject GAUSS::getMatrixDirect; +%newobject GAUSS::getMatrix; +%newobject GAUSS::getMatrixAndClear; +%newobject GAUSS::getArray; +%newobject GAUSS::getArrayAndClear; +%newobject GAUSS::getStringArray; +%newobject GEArray::getPlane; +%newobject GAUSS::loadWorkspace; +/*%newobject GAUSS::createWorkspace;*/ +#endif +%delobject GAUSS::destroyWorkspace; + +/* Start Python only*/ +#ifdef SWIGPYTHON + +%extend GESymbol { + string __str__() { + return $self->toString(); + } + + int __len__() { + return $self->size(); + } +}; + +%pythoncode %{ +class GEIterator: + def __init__(self, data): + self.index = 0 + self.data = data + + def __iter__(self): + return self + + def next(self): + if self.index >= len(self.data): + raise StopIteration; + ret = self.data[self.index] + self.index += 1 + return ret + + __next__ = next +%} + +%define ARRAYHELPER(type,name) +%extend name { + type __getitem__(int i) + {return $self->getElement(i);} + void __setitem__(int i,type v) + {$self->setElement(v, i);} + + %pythoncode %{ + def __iter__(self): + return GEIterator(self) + %} +} + +%enddef + +ARRAYHELPER(double, GEMatrix) +ARRAYHELPER(string, GEStringArray) + +%rename(__getitem__) doubleArray::getitem; +%rename(__setitem__) doubleArray::setitem; +%rename(__len__) doubleArray::size; + +%extend doubleArray { +%pythoncode %{ + def __iter__(self): + return GEIterator(self) +%} +} + +%factory(GESymbol *GAUSS::__getitem__, GEMatrix, GEArray, GEStringArray); +%extend GAUSS { + GESymbol* __getitem__(char *name) + {return $self->getSymbol(std::string(name));} + + void __setitem__(char *name,GESymbol* v) + {$self->_setSymbol(v, std::string(name));} + + void __setitem__(char *name,doubleArray* v) + {$self->_setSymbol(v, std::string(name));} + + void __setitem__(char *name,char *v) + {$self->setSymbol(std::string(v), std::string(name));} + + void __setitem__(char *name,double v) + {GEMatrix t(v);$self->setSymbol(&t, std::string(name));} +} + + +%exception __getitem__ { + try { + $action + } catch (std::out_of_range &e) { + PyErr_SetString(PyExc_IndexError, const_cast(e.what())); + return NULL; + } +} + +/* Automatically release ownership of callback classes*/ +%define CB_THISOWN(name,own) +%pythonappend name ## () { + self.thisown = own +} +%enddef + +/* +CB_THISOWN(IGEProgramOutput, 0) +CB_THISOWN(IGEProgramFlushOutput, 0) +CB_THISOWN(IGEProgramInputString, 0) +CB_THISOWN(IGEProgramInputChar, 0) +CB_THISOWN(IGEProgramInputCheck, 0) +*/ + +#endif +/* End Python only*/ + +/* Start PHP Only*/ +#ifdef SWIGPHP + +%extend GESymbol { + string __toString() { + return $self->toString(); + } +}; + +%factory(GESymbol *GAUSS::offsetGet, GEMatrix, GEArray, GEStringArray); +%typemap("phpinterfaces") GAUSS "ArrayAccess"; +%extend GAUSS { + GESymbol* offsetGet(char *name) + {return $self->getSymbol(std::string(name));} + + void offsetSet(char *name,GESymbol* v) + {$self->_setSymbol(v, std::string(name));} + + void offsetSet(char *name,doubleArray* v) + {$self->_setSymbol(v, std::string(name));} + + void offsetSet(char *name,char *v) + {$self->setSymbol(std::string(v), std::string(name));} + + void offsetSet(char *name,double v) + {GEMatrix t(v);$self->setSymbol(&t, std::string(name));} + + void offsetSet(char *name,int v) + {GEMatrix t((double)v);$self->setSymbol(&t, std::string(name));} + + bool offsetExists(char *name) { + int t = $self->getSymbolType(std::string(name)); + + return (t == GESymType::SCALAR || t == GESymType::MATRIX || + t == GESymType::ARRAY_GAUSS || t == GESymType::STRING || + t == GESymType::STRING_ARRAY); + } + + void offsetUnset(char *name) { + //$self->setElement(defvalue, offset); + } +} + +%define ARRAYHELPER(type,name,defvalue) +%typemap("phpinterfaces") name "ArrayAccess, Countable, Iterator"; +%extend name { + void offsetSet(int offset, type value) { + $self->setElement(value, offset); + } + + bool offsetExists(int offset) { + return offset < $self->size(); + } + + void offsetUnset(int offset) { + $self->setElement(defvalue, offset); + } + + type offsetGet(int offset) { + return $self->getElement(offset); + } + + int count() { + // blah blah + return $self->size(); + } + + void rewind() { + $self->position_ = 0; + } + + type current() { + return $self->getElement($self->position_); + } + + int key() { + return $self->position_; + } + + void next() { + ++$self->position_; + } + + bool valid() { + return $self->position_ >= 0 && $self->position_ < $self->size(); + } +} + +%enddef + +ARRAYHELPER(double, GEMatrix, 0.0) +ARRAYHELPER(string, GEStringArray, "") + +%rename(offsetGet) doubleArray::getitem; +%rename(offsetSet) doubleArray::setitem; +%rename(count) doubleArray::size; +%typemap("phpinterfaces") doubleArray "ArrayAccess, Countable, Iterator"; +%extend doubleArray { + bool offsetExists(int offset) { + return offset >= 0 && offset < $self->size(); + } + + void offsetUnset(int offset) { + $self[offset] = 0.0; + } + + void rewind() { + $self->position_ = 0; + } + + double current() { + return $self->getitem($self->position_); + } + + int key() { + return $self->position_; + } + + void next() { + ++$self->position_; + } + + bool valid() { + return $self->position_ >= 0 && $self->position_ < $self->size(); + } +} + +#ifdef SWIGPHP5 +%typemap(directorin) std::string, string, const string&, const std::string & %{ + ZVAL_STRINGL($input, const_cast($1.data()), $1.size(), 0); +%} + +%typecheck(SWIG_TYPECHECK_STRING_ARRAY) + std::vector *, + std::vector *, + std::vector { + // Custom array check + $1 = Z_TYPE_PP($input) == IS_ARRAY; +} + +%typemap(in) std::vector * %{ +{ + zval *arr, **data; + HashTable *arr_hash; + HashPosition pointer; + int array_count; + + arr_hash = Z_ARRVAL_P(*$input); + array_count = zend_hash_num_elements(arr_hash); + + $1 = new $1_basetype(array_count); + + for(zend_hash_internal_pointer_reset_ex(arr_hash, &pointer); + zend_hash_get_current_data_ex(arr_hash, (void**) &data, &pointer) == SUCCESS; + zend_hash_move_forward_ex(arr_hash, &pointer)) + { + + zval temp, *str; + int is_str = 1; + + if(Z_TYPE_PP(data) != IS_STRING) { + temp = **data; + zval_copy_ctor(&temp); + convert_to_string(&temp); + str = &temp; + is_str = 0; + } else { + str = *data; + } + + $1->at(pointer->h) = std::string(Z_STRVAL_P(str)); + + if (!is_str) + zval_dtor(&temp); + } +} +%} + +%typemap(in) std::vector *, std::vector * %{ +{ + zval *arr, **data; + HashTable *arr_hash; + HashPosition pointer; + int array_count; + + arr_hash = Z_ARRVAL_P(*$input); + array_count = zend_hash_num_elements(arr_hash); + + $1 = new $1_basetype(array_count); + + for(zend_hash_internal_pointer_reset_ex(arr_hash, &pointer); + zend_hash_get_current_data_ex(arr_hash, (void**) &data, &pointer) == SUCCESS; + zend_hash_move_forward_ex(arr_hash, &pointer)) + { + switch (Z_TYPE_PP(data)) { + case IS_BOOL: + case IS_LONG: + $1->at(pointer->h) = Z_LVAL_PP(data); + break; + case IS_DOUBLE: + $1->at(pointer->h) = Z_DVAL_PP(data); + break; + } + } +} +%} + +%typemap(in) std::vector, std::vector %{ +{ + zval *arr, **data; + HashTable *arr_hash; + HashPosition pointer; + int array_count; + + arr_hash = Z_ARRVAL_P(*$input); + array_count = zend_hash_num_elements(arr_hash); + + $1.resize(array_count); + + for(zend_hash_internal_pointer_reset_ex(arr_hash, &pointer); + zend_hash_get_current_data_ex(arr_hash, (void**) &data, &pointer) == SUCCESS; + zend_hash_move_forward_ex(arr_hash, &pointer)) + { + switch (Z_TYPE_PP(data)) { + case IS_BOOL: + case IS_LONG: + $1.at(pointer->h) = Z_LVAL_PP(data); + break; + case IS_DOUBLE: + $1.at(pointer->h) = Z_DVAL_PP(data); + break; + } + } +} +%} + +#else +/* PHP 7 */ + +%typecheck(SWIG_TYPECHECK_STRING_ARRAY) + std::vector *, + std::vector *, + std::vector { + // Custom array check + $1 = Z_TYPE_P(&$input) == IS_ARRAY; +} + +%typemap(in) std::vector * %{ +{ + zval *data; + HashTable *arr_hash; + HashPosition pointer; + int array_count; + + arr_hash = Z_ARRVAL_P(&$input); + array_count = zend_hash_num_elements(arr_hash); + + $1 = new $1_basetype(array_count); + + for(zend_hash_internal_pointer_reset_ex(arr_hash, &pointer); + (data = zend_hash_get_current_data_ex(arr_hash, &pointer)) != NULL; + zend_hash_move_forward_ex(arr_hash, &pointer)) + { + + zval temp, *str; + int is_str = 1; + + if(Z_TYPE_P(data) != IS_STRING) { + temp = *data; + zval_copy_ctor(&temp); + convert_to_string(&temp); + str = &temp; + is_str = 0; + } else { + str = data; + } + + $1->at(pointer) = std::string(Z_STRVAL_P(str)); + + if (!is_str) + zval_dtor(&temp); + } +} +%} + +%typemap(in) std::vector *, std::vector * %{ +{ + zval *data; + HashTable *arr_hash; + HashPosition pointer; + int array_count; + + arr_hash = Z_ARRVAL_P(&$input); + array_count = zend_hash_num_elements(arr_hash); + + $1 = new $1_basetype(array_count); + + for(zend_hash_internal_pointer_reset_ex(arr_hash, &pointer); + (data = zend_hash_get_current_data_ex(arr_hash, &pointer)) != NULL; + zend_hash_move_forward_ex(arr_hash, &pointer)) + { + switch (Z_TYPE_P(data)) { + case IS_TRUE: + case IS_FALSE: + case IS_LONG: + $1->at(pointer) = Z_LVAL_P(data); + break; + case IS_DOUBLE: + $1->at(pointer) = Z_DVAL_P(data); + break; + } + } +} +%} + +%typemap(in) std::vector, std::vector %{ +{ + zval *data; + HashTable *arr_hash; + HashPosition pointer; + int array_count; + + arr_hash = Z_ARRVAL_P(&$input); + array_count = zend_hash_num_elements(arr_hash); + + $1.resize(array_count); + + for(zend_hash_internal_pointer_reset_ex(arr_hash, &pointer); + (data = zend_hash_get_current_data_ex(arr_hash, &pointer)) != NULL; + zend_hash_move_forward_ex(arr_hash, &pointer)) + { + switch (Z_TYPE_P(data)) { + case IS_TRUE: + case IS_FALSE: + case IS_LONG: + $1.at(pointer) = Z_LVAL_P(data); + break; + case IS_DOUBLE: + $1.at(pointer) = Z_DVAL_P(data); + break; + } + } +} +%} + +#endif + +%typemap(out) std::vector %{ +{ + array_init(return_value); + + for (int i = 0; i < $1.size(); ++i) { +#ifdef SWIGPHP5 + add_index_string(return_value, i, $1.at(i).c_str(), 1); +#else + add_index_string(return_value, i, $1.at(i).c_str()); +#endif + } +} +%} + +%typemap(out) std::vector %{ +{ + array_init(return_value); + + for (int i = 0; i < $1.size(); ++i) { + add_index_double(return_value, i, $1.at(i)); + } +} +%} + +%typemap(out) std::vector %{ +{ + array_init(return_value); + + for (int i = 0; i < $1.size(); ++i) { + add_index_long(return_value, i, $1.at(i)); + } +} +%} +#endif + +/* End PHP Only*/ + +/* Not using this anymore +%include "gausscarrays.i" +%array_class(double, doubleArray); +*/ + +/* Ignore stub functions */ +%ignore hookStubOutput; +%ignore hookStubError; +%ignore hookStubFlush; +%ignore hookStubInputString; +%ignore hookStubInputChar; +%ignore hookStubInputBlockingChar; +%ignore hookStubInputCheck; + +%ignore GEStringArray::GEStringArray(StringArray_t*); +%ignore GEStringArray::Init(StringArray_t*); +%ignore GEStringArray::toInternal(); +%ignore GEArray::GEArray(Array_t*); +%ignore GEArray::Init(Array_t*); +%ignore GEArray::toInternal(); +%ignore GEMatrix::GEMatrix(Matrix_t*); +%ignore GEMatrix::GEMatrix(GAUSS_MatrixInfo_t*); +%ignore GEMatrix::toInternal(); + +/* Parse the header file to generate wrappers */ +%include "src/gauss.h" +%include "src/gesymbol.h" +%include "src/gearray.h" +%include "src/gematrix.h" +%include "src/gestringarray.h" +%include "src/geworkspace.h" +%include "src/workspacemanager.h" +%include "src/gefuncwrapper.h" +%include "src/gesymtype.h" + diff --git a/test/test_heuristics.rb b/test/test_heuristics.rb index 409b0b514b..9bc994d365 100644 --- a/test/test_heuristics.rb +++ b/test/test_heuristics.rb @@ -226,6 +226,15 @@ def test_hh_by_heuristics }) end + def test_i_by_heuristics + assert_heuristics({ + "Motorola 68K Assembly" => all_fixtures("Motorola 68K Assembly", "*.i"), + "SWIG" => all_fixtures("SWIG", "*.i"), + # No heuristic defined for Assembly + nil => all_fixtures("Assembly", "*.i") + }) + end + def test_ice_by_heuristics assert_heuristics({ "Slice" => all_fixtures("Slice", "*.ice"), diff --git a/vendor/README.md b/vendor/README.md index 040a8b61af..d31faf278a 100644 --- a/vendor/README.md +++ b/vendor/README.md @@ -367,6 +367,7 @@ This is a list of grammars that Linguist selects to provide syntax highlighting - **SSH Config:** [Alhadis/language-etc](https://github.com/Alhadis/language-etc) - **STON:** [tomas-stefano/smalltalk-tmbundle](https://github.com/tomas-stefano/smalltalk-tmbundle) - **SVG:** [Alhadis/language-etc](https://github.com/Alhadis/language-etc) +- **SWIG:** [textmate/c.tmbundle](https://github.com/textmate/c.tmbundle) - **Sage:** [MagicStack/MagicPython](https://github.com/MagicStack/MagicPython) - **SaltStack:** [saltstack/atom-salt](https://github.com/saltstack/atom-salt) - **Sass:** [atom/language-sass](https://github.com/atom/language-sass)