Skip to content

Commit

Permalink
elf: sharc: condense new RelocationEncoding variants
Browse files Browse the repository at this point in the history 
As suggested by @philipc. Combined with the previous commit's change to
the meaning of `size` for these relocations, there is no longer any
ambiguity when converting between the 3-tuple and Rel::r_type constants.
  • Loading branch information
@joshchngs
joshchngs committed Nov 13, 2023
1 parent b1d76da commit 45c7463
Show file tree
Hide file tree
Showing 4 changed files with 52 additions and 72 deletions.
72 changes: 24 additions & 48 deletions src/common.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -369,54 +369,30 @@ pub enum RelocationEncoding {
///
/// The `RelocationKind` must be PC relative.
LoongArchBranch,

/// SHARC+ 24-bit absolute address in a Type A instruction
///
/// Used with `RelocationKind::Absolute`.
/// See [elf::R_SHARC_ADDR24_v3]
SharcAbs24TypeA,

/// SHARC+ 32-bit absolute address in a Type A instruction
///
/// Used with `RelocationKind::Absolute`.
/// See [elf::R_SHARC_ADDR32_v3]
SharcAbs32TypeA,

/// SHARC+ 32-bit absolute address in a 32-bit STT_OBJECT location
///
/// See [elf::R_SHARC_ADDRVAR_V3]
SharcAbs32Data,

/// SHARC+ 6-bit relative address in a Type A instruction
///
/// The `RelocationKind` must be PC relative.
SharcPcr6TypeA,

/// SHARC+ 24-bit relative address in a Type A instruction
///
/// The `RelocationKind` must be PC relative.
SharcPcr24TypeA,

/// SHARC+ 6-bit absolute address in the immediate value field of a Type A instruction
SharcAbs6TypeA,

/// SHARC+ 16-bit absolute address in the immediate value field of a Type A instruction
SharcAbs16TypeA,

/// SHARC+ 6-bit absolute address in the immediate value field of a Type B instruction
SharcAbs6TypeB,

/// SHARC+ 7-bit absolute address in the immediate value field of a Type B instruction
SharcAbs7TypeB,

/// SHARC+ 16-bit absolute address in a Type B instruction
SharcAbs16TypeB,

/// SHARC+ 6-bit relative address in a Type B instruction
SharcPcr6TypeB,

/// SHARC+ 16-bit absolute address in a 16-bit STT_OBJECT location
SharcAbs16Data,

/// SHARC+ 48-bit Type A instruction
///
/// Represents these possible variants, each with a corresponding
/// `R_SHARC_*` constant:
///
/// * 24-bit absolute address
/// * 32-bit absolute address
/// * 6-bit relative address
/// * 24-bit relative address
/// * 6-bit absolute address in the immediate value field
/// * 16-bit absolute address in the immediate value field
SharcTypeA,

/// SHARC+ 32-bit Type B instruction
///
/// Represents these possible variants, each with a corresponding
/// `R_SHARC_*` constant:
///
/// * 6-bit absolute address in the immediate value field
/// * 7-bit absolute address in the immediate value field
/// * 16-bit absolute address
/// * 6-bit relative address
SharcTypeB,
}

/// File flags that are specific to each file format.
Expand Down
4 changes: 4 additions & 0 deletions src/elf.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2232,6 +2232,8 @@ pub const R_SHARC_ADDR24_V3: u32 = 0x0b;
pub const R_SHARC_ADDR32_V3: u32 = 0x0c;

/// 32-bit absolute address in bits 31:0 of a 32-bit data location
///
/// Represented with `RelocationEncoding::Generic`
pub const R_SHARC_ADDR_VAR_V3: u32 = 0x0d;

/// 6-bit PC-relative address in bits 32:27 of a 48-bit instr
Expand Down Expand Up @@ -2289,6 +2291,8 @@ pub const R_SHARC_DATA16_VISA_V3: u32 = 0x14;
pub const R_SHARC_PCR6_VISA_V3: u32 = 0x17;

/// 16-bit absolute address into bits 15:0 of a 16-bit location.
///
/// Represented with `RelocationEncoding::Generic`
pub const R_SHARC_ADDR_VAR16_V3: u32 = 0x19;

pub const R_SHARC_CALC_PUSH_ADDR: u32 = 0xe0;
Expand Down
24 changes: 12 additions & 12 deletions src/read/elf/relocation.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -406,51 +406,51 @@ fn parse_relocation<Elf: FileHeader>(
},
elf::EM_SHARC => match reloc.r_type(endian, false) {
elf::R_SHARC_ADDR24_V3 => {
encoding = RelocationEncoding::SharcAbs24TypeA;
encoding = RelocationEncoding::SharcTypeA;
(RelocationKind::Absolute, 24)
}
elf::R_SHARC_ADDR32_V3 => {
encoding = RelocationEncoding::SharcAbs32TypeA;
encoding = RelocationEncoding::SharcTypeA;
(RelocationKind::Absolute, 32)
}
elf::R_SHARC_ADDR_VAR_V3 => {
encoding = RelocationEncoding::SharcAbs32Data;
encoding = RelocationEncoding::Generic;
(RelocationKind::Absolute, 32)
}
elf::R_SHARC_PCRSHORT_V3 => {
encoding = RelocationEncoding::SharcPcr6TypeA;
encoding = RelocationEncoding::SharcTypeA;
(RelocationKind::Relative, 6)
}
elf::R_SHARC_PCRLONG_V3 => {
encoding = RelocationEncoding::SharcPcr24TypeA;
encoding = RelocationEncoding::SharcTypeA;
(RelocationKind::Relative, 24)
}
elf::R_SHARC_DATA6_V3 => {
encoding = RelocationEncoding::SharcAbs6TypeA;
encoding = RelocationEncoding::SharcTypeA;
(RelocationKind::Absolute, 6)
}
elf::R_SHARC_DATA16_V3 => {
encoding = RelocationEncoding::SharcAbs16TypeA;
encoding = RelocationEncoding::SharcTypeA;
(RelocationKind::Absolute, 16)
}
elf::R_SHARC_DATA6_VISA_V3 => {
encoding = RelocationEncoding::SharcAbs6TypeB;
encoding = RelocationEncoding::SharcTypeB;
(RelocationKind::Absolute, 6)
}
elf::R_SHARC_DATA7_VISA_V3 => {
encoding = RelocationEncoding::SharcAbs7TypeB;
encoding = RelocationEncoding::SharcTypeB;
(RelocationKind::Absolute, 7)
}
elf::R_SHARC_DATA16_VISA_V3 => {
encoding = RelocationEncoding::SharcAbs16TypeB;
encoding = RelocationEncoding::SharcTypeB;
(RelocationKind::Absolute, 16)
}
elf::R_SHARC_PCR6_VISA_V3 => {
encoding = RelocationEncoding::SharcPcr6TypeB;
encoding = RelocationEncoding::SharcTypeB;
(RelocationKind::Relative, 16)
}
elf::R_SHARC_ADDR_VAR16_V3 => {
encoding = RelocationEncoding::SharcAbs16Data;
encoding = RelocationEncoding::Generic;
(RelocationKind::Absolute, 16)
}
r_type => (RelocationKind::Elf(r_type), 0),
Expand Down
24 changes: 12 additions & 12 deletions src/write/elf/object.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -769,40 +769,40 @@ impl<'a> Object<'a> {
}
},
Architecture::Sharc => match (reloc.kind, reloc.encoding, reloc.size) {
(RelocationKind::Absolute, RelocationEncoding::SharcAbs32TypeA, 32) => {
(RelocationKind::Absolute, RelocationEncoding::SharcTypeA, 32) => {
elf::R_SHARC_ADDR32_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs32Data, 32) => {
(RelocationKind::Absolute, RelocationEncoding::Generic, 32) => {
elf::R_SHARC_ADDR_VAR_V3
}
(RelocationKind::Relative, RelocationEncoding::SharcPcr24TypeA, 24) => {
(RelocationKind::Relative, RelocationEncoding::SharcTypeA, 24) => {
elf::R_SHARC_PCRLONG_V3
}
(RelocationKind::Relative, RelocationEncoding::SharcPcr6TypeA, 6) => {
(RelocationKind::Relative, RelocationEncoding::SharcTypeA, 6) => {
elf::R_SHARC_PCRSHORT_V3
}
(RelocationKind::Relative, RelocationEncoding::SharcPcr6TypeB, 6) => {
(RelocationKind::Relative, RelocationEncoding::SharcTypeB, 6) => {
elf::R_SHARC_PCRSHORT_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs16Data, 16) => {
(RelocationKind::Absolute, RelocationEncoding::Generic, 16) => {
elf::R_SHARC_ADDR_VAR16_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs16TypeA, 16) => {
(RelocationKind::Absolute, RelocationEncoding::SharcTypeA, 16) => {
elf::R_SHARC_DATA16_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs16TypeB, 16) => {
(RelocationKind::Absolute, RelocationEncoding::SharcTypeB, 16) => {
elf::R_SHARC_DATA16_VISA_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs24TypeA, 24) => {
(RelocationKind::Absolute, RelocationEncoding::SharcTypeA, 24) => {
elf::R_SHARC_ADDR24_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs6TypeA, 6) => {
(RelocationKind::Absolute, RelocationEncoding::SharcTypeA, 6) => {
elf::R_SHARC_DATA6_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs6TypeB, 6) => {
(RelocationKind::Absolute, RelocationEncoding::SharcTypeB, 6) => {
elf::R_SHARC_DATA6_VISA_V3
}
(RelocationKind::Absolute, RelocationEncoding::SharcAbs7TypeB, 7) => {
(RelocationKind::Absolute, RelocationEncoding::SharcTypeB, 7) => {
elf::R_SHARC_DATA7_VISA_V3
}
(_, RelocationEncoding::Generic, _) => {
Expand Down

0 comments on commit 45c7463

Please sign in to comment.