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Hi, for my final year project I'm implementing an mnist cnn classifier model. I found your framework very interesting, I tried the first notebook but then I couldn't figure out how to integrate the generated ip core to my hardware design in Vivado. Could someone help me on this please ?
The text was updated successfully, but these errors were encountered:
My apologies for that late response on this. We recently merged the VivadoAccelerator backend into the hls4ml master branch. That can help make a bitfile for Pynq-Z2 and ZCU104 boards that use DMA to move data between the host processor and the IP. It may also provide a starting point if your intended application is different.
Hi, for my final year project I'm implementing an mnist cnn classifier model. I found your framework very interesting, I tried the first notebook but then I couldn't figure out how to integrate the generated ip core to my hardware design in Vivado. Could someone help me on this please ?
The text was updated successfully, but these errors were encountered: