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OpenOCD doesn't automatically hook up to CPU_1 after chip reset in post 20200709 versions. (OCD-373) #160

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rokk0 opened this issue Jun 15, 2021 · 1 comment

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@rokk0
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rokk0 commented Jun 15, 2021

Environment

  • Development Kit: ESP32-DevKitC
  • Module or chip used: ESP32-WROOM-32
  • Debug Adapter: FT232H
  • OpenOCD version: 20210401
  • Operating System: Windows 10
  • Using an IDE?: Eclipse
  • OpenOCD command line: openocd -c "set ESP_SEMIHOST_BASEDIR g:\semihost\jwt_auth_roles" -f board\esp32-wrover-kit-3.3v.cfg
  • JTAG Clock: default
  • ESP-IDF version: v4.3

Problem Description

I have a project, based on modified restful_server example with semihosting to upload web files from PC. It was working fine with old IDF v4.2 (OpenOCD v20200709), but after update to 4.3 (OpenOCD v20210401) files are not uploading or only part of them is uploading. After some investigation I found the problem is in OpenOCD, I tested all versions after v20200709 and in all of them I need to restart OpenOCD after every reflash/reset of ESP32 chip, because it doesn't hook up to esp32.cpu1 during chip reset.

v20200709 output after ESP32 reset:

Info : xtensa_mcore_poll: Target offline
Error: xtensa_mcore_poll: Target failure
Polling target esp32 failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 100ms
Info : esp32: Debug controller 0 was reset.
Info : esp32: Core 0 was reset.
Polling target esp32 failed, trying to reexamine
Info : esp32: Debug controller 1 was reset.
Info : esp32: Core 1 was reset.
Info : esp32: Debug controller 0 was reset.
Info : esp32: Core 0 was reset.
Info : esp32: Debug controller 1 was reset.
Info : esp32: Core 1 was reset.
Info : Target halted. CPU0: PC=0x400DE52C (active)
Info : Target halted. CPU1: PC=0x401582E6

v20210401 output after ESP32 reset:

Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x400DE52C, debug_reason=00000001
Info : Set GDB target to 'esp32.cpu0'

v20210401 output after ESP32 reset and starting OpenOCD after it:

Info : esp32.cpu0: Debug controller was reset.
Info : esp32.cpu0: Core was reset.
Info : esp32.cpu1: Debug controller was reset.
Info : esp32.cpu1: Core was reset.
Info : esp32.cpu0: Target halted, PC=0x400DE52C, debug_reason=00000001
Info : Set GDB target to 'esp32.cpu0'
Info : esp32.cpu1: Target halted, PC=0x401582E6, debug_reason=00000000

Debug Logs

v20210401 log after ESP32 reset
openocd_log.txt
v20210401 output after ESP32 reset and starting OpenOCD after it:
openocd_log.txt

@github-actions github-actions bot changed the title OpenOCD doesn't automatically hook up to CPU_1 after chip reset in post 20200709 versions. OpenOCD doesn't automatically hook up to CPU_1 after chip reset in post 20200709 versions. (OCD-373) Jun 15, 2021
@gerekon
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gerekon commented Jul 21, 2021

Hi @rokk0!
Thanks for your findings. I can reproduce this. The problem happens when the chip is flashed and reset by esptool.py with connected OpenOCD. There seem to be no problem when the chip is just reset via CTRL+T+R in IDF monitor.

Looking into this.

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