From 1a443a1ddeff6140139fa0ae64c50232b5b4409a Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Sat, 12 Mar 2022 00:53:43 +0100 Subject: [PATCH] Draft: sdmmc: fix unreasonable i/o clock phase settings --- components/driver/sdmmc_host.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/components/driver/sdmmc_host.c b/components/driver/sdmmc_host.c index d2773518e47..acf5e963a41 100644 --- a/components/driver/sdmmc_host.c +++ b/components/driver/sdmmc_host.c @@ -122,16 +122,8 @@ static void sdmmc_host_set_clk_div(int div) #if SOC_SDMMC_SUPPORT_XTAL_CLOCK SDMMC.clock.clk_sel = 1; #endif -#if SOC_SDMMC_USE_GPIO_MATRIX - // 90 degree phase on input and output clocks - const int inout_clock_phase = 1; -#else - // 180 degree phase on input and output clocks - const int inout_clock_phase = 4; -#endif - // Set phases for in/out clocks - SDMMC.clock.phase_dout = inout_clock_phase; - SDMMC.clock.phase_din = inout_clock_phase; + SDMMC.clock.phase_dout = 1; /* 90 deg. delay for cclk_out to satisfy hold time */ + SDMMC.clock.phase_din = 6; /* 270 deg. delay for cclk_in to satisfy card output delay */ SDMMC.clock.phase_core = 0; // Wait for the clock to propagate esp_rom_delay_us(10); -- 2.30.1 (Apple Git-130)