From d5bdf955807fc4fc878543d9c58a0495cf0694cf Mon Sep 17 00:00:00 2001 From: "Michael (XIAO Xufeng)" Date: Wed, 5 Jan 2022 06:08:37 +0000 Subject: [PATCH] hw_support: fixed regi2c not protected by lock on ESP32S2 --- .../subproject/main/ld/esp32s2/bootloader.ld | 1 + .../src/bootloader_random_esp32c2.c | 2 +- .../src/bootloader_random_esp32c3.c | 3 +- .../src/bootloader_random_esp32h2.c | 2 +- .../src/bootloader_random_esp32s2.c | 2 +- .../src/bootloader_random_esp32s3.c | 2 +- .../src/esp32c2/bootloader_esp32c2.c | 1 - .../src/esp32c3/bootloader_esp32c3.c | 4 +- .../src/esp32h2/bootloader_esp32h2.c | 1 - components/driver/rtc_temperature_legacy.c | 3 +- components/driver/test/test_adc.c | 5 +- components/esp_hw_support/CMakeLists.txt | 2 +- .../esp_private}/regi2c_ctrl.h | 49 ++++----- components/esp_hw_support/linker.lf | 2 - .../esp_hw_support/port/esp32/rtc_clk.c | 14 ++- .../esp32c2/private_include/regi2c_saradc.h | 7 -- .../esp_hw_support/port/esp32c2/regi2c_ctrl.h | 98 ----------------- .../esp_hw_support/port/esp32c2/rtc_clk.c | 1 + .../esp_hw_support/port/esp32c2/rtc_init.c | 2 + .../esp_hw_support/port/esp32c2/rtc_sleep.c | 2 + .../esp32c3/private_include/regi2c_saradc.h | 7 -- .../esp_hw_support/port/esp32c3/regi2c_ctrl.h | 97 ----------------- .../esp_hw_support/port/esp32c3/rtc_clk.c | 1 + .../esp_hw_support/port/esp32c3/rtc_init.c | 2 + .../esp_hw_support/port/esp32c3/rtc_sleep.c | 2 + .../esp_hw_support/port/esp32h2/regi2c_ctrl.h | 101 ------------------ .../esp_hw_support/port/esp32h2/rtc_sleep.c | 2 + .../port/esp32s2/CMakeLists.txt | 1 - .../esp32s2/private_include/regi2c_saradc.h | 7 -- .../esp_hw_support/port/esp32s2/regi2c_ctrl.h | 92 ---------------- .../esp_hw_support/port/esp32s2/rtc_clk.c | 5 +- .../esp32s3/private_include/regi2c_saradc.h | 7 -- .../esp_hw_support/port/esp32s3/regi2c_ctrl.h | 95 ---------------- .../esp_hw_support/port/esp32s3/rtc_clk.c | 2 + .../esp_hw_support/port/esp32s3/rtc_init.c | 2 + .../esp_hw_support/port/esp32s3/rtc_sleep.c | 1 + components/esp_hw_support/regi2c_ctrl.c | 16 +-- components/esp_rom/CMakeLists.txt | 3 +- components/esp_rom/esp32/ld/esp32.rom.api.ld | 5 + .../esp_rom/esp32c2/ld/esp32c2.rom.api.ld | 5 + .../esp_rom/esp32c3/ld/esp32c3.rom.api.ld | 7 +- .../esp32h2/ld/rev1/esp32h2.rom.api.ld | 5 + .../esp32h2/ld/rev2/esp32h2.rom.api.ld | 5 + .../esp_rom/esp32s3/ld/esp32s3.rom.api.ld | 5 + components/esp_rom/include/esp_rom_regi2c.h | 63 +++++++++++ components/esp_rom/linker.lf | 1 + .../patches/esp_rom_regi2c.c} | 25 +++-- components/hal/esp32c2/brownout_hal.c | 2 +- components/hal/esp32c2/include/hal/adc_ll.h | 4 +- components/hal/esp32c3/brownout_hal.c | 20 ++-- components/hal/esp32c3/include/hal/adc_ll.h | 4 +- .../include/hal/temperature_sensor_ll.h | 3 +- components/hal/esp32h2/brownout_hal.c | 20 ++-- components/hal/esp32h2/include/hal/adc_ll.h | 4 +- .../include/hal/temperature_sensor_ll.h | 3 +- components/hal/esp32s2/brownout_hal.c | 20 ++-- components/hal/esp32s2/include/hal/adc_ll.h | 5 +- .../include/hal/temperature_sensor_ll.h | 3 +- components/hal/esp32s3/brownout_hal.c | 20 ++-- components/hal/esp32s3/include/hal/adc_ll.h | 4 +- .../include/hal/temperature_sensor_ll.h | 3 +- .../soc/esp32/include/soc/regi2c_defs.h | 18 ++++ .../soc/esp32c2/include/soc/regi2c_defs.h | 36 +++++++ .../soc/esp32c3/include/soc/regi2c_defs.h | 35 ++++++ .../soc/esp32h2/include/soc/regi2c_defs.h | 29 +++++ .../soc/esp32s2/include/soc/regi2c_defs.h | 30 ++++++ .../soc/esp32s3/include/soc/regi2c_defs.h | 34 ++++++ tools/ci/check_copyright_ignore.txt | 4 - tools/ci/check_public_headers_exceptions.txt | 1 - 69 files changed, 422 insertions(+), 647 deletions(-) rename components/esp_hw_support/{port/esp32 => include/esp_private}/regi2c_ctrl.h (52%) delete mode 100644 components/esp_hw_support/port/esp32c2/regi2c_ctrl.h delete mode 100644 components/esp_hw_support/port/esp32c3/regi2c_ctrl.h delete mode 100644 components/esp_hw_support/port/esp32h2/regi2c_ctrl.h delete mode 100644 components/esp_hw_support/port/esp32s2/regi2c_ctrl.h delete mode 100644 components/esp_hw_support/port/esp32s3/regi2c_ctrl.h create mode 100644 components/esp_rom/include/esp_rom_regi2c.h rename components/{esp_hw_support/port/esp32s2/regi2c_ctrl.c => esp_rom/patches/esp_rom_regi2c.c} (87%) create mode 100644 components/soc/esp32/include/soc/regi2c_defs.h create mode 100644 components/soc/esp32c2/include/soc/regi2c_defs.h create mode 100644 components/soc/esp32c3/include/soc/regi2c_defs.h create mode 100644 components/soc/esp32h2/include/soc/regi2c_defs.h create mode 100644 components/soc/esp32s2/include/soc/regi2c_defs.h create mode 100644 components/soc/esp32s3/include/soc/regi2c_defs.h diff --git a/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld index 0277a7d7a943..514917447b50 100644 --- a/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld +++ b/components/bootloader/subproject/main/ld/esp32s2/bootloader.ld @@ -57,6 +57,7 @@ SECTIONS *libesp_hw_support.a:rtc_time.*(.literal .text .literal.* .text.*) *libesp_hw_support.a:regi2c_ctrl.*(.literal .text .literal.* .text.*) *libefuse.a:*.*(.literal .text .literal.* .text.*) + *libesp_rom.a:esp_rom_regi2c.*(.literal .text .literal.* .text.*) *(.fini.literal) *(.fini) *(.gnu.version) diff --git a/components/bootloader_support/src/bootloader_random_esp32c2.c b/components/bootloader_support/src/bootloader_random_esp32c2.c index beae2de48989..9254c167aebf 100644 --- a/components/bootloader_support/src/bootloader_random_esp32c2.c +++ b/components/bootloader_support/src/bootloader_random_esp32c2.c @@ -10,7 +10,7 @@ #include "soc/rtc_cntl_reg.h" #include "soc/apb_saradc_reg.h" #include "soc/system_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" void bootloader_random_enable(void) { diff --git a/components/bootloader_support/src/bootloader_random_esp32c3.c b/components/bootloader_support/src/bootloader_random_esp32c3.c index 4fc35ff27bcc..d75ac4e0875a 100644 --- a/components/bootloader_support/src/bootloader_random_esp32c3.c +++ b/components/bootloader_support/src/bootloader_random_esp32c3.c @@ -10,7 +10,8 @@ #include "soc/rtc_cntl_reg.h" #include "soc/apb_saradc_reg.h" #include "soc/system_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" void bootloader_random_enable(void) { diff --git a/components/bootloader_support/src/bootloader_random_esp32h2.c b/components/bootloader_support/src/bootloader_random_esp32h2.c index 3cc4e3ab2fb8..7d248d168572 100644 --- a/components/bootloader_support/src/bootloader_random_esp32h2.c +++ b/components/bootloader_support/src/bootloader_random_esp32h2.c @@ -10,7 +10,7 @@ #include "soc/rtc_cntl_reg.h" #include "soc/apb_saradc_reg.h" #include "soc/system_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" // ESP32H2-TODO: IDF-3381 void bootloader_random_enable(void) diff --git a/components/bootloader_support/src/bootloader_random_esp32s2.c b/components/bootloader_support/src/bootloader_random_esp32s2.c index fe67e5fd7bfb..a750bc58e441 100644 --- a/components/bootloader_support/src/bootloader_random_esp32s2.c +++ b/components/bootloader_support/src/bootloader_random_esp32s2.c @@ -13,7 +13,7 @@ #include "esp_log.h" #include "soc/io_mux_reg.h" #include "soc/apb_saradc_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" #include "hal/adc_ll.h" #ifndef BOOTLOADER_BUILD diff --git a/components/bootloader_support/src/bootloader_random_esp32s3.c b/components/bootloader_support/src/bootloader_random_esp32s3.c index 2953db491778..0c1086630a66 100644 --- a/components/bootloader_support/src/bootloader_random_esp32s3.c +++ b/components/bootloader_support/src/bootloader_random_esp32s3.c @@ -11,7 +11,7 @@ #include "soc/apb_saradc_reg.h" #include "soc/rtc_cntl_reg.h" #include "soc/sens_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" #include "regi2c_saradc.h" void bootloader_random_enable(void) diff --git a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c index 4be0a5f26558..f917d5ce5b2b 100644 --- a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c +++ b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c @@ -33,7 +33,6 @@ #include "bootloader_clock.h" #include "bootloader_flash_config.h" #include "bootloader_mem.h" -#include "regi2c_ctrl.h" #include "bootloader_console.h" #include "bootloader_flash_priv.h" #include "esp_efuse.h" diff --git a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c index f21d61076937..aa726b96c122 100644 --- a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c +++ b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c @@ -32,7 +32,9 @@ #include "bootloader_clock.h" #include "bootloader_flash_config.h" #include "bootloader_mem.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_lp_bias.h" +#include "regi2c_bias.h" #include "bootloader_console.h" #include "bootloader_flash_priv.h" #include "bootloader_soc.h" diff --git a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c index e28214439d78..5acb5422501c 100644 --- a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c +++ b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c @@ -32,7 +32,6 @@ #include "bootloader_clock.h" #include "bootloader_flash_config.h" #include "bootloader_mem.h" -#include "regi2c_ctrl.h" #include "bootloader_console.h" #include "bootloader_flash_priv.h" #include "bootloader_soc.h" diff --git a/components/driver/rtc_temperature_legacy.c b/components/driver/rtc_temperature_legacy.c index a3f9f33443e1..69d26843c9cc 100644 --- a/components/driver/rtc_temperature_legacy.c +++ b/components/driver/rtc_temperature_legacy.c @@ -11,7 +11,8 @@ #include "esp_log.h" #include "esp_check.h" #include "soc/rtc_cntl_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" #include "esp_log.h" #include "esp_efuse_rtc_calib.h" #include "hal/temperature_sensor_ll.h" diff --git a/components/driver/test/test_adc.c b/components/driver/test/test_adc.c index 460a2cb28c2e..6d674ba6b5ed 100644 --- a/components/driver/test/test_adc.c +++ b/components/driver/test/test_adc.c @@ -398,7 +398,10 @@ TEST_CASE("test_adc_single_cali_time", "[adc][ignore][manual]") ********************************************************************************/ #include #include "esp_sleep.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#if REGI2C_ANA_CALI_PD_WORKAROUND +#include "regi2c_saradc.h" +#endif //ADC Channels #if CONFIG_IDF_TARGET_ESP32 diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index 44e1b2f57d5d..fc8703e797ae 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -33,7 +33,7 @@ endif() idf_component_register(SRCS ${srcs} INCLUDE_DIRS include include/soc include/soc/${target} - PRIV_INCLUDE_DIRS port/include + PRIV_INCLUDE_DIRS port/include include/esp_private REQUIRES ${requires} PRIV_REQUIRES "${priv_requires}" LDFRAGMENTS linker.lf) diff --git a/components/esp_hw_support/port/esp32/regi2c_ctrl.h b/components/esp_hw_support/include/esp_private/regi2c_ctrl.h similarity index 52% rename from components/esp_hw_support/port/esp32/regi2c_ctrl.h rename to components/esp_hw_support/include/esp_private/regi2c_ctrl.h index ea2870e99b17..f6308920fd47 100644 --- a/components/esp_hw_support/port/esp32/regi2c_ctrl.h +++ b/components/esp_hw_support/include/esp_private/regi2c_ctrl.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,46 +7,33 @@ #pragma once #include -#include "regi2c_apll.h" -#include "regi2c_bbpll.h" +#include "sdkconfig.h" +#include "esp_rom_regi2c.h" +#include "soc/regi2c_defs.h" #ifdef __cplusplus extern "C" { #endif -/* Analog function control register */ -#define ANA_CONFIG_REG 0x6000E044 -#define ANA_CONFIG_S (8) -#define ANA_CONFIG_M (0x3FF) -/* Clear to enable APLL */ -#define I2C_APLL_M (BIT(14)) -/* Clear to enable BBPLL */ -#define I2C_BBPLL_M (BIT(17)) - -/* ROM functions which read/write internal control bus */ -uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); -#ifdef BOOTLOADER_BUILD +#define regi2c_read_reg_raw esp_rom_regi2c_read +#define regi2c_read_reg_mask_raw esp_rom_regi2c_read_mask +#define regi2c_write_reg_raw esp_rom_regi2c_write +#define regi2c_write_reg_mask_raw esp_rom_regi2c_write_mask + +#ifdef BOOTLOADER_BUILD /** * If compiling for the bootloader, ROM functions can be called directly, * without the need of a lock. */ -#define regi2c_ctrl_read_reg rom_i2c_readReg -#define regi2c_ctrl_read_reg_mask rom_i2c_readReg_Mask -#define regi2c_ctrl_write_reg rom_i2c_writeReg -#define regi2c_ctrl_write_reg_mask rom_i2c_writeReg_Mask +#define regi2c_ctrl_read_reg regi2c_read_reg_raw +#define regi2c_ctrl_read_reg_mask regi2c_read_reg_mask_raw +#define regi2c_ctrl_write_reg regi2c_write_reg_raw +#define regi2c_ctrl_write_reg_mask regi2c_write_reg_mask_raw #else -#define i2c_read_reg_raw rom_i2c_readReg -#define i2c_read_reg_mask_raw rom_i2c_readReg_Mask -#define i2c_write_reg_raw rom_i2c_writeReg -#define i2c_write_reg_mask_raw rom_i2c_writeReg_Mask - uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add); uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); @@ -69,6 +56,14 @@ void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, #define REGI2C_READ(block, reg_add) \ regi2c_ctrl_read_reg(block, block##_HOSTID, reg_add) +/** + * Restore regi2c analog calibration related configuration registers. + * This is a workaround, and is fixed on later chips + */ +#if REGI2C_ANA_CALI_PD_WORKAROUND +void regi2c_analog_cali_reg_read(void); +void regi2c_analog_cali_reg_write(void); +#endif //#if ADC_CALI_PD_WORKAROUND #ifdef __cplusplus } diff --git a/components/esp_hw_support/linker.lf b/components/esp_hw_support/linker.lf index 05c3fead8c8a..66a6fa247ffe 100644 --- a/components/esp_hw_support/linker.lf +++ b/components/esp_hw_support/linker.lf @@ -2,8 +2,6 @@ archive: libesp_hw_support.a entries: cpu_util (noflash_text) - if IDF_TARGET_ESP32S2 = y: - regi2c_ctrl (noflash) rtc_clk (noflash) rtc_init:rtc_vddsdio_set_config (noflash) rtc_pm (noflash_text) diff --git a/components/esp_hw_support/port/esp32/rtc_clk.c b/components/esp_hw_support/port/esp32/rtc_clk.c index 8c17bb50a029..aa9f71bce271 100644 --- a/components/esp_hw_support/port/esp32/rtc_clk.c +++ b/components/esp_hw_support/port/esp32/rtc_clk.c @@ -8,9 +8,6 @@ #include #include #include -#include "esp32/rom/ets_sys.h" // for ets_update_cpu_frequency -#include "esp32/rom/rtc.h" -#include "esp_rom_gpio.h" #include "soc/rtc.h" #include "soc/rtc_periph.h" #include "soc/sens_periph.h" @@ -22,12 +19,19 @@ #include "soc/gpio_struct.h" #include "hal/cpu_hal.h" #include "hal/gpio_ll.h" -#include "esp_rom_sys.h" -#include "regi2c_ctrl.h" #include "esp_hw_log.h" #include "sdkconfig.h" #include "rtc_clk_common.h" +#include "esp_rom_sys.h" +#include "esp_rom_gpio.h" +#include "esp32/rom/ets_sys.h" // for ets_update_cpu_frequency +#include "esp32/rom/rtc.h" + +#include "regi2c_ctrl.h" +#include "regi2c_apll.h" +#include "regi2c_bbpll.h" + /* Frequency of the 8M oscillator is 8.5MHz +/- 5%, at the default DCAP setting */ #define RTC_FAST_CLK_FREQ_8M 8500000 #define RTC_SLOW_CLK_FREQ_150K 150000 diff --git a/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h index 255ed52e3311..dd2355652722 100644 --- a/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h +++ b/components/esp_hw_support/port/esp32c2/private_include/regi2c_saradc.h @@ -77,10 +77,3 @@ #define I2C_SARADC_TSENS_DAC 0x6 #define I2C_SARADC_TSENS_DAC_MSB 3 #define I2C_SARADC_TSENS_DAC_LSB 0 - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#define REGI2C_ANA_CALI_PD_WORKAROUND 1 -#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/components/esp_hw_support/port/esp32c2/regi2c_ctrl.h b/components/esp_hw_support/port/esp32c2/regi2c_ctrl.h deleted file mode 100644 index f665d3f66467..000000000000 --- a/components/esp_hw_support/port/esp32c2/regi2c_ctrl.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - - -#pragma once - -#include -#include "regi2c_bbpll.h" -#include "regi2c_lp_bias.h" -#include "regi2c_dig_reg.h" -#include "regi2c_bias.h" -#include "regi2c_saradc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Analog function control register */ -#define I2C_MST_ANA_CONF0_REG 0x6000E040 -#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) -#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) - -#define ANA_CONFIG_REG 0x6000E044 -#define ANA_CONFIG_S (8) -#define ANA_CONFIG_M (0x3FF) - -#define ANA_I2C_SAR_FORCE_PD BIT(18) -#define ANA_I2C_BBPLL_M BIT(17) /* Clear to enable BBPLL */ -#define ANA_I2C_APLL_M BIT(14) /* Clear to enable APLL */ - - -#define ANA_CONFIG2_REG 0x6000E048 -#define ANA_CONFIG2_M BIT(18) - -#define ANA_I2C_SAR_FORCE_PU BIT(16) - -/* ROM functions which read/write internal control bus */ -uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#ifdef BOOTLOADER_BUILD - -/** - * If compiling for the bootloader, ROM functions can be called directly, - * without the need of a lock. - */ -#define regi2c_ctrl_read_reg rom_i2c_readReg -#define regi2c_ctrl_read_reg_mask rom_i2c_readReg_Mask -#define regi2c_ctrl_write_reg rom_i2c_writeReg -#define regi2c_ctrl_write_reg_mask rom_i2c_writeReg_Mask - -#else - -#define i2c_read_reg_raw rom_i2c_readReg -#define i2c_read_reg_mask_raw rom_i2c_readReg_Mask -#define i2c_write_reg_raw rom_i2c_writeReg -#define i2c_write_reg_mask_raw rom_i2c_writeReg_Mask - -uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#endif // BOOTLOADER_BUILD - -/* Convenience macros for the above functions, these use register definitions - * from regi2c_bbpll.h/regi2c_dig_reg.h/regi2c_lp_bias.h/regi2c_bias.h header files. - */ -#define REGI2C_WRITE_MASK(block, reg_add, indata) \ - regi2c_ctrl_write_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) - -#define REGI2C_READ_MASK(block, reg_add) \ - regi2c_ctrl_read_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB) - -#define REGI2C_WRITE(block, reg_add, indata) \ - regi2c_ctrl_write_reg(block, block##_HOSTID, reg_add, indata) - -#define REGI2C_READ(block, reg_add) \ - regi2c_ctrl_read_reg(block, block##_HOSTID, reg_add) - - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#if REGI2C_ANA_CALI_PD_WORKAROUND -void regi2c_analog_cali_reg_read(void); -void regi2c_analog_cali_reg_write(void); -#endif //#if ADC_CALI_PD_WORKAROUND - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_hw_support/port/esp32c2/rtc_clk.c b/components/esp_hw_support/port/esp32c2/rtc_clk.c index fb7ba04960f0..931d2ae3a7c5 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c2/rtc_clk.c @@ -20,6 +20,7 @@ #include "soc/syscon_reg.h" #include "soc/system_reg.h" #include "regi2c_ctrl.h" +#include "regi2c_bbpll.h" #include "esp_hw_log.h" #include "rtc_clk_common.h" #include "esp_rom_sys.h" diff --git a/components/esp_hw_support/port/esp32c2/rtc_init.c b/components/esp_hw_support/port/esp32c2/rtc_init.c index 9d8d256e623b..86c4333385cc 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_init.c +++ b/components/esp_hw_support/port/esp32c2/rtc_init.c @@ -15,6 +15,8 @@ #include "soc/extmem_reg.h" #include "soc/system_reg.h" #include "regi2c_ctrl.h" +#include "regi2c_dig_reg.h" +#include "regi2c_lp_bias.h" #include "esp_hw_log.h" #include "esp_efuse.h" #include "esp_efuse_table.h" diff --git a/components/esp_hw_support/port/esp32c2/rtc_sleep.c b/components/esp_hw_support/port/esp32c2/rtc_sleep.c index 788bccf3bdb1..183651ffa84c 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32c2/rtc_sleep.c @@ -20,6 +20,8 @@ #include "esp32c2/rom/ets_sys.h" #include "esp32c2/rom/rtc.h" #include "regi2c_ctrl.h" +#include "regi2c_lp_bias.h" +#include "regi2c_dig_reg.h" #include "esp_efuse.h" /** diff --git a/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h index 255ed52e3311..dd2355652722 100644 --- a/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h +++ b/components/esp_hw_support/port/esp32c3/private_include/regi2c_saradc.h @@ -77,10 +77,3 @@ #define I2C_SARADC_TSENS_DAC 0x6 #define I2C_SARADC_TSENS_DAC_MSB 3 #define I2C_SARADC_TSENS_DAC_LSB 0 - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#define REGI2C_ANA_CALI_PD_WORKAROUND 1 -#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/components/esp_hw_support/port/esp32c3/regi2c_ctrl.h b/components/esp_hw_support/port/esp32c3/regi2c_ctrl.h deleted file mode 100644 index 7e5060288c67..000000000000 --- a/components/esp_hw_support/port/esp32c3/regi2c_ctrl.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include -#include "regi2c_bbpll.h" -#include "regi2c_lp_bias.h" -#include "regi2c_dig_reg.h" -#include "regi2c_bias.h" -#include "regi2c_saradc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Analog function control register */ -#define I2C_MST_ANA_CONF0_REG 0x6000E040 -#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) -#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) - -#define ANA_CONFIG_REG 0x6000E044 -#define ANA_CONFIG_S (8) -#define ANA_CONFIG_M (0x3FF) - -#define ANA_I2C_SAR_FORCE_PD BIT(18) -#define ANA_I2C_BBPLL_M BIT(17) /* Clear to enable BBPLL */ -#define ANA_I2C_APLL_M BIT(14) /* Clear to enable APLL */ - - -#define ANA_CONFIG2_REG 0x6000E048 -#define ANA_CONFIG2_M BIT(18) - -#define ANA_I2C_SAR_FORCE_PU BIT(16) - -/* ROM functions which read/write internal control bus */ -uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#ifdef BOOTLOADER_BUILD - -/** - * If compiling for the bootloader, ROM functions can be called directly, - * without the need of a lock. - */ -#define regi2c_ctrl_read_reg rom_i2c_readReg -#define regi2c_ctrl_read_reg_mask rom_i2c_readReg_Mask -#define regi2c_ctrl_write_reg rom_i2c_writeReg -#define regi2c_ctrl_write_reg_mask rom_i2c_writeReg_Mask - -#else - -#define i2c_read_reg_raw rom_i2c_readReg -#define i2c_read_reg_mask_raw rom_i2c_readReg_Mask -#define i2c_write_reg_raw rom_i2c_writeReg -#define i2c_write_reg_mask_raw rom_i2c_writeReg_Mask - -uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#endif // BOOTLOADER_BUILD - -/* Convenience macros for the above functions, these use register definitions - * from regi2c_bbpll.h/regi2c_dig_reg.h/regi2c_lp_bias.h/regi2c_bias.h header files. - */ -#define REGI2C_WRITE_MASK(block, reg_add, indata) \ - regi2c_ctrl_write_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) - -#define REGI2C_READ_MASK(block, reg_add) \ - regi2c_ctrl_read_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB) - -#define REGI2C_WRITE(block, reg_add, indata) \ - regi2c_ctrl_write_reg(block, block##_HOSTID, reg_add, indata) - -#define REGI2C_READ(block, reg_add) \ - regi2c_ctrl_read_reg(block, block##_HOSTID, reg_add) - - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#if REGI2C_ANA_CALI_PD_WORKAROUND -void regi2c_analog_cali_reg_read(void); -void regi2c_analog_cali_reg_write(void); -#endif //#if ADC_CALI_PD_WORKAROUND - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_hw_support/port/esp32c3/rtc_clk.c b/components/esp_hw_support/port/esp32c3/rtc_clk.c index 98240a9aa0e1..d2e66ad14d4b 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c3/rtc_clk.c @@ -20,6 +20,7 @@ #include "soc/syscon_reg.h" #include "soc/system_reg.h" #include "regi2c_ctrl.h" +#include "regi2c_bbpll.h" #include "esp_hw_log.h" #include "rtc_clk_common.h" #include "esp_rom_sys.h" diff --git a/components/esp_hw_support/port/esp32c3/rtc_init.c b/components/esp_hw_support/port/esp32c3/rtc_init.c index 6c9a4f2d0b01..3942ff6ebe53 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_init.c +++ b/components/esp_hw_support/port/esp32c3/rtc_init.c @@ -15,6 +15,8 @@ #include "soc/extmem_reg.h" #include "soc/system_reg.h" #include "regi2c_ctrl.h" +#include "regi2c_dig_reg.h" +#include "regi2c_lp_bias.h" #include "esp_hw_log.h" #include "esp_efuse.h" #include "esp_efuse_table.h" diff --git a/components/esp_hw_support/port/esp32c3/rtc_sleep.c b/components/esp_hw_support/port/esp32c3/rtc_sleep.c index 456934a99ad6..ebfa8cdd8e77 100644 --- a/components/esp_hw_support/port/esp32c3/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32c3/rtc_sleep.c @@ -21,6 +21,8 @@ #include "esp32c3/rom/ets_sys.h" #include "esp32c3/rom/rtc.h" #include "regi2c_ctrl.h" +#include "regi2c_dig_reg.h" +#include "regi2c_lp_bias.h" #include "esp_efuse.h" /** diff --git a/components/esp_hw_support/port/esp32h2/regi2c_ctrl.h b/components/esp_hw_support/port/esp32h2/regi2c_ctrl.h deleted file mode 100644 index 28436f579010..000000000000 --- a/components/esp_hw_support/port/esp32h2/regi2c_ctrl.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. - -#pragma once - -#include -#include "regi2c_bbpll.h" -#include "regi2c_lp_bias.h" -#include "regi2c_dig_reg.h" -#include "regi2c_bias.h" -#include "regi2c_saradc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Analog function control register */ -#define I2C_MST_ANA_CONF0_REG 0x6000E040 -#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) -#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) - -#define ANA_CONFIG_REG 0x6000E044 -#define ANA_CONFIG_S (8) -#define ANA_CONFIG_M (0x3FF) - -#define ANA_I2C_SAR_FORCE_PD BIT(18) -#define ANA_I2C_BBPLL_M BIT(17) /* Clear to enable BBPLL */ -#define ANA_I2C_APLL_M BIT(14) /* Clear to enable APLL */ - - -#define ANA_CONFIG2_REG 0x6000E048 -#define ANA_CONFIG2_M BIT(18) - -#define ANA_I2C_SAR_FORCE_PU BIT(16) - -/* ROM functions which read/write internal control bus */ -uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#ifdef BOOTLOADER_BUILD - -/** - * If compiling for the bootloader, ROM functions can be called directly, - * without the need of a lock. - */ -#define regi2c_ctrl_read_reg rom_i2c_readReg -#define regi2c_ctrl_read_reg_mask rom_i2c_readReg_Mask -#define regi2c_ctrl_write_reg rom_i2c_writeReg -#define regi2c_ctrl_write_reg_mask rom_i2c_writeReg_Mask - -#else - -#define i2c_read_reg_raw rom_i2c_readReg -#define i2c_read_reg_mask_raw rom_i2c_readReg_Mask -#define i2c_write_reg_raw rom_i2c_writeReg -#define i2c_write_reg_mask_raw rom_i2c_writeReg_Mask - -uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#endif // BOOTLOADER_BUILD - -/* Convenience macros for the above functions, these use register definitions - * from regi2c_bbpll.h/regi2c_dig_reg.h/regi2c_lp_bias.h/regi2c_bias.h header files. - */ -#define REGI2C_WRITE_MASK(block, reg_add, indata) \ - regi2c_ctrl_write_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) - -#define REGI2C_READ_MASK(block, reg_add) \ - regi2c_ctrl_read_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB) - -#define REGI2C_WRITE(block, reg_add, indata) \ - regi2c_ctrl_write_reg(block, block##_HOSTID, reg_add, indata) - -#define REGI2C_READ(block, reg_add) \ - regi2c_ctrl_read_reg(block, block##_HOSTID, reg_add) - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_hw_support/port/esp32h2/rtc_sleep.c b/components/esp_hw_support/port/esp32h2/rtc_sleep.c index 4090356fda74..fe12ba824aa8 100644 --- a/components/esp_hw_support/port/esp32h2/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32h2/rtc_sleep.c @@ -19,6 +19,8 @@ #include "esp32h2/rom/ets_sys.h" #include "esp32h2/rom/rtc.h" #include "regi2c_ctrl.h" +#include "regi2c_bias.h" +#include "regi2c_ulp.h" #include "esp_efuse.h" #include "i2c_pmu.h" #include "esp_hw_log.h" diff --git a/components/esp_hw_support/port/esp32s2/CMakeLists.txt b/components/esp_hw_support/port/esp32s2/CMakeLists.txt index cd455018242a..4883f875a969 100644 --- a/components/esp_hw_support/port/esp32s2/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s2/CMakeLists.txt @@ -8,7 +8,6 @@ set(srcs "rtc_pm.c" "rtc_sleep.c" "rtc_time.c" - "regi2c_ctrl.c" "chip_info.c" ) diff --git a/components/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h index 2c3738a2210a..323b99206b79 100644 --- a/components/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h +++ b/components/esp_hw_support/port/esp32s2/private_include/regi2c_saradc.h @@ -73,10 +73,3 @@ #define I2C_SARADC_TSENS_DAC 0x6 #define I2C_SARADC_TSENS_DAC_MSB 3 #define I2C_SARADC_TSENS_DAC_LSB 0 - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#define REGI2C_ANA_CALI_PD_WORKAROUND 1 -#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/components/esp_hw_support/port/esp32s2/regi2c_ctrl.h b/components/esp_hw_support/port/esp32s2/regi2c_ctrl.h deleted file mode 100644 index 5058cbb57ee0..000000000000 --- a/components/esp_hw_support/port/esp32s2/regi2c_ctrl.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include -#include "regi2c_apll.h" -#include "regi2c_bbpll.h" -#include "regi2c_ulp.h" -#include "regi2c_saradc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Analog function control register */ -#define ANA_CONFIG_REG 0x6000E044 -#define ANA_CONFIG_S (8) -#define ANA_CONFIG_M (0x3FF) -/* Clear to enable APLL */ -#define I2C_APLL_M (BIT(14)) -/* Clear to enable BBPLL */ -#define I2C_BBPLL_M (BIT(17)) -/* Clear to enable SAR */ -#define I2C_SAR_M (BIT(18)) - -#define ANA_CONFIG2_REG 0x6000E048 -#define ANA_SAR_CFG2_M (BIT(16)) - -/* Read/Write internal control bus */ -uint8_t i2c_rtc_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t i2c_rtc_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void i2c_rtc_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void i2c_rtc_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); -void i2c_rtc_init(void); - -#ifdef BOOTLOADER_BUILD - -/** - * If compiling for the bootloader, internal functions can be called directly, - * without the need of a lock. - */ -#define regi2c_ctrl_read_reg i2c_rtc_read_reg -#define regi2c_ctrl_read_reg_mask i2c_rtc_read_reg_mask -#define regi2c_ctrl_write_reg i2c_rtc_write_reg -#define regi2c_ctrl_write_reg_mask i2c_rtc_write_reg_mask - -#else - -#define i2c_read_reg_raw i2c_rtc_read_reg -#define i2c_read_reg_mask_raw i2c_rtc_read_reg_mask -#define i2c_write_reg_raw i2c_rtc_write_reg -#define i2c_write_reg_mask_raw i2c_rtc_write_reg_mask - -uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#endif // BOOTLOADER_BUILD - -/* Convenience macros for the above functions, these use register definitions - * from regi2c_apll.h/regi2c_bbpll.h header files. - */ -#define REGI2C_WRITE_MASK(block, reg_add, indata) \ - regi2c_ctrl_write_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) - -#define REGI2C_READ_MASK(block, reg_add) \ - regi2c_ctrl_read_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB) - -#define REGI2C_WRITE(block, reg_add, indata) \ - regi2c_ctrl_write_reg(block, block##_HOSTID, reg_add, indata) - -#define REGI2C_READ(block, reg_add) \ - regi2c_ctrl_read_reg(block, block##_HOSTID, reg_add) - - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#if REGI2C_ANA_CALI_PD_WORKAROUND -void regi2c_analog_cali_reg_read(void); -void regi2c_analog_cali_reg_write(void); -#endif //#if ADC_CALI_PD_WORKAROUND - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_hw_support/port/esp32s2/rtc_clk.c b/components/esp_hw_support/port/esp32s2/rtc_clk.c index b9280c029f74..eaaf6110a7dc 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32s2/rtc_clk.c @@ -21,11 +21,14 @@ #include "soc/efuse_reg.h" #include "soc/syscon_reg.h" #include "esp_rom_sys.h" -#include "regi2c_ctrl.h" #include "esp_hw_log.h" #include "rtc_clk_common.h" #include "sdkconfig.h" +#include "regi2c_ctrl.h" +#include "regi2c_apll.h" +#include "regi2c_bbpll.h" + static const char *TAG = "rtc_clk"; #define RTC_PLL_FREQ_320M 320 diff --git a/components/esp_hw_support/port/esp32s3/private_include/regi2c_saradc.h b/components/esp_hw_support/port/esp32s3/private_include/regi2c_saradc.h index 2c3738a2210a..323b99206b79 100644 --- a/components/esp_hw_support/port/esp32s3/private_include/regi2c_saradc.h +++ b/components/esp_hw_support/port/esp32s3/private_include/regi2c_saradc.h @@ -73,10 +73,3 @@ #define I2C_SARADC_TSENS_DAC 0x6 #define I2C_SARADC_TSENS_DAC_MSB 3 #define I2C_SARADC_TSENS_DAC_LSB 0 - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#define REGI2C_ANA_CALI_PD_WORKAROUND 1 -#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/components/esp_hw_support/port/esp32s3/regi2c_ctrl.h b/components/esp_hw_support/port/esp32s3/regi2c_ctrl.h deleted file mode 100644 index 385444d5fe0d..000000000000 --- a/components/esp_hw_support/port/esp32s3/regi2c_ctrl.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include -#include "regi2c_bbpll.h" -#include "regi2c_dig_reg.h" -#include "regi2c_lp_bias.h" -#include "regi2c_saradc.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* Analog function control register */ -#define I2C_MST_ANA_CONF0_REG 0x6000E040 -#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) -#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) - -#define ANA_CONFIG_REG 0x6000E044 -#define ANA_CONFIG_S (8) -#define ANA_CONFIG_M (0x3FF) -/* Clear to enable APLL */ -#define I2C_APLL_M (BIT(14)) -/* Clear to enable BBPLL */ -#define I2C_BBPLL_M (BIT(17)) -/* Clear to enable SAR */ -#define I2C_SAR_M (BIT(18)) - -#define ANA_CONFIG2_REG 0x6000E048 -#define ANA_SAR_CFG2_M (BIT(16)) - -/* ROM functions which read/write internal control bus */ -uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#ifdef BOOTLOADER_BUILD - -/** - * If compiling for the bootloader, ROM functions can be called directly, - * without the need of a lock. - */ -#define regi2c_ctrl_read_reg rom_i2c_readReg -#define regi2c_ctrl_read_reg_mask rom_i2c_readReg_Mask -#define regi2c_ctrl_write_reg rom_i2c_writeReg -#define regi2c_ctrl_write_reg_mask rom_i2c_writeReg_Mask - -#else - -#define i2c_read_reg_raw rom_i2c_readReg -#define i2c_read_reg_mask_raw rom_i2c_readReg_Mask -#define i2c_write_reg_raw rom_i2c_writeReg -#define i2c_write_reg_mask_raw rom_i2c_writeReg_Mask - -uint8_t regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add); -uint8_t regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); -void regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); -void regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); - -#endif // BOOTLOADER_BUILD - -/* Convenience macros for the above functions, these use register definitions - * from regi2c_bbpll.h/regi2c_dig_reg.h/regi2c_ulp.h header files. - */ -#define REGI2C_WRITE_MASK(block, reg_add, indata) \ - regi2c_ctrl_write_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) - -#define REGI2C_READ_MASK(block, reg_add) \ - regi2c_ctrl_read_reg_mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB) - -#define REGI2C_WRITE(block, reg_add, indata) \ - regi2c_ctrl_write_reg(block, block##_HOSTID, reg_add, indata) - -#define REGI2C_READ(block, reg_add) \ - regi2c_ctrl_read_reg(block, block##_HOSTID, reg_add) - - -/** - * Restore regi2c analog calibration related configuration registers. - * This is a workaround, and is fixed on later chips - */ -#if REGI2C_ANA_CALI_PD_WORKAROUND -void regi2c_analog_cali_reg_read(void); -void regi2c_analog_cali_reg_write(void); -#endif //#if ADC_CALI_PD_WORKAROUND - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_hw_support/port/esp32s3/rtc_clk.c b/components/esp_hw_support/port/esp32s3/rtc_clk.c index 13c942ba72cd..9d8358123c80 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_clk.c +++ b/components/esp_hw_support/port/esp32s3/rtc_clk.c @@ -22,6 +22,8 @@ #include "soc/system_reg.h" #include "esp_rom_sys.h" #include "regi2c_ctrl.h" +#include "regi2c_dig_reg.h" +#include "regi2c_bbpll.h" #include "esp_hw_log.h" #include "rtc_clk_common.h" #include "hal/usb_serial_jtag_ll.h" diff --git a/components/esp_hw_support/port/esp32s3/rtc_init.c b/components/esp_hw_support/port/esp32s3/rtc_init.c index 523f83f498a5..3866a4b6820d 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_init.c +++ b/components/esp_hw_support/port/esp32s3/rtc_init.c @@ -15,7 +15,9 @@ #include "soc/extmem_reg.h" #include "soc/syscon_reg.h" #include "regi2c_ctrl.h" +#include "regi2c_lp_bias.h" #include "regi2c_ulp.h" +#include "regi2c_dig_reg.h" #include "esp_hw_log.h" #include "esp_err.h" #include "esp_attr.h" diff --git a/components/esp_hw_support/port/esp32s3/rtc_sleep.c b/components/esp_hw_support/port/esp32s3/rtc_sleep.c index 48f3e29fb56f..b279ca4cea6b 100644 --- a/components/esp_hw_support/port/esp32s3/rtc_sleep.c +++ b/components/esp_hw_support/port/esp32s3/rtc_sleep.c @@ -18,6 +18,7 @@ #include "soc/fe_reg.h" #include "soc/rtc.h" #include "regi2c_ctrl.h" +#include "regi2c_dig_reg.h" #include "soc/rtc.h" #define RTC_CNTL_MEM_FOLW_CPU (RTC_CNTL_SLOWMEM_FOLW_CPU | RTC_CNTL_FASTMEM_FOLW_CPU) diff --git a/components/esp_hw_support/regi2c_ctrl.c b/components/esp_hw_support/regi2c_ctrl.c index 5b263f7c3334..8401b7eceef1 100644 --- a/components/esp_hw_support/regi2c_ctrl.c +++ b/components/esp_hw_support/regi2c_ctrl.c @@ -4,18 +4,19 @@ * SPDX-License-Identifier: Apache-2.0 */ -#include "regi2c_ctrl.h" + #include "esp_attr.h" #include -#include -#include +#include "freertos/FreeRTOS.h" +#include "freertos/semphr.h" +#include "regi2c_ctrl.h" static portMUX_TYPE mux = portMUX_INITIALIZER_UNLOCKED; uint8_t IRAM_ATTR regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add) { portENTER_CRITICAL_ISR(&mux); - uint8_t value = i2c_read_reg_raw(block, host_id, reg_add); + uint8_t value = regi2c_read_reg_raw(block, host_id, reg_add); portEXIT_CRITICAL_ISR(&mux); return value; } @@ -23,7 +24,7 @@ uint8_t IRAM_ATTR regi2c_ctrl_read_reg(uint8_t block, uint8_t host_id, uint8_t r uint8_t IRAM_ATTR regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb) { portENTER_CRITICAL_ISR(&mux); - uint8_t value = i2c_read_reg_mask_raw(block, host_id, reg_add, msb, lsb); + uint8_t value = regi2c_read_reg_mask_raw(block, host_id, reg_add, msb, lsb); portEXIT_CRITICAL_ISR(&mux); return value; } @@ -31,14 +32,14 @@ uint8_t IRAM_ATTR regi2c_ctrl_read_reg_mask(uint8_t block, uint8_t host_id, uint void IRAM_ATTR regi2c_ctrl_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data) { portENTER_CRITICAL_ISR(&mux); - i2c_write_reg_raw(block, host_id, reg_add, data); + regi2c_write_reg_raw(block, host_id, reg_add, data); portEXIT_CRITICAL_ISR(&mux); } void IRAM_ATTR regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data) { portENTER_CRITICAL_ISR(&mux); - i2c_write_reg_mask_raw(block, host_id, reg_add, msb, lsb, data); + regi2c_write_reg_mask_raw(block, host_id, reg_add, msb, lsb, data); portEXIT_CRITICAL_ISR(&mux); } @@ -47,6 +48,7 @@ void IRAM_ATTR regi2c_ctrl_write_reg_mask(uint8_t block, uint8_t host_id, uint8_ * This is a workaround, and is fixed on later chips */ #if REGI2C_ANA_CALI_PD_WORKAROUND +#include "regi2c_saradc.h" static DRAM_ATTR uint8_t reg_val[REGI2C_ANA_CALI_BYTE_NUM]; diff --git a/components/esp_rom/CMakeLists.txt b/components/esp_rom/CMakeLists.txt index ad48f71bd190..bbe09bf84e5f 100644 --- a/components/esp_rom/CMakeLists.txt +++ b/components/esp_rom/CMakeLists.txt @@ -17,7 +17,8 @@ else() "patches/esp_rom_sys.c" "patches/esp_rom_uart.c" "patches/esp_rom_spiflash.c" - "patches/esp_rom_tjpgd.c") + "patches/esp_rom_tjpgd.c" + "patches/esp_rom_regi2c.c") list(APPEND private_required_comp soc hal) endif() diff --git a/components/esp_rom/esp32/ld/esp32.rom.api.ld b/components/esp_rom/esp32/ld/esp32.rom.api.ld index aa4df35afd35..bc6fa8339028 100644 --- a/components/esp_rom/esp32/ld/esp32.rom.api.ld +++ b/components/esp_rom/esp32/ld/esp32.rom.api.ld @@ -48,3 +48,8 @@ PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); PROVIDE ( esp_rom_spiflash_set_bp = esp_rom_spiflash_lock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); + +PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); +PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); +PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); +PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask ); diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld index 7c3d0145505a..ae2530eaadae 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld @@ -43,3 +43,8 @@ PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); PROVIDE( esp_rom_spiflash_attach = spi_flash_attach ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); + +PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); +PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); +PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); +PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask ); diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld index 1b422c62d024..7cb122d1c00f 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld @@ -44,4 +44,9 @@ PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set ); PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); -PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); +PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable ); + +PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); +PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); +PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); +PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask ); diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld b/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld index bf330173b7f0..4648d22f7569 100644 --- a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld +++ b/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld @@ -48,3 +48,8 @@ PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); + +PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); +PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); +PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); +PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask ); diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld b/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld index bf330173b7f0..4648d22f7569 100644 --- a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld +++ b/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld @@ -48,3 +48,8 @@ PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); + +PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); +PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); +PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); +PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask ); diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld index 82d2d853d90d..0ea0b477ef10 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld @@ -49,3 +49,8 @@ PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); PROVIDE( esp_rom_spiflash_attach = spi_flash_attach ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); + +PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); +PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); +PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); +PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask ); diff --git a/components/esp_rom/include/esp_rom_regi2c.h b/components/esp_rom/include/esp_rom_regi2c.h new file mode 100644 index 000000000000..2cf369eeccf9 --- /dev/null +++ b/components/esp_rom/include/esp_rom_regi2c.h @@ -0,0 +1,63 @@ +/* + * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * Espressif private functions. Not for peripherals. Don't use it in your app. + */ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Read internal register + * + * @param block Block of the register + * @param host_id Host of the register + * @param reg_add Address of the register + * @return uint8_t Register value + */ +uint8_t esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add); + +/** + * @brief Read internal register, in bits + * + * @param block Block of the register + * @param host_id Host of the register + * @param reg_add Address of the register + * @param msb MSB of the register + * @param lsb LSB of the register + * @return uint8_t Register value + */ +uint8_t esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); + +/** + * @brief Write internal register + * + * @param block Block of the register + * @param host_id Host of the register + * @param reg_add Address of the register + * @param data Value to write + */ +void esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); + +/** + * @brief Write internal register, in bits + * + * @param block Block of the register + * @param host_id Host of the register + * @param reg_add Address of the register + * @param msb MSB of the register + * @param lsb LSB of the register + * @param data Value to write + */ +void esp_rom_regi2c_write_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_rom/linker.lf b/components/esp_rom/linker.lf index 4bf5582eb22e..7d32babf92fa 100644 --- a/components/esp_rom/linker.lf +++ b/components/esp_rom/linker.lf @@ -2,3 +2,4 @@ archive: libesp_rom.a entries: esp_rom_spiflash (noflash) + esp_rom_regi2c (noflash) diff --git a/components/esp_hw_support/port/esp32s2/regi2c_ctrl.c b/components/esp_rom/patches/esp_rom_regi2c.c similarity index 87% rename from components/esp_hw_support/port/esp32s2/regi2c_ctrl.c rename to components/esp_rom/patches/esp_rom_regi2c.c index 9a37dfc6c3e7..73d7d842f0b3 100644 --- a/components/esp_hw_support/port/esp32s2/regi2c_ctrl.c +++ b/components/esp_rom/patches/esp_rom_regi2c.c @@ -1,13 +1,16 @@ /* - * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ -#include "soc/soc.h" +#include +#include "esp_bit_defs.h" #include "soc/syscon_reg.h" -#include "regi2c_ctrl.h" -#include "regi2c_brownout.h" +#include "esp_rom_caps.h" +#include "sdkconfig.h" + +#if CONFIG_IDF_TARGET_ESP32S2 #define I2C_RTC_WIFI_CLK_EN (SYSCON_WIFI_CLK_EN_REG) @@ -79,6 +82,11 @@ #define I2C_RTC_MAGIC_DEFAULT (0x1c40) +#define I2C_BOD 0x61 +#define I2C_BBPLL 0x66 +#define I2C_SAR_ADC 0X69 +#define I2C_APLL 0X6D + static void i2c_rtc_enable_block(uint8_t block) { REG_SET_FIELD(I2C_RTC_CONFIG0, I2C_RTC_MAGIC_CTRL, I2C_RTC_MAGIC_DEFAULT); @@ -100,7 +108,7 @@ static void i2c_rtc_enable_block(uint8_t block) } } -uint8_t i2c_rtc_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add) +uint8_t esp_rom_regi2c_read(uint8_t block, uint8_t host_id, uint8_t reg_add) { i2c_rtc_enable_block(block); @@ -111,7 +119,7 @@ uint8_t i2c_rtc_read_reg(uint8_t block, uint8_t host_id, uint8_t reg_add) return REG_GET_FIELD(I2C_RTC_CONFIG2, I2C_RTC_DATA); } -uint8_t i2c_rtc_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb) +uint8_t esp_rom_regi2c_read_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb) { assert(msb - lsb < 8); i2c_rtc_enable_block(block); @@ -124,7 +132,7 @@ uint8_t i2c_rtc_read_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, u return (uint8_t)((data >> lsb) & (~(0xFFFFFFFF << (msb - lsb + 1)))); } -void i2c_rtc_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data) +void esp_rom_regi2c_write(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data) { i2c_rtc_enable_block(block); @@ -136,7 +144,7 @@ void i2c_rtc_write_reg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t while (REG_GET_BIT(I2C_RTC_CONFIG2, I2C_RTC_BUSY)); } -void i2c_rtc_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data) +void esp_rom_regi2c_write_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data) { assert(msb - lsb < 8); i2c_rtc_enable_block(block); @@ -157,3 +165,4 @@ void i2c_rtc_write_reg_mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uin REG_WRITE(I2C_RTC_CONFIG2, temp); while (REG_GET_BIT(I2C_RTC_CONFIG2, I2C_RTC_BUSY)); } +#endif //CONFIG_IDF_TARGET_ESP32S2 diff --git a/components/hal/esp32c2/brownout_hal.c b/components/hal/esp32c2/brownout_hal.c index ea160a23ed5b..7c32faaeda72 100644 --- a/components/hal/esp32c2/brownout_hal.c +++ b/components/hal/esp32c2/brownout_hal.c @@ -8,7 +8,7 @@ #include "hal/brownout_hal.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" #include "regi2c_brownout.h" diff --git a/components/hal/esp32c2/include/hal/adc_ll.h b/components/hal/esp32c2/include/hal/adc_ll.h index 6d172f109372..7eb0848f116d 100644 --- a/components/hal/esp32c2/include/hal/adc_ll.h +++ b/components/hal/esp32c2/include/hal/adc_ll.h @@ -7,7 +7,6 @@ #include #include -#include "regi2c_ctrl.h" #include "esp_attr.h" #include "soc/adc_periph.h" @@ -18,6 +17,9 @@ #include "hal/misc.h" #include "hal/adc_types.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" + #ifdef __cplusplus extern "C" { #endif diff --git a/components/hal/esp32c3/brownout_hal.c b/components/hal/esp32c3/brownout_hal.c index 5dac36f067a8..7c32faaeda72 100644 --- a/components/hal/esp32c3/brownout_hal.c +++ b/components/hal/esp32c3/brownout_hal.c @@ -1,22 +1,14 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "hal/brownout_hal.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" #include "regi2c_brownout.h" diff --git a/components/hal/esp32c3/include/hal/adc_ll.h b/components/hal/esp32c3/include/hal/adc_ll.h index 38bdae9fe9bc..2956cc4d70cd 100644 --- a/components/hal/esp32c3/include/hal/adc_ll.h +++ b/components/hal/esp32c3/include/hal/adc_ll.h @@ -7,7 +7,6 @@ #include #include -#include "regi2c_ctrl.h" #include "esp_attr.h" #include "soc/adc_periph.h" @@ -18,6 +17,9 @@ #include "hal/misc.h" #include "hal/adc_types.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" + #ifdef __cplusplus extern "C" { #endif diff --git a/components/hal/esp32c3/include/hal/temperature_sensor_ll.h b/components/hal/esp32c3/include/hal/temperature_sensor_ll.h index 3d21f0555742..b4b65c138510 100644 --- a/components/hal/esp32c3/include/hal/temperature_sensor_ll.h +++ b/components/hal/esp32c3/include/hal/temperature_sensor_ll.h @@ -16,7 +16,8 @@ #include #include -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" #include "soc/apb_saradc_struct.h" #include "soc/soc.h" #include "soc/soc_caps.h" diff --git a/components/hal/esp32h2/brownout_hal.c b/components/hal/esp32h2/brownout_hal.c index f60410b4908a..70b55e7f5550 100644 --- a/components/hal/esp32h2/brownout_hal.c +++ b/components/hal/esp32h2/brownout_hal.c @@ -1,23 +1,15 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "hal/brownout_hal.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "regi2c_ctrl.h" #include "i2c_pmu.h" +#include "esp_private/regi2c_ctrl.h" #include "regi2c_brownout.h" diff --git a/components/hal/esp32h2/include/hal/adc_ll.h b/components/hal/esp32h2/include/hal/adc_ll.h index 2221f441f334..39d592c8cbad 100644 --- a/components/hal/esp32h2/include/hal/adc_ll.h +++ b/components/hal/esp32h2/include/hal/adc_ll.h @@ -7,7 +7,6 @@ #include #include -#include "regi2c_ctrl.h" #include "esp_attr.h" #include "soc/adc_periph.h" @@ -18,6 +17,9 @@ #include "soc/rtc_cntl_reg.h" #include "hal/misc.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" + #ifdef __cplusplus extern "C" { #endif diff --git a/components/hal/esp32h2/include/hal/temperature_sensor_ll.h b/components/hal/esp32h2/include/hal/temperature_sensor_ll.h index 64061adced61..a371d0ea88e4 100644 --- a/components/hal/esp32h2/include/hal/temperature_sensor_ll.h +++ b/components/hal/esp32h2/include/hal/temperature_sensor_ll.h @@ -16,7 +16,8 @@ #include #include -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" #include "soc/apb_saradc_struct.h" #include "soc/soc.h" #include "soc/soc_caps.h" diff --git a/components/hal/esp32s2/brownout_hal.c b/components/hal/esp32s2/brownout_hal.c index a09e1ea4eaf3..3b95074ee5de 100644 --- a/components/hal/esp32s2/brownout_hal.c +++ b/components/hal/esp32s2/brownout_hal.c @@ -1,22 +1,14 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "hal/brownout_hal.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" #include "regi2c_brownout.h" diff --git a/components/hal/esp32s2/include/hal/adc_ll.h b/components/hal/esp32s2/include/hal/adc_ll.h index 5e53ab2191f1..9ef2cb59884d 100644 --- a/components/hal/esp32s2/include/hal/adc_ll.h +++ b/components/hal/esp32s2/include/hal/adc_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -15,7 +15,8 @@ #include "soc/apb_saradc_reg.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" #ifdef __cplusplus extern "C" { diff --git a/components/hal/esp32s2/include/hal/temperature_sensor_ll.h b/components/hal/esp32s2/include/hal/temperature_sensor_ll.h index 223bdc4bde76..542bf6cf0c19 100644 --- a/components/hal/esp32s2/include/hal/temperature_sensor_ll.h +++ b/components/hal/esp32s2/include/hal/temperature_sensor_ll.h @@ -15,7 +15,8 @@ #pragma once #include -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" #include "soc/apb_saradc_struct.h" #include "soc/rtc_cntl_reg.h" #include "soc/sens_struct.h" diff --git a/components/hal/esp32s3/brownout_hal.c b/components/hal/esp32s3/brownout_hal.c index 99bd5e52bf86..567adf8accd1 100644 --- a/components/hal/esp32s3/brownout_hal.c +++ b/components/hal/esp32s3/brownout_hal.c @@ -1,22 +1,14 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "hal/brownout_hal.h" #include "soc/rtc_cntl_struct.h" #include "soc/rtc_cntl_reg.h" -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" #include "regi2c_brownout.h" diff --git a/components/hal/esp32s3/include/hal/adc_ll.h b/components/hal/esp32s3/include/hal/adc_ll.h index 15e0b15de6ce..e55569d43777 100644 --- a/components/hal/esp32s3/include/hal/adc_ll.h +++ b/components/hal/esp32s3/include/hal/adc_ll.h @@ -7,7 +7,6 @@ #include #include -#include "regi2c_ctrl.h" #include "soc/adc_periph.h" #include "hal/adc_types.h" @@ -18,6 +17,9 @@ #include "soc/rtc_cntl_reg.h" #include "hal/misc.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" + #ifdef __cplusplus extern "C" { #endif diff --git a/components/hal/esp32s3/include/hal/temperature_sensor_ll.h b/components/hal/esp32s3/include/hal/temperature_sensor_ll.h index f38ff685b10c..42e4cdd583a3 100644 --- a/components/hal/esp32s3/include/hal/temperature_sensor_ll.h +++ b/components/hal/esp32s3/include/hal/temperature_sensor_ll.h @@ -15,7 +15,8 @@ #pragma once #include -#include "regi2c_ctrl.h" +#include "esp_private/regi2c_ctrl.h" +#include "regi2c_saradc.h" #include "soc/apb_saradc_struct.h" #include "soc/rtc_cntl_reg.h" #include "soc/sens_struct.h" diff --git a/components/soc/esp32/include/soc/regi2c_defs.h b/components/soc/esp32/include/soc/regi2c_defs.h new file mode 100644 index 000000000000..1f7d121ae878 --- /dev/null +++ b/components/soc/esp32/include/soc/regi2c_defs.h @@ -0,0 +1,18 @@ +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include "esp_bit_defs.h" + +/* Analog function control register */ +#define ANA_CONFIG_REG 0x6000E044 +#define ANA_CONFIG_S (8) +#define ANA_CONFIG_M (0x3FF) +/* Clear to enable APLL */ +#define I2C_APLL_M (BIT(14)) +/* Clear to enable BBPLL */ +#define I2C_BBPLL_M (BIT(17)) diff --git a/components/soc/esp32c2/include/soc/regi2c_defs.h b/components/soc/esp32c2/include/soc/regi2c_defs.h new file mode 100644 index 000000000000..1dadf68bc190 --- /dev/null +++ b/components/soc/esp32c2/include/soc/regi2c_defs.h @@ -0,0 +1,36 @@ +/* + * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +#pragma once + +#include "esp_bit_defs.h" + +/* Analog function control register */ +#define I2C_MST_ANA_CONF0_REG 0x6000E040 +#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) +#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) + +#define ANA_CONFIG_REG 0x6000E044 +#define ANA_CONFIG_S (8) +#define ANA_CONFIG_M (0x3FF) + +#define ANA_I2C_SAR_FORCE_PD BIT(18) +#define ANA_I2C_BBPLL_M BIT(17) /* Clear to enable BBPLL */ +#define ANA_I2C_APLL_M BIT(14) /* Clear to enable APLL */ + + +#define ANA_CONFIG2_REG 0x6000E048 +#define ANA_CONFIG2_M BIT(18) + +#define ANA_I2C_SAR_FORCE_PU BIT(16) + +/** + * Restore regi2c analog calibration related configuration registers. + * This is a workaround, and is fixed on later chips + */ +#define REGI2C_ANA_CALI_PD_WORKAROUND 1 +#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/components/soc/esp32c3/include/soc/regi2c_defs.h b/components/soc/esp32c3/include/soc/regi2c_defs.h new file mode 100644 index 000000000000..1d0a803f8606 --- /dev/null +++ b/components/soc/esp32c3/include/soc/regi2c_defs.h @@ -0,0 +1,35 @@ +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include "esp_bit_defs.h" + +/* Analog function control register */ +#define I2C_MST_ANA_CONF0_REG 0x6000E040 +#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) +#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) + +#define ANA_CONFIG_REG 0x6000E044 +#define ANA_CONFIG_S (8) +#define ANA_CONFIG_M (0x3FF) + +#define ANA_I2C_SAR_FORCE_PD BIT(18) +#define ANA_I2C_BBPLL_M BIT(17) /* Clear to enable BBPLL */ +#define ANA_I2C_APLL_M BIT(14) /* Clear to enable APLL */ + + +#define ANA_CONFIG2_REG 0x6000E048 +#define ANA_CONFIG2_M BIT(18) + +#define ANA_I2C_SAR_FORCE_PU BIT(16) + +/** + * Restore regi2c analog calibration related configuration registers. + * This is a workaround, and is fixed on later chips + */ +#define REGI2C_ANA_CALI_PD_WORKAROUND 1 +#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/components/soc/esp32h2/include/soc/regi2c_defs.h b/components/soc/esp32h2/include/soc/regi2c_defs.h new file mode 100644 index 000000000000..c3786c5dd8b7 --- /dev/null +++ b/components/soc/esp32h2/include/soc/regi2c_defs.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +#pragma once + +#include "esp_bit_defs.h" + +/* Analog function control register */ +#define I2C_MST_ANA_CONF0_REG 0x6000E040 +#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) +#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) + +#define ANA_CONFIG_REG 0x6000E044 +#define ANA_CONFIG_S (8) +#define ANA_CONFIG_M (0x3FF) + +#define ANA_I2C_SAR_FORCE_PD BIT(18) +#define ANA_I2C_BBPLL_M BIT(17) /* Clear to enable BBPLL */ +#define ANA_I2C_APLL_M BIT(14) /* Clear to enable APLL */ + + +#define ANA_CONFIG2_REG 0x6000E048 +#define ANA_CONFIG2_M BIT(18) + +#define ANA_I2C_SAR_FORCE_PU BIT(16) diff --git a/components/soc/esp32s2/include/soc/regi2c_defs.h b/components/soc/esp32s2/include/soc/regi2c_defs.h new file mode 100644 index 000000000000..cc6a05b85aa4 --- /dev/null +++ b/components/soc/esp32s2/include/soc/regi2c_defs.h @@ -0,0 +1,30 @@ +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include "esp_bit_defs.h" + +/* Analog function control register */ +#define ANA_CONFIG_REG 0x6000E044 +#define ANA_CONFIG_S (8) +#define ANA_CONFIG_M (0x3FF) +/* Clear to enable APLL */ +#define I2C_APLL_M (BIT(14)) +/* Clear to enable BBPLL */ +#define I2C_BBPLL_M (BIT(17)) +/* Clear to enable SAR */ +#define I2C_SAR_M (BIT(18)) + +#define ANA_CONFIG2_REG 0x6000E048 +#define ANA_SAR_CFG2_M (BIT(16)) + +/** + * Restore regi2c analog calibration related configuration registers. + * This is a workaround, and is fixed on later chips + */ +#define REGI2C_ANA_CALI_PD_WORKAROUND 1 +#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/components/soc/esp32s3/include/soc/regi2c_defs.h b/components/soc/esp32s3/include/soc/regi2c_defs.h new file mode 100644 index 000000000000..6b97002c19f3 --- /dev/null +++ b/components/soc/esp32s3/include/soc/regi2c_defs.h @@ -0,0 +1,34 @@ +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include "esp_bit_defs.h" + +/* Analog function control register */ +#define I2C_MST_ANA_CONF0_REG 0x6000E040 +#define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) +#define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) + +#define ANA_CONFIG_REG 0x6000E044 +#define ANA_CONFIG_S (8) +#define ANA_CONFIG_M (0x3FF) +/* Clear to enable APLL */ +#define I2C_APLL_M (BIT(14)) +/* Clear to enable BBPLL */ +#define I2C_BBPLL_M (BIT(17)) +/* Clear to enable SAR */ +#define I2C_SAR_M (BIT(18)) + +#define ANA_CONFIG2_REG 0x6000E048 +#define ANA_SAR_CFG2_M (BIT(16)) + +/** + * Restore regi2c analog calibration related configuration registers. + * This is a workaround, and is fixed on later chips + */ +#define REGI2C_ANA_CALI_PD_WORKAROUND 1 +#define REGI2C_ANA_CALI_BYTE_NUM 8 diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index 7d1f663acdd6..efe46d3a40df 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -847,7 +847,6 @@ components/hal/esp32/include/hal/twai_ll.h components/hal/esp32/include/hal/uart_ll.h components/hal/esp32/interrupt_descriptor_table.c components/hal/esp32/touch_sensor_hal.c -components/hal/esp32c3/brownout_hal.c components/hal/esp32c3/hmac_hal.c components/hal/esp32c3/include/hal/adc_hal_conf.h components/hal/esp32c3/include/hal/aes_ll.h @@ -870,7 +869,6 @@ components/hal/esp32c3/include/hal/twai_ll.h components/hal/esp32c3/include/hal/uhci_ll.h components/hal/esp32c3/include/hal/usb_serial_jtag_ll.h components/hal/esp32c3/rtc_cntl_hal.c -components/hal/esp32h2/brownout_hal.c components/hal/esp32h2/hmac_hal.c components/hal/esp32h2/include/hal/adc_hal_conf.h components/hal/esp32h2/include/hal/aes_ll.h @@ -893,7 +891,6 @@ components/hal/esp32h2/include/hal/twai_ll.h components/hal/esp32h2/include/hal/uhci_ll.h components/hal/esp32h2/include/hal/uhci_types.h components/hal/esp32h2/include/hal/usb_serial_jtag_ll.h -components/hal/esp32s2/brownout_hal.c components/hal/esp32s2/cp_dma_hal.c components/hal/esp32s2/include/hal/adc_hal_conf.h components/hal/esp32s2/include/hal/aes_ll.h @@ -925,7 +922,6 @@ components/hal/esp32s2/include/hal/twai_ll.h components/hal/esp32s2/include/hal/usb_ll.h components/hal/esp32s2/interrupt_descriptor_table.c components/hal/esp32s2/touch_sensor_hal.c -components/hal/esp32s3/brownout_hal.c components/hal/esp32s3/include/hal/adc_hal_conf.h components/hal/esp32s3/include/hal/aes_ll.h components/hal/esp32s3/include/hal/gpspi_flash_ll.h diff --git a/tools/ci/check_public_headers_exceptions.txt b/tools/ci/check_public_headers_exceptions.txt index 90169d02f2a1..f5387ed2b052 100644 --- a/tools/ci/check_public_headers_exceptions.txt +++ b/tools/ci/check_public_headers_exceptions.txt @@ -104,7 +104,6 @@ components/esp_common/include/esp_compiler.h components/lwip/lwip/src/include/lwip/prot/nd6.h components/lwip/port/esp32/include/netif/dhcp_state.h components/soc/src/esp32/rtc_clk_common.h -components/esp_hw_support/port/esp32/regi2c_ctrl.h components/esp_rom/include/esp32/rom/sha.h components/esp_rom/include/esp32/rom/secure_boot.h components/esp_rom/include/esp32c3/rom/spi_flash.h