From 58b808ade705e9425d3ec60f510196cad7304025 Mon Sep 17 00:00:00 2001 From: Wilko Nienhaus Date: Tue, 11 Jul 2023 22:32:26 +0300 Subject: [PATCH] Fix sub_opcode for STO instruction As per ESP32-S2/S3 Technical Reference Manual, the sub_opcode for Automatic Storage Mode ST-OFFSET should be 3, not 2. See page 35, figure 1-11, of the ESP32-S2 TRM v1.1 (2022-09-23) as well as page 305, figure 2-11, of the ESP32-S3 TRM v1.3 (2023-07-04) --- gas/config/tc-esp32s2ulp.c | 2 +- gas/config/tc-esp32ulp_esp32s2.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gas/config/tc-esp32s2ulp.c b/gas/config/tc-esp32s2ulp.c index 3a57c93a4f63..cc6771a82b1b 100644 --- a/gas/config/tc-esp32s2ulp.c +++ b/gas/config/tc-esp32s2ulp.c @@ -1383,7 +1383,7 @@ INSTR_T esp32s2ulp_wr_mem_sti(int dst_reg, int src_reg) INSTR_T esp32s2ulp_wr_mem_offset(Expr_Node* offset) { int addr_val = EXPR_VALUE(offset); - unsigned int local_op = WR_MEM(0, 0, addr_val >> 2, 0, 0, 0, 0x2); + unsigned int local_op = WR_MEM(0, 0, addr_val >> 2, 0, 0, 0, 0x3); return conscode(gencode(local_op), Expr_Node_Gen_Reloc(offset, BFD_RELOC_ESP32S2ULP_WR_MEM)); } diff --git a/gas/config/tc-esp32ulp_esp32s2.c b/gas/config/tc-esp32ulp_esp32s2.c index 5adb9d19bfee..f81062ef9ffa 100644 --- a/gas/config/tc-esp32ulp_esp32s2.c +++ b/gas/config/tc-esp32ulp_esp32s2.c @@ -375,7 +375,7 @@ INSTR_T esp32ulp_wr_mem_sti_esp32s2(int dst_reg, int src_reg) INSTR_T esp32ulp_wr_mem_sto_esp32s2(Expr_Node* offset) { int addr_val = EXPR_VALUE(offset); - unsigned int local_op = WR_MEM(0, 0, addr_val >> 2, 0, 0, 0, 0x2); + unsigned int local_op = WR_MEM(0, 0, addr_val >> 2, 0, 0, 0, 0x3); return conscode(gencode(local_op), Expr_Node_Gen_Reloc(offset, BFD_RELOC_ESP32S2ULP_WR_MEM)); }