From 44ca2ee97650fb90e3754b72e64a3fdbadd445c9 Mon Sep 17 00:00:00 2001
From: Bert Melis <bertmelis@users.noreply.github.com>
Date: Mon, 19 Nov 2018 17:04:05 +0100
Subject: [PATCH] Fix uart TX flushing (#2029)

wait for FSM to return idle
---
 cores/esp32/esp32-hal-uart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c
index 1685430869b..11da14f6f85 100644
--- a/cores/esp32/esp32-hal-uart.c
+++ b/cores/esp32/esp32-hal-uart.c
@@ -333,7 +333,7 @@ void uartFlush(uart_t* uart)
     }
 
     UART_MUTEX_LOCK();
-    while(uart->dev->status.txfifo_cnt);
+    while(uart->dev->status.txfifo_cnt || uart->dev->status.st_utx_out);
 
     //Due to hardware issue, we can not use fifo_rst to reset uart fifo.
     //See description about UART_TXFIFO_RST and UART_RXFIFO_RST in <<esp32_technical_reference_manual>> v2.6 or later.