From 27e8e71217ad123736ebe10e6eb80e1079cd2a7b Mon Sep 17 00:00:00 2001
From: Erik Kluzek <erik@ucar.edu>
Date: Thu, 19 Oct 2023 01:58:18 -0600
Subject: [PATCH] Change cesm3_dev testlist to derecho

---
 cime_config/testdefs/testlist_clm.xml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/cime_config/testdefs/testlist_clm.xml b/cime_config/testdefs/testlist_clm.xml
index fd78a20dd5..8244ed8883 100644
--- a/cime_config/testdefs/testlist_clm.xml
+++ b/cime_config/testdefs/testlist_clm.xml
@@ -55,7 +55,7 @@
   </test>
   <test name="ERP_D_Ld9" grid="ne30np4.pg3" compset="I1850Clm51BgcCrop" testmods="clm/clm51cam6lndTuningMode">
     <machines>
-      <machine name="cheyenne" compiler="intel" category="cesm3_dev"/>
+      <machine name="derecho" compiler="intel" category="cesm3_dev"/>
     </machines>
     <options>
       <option name="wallclock">00:20:00</option>
@@ -64,7 +64,7 @@
   </test>
   <test name="ERI_D" grid="ne30np4.pg3" compset="I1850Clm51BgcCrop" testmods="clm/clm51cam6lndTuningMode">
     <machines>
-      <machine name="cheyenne" compiler="intel" category="cesm3_dev"/>
+      <machine name="derecho" compiler="intel" category="cesm3_dev"/>
     </machines>
     <options>
       <option name="wallclock">00:20:00</option>
@@ -73,7 +73,7 @@
   </test>
   <test name="SMS_Lm1" grid="ne30np4.pg3" compset="I1850Clm51BgcCrop" testmods="clm/clm51cam6lndTuningMode">
     <machines>
-      <machine name="cheyenne" compiler="intel" category="cesm3_dev"/>
+      <machine name="derecho" compiler="intel" category="cesm3_dev"/>
     </machines>
     <options>
       <option name="wallclock">00:20:00</option>