diff --git a/runtime/bcutil/ROMClassBuilder.cpp b/runtime/bcutil/ROMClassBuilder.cpp
index e817d322378..0190718ac6f 100644
--- a/runtime/bcutil/ROMClassBuilder.cpp
+++ b/runtime/bcutil/ROMClassBuilder.cpp
@@ -1180,7 +1180,7 @@ ROMClassBuilder::finishPrepareAndLaydown(
  *                           + AccRecord
  *                          + AccClassAnonClass
  *
- *                        + AccSynthetic (matches Oracle modifier position)
+ *                        + UNUSED
  *                       + AccClassUseBisectionSearch
  *                      + AccClassInnerClass
  *                     + J9AccClassHidden
@@ -1299,12 +1299,6 @@ ROMClassBuilder::computeExtraModifiers(ClassFileOracle *classFileOracle, ROMClas
 		}
 	}
 
-	if ( classFileOracle->isSynthetic() ) {
-		/* handle the synthetic attribute. In java 1.5 synthetic may be specified in the access flags as well so do not unset bit here */
-		// Trc_BCU_createRomClassEndian_Synthetic(romClass);
-		modifiers |= J9AccSynthetic;
-	}
-
 	if (classFileOracle->hasClinit()) {
 		modifiers |= J9AccClassHasClinit;
 	}
diff --git a/runtime/bcutil/j9bcu.tdf b/runtime/bcutil/j9bcu.tdf
index bd7052481bd..a1a905cf3b1 100644
--- a/runtime/bcutil/j9bcu.tdf
+++ b/runtime/bcutil/j9bcu.tdf
@@ -76,7 +76,7 @@ TraceException=Trc_BCU_createRomClassEndian_CopyMethodsError Noenv Overhead=1 Le
 TraceException=Trc_BCU_createRomClassEndian_CopyCPShapeError Noenv Overhead=1 Level=3 Template="BCU j9bcutil_createROMClassEndian: error occurred during copyCPShapeAndPreinitDataToROM. error=%d"
 TraceException=Trc_BCU_createRomClassEndian_AnnotationError2 Noenv Overhead=1 Level=3 Template="BCU j9bcutil_createROMClassEndian: error occurred during buildAnnotationInfo. error=%d"
 TraceException=Trc_BCU_createRomClassEndian_DebugInfoError2 Noenv Overhead=1 Level=3 Template="BCU j9bcutil_createROMClassEndian: error occurred during buildDebugInfo. error=%d"
-TraceEvent=Trc_BCU_createRomClassEndian_Synthetic Noenv Overhead=1 Level=3 Template="BCU j9bcutil_createROMClassEndian: Setting J9AccSynthetic flag on ROMClass %p"
+TraceEvent=Trc_BCU_createRomClassEndian_Synthetic Obsolete Noenv Overhead=1 Level=3 Template="BCU j9bcutil_createROMClassEndian: Setting J9AccSynthetic flag on ROMClass %p"
 TraceException=Trc_BCU_createRomClassEndian_StoreOptionalError Noenv Overhead=1 Level=3 Template="BCU j9bcutil_createROMClassEndian: error occurred during storeOptionalData. error=%d"
 
 TraceEntry=Trc_BCU_allocTranslationBuffers_Entry Noenv Overhead=1 Level=3 Template="BCU j9bcutil_allocTranslationBuffers: entering with maxInternTreeSize=%d"