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JIT: fix gc hole in peephole optimizations #78074

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Nov 9, 2022
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JIT: fix gc hole in peephole optimizations #78074

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2997b19
JIT: fix gc hole in peephole optimizations
AndyAyersMS Nov 8, 2022
6053fff
revise per feedback
AndyAyersMS Nov 9, 2022
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7 changes: 7 additions & 0 deletions src/coreclr/jit/emit.h
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Original file line number Diff line number Diff line change
Expand Up @@ -2180,6 +2180,13 @@ class emitter

instrDesc* emitLastIns;

// Check if a peephole opt involving emitLastIns is unsafe
// emitForceNewIG here prevents peepholes from crossing nogc boundaries.
bool emitCannotPeepholeLastIns()
{
return emitForceNewIG || ((emitCurIGinsCnt == 0) && ((emitCurIG->igFlags & IGF_EXTEND) == 0));
}
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#ifdef TARGET_ARMARCH
instrDesc* emitLastMemBarrier;
#endif
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10 changes: 4 additions & 6 deletions src/coreclr/jit/emitarm64.cpp
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Expand Up @@ -15957,7 +15957,7 @@ bool emitter::IsRedundantMov(instruction ins, emitAttr size, regNumber dst, regN
return false;
}

const bool isFirstInstrInBlock = (emitCurIGinsCnt == 0) && ((emitCurIG->igFlags & IGF_EXTEND) == 0);
const bool canOptimize = !emitCannotPeepholeLastIns();

if (dst == src)
{
Expand All @@ -15977,7 +15977,7 @@ bool emitter::IsRedundantMov(instruction ins, emitAttr size, regNumber dst, regN
else if (isGeneralRegisterOrSP(dst) && (size == EA_4BYTE))
{
// See if the previous instruction already cleared upper 4 bytes for us unintentionally
if (!isFirstInstrInBlock && (emitLastIns != nullptr) && (emitLastIns->idReg1() == dst) &&
if (canOptimize && (emitLastIns != nullptr) && (emitLastIns->idReg1() == dst) &&
(emitLastIns->idOpSize() == size) && emitLastIns->idInsIs(INS_ldr, INS_ldrh, INS_ldrb))
{
JITDUMP("\n -- suppressing mov because ldr already cleared upper 4 bytes\n");
Expand All @@ -15986,7 +15986,7 @@ bool emitter::IsRedundantMov(instruction ins, emitAttr size, regNumber dst, regN
}
}

if (!isFirstInstrInBlock && // Don't optimize if instruction is not the first instruction in IG.
if (canOptimize && // Don't optimize if instruction is not the first instruction in IG.
(emitLastIns != nullptr) &&
(emitLastIns->idIns() == INS_mov) && // Don't optimize if last instruction was not 'mov'.
(emitLastIns->idOpSize() == size)) // Don't optimize if operand size is different than previous instruction.
Expand Down Expand Up @@ -16065,9 +16065,7 @@ bool emitter::IsRedundantMov(instruction ins, emitAttr size, regNumber dst, regN
bool emitter::IsRedundantLdStr(
instruction ins, regNumber reg1, regNumber reg2, ssize_t imm, emitAttr size, insFormat fmt)
{
bool isFirstInstrInBlock = (emitCurIGinsCnt == 0) && ((emitCurIG->igFlags & IGF_EXTEND) == 0);

if (((ins != INS_ldr) && (ins != INS_str)) || (isFirstInstrInBlock) || (emitLastIns == nullptr))
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if (((ins != INS_ldr) && (ins != INS_str)) || emitCannotPeepholeLastIns())
{
return false;
}
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18 changes: 7 additions & 11 deletions src/coreclr/jit/emitxarch.cpp
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Expand Up @@ -489,7 +489,7 @@ bool emitter::AreUpper32BitsZero(regNumber reg)
// If there are no instructions in this IG, we can look back at
// the previous IG's instructions if this IG is an extension.
//
if ((emitCurIGinsCnt == 0) && ((emitCurIG->igFlags & IGF_EXTEND) == 0))
if (emitCannotPeepholeLastIns())
{
return false;
}
Expand Down Expand Up @@ -569,8 +569,7 @@ bool emitter::AreFlagsSetToZeroCmp(regNumber reg, emitAttr opSize, genTreeOps tr
return false;
}

// Don't look back across IG boundaries (possible control flow)
if (emitCurIGinsCnt == 0 && ((emitCurIG->igFlags & IGF_EXTEND) == 0))
if (emitCannotPeepholeLastIns())
{
return false;
}
Expand Down Expand Up @@ -653,7 +652,7 @@ bool emitter::AreFlagsSetForSignJumpOpt(regNumber reg, emitAttr opSize, GenTree*
}

// Don't look back across IG boundaries (possible control flow)
if (emitCurIGinsCnt == 0 && ((emitCurIG->igFlags & IGF_EXTEND) == 0))
if (emitCannotPeepholeLastIns())
{
return false;
}
Expand Down Expand Up @@ -5717,12 +5716,10 @@ bool emitter::IsRedundantMov(
return true;
}

bool isFirstInstrInBlock = (emitCurIGinsCnt == 0) && ((emitCurIG->igFlags & IGF_EXTEND) == 0);

// TODO-XArch-CQ: Certain instructions, such as movaps vs movups, are equivalent in
// functionality even if their actual identifier differs and we should optimize these

if (isFirstInstrInBlock || // Don't optimize if instruction is the first instruction in IG.
if (emitCannotPeepholeLastIns() || // Don't optimize if instruction is the first instruction in IG.
(emitLastIns == nullptr) || // or if a last instruction doesn't exist
(emitLastIns->idIns() != ins) || // or if the instruction is different from the last instruction
(emitLastIns->idOpSize() != size) || // or if the operand size is different from the last instruction
Expand Down Expand Up @@ -8410,13 +8407,10 @@ bool emitter::IsRedundantStackMov(instruction ins, insFormat fmt, emitAttr size,
return false;
}

bool hasSideEffect = HasSideEffect(ins, size);

bool isFirstInstrInBlock = (emitCurIGinsCnt == 0) && ((emitCurIG->igFlags & IGF_EXTEND) == 0);
// TODO-XArch-CQ: Certain instructions, such as movaps vs movups, are equivalent in
// functionality even if their actual identifier differs and we should optimize these

if (isFirstInstrInBlock || // Don't optimize if instruction is the first instruction in IG.
if (emitCannotPeepholeLastIns() || // Don't optimize if instruction is the first instruction in IG.
(emitLastIns == nullptr) || // or if a last instruction doesn't exist
(emitLastIns->idIns() != ins) || // or if the instruction is different from the last instruction
(emitLastIns->idOpSize() != size)) // or if the operand size is different from the last instruction
Expand All @@ -8434,6 +8428,8 @@ bool emitter::IsRedundantStackMov(instruction ins, insFormat fmt, emitAttr size,
int varNum = emitLastIns->idAddr()->iiaLclVar.lvaVarNum();
int lastOffs = emitLastIns->idAddr()->iiaLclVar.lvaOffset();

const bool hasSideEffect = HasSideEffect(ins, size);

// Check if the last instruction and current instructions use the same register and local memory.
if (varNum == varx && lastReg1 == ireg && lastOffs == offs)
{
Expand Down