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Fix LLC cache issue on Apple M1 #64576

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Feb 1, 2022
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9 changes: 8 additions & 1 deletion src/coreclr/pal/src/misc/sysinfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -613,9 +613,16 @@ PAL_GetLogicalProcessorCacheSizeFromOS()
{
int64_t cacheSizeFromSysctl = 0;
size_t sz = sizeof(cacheSizeFromSysctl);
const bool success = sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0
const bool success = false
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// macOS-arm64: Since macOS 12.0, Apple added ".perflevelX." to determinate cache sizes for efficiency
// and performance cores separetely. "perflevel0" stands for "performance"
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|| sysctlbyname("hw.perflevel0.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0
|| sysctlbyname("hw.perflevel0.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0
// macOS-arm64: these report cache sizes for efficiency cores only
|| sysctlbyname("hw.l3cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0
|| sysctlbyname("hw.l2cachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0
|| sysctlbyname("hw.l1dcachesize", &cacheSizeFromSysctl, &sz, nullptr, 0) == 0;

if (success)
{
_ASSERTE(cacheSizeFromSysctl > 0);
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