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JIT ARM64-SVE: add test coverage for *Faulting* cases to make sure inactive lanes are zeroed out (#105580) #106139

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@mikabl-arm mikabl-arm commented Aug 8, 2024

All *FirstFaulting* APIs pass the stress testing:

Output
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll GatherVectorFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Bases_double_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Bases_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Bases_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_float_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_float_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_double_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_double_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_ulong_ulong() : 13
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll LoadVectorFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_float() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_double() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_sbyte() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_short() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_byte() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_ushort() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_ulong() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll LoadVectorByteZeroExtendFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_short() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_ushort() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll LoadVectorUInt16ZeroExtendFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_ulong() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll LoadVectorUInt32ZeroExtendFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt32ZeroExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt32ZeroExtendFirstFaulting_ulong() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll LoadVectorInt16SignExtendFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_ulong() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll LoadVectorInt32SignExtendFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32SignExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32SignExtendFirstFaulting_ulong() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll LoadVectorSByteSignExtendFirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_short() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_ushort() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------

@dotnet-issue-labeler dotnet-issue-labeler bot added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Aug 8, 2024
@dotnet-policy-service dotnet-policy-service bot added the community-contribution Indicates that the PR has been added by a community member label Aug 8, 2024
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

@mikabl-arm
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@a74nh
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a74nh commented Aug 12, 2024

@tannergooding @kunalspathak - could you take a look please

@JulieLeeMSFT
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Fixes #105580.

where TMem : INumberBase<TMem>
where TElem : INumberBase<TElem>
{
for (var i = 0; i < firstOp.Length; i++)
TElem[] mask = new TElem[result.Length];
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can you please fix the alignment?

@@ -144,10 +144,11 @@ namespace JIT.HardwareIntrinsics.Arm
private static readonly int LargestVectorSize = {LargestVectorSize};

private static readonly int RetElementCount = Unsafe.SizeOf<{RetVectorType}<{RetBaseType}>>() / sizeof({RetBaseType});
private static readonly int Op1ElementCount = Unsafe.SizeOf<{Op1VectorType}<{Op1BaseType}>>() / sizeof({Op1BaseType});
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i was hoping to see similar validation in other FirstFaulting.template.

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The other two FirstFaulting templates we have at the moment are SveGatherVectorFirstFaultingVectorBases.template and SveGatherVectorFirstFaultingIndices.template. Both have a similar validation already. Please check usage of the following variables.

// Force op1 (mask) to have the first and last element to be active.

var op1 = {LoadIsa}.Load{Op1VectorType}(loadMask1, ({Op1BaseType}*)(_dataTable.inArray1Ptr));

You may also note that the ValidateFirstFaultingResult methods accept load masks as first parameter:

private void ValidateFirstFaultingResult({Op1BaseType}[] firstOp, {Op2BaseType}[] secondOp, {RetBaseType}[] result, Vector<{GetFfrType}> faultResult, [CallerMemberName] string method = "")

private void ValidateFirstFaultingResult({Op1BaseType}[] firstOp, {Op2BaseType}[] secondOp, {Op3BaseType}[] thirdOp, {RetBaseType}[] result, Vector<{GetFfrType}> faultResult, [CallerMemberName] string method = "")

@@ -8705,7 +8715,7 @@ public static ulong Splice(ulong[] first, ulong[] second, ulong[] maskArray, int
return false;
}

public static bool CheckLoadVectorFirstFaultingBehavior<TMem, TElem, TFault>(TMem[] firstOp, TElem[] result, Vector<TFault> faultResult)
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CheckLoadVectorFirstFaultingBehavior

fix the alignment here.

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I believe this comment doesn't reference the line you intended. Could you check?

@@ -8705,7 +8715,7 @@ public static ulong Splice(ulong[] first, ulong[] second, ulong[] maskArray, int
return false;
}

public static bool CheckLoadVectorFirstFaultingBehavior<TMem, TElem, TFault>(TMem[] firstOp, TElem[] result, Vector<TFault> faultResult)
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CheckLoadVectorFirstFaultingBehavior

shouldn't this be TFault.Zero? basically if mask is inactive then destination read is 0.

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I believe this comment doesn't reference the line you intended. Could you check?

{Op1VectorType}<{Op1BaseType}> loadMask = Sve.CreateTrueMask{Op1BaseType}(SveMaskPattern.All);
var op1 = {LoadIsa}.Load{Op1VectorType}(loadMask, ({Op1BaseType}*)(_dataTable.inArray1Ptr));

// Force op1 (mask) to have the first and last element to be active.
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any reason why this is needed?

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i still see this and was wondering why is it needed?

// Force loadMask to have the first and last element to be active.

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instead, you could use the Helpers.GetRandomMask*()

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@mikabl-arm mikabl-arm Aug 13, 2024

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This is required specifically for FirstFaulting APIs. The same was done for SveGatherVectorFirstFaulting by @TIHan here:

// Force op1 (mask) to have the first and last element to be active.

@@ -8518,20 +8518,30 @@ public static ulong Splice(ulong[] first, ulong[] second, ulong[] maskArray, int
}


private static TElem GetLoadVectorExpectedResultByIndex<TMem, TElem>(int index, TMem[] firstOp, TElem[] result)
private static TElem GetLoadVectorExpectedResultByIndex<TMem, TElem>(int index, TElem[] mask, TMem[] data, TElem[] result)
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GetLoadVectorExpectedResultByIndex

also, I did not entirely follow this. Basically if the caller is not passing mask, you are hoping that all lanes would be active? why is that?

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I believe this belongs to the following line, please fix me if this wasn't you intent: https://github.com/dotnet/runtime/pull/106139/files#diff-bb20484d905baf7f831f60e736751de79fffd6a4e09569cf0cfb86798104f7c4R8533

This is to support the public static bool CheckLoadVectorBehavior<TMem, TElem>(TMem[] data, TElem[] result) overload which is still used to validate results of some scenarios from SveLoadVectorFirstFaultingTest.template, i.e. RunBasicScenario_Load() or RunReflectionScenario_Load(). These scenarios populate the load mask with Sve.CreateTrueMask{RetBaseType}(SveMaskPattern.All). So yes, since this overload doesn't accept a mask parameter, it's implied that the mask is all active.

If the intent of #105580 was to make all scenarios in FirstFaulting templates including RunBasicScenario_Load() or RunReflectionScenario_Load() to use randomly populated masks, please let me know.

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If the intent of #105580 was to make all scenarios in FirstFaulting templates including RunBasicScenario_Load() or RunReflectionScenario_Load() to use randomly populated masks, please let me know.

The intent of #105580 is to make sure that inactive lanes does not fault (which we are already validating) and stays zero in destination. We should regardless use randomly populated mask, except at cases where it is restricted. The latr can be done as a follow-up PR.

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The intent of #105580 is to make sure that inactive lanes does not fault (which we are already validating) and stays zero in destination.

This is done by providing overloads for ValidateFirstFaultingResult() and helper methods which accept mask as a parameter.

We should regardless use randomly populated mask, except at cases where it is restricted.

This is done for RunBasicScenario_LoadFirstFaulting() from src/tests/JIT/HardwareIntrinsics/Arm/Shared/SveLoadVectorFirstFaultingTest.template by using _mask instead of Sve.CreateTrueMask{RetBaseType}(SveMaskPattern.All) in the method and populating it with Helpers.getMask*() instead of TestLibrary.Generator.Get*() (see the changes to src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs).

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All FirstFaulting APIs pass the stress testing:

I think it will be good to merge this PR once all the remaining FF APIs are implemented. With that, we will be able to get a final pass if this validation works on all FF APIs.

@kunalspathak kunalspathak added the arm-sve Work related to arm64 SVE/SVE2 support label Aug 13, 2024

if (mask[i] == TElem.Zero)
{
return TFault.One;
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if mask[i] == 0, shouldn't this lane should also be TFault.Zero?

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This part calculates the expected FFR value.

Inactive elements will not cause a read from Device memory or signal a fault, and are set to zero in the destination vector.

Since there's no fault, the FFR element is 1. You can check the pseudo code here: https://docsmirror.github.io/A64/2023-06/ldff1b_z_p_br.html

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ah, thanks for pointing it out.

TElem[] mask = new TElem[result.Length];
Array.Fill(mask, TElem.One);

return GetLoadVectorExpectedResultByIndex(index, mask, data, result);
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GetLoadVectorExpectedResultByIndex

The original test for this validation is little convulated and hence a bit hard to follow. But here, we are filling all mask and then calling a method that checks for mask[index] == TElem.Zero...wondering why can't we just skip calling GetLoadVectorExpectedResultByIndex and just do return TElem.CreateTruncating(data[index]) here?

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Using TElem.CreateTruncating(data[index]); leads to code duplication. Should one wish to change anything at TElem GetLoadVectorExpectedResultByIndex<TMem, TElem>(int index, TElem[] mask, TMem[] data, TElem[] result) they will have to add the change here as well which is not desirable or guaranteed.

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@mikabl-arm - since all APIs are implemented now, can you please run all the faulting test cases (including stress)?

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LGTM assuming all firstfaulting APIs stress test pass.

@JulieLeeMSFT
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Waiting confirmation from @mikabl-arm before we can merge.

@mikabl-arm - since all APIs are implemented now, can you please run all the faulting test cases (including stress)?

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@mikabl-arm - since all APIs are implemented now, can you please run all the faulting test cases (including stress)?

All FirstFaulting APIs pass the stress testing successfully.

Output
Starting test: /home/mikabl01/dotnet/runtime/artifacts/tests/coreclr/linux.arm64.Checked/Tests/Core_Root/corerun -p System.Reflection.Metadata.MetadataUpdater.IsSupported=false -p System.Runtime.Serialization.EnableUnsafeBinaryFormatterSerialization=true ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll FirstFaulting
===================Running default===================
------------------- {} -------------------
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Bases_double_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Bases_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Bases_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_float_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_float_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_double_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_double_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorFirstFaulting_Indices_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Indices_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Indices_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting_offsets_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32SignExtendFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32SignExtendFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32SignExtendFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32SignExtendFirstFaulting_Indices_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting_offsets_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting_offsets_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting_offsets_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting_offsets_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorSByteSignExtendFirstFaulting_Indices_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_int_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_int_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_long_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_uint_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_uint_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_ulong_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting_offsets_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Indices_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_int_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_int_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_long_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_uint_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_uint_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_ulong_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting_offsets_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_int_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_int_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_long_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_long_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_uint_int() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_uint_uint() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_ulong_long() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Indices_ulong_ulong() : 13
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Bases_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorByteZeroExtendFirstFaulting_Bases_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Bases_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorInt16SignExtendFirstFaulting_Bases_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Bases_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt16ZeroExtendFirstFaulting_Bases_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Bases_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorUInt32ZeroExtendFirstFaulting_Bases_ulong_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_float_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_uint_int() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_float_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_int_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_uint() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_double_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_ulong_long() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_double_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_long_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_GatherVectorWithByteOffsetFirstFaulting_ulong() : 16
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_short() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorByteZeroExtendFirstFaulting_ushort() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_float() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_double() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_sbyte() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_short() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_byte() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_ushort() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt16SignExtendFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32SignExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorInt32SignExtendFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_short() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorSByteSignExtendFirstFaulting_ushort() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_int() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_uint() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt16ZeroExtendFirstFaulting_ulong() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt32ZeroExtendFirstFaulting_long() : 9
Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_LoadVectorUInt32ZeroExtendFirstFaulting_ulong() : 9
===================Running jitstress===================
------------------- {'JitMinOpts': '1'} -------------------
------------------- {'JitStress': '1'} -------------------
------------------- {'JitStress': '2'} -------------------
------------------- {'JitStress': '1', 'TieredCompilation': '1'} -------------------
------------------- {'JitStress': '2', 'TieredCompilation': '1'} -------------------
------------------- {'TailcallStress': '1'} -------------------
------------------- {'ReadyToRun': '0'} -------------------
===================Running jitstressregs===================
------------------- {'JitStressRegs': '1'} -------------------
------------------- {'JitStressRegs': '2'} -------------------
------------------- {'JitStressRegs': '3'} -------------------
------------------- {'JitStressRegs': '4'} -------------------
------------------- {'JitStressRegs': '8'} -------------------
------------------- {'JitStressRegs': '0x10'} -------------------
------------------- {'JitStressRegs': '0x80'} -------------------
------------------- {'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStressRegs': '0x2000'} -------------------
===================Running jitstress2-jitstressregs===================
------------------- {'JitStress': '2', 'JitStressRegs': '1'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '2'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '3'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '4'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '8'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x10'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x80'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x1000'} -------------------
------------------- {'JitStress': '2', 'JitStressRegs': '0x2000'} -------------------

@JulieLeeMSFT , @kunalspathak , the PR is good to merge.

@JulieLeeMSFT
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@amanasifkhalid, CI tests are still running. Please merge after CI tests pass.

@amanasifkhalid amanasifkhalid merged commit 7d2c465 into dotnet:main Aug 14, 2024
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