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Test failure JIT/Directed/VectorABI/VectorMgdMgdStatic_r/VectorMgdMgdStatic_r.sh #68530
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Tagging subscribers to this area: @JulieLeeMSFT Issue DetailsRun: runtime-coreclr gcstress0x3-gcstress0xc 20220423.1 Failed test:
Error message:
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@dotnet/jit-contrib New GCStress=0xc Linux-arm64 failures |
I'll take a look. |
Somewhat annoyingly, these tests just get the wrong answers instead of failing / crashing. |
Ok, I can repro (on Mac M1) with
The issue seems to be that in runtime/src/tests/JIT/Directed/VectorABI/VectorMgdMgd.cs Lines 638 to 653 in cb10ed9
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At first glance this bit of codegen in
We have a byref in |
Suspect this is related to #68085. Will debug and see what the jit is doing here. |
We get into this strech of code with runtime/src/coreclr/jit/codegenarmarch.cpp Lines 2925 to 2935 in cb10ed9
and as a result, decide to subtract Subtracting |
Thanks Andy! I will investigate this further. |
#68451 is almost certainly the same underlying issue. |
I was able to repro this on windows arm64 and found this diff with changes done in #68085. Investigating furhter. |
This particular diff seems to generate correct adjustments and looks functionally correct. |
This logic present here is correct. It checks if the load/stores are encodable with given src/dst offsets. If it is not possible to encode either of load/store, it will use the offset of the one by which encoding was possible. In above assembly case, encoding of
May be there is a bug here where we should not allow the adjustment for |
You can't safely subtract from a byref unless you know for sure you will still be referencing the same object or that your byref is pointing into the stack. And you can't infer anything about alignment of a general byref + offset load from an offset unless you can also show the byref is pointing into the stack somehow and can compute the frame-relative offset). So I still think there is something flawed in the logic here and it only works/makes sense for stack references. |
Failed again in: runtime-coreclr gcstress0x3-gcstress0xc 20220508.1 Failed test:
Error message:
More failures |
Looks like this could happen even without having to use SIMD registers, but normal 8-byte register pairs as seen: ; V00 this [V00,T00] ( 3, 3 ) ref -> x0 this class-hnd single-def
; V01 arg1 [V01,T01] ( 3, 3 ) ref -> x1 class-hnd single-def
;# V02 OutArgs [V02 ] ( 1, 1 ) lclBlk ( 0) [sp+00H] "OutgoingArgSpace"
; V03 tmp1 [V03 ] ( 2, 4 ) struct (24) [fp+18H] do-not-enreg[XS] addr-exposed "by-value struct argument"
; V04 tmp2 [V04,T02] ( 2, 4 ) ref -> x1 single-def "argument with side effect"
;
; Lcl frame size = 32
G_M57316_IG01: ; gcrefRegs=0000 {}, byrefRegs=0000 {}, byref, nogc <-- Prolog IG
A9BD7BFD stp fp, lr, [sp,#-48]!
910003FD mov fp, sp
;; size=8 bbWeight=1 PerfScore 1.50
G_M57316_IG02: ; gcrefRegs=0003 {x0 x1}, byrefRegs=0000 {}, byref, nogc
; gcrRegs +[x0-x1]
91082002 add x2, x0, #520 ; <---- x0 is this
A9419043 ldp x3, x4, [x2,#24]
A90193A3 stp x3, x4, [fp,#24]
F9401443 ldr x3, [x2,#40]
F90017A3 str x3, [fp,#40]
;; size=20 bbWeight=1 PerfScore 9.50
G_M57316_IG03: ; , extend
AA0103E0 mov x0, x1
910063A1 add x1, fp, #24
; gcrRegs -[x1]
; byrRegs +[x1]
D29F8002 movz x2, #0xfc00
F2B4FE42 movk x2, #0xa7f2 LSL #16
F2CFFEE2 movk x2, #0x7ff7 LSL #32
F9400042 ldr x2, [x2]
D63F0040 blr x2
; gcrRegs -[x0]
; byrRegs -[x1]
;; size=28 bbWeight=1 PerfScore 6.50
G_M57316_IG04: ; , epilog, nogc, extend
A8C37BFD ldp fp, lr, [sp],#48
D65F03C0 ret lr
;; size=8 bbWeight=1 PerfScore 2.00 |
Failed again in: runtime-coreclr gcstress-extra 20220515.1 Failed test:
Error message:
or
More failures |
Run: runtime-coreclr gcstress0x3-gcstress0xc 20220423.1
Failed test:
Error message:
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