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ARM64: Optimize redundant memory loads with mov #35141
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arch-arm64
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
memory model
issues associated with memory model
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CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
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NOTE: this opt should not be done for loads of "volatile" fields |
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Labels
arch-arm64
area-CodeGen-coreclr
CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI
memory model
issues associated with memory model
The 2nd load can be converted into
mov
which takes 2 fewer cycles thanldr
.I collected no. of such
ldr
pairs in framework libraries and found approx. 540 pairs in 300 methods.Details:
ldr_to_mov.txt
category:cq
theme:optimization
skill-level:intermediate
cost:small
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