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ARM64-SVE: Add support for Add Sve.GatherVectorUInt*ZeroExtendFirstFa…
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…ulting() (#105030)
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SwapnilGaikwad authored Aug 14, 2024
1 parent 6093112 commit f9c0846
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Showing 11 changed files with 1,557 additions and 47 deletions.
36 changes: 28 additions & 8 deletions src/coreclr/jit/gentree.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -26675,16 +26675,26 @@ bool GenTreeHWIntrinsic::OperIsMemoryLoad(GenTree** pAddr) const

case NI_Sve_GatherVector:
case NI_Sve_GatherVectorByteZeroExtend:
case NI_Sve_GatherVectorByteZeroExtendFirstFaulting:
case NI_Sve_GatherVectorFirstFaulting:
case NI_Sve_GatherVectorInt16SignExtend:
case NI_Sve_GatherVectorInt16SignExtendFirstFaulting:
case NI_Sve_GatherVectorInt16WithByteOffsetsSignExtend:
case NI_Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting:
case NI_Sve_GatherVectorInt32SignExtend:
case NI_Sve_GatherVectorInt32SignExtendFirstFaulting:
case NI_Sve_GatherVectorInt32WithByteOffsetsSignExtend:
case NI_Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting:
case NI_Sve_GatherVectorSByteSignExtend:
case NI_Sve_GatherVectorSByteSignExtendFirstFaulting:
case NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtend:
case NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt16ZeroExtend:
case NI_Sve_GatherVectorUInt16ZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtend:
case NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt32ZeroExtend:
case NI_Sve_GatherVectorUInt32ZeroExtendFirstFaulting:
case NI_Sve_GatherVectorWithByteOffsetFirstFaulting:
case NI_Sve_GatherVectorWithByteOffsets:
case NI_Sve_LoadVector:
Expand Down Expand Up @@ -26806,14 +26816,24 @@ bool GenTreeHWIntrinsic::OperIsMemoryLoad(GenTree** pAddr) const
{
#ifdef TARGET_ARM64
static_assert_no_msg(
AreContiguous(NI_Sve_GatherVector, NI_Sve_GatherVectorByteZeroExtend, NI_Sve_GatherVectorFirstFaulting,
NI_Sve_GatherVectorInt16SignExtend, NI_Sve_GatherVectorInt16WithByteOffsetsSignExtend,
NI_Sve_GatherVectorInt32SignExtend, NI_Sve_GatherVectorInt32WithByteOffsetsSignExtend,
NI_Sve_GatherVectorSByteSignExtend, NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtend,
NI_Sve_GatherVectorUInt16ZeroExtend, NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtend,
NI_Sve_GatherVectorUInt32ZeroExtend));
assert(varTypeIsI(addr) || (varTypeIsSIMD(addr) && ((intrinsicId >= NI_Sve_GatherVector) &&
(intrinsicId <= NI_Sve_GatherVectorUInt32ZeroExtend))));
AreContiguous(NI_Sve_GatherVector, NI_Sve_GatherVectorByteZeroExtend,
NI_Sve_GatherVectorByteZeroExtendFirstFaulting, NI_Sve_GatherVectorFirstFaulting,
NI_Sve_GatherVectorInt16SignExtend, NI_Sve_GatherVectorInt16SignExtendFirstFaulting,
NI_Sve_GatherVectorInt16WithByteOffsetsSignExtend,
NI_Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting,
NI_Sve_GatherVectorInt32SignExtend, NI_Sve_GatherVectorInt32SignExtendFirstFaulting,
NI_Sve_GatherVectorInt32WithByteOffsetsSignExtend,
NI_Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting,
NI_Sve_GatherVectorSByteSignExtend, NI_Sve_GatherVectorSByteSignExtendFirstFaulting,
NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtend,
NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting,
NI_Sve_GatherVectorUInt16ZeroExtend, NI_Sve_GatherVectorUInt16ZeroExtendFirstFaulting,
NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtend,
NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting,
NI_Sve_GatherVectorUInt32ZeroExtend, NI_Sve_GatherVectorUInt32ZeroExtendFirstFaulting));
assert(varTypeIsI(addr) ||
(varTypeIsSIMD(addr) && ((intrinsicId >= NI_Sve_GatherVector) &&
(intrinsicId <= NI_Sve_GatherVectorUInt32ZeroExtendFirstFaulting))));
#else
assert(varTypeIsI(addr));
#endif
Expand Down
10 changes: 10 additions & 0 deletions src/coreclr/jit/hwintrinsic.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2175,18 +2175,28 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
#elif defined(TARGET_ARM64)
case NI_Sve_GatherVector:
case NI_Sve_GatherVectorByteZeroExtend:
case NI_Sve_GatherVectorByteZeroExtendFirstFaulting:
case NI_Sve_GatherVectorFirstFaulting:
case NI_Sve_GatherVectorInt16SignExtend:
case NI_Sve_GatherVectorInt16SignExtendFirstFaulting:
case NI_Sve_GatherVectorInt16WithByteOffsetsSignExtend:
case NI_Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting:
case NI_Sve_GatherVectorInt32SignExtend:
case NI_Sve_GatherVectorInt32SignExtendFirstFaulting:
case NI_Sve_GatherVectorInt32WithByteOffsetsSignExtend:
case NI_Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting:
case NI_Sve_GatherVectorSByteSignExtend:
case NI_Sve_GatherVectorSByteSignExtendFirstFaulting:
case NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtend:
case NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt16ZeroExtend:
case NI_Sve_GatherVectorUInt16ZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtend:
case NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt32ZeroExtend:
case NI_Sve_GatherVectorWithByteOffsetFirstFaulting:
case NI_Sve_GatherVectorWithByteOffsets:
case NI_Sve_GatherVectorUInt32ZeroExtendFirstFaulting:
assert(varTypeIsSIMD(op3->TypeGet()));
if (numArgs == 3)
{
Expand Down
15 changes: 14 additions & 1 deletion src/coreclr/jit/hwintrinsiccodegenarm64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2114,7 +2114,17 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
break;
}

case NI_Sve_GatherVectorByteZeroExtendFirstFaulting:
case NI_Sve_GatherVectorFirstFaulting:
case NI_Sve_GatherVectorInt16SignExtendFirstFaulting:
case NI_Sve_GatherVectorInt16WithByteOffsetsSignExtendFirstFaulting:
case NI_Sve_GatherVectorInt32SignExtendFirstFaulting:
case NI_Sve_GatherVectorInt32WithByteOffsetsSignExtendFirstFaulting:
case NI_Sve_GatherVectorSByteSignExtendFirstFaulting:
case NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt16ZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting:
case NI_Sve_GatherVectorUInt32ZeroExtendFirstFaulting:
{
if (node->GetAuxiliaryType() == TYP_UNKNOWN)
{
Expand All @@ -2139,6 +2149,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
GetEmitter()->emitIns_R(INS_sve_wrffr, emitSize, op4Reg, opt);
}
}

FALLTHROUGH;
}
case NI_Sve_GatherVector:
Expand All @@ -2161,7 +2172,9 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
emitAttr baseSize = emitActualTypeSize(intrin.baseType);
bool isLoadingBytes =
((ins == INS_sve_ld1b) || (ins == INS_sve_ld1sb) || (ins == INS_sve_ldff1b) ||
(ins == INS_sve_ldff1sb) || (intrin.id == NI_Sve_GatherVectorWithByteOffsetFirstFaulting));
(ins == INS_sve_ldff1sb) || (intrin.id == NI_Sve_GatherVectorWithByteOffsetFirstFaulting) ||
(intrin.id == NI_Sve_GatherVectorUInt32WithByteOffsetsZeroExtendFirstFaulting) ||
(intrin.id == NI_Sve_GatherVectorUInt16WithByteOffsetsZeroExtendFirstFaulting));
insScalableOpts sopt = INS_SCALABLE_OPTS_NONE;

if (baseSize == EA_4BYTE)
Expand Down
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