From 516956a01fee9aa732b199012a6ea0bcc2bd789f Mon Sep 17 00:00:00 2001 From: Carol Eidt Date: Wed, 5 Feb 2020 08:00:02 -0800 Subject: [PATCH] Account for UpperVector saves in minRegs (#31773) When we use a jitStressRegs mode that limits the number of registers, we need to account for the UpperVectorSave. Fix #31727 --- src/coreclr/src/jit/lsrabuild.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/coreclr/src/jit/lsrabuild.cpp b/src/coreclr/src/jit/lsrabuild.cpp index 73a3b1b7ba9136..16ca5e288adf3a 100644 --- a/src/coreclr/src/jit/lsrabuild.cpp +++ b/src/coreclr/src/jit/lsrabuild.cpp @@ -1627,6 +1627,12 @@ void LinearScan::buildRefPositionsForNode(GenTree* tree, BasicBlock* block, Lsra { minRegCount++; } +#if FEATURE_PARTIAL_SIMD_CALLEE_SAVE + else if (newRefPosition->refType == RefTypeUpperVectorSave) + { + minRegCount++; + } +#endif if (newRefPosition->getInterval()->isSpecialPutArg) { minRegCount++;