This project intends to develop a set of parametric cells (PCells) for use in analog/digital integrated circuit design. Currently this is aimed at providing a base set of cells for baseband and RF design (momcaps, inductors, transformers, transistors etc.), but ideally there would be also more complex cells such as entire circuits (inverters, opamps etc.). For digital designs, a set of simple standard cells exists (nand, nor, not).
The key point of this framework is independency of any layout tool such as cadence virtuoso. In order to achieve this, the core generators are written in lua and generate platform-independent files describing the cell. In the layout tool the files are read and the actual shapes are drawn. For this, interfacing/exporting code is provided (currently for virtuoso, magic, gds, tikz (LaTeX) and svg; other interfaces are easy to add). A second important point for this project is technology independece. This is achieved by working in generic layers ('gate', 'metal1') and mapping that with (simple-to-write) layermaps.
The project supplies some technology files for skywater130, so you can directly test the setup. For the first run, you have to generate the main program by running
make
Now a file opc should have been generated. Run it as follows:
./opc --technology skywater130 --interface svg --cell basic/transistor
This produces the following image:
.
The only dependencies are a C compiler, as the lua interpreter is included in the repository. Most of the project is written in lua, only the main entry points and a few modules are written in C.
This project started as a way of designing pcells independently of SKILL/virtuoso and technologies, but I have shifted a bit my goals and am thinking of building some kind of pcell-text-based layout description/generator. There is still a lot of work to do and right now the best use of this project is as a pcell generator. Once I've really figured out how to do technology-independent pcells (which is already working a little bit), I will start thinking of connecting several cells and creating entire layouts.
Contributions of any kind are welcome and even wished for. I'm trying to add issues to github, but there's of course a lot more that needs to be worked on. The most helpful currently would be people working in different technologies figuring out how the pcells need to be built and how the technology translation has to work. I only have access to two technologies right now (three if you count skywater130, maybe four if you count freepdk45), so any information on that would be greatly appreciated. Furthermore I'm happy about pcell contributions as well as general code contributions. I'm also happy to know just what you are missing, if I find time I would be glad to implement that functionality.