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pm8001_hwi.c
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/*
* PMC-Sierra SPC 8001 SAS/SATA based host adapters driver
*
* Copyright (c) 2008-2009 USI Co., Ltd.
* All rights reserved.
* Copyright (c) 2010-2012 Xyratex International Inc.,
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions, and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* substantially similar to the "NO WARRANTY" disclaimer below
* ("Disclaimer") and any redistribution must be conditioned upon
* including a substantially similar Disclaimer requirement for further
* binary redistribution.
* 3. Neither the names of the above-listed copyright holders nor the names
* of any contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* Alternatively, this software may be distributed under the terms of the
* GNU General Public License ("GPL") version 2 as published by the Free
* Software Foundation.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES.
*
*/
#include <linux/slab.h>
#include <linux/stringify.h>
#include "pm8001_sas.h"
#include "pm8001_hwi.h"
#include "pm8001_chips.h"
#include "pm8001_ctl.h"
#include "istrimg.h"
#include "ilaimg.h"
#include "aap1img.h"
#include "iopimg.h"
#include <linux/firmware.h>
/**
* read_main_config_table - read the configure table and save it.
* @pm8001_ha: our hba card information
*/
static void read_main_config_table(struct pm8001_hba_info *pm8001_ha)
{
void __iomem *address = pm8001_ha->main_cfg_tbl_addr;
pm8001_ha->main_cfg_tbl.signature = pm8001_mr32(address, 0x00);
pm8001_ha->main_cfg_tbl.interface_rev = pm8001_mr32(address, 0x04);
pm8001_ha->main_cfg_tbl.firmware_rev = pm8001_mr32(address, 0x08);
pm8001_ha->main_cfg_tbl.max_out_io = pm8001_mr32(address, 0x0C);
pm8001_ha->main_cfg_tbl.max_sgl = pm8001_mr32(address, 0x10);
pm8001_ha->main_cfg_tbl.ctrl_cap_flag = pm8001_mr32(address, 0x14);
pm8001_ha->main_cfg_tbl.gst_offset = pm8001_mr32(address, 0x18);
pm8001_ha->main_cfg_tbl.inbound_queue_offset =
pm8001_mr32(address, MAIN_IBQ_OFFSET);
pm8001_ha->main_cfg_tbl.outbound_queue_offset =
pm8001_mr32(address, MAIN_OBQ_OFFSET);
pm8001_ha->main_cfg_tbl.hda_mode_flag =
pm8001_mr32(address, MAIN_HDA_FLAGS_OFFSET);
PM8001_INIT_DBG(pm8001_ha,
pm8001_printk("MAIN_HDA_FLAGS = 0x%x\n",
pm8001_ha->main_cfg_tbl.hda_mode_flag));
/* read analog Setting offset from the configuration table */
pm8001_ha->main_cfg_tbl.analog_setup_table_offset =
pm8001_mr32(address, MAIN_ANALOG_SETUP_OFFSET);
PM8001_INIT_DBG(pm8001_ha,
pm8001_printk("MAIN_ANALOG_SETUP_OFFSET = 0x%x\n",
pm8001_ha->main_cfg_tbl.analog_setup_table_offset));
/* read Error Dump Offset and Length */
pm8001_ha->main_cfg_tbl.fatal_err_dump_offset0 =
pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_OFFSET);
pm8001_ha->main_cfg_tbl.fatal_err_dump_length0 =
pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP0_LENGTH);
pm8001_ha->main_cfg_tbl.fatal_err_dump_offset1 =
pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_OFFSET);
pm8001_ha->main_cfg_tbl.fatal_err_dump_length1 =
pm8001_mr32(address, MAIN_FATAL_ERROR_RDUMP1_LENGTH);
}
/**
* read_general_status_table - read the general status table and save it.
* @pm8001_ha: our hba card information
*/
static void
read_general_status_table(struct pm8001_hba_info *pm8001_ha)
{
void __iomem *address = pm8001_ha->general_stat_tbl_addr;
pm8001_ha->gs_tbl.gst_len_mpistate = pm8001_mr32(address, 0x00);
pm8001_ha->gs_tbl.iq_freeze_state0 = pm8001_mr32(address, 0x04);
pm8001_ha->gs_tbl.iq_freeze_state1 = pm8001_mr32(address, 0x08);
pm8001_ha->gs_tbl.msgu_tcnt = pm8001_mr32(address, 0x0C);
pm8001_ha->gs_tbl.iop_tcnt = pm8001_mr32(address, 0x10);
pm8001_ha->gs_tbl.reserved = pm8001_mr32(address, 0x14);
pm8001_ha->gs_tbl.phy_state[0] = pm8001_mr32(address, 0x18);
pm8001_ha->gs_tbl.phy_state[1] = pm8001_mr32(address, 0x1C);
pm8001_ha->gs_tbl.phy_state[2] = pm8001_mr32(address, 0x20);
pm8001_ha->gs_tbl.phy_state[3] = pm8001_mr32(address, 0x24);
pm8001_ha->gs_tbl.phy_state[4] = pm8001_mr32(address, 0x28);
pm8001_ha->gs_tbl.phy_state[5] = pm8001_mr32(address, 0x2C);
pm8001_ha->gs_tbl.phy_state[6] = pm8001_mr32(address, 0x30);
pm8001_ha->gs_tbl.phy_state[7] = pm8001_mr32(address, 0x34);
pm8001_ha->gs_tbl.reserved1 = pm8001_mr32(address, 0x38);
pm8001_ha->gs_tbl.reserved2 = pm8001_mr32(address, 0x3C);
pm8001_ha->gs_tbl.reserved3 = pm8001_mr32(address, 0x40);
pm8001_ha->gs_tbl.recover_err_info[0] = pm8001_mr32(address, 0x44);
pm8001_ha->gs_tbl.recover_err_info[1] = pm8001_mr32(address, 0x48);
pm8001_ha->gs_tbl.recover_err_info[2] = pm8001_mr32(address, 0x4C);
pm8001_ha->gs_tbl.recover_err_info[3] = pm8001_mr32(address, 0x50);
pm8001_ha->gs_tbl.recover_err_info[4] = pm8001_mr32(address, 0x54);
pm8001_ha->gs_tbl.recover_err_info[5] = pm8001_mr32(address, 0x58);
pm8001_ha->gs_tbl.recover_err_info[6] = pm8001_mr32(address, 0x5C);
pm8001_ha->gs_tbl.recover_err_info[7] = pm8001_mr32(address, 0x60);
}
/**
* read_inbnd_queue_table - read the inbound queue table and save it.
* @pm8001_ha: our hba card information
*/
static void
read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha)
{
int inbQ_num = 1;
int i;
void __iomem *address = pm8001_ha->inbnd_q_tbl_addr;
for (i = 0; i < inbQ_num; i++) {
u32 offset = i * 0x20;
pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =
get_pci_bar_index(pm8001_mr32(address, (offset + 0x14)));
pm8001_ha->inbnd_q_tbl[i].pi_offset =
pm8001_mr32(address, (offset + 0x18));
}
}
/**
* read_outbnd_queue_table - read the outbound queue table and save it.
* @pm8001_ha: our hba card information
*/
static void
read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha)
{
int outbQ_num = 1;
int i;
void __iomem *address = pm8001_ha->outbnd_q_tbl_addr;
for (i = 0; i < outbQ_num; i++) {
u32 offset = i * 0x24;
pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =
get_pci_bar_index(pm8001_mr32(address, (offset + 0x14)));
pm8001_ha->outbnd_q_tbl[i].ci_offset =
pm8001_mr32(address, (offset + 0x18));
}
}
/**
* init_default_table_values - init the default table.
* @pm8001_ha: our hba card information
*/
static void
init_default_table_values(struct pm8001_hba_info *pm8001_ha)
{
int qn = 1;
int i;
u32 offsetib, offsetob;
void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr;
void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr;
pm8001_ha->main_cfg_tbl.inbound_q_nppd_hppd = 0;
pm8001_ha->main_cfg_tbl.outbound_hw_event_pid0_3 = 0;
pm8001_ha->main_cfg_tbl.outbound_hw_event_pid4_7 = 0;
pm8001_ha->main_cfg_tbl.outbound_ncq_event_pid0_3 = 0;
pm8001_ha->main_cfg_tbl.outbound_ncq_event_pid4_7 = 0;
pm8001_ha->main_cfg_tbl.outbound_tgt_ITNexus_event_pid0_3 = 0;
pm8001_ha->main_cfg_tbl.outbound_tgt_ITNexus_event_pid4_7 = 0;
pm8001_ha->main_cfg_tbl.outbound_tgt_ssp_event_pid0_3 = 0;
pm8001_ha->main_cfg_tbl.outbound_tgt_ssp_event_pid4_7 = 0;
pm8001_ha->main_cfg_tbl.outbound_tgt_smp_event_pid0_3 = 0;
pm8001_ha->main_cfg_tbl.outbound_tgt_smp_event_pid4_7 = 0;
pm8001_ha->main_cfg_tbl.upper_event_log_addr =
pm8001_ha->memoryMap.region[AAP1].phys_addr_hi;
pm8001_ha->main_cfg_tbl.lower_event_log_addr =
pm8001_ha->memoryMap.region[AAP1].phys_addr_lo;
pm8001_ha->main_cfg_tbl.event_log_size =
pm8001_ha->memoryMap.region[AAP1].total_len;
pm8001_ha->main_cfg_tbl.event_log_option =
pm8001_ha->logging_option;
pm8001_ha->main_cfg_tbl.upper_iop_event_log_addr =
pm8001_ha->memoryMap.region[IOP].phys_addr_hi;
pm8001_ha->main_cfg_tbl.lower_iop_event_log_addr =
pm8001_ha->memoryMap.region[IOP].phys_addr_lo;
pm8001_ha->main_cfg_tbl.iop_event_log_size =
pm8001_ha->memoryMap.region[IOP].total_len;
pm8001_ha->main_cfg_tbl.iop_event_log_option =
pm8001_ha->logging_option;
pm8001_ha->main_cfg_tbl.fatal_err_interrupt = 0x01;
for (i = 0; i < qn; i++) {
pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt =
PM8001_MPI_QUEUE | (64 << 16) | (0x00<<30);
pm8001_ha->inbnd_q_tbl[i].upper_base_addr =
pm8001_ha->memoryMap.region[IB].phys_addr_hi;
pm8001_ha->inbnd_q_tbl[i].lower_base_addr =
pm8001_ha->memoryMap.region[IB].phys_addr_lo;
pm8001_ha->inbnd_q_tbl[i].base_virt =
(u8 *)pm8001_ha->memoryMap.region[IB].virt_ptr;
pm8001_ha->inbnd_q_tbl[i].total_length =
pm8001_ha->memoryMap.region[IB].total_len;
pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr =
pm8001_ha->memoryMap.region[CI].phys_addr_hi;
pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr =
pm8001_ha->memoryMap.region[CI].phys_addr_lo;
pm8001_ha->inbnd_q_tbl[i].ci_virt =
pm8001_ha->memoryMap.region[CI].virt_ptr;
offsetib = i * 0x20;
pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =
get_pci_bar_index(pm8001_mr32(addressib,
(offsetib + 0x14)));
pm8001_ha->inbnd_q_tbl[i].pi_offset =
pm8001_mr32(addressib, (offsetib + 0x18));
pm8001_ha->inbnd_q_tbl[i].producer_idx = 0;
pm8001_ha->inbnd_q_tbl[i].consumer_index = 0;
}
for (i = 0; i < qn; i++) {
pm8001_ha->outbnd_q_tbl[i].element_size_cnt =
PM8001_MPI_QUEUE | (64 << 16) | (0x01<<30);
pm8001_ha->outbnd_q_tbl[i].upper_base_addr =
pm8001_ha->memoryMap.region[OB].phys_addr_hi;
pm8001_ha->outbnd_q_tbl[i].lower_base_addr =
pm8001_ha->memoryMap.region[OB].phys_addr_lo;
pm8001_ha->outbnd_q_tbl[i].base_virt =
(u8 *)pm8001_ha->memoryMap.region[OB].virt_ptr;
pm8001_ha->outbnd_q_tbl[i].total_length =
pm8001_ha->memoryMap.region[OB].total_len;
pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr =
pm8001_ha->memoryMap.region[PI].phys_addr_hi;
pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr =
pm8001_ha->memoryMap.region[PI].phys_addr_lo;
pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay =
0 | (10 << 16) | (0 << 24);
pm8001_ha->outbnd_q_tbl[i].pi_virt =
pm8001_ha->memoryMap.region[PI].virt_ptr;
offsetob = i * 0x24;
pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =
get_pci_bar_index(pm8001_mr32(addressob,
offsetob + 0x14));
pm8001_ha->outbnd_q_tbl[i].ci_offset =
pm8001_mr32(addressob, (offsetob + 0x18));
pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0;
pm8001_ha->outbnd_q_tbl[i].producer_index = 0;
}
}
/**
* pm8001_parse_nv - update the analog parameters for the HBA
* VERY LOOSE JSON compatible parse, supports a few user-induced
* illegal syntax but intuitive variances.
* In regex, we are looking for:
* \("\{0,1\}\)phy[-0-9]*[.]tx[.]\(swing\|drive\|emphasis\|edge\)\1
* [ \t\r\n]*[:=][ \t\r\n]*\("\{0,1\}\)[.0-9]*[a-zA-Z]*\3
* \("\{0,1\}\)phy[-0-9]*[.]wwn\1
* [ \t\r\n]*[:=][ \t\r\n]*\("\{0,1\}\)0x[0-9a-fA-F]*\3
* \("\{0,1\}\)phy[-0-9]*[.]wwn.override\1
* [ \t\r\n]*[:=]
* [ \t\r\n]*\("\{0,1\}\)\(true\|false\|1\|0\)\3
* NB: phy8 and phy9 are virtual settings that *may* be utilized in the
* future should the indexii be expanded.
* @pm8001_ha: our hba card information
*/
void
pm8001_parse_nv(struct pm8001_hba_info *pm8001_ha)
{
u32 length;
const char *cp;
char c, last = 0, hold, *msg, phy_msg[9];
u64 sas_addr = 0;
unsigned state;
u16 phy = 0;
if (request_firmware(&pm8001_ha->fw_image, "pm8001/pm8001.nv.json",
pm8001_ha->dev) != 0)
return;
length = pm8001_ha->fw_image->size;
cp = (const char *)pm8001_ha->fw_image->data;
state = 0;
while (length && (c = *cp)) {
switch (state) {
default:
state = 0;
/* FALLTHRU */
case 0:
if (c == 'p')
++state;
break;
case 1: /* p */
if (c == 'h')
++state;
else
state = 0;
break;
case 2: /* ph */
phy = 0;
if (c == 'y')
++state;
else
state = 0;
break;
case 3: /* phy */
if (('0' <= c) && (c <= '9')) {
phy |= 1 << (c - '0');
last = c;
} else if (c == '-') {
if ((phy == 0) && (last == 0))
last = '0';
if (last == 0)
state = 0;
else
++state;
} else if (c == '.') {
if (phy == 0)
phy = ~0;
state += 2;
} else
state = 0;
break;
case 4: /* phy#- */
if (('0' <= c) && (c <= '9')) {
while (++last <= c)
phy |= 1 << (last - '0');
--state;
last = 0;
} else if (c == '.') {
while (++last <= '9')
phy |= 1 << (last - '0');
++state;
} else
state = 0;
break;
case 5: /* phy#. */
if (c == 't')
++state;
else if (c == 'w')
state = 92;
else
state = 0;
break;
case 6: /* phy#.t */
if (c == 'x')
++state;
else
state = 0;
break;
case 7: /* phy#.tx */
if (c == '.')
++state;
else
state = 0;
break;
case 8: /* phy#.tx. */
if (c == 'g')
++state;
else
state = 0;
break;
case 9: /* phy#.tx.g */
if (c == '3')
++state;
else
state = 0;
break;
case 10: /* phy#.tx.g3 */
if (c == '.')
++state;
else
state = 0;
break;
case 11: /* phy#.tx.g3. {swing|drive|emphasis|edge} */
if (phy == 0) {
state = 0;
break;
}
msg = phy_msg;
last = 0;
hold = 0;
do {
if (phy & (1 << last))
switch (hold++) {
case 0:
*msg++ = last + '0';
break;
case 2:
*msg++ = '-';
break;
}
else {
if (hold >= 2)
*msg++ = last - 1 + '0';
hold = 0;
}
} while (++last < 10);
if (hold >= 2)
*msg++ = last - 1 + '0';
*msg = '\0';
if (c == 'e')
++state;
else if (c == 'd')
state = 41;
else if (c == 's')
state = 57;
else
state = 0;
break;
case 12: /* phy#.tx.g3.e */
if (c == 'm')
++state;
else if (c == 'd')
state = 32;
else
state = 0;
break;
case 13: /* phy#.tx.g3.em */
if (c == 'p')
++state;
else
state = 0;
break;
case 14: /* phy#.tx.g3.emp */
if (c == 'h')
++state;
else
state = 0;
break;
case 15: /* phy#.tx.g3.emph */
if (c == 'a')
++state;
else
state = 0;
break;
case 16: /* phy#.tx.g3.empha */
if (c == 's')
++state;
else
state = 0;
break;
case 17: /* phy#.tx.g3.emphas */
if (c == 'i')
++state;
else
state = 0;
break;
case 18: /* phy#.tx.g3.emphasi */
if (c == 's')
++state;
else
state = 0;
break;
case 19: /* phy#.tx.g3.emphasis */
if ((c == '"') || (c == ' ') || (c == '\t')
|| (c == '\r') || (c == '\n'))
++state;
else if ((c == ':') || (c == '='))
state += 2;
else
state = 0;
break;
case 20: /* "phy#.tx.g3.emphasis" */
if ((c == ':') || (c == '='))
++state;
else if ((c != ' ') && (c != '\t')
&& (c != '\r') && (c != '\n'))
state = 0;
break;
case 21: /* "phy#.tx.g3.emphasis":
{0|0.8|1.6|2.5|3.5|4.7|6.0|7.6|9.5|12.0|15.6|
21.6|squelch} */
if (c == '0')
++state;
else if (c == '.')
state += 2;
else if (c == '1')
state += 3;
else if (c == '2')
state += 4;
else if (c == '3')
state += 5;
else if (c == '4')
state += 6;
else if (c == '6')
state += 7;
else if (c == '7')
state += 8;
else if (c == '9')
state += 9;
else if (c == 's')
state += 10;
else if ((c != ' ') && (c != '\t') && (c != '"')
&& (c != '\r') && (c != '\n'))
state = 0;
break;
case 22: /* "phy#.tx.g3.emphasis":0 */
if (c == '.')
++state;
else if ((c == ' ') || (c == '\t') || (c == '\r')
|| (c == '\n') || (c == ',')) {
hold = t_mode_9_6_0dB;
msg = "0dB";
set_t_mode_9_6_sas_g3: PM8001_INIT_DBG(pm8001_ha,
pm8001_printk(
"\"phy%s.tx.g3.emphasis\":%s\n",
phy_msg, msg));
last = 0;
do {
union {
u32 u;
struct tx_g3 s;
} val;
if (!(phy & (1 << last)))
continue;
val.u = pm8001_mr32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table, tx_g3));
val.s.t_mode_9_6_sas_g3 = hold;
pm8001_mw32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table, tx_g3),
val.u);
} while (++last < 10);
state = 0;
} else
state = 0;
break;
case 23: /* "phy#.tx.g3.emphasis":0. */
if (c == '8') {
hold = t_mode_9_6_0_8dB;
msg = "0.8dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 24: /* "phy#.tx.g3.emphasis":1 */
if (c == '2') {
hold = t_mode_9_6_12_0dB;
msg = "12.0dB";
goto set_t_mode_9_6_sas_g3;
} else if (c == '5') {
hold = t_mode_9_6_15_6dB;
msg = "15.6dB";
goto set_t_mode_9_6_sas_g3;
} else if (c == '.') {
hold = t_mode_9_6_1_6dB;
msg = "1.6dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 25: /* "phy#.tx.g3.emphasis":2 */
if (c == '1') {
hold = t_mode_9_6_21_6dB;
msg = "21.6dB";
goto set_t_mode_9_6_sas_g3;
} else if (c == '.') {
hold = t_mode_9_6_2_5dB;
msg = "2.5dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 26: /* "phy#.tx.g3.emphasis":3 */
if (c == '.') {
hold = t_mode_9_6_3_5dB;
msg = "3.5dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 27: /* "phy#.tx.g3.emphasis":4 */
if (c == '.') {
hold = t_mode_9_6_4_7dB;
msg = "4.7dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 28: /* "phy#.tx.g3.emphasis":6 */
if (c == '.') {
hold = t_mode_9_6_6_0dB;
msg = "6.0dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 29: /* "phy#.tx.g3.emphasis":7 */
if (c == '.') {
hold = t_mode_9_6_7_6dB;
msg = "7.6dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 30: /* "phy#.tx.g3.emphasis":9 */
if (c == '.') {
hold = t_mode_9_6_9_5dB;
msg = "9.5dB";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 31: /* "phy#.tx.g3.emphasis":s */
if (c == 'q') {
hold = t_mode_9_6_squelch;
msg = "squelch";
goto set_t_mode_9_6_sas_g3;
} else
state = 0;
break;
case 32: /* phy#.tx.g3.ed */
if (c == 'g')
++state;
else
state = 0;
break;
case 33: /* phy#.tx.g3.edg */
if (c == 'e')
++state;
else
state = 0;
break;
case 34: /* phy#.tx.g3.edge */
if ((c == '"') || (c == ' ') || (c == '\t')
|| (c == '\r') || (c == '\n'))
++state;
else if ((c == ':') || (c == '='))
state += 2;
else
state = 0;
break;
case 35: /* "phy#.tx.g3.edge" */
if ((c == ':') || (c == '='))
++state;
else if ((c != ' ') && (c != '\t')
&& (c != '\r') && (c != '\n'))
state = 0;
break;
case 36: /* "phy#.tx.g3.edge": {57|68|82|97} */
if (c == '5')
++state;
else if (c == '6')
state += 2;
else if (c == '8')
state += 3;
else if (c == '9')
state += 4;
else if ((c != ' ') && (c != '\t') && (c != '"')
&& (c != '\r') && (c != '\n'))
state = 0;
break;
case 37: /* "phy#.tx.g3.edge":5 */
if (c == '7') {
hold = t_mode_1_0_57ps;
msg = "57";
set_t_mode_1_0_sas_g3: PM8001_INIT_DBG(pm8001_ha,
pm8001_printk(
"\"phy%s.tx.g3.edge\":%sps\n",
phy_msg, msg));
last = 0;
do {
union {
u32 u;
struct tx_cfg1 s;
} val;
if (!(phy & (1 << last)))
continue;
val.u = pm8001_mr32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table,
tx_cfg1));
val.s.t_mode_1_0_sas_g3 = hold;
pm8001_mw32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table,
tx_cfg1),
val.u);
} while (++last < 10);
state = 0;
} else
state = 0;
break;
case 38: /* "phy#.tx.g3.edge":6 */
if (c == '8') {
hold = t_mode_1_0_68ps;
msg = "68";
goto set_t_mode_1_0_sas_g3;
} else
state = 0;
break;
case 39: /* "phy#.tx.g3.edge":8 */
if (c == '2') {
hold = t_mode_1_0_82ps;
msg = "82";
goto set_t_mode_1_0_sas_g3;
} else
state = 0;
break;
case 40: /* "phy#.tx.g3.edge":9 */
if (c == '7') {
hold = t_mode_1_0_97ps;
msg = "97";
goto set_t_mode_1_0_sas_g3;
} else
state = 0;
break;
case 41: /* phy#.tx.g3.d */
if (c == 'r')
++state;
else
state = 0;
break;
case 42: /* phy#.tx.g3.dr */
if (c == 'i')
++state;
else
state = 0;
break;
case 43: /* phy#.tx.g3.dri */
if (c == 'v')
++state;
else
state = 0;
break;
case 44: /* phy#.tx.g3.driv */
if (c == 'e')
++state;
else
state = 0;
break;
case 45: /* phy#.tx.g3.drive */
if ((c == '"') || (c == ' ') || (c == '\t')
|| (c == '\r') || (c == '\n'))
++state;
else if ((c == ':') || (c == '='))
state += 2;
else
state = 0;
break;
case 46: /* "phy#.tx.g3.drive" */
if ((c == ':') || (c == '='))
++state;
else if ((c != ' ') && (c != '\t')
&& (c != '\r') && (c != '\n'))
state = 0;
break;
case 47: /* "phy#.tx.g3.drive": {60|70|80|90|100|110|120|130} */
if (c == '6')
++state;
else if (c == '7')
state += 2;
else if (c == '8')
state += 3;
else if (c == '9')
state += 4;
else if (c == '1')
state += 5;
else if ((c != ' ') && (c != '\t') && (c != '"')
&& (c != '\r') && (c != '\n'))
state = 0;
break;
case 48: /* "phy#.tx.g3.drive":6 */
if (c == '0') {
hold = (t_mode_15_60uA << 2) +
t_ctrl_7_6_60uA;
msg = "60";
set_t_mode_15_sas_g3: PM8001_INIT_DBG(pm8001_ha,
pm8001_printk(
"\"phy%s.tx.g3.drive\":%suA\n",
phy_msg, msg));
last = 0;
do {
union {
u32 u;
struct tx_cfg1 c;
struct tx_g3 s;
} val;
if (!(phy & (1 << last)))
continue;
val.u = pm8001_mr32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table,
tx_cfg1));
val.c.t_mode_15_sas_g3 = hold >> 2;
pm8001_mw32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table,
tx_cfg1),
val.u);
val.u = pm8001_mr32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table,
tx_g3));
val.s.t_ctrl_7_6_sas_g3 = hold & 3;
pm8001_mw32(
pm8001_ha->main_cfg_tbl_addr,
pm8001_ha->main_cfg_tbl.
analog_setup_table_offset +
(last * sizeof(struct
per_phy_analog_setup_table)) +
offsetof(struct
per_phy_analog_setup_table,
tx_g3),
val.u);
} while (++last < 10);
state = 0;
} else
state = 0;
break;
case 49: /* "phy#.tx.g3.drive":7 */
if (c == '0') {
hold = (t_mode_15_70uA << 2) +
t_ctrl_7_6_70uA;
msg = "70";
goto set_t_mode_15_sas_g3;
} else
state = 0;
break;
case 50: /* "phy#.tx.g3.drive":8 */
if (c == '0') {
hold = (t_mode_15_80uA << 2) +
t_ctrl_7_6_80uA;
msg = "80";
goto set_t_mode_15_sas_g3;
} else
state = 0;
break;
case 51: /* "phy#.tx.g3.drive":9 */
if (c == '0') {
hold = (t_mode_15_90uA << 2) +
t_ctrl_7_6_90uA;
msg = "90";
goto set_t_mode_15_sas_g3;
} else
state = 0;
break;
case 52: /* "phy#.tx.g3.drive":1 */
if (c == '0')
++state;
else if (c == '1')
state += 2;
else if (c == '2')
state += 3;
else if (c == '3')
state += 4;
else
state = 0;
break;
case 53: /* "phy#.tx.g3.drive":10 */
if (c == '0') {
hold = (t_mode_15_100uA << 2) +
t_ctrl_7_6_100uA;
msg = "100";
goto set_t_mode_15_sas_g3;
} else
state = 0;
break;
case 54: /* "phy#.tx.g3.drive":11 */
if (c == '0') {
hold = (t_mode_15_110uA << 2) +
t_ctrl_7_6_110uA;
msg = "110";
goto set_t_mode_15_sas_g3;
} else
state = 0;
break;
case 55: /* "phy#.tx.g3.drive":12 */
if (c == '0') {
hold = (t_mode_15_120uA << 2) +
t_ctrl_7_6_120uA;
msg = "120";
goto set_t_mode_15_sas_g3;
} else
state = 0;
break;
case 56: /* "phy#.tx.g3.drive":13 */
if (c == '0') {
hold = (t_mode_15_130uA << 2) +
t_ctrl_7_6_130uA;
msg = "130";
goto set_t_mode_15_sas_g3;
} else
state = 0;
break;
case 57: /* phy#.tx.g3.s */
if (c == 'w')
++state;
else
state = 0;
break;
case 58: /* phy#.tx.g3.sw */
if (c == 'i')
++state;
else
state = 0;
break;
case 59: /* phy#.tx.g3.swi */
if (c == 'n')
++state;
else
state = 0;
break;
case 60: /* phy#.tx.g3.swin */
if (c == 'g')
++state;
else
state = 0;
break;
case 61: /* phy#.tx.g3.swing */
if ((c == '"') || (c == ' ') || (c == '\t')
|| (c == '\r') || (c == '\n'))
++state;
else if ((c == ':') || (c == '='))
state += 2;
else
state = 0;
break;
case 62: /* "phy#.tx.g3.swing" */
if ((c == ':') || (c == '='))
++state;
else if ((c != ' ') && (c != '\t')
&& (c != '\r') && (c != '\n'))
state = 0;
break;
case 63: /* "phy#.tx.g3.swing":
{430|480|530|580|629|670|720|770|820|860|910|
1010|1100|1200|1350|1500} */
if (c == '4')
++state;
else if (c == '5')
state += 4;
else if (c == '6')
state += 7;
else if (c == '7')
state += 10;
else if (c == '8')
state += 13;
else if (c == '9')