Enable size specifications

[dvanhorn]

It's possible to specify the size of operands in nasm, but a86 does not allow this. This prevents being able to do some things like writing a literal to memory:

(Mov (Offset rbx) 99)

since it's unclear based on 99 how much memory should be written. The workaround is to move the literal to a register, which implicitly specifies the size. In nasm, you could just write:

mov [rbx], qword 99

It would be nice to be able to specify operand sizes. We could also have a qword default so that the first example would just work.

I'm not quite sure what the right approach is here. These are really not instruction-level annotations because you can have multiple size specifiers, e.g. mov word [dword 0x12345678], 0x9ABC moves 16 bits of data to an address given by a 32-bit offset.

We could provide "argument constructors" like qword, etc. So that the example would be (Mov (Offset rbx) (Qword 99)) and the Mov constructor could wrap the argument with the default if not given explicitly. So the latter example would be (Mov (Word (Offset (Dword #x12345678))) #x9ABC).