From 05f11eb41557f06eaba1a2645f61bf6208e887e3 Mon Sep 17 00:00:00 2001 From: mmusich Date: Thu, 26 Sep 2024 10:01:34 +0200 Subject: [PATCH] add a ticl_v5 variant for the phase-2 HLT timing menu workflow --- .../python/upgradeWorkflowComponents.py | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Configuration/PyReleaseValidation/python/upgradeWorkflowComponents.py b/Configuration/PyReleaseValidation/python/upgradeWorkflowComponents.py index 0267dcff74be8..2fbf9f1237601 100644 --- a/Configuration/PyReleaseValidation/python/upgradeWorkflowComponents.py +++ b/Configuration/PyReleaseValidation/python/upgradeWorkflowComponents.py @@ -2051,6 +2051,15 @@ def condition(self, fragment, stepList, key, hasHarvest): '--procModifiers': 'alpaka' } +upgradeWFs['HLTTiming75e33TiclV5'] = deepcopy(upgradeWFs['HLTTiming75e33']) +upgradeWFs['HLTTiming75e33TiclV5'].suffix = '_HLT75e33TimingTiclV5' +upgradeWFs['HLTTiming75e33TiclV5'].offset = 0.752 +upgradeWFs['HLTTiming75e33TiclV5'].step2 = { + '-s':'DIGI:pdigi_valid,L1TrackTrigger,L1,L1P2GT,DIGI2RAW,HLT:75e33_timing', + '--procModifiers': 'ticl_v5' +} + + class UpgradeWorkflow_HLTwDIGI75e33(UpgradeWorkflow): def setup_(self, step, stepName, stepDict, k, properties): if 'DigiTrigger' in step: