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Rvv test3
ci-clang-format #23: Pull request #9 synchronize by chenhy0106
June 18, 2024 07:58 8m 0s rvv_test3
June 18, 2024 07:58 8m 0s
Rvv test3
ci-clang-format #22: Pull request #9 opened by chenhy0106
June 18, 2024 07:50 50s rvv_test3
June 18, 2024 07:50 50s
i#6745: Fix timestamp gap in delayed tracing (#6746)
ci-clang-format #21: Commit 3af401b pushed by chenhy0106
June 17, 2024 09:11 8m 8s master
June 17, 2024 09:11 8m 8s
i#1569, i#3544 Port sample 'cbr' to AARCH64 and RISCV64.
ci-clang-format #20: Pull request #6 synchronize by ksco
June 17, 2024 09:00 8m 10s port_cbr
June 17, 2024 09:00 8m 10s
i#1569, i#3544 Port sample 'cbr' to AARCH64 and RISCV64.
ci-clang-format #19: Pull request #6 synchronize by chenhy0106
June 17, 2024 08:40 8m 18s port_cbr
June 17, 2024 08:40 8m 18s
Port cbr test
ci-clang-format #18: Pull request #8 opened by chenhy0106
June 4, 2024 04:50 7m 44s port_cbr_test
June 4, 2024 04:50 7m 44s
Port cbr test
ci-clang-format #17: Pull request #7 opened by chenhy0106
June 4, 2024 04:40 43s port_cbr_test
June 4, 2024 04:40 43s
i#1569, i#3544 Port sample 'cbr' to AARCH64 and RISCV64.
ci-clang-format #16: Pull request #6 opened by chenhy0106
June 3, 2024 13:35 8m 2s port_cbr
June 3, 2024 13:35 8m 2s
i#1569, i#3544 Port sample 'cbr' to AARCH64 and RISCV64.
ci-clang-format #15: Pull request #5 opened by chenhy0106
June 3, 2024 13:26 41s port_cbr
June 3, 2024 13:26 41s
i#1569, i#3544 Port sample 'cbr' to AARCH64 and RISCV64.
ci-clang-format #14: Pull request #4 opened by chenhy0106
June 3, 2024 13:14 41s port_cbr
June 3, 2024 13:14 41s
Support subclassing drmemtrace syscall_mix data (#6834)
ci-clang-format #13: Commit 8419c47 pushed by chenhy0106
June 3, 2024 06:56 7m 57s master
June 3, 2024 06:56 7m 57s
i#6822 unscheduled: Add unscheduled-input drmemtrace support (#6826)
ci-clang-format #12: Commit 7673d42 pushed by chenhy0106
May 30, 2024 07:55 8m 0s master
May 30, 2024 07:55 8m 0s
i#3544 RV64: Add docs on cross-compiling for RISCV64 on Linux (#6813)
ci-clang-format #11: Commit aea7bc0 pushed by chenhy0106
May 17, 2024 05:25 8m 9s master
May 17, 2024 05:25 8m 9s
i#3544 RV64: Add docs on cross-compiling for RISCV64 on Linux.
ci-clang-format #10: Pull request #3 synchronize by chenhy0106
May 17, 2024 04:42 9m 35s riscv_building_dox
May 17, 2024 04:42 9m 35s
i#3544 RV64: Add docs on cross-compiling for RISCV64 on Linux.
ci-clang-format #9: Pull request #3 reopened by chenhy0106
May 16, 2024 08:37 11m 43s riscv_building_dox
May 16, 2024 08:37 11m 43s
i#3544 RV64: Add docs on cross-compiling for RISCV64 on Linux.
ci-clang-format #8: Pull request #3 synchronize by chenhy0106
May 16, 2024 08:35 6m 23s riscv_building_dox
May 16, 2024 08:35 6m 23s
i#6660 dr$sim aliases: Add "-t drmemtrace" (#6811)
ci-clang-format #7: Commit a559edc pushed by chenhy0106
May 16, 2024 08:34 6m 58s master
May 16, 2024 08:34 6m 58s
i#3544 RV64: Add docs on cross-compiling for RISCV64 on Linux.
ci-clang-format #6: Pull request #3 synchronize by chenhy0106
May 16, 2024 08:32 1m 4s riscv_building_dox
May 16, 2024 08:32 1m 4s
i#3544 RV64: Add docs on cross-compiling for RISCV64 on Linux.
ci-clang-format #5: Pull request #3 opened by chenhy0106
May 14, 2024 08:09 7m 51s riscv_building_dox
May 14, 2024 08:09 7m 51s
i#3544 RV64 vector part1: Added vector extension encoder/decoder supp…
ci-clang-format #4: Commit f1ce1bc pushed by chenhy0106
May 14, 2024 07:42 8m 38s master
May 14, 2024 07:42 8m 38s
i#1551,i#1569,i#3544: Port sample 'cbr' to AARCHXX and RISCV64.
ci-clang-format #2: Pull request #1 opened by chenhy0106
May 13, 2024 10:27 5m 50s port_cbr_to_riscv64
May 13, 2024 10:27 5m 50s
i#3544 RV64: Optimize private memcpy and memset (#6800)
ci-clang-format #1: Commit ef1cd6f pushed by chenhy0106
May 13, 2024 10:06 7m 47s master
May 13, 2024 10:06 7m 47s