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m68kdasm.c
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m68kdasm.c
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/* ======================================================================== */
/* ========================= LICENSING & COPYRIGHT ======================== */
/* ======================================================================== */
/*
* MUSASHI
* Version 4.60
*
* A portable Motorola M680x0 processor emulation engine.
* Copyright Karl Stenerud. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/* ======================================================================== */
/* ================================ INCLUDES ============================== */
/* ======================================================================== */
#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include "m68k.h"
#ifndef DECL_SPEC
#define DECL_SPEC
#endif
/* ======================================================================== */
/* ============================ GENERAL DEFINES =========================== */
/* ======================================================================== */
/* Bit Isolation Functions */
#define BIT_0(A) ((A) & 0x00000001)
#define BIT_1(A) ((A) & 0x00000002)
#define BIT_2(A) ((A) & 0x00000004)
#define BIT_3(A) ((A) & 0x00000008)
#define BIT_4(A) ((A) & 0x00000010)
#define BIT_5(A) ((A) & 0x00000020)
#define BIT_6(A) ((A) & 0x00000040)
#define BIT_7(A) ((A) & 0x00000080)
#define BIT_8(A) ((A) & 0x00000100)
#define BIT_9(A) ((A) & 0x00000200)
#define BIT_A(A) ((A) & 0x00000400)
#define BIT_B(A) ((A) & 0x00000800)
#define BIT_C(A) ((A) & 0x00001000)
#define BIT_D(A) ((A) & 0x00002000)
#define BIT_E(A) ((A) & 0x00004000)
#define BIT_F(A) ((A) & 0x00008000)
#define BIT_10(A) ((A) & 0x00010000)
#define BIT_11(A) ((A) & 0x00020000)
#define BIT_12(A) ((A) & 0x00040000)
#define BIT_13(A) ((A) & 0x00080000)
#define BIT_14(A) ((A) & 0x00100000)
#define BIT_15(A) ((A) & 0x00200000)
#define BIT_16(A) ((A) & 0x00400000)
#define BIT_17(A) ((A) & 0x00800000)
#define BIT_18(A) ((A) & 0x01000000)
#define BIT_19(A) ((A) & 0x02000000)
#define BIT_1A(A) ((A) & 0x04000000)
#define BIT_1B(A) ((A) & 0x08000000)
#define BIT_1C(A) ((A) & 0x10000000)
#define BIT_1D(A) ((A) & 0x20000000)
#define BIT_1E(A) ((A) & 0x40000000)
#define BIT_1F(A) ((A) & 0x80000000)
/* These are the CPU types understood by this disassembler */
#define TYPE_68000 1
#define TYPE_68010 2
#define TYPE_68020 4
#define TYPE_68030 8
#define TYPE_68040 16
#define M68000_ONLY TYPE_68000
#define M68010_ONLY TYPE_68010
#define M68010_LESS (TYPE_68000 | TYPE_68010)
#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040)
#define M68020_ONLY TYPE_68020
#define M68020_LESS (TYPE_68010 | TYPE_68020)
#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040)
#define M68030_ONLY TYPE_68030
#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030)
#define M68030_PLUS (TYPE_68030 | TYPE_68040)
#define M68040_PLUS TYPE_68040
/* Extension word formats */
#define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)
#define EXT_FULL(A) BIT_8(A)
#define EXT_EFFECTIVE_ZERO(A) (((A)&0xe4) == 0xc4 || ((A)&0xe2) == 0xc0)
#define EXT_BASE_REGISTER_PRESENT(A) (!BIT_7(A))
#define EXT_INDEX_REGISTER_PRESENT(A) (!BIT_6(A))
#define EXT_INDEX_REGISTER(A) (((A)>>12)&7)
#define EXT_INDEX_PRE_POST(A) (EXT_INDEX_PRESENT(A) && (A)&3)
#define EXT_INDEX_PRE(A) (EXT_INDEX_PRESENT(A) && ((A)&7) < 4 && ((A)&7) != 0)
#define EXT_INDEX_POST(A) (EXT_INDEX_PRESENT(A) && ((A)&7) > 4)
#define EXT_INDEX_SCALE(A) (((A)>>9)&3)
#define EXT_INDEX_LONG(A) BIT_B(A)
#define EXT_INDEX_AR(A) BIT_F(A)
#define EXT_BASE_DISPLACEMENT_PRESENT(A) (((A)&0x30) > 0x10)
#define EXT_BASE_DISPLACEMENT_WORD(A) (((A)&0x30) == 0x20)
#define EXT_BASE_DISPLACEMENT_LONG(A) (((A)&0x30) == 0x30)
#define EXT_OUTER_DISPLACEMENT_PRESENT(A) (((A)&3) > 1 && ((A)&0x47) < 0x44)
#define EXT_OUTER_DISPLACEMENT_WORD(A) (((A)&3) == 2 && ((A)&0x47) < 0x44)
#define EXT_OUTER_DISPLACEMENT_LONG(A) (((A)&3) == 3 && ((A)&0x47) < 0x44)
/* Opcode flags */
#if M68K_COMPILE_FOR_MAME == OPT_ON
#define SET_OPCODE_FLAGS(x) g_opcode_type = x;
#define COMBINE_OPCODE_FLAGS(x) ((x) | g_opcode_type | DASMFLAG_SUPPORTED)
#else
#define SET_OPCODE_FLAGS(x)
#define COMBINE_OPCODE_FLAGS(X) (X)
#endif
/* ======================================================================== */
/* =============================== PROTOTYPES ============================= */
/* ======================================================================== */
/* Read data at the PC and increment PC */
unsigned read_imm_8(void);
unsigned read_imm_16(void);
unsigned read_imm_32(void);
/* Read data at the PC but don't imcrement the PC */
unsigned peek_imm_8(void);
unsigned peek_imm_16(void);
unsigned peek_imm_32(void);
/* make signed integers 100% portably */
static int make_int_8(int value);
static int make_int_16(int value);
static int make_int_32(int value);
/* make a string of a hex value */
static char* make_signed_hex_str_8(unsigned val);
static char* make_signed_hex_str_16(unsigned val);
static char* make_signed_hex_str_32(unsigned val);
/* make string of ea mode */
static char* get_ea_mode_str(unsigned instruction, unsigned size);
char* get_ea_mode_str_8(unsigned instruction);
char* get_ea_mode_str_16(unsigned instruction);
char* get_ea_mode_str_32(unsigned instruction);
/* make string of immediate value */
static char* get_imm_str_s(unsigned size);
static char* get_imm_str_u(unsigned size);
char* get_imm_str_s8(void);
char* get_imm_str_s16(void);
char* get_imm_str_s32(void);
/* Stuff to build the opcode handler jump table */
static void build_opcode_table(void);
static int valid_ea(unsigned opcode, unsigned mask);
static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);
/* used to build opcode handler jump table */
typedef struct
{
void (*opcode_handler)(void); /* handler function */
unsigned mask; /* mask on opcode */
unsigned match; /* what to match after masking */
unsigned ea_mask; /* what ea modes are allowed */
} opcode_struct;
/* ======================================================================== */
/* ================================= DATA ================================= */
/* ======================================================================== */
/* Opcode handler jump table */
static void (*g_instruction_table[0x10000])(void);
/* Flag if disassembler initialized */
static int g_initialized = 0;
/* Address mask to simulate address lines */
static unsigned g_address_mask = 0xffffffff;
static char g_dasm_str[100]; /* string to hold disassembly */
static char g_helper_str[100]; /* string to hold helpful info */
static unsigned g_cpu_pc; /* program counter */
static unsigned g_cpu_ir; /* instruction register */
static unsigned g_cpu_type;
static unsigned g_opcode_type;
static const unsigned char* g_rawop;
static unsigned g_rawbasepc;
/* used by ops like asr, ror, addq, etc */
static const unsigned g_3bit_qdata_table[8] = {8, 1, 2, 3, 4, 5, 6, 7};
static const unsigned g_5bit_data_table[32] =
{
32, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
};
static const char *const g_cc[16] =
{"t", "f", "hi", "ls", "cc", "cs", "ne", "eq", "vc", "vs", "pl", "mi", "ge", "lt", "gt", "le"};
static const char *const g_cpcc[64] =
{/* 000 001 010 011 100 101 110 111 */
"f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
"un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
"sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */
"ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
"?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
"?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
"?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
"?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
};
static const char *const g_mmuregs[8] =
{
"tc", "drp", "srp", "crp", "cal", "val", "sccr", "acr"
};
static const char *const g_mmucond[16] =
{
"bs", "bc", "ls", "lc", "ss", "sc", "as", "ac",
"ws", "wc", "is", "ic", "gs", "gc", "cs", "cc"
};
/* ======================================================================== */
/* =========================== UTILITY FUNCTIONS ========================== */
/* ======================================================================== */
#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \
if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \
{ \
if((g_cpu_ir & 0xf000) == 0xf000) \
d68000_1111(); \
else d68000_illegal(); \
return; \
}
static unsigned dasm_read_imm_8(unsigned advance)
{
unsigned result;
if (g_rawop)
result = g_rawop[g_cpu_pc + 1 - g_rawbasepc];
else
result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xff;
g_cpu_pc += advance;
return result;
}
static unsigned dasm_read_imm_16(unsigned advance)
{
unsigned result;
if (g_rawop)
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |
g_rawop[g_cpu_pc + 1 - g_rawbasepc];
else
result = m68k_read_disassembler_16(g_cpu_pc & g_address_mask) & 0xffff;
g_cpu_pc += advance;
return result;
}
static unsigned dasm_read_imm_32(unsigned advance)
{
unsigned result;
if (g_rawop)
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) |
(g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |
(g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |
g_rawop[g_cpu_pc + 3 - g_rawbasepc];
else
result = m68k_read_disassembler_32(g_cpu_pc & g_address_mask) & 0xffffffff;
g_cpu_pc += advance;
return result;
}
#define read_imm_8() dasm_read_imm_8(2)
#define read_imm_16() dasm_read_imm_16(2)
#define read_imm_32() dasm_read_imm_32(4)
#define peek_imm_8() dasm_read_imm_8(0)
#define peek_imm_16() dasm_read_imm_16(0)
#define peek_imm_32() dasm_read_imm_32(0)
/* Fake a split interface */
#define get_ea_mode_str_8(instruction) get_ea_mode_str(instruction, 0)
#define get_ea_mode_str_16(instruction) get_ea_mode_str(instruction, 1)
#define get_ea_mode_str_32(instruction) get_ea_mode_str(instruction, 2)
#define get_imm_str_s8() get_imm_str_s(0)
#define get_imm_str_s16() get_imm_str_s(1)
#define get_imm_str_s32() get_imm_str_s(2)
#define get_imm_str_u8() get_imm_str_u(0)
#define get_imm_str_u16() get_imm_str_u(1)
#define get_imm_str_u32() get_imm_str_u(2)
/* 100% portable signed int generators */
static int make_int_8(int value)
{
return (value & 0x80) ? value | ~0xff : value & 0xff;
}
static int make_int_16(int value)
{
return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
}
static int make_int_32(int value)
{
return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
}
/* Get string representation of hex values */
static char* make_signed_hex_str_8(unsigned val)
{
static char str[20];
val &= 0xff;
if(val == 0x80)
sprintf(str, "-$80");
else if(val & 0x80)
sprintf(str, "-$%x", (0-val) & 0x7f);
else
sprintf(str, "$%x", val & 0x7f);
return str;
}
static char* make_signed_hex_str_16(unsigned val)
{
static char str[20];
val &= 0xffff;
if(val == 0x8000)
sprintf(str, "-$8000");
else if(val & 0x8000)
sprintf(str, "-$%x", (0-val) & 0x7fff);
else
sprintf(str, "$%x", val & 0x7fff);
return str;
}
static char* make_signed_hex_str_32(unsigned val)
{
static char str[20];
val &= 0xffffffff;
if(val == 0x80000000)
sprintf(str, "-$80000000");
else if(val & 0x80000000)
sprintf(str, "-$%x", (0-val) & 0x7fffffff);
else
sprintf(str, "$%x", val & 0x7fffffff);
return str;
}
/* make string of immediate value */
static char* get_imm_str_s(unsigned size)
{
static char str[15];
if(size == 0)
sprintf(str, "#%s", make_signed_hex_str_8(read_imm_8()));
else if(size == 1)
sprintf(str, "#%s", make_signed_hex_str_16(read_imm_16()));
else
sprintf(str, "#%s", make_signed_hex_str_32(read_imm_32()));
return str;
}
static char* get_imm_str_u(unsigned size)
{
static char str[15];
if(size == 0)
sprintf(str, "#$%x", read_imm_8() & 0xff);
else if(size == 1)
sprintf(str, "#$%x", read_imm_16() & 0xffff);
else
sprintf(str, "#$%x", read_imm_32() & 0xffffffff);
return str;
}
/* Make string of effective address mode */
static char* get_ea_mode_str(unsigned instruction, unsigned size)
{
static char b1[64];
static char b2[64];
static char* mode = b2;
unsigned extension;
unsigned base;
unsigned outer;
char base_reg[4];
char index_reg[8];
unsigned preindex;
unsigned postindex;
unsigned comma = 0;
unsigned temp_value;
/* Switch buffers so we don't clobber on a double-call to this function */
mode = mode == b1 ? b2 : b1;
switch(instruction & 0x3f)
{
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
/* data register direct */
sprintf(mode, "D%d", instruction&7);
break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
/* address register direct */
sprintf(mode, "A%d", instruction&7);
break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
/* address register indirect */
sprintf(mode, "(A%d)", instruction&7);
break;
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
/* address register indirect with postincrement */
sprintf(mode, "(A%d)+", instruction&7);
break;
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
/* address register indirect with predecrement */
sprintf(mode, "-(A%d)", instruction&7);
break;
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
/* address register indirect with displacement*/
sprintf(mode, "(%s,A%d)", make_signed_hex_str_16(read_imm_16()), instruction&7);
break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
/* address register indirect with index */
extension = read_imm_16();
if(EXT_FULL(extension))
{
if(EXT_EFFECTIVE_ZERO(extension))
{
strcpy(mode, "0");
break;
}
base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
if(EXT_BASE_REGISTER_PRESENT(extension))
sprintf(base_reg, "A%d", instruction&7);
else
*base_reg = 0;
if(EXT_INDEX_REGISTER_PRESENT(extension))
{
sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
if(EXT_INDEX_SCALE(extension))
sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
}
else
*index_reg = 0;
preindex = (extension&7) > 0 && (extension&7) < 4;
postindex = (extension&7) > 4;
strcpy(mode, "(");
if(preindex || postindex)
strcat(mode, "[");
if(base)
{
strcat(mode, make_signed_hex_str_16(base));
comma = 1;
}
if(*base_reg)
{
if(comma)
strcat(mode, ",");
strcat(mode, base_reg);
comma = 1;
}
if(postindex)
{
strcat(mode, "]");
comma = 1;
}
if(*index_reg)
{
if(comma)
strcat(mode, ",");
strcat(mode, index_reg);
comma = 1;
}
if(preindex)
{
strcat(mode, "]");
comma = 1;
}
if(outer)
{
if(comma)
strcat(mode, ",");
strcat(mode, make_signed_hex_str_16(outer));
}
strcat(mode, ")");
break;
}
if(EXT_8BIT_DISPLACEMENT(extension) == 0)
sprintf(mode, "(A%d,%c%d.%c", instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
else
sprintf(mode, "(%s,A%d,%c%d.%c", make_signed_hex_str_8(extension), instruction&7, EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
if(EXT_INDEX_SCALE(extension))
sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
strcat(mode, ")");
break;
case 0x38:
/* absolute short address */
sprintf(mode, "$%x.w", read_imm_16());
break;
case 0x39:
/* absolute long address */
sprintf(mode, "$%x.l", read_imm_32());
break;
case 0x3a:
/* program counter with displacement */
temp_value = read_imm_16();
sprintf(mode, "(%s,PC)", make_signed_hex_str_16(temp_value));
sprintf(g_helper_str, "; ($%x)", (make_int_16(temp_value) + g_cpu_pc-2) & 0xffffffff);
break;
case 0x3b:
/* program counter with index */
extension = read_imm_16();
if(EXT_FULL(extension))
{
if(EXT_EFFECTIVE_ZERO(extension))
{
strcpy(mode, "0");
break;
}
base = EXT_BASE_DISPLACEMENT_PRESENT(extension) ? (EXT_BASE_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
outer = EXT_OUTER_DISPLACEMENT_PRESENT(extension) ? (EXT_OUTER_DISPLACEMENT_LONG(extension) ? read_imm_32() : read_imm_16()) : 0;
if(EXT_BASE_REGISTER_PRESENT(extension))
strcpy(base_reg, "PC");
else
*base_reg = 0;
if(EXT_INDEX_REGISTER_PRESENT(extension))
{
sprintf(index_reg, "%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
if(EXT_INDEX_SCALE(extension))
sprintf(index_reg+strlen(index_reg), "*%d", 1 << EXT_INDEX_SCALE(extension));
}
else
*index_reg = 0;
preindex = (extension&7) > 0 && (extension&7) < 4;
postindex = (extension&7) > 4;
strcpy(mode, "(");
if(preindex || postindex)
strcat(mode, "[");
if(base)
{
strcat(mode, make_signed_hex_str_16(base));
comma = 1;
}
if(*base_reg)
{
if(comma)
strcat(mode, ",");
strcat(mode, base_reg);
comma = 1;
}
if(postindex)
{
strcat(mode, "]");
comma = 1;
}
if(*index_reg)
{
if(comma)
strcat(mode, ",");
strcat(mode, index_reg);
comma = 1;
}
if(preindex)
{
strcat(mode, "]");
comma = 1;
}
if(outer)
{
if(comma)
strcat(mode, ",");
strcat(mode, make_signed_hex_str_16(outer));
}
strcat(mode, ")");
break;
}
if(EXT_8BIT_DISPLACEMENT(extension) == 0)
sprintf(mode, "(PC,%c%d.%c", EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
else
sprintf(mode, "(%s,PC,%c%d.%c", make_signed_hex_str_8(extension), EXT_INDEX_AR(extension) ? 'A' : 'D', EXT_INDEX_REGISTER(extension), EXT_INDEX_LONG(extension) ? 'l' : 'w');
if(EXT_INDEX_SCALE(extension))
sprintf(mode+strlen(mode), "*%d", 1 << EXT_INDEX_SCALE(extension));
strcat(mode, ")");
break;
case 0x3c:
/* Immediate */
sprintf(mode, "%s", get_imm_str_u(size));
break;
default:
sprintf(mode, "INVALID %x", instruction & 0x3f);
}
return mode;
}
/* ======================================================================== */
/* ========================= INSTRUCTION HANDLERS ========================= */
/* ======================================================================== */
/* Instruction handler function names follow this convention:
*
* d68000_NAME_EXTENSIONS(void)
* where NAME is the name of the opcode it handles and EXTENSIONS are any
* extensions for special instances of that opcode.
*
* Examples:
* d68000_add_er_8(): add opcode, from effective address to register,
* size = byte
*
* d68000_asr_s_8(): arithmetic shift right, static count, size = byte
*
*
* Common extensions:
* 8 : size = byte
* 16 : size = word
* 32 : size = long
* rr : register to register
* mm : memory to memory
* r : register
* s : static
* er : effective address -> register
* re : register -> effective address
* ea : using effective address mode of operation
* d : data register direct
* a : address register direct
* ai : address register indirect
* pi : address register indirect with postincrement
* pd : address register indirect with predecrement
* di : address register indirect with displacement
* ix : address register indirect with index
* aw : absolute word
* al : absolute long
*/
static void d68000_illegal(void)
{
sprintf(g_dasm_str, "dc.w $%04x; ILLEGAL", g_cpu_ir);
}
static void d68000_1010(void)
{
sprintf(g_dasm_str, "dc.w $%04x; opcode 1010", g_cpu_ir);
}
static void d68000_1111(void)
{
sprintf(g_dasm_str, "dc.w $%04x; opcode 1111", g_cpu_ir);
}
static void d68000_abcd_rr(void)
{
sprintf(g_dasm_str, "abcd D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_abcd_mm(void)
{
sprintf(g_dasm_str, "abcd -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_add_er_8(void)
{
sprintf(g_dasm_str, "add.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_add_er_16(void)
{
sprintf(g_dasm_str, "add.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_add_er_32(void)
{
sprintf(g_dasm_str, "add.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_add_re_8(void)
{
sprintf(g_dasm_str, "add.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_add_re_16(void)
{
sprintf(g_dasm_str, "add.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
}
static void d68000_add_re_32(void)
{
sprintf(g_dasm_str, "add.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
}
static void d68000_adda_16(void)
{
sprintf(g_dasm_str, "adda.w %s, A%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_adda_32(void)
{
sprintf(g_dasm_str, "adda.l %s, A%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_addi_8(void)
{
char* str = get_imm_str_s8();
sprintf(g_dasm_str, "addi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_addi_16(void)
{
char* str = get_imm_str_s16();
sprintf(g_dasm_str, "addi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
}
static void d68000_addi_32(void)
{
char* str = get_imm_str_s32();
sprintf(g_dasm_str, "addi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
}
static void d68000_addq_8(void)
{
sprintf(g_dasm_str, "addq.b #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_addq_16(void)
{
sprintf(g_dasm_str, "addq.w #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_16(g_cpu_ir));
}
static void d68000_addq_32(void)
{
sprintf(g_dasm_str, "addq.l #%d, %s", g_3bit_qdata_table[(g_cpu_ir>>9)&7], get_ea_mode_str_32(g_cpu_ir));
}
static void d68000_addx_rr_8(void)
{
sprintf(g_dasm_str, "addx.b D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_addx_rr_16(void)
{
sprintf(g_dasm_str, "addx.w D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_addx_rr_32(void)
{
sprintf(g_dasm_str, "addx.l D%d, D%d", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_addx_mm_8(void)
{
sprintf(g_dasm_str, "addx.b -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_addx_mm_16(void)
{
sprintf(g_dasm_str, "addx.w -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_addx_mm_32(void)
{
sprintf(g_dasm_str, "addx.l -(A%d), -(A%d)", g_cpu_ir&7, (g_cpu_ir>>9)&7);
}
static void d68000_and_er_8(void)
{
sprintf(g_dasm_str, "and.b %s, D%d", get_ea_mode_str_8(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_and_er_16(void)
{
sprintf(g_dasm_str, "and.w %s, D%d", get_ea_mode_str_16(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_and_er_32(void)
{
sprintf(g_dasm_str, "and.l %s, D%d", get_ea_mode_str_32(g_cpu_ir), (g_cpu_ir>>9)&7);
}
static void d68000_and_re_8(void)
{
sprintf(g_dasm_str, "and.b D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_and_re_16(void)
{
sprintf(g_dasm_str, "and.w D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_16(g_cpu_ir));
}
static void d68000_and_re_32(void)
{
sprintf(g_dasm_str, "and.l D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_32(g_cpu_ir));
}
static void d68000_andi_8(void)
{
char* str = get_imm_str_u8();
sprintf(g_dasm_str, "andi.b %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_andi_16(void)
{
char* str = get_imm_str_u16();
sprintf(g_dasm_str, "andi.w %s, %s", str, get_ea_mode_str_16(g_cpu_ir));
}
static void d68000_andi_32(void)
{
char* str = get_imm_str_u32();
sprintf(g_dasm_str, "andi.l %s, %s", str, get_ea_mode_str_32(g_cpu_ir));
}
static void d68000_andi_to_ccr(void)
{
sprintf(g_dasm_str, "andi %s, CCR", get_imm_str_u8());
}
static void d68000_andi_to_sr(void)
{
sprintf(g_dasm_str, "andi %s, SR", get_imm_str_u16());
}
static void d68000_asr_s_8(void)
{
sprintf(g_dasm_str, "asr.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
}
static void d68000_asr_s_16(void)
{
sprintf(g_dasm_str, "asr.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
}
static void d68000_asr_s_32(void)
{
sprintf(g_dasm_str, "asr.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
}
static void d68000_asr_r_8(void)
{
sprintf(g_dasm_str, "asr.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
}
static void d68000_asr_r_16(void)
{
sprintf(g_dasm_str, "asr.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
}
static void d68000_asr_r_32(void)
{
sprintf(g_dasm_str, "asr.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
}
static void d68000_asr_ea(void)
{
sprintf(g_dasm_str, "asr.w %s", get_ea_mode_str_16(g_cpu_ir));
}
static void d68000_asl_s_8(void)
{
sprintf(g_dasm_str, "asl.b #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
}
static void d68000_asl_s_16(void)
{
sprintf(g_dasm_str, "asl.w #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
}
static void d68000_asl_s_32(void)
{
sprintf(g_dasm_str, "asl.l #%d, D%d", g_3bit_qdata_table[(g_cpu_ir>>9)&7], g_cpu_ir&7);
}
static void d68000_asl_r_8(void)
{
sprintf(g_dasm_str, "asl.b D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
}
static void d68000_asl_r_16(void)
{
sprintf(g_dasm_str, "asl.w D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
}
static void d68000_asl_r_32(void)
{
sprintf(g_dasm_str, "asl.l D%d, D%d", (g_cpu_ir>>9)&7, g_cpu_ir&7);
}
static void d68000_asl_ea(void)
{
sprintf(g_dasm_str, "asl.w %s", get_ea_mode_str_16(g_cpu_ir));
}
static void d68000_bcc_8(void)
{
unsigned temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_8(g_cpu_ir));
}
static void d68000_bcc_16(void)
{
unsigned temp_pc = g_cpu_pc;
sprintf(g_dasm_str, "b%-2s $%x", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + make_int_16(read_imm_16()));
}
static void d68020_bcc_32(void)
{
unsigned temp_pc = g_cpu_pc;
LIMIT_CPU_TYPES(M68020_PLUS);
sprintf(g_dasm_str, "b%-2s $%x; (2+)", g_cc[(g_cpu_ir>>8)&0xf], temp_pc + read_imm_32());
}
static void d68000_bchg_r(void)
{
sprintf(g_dasm_str, "bchg D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_bchg_s(void)
{
char* str = get_imm_str_u8();
sprintf(g_dasm_str, "bchg %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_bclr_r(void)
{
sprintf(g_dasm_str, "bclr D%d, %s", (g_cpu_ir>>9)&7, get_ea_mode_str_8(g_cpu_ir));
}
static void d68000_bclr_s(void)
{
char* str = get_imm_str_u8();
sprintf(g_dasm_str, "bclr %s, %s", str, get_ea_mode_str_8(g_cpu_ir));
}
static void d68010_bkpt(void)
{
LIMIT_CPU_TYPES(M68010_PLUS);
sprintf(g_dasm_str, "bkpt #%d; (1+)", g_cpu_ir&7);
}
static void d68020_bfchg(void)
{
unsigned extension;
char offset[3];
char width[3];
LIMIT_CPU_TYPES(M68020_PLUS);
extension = read_imm_16();
if(BIT_B(extension))
sprintf(offset, "D%d", (extension>>6)&7);
else
sprintf(offset, "%d", (extension>>6)&31);
if(BIT_5(extension))
sprintf(width, "D%d", extension&7);