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Document/Automate regeneration of TableGen code #1020
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that process is kind of adhoc, i have to do that manually here & there, and it takes quite a lot of time. |
It would still help to share some of your process/notes. I was looking to add xtensa support, TD LLVM files can be found but it's hard to guess how exactly .inc files were generated. |
@aquynh I was following up on @rth7680 's desire to have SVE disassembly but discovered LLVM has moved ahead with definitions and enums so you can't just take one inc file and paste in the changes. I guess the real solution is some sort of automated tooling to do the imports but until the steps are documented I suspect this will be a pinch point to implementing new instructions based on the LLVM framework. |
Reason is that i created those files with many manual works, there was no 100% auto tools to do that. Figuring out how to do that better, so syncing with Llvm is easier. |
@aquynh surely if the llvm created files are not in the form you want or need the correct approach is to tweak LLVM's tablegen or write your own tool to ingest and generate code from the source .td files? Is this just due to friction between LLVM's internals requirements of the MC framework and what is needed to embed it in a library? |
Are there any updates on this process by any chance? |
see the sync tools under https://github.com/aquynh/capstone/tree/next/suite/synctools |
Expanding on #967, there are more instructions to be added for ARMv8.3 and ARM SVE. Support for ARMv8.1 through v8.3 is upstream in LLVM.
It is not clear if there is a modified TableGen that you're using, or what.
Surely you cannot be modifying these files by hand.
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