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Adds a counter for DCC signal transitions. (#458)
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balazsracz authored Oct 31, 2020
1 parent 60dcdb0 commit b58eec9
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Showing 2 changed files with 5 additions and 3 deletions.
2 changes: 1 addition & 1 deletion boards/bracz-railcom/HwInit.cxx
Original file line number Diff line number Diff line change
Expand Up @@ -107,7 +107,7 @@ const uint32_t RailcomDefs::UART_PERIPH[] = RAILCOM_PERIPH;
TivaDAC<DACDefs> dac;
TivaGNDControl gnd_control;
TivaBypassControl bypass_control;

unsigned DCCDecode::sampleCount_ = 0;
uint8_t RailcomDefs::feedbackChannel_ = 0xff;
uint8_t dac_next_packet_mode = 0;

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6 changes: 4 additions & 2 deletions boards/bracz-railcom/hardware.hxx
Original file line number Diff line number Diff line change
Expand Up @@ -448,8 +448,6 @@ struct DCCDecode
HWREG(TIMER_BASE + TIMER_O_TAMR) |= (TIMER_TAMR_TAMIE);
}

static void cap_event_hook() {}

static const auto RCOM_TIMER = TIMER_A;
static const auto SAMPLE_PERIOD_CLOCKS = 60000;
//static const auto SAMPLE_TIMER_TIMEOUT = TIMER_TIMA_TIMEOUT;
Expand All @@ -470,6 +468,10 @@ struct DCCDecode
static inline void dcc_before_cutout_hook();
static inline void dcc_packet_finished_hook();
static inline void after_feedback_hook();

/// counts how many edges / transitions we had on the DCC signal.
static unsigned sampleCount_;
static inline void cap_event_hook() { ++sampleCount_; }
};

#endif // ! pindefs_only
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