From e58d49e76c56b835a1713803292fef5d25095ad5 Mon Sep 17 00:00:00 2001 From: Elliott Hughes Date: Mon, 5 Feb 2018 13:36:02 -0800 Subject: [PATCH] Improve the comment in the ARM setjmp.S. Based on code review comments for 460130b7d07f0efba7f4f43f657f0f60daeb71e2. Bug: N/A Test: N/A Change-Id: Ia86bc92dfe3f18261e06af33488a548ea9911b10 --- libc/arch-arm/bionic/setjmp.S | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/libc/arch-arm/bionic/setjmp.S b/libc/arch-arm/bionic/setjmp.S index 30e7e233fc4..5fbcaf39f93 100644 --- a/libc/arch-arm/bionic/setjmp.S +++ b/libc/arch-arm/bionic/setjmp.S @@ -58,17 +58,15 @@ // 0 sigflag/cookie setjmp cookie in top 31 bits, signal mask flag in low bit // 1 sigmask 64-bit signal mask (not used with _setjmp / _longjmp) // 2 " " -// 3 reserved (unused to allow float_base to be maximally aligned) +// 3 reserved (unused to allow float_base to be maximally aligned; +// this avoids software emulation of unaligned loads/stores) // 4 float_base base of float registers (d8 to d15) // 20 float_state floating-point status and control register // 21 core_base base of core registers (r4-r11, r13-r14) -// 31 checksum checksum of all of the core registers, to give better error messages. +// 31 checksum checksum of all of the core registers, to give better error messages // 32 reserved reserved entries (room to grow) -// 64 -// -// NOTE: float_base must be at an even word index, since the -// FP registers will be loaded/stored with instructions -// that expect 8-byte alignment. +// ... +// 63 " " #define _JB_SIGFLAG 0 #define _JB_SIGMASK (_JB_SIGFLAG + 1)