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vc4: SSA defs not SIMD masked when necessary #92

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anholt opened this issue Jan 16, 2018 · 0 comments
Open

vc4: SSA defs not SIMD masked when necessary #92

anholt opened this issue Jan 16, 2018 · 0 comments

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@anholt
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anholt commented Jan 16, 2018

For some pseudocode:

float a;
varying float iters;

for (int i = 0; i < int(iters); i++) {
  a = (some computation that can't be hoisted);
}

gl_FragColor = vec4(a);

a is an SSA def from the perspective of a shader invocation (and thus NIR's SSA), so vc4_program.c doesn't mask it per SIMD channel. However, when one of our channels broke out early because iters is non-uniform, gl_FragColor should have that channel's version of a, not the final execution's one. We don't want to do the masking for simple SSA defs and use within a block, because it's expensive.

Figure out what is the minimal amount of masking we can generate for correct code. Jason's pass is probably relevant.

@anholt anholt changed the title vc4: vc4: SSA defs not SIMD masked when necessary Jan 16, 2018
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