From 358c09c5ae8fb211f36d9c2c9d26d9b1d7b84638 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Mon, 14 Mar 2022 22:12:52 +0100 Subject: [PATCH 01/40] OcMainLib: PCD tests --- Library/OcMainLib/OcMainLib.inf | 1 + Library/OcMainLib/OpenCoreMisc.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/Library/OcMainLib/OcMainLib.inf b/Library/OcMainLib/OcMainLib.inf index a3a159534e9..18b56b241c7 100644 --- a/Library/OcMainLib/OcMainLib.inf +++ b/Library/OcMainLib/OcMainLib.inf @@ -40,6 +40,7 @@ UefiCpuPkg/UefiCpuPkg.dec [Guids] + gEfiMdeModulePkgTokenSpaceGuid gOcVendorVariableGuid [Protocols] diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index c4172f65c5e..48ff9b29c33 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -35,6 +35,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include #include #include +#include #include #include #include @@ -472,6 +473,12 @@ OcMiscEarlyInit ( if (Config->Misc.Debug.SerialInit) { SerialPortInitialize (); + + // + // PCD tests. + // + // Status = PcdSet8S (PcdSerialRegisterAccessWidth, 100); + Status = PcdSetBoolS (PcdSerialUseMmio, FALSE); } OcConfigureLogProtocol ( From afa42c99036f3073e252c8eabc2e5fc9b19e7f76 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Tue, 15 Mar 2022 10:33:38 +0100 Subject: [PATCH 02/40] OcMainLib: Fix PCD tests --- Library/OcMainLib/OcMainLib.inf | 14 ++++++++++++++ Library/OcMainLib/OpenCoreMisc.c | 20 ++++++++++++++++++-- OpenCorePkg.dsc | 14 ++++++++++++++ 3 files changed, 46 insertions(+), 2 deletions(-) diff --git a/Library/OcMainLib/OcMainLib.inf b/Library/OcMainLib/OcMainLib.inf index 18b56b241c7..feb3fa1dd47 100644 --- a/Library/OcMainLib/OcMainLib.inf +++ b/Library/OcMainLib/OcMainLib.inf @@ -54,6 +54,20 @@ gEfiSecurityArchProtocolGuid ## SOMETIMES_CONSUMES gEfiSecurity2ArchProtocolGuid ## SOMETIMES_CONSUMES +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## CONSUMES + [LibraryClasses] DevicePathLib IoLib diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index 48ff9b29c33..34c8e86f0f9 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -477,8 +477,24 @@ OcMiscEarlyInit ( // // PCD tests. // - // Status = PcdSet8S (PcdSerialRegisterAccessWidth, 100); - Status = PcdSetBoolS (PcdSerialUseMmio, FALSE); + // Keys: https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf + // Values: https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1202 + // + PatchPcdSet8 (PcdSerialRegisterAccessWidth, 32U); + PatchPcdSetBool (PcdSerialUseMmio, TRUE); + PatchPcdSetBool (PcdSerialUseHardwareFlowControl, TRUE); + PatchPcdSetBool (PcdSerialDetectCable, TRUE); + PatchPcdSet64 (PcdSerialRegisterBase, 0U); + PatchPcdSet32 (PcdSerialBaudRate, 50U); + PatchPcdSet8 (PcdSerialLineControl, 0x00U); + PatchPcdSet8 (PcdSerialFifoControl, 0x00U); + PatchPcdSet32 (PcdSerialClockRate, 0U); + + UINT8 PatchPcdSetPtr[4] = { 0x12, 0, 0, 0xFF }; + UINTN PatchPcdSetPtrSize = 4U; + PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PatchPcdSetPtrSize, PatchPcdSetPtr); + PatchPcdSet32 (PcdSerialExtendedTxFifoSize, 0U); + PatchPcdSet32 (PcdSerialRegisterStride, 2U); } OcConfigureLogProtocol ( diff --git a/OpenCorePkg.dsc b/OpenCorePkg.dsc index 7d60059c37a..3632ebaa484 100755 --- a/OpenCorePkg.dsc +++ b/OpenCorePkg.dsc @@ -326,6 +326,20 @@ !endif gOpenCorePkgTokenSpaceGuid.PcdCanaryAllowRdtscFallback|TRUE +[PcdsPatchableInModule] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|8 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x07 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|1843200 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF} + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|64 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1 + [BuildOptions] # While there are no PCDs as of now, there at least are some custom macros. DEFINE OCPKG_BUILD_OPTIONS_GEN = -D DISABLE_NEW_DEPRECATED_INTERFACES $(OCPKG_BUILD_OPTIONS) -D OC_TARGET_$(TARGET)=1 From 56d5929a8b9ead509d733468fa5a4d2410fa9a4e Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Tue, 15 Mar 2022 12:39:11 +0100 Subject: [PATCH 03/40] OcMainLib: Typo --- Library/OcMainLib/OpenCoreMisc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index 34c8e86f0f9..2c431e74827 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -490,9 +490,9 @@ OcMiscEarlyInit ( PatchPcdSet8 (PcdSerialFifoControl, 0x00U); PatchPcdSet32 (PcdSerialClockRate, 0U); - UINT8 PatchPcdSetPtr[4] = { 0x12, 0, 0, 0xFF }; - UINTN PatchPcdSetPtrSize = 4U; - PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PatchPcdSetPtrSize, PatchPcdSetPtr); + UINT8 PcdSerialPciDeviceInfoNewValue[4] = { 0x12, 0, 0, 0xFF }; + UINTN PcdSerialPciDeviceInfoNewValueSize = 4U; + PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PcdSerialPciDeviceInfoNewValueSize, PcdSerialPciDeviceInfoNewValue); PatchPcdSet32 (PcdSerialExtendedTxFifoSize, 0U); PatchPcdSet32 (PcdSerialRegisterStride, 2U); } From b43183830bae6c7dfa4d19d8108b2ff17d6143f7 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Mon, 28 Mar 2022 19:22:39 +0200 Subject: [PATCH 04/40] Docs: Add serial sample --- Docs/Sample.plist | 14 ++++++++++++++ Docs/SampleCustom.plist | 14 ++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/Docs/Sample.plist b/Docs/Sample.plist index 23df8d51025..8bfea6f3b25 100644 --- a/Docs/Sample.plist +++ b/Docs/Sample.plist @@ -1156,6 +1156,20 @@ Vault Secure + Serial + + Keys + + + DevicePath + PciRoot(0x0)/Pci(0x9,0x0)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0) + Init + + PcdSerialPciDeviceInfo + EgAA/w== + + + Tools diff --git a/Docs/SampleCustom.plist b/Docs/SampleCustom.plist index 85e70e32725..90c58c8b046 100644 --- a/Docs/SampleCustom.plist +++ b/Docs/SampleCustom.plist @@ -1156,6 +1156,20 @@ Vault Secure + Serial + + Keys + + + DevicePath + PciRoot(0x0)/Pci(0x9,0x0)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0) + Init + + PcdSerialPciDeviceInfo + EgAA/w== + + + Tools From 88b41bc7943995a3378eed88241215051c532dbc Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 12:05:30 +0200 Subject: [PATCH 05/40] Docs: Update Serial hierarchy --- Docs/Sample.plist | 39 ++++++++++++++++++++++++++++----------- Docs/SampleCustom.plist | 39 ++++++++++++++++++++++++++++----------- 2 files changed, 56 insertions(+), 22 deletions(-) diff --git a/Docs/Sample.plist b/Docs/Sample.plist index 8bfea6f3b25..a26c1252d11 100644 --- a/Docs/Sample.plist +++ b/Docs/Sample.plist @@ -1158,17 +1158,34 @@ Serial - Keys - - - DevicePath - PciRoot(0x0)/Pci(0x9,0x0)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0) - Init - - PcdSerialPciDeviceInfo - EgAA/w== - - + BaudRate + 115200 + ClockRate + 1843200 + DetectCable + + ExtendedTxFifoSize + 64 + FifoControl + Bw== + Init + + LineControl + Aw== + PciDevice + Pci(0x9,0x0,0x0)/Pci(0x0,0x0,0x0)/Pci(0x1,0x0,0x0)/Pci(0x0,0x0,0x0) + PciDeviceInfo + /w== + RegisterAccessWidth + CA== + RegisterBase + 0 + RegisterStride + 1 + UseHardwareFlowControl + + UseMmio + Tools diff --git a/Docs/SampleCustom.plist b/Docs/SampleCustom.plist index 90c58c8b046..3dacb590c85 100644 --- a/Docs/SampleCustom.plist +++ b/Docs/SampleCustom.plist @@ -1158,17 +1158,34 @@ Serial - Keys - - - DevicePath - PciRoot(0x0)/Pci(0x9,0x0)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0) - Init - - PcdSerialPciDeviceInfo - EgAA/w== - - + BaudRate + 115200 + ClockRate + 1843200 + DetectCable + + ExtendedTxFifoSize + 64 + FifoControl + Bw== + Init + + LineControl + Aw== + PciDevice + Pci(0x9,0x0,0x0)/Pci(0x0,0x0,0x0)/Pci(0x1,0x0,0x0)/Pci(0x0,0x0,0x0) + PciDeviceInfo + /w== + RegisterAccessWidth + CA== + RegisterBase + 0 + RegisterStride + 1 + UseHardwareFlowControl + + UseMmio + Tools From bdd1eb4447fdb91a70489d34fd79a6c8f9494d44 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 12:11:42 +0200 Subject: [PATCH 06/40] Docs: Drop PciDevice --- Docs/Sample.plist | 2 -- Docs/SampleCustom.plist | 2 -- 2 files changed, 4 deletions(-) diff --git a/Docs/Sample.plist b/Docs/Sample.plist index a26c1252d11..2994f987418 100644 --- a/Docs/Sample.plist +++ b/Docs/Sample.plist @@ -1172,8 +1172,6 @@ LineControl Aw== - PciDevice - Pci(0x9,0x0,0x0)/Pci(0x0,0x0,0x0)/Pci(0x1,0x0,0x0)/Pci(0x0,0x0,0x0) PciDeviceInfo /w== RegisterAccessWidth diff --git a/Docs/SampleCustom.plist b/Docs/SampleCustom.plist index 3dacb590c85..dbe1d242d74 100644 --- a/Docs/SampleCustom.plist +++ b/Docs/SampleCustom.plist @@ -1172,8 +1172,6 @@ LineControl Aw== - PciDevice - Pci(0x9,0x0,0x0)/Pci(0x0,0x0,0x0)/Pci(0x1,0x0,0x0)/Pci(0x0,0x0,0x0) PciDeviceInfo /w== RegisterAccessWidth From d535e5da22a312934377d75cd2a426fd76a57b7a Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 12:19:48 +0200 Subject: [PATCH 07/40] Docs: Fix key type --- Docs/Sample.plist | 6 +++--- Docs/SampleCustom.plist | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/Docs/Sample.plist b/Docs/Sample.plist index 2994f987418..0893afbb563 100644 --- a/Docs/Sample.plist +++ b/Docs/Sample.plist @@ -1167,15 +1167,15 @@ ExtendedTxFifoSize 64 FifoControl - Bw== + 7 Init LineControl - Aw== + 3 PciDeviceInfo /w== RegisterAccessWidth - CA== + 8 RegisterBase 0 RegisterStride diff --git a/Docs/SampleCustom.plist b/Docs/SampleCustom.plist index dbe1d242d74..d83d9a4b44e 100644 --- a/Docs/SampleCustom.plist +++ b/Docs/SampleCustom.plist @@ -1167,15 +1167,15 @@ ExtendedTxFifoSize 64 FifoControl - Bw== + 7 Init LineControl - Aw== + 3 PciDeviceInfo /w== RegisterAccessWidth - CA== + 8 RegisterBase 0 RegisterStride From aa003208a9038bd622b89f339ab870d6a38648cf Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 13:19:53 +0200 Subject: [PATCH 08/40] Docs: Fix default RegisterBase value --- Docs/Sample.plist | 2 +- Docs/SampleCustom.plist | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Docs/Sample.plist b/Docs/Sample.plist index 0893afbb563..cbd41e922ea 100644 --- a/Docs/Sample.plist +++ b/Docs/Sample.plist @@ -1177,7 +1177,7 @@ RegisterAccessWidth 8 RegisterBase - 0 + 1016 RegisterStride 1 UseHardwareFlowControl diff --git a/Docs/SampleCustom.plist b/Docs/SampleCustom.plist index d83d9a4b44e..104cd9a5cb4 100644 --- a/Docs/SampleCustom.plist +++ b/Docs/SampleCustom.plist @@ -1177,7 +1177,7 @@ RegisterAccessWidth 8 RegisterBase - 0 + 1016 RegisterStride 1 UseHardwareFlowControl From 2ea41491677106d1f76e0a95c95554b696cc8671 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 13:44:32 +0200 Subject: [PATCH 09/40] OcConfigurationLib: Add Misc->Serial field --- .../Acidanthera/Library/OcConfigurationLib.h | 17 ++++++++++++++++ .../OcConfigurationLib/OcConfigurationLib.c | 20 +++++++++++++++++++ 2 files changed, 37 insertions(+) diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index 32bb8bd2501..d05eccaf130 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -407,11 +407,28 @@ typedef enum { OC_ARRAY (OC_MISC_TOOLS_ENTRY, _, __) OC_DECLARE (OC_MISC_TOOLS_ARRAY) +#define OC_MISC_SERIAL_FIELDS(_, __) \ + _(UINT32 , BaudRate , , 115200 , ()) \ + _(UINT32 , ClockRate , , 1843200 , ()) \ + _(BOOLEAN , DetectCable , , FALSE , ()) \ + _(UINT32 , ExtendedTxFifoSize , , 64 , ()) \ + _(UINT8 , FifoControl , , 7 , ()) \ + _(BOOLEAN , Init , , FALSE , ()) \ + _(UINT8 , LineControl , , 3 , ()) \ + _(OC_DATA , PciDeviceInfo , , OC_EDATA_CONSTR (_, __) , OC_DESTR (OC_DATA) ) \ + _(UINT8 , RegisterAccessWidth , , 8 , ()) \ + _(UINT64 , RegisterBase , , 0x03F8 , ()) \ + _(UINT32 , RegisterStride , , 1 , ()) \ + _(BOOLEAN , UseHardwareFlowControl , , FALSE , ()) \ + _(BOOLEAN , UseMmio , , FALSE , ()) + OC_DECLARE (OC_MISC_SERIAL) + #define OC_MISC_CONFIG_FIELDS(_, __) \ _(OC_MISC_BLESS_ARRAY , BlessOverride , , OC_CONSTR2 (OC_MISC_BLESS_ARRAY, _, __) , OC_DESTR (OC_MISC_BLESS_ARRAY)) \ _(OC_MISC_BOOT , Boot , , OC_CONSTR2 (OC_MISC_BOOT, _, __) , OC_DESTR (OC_MISC_BOOT)) \ _(OC_MISC_DEBUG , Debug , , OC_CONSTR2 (OC_MISC_DEBUG, _, __) , OC_DESTR (OC_MISC_DEBUG)) \ _(OC_MISC_SECURITY , Security , , OC_CONSTR2 (OC_MISC_SECURITY, _, __) , OC_DESTR (OC_MISC_SECURITY)) \ + _(OC_MISC_SERIAL , Serial , , OC_CONSTR2 (OC_MISC_SERIAL, _, __) , OC_DESTR (OC_MISC_SERIAL)) \ _(OC_MISC_TOOLS_ARRAY , Entries , , OC_CONSTR2 (OC_MISC_TOOLS_ARRAY, _, __) , OC_DESTR (OC_MISC_TOOLS_ARRAY)) \ _(OC_MISC_TOOLS_ARRAY , Tools , , OC_CONSTR2 (OC_MISC_TOOLS_ARRAY, _, __) , OC_DESTR (OC_MISC_TOOLS_ARRAY)) OC_DECLARE (OC_MISC_CONFIG) diff --git a/Library/OcConfigurationLib/OcConfigurationLib.c b/Library/OcConfigurationLib/OcConfigurationLib.c index 03eee338fd2..6defd68bafb 100644 --- a/Library/OcConfigurationLib/OcConfigurationLib.c +++ b/Library/OcConfigurationLib/OcConfigurationLib.c @@ -51,6 +51,7 @@ OC_ARRAY_STRUCTORS (OC_MISC_BLESS_ARRAY) OC_STRUCTORS (OC_MISC_BOOT, ()) OC_STRUCTORS (OC_MISC_DEBUG, ()) OC_STRUCTORS (OC_MISC_SECURITY, ()) +OC_STRUCTORS (OC_MISC_SERIAL, ()) OC_STRUCTORS (OC_MISC_TOOLS_ENTRY, ()) OC_ARRAY_STRUCTORS (OC_MISC_TOOLS_ARRAY) OC_STRUCTORS (OC_MISC_CONFIG, ()) @@ -453,6 +454,24 @@ mMiscConfigurationSecuritySchema[] = { OC_SCHEMA_STRING_IN ("Vault", OC_GLOBAL_CONFIG, Misc.Security.Vault), }; +STATIC +OC_SCHEMA +mMiscConfigurationSerialSchema[] = { + OC_SCHEMA_INTEGER_IN ("BaudRate", OC_GLOBAL_CONFIG, Misc.Serial.BaudRate), + OC_SCHEMA_INTEGER_IN ("ClockRate", OC_GLOBAL_CONFIG, Misc.Serial.ClockRate), + OC_SCHEMA_BOOLEAN_IN ("DetectCable", OC_GLOBAL_CONFIG, Misc.Serial.DetectCable), + OC_SCHEMA_INTEGER_IN ("ExtendedTxFifoSize", OC_GLOBAL_CONFIG, Misc.Serial.ExtendedTxFifoSize), + OC_SCHEMA_INTEGER_IN ("FifoControl", OC_GLOBAL_CONFIG, Misc.Serial.FifoControl), + OC_SCHEMA_BOOLEAN_IN ("Init", OC_GLOBAL_CONFIG, Misc.Serial.Init), + OC_SCHEMA_INTEGER_IN ("LineControl", OC_GLOBAL_CONFIG, Misc.Serial.LineControl), + OC_SCHEMA_DATA_IN ("PciDeviceInfo", OC_GLOBAL_CONFIG, Misc.Serial.PciDeviceInfo), + OC_SCHEMA_INTEGER_IN ("RegisterAccessWidth", OC_GLOBAL_CONFIG, Misc.Serial.RegisterAccessWidth), + OC_SCHEMA_INTEGER_IN ("RegisterBase", OC_GLOBAL_CONFIG, Misc.Serial.RegisterBase), + OC_SCHEMA_INTEGER_IN ("RegisterStride", OC_GLOBAL_CONFIG, Misc.Serial.RegisterStride), + OC_SCHEMA_BOOLEAN_IN ("UseHardwareFlowControl", OC_GLOBAL_CONFIG, Misc.Serial.UseHardwareFlowControl), + OC_SCHEMA_BOOLEAN_IN ("UseMmio", OC_GLOBAL_CONFIG, Misc.Serial.UseMmio), +}; + STATIC OC_SCHEMA mMiscEntriesSchemaEntry[] = { @@ -496,6 +515,7 @@ mMiscConfigurationSchema[] = { OC_SCHEMA_DICT ("Debug", mMiscConfigurationDebugSchema), OC_SCHEMA_ARRAY_IN ("Entries", OC_GLOBAL_CONFIG, Misc.Entries, &mMiscEntriesSchema), OC_SCHEMA_DICT ("Security", mMiscConfigurationSecuritySchema), + OC_SCHEMA_DICT ("Serial", mMiscConfigurationSerialSchema), OC_SCHEMA_ARRAY_IN ("Tools", OC_GLOBAL_CONFIG, Misc.Tools, &mMiscToolsSchema), }; From 4e689487a1be377f33f07ac29fcf48f887325efd Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 13:44:51 +0200 Subject: [PATCH 10/40] OcMainLib: Read and set PCD values from config --- Library/OcMainLib/OpenCoreMisc.c | 31 ++++++++++++++----------------- 1 file changed, 14 insertions(+), 17 deletions(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index 2c431e74827..9016fc42dca 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -471,30 +471,27 @@ OcMiscEarlyInit ( gBS->SetWatchdogTimer (0, 0, 0, NULL); } - if (Config->Misc.Debug.SerialInit) { + if (Config->Misc.Serial.Init) { SerialPortInitialize (); // - // PCD tests. + // Update PCD values. // // Keys: https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf // Values: https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1202 // - PatchPcdSet8 (PcdSerialRegisterAccessWidth, 32U); - PatchPcdSetBool (PcdSerialUseMmio, TRUE); - PatchPcdSetBool (PcdSerialUseHardwareFlowControl, TRUE); - PatchPcdSetBool (PcdSerialDetectCable, TRUE); - PatchPcdSet64 (PcdSerialRegisterBase, 0U); - PatchPcdSet32 (PcdSerialBaudRate, 50U); - PatchPcdSet8 (PcdSerialLineControl, 0x00U); - PatchPcdSet8 (PcdSerialFifoControl, 0x00U); - PatchPcdSet32 (PcdSerialClockRate, 0U); - - UINT8 PcdSerialPciDeviceInfoNewValue[4] = { 0x12, 0, 0, 0xFF }; - UINTN PcdSerialPciDeviceInfoNewValueSize = 4U; - PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PcdSerialPciDeviceInfoNewValueSize, PcdSerialPciDeviceInfoNewValue); - PatchPcdSet32 (PcdSerialExtendedTxFifoSize, 0U); - PatchPcdSet32 (PcdSerialRegisterStride, 2U); + PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); + PatchPcdSetBool (PcdSerialUseMmio, Config->Misc.Serial.UseMmio); + PatchPcdSetBool (PcdSerialUseHardwareFlowControl, Config->Misc.Serial.UseHardwareFlowControl); + PatchPcdSetBool (PcdSerialDetectCable, Config->Misc.Serial.DetectCable); + PatchPcdSet64 (PcdSerialRegisterBase, Config->Misc.Serial.RegisterBase); + PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); + PatchPcdSet8 (PcdSerialLineControl, Config->Misc.Serial.LineControl); + PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); + PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); + PatchPcdSetPtr (PcdSerialPciDeviceInfo, (UINTN *) &Config->Misc.Serial.PciDeviceInfo.Size, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); + PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); } OcConfigureLogProtocol ( From 68ddc2fdeeedbbfbf685d6564a3e727a55a006b1 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 13:57:37 +0200 Subject: [PATCH 11/40] OcMainLib: Initialize after overriding --- Library/OcMainLib/OpenCoreMisc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index 9016fc42dca..d699e9ef73b 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -472,8 +472,6 @@ OcMiscEarlyInit ( } if (Config->Misc.Serial.Init) { - SerialPortInitialize (); - // // Update PCD values. // @@ -492,6 +490,8 @@ OcMiscEarlyInit ( PatchPcdSetPtr (PcdSerialPciDeviceInfo, (UINTN *) &Config->Misc.Serial.PciDeviceInfo.Size, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); + + SerialPortInitialize (); } OcConfigureLogProtocol ( From 0370d79a78711022b6aa77eb18a684d2e352d82a Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 14:05:19 +0200 Subject: [PATCH 12/40] OcMainLib: Basic sanity check --- Library/OcMainLib/OpenCoreMisc.c | 33 +++++++++++++++++++++++++++++--- 1 file changed, 30 insertions(+), 3 deletions(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index d699e9ef73b..d9a2849dae7 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -408,6 +408,8 @@ OcMiscEarlyInit ( EFI_TIME BootTime; CONST CHAR8 *AsciiVault; OCS_VAULT_MODE Vault; + UINTN Index; + BOOLEAN IsBaudRateOk; ConfigData = OcStorageReadFileUnicode ( Storage, @@ -478,16 +480,41 @@ OcMiscEarlyInit ( // Keys: https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf // Values: https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1202 // - PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); + if (Config->Misc.Serial.RegisterAccessWidth == 8U || Config->Misc.Serial.RegisterAccessWidth == 32U) { + PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); + } PatchPcdSetBool (PcdSerialUseMmio, Config->Misc.Serial.UseMmio); PatchPcdSetBool (PcdSerialUseHardwareFlowControl, Config->Misc.Serial.UseHardwareFlowControl); PatchPcdSetBool (PcdSerialDetectCable, Config->Misc.Serial.DetectCable); PatchPcdSet64 (PcdSerialRegisterBase, Config->Misc.Serial.RegisterBase); - PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); + + IsBaudRateOk = FALSE; + STATIC UINT32 AllowedBaudRate[] = { + 921600U, 460800U, 230400U, 115200U, + 57600U, 38400U, 19200U, 9600U, 7200U, + 4800U, 3600U, 2400U, 2000U, 1800U, + 1200U, 600U, 300U, 150U, 134U, + 110U, 75U, 50U + }; + for (Index = 0; Index < ARRAY_SIZE (AllowedBaudRate); ++Index) { + if (Config->Misc.Serial.BaudRate == AllowedBaudRate[Index]) { + IsBaudRateOk = TRUE; + break; + } + } + if (IsBaudRateOk) { + PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); + } PatchPcdSet8 (PcdSerialLineControl, Config->Misc.Serial.LineControl); PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); - PatchPcdSetPtr (PcdSerialPciDeviceInfo, (UINTN *) &Config->Misc.Serial.PciDeviceInfo.Size, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + if (Config->Misc.Serial.PciDeviceInfo.Size <= 41U) { + PatchPcdSetPtr ( + PcdSerialPciDeviceInfo, + (UINTN *) &Config->Misc.Serial.PciDeviceInfo.Size, + OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo) + ); + } PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); From 227d1bbeb2bf6816fafffab439634c6d439a8bac Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 14:34:16 +0200 Subject: [PATCH 13/40] Revert "OcMainLib: Basic sanity check" This reverts commit 236514ed4c2714ba7fc268cf7e3b32a0b3d78a63. --- Library/OcMainLib/OpenCoreMisc.c | 33 +++----------------------------- 1 file changed, 3 insertions(+), 30 deletions(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index d9a2849dae7..d699e9ef73b 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -408,8 +408,6 @@ OcMiscEarlyInit ( EFI_TIME BootTime; CONST CHAR8 *AsciiVault; OCS_VAULT_MODE Vault; - UINTN Index; - BOOLEAN IsBaudRateOk; ConfigData = OcStorageReadFileUnicode ( Storage, @@ -480,41 +478,16 @@ OcMiscEarlyInit ( // Keys: https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf // Values: https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1202 // - if (Config->Misc.Serial.RegisterAccessWidth == 8U || Config->Misc.Serial.RegisterAccessWidth == 32U) { - PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); - } + PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); PatchPcdSetBool (PcdSerialUseMmio, Config->Misc.Serial.UseMmio); PatchPcdSetBool (PcdSerialUseHardwareFlowControl, Config->Misc.Serial.UseHardwareFlowControl); PatchPcdSetBool (PcdSerialDetectCable, Config->Misc.Serial.DetectCable); PatchPcdSet64 (PcdSerialRegisterBase, Config->Misc.Serial.RegisterBase); - - IsBaudRateOk = FALSE; - STATIC UINT32 AllowedBaudRate[] = { - 921600U, 460800U, 230400U, 115200U, - 57600U, 38400U, 19200U, 9600U, 7200U, - 4800U, 3600U, 2400U, 2000U, 1800U, - 1200U, 600U, 300U, 150U, 134U, - 110U, 75U, 50U - }; - for (Index = 0; Index < ARRAY_SIZE (AllowedBaudRate); ++Index) { - if (Config->Misc.Serial.BaudRate == AllowedBaudRate[Index]) { - IsBaudRateOk = TRUE; - break; - } - } - if (IsBaudRateOk) { - PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); - } + PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); PatchPcdSet8 (PcdSerialLineControl, Config->Misc.Serial.LineControl); PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); - if (Config->Misc.Serial.PciDeviceInfo.Size <= 41U) { - PatchPcdSetPtr ( - PcdSerialPciDeviceInfo, - (UINTN *) &Config->Misc.Serial.PciDeviceInfo.Size, - OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo) - ); - } + PatchPcdSetPtr (PcdSerialPciDeviceInfo, (UINTN *) &Config->Misc.Serial.PciDeviceInfo.Size, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); From 4c41dd3e1db0db3996735b07938acb51d1391dbb Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 14:38:43 +0200 Subject: [PATCH 14/40] ocvalidate: Move PCD value sanity checks to ocvalidate --- Utilities/ocvalidate/ValidateMisc.c | 74 +++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index 93bdf1342a9..a6eadda5d5d 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -566,6 +566,79 @@ CheckMiscSecurity ( return ErrorCount; } +STATIC +BOOLEAN +ValidateBaudRate ( + IN UINT32 BaudRate + ) +{ + UINTN Index; + + STATIC UINT32 AllowedBaudRate[] = { + 921600U, 460800U, 230400U, 115200U, + 57600U, 38400U, 19200U, 9600U, 7200U, + 4800U, 3600U, 2400U, 2000U, 1800U, + 1200U, 600U, 300U, 150U, 134U, + 110U, 75U, 50U + }; + + for (Index = 0; Index < ARRAY_SIZE (AllowedBaudRate); ++Index) { + if (BaudRate == AllowedBaudRate[Index]) { + return TRUE; + } + } + + DEBUG ((DEBUG_WARN, "Misc->Serial->BaudRate is borked!\n")); + DEBUG ((DEBUG_WARN, "Accepted BaudRate values:\n")); + for (Index = 0; Index < ARRAY_SIZE (AllowedBaudRate); ++Index) { + DEBUG ((DEBUG_WARN, "%u, ", AllowedBaudRate[Index])); + if (Index != 0 && Index % 5 == 0) { + DEBUG ((DEBUG_WARN, "\n")); + } + } + DEBUG ((DEBUG_WARN, "\n")); + return FALSE; +} + +STATIC +UINT32 +CheckMiscSerial ( + IN OC_GLOBAL_CONFIG *Config + ) +{ + UINT32 ErrorCount; + OC_MISC_CONFIG *UserMisc; + UINT32 RegisterAccessWidth; + UINT32 BaudRate; + UINT32 PciDeviceInfoSize; + + ErrorCount = 0; + UserMisc = &Config->Misc; + + RegisterAccessWidth = UserMisc->Serial.RegisterAccessWidth; + if (RegisterAccessWidth != 8U && RegisterAccessWidth != 32U) { + DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth can only be 8 or 32!\n")); + ++ErrorCount; + } + + BaudRate = UserMisc->Serial.BaudRate; + if (!ValidateBaudRate (BaudRate)) { + ++ErrorCount; + } + + // + // Reference: + // https://github.com/acidanthera/bugtracker/issues/1954#issuecomment-1084220743 + // + PciDeviceInfoSize = UserMisc->Serial.PciDeviceInfo.Size; + if (PciDeviceInfoSize <= 41U) { + DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed 41!\n")); + ++ErrorCount; + } + + return ErrorCount; +} + STATIC UINT32 CheckMiscTools ( @@ -662,6 +735,7 @@ CheckMisc ( &CheckMiscDebug, &CheckMiscEntries, &CheckMiscSecurity, + &CheckMiscSerial, &CheckMiscTools }; From e991b400ac2a5ee39dc0dad678e720bb421519f9 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 14:42:11 +0200 Subject: [PATCH 15/40] ocvalidate: Fix logic --- Utilities/ocvalidate/ValidateMisc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index a6eadda5d5d..6eb9af14675 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -631,7 +631,7 @@ CheckMiscSerial ( // https://github.com/acidanthera/bugtracker/issues/1954#issuecomment-1084220743 // PciDeviceInfoSize = UserMisc->Serial.PciDeviceInfo.Size; - if (PciDeviceInfoSize <= 41U) { + if (PciDeviceInfoSize > 41U) { DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed 41!\n")); ++ErrorCount; } From 8ce6d50687f3b52abb77b6bc78971ced6af5beeb Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 14:45:52 +0200 Subject: [PATCH 16/40] ocvalidate: Add ref links --- Utilities/ocvalidate/ValidateMisc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index 6eb9af14675..b4097e66cb2 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -574,6 +574,10 @@ ValidateBaudRate ( { UINTN Index; + // + // Reference: + // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1223 + // STATIC UINT32 AllowedBaudRate[] = { 921600U, 460800U, 230400U, 115200U, 57600U, 38400U, 19200U, 9600U, 7200U, @@ -615,6 +619,10 @@ CheckMiscSerial ( ErrorCount = 0; UserMisc = &Config->Misc; + // + // Reference: + // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1199-L1200 + // RegisterAccessWidth = UserMisc->Serial.RegisterAccessWidth; if (RegisterAccessWidth != 8U && RegisterAccessWidth != 32U) { DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth can only be 8 or 32!\n")); From 51edd6bd79b15133b73da7ecd0533ca4d2bf09ab Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 15:09:08 +0200 Subject: [PATCH 17/40] ocvalidate: Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF --- Utilities/ocvalidate/ValidateMisc.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index b4097e66cb2..a490d5f5fef 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -614,6 +614,7 @@ CheckMiscSerial ( OC_MISC_CONFIG *UserMisc; UINT32 RegisterAccessWidth; UINT32 BaudRate; + CONST UINT8 *PciDeviceInfo; UINT32 PciDeviceInfoSize; ErrorCount = 0; @@ -636,9 +637,15 @@ CheckMiscSerial ( // // Reference: + // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1393 // https://github.com/acidanthera/bugtracker/issues/1954#issuecomment-1084220743 // + PciDeviceInfo = OC_BLOB_GET (&UserMisc->Serial.PciDeviceInfo); PciDeviceInfoSize = UserMisc->Serial.PciDeviceInfo.Size; + if (PciDeviceInfo[PciDeviceInfoSize - 1] != 0xFFU) { + DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); + ++ErrorCount; + } if (PciDeviceInfoSize > 41U) { DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed 41!\n")); ++ErrorCount; From f219375d3d28e782eb3c467465795a0c62c76597 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 15:12:56 +0200 Subject: [PATCH 18/40] ocvalidate: Misc->Serial->RegisterAccessWidth must be divisible by 4 excluding the last 0xFF --- Utilities/ocvalidate/ValidateMisc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index a490d5f5fef..4ef7e719370 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -646,6 +646,9 @@ CheckMiscSerial ( DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); ++ErrorCount; } + if ((PciDeviceInfoSize - sizeof (0xFFU)) % 4 != 0) { + DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth must be divisible by 4 excluding the last 0xFF!\n")); + } if (PciDeviceInfoSize > 41U) { DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed 41!\n")); ++ErrorCount; From aa4133eb545f833e1acb31efc7757f01230ad919 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 15:17:38 +0200 Subject: [PATCH 19/40] ocvalidate: Sync Misc->Serial checklist --- Utilities/ocvalidate/README.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Utilities/ocvalidate/README.md b/Utilities/ocvalidate/README.md index 13b2c269048..97384bc78bb 100644 --- a/Utilities/ocvalidate/README.md +++ b/Utilities/ocvalidate/README.md @@ -78,6 +78,12 @@ Utility to validate whether a `config.plist` matches requirements and convention - DmgLoading: Only `Disabled`, `Signed`, or `Any` are accepted. - Vault: Only `Optional`, `Basic`, or `Secure` are accepted. - SecureBootModel: Only `Default`, `Disabled`, `j137`, `j680`, `j132`, `j174`, `j140k`, `j780`, `j213`, `j140a`, `j152f`, `j160`, `j230k`, `j214k`, `j223`, `j215`, `j185`, `j185f`, or `x86legacy` are accepted. +#### Serial +- RegisterAccessWidth: Only `8` or `32` are accepted. +- BaudRate: Only `921600`, `460800`, `230400`, `115200`, `57600`, `38400`, `19200`, `9600`, `7200`, `4800`, `3600`, `2400`, `2000`, `1800`, `1200`, `600`, `300`, `150`, `134`, `110`, `75`, or `50` are accepted. +- PciDeviceInfo: The last byte must be `0xFF`. +- PciDeviceInfo: Excluding the last byte `0xFF`, the rest must be divisible by 4. +- PciDeviceInfo: Maximum allowed size is 41. ### NVRAM - Requirements here all follow Global Rules. In addition, the following keys and values are checked: From a4667c0d1a08d4781a1695ad320fd2af2cb6b6ac Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 15:29:26 +0200 Subject: [PATCH 20/40] ocvalidate: Fix PciDeviceInfoSize check --- Utilities/ocvalidate/ValidateMisc.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index 4ef7e719370..9d1dc86965e 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -646,7 +646,11 @@ CheckMiscSerial ( DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); ++ErrorCount; } - if ((PciDeviceInfoSize - sizeof (0xFFU)) % 4 != 0) { + if (PciDeviceInfoSize == 0) { + DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth cannot be empty (use 0xFF instead)!\n")); + ++ErrorCount; + } + if (PciDeviceInfoSize > 0 && (PciDeviceInfoSize - sizeof (0xFFU)) % 4 != 0) { DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth must be divisible by 4 excluding the last 0xFF!\n")); } if (PciDeviceInfoSize > 41U) { From 9a189f57270137733b096b88716b58de55393c12 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 15:31:59 +0200 Subject: [PATCH 21/40] OcConfigurationLib: Drop SerialInit --- Docs/Sample.plist | 2 -- Docs/SampleCustom.plist | 2 -- Include/Acidanthera/Library/OcConfigurationLib.h | 1 - Library/OcConfigurationLib/OcConfigurationLib.c | 1 - 4 files changed, 6 deletions(-) diff --git a/Docs/Sample.plist b/Docs/Sample.plist index cbd41e922ea..aba4faa6141 100644 --- a/Docs/Sample.plist +++ b/Docs/Sample.plist @@ -1095,8 +1095,6 @@ 2147483650 LogModules * - SerialInit - SysReport Target diff --git a/Docs/SampleCustom.plist b/Docs/SampleCustom.plist index 104cd9a5cb4..d999ed19f00 100644 --- a/Docs/SampleCustom.plist +++ b/Docs/SampleCustom.plist @@ -1095,8 +1095,6 @@ 2147483650 LogModules * - SerialInit - SysReport Target diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index d05eccaf130..17ecb238a65 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -353,7 +353,6 @@ _(BOOLEAN , AppleDebug , , FALSE , ()) \ _(BOOLEAN , ApplePanic , , FALSE , ()) \ _(BOOLEAN , DisableWatchDog , , FALSE , ()) \ - _(BOOLEAN , SerialInit , , FALSE , ()) \ _(BOOLEAN , SysReport , , FALSE , ()) \ _(OC_STRING , LogModules , , OC_STRING_CONSTR ("*", _, __) , OC_DESTR (OC_STRING)) OC_DECLARE (OC_MISC_DEBUG) diff --git a/Library/OcConfigurationLib/OcConfigurationLib.c b/Library/OcConfigurationLib/OcConfigurationLib.c index 6defd68bafb..dad1a00cfdd 100644 --- a/Library/OcConfigurationLib/OcConfigurationLib.c +++ b/Library/OcConfigurationLib/OcConfigurationLib.c @@ -429,7 +429,6 @@ mMiscConfigurationDebugSchema[] = { OC_SCHEMA_INTEGER_IN ("DisplayDelay", OC_GLOBAL_CONFIG, Misc.Debug.DisplayDelay), OC_SCHEMA_INTEGER_IN ("DisplayLevel", OC_GLOBAL_CONFIG, Misc.Debug.DisplayLevel), OC_SCHEMA_STRING_IN ("LogModules", OC_GLOBAL_CONFIG, Misc.Debug.LogModules), - OC_SCHEMA_BOOLEAN_IN ("SerialInit", OC_GLOBAL_CONFIG, Misc.Debug.SerialInit), OC_SCHEMA_BOOLEAN_IN ("SysReport", OC_GLOBAL_CONFIG, Misc.Debug.SysReport), OC_SCHEMA_INTEGER_IN ("Target", OC_GLOBAL_CONFIG, Misc.Debug.Target) }; From a383a622c8e4c36b8a0a8081aca488f9a3657663 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 15:49:29 +0200 Subject: [PATCH 22/40] ocvalidate: Fix logic --- Utilities/ocvalidate/ValidateMisc.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index 9d1dc86965e..da1ab0595de 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -646,16 +646,14 @@ CheckMiscSerial ( DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); ++ErrorCount; } - if (PciDeviceInfoSize == 0) { - DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth cannot be empty (use 0xFF instead)!\n")); - ++ErrorCount; - } - if (PciDeviceInfoSize > 0 && (PciDeviceInfoSize - sizeof (0xFFU)) % 4 != 0) { - DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth must be divisible by 4 excluding the last 0xFF!\n")); - } if (PciDeviceInfoSize > 41U) { DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed 41!\n")); ++ErrorCount; + } else if (PciDeviceInfoSize == 0) { + DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth cannot be empty (use 0xFF instead)!\n")); + ++ErrorCount; + } else if ((PciDeviceInfoSize - sizeof (0xFFU)) % 4 != 0) { + DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth must be divisible by 4 excluding the last 0xFF!\n")); } return ErrorCount; From 43c48bf48ca0112e1282dad64d9134673d0436cb Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 16:41:09 +0200 Subject: [PATCH 23/40] Docs: Sync Configuration.tex --- Docs/Configuration.tex | 131 ++++++++++++++++++++++++++++++++++------- 1 file changed, 110 insertions(+), 21 deletions(-) diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex index f0abcb3a15b..2d45a196f7f 100755 --- a/Docs/Configuration.tex +++ b/Docs/Configuration.tex @@ -3154,6 +3154,13 @@ \subsection{Properties}\label{miscprops} \textbf{Description}: Apply the security configuration described in the \hyperref[miscsecurityprops]{Security Properties} section below. +\item + \texttt{Serial}\\ + \textbf{Type}: \texttt{plist\ dict}\\ + \textbf{Description}: Update the PCD values listed in + \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf}{BaseSerialPortLib16550.inf}. + Refer to \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec} for the explanations of each key. + \item \texttt{Tools}\label{misctools}\\ \textbf{Type}: \texttt{plist\ array}\\ @@ -3741,26 +3748,6 @@ \subsection{Debug Properties}\label{miscdebugprops} \emph{Note 2}: Messages printed before the configuration of log protocol cannot be filtered. -\item - \texttt{SerialInit}\\ - \textbf{Type}: \texttt{plist\ boolean}\\ - \textbf{Failsafe}: \texttt{false}\\ - \textbf{Description}: Perform serial port initialisation. - - This option will perform serial port initialisation within OpenCore prior to enabling - (any) debug logging. Serial port configuration is defined via PCDs at compile time - in \texttt{gEfiMdeModulePkgTokenSpaceGuid} GUID. - - Default values as found in \texttt{MdeModulePkg.dec} are as follows: - - \begin{itemize} - \tightlist - \item \texttt{PcdSerialBaudRate} --- Baud rate: \texttt{115200}. - \item \texttt{PcdSerialLineControl} --- Line control: no parity, 8 data bits, 1 stop bit. - \end{itemize} - - Refer to the \hyperref[troubleshootingdebug]{\texttt{Debugging}} section for details. - \item \texttt{SysReport}\\ \textbf{Type}: \texttt{plist\ boolean}\\ @@ -4422,6 +4409,108 @@ \subsection{Security Properties}\label{miscsecurityprops} \end{enumerate} +\subsection{Serial Properties}\label{miscserialprops} + +\begin{enumerate} +\item + \texttt{BaudRate}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{115200}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{ClockRate}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{1843200}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{ExtendedTxFifoSize}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{64}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{FifoControl}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{0x07}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{Init}\\ + \textbf{Type}: \texttt{plist\ boolean}\\ + \textbf{Failsafe}: \texttt{false}\\ + \textbf{Description}: Perform serial port initialisation. + + This option will perform serial port initialisation within OpenCore prior to enabling + (any) debug logging. Serial port configuration is defined via PCDs at compile time + in \texttt{gEfiMdeModulePkgTokenSpaceGuid} GUID. + + Default values as found in \texttt{MdeModulePkg.dec} are as follows: + + \begin{itemize} + \tightlist + \item \texttt{PcdSerialBaudRate} --- Baud rate: \texttt{115200}. + \item \texttt{PcdSerialLineControl} --- Line control: no parity, 8 data bits, 1 stop bit. + \end{itemize} + + Refer to the \hyperref[troubleshootingdebug]{\texttt{Debugging}} section for details. + +\item + \texttt{LineControl}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{0x07}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{PciDeviceInfo}\\ + \textbf{Type}: \texttt{plist\ data}\\ + \textbf{Failsafe}: \texttt{0xFF}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{RegisterAccessWidth}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{8}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{RegisterBase}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{0x03F8}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{RegisterStride}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{1}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{UseHardwareFlowControl}\\ + \textbf{Type}: \texttt{plist\ boolean}\\ + \textbf{Failsafe}: \texttt{false}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{UseMmio}\\ + \textbf{Type}: \texttt{plist\ boolean}\\ + \textbf{Failsafe}: \texttt{false}\\ + \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\end{enumerate} + \subsection{Entry Properties}\label{miscentryprops} \begin{enumerate} @@ -8612,7 +8701,7 @@ \subsection{Debugging}\label{troubleshootingdebug} To obtain the log during boot serial port debugging can be used. Serial port debugging is enabled in \texttt{Target}, e.g. \texttt{0xB} for onscreen with serial. To -initialise serial within OpenCore use \texttt{SerialInit} configuration option. +initialise serial within OpenCore use \texttt{Init} configuration option under \texttt{Misc->Serial} with other values properly set. For macOS the best choice is CP2102-based UART devices. Connect motherboard \texttt{TX} to USB UART \texttt{RX}, and motherboard \texttt{GND} to USB UART \texttt{GND}. Use \texttt{screen} utility to get the output, or download GUI software, such as From 026e0f3f447c49d5ac3e3edddb20e0b295991020 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 17:12:54 +0200 Subject: [PATCH 24/40] OcConfigurationLib: Try to call pcd setters --- .../Acidanthera/Library/OcConfigurationLib.h | 6 +++++- .../OcConfigurationLib/OcConfigurationLib.inf | 18 ++++++++++++++++++ 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index 17ecb238a65..79e71759a67 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -18,6 +18,7 @@ #include #include #include +#include /** ACPI section @@ -407,7 +408,10 @@ typedef enum { OC_DECLARE (OC_MISC_TOOLS_ARRAY) #define OC_MISC_SERIAL_FIELDS(_, __) \ - _(UINT32 , BaudRate , , 115200 , ()) \ + // + // TODO: Call pcd getters & Fix build + // + _(UINT32 , BaudRate , , PcdGet8 (PcdSerialRegisterAccessWidth) , ()) \ _(UINT32 , ClockRate , , 1843200 , ()) \ _(BOOLEAN , DetectCable , , FALSE , ()) \ _(UINT32 , ExtendedTxFifoSize , , 64 , ()) \ diff --git a/Library/OcConfigurationLib/OcConfigurationLib.inf b/Library/OcConfigurationLib/OcConfigurationLib.inf index 9d24be408e1..b722540a259 100755 --- a/Library/OcConfigurationLib/OcConfigurationLib.inf +++ b/Library/OcConfigurationLib/OcConfigurationLib.inf @@ -33,8 +33,26 @@ [Packages] MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec OpenCorePkg/OpenCorePkg.dec +[Guids] + gEfiMdeModulePkgTokenSpaceGuid + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## CONSUMES + [LibraryClasses] BaseLib DebugLib From 3ecc1229cfc0e59cd2ba0a6743efd4b8f981728b Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 17:32:21 +0200 Subject: [PATCH 25/40] Revert "OcConfigurationLib: Try to call pcd setters" This reverts commit 3968b3b08dd33975163d01812677c62fa0e6948f. --- .../Acidanthera/Library/OcConfigurationLib.h | 6 +----- .../OcConfigurationLib/OcConfigurationLib.inf | 18 ------------------ 2 files changed, 1 insertion(+), 23 deletions(-) diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index 79e71759a67..17ecb238a65 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -18,7 +18,6 @@ #include #include #include -#include /** ACPI section @@ -408,10 +407,7 @@ typedef enum { OC_DECLARE (OC_MISC_TOOLS_ARRAY) #define OC_MISC_SERIAL_FIELDS(_, __) \ - // - // TODO: Call pcd getters & Fix build - // - _(UINT32 , BaudRate , , PcdGet8 (PcdSerialRegisterAccessWidth) , ()) \ + _(UINT32 , BaudRate , , 115200 , ()) \ _(UINT32 , ClockRate , , 1843200 , ()) \ _(BOOLEAN , DetectCable , , FALSE , ()) \ _(UINT32 , ExtendedTxFifoSize , , 64 , ()) \ diff --git a/Library/OcConfigurationLib/OcConfigurationLib.inf b/Library/OcConfigurationLib/OcConfigurationLib.inf index b722540a259..9d24be408e1 100755 --- a/Library/OcConfigurationLib/OcConfigurationLib.inf +++ b/Library/OcConfigurationLib/OcConfigurationLib.inf @@ -33,26 +33,8 @@ [Packages] MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec OpenCorePkg/OpenCorePkg.dec -[Guids] - gEfiMdeModulePkgTokenSpaceGuid - -[Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth ## SOMETIMES_CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## CONSUMES - [LibraryClasses] BaseLib DebugLib From ec9edf16656e8989cd001328fa204cf9e7adf074 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 17:40:01 +0200 Subject: [PATCH 26/40] OcConfigurationLib: Fix PciDeviceInfo failsafe value --- .../Acidanthera/Library/OcConfigurationLib.h | 31 +++++++++++-------- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index 17ecb238a65..8542bab4889 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -406,20 +406,25 @@ typedef enum { OC_ARRAY (OC_MISC_TOOLS_ENTRY, _, __) OC_DECLARE (OC_MISC_TOOLS_ARRAY) +/// +/// Reference: +/// https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +/// https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec +/// #define OC_MISC_SERIAL_FIELDS(_, __) \ - _(UINT32 , BaudRate , , 115200 , ()) \ - _(UINT32 , ClockRate , , 1843200 , ()) \ - _(BOOLEAN , DetectCable , , FALSE , ()) \ - _(UINT32 , ExtendedTxFifoSize , , 64 , ()) \ - _(UINT8 , FifoControl , , 7 , ()) \ - _(BOOLEAN , Init , , FALSE , ()) \ - _(UINT8 , LineControl , , 3 , ()) \ - _(OC_DATA , PciDeviceInfo , , OC_EDATA_CONSTR (_, __) , OC_DESTR (OC_DATA) ) \ - _(UINT8 , RegisterAccessWidth , , 8 , ()) \ - _(UINT64 , RegisterBase , , 0x03F8 , ()) \ - _(UINT32 , RegisterStride , , 1 , ()) \ - _(BOOLEAN , UseHardwareFlowControl , , FALSE , ()) \ - _(BOOLEAN , UseMmio , , FALSE , ()) + _(UINT32 , BaudRate , , 115200 , ()) \ + _(UINT32 , ClockRate , , 1843200 , ()) \ + _(BOOLEAN , DetectCable , , FALSE , ()) \ + _(UINT32 , ExtendedTxFifoSize , , 64 , ()) \ + _(UINT8 , FifoControl , , 7 , ()) \ + _(BOOLEAN , Init , , FALSE , ()) \ + _(UINT8 , LineControl , , 3 , ()) \ + _(OC_DATA , PciDeviceInfo , , OC_DATA_CONSTR ({0xFF}, _, __) , OC_DESTR (OC_DATA) ) \ + _(UINT8 , RegisterAccessWidth , , 8 , ()) \ + _(UINT64 , RegisterBase , , 0x03F8 , ()) \ + _(UINT32 , RegisterStride , , 1 , ()) \ + _(BOOLEAN , UseHardwareFlowControl , , FALSE , ()) \ + _(BOOLEAN , UseMmio , , FALSE , ()) OC_DECLARE (OC_MISC_SERIAL) #define OC_MISC_CONFIG_FIELDS(_, __) \ From 021ca588fdecc72fe5015902305eda21108204dc Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 17:41:59 +0200 Subject: [PATCH 27/40] OcConfigurationLib: Fix indentation --- Include/Acidanthera/Library/OcConfigurationLib.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index 8542bab4889..763d3977a24 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -419,7 +419,7 @@ typedef enum { _(UINT8 , FifoControl , , 7 , ()) \ _(BOOLEAN , Init , , FALSE , ()) \ _(UINT8 , LineControl , , 3 , ()) \ - _(OC_DATA , PciDeviceInfo , , OC_DATA_CONSTR ({0xFF}, _, __) , OC_DESTR (OC_DATA) ) \ + _(OC_DATA , PciDeviceInfo , , OC_DATA_CONSTR ({0xFF}, _, __) , OC_DESTR (OC_DATA)) \ _(UINT8 , RegisterAccessWidth , , 8 , ()) \ _(UINT64 , RegisterBase , , 0x03F8 , ()) \ _(UINT32 , RegisterStride , , 1 , ()) \ From 07194b2bcb41526cb11f3b1e965b204ba26a2765 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 17:43:50 +0200 Subject: [PATCH 28/40] OcMainLib: Remove redundant notes --- Library/OcMainLib/OpenCoreMisc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index d699e9ef73b..d053c36d364 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -475,9 +475,6 @@ OcMiscEarlyInit ( // // Update PCD values. // - // Keys: https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf - // Values: https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1202 - // PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); PatchPcdSetBool (PcdSerialUseMmio, Config->Misc.Serial.UseMmio); PatchPcdSetBool (PcdSerialUseHardwareFlowControl, Config->Misc.Serial.UseHardwareFlowControl); From 33f11d5099d911225b864d05a64e822c15f85d3a Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 18:41:14 +0200 Subject: [PATCH 29/40] OcMainLib: Fix memory corruption --- Library/OcMainLib/OpenCoreMisc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index d053c36d364..951b2de42b3 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -408,6 +408,7 @@ OcMiscEarlyInit ( EFI_TIME BootTime; CONST CHAR8 *AsciiVault; OCS_VAULT_MODE Vault; + UINTN PciDeviceInfoSize; ConfigData = OcStorageReadFileUnicode ( Storage, @@ -484,7 +485,8 @@ OcMiscEarlyInit ( PatchPcdSet8 (PcdSerialLineControl, Config->Misc.Serial.LineControl); PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); - PatchPcdSetPtr (PcdSerialPciDeviceInfo, (UINTN *) &Config->Misc.Serial.PciDeviceInfo.Size, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + PciDeviceInfoSize = Config->Misc.Serial.PciDeviceInfo.Size; + PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PciDeviceInfoSize, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); From ec203cfb266ae61fef7cb2ae43abe80d424b3f63 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 18:47:47 +0200 Subject: [PATCH 30/40] OcMainLib: Only update PcdSerialPciDeviceInfo with sane size --- Include/Acidanthera/Library/OcConfigurationLib.h | 6 ++++++ Library/OcMainLib/OpenCoreMisc.c | 6 +++++- Utilities/ocvalidate/ValidateMisc.c | 5 ++--- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index 763d3977a24..588278c7136 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -406,6 +406,12 @@ typedef enum { OC_ARRAY (OC_MISC_TOOLS_ENTRY, _, __) OC_DECLARE (OC_MISC_TOOLS_ARRAY) +/// +/// Reference: +/// https://github.com/acidanthera/bugtracker/issues/1954#issuecomment-1084220743 +/// +#define OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE 41U + /// /// Reference: /// https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index 951b2de42b3..f46d219ec21 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -486,7 +486,11 @@ OcMiscEarlyInit ( PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); PciDeviceInfoSize = Config->Misc.Serial.PciDeviceInfo.Size; - PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PciDeviceInfoSize, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + if (PciDeviceInfoSize <= OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { + PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PciDeviceInfoSize, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + } else { + DEBUG ((DEBUG_INFO, "OC: Skipping setting PcdSerialPciDeviceInfo with borked size %u\n", PciDeviceInfoSize)); + } PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index da1ab0595de..042b4c1b8f6 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -638,7 +638,6 @@ CheckMiscSerial ( // // Reference: // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1393 - // https://github.com/acidanthera/bugtracker/issues/1954#issuecomment-1084220743 // PciDeviceInfo = OC_BLOB_GET (&UserMisc->Serial.PciDeviceInfo); PciDeviceInfoSize = UserMisc->Serial.PciDeviceInfo.Size; @@ -646,8 +645,8 @@ CheckMiscSerial ( DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); ++ErrorCount; } - if (PciDeviceInfoSize > 41U) { - DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed 41!\n")); + if (PciDeviceInfoSize > OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { + DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed %u!\n", OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE)); ++ErrorCount; } else if (PciDeviceInfoSize == 0) { DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth cannot be empty (use 0xFF instead)!\n")); From 1640545f23f7a5acb4da4d38db1d53dbcc77a1ed Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Thu, 31 Mar 2022 22:04:42 +0200 Subject: [PATCH 31/40] OcMainLib: Abort serial port init on error --- Library/OcMainLib/OpenCoreMisc.c | 40 ++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 17 deletions(-) diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index f46d219ec21..79a6655dfaa 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -474,27 +474,33 @@ OcMiscEarlyInit ( if (Config->Misc.Serial.Init) { // - // Update PCD values. + // Validate the size of PciDeviceInfo. Abort on error. // - PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); - PatchPcdSetBool (PcdSerialUseMmio, Config->Misc.Serial.UseMmio); - PatchPcdSetBool (PcdSerialUseHardwareFlowControl, Config->Misc.Serial.UseHardwareFlowControl); - PatchPcdSetBool (PcdSerialDetectCable, Config->Misc.Serial.DetectCable); - PatchPcdSet64 (PcdSerialRegisterBase, Config->Misc.Serial.RegisterBase); - PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); - PatchPcdSet8 (PcdSerialLineControl, Config->Misc.Serial.LineControl); - PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); - PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); PciDeviceInfoSize = Config->Misc.Serial.PciDeviceInfo.Size; - if (PciDeviceInfoSize <= OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { - PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PciDeviceInfoSize, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + if (PciDeviceInfoSize > OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { + DEBUG ((DEBUG_INFO, "OC: Aborting serial port init with borked PciDeviceInfo size %u\n", PciDeviceInfoSize)); } else { - DEBUG ((DEBUG_INFO, "OC: Skipping setting PcdSerialPciDeviceInfo with borked size %u\n", PciDeviceInfoSize)); + // + // Update PCD values. + // + PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PciDeviceInfoSize, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); + PatchPcdSetBool (PcdSerialUseMmio, Config->Misc.Serial.UseMmio); + PatchPcdSetBool (PcdSerialUseHardwareFlowControl, Config->Misc.Serial.UseHardwareFlowControl); + PatchPcdSetBool (PcdSerialDetectCable, Config->Misc.Serial.DetectCable); + PatchPcdSet64 (PcdSerialRegisterBase, Config->Misc.Serial.RegisterBase); + PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); + PatchPcdSet8 (PcdSerialLineControl, Config->Misc.Serial.LineControl); + PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); + PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); + PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); + PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); + + // + // Initialize serial port. + // + SerialPortInitialize (); } - PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); - PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); - - SerialPortInitialize (); } OcConfigureLogProtocol ( From 653e35f13c3fed246d8d6297e20e5d10f27274ef Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Fri, 1 Apr 2022 09:22:05 +0200 Subject: [PATCH 32/40] ocvalidate: Fix size calculation --- Utilities/ocvalidate/ValidateMisc.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index 042b4c1b8f6..d1f48364ebf 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -578,7 +578,7 @@ ValidateBaudRate ( // Reference: // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1223 // - STATIC UINT32 AllowedBaudRate[] = { + STATIC CONST UINT32 AllowedBaudRate[] = { 921600U, 460800U, 230400U, 115200U, 57600U, 38400U, 19200U, 9600U, 7200U, 4800U, 3600U, 2400U, 2000U, 1800U, @@ -641,17 +641,16 @@ CheckMiscSerial ( // PciDeviceInfo = OC_BLOB_GET (&UserMisc->Serial.PciDeviceInfo); PciDeviceInfoSize = UserMisc->Serial.PciDeviceInfo.Size; - if (PciDeviceInfo[PciDeviceInfoSize - 1] != 0xFFU) { - DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); - ++ErrorCount; - } if (PciDeviceInfoSize > OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed %u!\n", OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE)); ++ErrorCount; } else if (PciDeviceInfoSize == 0) { DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth cannot be empty (use 0xFF instead)!\n")); ++ErrorCount; - } else if ((PciDeviceInfoSize - sizeof (0xFFU)) % 4 != 0) { + } else if (PciDeviceInfo[PciDeviceInfoSize - 1] != 0xFFU) { + DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); + ++ErrorCount; + } else if ((PciDeviceInfoSize - 1) % 4 != 0) { DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth must be divisible by 4 excluding the last 0xFF!\n")); } From aede0dc9d7b2aa52311ce3f8551d5aca44876e47 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Fri, 1 Apr 2022 16:10:10 +0200 Subject: [PATCH 33/40] Docs: Provide more details on Serial section --- Docs/Configuration.tex | 54 +++++++++++++++++++++++++++--------------- 1 file changed, 35 insertions(+), 19 deletions(-) diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex index 2d45a196f7f..de1eaaaf9a6 100755 --- a/Docs/Configuration.tex +++ b/Docs/Configuration.tex @@ -3157,7 +3157,11 @@ \subsection{Properties}\label{miscprops} \item \texttt{Serial}\\ \textbf{Type}: \texttt{plist\ dict}\\ - \textbf{Description}: Update the PCD values listed in + \textbf{Description}: Configure PCD values required by \texttt{BaseSerialPortLib16550} + for serial ports to properly function. Values are listed and described in the + \hyperref[miscserialprops]{Serial Properties} section below. + + This section overrides the PCD values listed in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf}{BaseSerialPortLib16550.inf}. Refer to \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec} for the explanations of each key. @@ -4416,28 +4420,36 @@ \subsection{Serial Properties}\label{miscserialprops} \texttt{BaudRate}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{115200}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate} + \textbf{Description}: Set the baud rate for serial port. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item \texttt{ClockRate}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{1843200}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate} + \textbf{Description}: Set the clock rate for serial port. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item \texttt{ExtendedTxFifoSize}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{64}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize} + \textbf{Description}: Set the extended transmit FIFO size for serial port. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item \texttt{FifoControl}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{0x07}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl} + \textbf{Description}: Configure serial port FIFO Control settings. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item @@ -4450,28 +4462,24 @@ \subsection{Serial Properties}\label{miscserialprops} (any) debug logging. Serial port configuration is defined via PCDs at compile time in \texttt{gEfiMdeModulePkgTokenSpaceGuid} GUID. - Default values as found in \texttt{MdeModulePkg.dec} are as follows: - - \begin{itemize} - \tightlist - \item \texttt{PcdSerialBaudRate} --- Baud rate: \texttt{115200}. - \item \texttt{PcdSerialLineControl} --- Line control: no parity, 8 data bits, 1 stop bit. - \end{itemize} - Refer to the \hyperref[troubleshootingdebug]{\texttt{Debugging}} section for details. \item \texttt{LineControl}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{0x07}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl} + \textbf{Description}: Configure serial port Line Control settings. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item \texttt{PciDeviceInfo}\\ \textbf{Type}: \texttt{plist\ data}\\ \textbf{Failsafe}: \texttt{0xFF}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo} + \textbf{Description}: Set PCI serial device information. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item @@ -4485,28 +4493,36 @@ \subsection{Serial Properties}\label{miscserialprops} \texttt{RegisterBase}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{0x03F8}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase} + \textbf{Description}: + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item \texttt{RegisterStride}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{1}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride} + \textbf{Description}: Set the base address of serial port registers. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item \texttt{UseHardwareFlowControl}\\ \textbf{Type}: \texttt{plist\ boolean}\\ \textbf{Failsafe}: \texttt{false}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl} + \textbf{Description}: Enable serial port hardware flow control. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item \texttt{UseMmio}\\ \textbf{Type}: \texttt{plist\ boolean}\\ \textbf{Failsafe}: \texttt{false}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio} + \textbf{Description}: Indicate whether the serial port registers are in MMIO space. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \end{enumerate} From 582ce6b086d8c3b9efd4742290b949cecda2f2df Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Sat, 2 Apr 2022 22:33:27 +0200 Subject: [PATCH 34/40] ocvalidate: Fix typo --- Utilities/ocvalidate/ValidateMisc.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index d1f48364ebf..b3e6a8423e8 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -642,16 +642,17 @@ CheckMiscSerial ( PciDeviceInfo = OC_BLOB_GET (&UserMisc->Serial.PciDeviceInfo); PciDeviceInfoSize = UserMisc->Serial.PciDeviceInfo.Size; if (PciDeviceInfoSize > OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { - DEBUG ((DEBUG_WARN, "Size of Misc->Serial->RegisterAccessWidth cannot exceed %u!\n", OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE)); + DEBUG ((DEBUG_WARN, "Size of Misc->Serial->PciDeviceInfo cannot exceed %u!\n", OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE)); ++ErrorCount; } else if (PciDeviceInfoSize == 0) { - DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth cannot be empty (use 0xFF instead)!\n")); + DEBUG ((DEBUG_WARN, "Misc->Serial->PciDeviceInfo cannot be empty (use 0xFF instead)!\n")); ++ErrorCount; } else if (PciDeviceInfo[PciDeviceInfoSize - 1] != 0xFFU) { - DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->RegisterAccessWidth must be 0xFF!\n")); + DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->PciDeviceInfo must be 0xFF!\n")); ++ErrorCount; } else if ((PciDeviceInfoSize - 1) % 4 != 0) { - DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth must be divisible by 4 excluding the last 0xFF!\n")); + DEBUG ((DEBUG_WARN, "Misc->Serial->PciDeviceInfo must be divisible by 4 excluding the last 0xFF!\n")); + ++ErrorCount; } return ErrorCount; From a2fae24dcc3beeaf93b184d1363f628f703d6d3f Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Sat, 2 Apr 2022 22:39:43 +0200 Subject: [PATCH 35/40] Docs: Fix typo --- Docs/Configuration.tex | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex index de1eaaaf9a6..d9484e9a851 100755 --- a/Docs/Configuration.tex +++ b/Docs/Configuration.tex @@ -4493,7 +4493,7 @@ \subsection{Serial Properties}\label{miscserialprops} \texttt{RegisterBase}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{0x03F8}\\ - \textbf{Description}: + \textbf{Description}: Set the base address of serial port registers. This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. @@ -4502,7 +4502,7 @@ \subsection{Serial Properties}\label{miscserialprops} \texttt{RegisterStride}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{1}\\ - \textbf{Description}: Set the base address of serial port registers. + \textbf{Description}: Set the serial port register stride in bytes. This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. From 9b26c63e9b6ac5d3957ca7e70ff00316b507d18a Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Sat, 2 Apr 2022 22:44:46 +0200 Subject: [PATCH 36/40] Docs: Sync with code-wise behavior --- Docs/Configuration.tex | 1 + 1 file changed, 1 insertion(+) diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex index d9484e9a851..497769d393f 100755 --- a/Docs/Configuration.tex +++ b/Docs/Configuration.tex @@ -4457,6 +4457,7 @@ \subsection{Serial Properties}\label{miscserialprops} \textbf{Type}: \texttt{plist\ boolean}\\ \textbf{Failsafe}: \texttt{false}\\ \textbf{Description}: Perform serial port initialisation. + When this option is set to \texttt{false}, no keys from this section will be overridden. This option will perform serial port initialisation within OpenCore prior to enabling (any) debug logging. Serial port configuration is defined via PCDs at compile time From ccca02896220a7c218bf95cfdfdcd119d4ada81f Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Sat, 2 Apr 2022 22:53:18 +0200 Subject: [PATCH 37/40] Docs: Drop wrong message --- Docs/Configuration.tex | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex index 497769d393f..ad937ddabd1 100755 --- a/Docs/Configuration.tex +++ b/Docs/Configuration.tex @@ -4460,8 +4460,7 @@ \subsection{Serial Properties}\label{miscserialprops} When this option is set to \texttt{false}, no keys from this section will be overridden. This option will perform serial port initialisation within OpenCore prior to enabling - (any) debug logging. Serial port configuration is defined via PCDs at compile time - in \texttt{gEfiMdeModulePkgTokenSpaceGuid} GUID. + (any) debug logging. Refer to the \hyperref[troubleshootingdebug]{\texttt{Debugging}} section for details. From 94d9ab616575a4c410d580304af05ff1ce111e97 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Sun, 3 Apr 2022 23:10:50 +0200 Subject: [PATCH 38/40] Docs: Add missing description for RegisterAccessWidth --- Docs/Configuration.tex | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex index ad937ddabd1..06bacd5d811 100755 --- a/Docs/Configuration.tex +++ b/Docs/Configuration.tex @@ -4486,7 +4486,9 @@ \subsection{Serial Properties}\label{miscserialprops} \texttt{RegisterAccessWidth}\\ \textbf{Type}: \texttt{plist\ integer}\\ \textbf{Failsafe}: \texttt{8}\\ - \textbf{Description}: Override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth} + \textbf{Description}: Set serial port register access width. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth} defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. \item From e154b9723016e8aeedefc5e2992bb1eb8cfa8144 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Sun, 3 Apr 2022 23:19:40 +0200 Subject: [PATCH 39/40] ocvalidate: Fix conditions logic --- Utilities/ocvalidate/ValidateMisc.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index b3e6a8423e8..ab2ccdcea4e 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -647,12 +647,16 @@ CheckMiscSerial ( } else if (PciDeviceInfoSize == 0) { DEBUG ((DEBUG_WARN, "Misc->Serial->PciDeviceInfo cannot be empty (use 0xFF instead)!\n")); ++ErrorCount; - } else if (PciDeviceInfo[PciDeviceInfoSize - 1] != 0xFFU) { - DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->PciDeviceInfo must be 0xFF!\n")); - ++ErrorCount; - } else if ((PciDeviceInfoSize - 1) % 4 != 0) { - DEBUG ((DEBUG_WARN, "Misc->Serial->PciDeviceInfo must be divisible by 4 excluding the last 0xFF!\n")); - ++ErrorCount; + } else { + if (PciDeviceInfo[PciDeviceInfoSize - 1] != 0xFFU) { + DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->PciDeviceInfo must be 0xFF!\n")); + ++ErrorCount; + } + + if ((PciDeviceInfoSize - 1) % 4 != 0) { + DEBUG ((DEBUG_WARN, "Misc->Serial->PciDeviceInfo must be divisible by 4 excluding the last 0xFF!\n")); + ++ErrorCount; + } } return ErrorCount; From 22a852d25a5e746a6491fd81fbeb68966da9d308 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Sun, 3 Apr 2022 23:31:19 +0200 Subject: [PATCH 40/40] Build: Properly initialize PcdSerialPciDeviceInfo --- OpenCorePkg.dsc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/OpenCorePkg.dsc b/OpenCorePkg.dsc index 3632ebaa484..f0d584a8d90 100755 --- a/OpenCorePkg.dsc +++ b/OpenCorePkg.dsc @@ -336,7 +336,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x07 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|1843200 - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF} + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|64 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1