From 6825e9a449f6db0a8aa8e0ca0c936995d0cf1189 Mon Sep 17 00:00:00 2001 From: PMheart <17109513+PMheart@users.noreply.github.com> Date: Mon, 4 Apr 2022 23:43:11 +0200 Subject: [PATCH] OcMainLib: Read and set serial PCD values from config (#330) --- Docs/Configuration.tex | 149 +++++++++++++++--- Docs/Sample.plist | 31 +++- Docs/SampleCustom.plist | 31 +++- .../Acidanthera/Library/OcConfigurationLib.h | 29 +++- .../OcConfigurationLib/OcConfigurationLib.c | 21 ++- Library/OcMainLib/OcMainLib.inf | 15 ++ Library/OcMainLib/OpenCoreMisc.c | 33 +++- OpenCorePkg.dsc | 14 ++ Utilities/ocvalidate/README.md | 6 + Utilities/ocvalidate/ValidateMisc.c | 97 ++++++++++++ 10 files changed, 397 insertions(+), 29 deletions(-) diff --git a/Docs/Configuration.tex b/Docs/Configuration.tex index 5c679736625..9a35ad7becd 100755 --- a/Docs/Configuration.tex +++ b/Docs/Configuration.tex @@ -3157,6 +3157,17 @@ \subsection{Properties}\label{miscprops} \textbf{Description}: Apply the security configuration described in the \hyperref[miscsecurityprops]{Security Properties} section below. +\item + \texttt{Serial}\\ + \textbf{Type}: \texttt{plist\ dict}\\ + \textbf{Description}: Configure PCD values required by \texttt{BaseSerialPortLib16550} + for serial ports to properly function. Values are listed and described in the + \hyperref[miscserialprops]{Serial Properties} section below. + + This section overrides the PCD values listed in + \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf}{BaseSerialPortLib16550.inf}. + Refer to \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec} for the explanations of each key. + \item \texttt{Tools}\label{misctools}\\ \textbf{Type}: \texttt{plist\ array}\\ @@ -3744,26 +3755,6 @@ \subsection{Debug Properties}\label{miscdebugprops} \emph{Note 2}: Messages printed before the configuration of log protocol cannot be filtered. -\item - \texttt{SerialInit}\\ - \textbf{Type}: \texttt{plist\ boolean}\\ - \textbf{Failsafe}: \texttt{false}\\ - \textbf{Description}: Perform serial port initialisation. - - This option will perform serial port initialisation within OpenCore prior to enabling - (any) debug logging. Serial port configuration is defined via PCDs at compile time - in \texttt{gEfiMdeModulePkgTokenSpaceGuid} GUID. - - Default values as found in \texttt{MdeModulePkg.dec} are as follows: - - \begin{itemize} - \tightlist - \item \texttt{PcdSerialBaudRate} --- Baud rate: \texttt{115200}. - \item \texttt{PcdSerialLineControl} --- Line control: no parity, 8 data bits, 1 stop bit. - \end{itemize} - - Refer to the \hyperref[troubleshootingdebug]{\texttt{Debugging}} section for details. - \item \texttt{SysReport}\\ \textbf{Type}: \texttt{plist\ boolean}\\ @@ -4425,6 +4416,122 @@ \subsection{Security Properties}\label{miscsecurityprops} \end{enumerate} +\subsection{Serial Properties}\label{miscserialprops} + +\begin{enumerate} +\item + \texttt{BaudRate}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{115200}\\ + \textbf{Description}: Set the baud rate for serial port. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{ClockRate}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{1843200}\\ + \textbf{Description}: Set the clock rate for serial port. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{ExtendedTxFifoSize}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{64}\\ + \textbf{Description}: Set the extended transmit FIFO size for serial port. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{FifoControl}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{0x07}\\ + \textbf{Description}: Configure serial port FIFO Control settings. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{Init}\\ + \textbf{Type}: \texttt{plist\ boolean}\\ + \textbf{Failsafe}: \texttt{false}\\ + \textbf{Description}: Perform serial port initialisation. + When this option is set to \texttt{false}, no keys from this section will be overridden. + + This option will perform serial port initialisation within OpenCore prior to enabling + (any) debug logging. + + Refer to the \hyperref[troubleshootingdebug]{\texttt{Debugging}} section for details. + +\item + \texttt{LineControl}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{0x07}\\ + \textbf{Description}: Configure serial port Line Control settings. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{PciDeviceInfo}\\ + \textbf{Type}: \texttt{plist\ data}\\ + \textbf{Failsafe}: \texttt{0xFF}\\ + \textbf{Description}: Set PCI serial device information. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{RegisterAccessWidth}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{8}\\ + \textbf{Description}: Set serial port register access width. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{RegisterBase}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{0x03F8}\\ + \textbf{Description}: Set the base address of serial port registers. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{RegisterStride}\\ + \textbf{Type}: \texttt{plist\ integer}\\ + \textbf{Failsafe}: \texttt{1}\\ + \textbf{Description}: Set the serial port register stride in bytes. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{UseHardwareFlowControl}\\ + \textbf{Type}: \texttt{plist\ boolean}\\ + \textbf{Failsafe}: \texttt{false}\\ + \textbf{Description}: Enable serial port hardware flow control. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\item + \texttt{UseMmio}\\ + \textbf{Type}: \texttt{plist\ boolean}\\ + \textbf{Failsafe}: \texttt{false}\\ + \textbf{Description}: Indicate whether the serial port registers are in MMIO space. + + This option will override the value of \texttt{gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio} + defined in \href{https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec}{MdeModulePkg.dec}. + +\end{enumerate} + \subsection{Entry Properties}\label{miscentryprops} \begin{enumerate} @@ -8615,7 +8722,7 @@ \subsection{Debugging}\label{troubleshootingdebug} To obtain the log during boot serial port debugging can be used. Serial port debugging is enabled in \texttt{Target}, e.g. \texttt{0xB} for onscreen with serial. To -initialise serial within OpenCore use \texttt{SerialInit} configuration option. +initialise serial within OpenCore use \texttt{Init} configuration option under \texttt{Misc->Serial} with other values properly set. For macOS the best choice is CP2102-based UART devices. Connect motherboard \texttt{TX} to USB UART \texttt{RX}, and motherboard \texttt{GND} to USB UART \texttt{GND}. Use \texttt{screen} utility to get the output, or download GUI software, such as diff --git a/Docs/Sample.plist b/Docs/Sample.plist index 23df8d51025..aba4faa6141 100644 --- a/Docs/Sample.plist +++ b/Docs/Sample.plist @@ -1095,8 +1095,6 @@ 2147483650 LogModules * - SerialInit - SysReport Target @@ -1156,6 +1154,35 @@ Vault Secure + Serial + + BaudRate + 115200 + ClockRate + 1843200 + DetectCable + + ExtendedTxFifoSize + 64 + FifoControl + 7 + Init + + LineControl + 3 + PciDeviceInfo + /w== + RegisterAccessWidth + 8 + RegisterBase + 1016 + RegisterStride + 1 + UseHardwareFlowControl + + UseMmio + + Tools diff --git a/Docs/SampleCustom.plist b/Docs/SampleCustom.plist index 85e70e32725..d999ed19f00 100644 --- a/Docs/SampleCustom.plist +++ b/Docs/SampleCustom.plist @@ -1095,8 +1095,6 @@ 2147483650 LogModules * - SerialInit - SysReport Target @@ -1156,6 +1154,35 @@ Vault Secure + Serial + + BaudRate + 115200 + ClockRate + 1843200 + DetectCable + + ExtendedTxFifoSize + 64 + FifoControl + 7 + Init + + LineControl + 3 + PciDeviceInfo + /w== + RegisterAccessWidth + 8 + RegisterBase + 1016 + RegisterStride + 1 + UseHardwareFlowControl + + UseMmio + + Tools diff --git a/Include/Acidanthera/Library/OcConfigurationLib.h b/Include/Acidanthera/Library/OcConfigurationLib.h index 32bb8bd2501..588278c7136 100644 --- a/Include/Acidanthera/Library/OcConfigurationLib.h +++ b/Include/Acidanthera/Library/OcConfigurationLib.h @@ -353,7 +353,6 @@ _(BOOLEAN , AppleDebug , , FALSE , ()) \ _(BOOLEAN , ApplePanic , , FALSE , ()) \ _(BOOLEAN , DisableWatchDog , , FALSE , ()) \ - _(BOOLEAN , SerialInit , , FALSE , ()) \ _(BOOLEAN , SysReport , , FALSE , ()) \ _(OC_STRING , LogModules , , OC_STRING_CONSTR ("*", _, __) , OC_DESTR (OC_STRING)) OC_DECLARE (OC_MISC_DEBUG) @@ -407,11 +406,39 @@ typedef enum { OC_ARRAY (OC_MISC_TOOLS_ENTRY, _, __) OC_DECLARE (OC_MISC_TOOLS_ARRAY) +/// +/// Reference: +/// https://github.com/acidanthera/bugtracker/issues/1954#issuecomment-1084220743 +/// +#define OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE 41U + +/// +/// Reference: +/// https://github.com/acidanthera/audk/blob/master/MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +/// https://github.com/acidanthera/audk/blob/master/MdeModulePkg/MdeModulePkg.dec +/// +#define OC_MISC_SERIAL_FIELDS(_, __) \ + _(UINT32 , BaudRate , , 115200 , ()) \ + _(UINT32 , ClockRate , , 1843200 , ()) \ + _(BOOLEAN , DetectCable , , FALSE , ()) \ + _(UINT32 , ExtendedTxFifoSize , , 64 , ()) \ + _(UINT8 , FifoControl , , 7 , ()) \ + _(BOOLEAN , Init , , FALSE , ()) \ + _(UINT8 , LineControl , , 3 , ()) \ + _(OC_DATA , PciDeviceInfo , , OC_DATA_CONSTR ({0xFF}, _, __) , OC_DESTR (OC_DATA)) \ + _(UINT8 , RegisterAccessWidth , , 8 , ()) \ + _(UINT64 , RegisterBase , , 0x03F8 , ()) \ + _(UINT32 , RegisterStride , , 1 , ()) \ + _(BOOLEAN , UseHardwareFlowControl , , FALSE , ()) \ + _(BOOLEAN , UseMmio , , FALSE , ()) + OC_DECLARE (OC_MISC_SERIAL) + #define OC_MISC_CONFIG_FIELDS(_, __) \ _(OC_MISC_BLESS_ARRAY , BlessOverride , , OC_CONSTR2 (OC_MISC_BLESS_ARRAY, _, __) , OC_DESTR (OC_MISC_BLESS_ARRAY)) \ _(OC_MISC_BOOT , Boot , , OC_CONSTR2 (OC_MISC_BOOT, _, __) , OC_DESTR (OC_MISC_BOOT)) \ _(OC_MISC_DEBUG , Debug , , OC_CONSTR2 (OC_MISC_DEBUG, _, __) , OC_DESTR (OC_MISC_DEBUG)) \ _(OC_MISC_SECURITY , Security , , OC_CONSTR2 (OC_MISC_SECURITY, _, __) , OC_DESTR (OC_MISC_SECURITY)) \ + _(OC_MISC_SERIAL , Serial , , OC_CONSTR2 (OC_MISC_SERIAL, _, __) , OC_DESTR (OC_MISC_SERIAL)) \ _(OC_MISC_TOOLS_ARRAY , Entries , , OC_CONSTR2 (OC_MISC_TOOLS_ARRAY, _, __) , OC_DESTR (OC_MISC_TOOLS_ARRAY)) \ _(OC_MISC_TOOLS_ARRAY , Tools , , OC_CONSTR2 (OC_MISC_TOOLS_ARRAY, _, __) , OC_DESTR (OC_MISC_TOOLS_ARRAY)) OC_DECLARE (OC_MISC_CONFIG) diff --git a/Library/OcConfigurationLib/OcConfigurationLib.c b/Library/OcConfigurationLib/OcConfigurationLib.c index 03eee338fd2..dad1a00cfdd 100644 --- a/Library/OcConfigurationLib/OcConfigurationLib.c +++ b/Library/OcConfigurationLib/OcConfigurationLib.c @@ -51,6 +51,7 @@ OC_ARRAY_STRUCTORS (OC_MISC_BLESS_ARRAY) OC_STRUCTORS (OC_MISC_BOOT, ()) OC_STRUCTORS (OC_MISC_DEBUG, ()) OC_STRUCTORS (OC_MISC_SECURITY, ()) +OC_STRUCTORS (OC_MISC_SERIAL, ()) OC_STRUCTORS (OC_MISC_TOOLS_ENTRY, ()) OC_ARRAY_STRUCTORS (OC_MISC_TOOLS_ARRAY) OC_STRUCTORS (OC_MISC_CONFIG, ()) @@ -428,7 +429,6 @@ mMiscConfigurationDebugSchema[] = { OC_SCHEMA_INTEGER_IN ("DisplayDelay", OC_GLOBAL_CONFIG, Misc.Debug.DisplayDelay), OC_SCHEMA_INTEGER_IN ("DisplayLevel", OC_GLOBAL_CONFIG, Misc.Debug.DisplayLevel), OC_SCHEMA_STRING_IN ("LogModules", OC_GLOBAL_CONFIG, Misc.Debug.LogModules), - OC_SCHEMA_BOOLEAN_IN ("SerialInit", OC_GLOBAL_CONFIG, Misc.Debug.SerialInit), OC_SCHEMA_BOOLEAN_IN ("SysReport", OC_GLOBAL_CONFIG, Misc.Debug.SysReport), OC_SCHEMA_INTEGER_IN ("Target", OC_GLOBAL_CONFIG, Misc.Debug.Target) }; @@ -453,6 +453,24 @@ mMiscConfigurationSecuritySchema[] = { OC_SCHEMA_STRING_IN ("Vault", OC_GLOBAL_CONFIG, Misc.Security.Vault), }; +STATIC +OC_SCHEMA +mMiscConfigurationSerialSchema[] = { + OC_SCHEMA_INTEGER_IN ("BaudRate", OC_GLOBAL_CONFIG, Misc.Serial.BaudRate), + OC_SCHEMA_INTEGER_IN ("ClockRate", OC_GLOBAL_CONFIG, Misc.Serial.ClockRate), + OC_SCHEMA_BOOLEAN_IN ("DetectCable", OC_GLOBAL_CONFIG, Misc.Serial.DetectCable), + OC_SCHEMA_INTEGER_IN ("ExtendedTxFifoSize", OC_GLOBAL_CONFIG, Misc.Serial.ExtendedTxFifoSize), + OC_SCHEMA_INTEGER_IN ("FifoControl", OC_GLOBAL_CONFIG, Misc.Serial.FifoControl), + OC_SCHEMA_BOOLEAN_IN ("Init", OC_GLOBAL_CONFIG, Misc.Serial.Init), + OC_SCHEMA_INTEGER_IN ("LineControl", OC_GLOBAL_CONFIG, Misc.Serial.LineControl), + OC_SCHEMA_DATA_IN ("PciDeviceInfo", OC_GLOBAL_CONFIG, Misc.Serial.PciDeviceInfo), + OC_SCHEMA_INTEGER_IN ("RegisterAccessWidth", OC_GLOBAL_CONFIG, Misc.Serial.RegisterAccessWidth), + OC_SCHEMA_INTEGER_IN ("RegisterBase", OC_GLOBAL_CONFIG, Misc.Serial.RegisterBase), + OC_SCHEMA_INTEGER_IN ("RegisterStride", OC_GLOBAL_CONFIG, Misc.Serial.RegisterStride), + OC_SCHEMA_BOOLEAN_IN ("UseHardwareFlowControl", OC_GLOBAL_CONFIG, Misc.Serial.UseHardwareFlowControl), + OC_SCHEMA_BOOLEAN_IN ("UseMmio", OC_GLOBAL_CONFIG, Misc.Serial.UseMmio), +}; + STATIC OC_SCHEMA mMiscEntriesSchemaEntry[] = { @@ -496,6 +514,7 @@ mMiscConfigurationSchema[] = { OC_SCHEMA_DICT ("Debug", mMiscConfigurationDebugSchema), OC_SCHEMA_ARRAY_IN ("Entries", OC_GLOBAL_CONFIG, Misc.Entries, &mMiscEntriesSchema), OC_SCHEMA_DICT ("Security", mMiscConfigurationSecuritySchema), + OC_SCHEMA_DICT ("Serial", mMiscConfigurationSerialSchema), OC_SCHEMA_ARRAY_IN ("Tools", OC_GLOBAL_CONFIG, Misc.Tools, &mMiscToolsSchema), }; diff --git a/Library/OcMainLib/OcMainLib.inf b/Library/OcMainLib/OcMainLib.inf index a3a159534e9..feb3fa1dd47 100644 --- a/Library/OcMainLib/OcMainLib.inf +++ b/Library/OcMainLib/OcMainLib.inf @@ -40,6 +40,7 @@ UefiCpuPkg/UefiCpuPkg.dec [Guids] + gEfiMdeModulePkgTokenSpaceGuid gOcVendorVariableGuid [Protocols] @@ -53,6 +54,20 @@ gEfiSecurityArchProtocolGuid ## SOMETIMES_CONSUMES gEfiSecurity2ArchProtocolGuid ## SOMETIMES_CONSUMES +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize ## CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## CONSUMES + [LibraryClasses] DevicePathLib IoLib diff --git a/Library/OcMainLib/OpenCoreMisc.c b/Library/OcMainLib/OpenCoreMisc.c index c4172f65c5e..79a6655dfaa 100644 --- a/Library/OcMainLib/OpenCoreMisc.c +++ b/Library/OcMainLib/OpenCoreMisc.c @@ -35,6 +35,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include #include #include +#include #include #include #include @@ -407,6 +408,7 @@ OcMiscEarlyInit ( EFI_TIME BootTime; CONST CHAR8 *AsciiVault; OCS_VAULT_MODE Vault; + UINTN PciDeviceInfoSize; ConfigData = OcStorageReadFileUnicode ( Storage, @@ -470,8 +472,35 @@ OcMiscEarlyInit ( gBS->SetWatchdogTimer (0, 0, 0, NULL); } - if (Config->Misc.Debug.SerialInit) { - SerialPortInitialize (); + if (Config->Misc.Serial.Init) { + // + // Validate the size of PciDeviceInfo. Abort on error. + // + PciDeviceInfoSize = Config->Misc.Serial.PciDeviceInfo.Size; + if (PciDeviceInfoSize > OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { + DEBUG ((DEBUG_INFO, "OC: Aborting serial port init with borked PciDeviceInfo size %u\n", PciDeviceInfoSize)); + } else { + // + // Update PCD values. + // + PatchPcdSetPtr (PcdSerialPciDeviceInfo, &PciDeviceInfoSize, OC_BLOB_GET (&Config->Misc.Serial.PciDeviceInfo)); + PatchPcdSet8 (PcdSerialRegisterAccessWidth, Config->Misc.Serial.RegisterAccessWidth); + PatchPcdSetBool (PcdSerialUseMmio, Config->Misc.Serial.UseMmio); + PatchPcdSetBool (PcdSerialUseHardwareFlowControl, Config->Misc.Serial.UseHardwareFlowControl); + PatchPcdSetBool (PcdSerialDetectCable, Config->Misc.Serial.DetectCable); + PatchPcdSet64 (PcdSerialRegisterBase, Config->Misc.Serial.RegisterBase); + PatchPcdSet32 (PcdSerialBaudRate, Config->Misc.Serial.BaudRate); + PatchPcdSet8 (PcdSerialLineControl, Config->Misc.Serial.LineControl); + PatchPcdSet8 (PcdSerialFifoControl, Config->Misc.Serial.FifoControl); + PatchPcdSet32 (PcdSerialClockRate, Config->Misc.Serial.ClockRate); + PatchPcdSet32 (PcdSerialExtendedTxFifoSize, Config->Misc.Serial.ExtendedTxFifoSize); + PatchPcdSet32 (PcdSerialRegisterStride, Config->Misc.Serial.RegisterStride); + + // + // Initialize serial port. + // + SerialPortInitialize (); + } } OcConfigureLogProtocol ( diff --git a/OpenCorePkg.dsc b/OpenCorePkg.dsc index 7d60059c37a..f0d584a8d90 100755 --- a/OpenCorePkg.dsc +++ b/OpenCorePkg.dsc @@ -326,6 +326,20 @@ !endif gOpenCorePkgTokenSpaceGuid.PcdCanaryAllowRdtscFallback|TRUE +[PcdsPatchableInModule] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterAccessWidth|8 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate|115200 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl|0x03 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x07 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|1843200 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo|{0xFF,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0} + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize|64 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|1 + [BuildOptions] # While there are no PCDs as of now, there at least are some custom macros. DEFINE OCPKG_BUILD_OPTIONS_GEN = -D DISABLE_NEW_DEPRECATED_INTERFACES $(OCPKG_BUILD_OPTIONS) -D OC_TARGET_$(TARGET)=1 diff --git a/Utilities/ocvalidate/README.md b/Utilities/ocvalidate/README.md index 13b2c269048..97384bc78bb 100644 --- a/Utilities/ocvalidate/README.md +++ b/Utilities/ocvalidate/README.md @@ -78,6 +78,12 @@ Utility to validate whether a `config.plist` matches requirements and convention - DmgLoading: Only `Disabled`, `Signed`, or `Any` are accepted. - Vault: Only `Optional`, `Basic`, or `Secure` are accepted. - SecureBootModel: Only `Default`, `Disabled`, `j137`, `j680`, `j132`, `j174`, `j140k`, `j780`, `j213`, `j140a`, `j152f`, `j160`, `j230k`, `j214k`, `j223`, `j215`, `j185`, `j185f`, or `x86legacy` are accepted. +#### Serial +- RegisterAccessWidth: Only `8` or `32` are accepted. +- BaudRate: Only `921600`, `460800`, `230400`, `115200`, `57600`, `38400`, `19200`, `9600`, `7200`, `4800`, `3600`, `2400`, `2000`, `1800`, `1200`, `600`, `300`, `150`, `134`, `110`, `75`, or `50` are accepted. +- PciDeviceInfo: The last byte must be `0xFF`. +- PciDeviceInfo: Excluding the last byte `0xFF`, the rest must be divisible by 4. +- PciDeviceInfo: Maximum allowed size is 41. ### NVRAM - Requirements here all follow Global Rules. In addition, the following keys and values are checked: diff --git a/Utilities/ocvalidate/ValidateMisc.c b/Utilities/ocvalidate/ValidateMisc.c index 93bdf1342a9..ab2ccdcea4e 100644 --- a/Utilities/ocvalidate/ValidateMisc.c +++ b/Utilities/ocvalidate/ValidateMisc.c @@ -566,6 +566,102 @@ CheckMiscSecurity ( return ErrorCount; } +STATIC +BOOLEAN +ValidateBaudRate ( + IN UINT32 BaudRate + ) +{ + UINTN Index; + + // + // Reference: + // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1223 + // + STATIC CONST UINT32 AllowedBaudRate[] = { + 921600U, 460800U, 230400U, 115200U, + 57600U, 38400U, 19200U, 9600U, 7200U, + 4800U, 3600U, 2400U, 2000U, 1800U, + 1200U, 600U, 300U, 150U, 134U, + 110U, 75U, 50U + }; + + for (Index = 0; Index < ARRAY_SIZE (AllowedBaudRate); ++Index) { + if (BaudRate == AllowedBaudRate[Index]) { + return TRUE; + } + } + + DEBUG ((DEBUG_WARN, "Misc->Serial->BaudRate is borked!\n")); + DEBUG ((DEBUG_WARN, "Accepted BaudRate values:\n")); + for (Index = 0; Index < ARRAY_SIZE (AllowedBaudRate); ++Index) { + DEBUG ((DEBUG_WARN, "%u, ", AllowedBaudRate[Index])); + if (Index != 0 && Index % 5 == 0) { + DEBUG ((DEBUG_WARN, "\n")); + } + } + DEBUG ((DEBUG_WARN, "\n")); + return FALSE; +} + +STATIC +UINT32 +CheckMiscSerial ( + IN OC_GLOBAL_CONFIG *Config + ) +{ + UINT32 ErrorCount; + OC_MISC_CONFIG *UserMisc; + UINT32 RegisterAccessWidth; + UINT32 BaudRate; + CONST UINT8 *PciDeviceInfo; + UINT32 PciDeviceInfoSize; + + ErrorCount = 0; + UserMisc = &Config->Misc; + + // + // Reference: + // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1199-L1200 + // + RegisterAccessWidth = UserMisc->Serial.RegisterAccessWidth; + if (RegisterAccessWidth != 8U && RegisterAccessWidth != 32U) { + DEBUG ((DEBUG_WARN, "Misc->Serial->RegisterAccessWidth can only be 8 or 32!\n")); + ++ErrorCount; + } + + BaudRate = UserMisc->Serial.BaudRate; + if (!ValidateBaudRate (BaudRate)) { + ++ErrorCount; + } + + // + // Reference: + // https://github.com/acidanthera/audk/blob/bb1bba3d776733c41dbfa2d1dc0fe234819a79f2/MdeModulePkg/MdeModulePkg.dec#L1393 + // + PciDeviceInfo = OC_BLOB_GET (&UserMisc->Serial.PciDeviceInfo); + PciDeviceInfoSize = UserMisc->Serial.PciDeviceInfo.Size; + if (PciDeviceInfoSize > OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE) { + DEBUG ((DEBUG_WARN, "Size of Misc->Serial->PciDeviceInfo cannot exceed %u!\n", OC_SERIAL_PCI_DEVICE_INFO_MAX_SIZE)); + ++ErrorCount; + } else if (PciDeviceInfoSize == 0) { + DEBUG ((DEBUG_WARN, "Misc->Serial->PciDeviceInfo cannot be empty (use 0xFF instead)!\n")); + ++ErrorCount; + } else { + if (PciDeviceInfo[PciDeviceInfoSize - 1] != 0xFFU) { + DEBUG ((DEBUG_WARN, "Last byte of Misc->Serial->PciDeviceInfo must be 0xFF!\n")); + ++ErrorCount; + } + + if ((PciDeviceInfoSize - 1) % 4 != 0) { + DEBUG ((DEBUG_WARN, "Misc->Serial->PciDeviceInfo must be divisible by 4 excluding the last 0xFF!\n")); + ++ErrorCount; + } + } + + return ErrorCount; +} + STATIC UINT32 CheckMiscTools ( @@ -662,6 +758,7 @@ CheckMisc ( &CheckMiscDebug, &CheckMiscEntries, &CheckMiscSecurity, + &CheckMiscSerial, &CheckMiscTools };