From 8e05bd97ae07db31799287e7beeaf73172de84e2 Mon Sep 17 00:00:00 2001
From: JRPAN <25518778+JRPan@users.noreply.github.com>
Date: Fri, 12 Jul 2024 13:07:02 -0400
Subject: [PATCH] run set_dram_power_stats only when power model enabled

---
 src/gpgpu-sim/gpu-sim.cc | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/gpgpu-sim/gpu-sim.cc b/src/gpgpu-sim/gpu-sim.cc
index 13029e337..793eee1e5 100644
--- a/src/gpgpu-sim/gpu-sim.cc
+++ b/src/gpgpu-sim/gpu-sim.cc
@@ -1905,16 +1905,18 @@ void gpgpu_sim::cycle() {
         m_memory_partition_unit[i]
             ->dram_cycle();  // Issue the dram command (scheduler + delay model)
       // Update performance counters for DRAM
-      m_memory_partition_unit[i]->set_dram_power_stats(
-          m_power_stats->pwr_mem_stat->n_cmd[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_activity[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_nop[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_act[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_pre[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_rd[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_wr[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_wr_WB[CURRENT_STAT_IDX][i],
-          m_power_stats->pwr_mem_stat->n_req[CURRENT_STAT_IDX][i]);
+      if (m_config.g_power_simulation_enabled) {
+        m_memory_partition_unit[i]->set_dram_power_stats(
+            m_power_stats->pwr_mem_stat->n_cmd[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_activity[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_nop[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_act[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_pre[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_rd[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_wr[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_wr_WB[CURRENT_STAT_IDX][i],
+            m_power_stats->pwr_mem_stat->n_req[CURRENT_STAT_IDX][i]);
+      }
     }
   }