Understanding FSM_DETECT pass message

[gkamendje]

While using the following script to extract FSM information from a module,

~/tmp_compile/tools/install/yosys/bin/yosys -L yosys_mem_ctrl.log "-m systemverilog -p" "read_systemverilog -defer ../../rtl/mem_pkg_defs.sv  ../../rtl/mem_ctrl.sv ../../rtl/sync_counter.sv; read_systemverilog  -link  ; "proc; opt -nodffe -nosdff; fsm -norecode  -nomap;"" fsm_export -o ./mem_ctrl.kiss2"

I am seeing the following message.

5.1. Executing FSM_DETECT pass (finding FSMs in design).
Not marking mem_ctrl.curr_state as FSM state register:
    Circuit seems to be self-resetting.

What does this means exactly? This obviously prevents the .kiss2 file to be generated.