From b8a92e53683897f2d45026dbbbaaf89cbc815e5b Mon Sep 17 00:00:00 2001 From: Kunal Pathak Date: Sun, 11 Oct 2020 23:04:15 -0700 Subject: [PATCH] Add JitDasmWithAddress switch to print the process address of every instruction (#43120) * Add COMPlus_JitDasmWithAddress to print the address * Remove dspEmit variable * remove the square brackets * review comments * always display offset * fix the reference of JitDasmWithAddress --- src/coreclr/src/jit/compiler.cpp | 10 ++++-- src/coreclr/src/jit/compiler.h | 2 +- src/coreclr/src/jit/emit.cpp | 44 +++++++++++---------------- src/coreclr/src/jit/emit.h | 1 + src/coreclr/src/jit/emitarm.cpp | 10 ++++-- src/coreclr/src/jit/emitarm64.cpp | 10 ++++-- src/coreclr/src/jit/emitxarch.cpp | 9 ++++-- src/coreclr/src/jit/jitconfigvalues.h | 4 ++- 8 files changed, 53 insertions(+), 37 deletions(-) diff --git a/src/coreclr/src/jit/compiler.cpp b/src/coreclr/src/jit/compiler.cpp index cc603b5ebda2f..aabe5d6dcf19f 100644 --- a/src/coreclr/src/jit/compiler.cpp +++ b/src/coreclr/src/jit/compiler.cpp @@ -2814,13 +2814,13 @@ void Compiler::compInitOptions(JitFlags* jitFlags) #ifdef DEBUG opts.dspInstrs = false; - opts.dspEmit = false; opts.dspLines = false; opts.varNames = false; opts.dmpHex = false; opts.disAsm = false; opts.disAsmSpilled = false; opts.disDiffable = false; + opts.disAddr = false; opts.dspCode = false; opts.dspEHTable = false; opts.dspDebugInfo = false; @@ -2963,6 +2963,12 @@ void Compiler::compInitOptions(JitFlags* jitFlags) opts.dspDiffable = true; } + // This one applies to both Ngen/Jit Disasm output: COMPlus_JitDasmWithAddress=1 + if (JitConfig.JitDasmWithAddress() != 0) + { + opts.disAddr = true; + } + if (JitConfig.JitLongAddress() != 0) { opts.compLongAddress = true; @@ -6105,7 +6111,7 @@ int Compiler::compCompileHelper(CORINFO_MODULE_HANDLE classPtr, #ifdef DEBUG /* Give the function a unique number */ - if (opts.disAsm || opts.dspEmit || verbose) + if (opts.disAsm || verbose) { compMethodID = ~info.compMethodHash() & 0xffff; } diff --git a/src/coreclr/src/jit/compiler.h b/src/coreclr/src/jit/compiler.h index d493ca12e15bb..07bd7cb85eec2 100644 --- a/src/coreclr/src/jit/compiler.h +++ b/src/coreclr/src/jit/compiler.h @@ -8937,7 +8937,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX bool dspEHTable; // Display the EH table reported to the VM bool dspDebugInfo; // Display the Debug info reported to the VM bool dspInstrs; // Display the IL instructions intermixed with the native code output - bool dspEmit; // Display emitter output bool dspLines; // Display source-code lines intermixed with native code output bool dmpHex; // Display raw bytes in hex of native code output bool varNames; // Display variables names in native code output @@ -8945,6 +8944,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX bool disAsmSpilled; // Display native code when any register spilling occurs bool disasmWithGC; // Display GC info interleaved with disassembly. bool disDiffable; // Makes the Disassembly code 'diff-able' + bool disAddr; // Display process address next to each instruction in disassembly code bool disAsm2; // Display native code after it is generated using external disassembler bool dspOrder; // Display names of each of the methods that we ngen/jit bool dspUnwind; // Display the unwind info output diff --git a/src/coreclr/src/jit/emit.cpp b/src/coreclr/src/jit/emit.cpp index 9a7de6411aec4..3ec789be5bcd7 100644 --- a/src/coreclr/src/jit/emit.cpp +++ b/src/coreclr/src/jit/emit.cpp @@ -1211,6 +1211,14 @@ void emitter::appendToCurIG(instrDesc* id) #ifdef DEBUG +void emitter::emitDispInsAddr(BYTE* code) +{ + if (emitComp->opts.disAddr) + { + printf(FMT_ADDR, DBG_ADDR(code)); + } +} + void emitter::emitDispInsOffs(unsigned offs, bool doffs) { if (doffs) @@ -5054,7 +5062,7 @@ unsigned emitter::emitEndCodeGen(Compiler* comp, assert(coldCodeBlock); cp = coldCodeBlock; #ifdef DEBUG - if (emitComp->opts.disAsm || emitComp->opts.dspEmit || emitComp->verbose) + if (emitComp->opts.disAsm || emitComp->verbose) { printf("\n************** Beginning of cold code **************\n"); } @@ -5077,7 +5085,7 @@ unsigned emitter::emitEndCodeGen(Compiler* comp, #ifdef DEBUG /* Print the IG label, but only if it is a branch label */ - if (emitComp->opts.disAsm || emitComp->opts.dspEmit || emitComp->verbose) + if (emitComp->opts.disAsm || emitComp->verbose) { if (emitComp->verbose || emitComp->opts.disasmWithGC) { @@ -5086,7 +5094,12 @@ unsigned emitter::emitEndCodeGen(Compiler* comp, } else { - printf("\nG_M%03u_IG%02u:\n", emitComp->compMethodID, ig->igNum); + printf("\nG_M%03u_IG%02u:", emitComp->compMethodID, ig->igNum); + if (!emitComp->opts.disDiffable) + { + printf(" ;; offset=%04XH", ig->igOffs); + } + printf("\n"); } } #endif // DEBUG @@ -5184,7 +5197,7 @@ unsigned emitter::emitEndCodeGen(Compiler* comp, } #ifdef DEBUG - if (emitComp->opts.disAsm || emitComp->opts.dspEmit || emitComp->verbose) + if (emitComp->opts.disAsm || emitComp->verbose) { printf("\t\t\t\t\t\t;; bbWeight=%s PerfScore %.2f", refCntWtd2str(ig->igWeight), ig->igPerfScore); } @@ -6472,10 +6485,6 @@ unsigned char emitter::emitOutputByte(BYTE* dst, ssize_t val) *castto(dst, unsigned char*) = (unsigned char)val; #ifdef DEBUG - if (emitComp->opts.dspEmit) - { - printf("; emit_byte 0%02XH\n", val & 0xFF); - } #ifdef TARGET_AMD64 // if we're emitting code bytes, ensure that we've already emitted the rex prefix! assert(((val & 0xFF00000000LL) == 0) || ((val & 0xFFFFFFFF00000000LL) == 0xFFFFFFFF00000000LL)); @@ -6495,10 +6504,6 @@ unsigned char emitter::emitOutputWord(BYTE* dst, ssize_t val) MISALIGNED_WR_I2(dst, (short)val); #ifdef DEBUG - if (emitComp->opts.dspEmit) - { - printf("; emit_word 0%02XH,0%02XH\n", (val & 0xFF), (val >> 8) & 0xFF); - } #ifdef TARGET_AMD64 // if we're emitting code bytes, ensure that we've already emitted the rex prefix! assert(((val & 0xFF00000000LL) == 0) || ((val & 0xFFFFFFFF00000000LL) == 0xFFFFFFFF00000000LL)); @@ -6518,10 +6523,6 @@ unsigned char emitter::emitOutputLong(BYTE* dst, ssize_t val) MISALIGNED_WR_I4(dst, (int)val); #ifdef DEBUG - if (emitComp->opts.dspEmit) - { - printf("; emit_long 0%08XH\n", (int)val); - } #ifdef TARGET_AMD64 // if we're emitting code bytes, ensure that we've already emitted the rex prefix! assert(((val & 0xFF00000000LL) == 0) || ((val & 0xFFFFFFFF00000000LL) == 0xFFFFFFFF00000000LL)); @@ -6544,17 +6545,6 @@ unsigned char emitter::emitOutputSizeT(BYTE* dst, ssize_t val) MISALIGNED_WR_ST(dst, val); #endif -#ifdef DEBUG - if (emitComp->opts.dspEmit) - { -#ifdef TARGET_AMD64 - printf("; emit_size_t 0%016llXH\n", val); -#else // TARGET_AMD64 - printf("; emit_size_t 0%08XH\n", val); -#endif // TARGET_AMD64 - } -#endif // DEBUG - return TARGET_POINTER_SIZE; } diff --git a/src/coreclr/src/jit/emit.h b/src/coreclr/src/jit/emit.h index 893b100274bc4..0adba185f9c5c 100644 --- a/src/coreclr/src/jit/emit.h +++ b/src/coreclr/src/jit/emit.h @@ -1508,6 +1508,7 @@ class emitter void emitDispGCinfo(); void emitDispClsVar(CORINFO_FIELD_HANDLE fldHnd, ssize_t offs, bool reloc = false); void emitDispFrameRef(int varx, int disp, int offs, bool asmfm); + void emitDispInsAddr(BYTE* code); void emitDispInsOffs(unsigned offs, bool doffs); void emitDispInsHex(instrDesc* id, BYTE* code, size_t sz); diff --git a/src/coreclr/src/jit/emitarm.cpp b/src/coreclr/src/jit/emitarm.cpp index 3dc696f119758..2b558a50a8cd4 100644 --- a/src/coreclr/src/jit/emitarm.cpp +++ b/src/coreclr/src/jit/emitarm.cpp @@ -6530,7 +6530,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) size_t expected = emitSizeOfInsDsc(id); assert(sz == expected); - if (emitComp->opts.disAsm || emitComp->opts.dspEmit || emitComp->verbose) + if (emitComp->opts.disAsm || emitComp->verbose) { emitDispIns(id, false, dspOffs, true, emitCurCodeOffs(odst), *dp, (dst - *dp), ig); } @@ -6976,8 +6976,14 @@ void emitter::emitDispInsHelp( if (code == NULL) sz = 0; - if (!emitComp->opts.dspEmit && !isNew && !asmfm && sz) + if (!isNew && !asmfm && sz) + { doffs = true; + } + + /* Display the instruction address */ + + emitDispInsAddr(code); /* Display the instruction offset */ diff --git a/src/coreclr/src/jit/emitarm64.cpp b/src/coreclr/src/jit/emitarm64.cpp index 42af7099e27f3..b7ca1dc29c8c8 100644 --- a/src/coreclr/src/jit/emitarm64.cpp +++ b/src/coreclr/src/jit/emitarm64.cpp @@ -11462,7 +11462,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) size_t expected = emitSizeOfInsDsc(id); assert(sz == expected); - if (emitComp->opts.disAsm || emitComp->opts.dspEmit || emitComp->verbose) + if (emitComp->opts.disAsm || emitComp->verbose) { emitDispIns(id, false, dspOffs, true, emitCurCodeOffs(odst), *dp, (dst - *dp), ig); } @@ -12107,8 +12107,14 @@ void emitter::emitDispIns( if (pCode == NULL) sz = 0; - if (!emitComp->opts.dspEmit && !isNew && !asmfm && sz) + if (!isNew && !asmfm && sz) + { doffs = true; + } + + /* Display the instruction address */ + + emitDispInsAddr(pCode); /* Display the instruction offset */ diff --git a/src/coreclr/src/jit/emitxarch.cpp b/src/coreclr/src/jit/emitxarch.cpp index 0a6c7ae991bb0..7774b850ef8d8 100644 --- a/src/coreclr/src/jit/emitxarch.cpp +++ b/src/coreclr/src/jit/emitxarch.cpp @@ -8238,11 +8238,15 @@ void emitter::emitDispIns( // printf("[A=%08X] " , emitSimpleByrefStkMask); // printf("[L=%02u] " , id->idCodeSize()); - if (!emitComp->opts.dspEmit && !isNew && !asmfm) + if (!isNew && !asmfm) { doffs = true; } + /* Display the instruction address */ + + emitDispInsAddr(code); + /* Display the instruction offset */ emitDispInsOffs(offset, doffs); @@ -13680,7 +13684,7 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp) assert(*dp != dst || emitInstHasNoCode(ins)); #ifdef DEBUG - if (emitComp->opts.disAsm || emitComp->opts.dspEmit || emitComp->verbose) + if (emitComp->opts.disAsm || emitComp->verbose) { emitDispIns(id, false, dspOffs, true, emitCurCodeOffs(*dp), *dp, (dst - *dp)); } @@ -13985,6 +13989,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins switch (ins) { + case INS_align: case INS_nop: case INS_int3: assert(memFmt == IF_NONE); diff --git a/src/coreclr/src/jit/jitconfigvalues.h b/src/coreclr/src/jit/jitconfigvalues.h index 41e2bb8fdfc1a..5d77d6a0affda 100644 --- a/src/coreclr/src/jit/jitconfigvalues.h +++ b/src/coreclr/src/jit/jitconfigvalues.h @@ -21,7 +21,9 @@ CONFIG_INTEGER(BreakOnDumpToken, W("BreakOnDumpToken"), 0xffffffff) // Breaks wh // particular token value. CONFIG_INTEGER(DebugBreakOnVerificationFailure, W("DebugBreakOnVerificationFailure"), 0) // Halts the jit on // verification failure -CONFIG_INTEGER(DiffableDasm, W("JitDiffableDasm"), 0) // Make the disassembly diff-able +CONFIG_INTEGER(DiffableDasm, W("JitDiffableDasm"), 0) // Make the disassembly diff-able +CONFIG_INTEGER(JitDasmWithAddress, W("JitDasmWithAddress"), 0) // Print the process address next to each instruction of + // the disassembly CONFIG_INTEGER(DisplayLoopHoistStats, W("JitLoopHoistStats"), 0) // Display JIT loop hoisting statistics CONFIG_INTEGER(DisplayLsraStats, W("JitLsraStats"), 0) // Display JIT Linear Scan Register Allocator statistics CONFIG_INTEGER(DumpJittedMethods, W("DumpJittedMethods"), 0) // Prints all jitted methods to the console