#include /include/ "system-conf.dtsi" / { regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg_ssd_vqmmc: regulator_ssd_vqmmc { compatible = "regulator-gpio"; regulator-name = "ssd_vqmmc"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-type = "voltage"; gpios = <&gpio 43 0>; gpios-states = <0>; states = <3300000 0 1800000 1>; }; }; refclk_dp: refclk_dp { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; }; memory { device_type = "memory"; reg = <0x0 0x0 0x0 0x5ff00000 0x8 0x0 0x0 0x7c000000>; }; reserved-memory { #address-cells = <2>; #size-cells = <2>; ranges; ps_reserved: buffer@0x60000000 { compatible = "shared-dma-pool"; xlnx,proc-access = <0x1>; reg = <0x00000000 0x60000000 0x0 0x20000000>; }; pl_reserved: buffer@0x500000000 { compatible = "shared-dma-pool"; xlnx,proc-access = <0x1>; reg = <0x00000005 0x00000000 0x0 0x5F000000>; }; pl_db_mem: buffer@0x55F000000 { compatible = "shared-dma-pool"; xlnx,proc-access = <0x1>; reg = <0x00000005 0x5F000000 0x0 0x1000000>; }; }; pl_allocator@1 { compatible = "xlnx,pl-allocator-1.0"; memory-region = <&pl_db_mem>; }; xib_kmm@2 { compatible = "xlnx,xib-kmm-1.0"; memory-region = <&ps_reserved>; pl-mem-region = <&pl_reserved>; }; fmc { /* * By default, FMC Connector power is disabled. * 1.8V compatibility is checked while booting by reading * FMC Module's EEPROM to enable correponding FMC connector power. */ fmc-vadj-millivolt = <1800>; fmc-prsnt-m2c = <&gpio3 0 GPIO_ACTIVE_HIGH>; fmc-vcc-adj = <&gpio3 5 GPIO_ACTIVE_HIGH>; fmc-vcc-12v = <&gpio3 3 GPIO_ACTIVE_HIGH>; fmc-vcc-3v3 = <&gpio3 4 GPIO_ACTIVE_HIGH>; fmc-pg-c2m = <&gpio3 12 GPIO_ACTIVE_HIGH>; }; fmc_plus { /* * By default, FMC+ Connector power is disabled. * 1.8V compatibility is checked while booting by reading * FMC+ Module's EEPROM to enable correponding FMC+ connector power. */ vadj-millivolt = <1800>; prsnt-m2c = <&gpio3 1 GPIO_ACTIVE_HIGH>; vcc-adj = <&gpio3 6 GPIO_ACTIVE_HIGH>; vcc-12v = <&gpio3 8 GPIO_ACTIVE_HIGH>; vcc-3v3 = <&gpio3 9 GPIO_ACTIVE_HIGH>; pg-c2m = <&gpio3 13 GPIO_ACTIVE_HIGH>; }; retimer_clk: retimer_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <148500000>; }; cpu_opp_table { opp00 { opp-hz = /bits/ 64 <329166666>; }; opp01 { opp-hz = /bits/ 64 <438888888>; }; opp02 { opp-hz = /bits/ 64 <658333333>; }; opp03 { opp-hz = /bits/ 64 <1316666666>; }; }; }; &uart0 { status="okay"; }; &can0 { status = "okay"; pwdn-gpio = <&gpio 80 0>; }; &gem0 { phy-mode = "rgmii-id"; local-mac-address = [00 01 02 03 04 05]; status = "okay"; xlnx,ptp-enet-clock = <0x0>; phy-handle = <&phy0>; phy-reset-gpio = <&gpio 42 1>; phy-reset-active-low; phy-reset-duration = <20>; phy0: phy@1 { reg = <1>; ti,rx-internal-delay = <0x8>; ti,tx-internal-delay = <0xa>; ti,fifo-depth = <0x1>; ti,rxctrl-strap-worka; at803x,led-act-blind-workaround; at803x,eee-disabled; at803x,vddio-1p8v; interrupt-parent = <&gpio>; interrupts = <12 8>; }; }; &i2c0 { clock-frequency = <400000>; status = "okay"; pmic0: da9062@58 { compatible = "dlg,da9062"; reg = <0x58>; interrupt-parent = <&gpio>; interrupts = <2 8>; interrupt-controller; rtc { compatible = "dlg,da9062-rtc"; }; watchdog { compatible = "dlg,da9062-watchdog"; }; }; fusb302: typec-portc@22 { compatible = "fcs,fusb302"; reg = <0x22>; fcs,int_n = <&gpio 78 8>; fcs,cc = <&gpio 79 0>; fcs,power_en = <&gpio 25 0>; status = "okay"; }; si5341: clock-generator@76 { reg = <0x76>; compatible = "silabs,si5341"; #clock-cells = <2>; #address-cells = <1>; #size-cells = <0>; //clocks = <&ref48>; clock-names = "xtal"; clk0 { reg = <0>; always-on; }; clk1 { reg = <1>; always-on; }; clk2 { reg = <2>; always-on; }; clk3 { reg = <3>; always-on; }; clk4 { reg = <4>; always-on; }; clk5 { reg = <5>; always-on; }; clk6 { reg = <6>; always-on; }; clk7 { reg = <7>; always-on; }; clk9 { reg = <9>; always-on; }; }; dp159: hdmi-retimer@5b { status = "okay"; compatible = "ti,dp159"; reg = <0x5b>; #address-cells = <1>; #size-cells = <0>; #clock-cells = <0>; }; i2c_mux: msd9546@70 { compatible = "nxp,pca9546"; reg = <0x70>; status = "okay"; #address-cells = <1>; #size-cells = <0>; i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; gpio3: gpio@23 { compatible = "ti,tca9535"; reg = <0x23>; #gpio-cells = <2>; gpio-controller; }; }; i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; }; i2c@2 { #address-cells = <1>; #size-cells = <0>; reg = <2>; gpio1: gpio@20 { compatible = "ti,tca6416"; reg = <0x20>; #gpio-cells = <2>; gpio-controller; }; gpio2: gpio@21 { compatible = "ti,tca6416"; reg = <0x21>; #gpio-cells = <2>; gpio-controller; }; }; i2c@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; }; }; }; &pcie { status = "okay"; xlnx,pcie-mode = "Root Port"; misc = <&gpio 83 8>; reset-gpios = <&gpio 84 0>; reset-gpio-active-low; }; &usb0 { status = "okay"; xlnx,usb-reset = <0x2faf080>; }; &dwc3_0 { status = "okay"; dr_mode = "otg"; snps,dis_u2_susphy_quirk; snps,dis_u3_susphy_quirk; }; &amba { zyxclmm_drm { compatible = "xlnx,zocl"; status = "okay"; //interrupt-parent = <&axi_intc_0>; interrupts = <0 4>, <1 4>, <2 4>, <3 4>, <4 4>, <5 4>, <6 4>, <7 4>, <8 4>, <9 4>, <10 4>, <11 4>, <12 4>, <13 4>, <14 4>, <15 4>, <16 4>, <17 4>, <18 4>, <19 4>, <20 4>, <21 4>, <22 4>, <23 4>, <24 4>, <25 4>, <26 4>, <27 4>, <28 4>, <29 4>, <30 4>, <31 4>; }; }; &sdhci1 { no-1-8-v; disable-wp; }; &sdhci0{ bus-width = <8>; }; &sdhci1 { //clock-frequency = <200000000>; //status = "okay"; //bus-width = <4>; //xlnx,has-cd = <0x1>; //vqmmc-supply = <®_ssd_vqmmc>; no-1-8-v; disable-wp; }; &rtc { status = "disabled"; }; &fclk0 { status = "okay"; }; &fclk1 { status = "okay"; }; &fclk2 { status = "okay"; }; &fclk3 { status = "okay"; }; &psgtr { status = "okay"; clocks = <&refclk_dp>; clock-names = "ref1"; };