description.json

{
    "name": "DPU Kernel (RTL Kernel)", 
    "description": [
        "Run DPU Kernel as GUI flow"
    ], 
    "key_concepts": [
        "RTL Kernel"
    ], 
    "targets": [
        "hw", 
    ], 
    "os": [
        "Linux"
    ], 
    "runtime": [
        "OpenCL"
    ], 
    "gui": true, 
    "host": {
        "host_exe": "resnet50", 
        "compiler": {
            "sources": [
                "src/app/samples/src/resnet50.cpp"
            ], 
            "includepaths": [
                "src/app/samples/include"
            ],
            "options" : "-std=c++17"
        },
        "linker": {
            "libraries" : [
                "glog",
                "vart-mem-manager",
                "xir",
                "unilog",
                "vart-buffer-object",
                "vart-runner",
                "vart-util",
                "vart-xrt-device-handle",
                "opencv_core",
                "opencv_imgproc",
                "opencv_imgcodecs",
                "vart-dpu-runner",
                "vart-dpu-controller"
            ]
        }
    }, 
    "containers": [
        {
            "accelerators": [
                {
                    "kernel_type": "user", 
                    "name": "DPUCZDX8G",
                    "num_compute_units" : "2",
                    "build_command" : "$(VIVADO) -mode batch -source PROJECT/src/prj/Vitis/scripts_gui/gen_dpu_xo.tcl -tclargs $(PROJECT) $@ $(KERNEL_NAME) $(TARGET) $(DEVICE) $(XSA)",
                    "clean_command" : "rm -rf *.log *.jou *.xo packaged_* tmp_kernel_*",
                    "dependencies" : [
                        "src/prj/Vitis/kernel_xml/dpu/kernel.xml",
	                "src/prj/Vitis/scripts_gui/package_dpu_kernel.tcl",
	                "src/prj/Vitis/scripts_gui/gen_dpu_xo.tcl",
	                "src/prj/Vitis/dpu_conf.vh",
	                "src/dpu_ip/Vitis/dpu/hdl/DPUCZDX8G.v",
	                "src/dpu_ip/Vitis/dpu/inc/arch_def.vh",
	                "src/dpu_ip/Vitis/dpu/xdc/timing_clocks.xdc",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/ttcl/fingerprint_json.ttcl",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/hdl/DPUCZDX8G_v3_3_0_vl_dpu.sv",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/inc/function.vh",
                        "src/dpu_ip/DPUCZDX8G_v3_3_0/inc/arch_para.vh"
                    ]
                },
                {
                    "kernel_type": "user", 
                    "name": "sfm_xrt_top",
                    "build_command" : "$(VIVADO) -mode batch -source PROJECT/src/prj/Vitis/scripts_gui/gen_sfm_xo.tcl -tclargs $(PROJECT) $@ $(KERNEL_NAME) $(TARGET) $(DEVICE) $(XSA)",
                    "dependencies" : [
                        "src/prj/Vitis/kernel_xml/sfm/kernel.xml",
	                "src/prj/Vitis/scripts_gui/package_sfm_kernel.tcl",
	                "src/prj/Vitis/scripts_gui/gen_sfm_xo.tcl",
	                "src/dpu_ip/Vitis/sfm/hdl/sfm_xrt_top.v",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/hdl/DPUCZDX8G_v3_3_0_vl_sfm.sv",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/xci/sfm/fp_acc/fp_acc.xci",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/xci/sfm/fp_add/fp_add.xci",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/xci/sfm/fp_convert/fp_convert.xci",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/xci/sfm/fp_div/fp_div.xci",
	                "src/dpu_ip/DPUCZDX8G_v3_3_0/xci/sfm/fp_exp/fp_exp.xci"
                    ]
                }
            ], 
            "name": "dpu"
        }
    ], 
    "platform_properties" : {
        "zcu102_base" : {
            "containers": [
                {
                    "ldclflags" : "--config PROJECT/src/prj/Vitis/config_file/prj_config_gui",
                    "name" : "dpu"
                }
            ]
        },
        "zcu104_base" : {
            "containers": [
                {
                    "ldclflags" : "--config PROJECT/src/prj/Vitis/config_file/prj_config_gui",
                    "name" : "dpu"
                }
            ]
        }
    }, 
    "launch": [
        {
            "cmd_args": "BUILD/dpu.xclbin", 
            "name": "generic launch for all flows"
        }
    ],
    "pre_build" : [
        {
            "build_cmd" : "mkdir ./src && mv app prj dpu_ip src"
        }
    ],
    "data":[
        "src/app/img",
        "src/app/model"
    ],
    "config_make": "config.mk", 
    "output_files": "tmp_kernel_pack* packaged_kernel*",
    "contributors": [
        {
            "url": "http://www.xilinx.com", 
            "group": "Xilinx"
        }
    ], 
    "revision": [
        {
            "date": "JAN2017", 
            "version": "1.0", 
            "description": "Initial Xilinx Release"
        }
    ] 
}