From 68bb001215161cc4073f7a1be10b8f9d09932a36 Mon Sep 17 00:00:00 2001 From: Zachary Hall Date: Sat, 18 Nov 2023 13:04:02 -0800 Subject: [PATCH] Include documentation about the upcoming changes to the behavior of the T256C bit --- VERA Programmer's Reference.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/VERA Programmer's Reference.md b/VERA Programmer's Reference.md index c54d725..c0bdd3e 100644 --- a/VERA Programmer's Reference.md +++ b/VERA Programmer's Reference.md @@ -678,6 +678,7 @@ Each pixel in the tile data gives a color index of either 0-3 (2bpp), 0-15 (4bpp * Color index 0 (transparent) and 16-255 are unmodified. * Color index 1-15 is modified by adding 16 x palette offset. +* T256C causes bit 7 of the color index to become 1. Note that 2bpp mode packs 4 pixels per byte and 4bpp mode packs 2 pixels per byte. For packed pixels, bit 7 refers to the leftmost pixel and bit 0 refers to the rightmost pixel. @@ -687,8 +688,7 @@ Note that 2bpp mode packs 4 pixels per byte and 4bpp mode packs 2 pixels per byt **TILEW** specifies the bitmap width. TILEW=0 results in 320 pixels width and TILEW=1 results in 640 pixels width. -The palette offset (in **'H-Scroll (11:8)'**) modifies the color indexes of the bitmap in the same way as in the tile modes. - +The palette offset (in **'H-Scroll (11:8)'**), as well as T256C in non-1bpp mode modifies the color indexes of the bitmap in the same way as in the tile modes. ## SPI controller