From 002a30b6c2f9cf199b4cb24d2218e8272d778da5 Mon Sep 17 00:00:00 2001 From: Alexander <48211557+jedifindtrick@users.noreply.github.com> Date: Fri, 5 Mar 2021 14:31:41 +0100 Subject: [PATCH 1/3] [Keyboard] K6 Gateron RGB (Sonix SN32F248B) --- keyboards/keychron/k6/CT16.h | 1318 +++++++++++++++++ .../keychron/k6/boards/SN_SN32F240B/board.c | 69 + .../keychron/k6/boards/SN_SN32F240B/board.h | 229 +++ .../keychron/k6/boards/SN_SN32F240B/board.mk | 5 + keyboards/keychron/k6/bootloader_defs.h | 3 + keyboards/keychron/k6/chconf.h | 700 +++++++++ keyboards/keychron/k6/config.h | 47 + keyboards/keychron/k6/config_led.c | 40 + keyboards/keychron/k6/config_led.h | 32 + keyboards/keychron/k6/halconf.h | 524 +++++++ keyboards/keychron/k6/info.json | 12 + keyboards/keychron/k6/k6.h | 20 + .../keychron/k6/keymaps/default/keymap.c | 115 ++ keyboards/keychron/k6/led_matrix.c | 78 + keyboards/keychron/k6/matrix.c | 325 ++++ keyboards/keychron/k6/mcuconf.h | 93 ++ keyboards/keychron/k6/readme.md | 14 + keyboards/keychron/k6/rules.mk | 63 + 18 files changed, 3687 insertions(+) create mode 100644 keyboards/keychron/k6/CT16.h create mode 100644 keyboards/keychron/k6/boards/SN_SN32F240B/board.c create mode 100644 keyboards/keychron/k6/boards/SN_SN32F240B/board.h create mode 100644 keyboards/keychron/k6/boards/SN_SN32F240B/board.mk create mode 100644 keyboards/keychron/k6/bootloader_defs.h create mode 100644 keyboards/keychron/k6/chconf.h create mode 100644 keyboards/keychron/k6/config.h create mode 100644 keyboards/keychron/k6/config_led.c create mode 100644 keyboards/keychron/k6/config_led.h create mode 100644 keyboards/keychron/k6/halconf.h create mode 100644 keyboards/keychron/k6/info.json create mode 100644 keyboards/keychron/k6/k6.h create mode 100644 keyboards/keychron/k6/keymaps/default/keymap.c create mode 100644 keyboards/keychron/k6/led_matrix.c create mode 100644 keyboards/keychron/k6/matrix.c create mode 100644 keyboards/keychron/k6/mcuconf.h create mode 100644 keyboards/keychron/k6/readme.md create mode 100644 keyboards/keychron/k6/rules.mk diff --git a/keyboards/keychron/k6/CT16.h b/keyboards/keychron/k6/CT16.h new file mode 100644 index 000000000000..168d8d01ad90 --- /dev/null +++ b/keyboards/keychron/k6/CT16.h @@ -0,0 +1,1318 @@ +#ifndef __SN32F240B_CT16_H +#define __SN32F240B_CT16_H + + +/*_____ I N C L U D E S ____________________________________________________*/ + +/*_____ D E F I N I T I O N S ______________________________________________*/ +/* +Base Address: 0x4000 0000 (CT16B0) + 0x4000 2000 (CT16B1) +*/ + +/* CT16Bn Timer Control register (0x00) */ +#define CT16_CEN_DIS 0 //[0:0] CT16Bn enable bit +#define CT16_CEN_EN 1 +#define mskCT16_CEN_DIS (CT16_CEN_DIS<<0) +#define mskCT16_CEN_EN (CT16_CEN_EN<<0) + +#define CT16_CRST 1 //[1:1] CT16Bn counter reset bit +#define mskCT16_CRST (CT16_CRST<<1) + +/* CT16Bn Count Control register (0x10) */ + //[1:0] Count/Timer Mode selection. +#define CT16_CTM_TIMER 0 //Timer mode: Every rising PCLK edge. +#define CT16_CTM_CNTER_RISING 1 //Counter mode: TC increments on rising edge of CAP input. +#define CT16_CTM_CNTER_FALLING 2 //Counter mode: TC increments on falling edge of CAP input. +#define CT16_CTM_CNTER_BOTH 3 //Counter mode: TC increments on both edge of CAP input. +#define mskCT16_CTM_TIMER (CT16_CTM_TIMER<<0) +#define mskCT16_CTM_CNTER_RISING (CT16_CTM_CNTER_RISING<<0) +#define mskCT16_CTM_CNTER_FALLING (CT16_CTM_CNTER_FALLING<<0) +#define mskCT16_CTM_CNTER_BOTH (CT16_CTM_CNTER_BOTH<<0) + +#define CT16_CIS 0 //[3:2] Count Input Select +#define mskCT16_CIS (CT16_CIS<<2) + +/* CT16Bn Match Control register (0x14) */ +#define CT16_MR0IE_EN 1 //[0:0] Enable MR0 match interrupt +#define CT16_MR0IE_DIS 0 +#define mskCT16_MR0IE_EN (CT16_MR0IE_EN<<0) +#define mskCT16_MR0IE_DIS (CT16_MR0IE_DIS<<0) + +#define CT16_MR0RST_EN 1 //[1:1] Enable reset TC when MR0 matches TC. +#define CT16_MR0RST_DIS 0 +#define mskCT16_MR0RST_EN (CT16_MR0RST_EN<<1) +#define mskCT16_MR0RST_DIS (CT16_MR0RST_DIS<<1) + +#define CT16_MR0STOP_EN 1 //[2:2] Enable stop TC and clear CEN when MR0 matches TC. +#define CT16_MR0STOP_DIS 0 +#define mskCT16_MR0STOP_EN (CT16_MR0STOP_EN<<2) +#define mskCT16_MR0STOP_DIS (CT16_MR0STOP_DIS<<2) + +#define CT16_MR1IE_EN 1 //[3:3] Enable MR1 match interrupt +#define CT16_MR1IE_DIS 0 +#define mskCT16_MR1IE_EN (CT16_MR1IE_EN<<3) +#define mskCT16_MR1IE_DIS (CT16_MR1IE_DIS<<3) + +#define CT16_MR1RST_EN 1 //[4:4] Enable reset TC when MR1 matches TC. +#define CT16_MR1RST_DIS 0 +#define mskCT16_MR1RST_EN (CT16_MR1RST_EN<<4) +#define mskCT16_MR1RST_DIS (CT16_MR1RST_DIS<<4) + +#define CT16_MR1STOP_EN 1 //[5:5] Enable stop TC and clear CEN when MR1 matches TC. +#define CT16_MR1STOP_DIS 0 +#define mskCT16_MR1STOP_EN (CT16_MR1STOP_EN<<5) +#define mskCT16_MR1STOP_DIS (CT16_MR1STOP_DIS<<5) + +#define CT16_MR2IE_EN 1 //[6:6] Enable MR2 match interrupt +#define CT16_MR2IE_DIS 0 +#define mskCT16_MR2IE_EN (CT16_MR2IE_EN<<6) +#define mskCT16_MR2IE_DIS (CT16_MR2IE_DIS<<6) + +#define CT16_MR2RST_EN 1 //[7:7] Enable reset TC when MR2 matches TC. +#define CT16_MR2RST_DIS 0 +#define mskCT16_MR2RST_EN (CT16_MR2RST_EN<<7) +#define mskCT16_MR2RST_DIS (CT16_MR2RST_DIS<<7) + +#define CT16_MR2STOP_EN 1 //[8:8] Enable stop TC and clear CEN when MR2 matches TC. +#define CT16_MR2STOP_DIS 0 +#define mskCT16_MR2STOP_EN (CT16_MR2STOP_EN<<8) +#define mskCT16_MR2STOP_DIS (CT16_MR2STOP_DIS<<8) + +#define CT16_MR3IE_EN 1 //[9:9] Enable MR3 match interrupt +#define CT16_MR3IE_DIS 0 +#define mskCT16_MR3IE_EN (CT16_MR3IE_EN<<9) +#define mskCT16_MR3IE_DIS (CT16_MR3IE_DIS<<9) + +#define CT16_MR3RST_EN 1 //[10:10] Enable reset TC when MR3 matches TC. +#define CT16_MR3RST_DIS 0 +#define mskCT16_MR3RST_EN (CT16_MR3RST_EN<<10) +#define mskCT16_MR3RST_DIS (CT16_MR3RST_DIS<<10) + +#define CT16_MR3STOP_EN 1 //[11:11] Enable stop TC and clear CEN when MR3 matches TC. +#define CT16_MR3STOP_DIS 0 +#define mskCT16_MR3STOP_EN (CT16_MR3STOP_EN<<11) +#define mskCT16_MR3STOP_DIS (CT16_MR3STOP_DIS<<11) + +#define CT16_MR4IE_EN 1 //[12:12 Enable MR4 match interrupt +#define CT16_MR4IE_DIS 0 +#define mskCT16_MR4IE_EN (CT16_MR4IE_EN<<12) +#define mskCT16_MR4IE_DIS (CT16_MR4IE_DIS<<12) + +#define CT16_MR4RST_EN 1 //[13:13] Enable reset TC when MR4 matches TC. +#define CT16_MR4RST_DIS 0 +#define mskCT16_MR4RST_EN (CT16_MR4RST_EN<<13) +#define mskCT16_MR4RST_DIS (CT16_MR4RST_DIS<<13) + +#define CT16_MR4STOP_EN 1 //[14:14] Enable stop TC and clear CEN when MR4 matches TC. +#define CT16_MR4STOP_DIS 0 +#define mskCT16_MR4STOP_EN (CT16_MR4STOP_EN<<14) +#define mskCT16_MR4STOP_DIS (CT16_MR4STOP_DIS<<14) + +#define CT16_MR5IE_EN 1 //[15:15] Enable MR5 match interrupt +#define CT16_MR5IE_DIS 0 +#define mskCT16_MR5IE_EN (CT16_MR5IE_EN<<15) +#define mskCT16_MR5IE_DIS (CT16_MR5IE_DIS<<15) + +#define CT16_MR5RST_EN 1 //[16:16] Enable reset TC when MR5 matches TC. +#define CT16_MR5RST_DIS 0 +#define mskCT16_MR5RST_EN (CT16_MR5RST_EN<<16) +#define mskCT16_MR5RST_DIS (CT16_MR5RST_DIS<<16) + +#define CT16_MR5STOP_EN 1 //[17:17] Enable stop TC and clear CEN when MR5 matches TC. +#define CT16_MR5STOP_DIS 0 +#define mskCT16_MR5STOP_EN (CT16_MR5STOP_EN<<17) +#define mskCT16_MR5STOP_DIS (CT16_MR5STOP_DIS<<17) + +#define CT16_MR6IE_EN 1 //[18:18 Enable MR6 match interrupt +#define CT16_MR6IE_DIS 0 +#define mskCT16_MR6IE_EN (CT16_MR6IE_EN<<18) +#define mskCT16_MR6IE_DIS (CT16_MR6IE_DIS<<18) + +#define CT16_MR6RST_EN 1 //[19:19] Enable reset TC when MR6 matches TC. +#define CT16_MR6RST_DIS 0 +#define mskCT16_MR6RST_EN (CT16_MR6RST_EN<<19) +#define mskCT16_MR6RST_DIS (CT16_MR6RST_DIS<<19) + +#define CT16_MR6STOP_EN 1 //[20:20] Enable stop TC and clear CEN when MR6 matches TC. +#define CT16_MR6STOP_DIS 0 +#define mskCT16_MR6STOP_EN (CT16_MR6STOP_EN<<20) +#define mskCT16_MR6STOP_DIS (CT16_MR6STOP_DIS<<20) + +#define CT16_MR7IE_EN 1 //[21:21 Enable MR7 match interrupt +#define CT16_MR7IE_DIS 0 +#define mskCT16_MR7IE_EN (CT16_MR7IE_EN<<21) +#define mskCT16_MR7IE_DIS (CT16_MR7IE_DIS<<21) + +#define CT16_MR7RST_EN 1 //[22:22] Enable reset TC when MR7 matches TC. +#define CT16_MR7RST_DIS 0 +#define mskCT16_MR7RST_EN (CT16_MR7RST_EN<<22) +#define mskCT16_MR7RST_DIS (CT16_MR7RST_DIS<<22) + +#define CT16_MR7STOP_EN 1 //[23:23] Enable stop TC and clear CEN when MR7 matches TC. +#define CT16_MR7STOP_DIS 0 +#define mskCT16_MR7STOP_EN (CT16_MR7STOP_EN<<23) +#define mskCT16_MR7STOP_DIS (CT16_MR7STOP_DIS<<23) + +#define CT16_MR8IE_EN 1 //[24:24 Enable MR8 match interrupt +#define CT16_MR8IE_DIS 0 +#define mskCT16_MR8IE_EN (CT16_MR8IE_EN<<24) +#define mskCT16_MR8IE_DIS (CT16_MR8IE_DIS<<24) + +#define CT16_MR8RST_EN 1 //[25:25] Enable reset TC when MR8 matches TC. +#define CT16_MR8RST_DIS 0 +#define mskCT16_MR8RST_EN (CT16_MR8RST_EN<<25) +#define mskCT16_MR8RST_DIS (CT16_MR8RST_DIS<<25) + +#define CT16_MR8STOP_EN 1 //[26:26] Enable stop TC and clear CEN when MR8 matches TC. +#define CT16_MR8STOP_DIS 0 +#define mskCT16_MR8STOP_EN (CT16_MR8STOP_EN<<26) +#define mskCT16_MR8STOP_DIS (CT16_MR8STOP_DIS<<26) + +#define CT16_MR9IE_EN 1 //[27:27] Enable MR9 match interrupt +#define CT16_MR9IE_DIS 0 +#define mskCT16_MR9IE_EN (CT16_MR9IE_EN<<27) +#define mskCT16_MR9IE_DIS (CT16_MR9IE_DIS<<27) + +#define CT16_MR9RST_EN 1 //[28:28] Enable reset TC when MR9 matches TC. +#define CT16_MR9RST_DIS 0 +#define mskCT16_MR9RST_EN (CT16_MR9RST_EN<<28) +#define mskCT16_MR9RST_DIS (CT16_MR9RST_DIS<<28) + +#define CT16_MR9STOP_EN 1 //[29:29] Enable stop TC and clear CEN when MR9 matches TC. +#define CT16_MR9STOP_DIS 0 +#define mskCT16_MR9STOP_EN (CT16_MR9STOP_EN<<29) +#define mskCT16_MR9STOP_DIS (CT16_MR9STOP_DIS<<29) + +/* CT16Bn Match Control register 2 (0x18) */ +#define CT16_MR10IE_EN 1 //[0:0] Enable MR10 match interrupt +#define CT16_MR10IE_DIS 0 +#define mskCT16_MR10IE_EN (CT16_MR10IE_EN<<0) +#define mskCT16_MR10IE_DIS (CT16_MR10IE_DIS<<0) + +#define CT16_MR10RST_EN 1 //[1:1] Enable reset TC when MR10 matches TC. +#define CT16_MR10RST_DIS 0 +#define mskCT16_MR10RST_EN (CT16_MR10RST_EN<<1) +#define mskCT16_MR10RST_DIS (CT16_MR10RST_DIS<<1) + +#define CT16_MR10STOP_EN 1 //[2:2] Enable stop TC and clear CEN when MR10 matches TC. +#define CT16_MR10STOP_DIS 0 +#define mskCT16_MR10STOP_EN (CT16_MR10STOP_EN<<2) +#define mskCT16_MR10STOP_DIS (CT16_MR10STOP_DIS<<2) + +#define CT16_MR11IE_EN 1 //[3:3] Enable MR11 match interrupt +#define CT16_MR11IE_DIS 0 +#define mskCT16_MR11IE_EN (CT16_MR11IE_EN<<3) +#define mskCT16_MR11IE_DIS (CT16_MR11IE_DIS<<3) + +#define CT16_MR11RST_EN 1 //[4:4] Enable reset TC when MR11 matches TC. +#define CT16_MR11RST_DIS 0 +#define mskCT16_MR11RST_EN (CT16_MR11RST_EN<<4) +#define mskCT16_MR11RST_DIS (CT16_MR11RST_DIS<<4) + +#define CT16_MR11STOP_EN 1 //[5:5] Enable stop TC and clear CEN when MR11 matches TC. +#define CT16_MR11STOP_DIS 0 +#define mskCT16_MR11STOP_EN (CT16_MR11STOP_EN<<5) +#define mskCT16_MR11STOP_DIS (CT16_MR11STOP_DIS<<5) + +#define CT16_MR12IE_EN 1 //[6:6] Enable MR12 match interrupt +#define CT16_MR12IE_DIS 0 +#define mskCT16_MR12IE_EN (CT16_MR12IE_EN<<6) +#define mskCT16_MR12IE_DIS (CT16_MR12IE_DIS<<6) + +#define CT16_MR12RST_EN 1 //[7:7] Enable reset TC when MR12 matches TC. +#define CT16_MR12RST_DIS 0 +#define mskCT16_MR12RST_EN (CT16_MR12RST_EN<<7) +#define mskCT16_MR12RST_DIS (CT16_MR12RST_DIS<<7) + +#define CT16_MR12STOP_EN 1 //[8:8] Enable stop TC and clear CEN when MR12 matches TC. +#define CT16_MR12STOP_DIS 0 +#define mskCT16_MR12STOP_EN (CT16_MR12STOP_EN<<8) +#define mskCT16_MR12STOP_DIS (CT16_MR12STOP_DIS<<8) + +#define CT16_MR13IE_EN 1 //[9:9] Enable MR13 match interrupt +#define CT16_MR13IE_DIS 0 +#define mskCT16_MR13IE_EN (CT16_MR13IE_EN<<9) +#define mskCT16_MR13IE_DIS (CT16_MR13IE_DIS<<9) + +#define CT16_MR13RST_EN 1 //[10:10] Enable reset TC when MR13 matches TC. +#define CT16_MR13RST_DIS 0 +#define mskCT16_MR13RST_EN (CT16_MR13RST_EN<<10) +#define mskCT16_MR13RST_DIS (CT16_MR13RST_DIS<<10) + +#define CT16_MR13STOP_EN 1 //[11:11] Enable stop TC and clear CEN when MR13 matches TC. +#define CT16_MR13STOP_DIS 0 +#define mskCT16_MR13STOP_EN (CT16_MR13STOP_EN<<11) +#define mskCT16_MR13STOP_DIS (CT16_MR13STOP_DIS<<11) + +#define CT16_MR14IE_EN 1 //[12:12 Enable MR14 match interrupt +#define CT16_MR14IE_DIS 0 +#define mskCT16_MR14IE_EN (CT16_MR14IE_EN<<12) +#define mskCT16_MR14IE_DIS (CT16_MR14IE_DIS<<12) + +#define CT16_MR14RST_EN 1 //[13:13] Enable reset TC when MR14 matches TC. +#define CT16_MR14RST_DIS 0 +#define mskCT16_MR14RST_EN (CT16_MR14RST_EN<<13) +#define mskCT16_MR14RST_DIS (CT16_MR14RST_DIS<<13) + +#define CT16_MR14STOP_EN 1 //[14:14] Enable stop TC and clear CEN when MR14 matches TC. +#define CT16_MR14STOP_DIS 0 +#define mskCT16_MR14STOP_EN (CT16_MR14STOP_EN<<14) +#define mskCT16_MR14STOP_DIS (CT16_MR14STOP_DIS<<14) + +#define CT16_MR15IE_EN 1 //[15:15 Enable MR15 match interrupt +#define CT16_MR15IE_DIS 0 +#define mskCT16_MR15IE_EN (CT16_MR15IE_EN<<15) +#define mskCT16_MR15IE_DIS (CT16_MR15IE_DIS<<15) + +#define CT16_MR15RST_EN 1 //[16:16] Enable reset TC when MR15 matches TC. +#define CT16_MR15RST_DIS 0 +#define mskCT16_MR15RST_EN (CT16_MR15RST_EN<<16) +#define mskCT16_MR15RST_DIS (CT16_MR15RST_DIS<<16) + +#define CT16_MR15STOP_EN 1 //[17:17] Enable stop TC and clear CEN when MR15 matches TC. +#define CT16_MR15STOP_DIS 0 +#define mskCT16_MR15STOP_EN (CT16_MR15STOP_EN<<17) +#define mskCT16_MR15STOP_DIS (CT16_MR15STOP_DIS<<17) + +#define CT16_MR16IE_EN 1 //[18:18 Enable MR16 match interrupt +#define CT16_MR16IE_DIS 0 +#define mskCT16_MR16IE_EN (CT16_MR16IE_EN<<18) +#define mskCT16_MR16IE_DIS (CT16_MR16IE_DIS<<18) + +#define CT16_MR16RST_EN 1 //[19:19] Enable reset TC when MR16 matches TC. +#define CT16_MR16RST_DIS 0 +#define mskCT16_MR16RST_EN (CT16_MR16RST_EN<<19) +#define mskCT16_MR16RST_DIS (CT16_MR16RST_DIS<<19) + +#define CT16_MR16STOP_EN 1 //[20:20] Enable stop TC and clear CEN when MR16 matches TC. +#define CT16_MR16STOP_DIS 0 +#define mskCT16_MR16STOP_EN (CT16_MR16STOP_EN<<20) +#define mskCT16_MR16STOP_DIS (CT16_MR16STOP_DIS<<20) + +#define CT16_MR17IE_EN 1 //[21:21 Enable MR17 match interrupt +#define CT16_MR17IE_DIS 0 +#define mskCT16_MR17IE_EN (CT16_MR17IE_EN<<21) +#define mskCT16_MR17IE_DIS (CT16_MR17IE_DIS<<21) + +#define CT16_MR17RST_EN 1 //[22:22] Enable reset TC when MR17 matches TC. +#define CT16_MR17RST_DIS 0 +#define mskCT16_MR17RST_EN (CT16_MR17RST_EN<<22) +#define mskCT16_MR17RST_DIS (CT16_MR17RST_DIS<<22) + +#define CT16_MR17STOP_EN 1 //[23:23] Enable stop TC and clear CEN when MR17 matches TC. +#define CT16_MR17STOP_DIS 0 +#define mskCT16_MR17STOP_EN (CT16_MR17STOP_EN<<23) +#define mskCT16_MR17STOP_DIS (CT16_MR17STOP_DIS<<23) + +#define CT16_MR18IE_EN 1 //[24:24 Enable MR18 match interrupt +#define CT16_MR18IE_DIS 0 +#define mskCT16_MR18IE_EN (CT16_MR18IE_EN<<24) +#define mskCT16_MR18IE_DIS (CT16_MR18IE_DIS<<24) + +#define CT16_MR18RST_EN 1 //[25:25] Enable reset TC when MR18 matches TC. +#define CT16_MR18RST_DIS 0 +#define mskCT16_MR18RST_EN (CT16_MR18RST_EN<<25) +#define mskCT16_MR18RST_DIS (CT16_MR18RST_DIS<<25) + +#define CT16_MR18STOP_EN 1 //[26:26] Enable stop TC and clear CEN when MR18 matches TC. +#define CT16_MR18STOP_DIS 0 +#define mskCT16_MR18STOP_EN (CT16_MR18STOP_EN<<26) +#define mskCT16_MR18STOP_DIS (CT16_MR18STOP_DIS<<26) + +#define CT16_MR19IE_EN 1 //[27:27] Enable MR19 match interrupt +#define CT16_MR19IE_DIS 0 +#define mskCT16_MR19IE_EN (CT16_MR19IE_EN<<27) +#define mskCT16_MR19IE_DIS (CT16_MR19IE_DIS<<27) + +#define CT16_MR19RST_EN 1 //[28:28] Enable reset TC when MR19 matches TC. +#define CT16_MR19RST_DIS 0 +#define mskCT16_MR19RST_EN (CT16_MR19RST_EN<<28) +#define mskCT16_MR19RST_DIS (CT16_MR19RST_DIS<<28) + +#define CT16_MR19STOP_EN 1 //[29:29] Enable stop TC and clear CEN when MR19 matches TC. +#define CT16_MR19STOP_DIS 0 +#define mskCT16_MR19STOP_EN (CT16_MR19STOP_EN<<29) +#define mskCT16_MR19STOP_DIS (CT16_MR19STOP_DIS<<29) + +/* CT16Bn Match Control register 3 (0x1C) */ +#define CT16_MR20IE_EN 1 //[0:0] Enable MR20 match interrupt +#define CT16_MR20IE_DIS 0 +#define mskCT16_MR20IE_EN (CT16_MR20IE_EN<<0) +#define mskCT16_MR20IE_DIS (CT16_MR20IE_DIS<<0) + +#define CT16_MR20RST_EN 1 //[1:1] Enable reset TC when MR20 matches TC. +#define CT16_MR20RST_DIS 0 +#define mskCT16_MR20RST_EN (CT16_MR20RST_EN<<1) +#define mskCT16_MR20RST_DIS (CT16_MR20RST_DIS<<1) + +#define CT16_MR20STOP_EN 1 //[2:2] Enable stop TC and clear CEN when MR20 matches TC. +#define CT16_MR20STOP_DIS 0 +#define mskCT16_MR20STOP_EN (CT16_MR20STOP_EN<<2) +#define mskCT16_MR20STOP_DIS (CT16_MR20STOP_DIS<<2) + +#define CT16_MR21IE_EN 1 //[3:3] Enable MR21 match interrupt +#define CT16_MR21IE_DIS 0 +#define mskCT16_MR21IE_EN (CT16_MR21IE_EN<<3) +#define mskCT16_MR21IE_DIS (CT16_MR21IE_DIS<<3) + +#define CT16_MR21RST_EN 1 //[4:4] Enable reset TC when MR21 matches TC. +#define CT16_MR21RST_DIS 0 +#define mskCT16_MR21RST_EN (CT16_MR21RST_EN<<4) +#define mskCT16_MR21RST_DIS (CT16_MR21RST_DIS<<4) + +#define CT16_MR21STOP_EN 1 //[5:5] Enable stop TC and clear CEN when MR21 matches TC. +#define CT16_MR21STOP_DIS 0 +#define mskCT16_MR21STOP_EN (CT16_MR21STOP_EN<<5) +#define mskCT16_MR21STOP_DIS (CT16_MR21STOP_DIS<<5) + +#define CT16_MR22IE_EN 1 //[6:6] Enable MR22 match interrupt +#define CT16_MR22IE_DIS 0 +#define mskCT16_MR22IE_EN (CT16_MR22IE_EN<<6) +#define mskCT16_MR22IE_DIS (CT16_MR22IE_DIS<<6) + +#define CT16_MR22RST_EN 1 //[7:7] Enable reset TC when MR22 matches TC. +#define CT16_MR22RST_DIS 0 +#define mskCT16_MR22RST_EN (CT16_MR22RST_EN<<7) +#define mskCT16_MR22RST_DIS (CT16_MR22RST_DIS<<7) + +#define CT16_MR22STOP_EN 1 //[8:8] Enable stop TC and clear CEN when MR22 matches TC. +#define CT16_MR22STOP_DIS 0 +#define mskCT16_MR22STOP_EN (CT16_MR22STOP_EN<<8) +#define mskCT16_MR22STOP_DIS (CT16_MR22STOP_DIS<<8) + +#define CT16_MR23IE_EN 1 //[9:9] Enable MR23 match interrupt +#define CT16_MR23IE_DIS 0 +#define mskCT16_MR23IE_EN (CT16_MR23IE_EN<<9) +#define mskCT16_MR23IE_DIS (CT16_MR23IE_DIS<<9) + +#define CT16_MR23RST_EN 1 //[10:10] Enable reset TC when MR23 matches TC. +#define CT16_MR23RST_DIS 0 +#define mskCT16_MR23RST_EN (CT16_MR23RST_EN<<10) +#define mskCT16_MR23RST_DIS (CT16_MR23RST_DIS<<10) + +#define CT16_MR23STOP_EN 1 //[11:11] Enable stop TC and clear CEN when MR23 matches TC. +#define CT16_MR23STOP_DIS 0 +#define mskCT16_MR23STOP_EN (CT16_MR23STOP_EN<<11) +#define mskCT16_MR23STOP_DIS (CT16_MR23STOP_DIS<<11) + +#define CT16_MR24IE_EN 1 //[12:12] Enable MR24 match interrupt +#define CT16_MR24IE_DIS 0 +#define mskCT16_MR24IE_EN (CT16_MR24IE_EN<<12) +#define mskCT16_MR24IE_DIS (CT16_MR24IE_DIS<<12) + +#define CT16_MR24RST_EN 1 //[13:13] Enable reset TC when MR24 matches TC. +#define CT16_MR24RST_DIS 0 +#define mskCT16_MR24RST_EN (CT16_MR24RST_EN<<13) +#define mskCT16_MR24RST_DIS (CT16_MR24RST_DIS<<13) + +#define CT16_MR24STOP_EN 1 //[14:14] Enable stop TC and clear CEN when MR24 matches TC. +#define CT16_MR24STOP_DIS 0 +#define mskCT16_MR24STOP_EN (CT16_MR24STOP_EN<<14) +#define mskCT16_MR24STOP_DIS (CT16_MR24STOP_DIS<<14) + +/* CT16Bn Capture Control register (0x80) */ +#define CT16_CAP0RE_EN 1 //[0:0] Enable CAP0 capture on rising edge. +#define CT16_CAP0RE_DIS 0 +#define mskCT16_CAP0RE_EN (CT16_CAP0RE_EN<<0) +#define mskCT16_CAP0RE_DIS (CT16_CAP0RE_DIS<<0) + +#define CT16_CAP0FE_EN 1 //[1:1] Enable CAP0 capture on fallng edge. +#define CT16_CAP0FE_DIS 0 +#define mskCT16_CAP0FE_EN (CT16_CAP0FE_EN<<1) +#define mskCT16_CAP0FE_DIS (CT16_CAP0FE_DIS<<1) + +#define CT16_CAP0IE_EN 1 //[2:2] Enable CAP0 interrupt. +#define CT16_CAP0IE_DIS 0 +#define mskCT16_CAP0IE_EN (CT16_CAP0IE_EN<<2) +#define mskCT16_CAP0IE_DIS (CT16_CAP0IE_DIS<<2) + +#define CT16_CAP0EN_EN 1 //[3:3] Enable CAP0 function. +#define CT16_CAP0EN_DIS 0 +#define mskCT16_CAP0EN_EN (CT16_CAP0EN_EN<<3) +#define mskCT16_CAP0EN_DIS (CT16_CAP0EN_DIS<<3) + +/* CT16Bn External Match register (0x88) */ +#define CT16_EM0 1 //[0:0] CT16Bn PWM0 drive state +#define mskCT16_EM0 (CT16_EM0<<0) +#define CT16_EM1 1 //[1:1] CT16Bn PWM1 drive state +#define mskCT16_EM1 (CT16_EM1<<1) +#define CT16_EM2 1 //[2:2] CT16Bn PWM2 drive state +#define mskCT16_EM2 (CT16_EM2<<2) +#define CT16_EM3 1 //[3:3] CT16Bn PWM3 drive state +#define mskCT16_EM3 (CT16_EM3<<3) +#define CT16_EM4 1 //[4:4] CT16Bn PWM4 drive state +#define mskCT16_EM4 (CT16_EM4<<4) +#define CT16_EM5 1 //[5:5] CT16Bn PWM5 drive state +#define mskCT16_EM5 (CT16_EM5<<5) +#define CT16_EM6 1 //[6:6] CT16Bn PWM6 drive state +#define mskCT16_EM6 (CT16_EM6<<6) +#define CT16_EM7 1 //[7:7] CT16Bn PWM7 drive state +#define mskCT16_EM7 (CT16_EM7<<7) +#define CT16_EM8 1 //[8:8] CT16Bn PWM8 drive state +#define mskCT16_EM8 (CT16_EM8<<8) +#define CT16_EM9 1 //[9:9] CT16Bn PWM9 drive state +#define mskCT16_EM9 (CT16_EM9<<9) +#define CT16_EM10 1 //[10:10] CT16Bn PWM10 drive state +#define mskCT16_EM10 (CT16_EM0<<10) +#define CT16_EM11 1 //[11:11] CT16Bn PWM11 drive state +#define mskCT16_EM11 (CT16_EM11<<11) +#define CT16_EM12 1 //[12:12] CT16Bn PWM12 drive state +#define mskCT16_EM12 (CT16_EM12<<12) +#define CT16_EM13 1 //[13:13] CT16Bn PWM13 drive state +#define mskCT16_EM13 (CT16_EM13<<13) +#define CT16_EM14 1 //[14:14] CT16Bn PWM14 drive state +#define mskCT16_EM14 (CT16_EM14<<14) +#define CT16_EM15 1 //[15:15] CT16Bn PWM15 drive state +#define mskCT16_EM15 (CT16_EM15<<15) +#define CT16_EM16 1 //[16:16] CT16Bn PWM16 drive state +#define mskCT16_EM16 (CT16_EM16<<16) +#define CT16_EM17 1 //[17:17] CT16Bn PWM17 drive state +#define mskCT16_EM17 (CT16_EM17<<17) +#define CT16_EM18 1 //[18:18] CT16Bn PWM18 drive state +#define mskCT16_EM18 (CT16_EM18<<8) +#define CT16_EM19 1 //[19:19] CT16Bn PWM19 drive state +#define mskCT16_EM19 (CT16_EM19<<19) +#define CT16_EM20 1 //[20:20] CT16Bn PWM20 drive state +#define mskCT16_EM20 (CT16_EM20<<20) +#define CT16_EM21 1 //[21:21] CT16Bn PWM21 drive state +#define mskCT16_EM21 (CT16_EM21<<21) +#define CT16_EM22 1 //[22:22] CT16Bn PWM22 drive state +#define mskCT16_EM22 (CT16_EM22<<22) +#define CT16_EM23 1 //[23:23] CT16Bn PWM23 drive state +#define mskCT16_EM23 (CT16_EM23<<23) + +/* CT16Bn External Match Control register (0x8C) */ + //[1:0]CT16Bn PWM0 functionality +#define CT16_EMC0_DO_NOTHING 0 //Do nothing. +#define CT16_EMC0_LOW 1 //CT16Bn PWM0 pin is low. +#define CT16_EMC0_HIGH 2 //CT16Bn PWM0 pin is high. +#define CT16_EMC0_TOGGLE 3 //Toggle CT16Bn PWM0 pin. +#define mskCT16_EMC0_DO_NOTHING (CT16_EMC0_LOW<<0) +#define mskCT16_EMC0_LOW (CT16_EMC0_LOW<<0) +#define mskCT16_EMC0_HIGH (CT16_EMC0_HIGH<<0) +#define mskCT16_EMC0_TOGGLE (CT16_EMC0_TOGGLE<<0) + + //[3:2]CT16Bn PWM1 functionality +#define CT16_EMC1_DO_NOTHING 0 //Do nothing. +#define CT16_EMC1_LOW 1 //CT16Bn PWM1 pin is low. +#define CT16_EMC1_HIGH 2 //CT16Bn PWM1 pin is high. +#define CT16_EMC1_TOGGLE 3 //Toggle CT16Bn PWM1 pin. +#define mskCT16_EMC1_DO_NOTHING (CT16_EMC1_LOW<<2) +#define mskCT16_EMC1_LOW (CT16_EMC1_LOW<<2) +#define mskCT16_EMC1_HIGH (CT16_EMC1_HIGH<<2) +#define mskCT16_EMC1_TOGGLE (CT16_EMC1_TOGGLE<<2) + + //[5:4]CT16Bn PWM2 functionality +#define CT16_EMC2_DO_NOTHING 0 //Do nothing. +#define CT16_EMC2_LOW 1 //CT16Bn PWM2 pin is low. +#define CT16_EMC2_HIGH 2 //CT16Bn PWM2 pin is high. +#define CT16_EMC2_TOGGLE 3 //Toggle CT16Bn PWM2 pin. +#define mskCT16_EMC2_DO_NOTHING (CT16_EMC2_LOW<<4) +#define mskCT16_EMC2_LOW (CT16_EMC2_LOW<<4) +#define mskCT16_EMC2_HIGH (CT16_EMC2_HIGH<<4) +#define mskCT16_EMC2_TOGGLE (CT16_EMC2_TOGGLE<<4) + + //[7:6]CT16Bn PWM3 functionality +#define CT16_EMC3_DO_NOTHING 0 //Do nothing. +#define CT16_EMC3_LOW 1 //CT16Bn PWM3 pin is low. +#define CT16_EMC3_HIGH 2 //CT16Bn PWM3 pin is high. +#define CT16_EMC3_TOGGLE 3 //Toggle CT16Bn PWM3 pin. +#define mskCT16_EMC3_DO_NOTHING (CT16_EMC3_LOW<<6) +#define mskCT16_EMC3_LOW (CT16_EMC3_LOW<<6) +#define mskCT16_EMC3_HIGH (CT16_EMC3_HIGH<<6) +#define mskCT16_EMC3_TOGGLE (CT16_EMC3_TOGGLE<<6) + + //[9:8]CT16Bn PWM4 functionality +#define CT16_EMC4_DO_NOTHING 0 //Do nothing. +#define CT16_EMC4_LOW 1 //CT16Bn PWM4 pin is low. +#define CT16_EMC4_HIGH 2 //CT16Bn PWM4 pin is high. +#define CT16_EMC4_TOGGLE 3 //Toggle CT16Bn PWM4 pin. +#define mskCT16_EMC4_DO_NOTHING (CT16_EMC4_LOW<<8) +#define mskCT16_EMC4_LOW (CT16_EMC4_LOW<<8) +#define mskCT16_EMC4_HIGH (CT16_EMC4_HIGH<<8) +#define mskCT16_EMC4_TOGGLE (CT16_EMC4_TOGGLE<<8) + + //[11:10]CT16Bn PWM5 functionality +#define CT16_EMC5_DO_NOTHING 0 //Do nothing. +#define CT16_EMC5_LOW 1 //CT16Bn PWM5 pin is low. +#define CT16_EMC5_HIGH 2 //CT16Bn PWM5 pin is high. +#define CT16_EMC5_TOGGLE 3 //Toggle CT16Bn PWM5 pin. +#define mskCT16_EMC5_DO_NOTHING (CT16_EMC5_LOW<<10) +#define mskCT16_EMC5_LOW (CT16_EMC5_LOW<<10) +#define mskCT16_EMC5_HIGH (CT16_EMC5_HIGH<<10) +#define mskCT16_EMC5_TOGGLE (CT16_EMC5_TOGGLE<<10) + + //[13:12]CT16Bn PWM6 functionality +#define CT16_EMC6_DO_NOTHING 0 //Do nothing. +#define CT16_EMC6_LOW 1 //CT16Bn PWM6 pin is low. +#define CT16_EMC6_HIGH 2 //CT16Bn PWM6 pin is high. +#define CT16_EMC6_TOGGLE 3 //Toggle CT16Bn PWM6 pin. +#define mskCT16_EMC6_DO_NOTHING (CT16_EMC6_LOW<<12) +#define mskCT16_EMC6_LOW (CT16_EMC6_LOW<<12) +#define mskCT16_EMC6_HIGH (CT16_EMC6_HIGH<<12) +#define mskCT16_EMC6_TOGGLE (CT16_EMC6_TOGGLE<<12) + + //[15:14]CT16Bn PWM7 functionality +#define CT16_EMC7_DO_NOTHING 0 //Do nothing. +#define CT16_EMC7_LOW 1 //CT16Bn PWM7 pin is low. +#define CT16_EMC7_HIGH 2 //CT16Bn PWM7 pin is high. +#define CT16_EMC7_TOGGLE 3 //Toggle CT16Bn PWM7 pin. +#define mskCT16_EMC7_DO_NOTHING (CT16_EMC7_LOW<<14) +#define mskCT16_EMC7_LOW (CT16_EMC7_LOW<<14) +#define mskCT16_EMC7_HIGH (CT16_EMC7_HIGH<<14) +#define mskCT16_EMC7_TOGGLE (CT16_EMC7_TOGGLE<<14) + + //[17:16]CT16Bn PWM8 functionality +#define CT16_EMC8_DO_NOTHING 0 //Do nothing. +#define CT16_EMC8_LOW 1 //CT16Bn PWM8 pin is low. +#define CT16_EMC8_HIGH 2 //CT16Bn PWM8 pin is high. +#define CT16_EMC8_TOGGLE 3 //Toggle CT16Bn PWM8 pin. +#define mskCT16_EMC8_DO_NOTHING (CT16_EMC8_LOW<<16) +#define mskCT16_EMC8_LOW (CT16_EMC8_LOW<<16) +#define mskCT16_EMC8_HIGH (CT16_EMC8_HIGH<<16) +#define mskCT16_EMC8_TOGGLE (CT16_EMC8_TOGGLE<<16) + + //[19:18]CT16Bn PWM9 functionality +#define CT16_EMC9_DO_NOTHING 0 //Do nothing. +#define CT16_EMC9_LOW 1 //CT16Bn PWM9 pin is low. +#define CT16_EMC9_HIGH 2 //CT16Bn PWM9 pin is high. +#define CT16_EMC9_TOGGLE 3 //Toggle CT16Bn PWM9 pin. +#define mskCT16_EMC9_DO_NOTHING (CT16_EMC9_LOW<<18) +#define mskCT16_EMC9_LOW (CT16_EMC9_LOW<<18) +#define mskCT16_EMC9_HIGH (CT16_EMC9_HIGH<<18) +#define mskCT16_EMC9_TOGGLE (CT16_EMC9_TOGGLE<<18) + + //[21:20]CT16Bn PWM10 functionality +#define CT16_EMC10_DO_NOTHING 0 //Do nothing. +#define CT16_EMC10_LOW 1 //CT16Bn PWM10 pin is low. +#define CT16_EMC10_HIGH 2 //CT16Bn PWM10 pin is high. +#define CT16_EMC10_TOGGLE 3 //Toggle CT16Bn PWM10 pin. +#define mskCT16_EMC10_DO_NOTHING (CT16_EMC10_LOW<<20) +#define mskCT16_EMC10_LOW (CT16_EMC10_LOW<<20) +#define mskCT16_EMC10_HIGH (CT16_EMC10_HIGH<<20) +#define mskCT16_EMC10_TOGGLE (CT16_EMC10_TOGGLE<<20) + + //[23:22]CT16Bn PWM11 functionality +#define CT16_EMC11_DO_NOTHING 0 //Do nothing. +#define CT16_EMC11_LOW 1 //CT16Bn PWM11 pin is low. +#define CT16_EMC11_HIGH 2 //CT16Bn PWM11 pin is high. +#define CT16_EMC11_TOGGLE 3 //Toggle CT16Bn PWM11 pin. +#define mskCT16_EMC11_DO_NOTHING (CT16_EMC11_LOW<<22) +#define mskCT16_EMC11_LOW (CT16_EMC11_LOW<<22) +#define mskCT16_EMC11_HIGH (CT16_EMC11_HIGH<<22) +#define mskCT16_EMC11_TOGGLE (CT16_EMC11_TOGGLE<<22) + + //[25:24]CT16Bn PWM12 functionality +#define CT16_EMC12_DO_NOTHING 0 //Do nothing. +#define CT16_EMC12_LOW 1 //CT16Bn PWM12 pin is low. +#define CT16_EMC12_HIGH 2 //CT16Bn PWM12 pin is high. +#define CT16_EMC12_TOGGLE 3 //Toggle CT16Bn PWM12 pin. +#define mskCT16_EMC12_DO_NOTHING (CT16_EMC12_LOW<<24) +#define mskCT16_EMC12_LOW (CT16_EMC12_LOW<<24) +#define mskCT16_EMC12_HIGH (CT16_EMC12_HIGH<<24) +#define mskCT16_EMC12_TOGGLE (CT16_EMC12_TOGGLE<<24) + + //[27:26]CT16Bn PWM13 functionality +#define CT16_EMC13_DO_NOTHING 0 //Do nothing. +#define CT16_EMC13_LOW 1 //CT16Bn PWM13 pin is low. +#define CT16_EMC13_HIGH 2 //CT16Bn PWM13 pin is high. +#define CT16_EMC13_TOGGLE 3 //Toggle CT16Bn PWM13 pin. +#define mskCT16_EMC13_DO_NOTHING (CT16_EMC13_LOW<<26) +#define mskCT16_EMC13_LOW (CT16_EMC13_LOW<<26) +#define mskCT16_EMC13_HIGH (CT16_EMC13_HIGH<<26) +#define mskCT16_EMC13_TOGGLE (CT16_EMC13_TOGGLE<<26) + + //[29:28]CT16Bn PWM14 functionality +#define CT16_EMC14_DO_NOTHING 0 //Do nothing. +#define CT16_EMC14_LOW 1 //CT16Bn PWM14 pin is low. +#define CT16_EMC14_HIGH 2 //CT16Bn PWM14 pin is high. +#define CT16_EMC14_TOGGLE 3 //Toggle CT16Bn PWM14 pin. +#define mskCT16_EMC14_DO_NOTHING (CT16_EMC14_LOW<<28) +#define mskCT16_EMC14_LOW (CT16_EMC14_LOW<<28) +#define mskCT16_EMC14_HIGH (CT16_EMC14_HIGH<<28) +#define mskCT16_EMC14_TOGGLE (CT16_EMC14_TOGGLE<<28) + + //[31:30]CT16Bn PWM15 functionality +#define CT16_EMC15_DO_NOTHING 0 //Do nothing. +#define CT16_EMC15_LOW 1 //CT16Bn PWM15 pin is low. +#define CT16_EMC15_HIGH 2 //CT16Bn PWM15 pin is high. +#define CT16_EMC15_TOGGLE 3 //Toggle CT16Bn PWM15 pin. +#define mskCT16_EMC15_DO_NOTHING (CT16_EMC15_LOW<<30) +#define mskCT16_EMC15_LOW (CT16_EMC15_LOW<<30) +#define mskCT16_EMC15_HIGH (CT16_EMC15_HIGH<<30) +#define mskCT16_EMC15_TOGGLE (CT16_EMC15_TOGGLE<<30) + +/* CT16Bn External Match Control register2 (0x90) */ + //[1:0]CT16Bn PWM16 functionality +#define CT16_EMC16_DO_NOTHING 0 //Do nothing. +#define CT16_EMC16_LOW 1 //CT16Bn PWM16 pin is low. +#define CT16_EMC16_HIGH 2 //CT16Bn PWM16 pin is high. +#define CT16_EMC16_TOGGLE 3 //Toggle CT16Bn PWM16 pin. +#define mskCT16_EMC16_DO_NOTHING (CT16_EMC16_LOW<<0) +#define mskCT16_EMC16_LOW (CT16_EMC16_LOW<<0) +#define mskCT16_EMC16_HIGH (CT16_EMC16_HIGH<<0) +#define mskCT16_EMC16_TOGGLE (CT16_EMC16_TOGGLE<<0) + + //[3:2]CT16Bn PWM17 functionality +#define CT16_EMC17_DO_NOTHING 0 //Do nothing. +#define CT16_EMC17_LOW 1 //CT16Bn PWM17 pin is low. +#define CT16_EMC17_HIGH 2 //CT16Bn PWM17 pin is high. +#define CT16_EMC17_TOGGLE 3 //Toggle CT16Bn PWM17 pin. +#define mskCT16_EMC17_DO_NOTHING (CT16_EMC17_LOW<<2) +#define mskCT16_EMC17_LOW (CT16_EMC17_LOW<<2) +#define mskCT16_EMC17_HIGH (CT16_EMC17_HIGH<<2) +#define mskCT16_EMC17_TOGGLE (CT16_EMC17_TOGGLE<<2) + + //[5:4]CT16Bn PWM18 functionality +#define CT16_EMC18_DO_NOTHING 0 //Do nothing. +#define CT16_EMC18_LOW 1 //CT16Bn PWM18 pin is low. +#define CT16_EMC18_HIGH 2 //CT16Bn PWM18 pin is high. +#define CT16_EMC18_TOGGLE 3 //Toggle CT16Bn PWM18 pin. +#define mskCT16_EMC18_DO_NOTHING (CT16_EMC18_LOW<<4) +#define mskCT16_EMC18_LOW (CT16_EMC18_LOW<<4) +#define mskCT16_EMC18_HIGH (CT16_EMC18_HIGH<<4) +#define mskCT16_EMC18_TOGGLE (CT16_EMC18_TOGGLE<<4) + + //[7:6]CT16Bn PWM19 functionality +#define CT16_EMC19_DO_NOTHING 0 //Do nothing. +#define CT16_EMC19_LOW 1 //CT16Bn PWM19 pin is low. +#define CT16_EMC19_HIGH 2 //CT16Bn PWM19 pin is high. +#define CT16_EMC19_TOGGLE 3 //Toggle CT16Bn PWM19 pin. +#define mskCT16_EMC19_DO_NOTHING (CT16_EMC19_LOW<<6) +#define mskCT16_EMC19_LOW (CT16_EMC19_LOW<<6) +#define mskCT16_EMC19_HIGH (CT16_EMC19_HIGH<<6) +#define mskCT16_EMC19_TOGGLE (CT16_EMC19_TOGGLE<<6) + + //[9:8]CT16Bn PWM20 functionality +#define CT16_EMC20_DO_NOTHING 0 //Do nothing. +#define CT16_EMC20_LOW 1 //CT16Bn PWM20 pin is low. +#define CT16_EMC20_HIGH 2 //CT16Bn PWM20 pin is high. +#define CT16_EMC20_TOGGLE 3 //Toggle CT16Bn PWM20 pin. +#define mskCT16_EMC20_DO_NOTHING (CT16_EMC20_LOW<<8) +#define mskCT16_EMC20_LOW (CT16_EMC20_LOW<<8) +#define mskCT16_EMC20_HIGH (CT16_EMC20_HIGH<<8) +#define mskCT16_EMC20_TOGGLE (CT16_EMC20_TOGGLE<<8) + + //[11:10]CT16Bn PWM21 functionality +#define CT16_EMC21_DO_NOTHING 0 //Do nothing. +#define CT16_EMC21_LOW 1 //CT16Bn PWM21 pin is low. +#define CT16_EMC21_HIGH 2 //CT16Bn PWM21 pin is high. +#define CT16_EMC21_TOGGLE 3 //Toggle CT16Bn PWM21 pin. +#define mskCT16_EMC21_DO_NOTHING (CT16_EMC21_LOW<<10) +#define mskCT16_EMC21_LOW (CT16_EMC21_LOW<<10) +#define mskCT16_EMC21_HIGH (CT16_EMC21_HIGH<<10) +#define mskCT16_EMC21_TOGGLE (CT16_EMC21_TOGGLE<<10) + + //[13:12]CT16Bn PWM22 functionality +#define CT16_EMC22_DO_NOTHING 0 //Do nothing. +#define CT16_EMC22_LOW 1 //CT16Bn PWM22 pin is low. +#define CT16_EMC22_HIGH 2 //CT16Bn PWM22 pin is high. +#define CT16_EMC22_TOGGLE 3 //Toggle CT16Bn PWM22 pin. +#define mskCT16_EMC22_DO_NOTHING (CT16_EMC22_LOW<<12) +#define mskCT16_EMC22_LOW (CT16_EMC22_LOW<<12) +#define mskCT16_EMC22_HIGH (CT16_EMC22_HIGH<<12) +#define mskCT16_EMC22_TOGGLE (CT16_EMC22_TOGGLE<<12) + + //[15:14]CT16Bn PWM23 functionality +#define CT16_EMC23_DO_NOTHING 0 //Do nothing. +#define CT16_EMC23_LOW 1 //CT16Bn PWM23 pin is low. +#define CT16_EMC23_HIGH 2 //CT16Bn PWM23 pin is high. +#define CT16_EMC23_TOGGLE 3 //Toggle CT16Bn PWM23 pin. +#define mskCT16_EMC23_DO_NOTHING (CT16_EMC23_LOW<<14) +#define mskCT16_EMC23_LOW (CT16_EMC23_LOW<<14) +#define mskCT16_EMC23_HIGH (CT16_EMC23_HIGH<<14) +#define mskCT16_EMC23_TOGGLE (CT16_EMC23_TOGGLE<<14) + +/* CT16Bn PWM Control register (0x94) */ + //[1:0] CT16Bn PWM0 output mode. +#define CT16_PWM0MODE_1 0 // PWM mode 1. +#define CT16_PWM0MODE_2 1 // PWM mode 2. +#define CT16_PWM0MODE_FORCE_0 2 // Force 0. +#define CT16_PWM0MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM0MODE_1 (CT16_PWM0MODE_1<<0) +#define mskCT16_PWM0MODE_2 (CT16_PWM0MODE_2<<0) +#define mskCT16_PWM0MODE_FORCE_0 (CT16_PWM0MODE_FORCE_0<<0) +#define mskCT16_PWM0MODE_FORCE_1 (CT16_PWM0MODE_FORCE_1<<0) + + //[3:2] CT16Bn PWM1 output mode. +#define CT16_PWM1MODE_1 0 // PWM mode 1. +#define CT16_PWM1MODE_2 1 // PWM mode 2. +#define CT16_PWM1MODE_FORCE_0 2 // Force 0. +#define CT16_PWM1MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM1MODE_1 (CT16_PWM1MODE_1<<2) +#define mskCT16_PWM1MODE_2 (CT16_PWM1MODE_2<<2) +#define mskCT16_PWM1MODE_FORCE_0 (CT16_PWM1MODE_FORCE_0<<2) +#define mskCT16_PWM1MODE_FORCE_1 (CT16_PWM1MODE_FORCE_1<<2) + + //[5:4] CT16Bn PWM2 output mode. +#define CT16_PWM2MODE_1 0 // PWM mode 1. +#define CT16_PWM2MODE_2 1 // PWM mode 2. +#define CT16_PWM2MODE_FORCE_0 2 // Force 0. +#define CT16_PWM2MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM2MODE_1 (CT16_PWM2MODE_1<<4) +#define mskCT16_PWM2MODE_2 (CT16_PWM2MODE_2<<4) +#define mskCT16_PWM2MODE_FORCE_0 (CT16_PWM2MODE_FORCE_0<<4) +#define mskCT16_PWM2MODE_FORCE_1 (CT16_PWM2MODE_FORCE_1<<4) + + //[7:6] CT16Bn PWM3 output mode. +#define CT16_PWM3MODE_1 0 // PWM mode 1. +#define CT16_PWM3MODE_2 1 // PWM mode 2. +#define CT16_PWM3MODE_FORCE_0 2 // Force 0. +#define CT16_PWM3MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM3MODE_1 (CT16_PWM3MODE_1<<6) +#define mskCT16_PWM3MODE_2 (CT16_PWM3MODE_2<<6) +#define mskCT16_PWM3MODE_FORCE_0 (CT16_PWM3MODE_FORCE_0<<6) +#define mskCT16_PWM3MODE_FORCE_1 (CT16_PWM3MODE_FORCE_1<<6) + + //[9:8] CT16Bn PWM4 output mode. +#define CT16_PWM4MODE_1 0 // PWM mode 1. +#define CT16_PWM4MODE_2 1 // PWM mode 2. +#define CT16_PWM4MODE_FORCE_0 2 // Force 0. +#define CT16_PWM4MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM4MODE_1 (CT16_PWM4MODE_1<<8) +#define mskCT16_PWM4MODE_2 (CT16_PWM4MODE_2<<8) +#define mskCT16_PWM4MODE_FORCE_0 (CT16_PWM4MODE_FORCE_0<<8) +#define mskCT16_PWM4MODE_FORCE_1 (CT16_PWM4MODE_FORCE_1<<8) + + //[11:10] CT16Bn PWM5 output mode. +#define CT16_PWM5MODE_1 0 // PWM mode 1. +#define CT16_PWM5MODE_2 1 // PWM mode 2. +#define CT16_PWM5MODE_FORCE_0 2 // Force 0. +#define CT16_PWM5MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM5MODE_1 (CT16_PWM5MODE_1<<10) +#define mskCT16_PWM5MODE_2 (CT16_PWM5MODE_2<<10) +#define mskCT16_PWM5MODE_FORCE_0 (CT16_PWM5MODE_FORCE_0<<10) +#define mskCT16_PWM5MODE_FORCE_1 (CT16_PWM5MODE_FORCE_1<<10) + + //[13:12] CT16Bn PWM6 output mode. +#define CT16_PWM6MODE_1 0 // PWM mode 1. +#define CT16_PWM6MODE_2 1 // PWM mode 2. +#define CT16_PWM6MODE_FORCE_0 2 // Force 0. +#define CT16_PWM6MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM6MODE_1 (CT16_PWM6MODE_1<<12) +#define mskCT16_PWM6MODE_2 (CT16_PWM6MODE_2<<12) +#define mskCT16_PWM6MODE_FORCE_0 (CT16_PWM6MODE_FORCE_0<<12) +#define mskCT16_PWM6MODE_FORCE_1 (CT16_PWM6MODE_FORCE_1<<12) + + //[15:14] CT16Bn PWM7 output mode. +#define CT16_PWM7MODE_1 0 // PWM mode 1. +#define CT16_PWM7MODE_2 1 // PWM mode 2. +#define CT16_PWM7MODE_FORCE_0 2 // Force 0. +#define CT16_PWM7MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM7MODE_1 (CT16_PWM7MODE_1<<14) +#define mskCT16_PWM7MODE_2 (CT16_PWM7MODE_2<<14) +#define mskCT16_PWM7MODE_FORCE_0 (CT16_PWM7MODE_FORCE_0<<14) +#define mskCT16_PWM7MODE_FORCE_1 (CT16_PWM7MODE_FORCE_1<<14) + + //[17:16] CT16Bn PWM8 output mode. +#define CT16_PWM8MODE_1 0 // PWM mode 1. +#define CT16_PWM8MODE_2 1 // PWM mode 2. +#define CT16_PWM8MODE_FORCE_0 2 // Force 0. +#define CT16_PWM8MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM8MODE_1 (CT16_PWM8MODE_1<<16) +#define mskCT16_PWM8MODE_2 (CT16_PWM8MODE_2<<16) +#define mskCT16_PWM8MODE_FORCE_0 (CT16_PWM8MODE_FORCE_0<<16) +#define mskCT16_PWM8MODE_FORCE_1 (CT16_PWM8MODE_FORCE_1<<16) + + //[19:18] CT16Bn PWM9 output mode. +#define CT16_PWM9MODE_1 0 // PWM mode 1. +#define CT16_PWM9MODE_2 1 // PWM mode 2. +#define CT16_PWM9MODE_FORCE_0 2 // Force 0. +#define CT16_PWM9MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM9MODE_1 (CT16_PWM9MODE_1<<18) +#define mskCT16_PWM9MODE_2 (CT16_PWM9MODE_2<<18) +#define mskCT16_PWM9MODE_FORCE_0 (CT16_PWM9MODE_FORCE_0<<18) +#define mskCT16_PWM9MODE_FORCE_1 (CT16_PWM9MODE_FORCE_1<<18) + + //[21:20] CT16Bn PWM10 output mode. +#define CT16_PWM10MODE_1 0 // PWM mode 1. +#define CT16_PWM10MODE_2 1 // PWM mode 2. +#define CT16_PWM10MODE_FORCE_0 2 // Force 0. +#define CT16_PWM10MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM10MODE_1 (CT16_PWM10MODE_1<<20) +#define mskCT16_PWM10MODE_2 (CT16_PWM10MODE_2<<20) +#define mskCT16_PWM10MODE_FORCE_0 (CT16_PWM10MODE_FORCE_0<<20) +#define mskCT16_PWM10MODE_FORCE_1 (CT16_PWM10MODE_FORCE_1<<20) + + //[23:22] CT16Bn PWM11 output mode. +#define CT16_PWM11MODE_1 0 // PWM mode 1. +#define CT16_PWM11MODE_2 1 // PWM mode 2. +#define CT16_PWM11MODE_FORCE_0 2 // Force 0. +#define CT16_PWM11MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM11MODE_1 (CT16_PWM11MODE_1<<22) +#define mskCT16_PWM11MODE_2 (CT16_PWM11MODE_2<<22) +#define mskCT16_PWM11MODE_FORCE_0 (CT16_PWM11MODE_FORCE_0<<22) +#define mskCT16_PWM11MODE_FORCE_1 (CT16_PWM11MODE_FORCE_1<<22) + + //[25:24] CT16Bn PWM12 output mode. +#define CT16_PWM12MODE_1 0 // PWM mode 1. +#define CT16_PWM12MODE_2 1 // PWM mode 2. +#define CT16_PWM12MODE_FORCE_0 2 // Force 0. +#define CT16_PWM12MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM12MODE_1 (CT16_PWM12MODE_1<<24) +#define mskCT16_PWM12MODE_2 (CT16_PWM12MODE_2<<24) +#define mskCT16_PWM12MODE_FORCE_0 (CT16_PWM12MODE_FORCE_0<<24) +#define mskCT16_PWM12MODE_FORCE_1 (CT16_PWM12MODE_FORCE_1<<24) + + //[27:26] CT16Bn PWM13 output mode. +#define CT16_PWM13MODE_1 0 // PWM mode 1. +#define CT16_PWM13MODE_2 1 // PWM mode 2. +#define CT16_PWM13MODE_FORCE_0 2 // Force 0. +#define CT16_PWM13MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM13MODE_1 (CT16_PWM13MODE_1<<26) +#define mskCT16_PWM13MODE_2 (CT16_PWM13MODE_2<<26) +#define mskCT16_PWM13MODE_FORCE_0 (CT16_PWM13MODE_FORCE_0<<26) +#define mskCT16_PWM13MODE_FORCE_1 (CT16_PWM13MODE_FORCE_1<<26) + + //[29:28] CT16Bn PWM14 output mode. +#define CT16_PWM14MODE_1 0 // PWM mode 1. +#define CT16_PWM14MODE_2 1 // PWM mode 2. +#define CT16_PWM14MODE_FORCE_0 2 // Force 0. +#define CT16_PWM14MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM14MODE_1 (CT16_PWM14MODE_1<<28) +#define mskCT16_PWM14MODE_2 (CT16_PWM14MODE_2<<28) +#define mskCT16_PWM14MODE_FORCE_0 (CT16_PWM14MODE_FORCE_0<<28) +#define mskCT16_PWM14MODE_FORCE_1 (CT16_PWM14MODE_FORCE_1<<28) + + //[31:30] CT16Bn PWM15 output mode. +#define CT16_PWM15MODE_1 0 // PWM mode 1. +#define CT16_PWM15MODE_2 1 // PWM mode 2. +#define CT16_PWM15MODE_FORCE_0 2 // Force 0. +#define CT16_PWM15MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM15MODE_1 (CT16_PWM15MODE_1<<30) +#define mskCT16_PWM15MODE_2 (CT16_PWM15MODE_2<<30) +#define mskCT16_PWM15MODE_FORCE_0 (CT16_PWM15MODE_FORCE_0<<30) +#define mskCT16_PWM15MODE_FORCE_1 (CT16_PWM15MODE_FORCE_1<<30) + +/* CT16Bn PWM Control register (0x98) */ + //[1:0] CT16Bn PWM16 output mode. +#define CT16_PWM16MODE_1 0 // PWM mode 1. +#define CT16_PWM16MODE_2 1 // PWM mode 2. +#define CT16_PWM16MODE_FORCE_0 2 // Force 0. +#define CT16_PWM16MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM16MODE_1 (CT16_PWM16MODE_1<<0) +#define mskCT16_PWM16MODE_2 (CT16_PWM16MODE_2<<0) +#define mskCT16_PWM16MODE_FORCE_0 (CT16_PWM16MODE_FORCE_0<<0) +#define mskCT16_PWM16MODE_FORCE_1 (CT16_PWM16MODE_FORCE_1<<0) + + //[3:2] CT16Bn PWM17 output mode. +#define CT16_PWM17MODE_1 0 // PWM mode 1. +#define CT16_PWM17MODE_2 1 // PWM mode 2. +#define CT16_PWM17MODE_FORCE_0 2 // Force 0. +#define CT16_PWM17MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM17MODE_1 (CT16_PWM17MODE_1<<2) +#define mskCT16_PWM17MODE_2 (CT16_PWM17MODE_2<<2) +#define mskCT16_PWM17MODE_FORCE_0 (CT16_PWM17MODE_FORCE_0<<2) +#define mskCT16_PWM17MODE_FORCE_1 (CT16_PWM17MODE_FORCE_1<<2) + + //[5:4] CT16Bn PWM18 output mode. +#define CT16_PWM18MODE_1 0 // PWM mode 1. +#define CT16_PWM18MODE_2 1 // PWM mode 2. +#define CT16_PWM18MODE_FORCE_0 2 // Force 0. +#define CT16_PWM18MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM18MODE_1 (CT16_PWM18MODE_1<<4) +#define mskCT16_PWM18MODE_2 (CT16_PWM18MODE_2<<4) +#define mskCT16_PWM18MODE_FORCE_0 (CT16_PWM18MODE_FORCE_0<<4) +#define mskCT16_PWM18MODE_FORCE_1 (CT16_PWM18MODE_FORCE_1<<4) + + //[7:6] CT16Bn PWM19 output mode. +#define CT16_PWM19MODE_1 0 // PWM mode 1. +#define CT16_PWM19MODE_2 1 // PWM mode 2. +#define CT16_PWM19MODE_FORCE_0 2 // Force 0. +#define CT16_PWM19MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM19MODE_1 (CT16_PWM19MODE_1<<6) +#define mskCT16_PWM19MODE_2 (CT16_PWM19MODE_2<<6) +#define mskCT16_PWM19MODE_FORCE_0 (CT16_PWM19MODE_FORCE_0<<6) +#define mskCT16_PWM19MODE_FORCE_1 (CT16_PWM19MODE_FORCE_1<<6) + + //[9:8] CT16Bn PWM20 output mode. +#define CT16_PWM20MODE_1 0 // PWM mode 1. +#define CT16_PWM20MODE_2 1 // PWM mode 2. +#define CT16_PWM20MODE_FORCE_0 2 // Force 0. +#define CT16_PWM20MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM20MODE_1 (CT16_PWM20MODE_1<<8) +#define mskCT16_PWM20MODE_2 (CT16_PWM20MODE_2<<8) +#define mskCT16_PWM20MODE_FORCE_0 (CT16_PWM20MODE_FORCE_0<<8) +#define mskCT16_PWM20MODE_FORCE_1 (CT16_PWM20MODE_FORCE_1<<8) + + //[11:10] CT16Bn PWM21 output mode. +#define CT16_PWM21MODE_1 0 // PWM mode 1. +#define CT16_PWM21MODE_2 1 // PWM mode 2. +#define CT16_PWM21MODE_FORCE_0 2 // Force 0. +#define CT16_PWM21MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM21MODE_1 (CT16_PWM21MODE_1<<10) +#define mskCT16_PWM21MODE_2 (CT16_PWM21MODE_2<<10) +#define mskCT16_PWM21MODE_FORCE_0 (CT16_PWM21MODE_FORCE_0<<10) +#define mskCT16_PWM21MODE_FORCE_1 (CT16_PWM21MODE_FORCE_1<<10) + + //[13:12] CT16Bn PWM22 output mode. +#define CT16_PWM22MODE_1 0 // PWM mode 1. +#define CT16_PWM22MODE_2 1 // PWM mode 2. +#define CT16_PWM22MODE_FORCE_0 2 // Force 0. +#define CT16_PWM22MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM22MODE_1 (CT16_PWM22MODE_1<<12) +#define mskCT16_PWM22MODE_2 (CT16_PWM22MODE_2<<12) +#define mskCT16_PWM22MODE_FORCE_0 (CT16_PWM22MODE_FORCE_0<<12) +#define mskCT16_PWM22MODE_FORCE_1 (CT16_PWM22MODE_FORCE_1<<12) + + //[15:14] CT16Bn PWM23 output mode. +#define CT16_PWM23MODE_1 0 // PWM mode 1. +#define CT16_PWM23MODE_2 1 // PWM mode 2. +#define CT16_PWM23MODE_FORCE_0 2 // Force 0. +#define CT16_PWM23MODE_FORCE_1 3 // Force 1. +#define mskCT16_PWM23MODE_1 (CT16_PWM23MODE_1<<14) +#define mskCT16_PWM23MODE_2 (CT16_PWM23MODE_2<<14) +#define mskCT16_PWM23MODE_FORCE_0 (CT16_PWM23MODE_FORCE_0<<14) +#define mskCT16_PWM23MODE_FORCE_1 (CT16_PWM23MODE_FORCE_1<<14) + +/* CT16Bn PWM Enable register (0x9C) */ + //[0:0] CT16Bn PWM0 enable. +#define CT16_PWM0EN_EN 1 // CT16Bn PWM0 is enabled for PWM mode. +#define CT16_PWM0EN_EM0 0 // CT16Bn PWM0 is controlled by EM0. +#define mskCT16_PWM0EN_EN (CT16_PWM0EN_EN<<0) +#define mskCT16_PWM0EN_EM0 (CT16_PWM0EN_EM0<<0) + + //[1:1] CT16Bn PWM1 enable. +#define CT16_PWM1EN_EN 1 // CT16Bn PWM1 is enabled for PWM mode. +#define CT16_PWM1EN_EM1 0 // CT16Bn PWM1 is controlled by EM1. +#define mskCT16_PWM1EN_EN (CT16_PWM1EN_EN<<1) +#define mskCT16_PWM1EN_EM1 (CT16_PWM1EN_EM1<<1) + + //[2:2] CT16Bn PWM2 enable. +#define CT16_PWM2EN_EN 1 // CT16Bn PWM2 is enabled for PWM mode. +#define CT16_PWM2EN_EM2 0 // CT16Bn PWM2 is controlled by EM2. +#define mskCT16_PWM2EN_EN (CT16_PWM2EN_EN<<2) +#define mskCT16_PWM2EN_EM2 (CT16_PWM2EN_EM2<<2) + + //[3:3] CT16Bn PWM3 enable. +#define CT16_PWM3EN_EN 1 // CT16Bn PWM3 is enabled for PWM mode. +#define CT16_PWM3EN_EM3 0 // CT16Bn PWM3 is controlled by EM3. +#define mskCT16_PWM3EN_EN (CT16_PWM3EN_EN<<3) +#define mskCT16_PWM3EN_EM3 (CT16_PWM3EN_EM3<<3) + + //[4:4] CT16Bn PWM4 enable. +#define CT16_PWM4EN_EN 1 // CT16Bn PWM4 is enabled for PWM mode. +#define CT16_PWM4EN_EM4 0 // CT16Bn PWM4 is controlled by EM4. +#define mskCT16_PWM4EN_EN (CT16_PWM4EN_EN<<4) +#define mskCT16_PWM4EN_EM4 (CT16_PWM4EN_EM4<<4) + + //[5:5] CT16Bn PWM5 enable. +#define CT16_PWM5EN_EN 1 // CT16Bn PWM5 is enabled for PWM mode. +#define CT16_PWM5EN_EM5 0 // CT16Bn PWM5 is controlled by EM5. +#define mskCT16_PWM5EN_EN (CT16_PWM5EN_EN<<5) +#define mskCT16_PWM5EN_EM5 (CT16_PWM5EN_EM5<<5) + + //[6:6] CT16Bn PWM6 enable. +#define CT16_PWM6EN_EN 1 // CT16Bn PWM6 is enabled for PWM mode. +#define CT16_PWM6EN_EM6 0 // CT16Bn PWM6 is controlled by EM6. +#define mskCT16_PWM6EN_EN (CT16_PWM6EN_EN<<6) +#define mskCT16_PWM6EN_EM6 (CT16_PWM6EN_EM6<<6) + + //[7:7] CT16Bn PWM7 enable. +#define CT16_PWM7EN_EN 1 // CT16Bn PWM7 is enabled for PWM mode. +#define CT16_PWM7EN_EM7 0 // CT16Bn PWM7 is controlled by EM7. +#define mskCT16_PWM7EN_EN (CT16_PWM7EN_EN<<7) +#define mskCT16_PWM7EN_EM7 (CT16_PWM7EN_EM7<<7) + + //[8:8] CT16Bn PWM8 enable. +#define CT16_PWM8EN_EN 1 // CT16Bn PWM8 is enabled for PWM mode. +#define CT16_PWM8EN_EM8 0 // CT16Bn PWM8 is controlled by EM8. +#define mskCT16_PWM8EN_EN (CT16_PWM8EN_EN<<8) +#define mskCT16_PWM8EN_EM8 (CT16_PWM8EN_EM8<<8) + + //[9:9] CT16Bn PWM9 enable. +#define CT16_PWM9EN_EN 1 // CT16Bn PWM9 is enabled for PWM mode. +#define CT16_PWM9EN_EM9 0 // CT16Bn PWM9 is controlled by EM9. +#define mskCT16_PWM9EN_EN (CT16_PWM9EN_EN<<9) +#define mskCT16_PWM9EN_EM9 (CT16_PWM9EN_EM9<<9) + + //[10:10] CT16Bn PWM10 enable. +#define CT16_PWM10EN_EN 1 // CT16Bn PWM10 is enabled for PWM mode. +#define CT16_PWM10EN_EM10 0 // CT16Bn PWM10 is controlled by EM10. +#define mskCT16_PWM10EN_EN (CT16_PWM10EN_EN<<10) +#define mskCT16_PWM10EN_EM10 (CT16_PWM10EN_EM10<<10) + + //[11:11] CT16Bn PWM11 enable. +#define CT16_PWM11EN_EN 1 // CT16Bn PWM11 is enabled for PWM mode. +#define CT16_PWM11EN_EM11 0 // CT16Bn PWM11 is controlled by EM11. +#define mskCT16_PWM11EN_EN (CT16_PWM11EN_EN<<11) +#define mskCT16_PWM11EN_EM11 (CT16_PWM11EN_EM11<<11) + + //[12:12] CT16Bn PWM12 enable. +#define CT16_PWM12EN_EN 1 // CT16Bn PWM12 is enabled for PWM mode. +#define CT16_PWM12EN_EM12 0 // CT16Bn PWM12 is controlled by EM12. +#define mskCT16_PWM12EN_EN (CT16_PWM12EN_EN<<12) +#define mskCT16_PWM12EN_EM12 (CT16_PWM12EN_EM12<<12) + + //[13:13] CT16Bn PWM13 enable. +#define CT16_PWM13EN_EN 1 // CT16Bn PWM13 is enabled for PWM mode. +#define CT16_PWM13EN_EM13 0 // CT16Bn PWM13 is controlled by EM13. +#define mskCT16_PWM13EN_EN (CT16_PWM13EN_EN<<13) +#define mskCT16_PWM13EN_EM13 (CT16_PWM13EN_EM13<<13) + + //[14:14] CT16Bn PWM14 enable. +#define CT16_PWM14EN_EN 1 // CT16Bn PWM14 is enabled for PWM mode. +#define CT16_PWM14EN_EM14 0 // CT16Bn PWM14 is controlled by EM14. +#define mskCT16_PWM14EN_EN (CT16_PWM14EN_EN<<14) +#define mskCT16_PWM14EN_EM14 (CT16_PWM14EN_EM14<<14) + + //[15:15] CT16Bn PWM15 enable. +#define CT16_PWM15EN_EN 1 // CT16Bn PWM15 is enabled for PWM mode. +#define CT16_PWM15EN_EM15 0 // CT16Bn PWM15 is controlled by EM15. +#define mskCT16_PWM15EN_EN (CT16_PWM15EN_EN<<15) +#define mskCT16_PWM15EN_EM15 (CT16_PWM15EN_EM15<<15) + + //[16:16] CT16Bn PWM16 enable. +#define CT16_PWM16EN_EN 1 // CT16Bn PWM16 is enabled for PWM mode. +#define CT16_PWM16EN_EM16 0 // CT16Bn PWM16 is controlled by EM16. +#define mskCT16_PWM16EN_EN (CT16_PWM16EN_EN<<16) +#define mskCT16_PWM16EN_EM16 (CT16_PWM16EN_EM16<<16) + + //[17:17] CT16Bn PWM17 enable. +#define CT16_PWM17EN_EN 1 // CT16Bn PWM17 is enabled for PWM mode. +#define CT16_PWM17EN_EM17 0 // CT16Bn PWM17 is controlled by EM17. +#define mskCT16_PWM17EN_EN (CT16_PWM17EN_EN<<17) +#define mskCT16_PWM17EN_EM17 (CT16_PWM17EN_EM17<<17) + + //[18:18] CT16Bn PWM18 enable. +#define CT16_PWM18EN_EN 1 // CT16Bn PWM18 is enabled for PWM mode. +#define CT16_PWM18EN_EM18 0 // CT16Bn PWM18 is controlled by EM18. +#define mskCT16_PWM18EN_EN (CT16_PWM18EN_EN<<18) +#define mskCT16_PWM18EN_EM18 (CT16_PWM18EN_EM18<<18) + + //[19:19] CT16Bn PWM19 enable. +#define CT16_PWM19EN_EN 1 // CT16Bn PWM19 is enabled for PWM mode. +#define CT16_PWM19EN_EM19 0 // CT16Bn PWM19 is controlled by EM19. +#define mskCT16_PWM19EN_EN (CT16_PWM19EN_EN<<19) +#define mskCT16_PWM19EN_EM19 (CT16_PWM19EN_EM19<<19) + + //[20:20] CT16Bn PWM20 enable. +#define CT16_PWM20EN_EN 1 // CT16Bn PWM20 is enabled for PWM mode. +#define CT16_PWM20EN_EM20 0 // CT16Bn PWM20 is controlled by EM20. +#define mskCT16_PWM20EN_EN (CT16_PWM20EN_EN<<20) +#define mskCT16_PWM20EN_EM20 (CT16_PWM20EN_EM20<<20) + + //[21:21] CT16Bn PWM21 enable. +#define CT16_PWM21EN_EN 1 // CT16Bn PWM21 is enabled for PWM mode. +#define CT16_PWM21EN_EM21 0 // CT16Bn PWM21 is controlled by EM21. +#define mskCT16_PWM21EN_EN (CT16_PWM21EN_EN<<21) +#define mskCT16_PWM21EN_EM21 (CT16_PWM21EN_EM21<<21) + + //[22:22] CT16Bn PWM22 enable. +#define CT16_PWM22EN_EN 1 // CT16Bn PWM22 is enabled for PWM mode. +#define CT16_PWM22EN_EM22 0 // CT16Bn PWM22 is controlled by EM22. +#define mskCT16_PWM22EN_EN (CT16_PWM22EN_EN<<22) +#define mskCT16_PWM22EN_EM22 (CT16_PWM22EN_EM22<<22) + + //[23:23] CT16Bn PWM23 enable. +#define CT16_PWM23EN_EN 1 // CT16Bn PWM23 is enabled for PWM mode. +#define CT16_PWM23EN_EM23 0 // CT16Bn PWM23 is controlled by EM23. +#define mskCT16_PWM23EN_EN (CT16_PWM23EN_EN<<23) +#define mskCT16_PWM23EN_EM23 (CT16_PWM23EN_EM23<<23) + +/* CT16Bn PWM IO Enable register (0xA0) */ + //[0:0] CT16Bn PWM0 IO selection. +#define CT16_PWM0IOEN_EN 1 // PWM0 pin acts as match output. +#define CT16_PWM0IOEN_DIS 0 // PWM0 pin acts as GPIO. +#define mskCT16_PWM0IOEN_EN (CT16_PWM0IOEN_EN<<0) +#define mskCT16_PWM0IOEN_DIS (CT16_PWM0IOEN_DIS<<0) + + //[1:1] CT16Bn PWM1 IO selection. +#define CT16_PWM1IOEN_EN 1 // PWM1 pin acts as match output. +#define CT16_PWM1IOEN_DIS 0 // PWM1 pin acts as GPIO. +#define mskCT16_PWM1IOEN_EN (CT16_PWM1IOEN_EN<<1) +#define mskCT16_PWM1IOEN_DIS (CT16_PWM1IOEN_DIS<<1) + + //[2:2] CT16Bn PWM2 IO selection. +#define CT16_PWM2IOEN_EN 1 // PWM2 pin acts as match output. +#define CT16_PWM2IOEN_DIS 0 // PWM2 pin acts as GPIO. +#define mskCT16_PWM2IOEN_EN (CT16_PWM2IOEN_EN<<2) +#define mskCT16_PWM2IOEN_DIS (CT16_PWM2IOEN_DIS<<2) + + //[3:3] CT16Bn PWM3 IO selection. +#define CT16_PWM3IOEN_EN 1 // PWM3 pin acts as match output. +#define CT16_PWM3IOEN_DIS 0 // PWM3 pin acts as GPIO. +#define mskCT16_PWM3IOEN_EN (CT16_PWM3IOEN_EN<<3) +#define mskCT16_PWM3IOEN_DIS (CT16_PWM3IOEN_DIS<<3) + + //[4:4] CT16Bn PWM4 IO selection. +#define CT16_PWM4IOEN_EN 1 // PWM4 pin acts as match output. +#define CT16_PWM4IOEN_DIS 0 // PWM4 pin acts as GPIO. +#define mskCT16_PWM4IOEN_EN (CT16_PWM4IOEN_EN<<4) +#define mskCT16_PWM4IOEN_DIS (CT16_PWM4IOEN_DIS<<4) + + //[5:5] CT16Bn PWM5 IO selection. +#define CT16_PWM5IOEN_EN 1 // PWM5 pin acts as match output. +#define CT16_PWM5IOEN_DIS 0 // PWM5 pin acts as GPIO. +#define mskCT16_PWM5IOEN_EN (CT16_PWM5IOEN_EN<<5) +#define mskCT16_PWM5IOEN_DIS (CT16_PWM5IOEN_DIS<<5) + + //[6:6] CT16Bn PWM6 IO selection. +#define CT16_PWM6IOEN_EN 1 // PWM6 pin acts as match output. +#define CT16_PWM6IOEN_DIS 0 // PWM6 pin acts as GPIO. +#define mskCT16_PWM6IOEN_EN (CT16_PWM6IOEN_EN<<6) +#define mskCT16_PWM6IOEN_DIS (CT16_PWM6IOEN_DIS<<6) + + //[7:7] CT16Bn PWM7 IO selection. +#define CT16_PWM7IOEN_EN 1 // PWM7 pin acts as match output. +#define CT16_PWM7IOEN_DIS 0 // PWM7 pin acts as GPIO. +#define mskCT16_PWM7IOEN_EN (CT16_PWM7IOEN_EN<<7) +#define mskCT16_PWM7IOEN_DIS (CT16_PWM7IOEN_DIS<<7) + + //[8:8] CT16Bn PWM8 IO selection. +#define CT16_PWM8IOEN_EN 1 // PWM8 pin acts as match output. +#define CT16_PWM8IOEN_DIS 0 // PWM8 pin acts as GPIO. +#define mskCT16_PWM8IOEN_EN (CT16_PWM8IOEN_EN<<8) +#define mskCT16_PWM8IOEN_DIS (CT16_PWM8IOEN_DIS<<8) + + //[9:9] CT16Bn PWM9 IO selection. +#define CT16_PWM9IOEN_EN 1 // PWM9 pin acts as match output. +#define CT16_PWM9IOEN_DIS 0 // PWM9 pin acts as GPIO. +#define mskCT16_PWM9IOEN_EN (CT16_PWM9IOEN_EN<<9) +#define mskCT16_PWM9IOEN_DIS (CT16_PWM9IOEN_DIS<<9) + + //[10:10] CT16Bn PWM10 IO selection. +#define CT16_PWM10IOEN_EN 1 // PWM10 pin acts as match output. +#define CT16_PWM10IOEN_DIS 0 // PWM10 pin acts as GPIO. +#define mskCT16_PWM10IOEN_EN (CT16_PWM10IOEN_EN<<10) +#define mskCT16_PWM10IOEN_DIS (CT16_PWM10IOEN_DIS<<10) + + //[11:11] CT16Bn PWM11 IO selection. +#define CT16_PWM11IOEN_EN 1 // PWM11 pin acts as match output. +#define CT16_PWM11IOEN_DIS 0 // PWM11 pin acts as GPIO. +#define mskCT16_PWM11IOEN_EN (CT16_PWM11IOEN_EN<<11) +#define mskCT16_PWM11IOEN_DIS (CT16_PWM11IOEN_DIS<<11) + + //[12:12] CT16Bn PWM12 IO selection. +#define CT16_PWM12IOEN_EN 1 // PWM12 pin acts as match output. +#define CT16_PWM12IOEN_DIS 0 // PWM12 pin acts as GPIO. +#define mskCT16_PWM12IOEN_EN (CT16_PWM12IOEN_EN<<12) +#define mskCT16_PWM12IOEN_DIS (CT16_PWM12IOEN_DIS<<12) + + //[13:13] CT16Bn PWM13 IO selection. +#define CT16_PWM13IOEN_EN 1 // PWM13 pin acts as match output. +#define CT16_PWM13IOEN_DIS 0 // PWM13 pin acts as GPIO. +#define mskCT16_PWM13IOEN_EN (CT16_PWM13IOEN_EN<<13) +#define mskCT16_PWM13IOEN_DIS (CT16_PWM13IOEN_DIS<<13) + + //[14:14] CT16Bn PWM14 IO selection. +#define CT16_PWM14IOEN_EN 1 // PWM14 pin acts as match output. +#define CT16_PWM14IOEN_DIS 0 // PWM14 pin acts as GPIO. +#define mskCT16_PWM14IOEN_EN (CT16_PWM14IOEN_EN<<14) +#define mskCT16_PWM14IOEN_DIS (CT16_PWM14IOEN_DIS<<14) + + //[15:15] CT16Bn PWM15 IO selection. +#define CT16_PWM15IOEN_EN 1 // PWM15 pin acts as match output. +#define CT16_PWM15IOEN_DIS 0 // PWM15 pin acts as GPIO. +#define mskCT16_PWM15IOEN_EN (CT16_PWM15IOEN_EN<<15) +#define mskCT16_PWM15IOEN_DIS (CT16_PWM15IOEN_DIS<<15) + + //[16:16] CT16Bn PWM16 IO selection. +#define CT16_PWM16IOEN_EN 1 // PWM16 pin acts as match output. +#define CT16_PWM16IOEN_DIS 0 // PWM16 pin acts as GPIO. +#define mskCT16_PWM16IOEN_EN (CT16_PWM16IOEN_EN<<16) +#define mskCT16_PWM16IOEN_DIS (CT16_PWM16IOEN_DIS<<16) + + //[17:17] CT16Bn PWM17 IO selection. +#define CT16_PWM17IOEN_EN 1 // PWM17 pin acts as match output. +#define CT16_PWM17IOEN_DIS 0 // PWM17 pin acts as GPIO. +#define mskCT16_PWM17IOEN_EN (CT16_PWM17IOEN_EN<<17) +#define mskCT16_PWM17IOEN_DIS (CT16_PWM17IOEN_DIS<<17) + + //[18:18] CT16Bn PWM18 IO selection. +#define CT16_PWM18IOEN_EN 1 // PWM18 pin acts as match output. +#define CT16_PWM18IOEN_DIS 0 // PWM18 pin acts as GPIO. +#define mskCT16_PWM18IOEN_EN (CT16_PWM18IOEN_EN<<18) +#define mskCT16_PWM18IOEN_DIS (CT16_PWM18IOEN_DIS<<18) + + //[19:19] CT16Bn PWM19 IO selection. +#define CT16_PWM19IOEN_EN 1 // PWM19 pin acts as match output. +#define CT16_PWM19IOEN_DIS 0 // PWM19 pin acts as GPIO. +#define mskCT16_PWM19IOEN_EN (CT16_PWM19IOEN_EN<<19) +#define mskCT16_PWM19IOEN_DIS (CT16_PWM19IOEN_DIS<<19) + + //[20:20] CT16Bn PWM20 IO selection. +#define CT16_PWM20IOEN_EN 1 // PWM20 pin acts as match output. +#define CT16_PWM20IOEN_DIS 0 // PWM20 pin acts as GPIO. +#define mskCT16_PWM20IOEN_EN (CT16_PWM20IOEN_EN<<20) +#define mskCT16_PWM20IOEN_DIS (CT16_PWM20IOEN_DIS<<20) + + //[21:21] CT16Bn PWM21 IO selection. +#define CT16_PWM21IOEN_EN 1 // PWM21 pin acts as match output. +#define CT16_PWM21IOEN_DIS 0 // PWM21 pin acts as GPIO. +#define mskCT16_PWM21IOEN_EN (CT16_PWM21IOEN_EN<<21) +#define mskCT16_PWM21IOEN_DIS (CT16_PWM21IOEN_DIS<<21) + + //[22:22] CT16Bn PWM22 IO selection. +#define CT16_PWM22IOEN_EN 1 // PWM22 pin acts as match output. +#define CT16_PWM22IOEN_DIS 0 // PWM22 pin acts as GPIO. +#define mskCT16_PWM22IOEN_EN (CT16_PWM22IOEN_EN<<22) +#define mskCT16_PWM22IOEN_DIS (CT16_PWM22IOEN_DIS<<22) + + //[23:23] CT16Bn PWM23 IO selection. +#define CT16_PWM23IOEN_EN 1 // PWM23 pin acts as match output. +#define CT16_PWM23IOEN_DIS 0 // PWM23 pin acts as GPIO. +#define mskCT16_PWM23IOEN_EN (CT16_PWM23IOEN_EN<<23) +#define mskCT16_PWM23IOEN_DIS (CT16_PWM23IOEN_DIS<<23) + + +/* CT16Bn Timer Raw Interrupt Status register (0xA4) */ +/* CT16Bn Timer Interrupt Clear register (0xA8) */ +/* The bitmask usage of iwCT16Bn_IrqEvent is the same with CT16Bn_RIS*/ +#define mskCT16_MR0IF (0x1<<0) //[0:0] Interrupt flag for match channel 0 +#define mskCT16_MR0IC mskCT16_MR0IF +#define mskCT16_MR1IF (0x1<<1) //[1:1] Interrupt flag for match channel 1 +#define mskCT16_MR1IC mskCT16_MR1IF +#define mskCT16_MR2IF (0x1<<2) //[2:2] Interrupt flag for match channel 2 +#define mskCT16_MR2IC mskCT16_MR2IF +#define mskCT16_MR3IF (0x1<<3) //[3:3] Interrupt flag for match channel 3 +#define mskCT16_MR3IC mskCT16_MR3IF +#define mskCT16_MR4IF (0x1<<4) //[4:4] Interrupt flag for match channel 4 +#define mskCT16_MR4IC mskCT16_MR4IF +#define mskCT16_MR5IF (0x1<<5) //[5:5] Interrupt flag for match channel 5 +#define mskCT16_MR5IC mskCT16_MR5IF +#define mskCT16_MR6IF (0x1<<6) //[6:6] Interrupt flag for match channel 6 +#define mskCT16_MR6IC mskCT16_MR6IF +#define mskCT16_MR7IF (0x1<<7) //[7:7] Interrupt flag for match channel 7 +#define mskCT16_MR7IC mskCT16_MR7IF +#define mskCT16_MR8IF (0x1<<8) //[8:8] Interrupt flag for match channel 8 +#define mskCT16_MR8IC mskCT16_MR8IF +#define mskCT16_MR9IF (0x1<<9) //[9:9] Interrupt flag for match channel 9 +#define mskCT16_MR9IC mskCT16_MR9IF +#define mskCT16_MR10IF (0x1<<10) //[10:10] Interrupt flag for match channel 10 +#define mskCT16_MR10IC mskCT16_MR10IF +#define mskCT16_MR11IF (0x1<<11) //[11:11] Interrupt flag for match channel 11 +#define mskCT16_MR11IC mskCT16_MR11IF +#define mskCT16_MR12IF (0x1<<12) //[12:12] Interrupt flag for match channel 12 +#define mskCT16_MR12IC mskCT16_MR12IF +#define mskCT16_MR13IF (0x1<<13) //[13:13] Interrupt flag for match channel 13 +#define mskCT16_MR13IC mskCT16_MR13IF +#define mskCT16_MR14IF (0x1<<14) //[14:14] Interrupt flag for match channel 14 +#define mskCT16_MR14IC mskCT16_MR14IF +#define mskCT16_MR15IF (0x1<<15) //[15:15] Interrupt flag for match channel 15 +#define mskCT16_MR15IC mskCT16_MR15IF +#define mskCT16_MR16IF (0x1<<16) //[16:16] Interrupt flag for match channel 16 +#define mskCT16_MR16IC mskCT16_MR16IF +#define mskCT16_MR17IF (0x1<<17) //[17:17] Interrupt flag for match channel 17 +#define mskCT16_MR17IC mskCT16_MR17IF +#define mskCT16_MR18IF (0x1<<18) //[18:18] Interrupt flag for match channel 18 +#define mskCT16_MR18IC mskCT16_MR18IF +#define mskCT16_MR19IF (0x1<<19) //[19:19] Interrupt flag for match channel 19 +#define mskCT16_MR19IC mskCT16_MR19IF +#define mskCT16_MR20IF (0x1<<20) //[20:20] Interrupt flag for match channel 20 +#define mskCT16_MR20IC mskCT16_MR20IF +#define mskCT16_MR21IF (0x1<<21) //[21:21] Interrupt flag for match channel 21 +#define mskCT16_MR21IC mskCT16_MR21IF +#define mskCT16_MR22IF (0x1<<22) //[22:22] Interrupt flag for match channel 22 +#define mskCT16_MR22IC mskCT16_MR22IF +#define mskCT16_MR23IF (0x1<<23) //[23:23] Interrupt flag for match channel 23 +#define mskCT16_MR23IC mskCT16_MR23IF +#define mskCT16_MR24IF (0x1<<24) //[24:24] Interrupt flag for match channel 24 +#define mskCT16_MR24IC mskCT16_MR24IF +#define mskCT16_CAP0IF (0x1<<25) //[25:25] Interrupt flag for capture channel 25 +#define mskCT16_CAP0IC mskCT16_CAP0IF +/*_____ M A C R O S ________________________________________________________*/ + +#endif //*__SN32F240B_CT16_H + diff --git a/keyboards/keychron/k6/boards/SN_SN32F240B/board.c b/keyboards/keychron/k6/boards/SN_SN32F240B/board.c new file mode 100644 index 000000000000..9f7c341eb476 --- /dev/null +++ b/keyboards/keychron/k6/boards/SN_SN32F240B/board.c @@ -0,0 +1,69 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * This file has been automatically generated using ChibiStudio board + * generator plugin. Do not edit manually. + */ + +#include "hal.h" + +#if HAL_USE_PAL || defined(__DOXYGEN__) +/** + * @brief PAL setup. + * @details Digital I/O ports static configuration as defined in @p board.h. + * This variable is used by the HAL when initializing the PAL driver. + */ +const PALConfig pal_default_config = { + #if SN32_HAS_GPIOA + {VAL_GPIOA_MODE}, + #endif + #if SN32_HAS_GPIOB + {VAL_GPIOB_MODE}, + #endif + #if SN32_HAS_GPIOC + {VAL_GPIOC_MODE}, + #endif + #if SN32_HAS_GPIOD + {VAL_GPIOD_MODE}, + #endif +}; +#endif + +static int flag __attribute__((section(".flag"))) __attribute__((__used__)) = 0xAAAA5555; + +extern void enter_bootloader_mode_if_requested(void); + +/** + * @brief Early initialization code. + * @details This initialization must be performed just after stack setup + * and before any other initialization. + */ +void __early_init(void) { + enter_bootloader_mode_if_requested(); + sn32_clock_init(); +} + + +/** + * @brief Board-specific initialization code. + * @todo Add your board-specific code, if any. + */ +void boardInit(void) { + + SN_SYS0->EXRSTCTRL_b.RESETDIS = 1; // Disable RESET + SN_SYS0->SWDCTRL_b.SWDDIS = 1; // Disable SWD +} diff --git a/keyboards/keychron/k6/boards/SN_SN32F240B/board.h b/keyboards/keychron/k6/boards/SN_SN32F240B/board.h new file mode 100644 index 000000000000..fc88ffaaa988 --- /dev/null +++ b/keyboards/keychron/k6/boards/SN_SN32F240B/board.h @@ -0,0 +1,229 @@ +/* + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for Generic STM32_F303 Board + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC_SN32_F240B +#define BOARD_NAME "SN32F240B" + +/* + * MCU type as defined in the ST header. + */ +#define system_SN32F240B + +/* + * IO pins assignments. + */ +#define GPIOA_PIN0 0U +#define GPIOA_PIN1 1U +#define GPIOA_PIN2 2U +#define GPIOA_PIN3 3U +#define GPIOA_PIN4 4U +#define GPIOA_PIN5 5U +#define GPIOA_PIN6 6U +#define GPIOA_PIN7 7U +#define GPIOA_PIN8 8U +#define GPIOA_PIN9 9U +#define GPIOA_PIN10 10U +#define GPIOA_PIN11 11U +#define GPIOA_PIN12 12U +#define GPIOA_PIN13 13U +#define GPIOA_PIN14 14U +#define GPIOA_PIN15 15U + +#define GPIOB_PIN0 0U +#define GPIOB_PIN1 1U +#define GPIOB_PIN2 2U +#define GPIOB_PIN3 3U +#define GPIOB_PIN4 4U +#define GPIOB_PIN5 5U +#define GPIOB_PIN6 6U +#define GPIOB_PIN7 7U +#define GPIOB_PIN8 8U +#define GPIOB_PIN9 9U +#define GPIOB_PIN10 10U +#define GPIOB_PIN11 11U +#define GPIOB_PIN12 12U +#define GPIOB_PIN13 13U +#define GPIOB_PIN14 14U +#define GPIOB_PIN15 15U + +#define GPIOC_PIN0 0U +#define GPIOC_PIN1 1U +#define GPIOC_PIN2 2U +#define GPIOC_PIN3 3U +#define GPIOC_PIN4 4U +#define GPIOC_PIN5 5U +#define GPIOC_PIN6 6U +#define GPIOC_PIN7 7U +#define GPIOC_PIN8 8U +#define GPIOC_PIN9 9U +#define GPIOC_PIN10 10U +#define GPIOC_PIN11 11U +#define GPIOC_PIN12 12U +#define GPIOC_PIN13 13U +#define GPIOC_PIN14 14U +#define GPIOC_PIN15 15U + +// #define GPIOD_PIN0 0U +// #define GPIOD_PIN1 1U +// #define GPIOD_PIN2 2U +#define GPIOD_PIN3 3U +#define GPIOD_PIN4 4U +#define GPIOD_PIN5 5U +#define GPIOD_PIN6 6U +#define GPIOD_PIN7 7U +#define GPIOD_PIN8 8U +#define GPIOD_PIN9 9U +#define GPIOD_PIN10 10U +#define GPIOD_PIN11 11U +// #define GPIOD_PIN12 12U +// #define GPIOD_PIN13 13U +// #define GPIOD_PIN14 14U +// #define GPIOD_PIN15 15U + + +/* + * IO lines assignments. + */ +// #define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U) +// #define LINE_USB_DM PAL_LINE(GPIOA, 11U) +// #define LINE_USB_DP PAL_LINE(GPIOA, 12U) +#define LINE_SWDIO PAL_LINE(GPIOD, 5U) +#define LINE_SWCLK PAL_LINE(GPIOD, 6U) + +// #define LINE_PINB8 PAL_LINE(GPIOB, 8U) +// #define LINE_PINB9 PAL_LINE(GPIOB, 9U) + +//#define LINE_CAPS_LOCK PAL_LINE(GPIOC, 8U) + +/* + * I/O ports initial setup, this configuration is established soon after reset + * in the initialization code. + * Please refer to the SN32 Reference Manual for details. + */ +#define PIN_MODE_INPUT(n) (0U << ((n))) +#define PIN_MODE_OUTPUT(n) (1U << ((n))) +#define PIN_MODE_PULLUP(n) (0U << ((n*2))) +#define PIN_MODE_SCHMITT_EN(n) (10U << ((n*2))) +#define PIN_MODE_SCHMITT_DIS(n) (11U << ((n*2))) + +/* + * GPIOA setup: + * + * PA0 - PIN0 (input pullup). + * PA1 - PIN1 (input pullup). + * PA2 - PIN2 (input pullup). + * PA3 - PIN3 (input pullup). + * PA4 - PIN4 (input pullup). + * PA5 - PIN5 (input pullup). + * PA6 - PIN6 (input pullup). + * PA7 - PIN7 (input pullup). + * PA8 - PIN8 (input pullup). + * PA9 - PIN9 (input pullup). + * PA11 - PIN10 (input pullup). + * PA11 - PIN11 (input pullup). + * PA12 - PIN12 (input pullup). + * PA13 - PIN13 (input pullup). + * PA14 - PIN14 (input pullup). + * PA15 - PIN15 (input pullup). + */ +#define VAL_GPIOA_MODE (PIN_MODE_INPUT(GPIOA_PIN0) | PIN_MODE_INPUT(GPIOA_PIN1) | PIN_MODE_INPUT(GPIOA_PIN2) | PIN_MODE_INPUT(GPIOA_PIN3) | PIN_MODE_INPUT(GPIOA_PIN4) | PIN_MODE_INPUT(GPIOA_PIN5) | PIN_MODE_INPUT(GPIOA_PIN6) | PIN_MODE_INPUT(GPIOA_PIN7) | PIN_MODE_INPUT(GPIOA_PIN8) | PIN_MODE_INPUT(GPIOA_PIN9) | PIN_MODE_INPUT(GPIOA_PIN10) | PIN_MODE_INPUT(GPIOA_PIN11) | PIN_MODE_INPUT(GPIOA_PIN12) | PIN_MODE_INPUT(GPIOA_PIN13) | PIN_MODE_INPUT(GPIOA_PIN14) | PIN_MODE_INPUT(GPIOA_PIN15)) + +/* + * GPIOB setup: + * + * PB0 - PIN0 (input pullup). + * PB1 - PIN1 (input pullup). + * PB2 - PIN2 (input pullup). + * PB3 - PIN3 (input pullup). + * PB4 - PIN4 (input pullup). + * PB5 - PIN5 (input pullup). + * PB6 - PIN6 (input pullup). + * PB7 - PIN7 (input pullup). + * PB8 - PIN8 (input pullup). + * PB9 - PIN9 (input pullup). + * PB10 - PIN10 (input pullup). + * PB11 - PIN11 (input pullup). + * PB12 - PIN12 (input pullup). + * PB13 - PIN13 (input pullup). + * PB14 - PIN14 (input pullup). + * PB15 - PIN15 (input pullup). + */ +#define VAL_GPIOB_MODE (PIN_MODE_INPUT(GPIOB_PIN0) | PIN_MODE_INPUT(GPIOB_PIN1) | PIN_MODE_INPUT(GPIOB_PIN2) | PIN_MODE_INPUT(GPIOB_PIN3) | PIN_MODE_INPUT(GPIOB_PIN4) | PIN_MODE_INPUT(GPIOB_PIN5) | PIN_MODE_INPUT(GPIOB_PIN6) | PIN_MODE_OUTPUT(GPIOB_PIN7) | PIN_MODE_INPUT(GPIOB_PIN8) | PIN_MODE_INPUT(GPIOB_PIN9) | PIN_MODE_INPUT(GPIOB_PIN10) | PIN_MODE_INPUT(GPIOB_PIN11) | PIN_MODE_INPUT(GPIOB_PIN12) | PIN_MODE_INPUT(GPIOB_PIN13) | PIN_MODE_INPUT(GPIOB_PIN14) | PIN_MODE_INPUT(GPIOB_PIN15)) +/* + * GPIOC setup: + * + * PC0 - PIN0 (input pullup). + * PC1 - PIN1 (input pullup). + * PC2 - PIN2 (input pullup). + * PC3 - PIN3 (input pullup). + * PC4 - PIN4 (input pullup). + * PC5 - PIN5 (input pullup). + * PC6 - PIN6 (input pullup). + * PC7 - PIN7 (input pullup). + * PC8 - PIN8 (input pullup). + * PC9 - PIN9 (input pullup). + * PC10 - PIN10 (input pullup). + * PC11 - PIN11 (input pullup). + * PC12 - PIN12 (input pullup). + * PC13 - PIN13 (input pullup). + * PC14 - PIN14 (input pullup). + * PC15 - PIN15 (input pullup). + */ +#define VAL_GPIOC_MODE (PIN_MODE_INPUT(GPIOC_PIN0) | PIN_MODE_INPUT(GPIOC_PIN1) | PIN_MODE_INPUT(GPIOC_PIN2) | PIN_MODE_INPUT(GPIOC_PIN3) | PIN_MODE_INPUT(GPIOC_PIN4) | PIN_MODE_INPUT(GPIOC_PIN5) | PIN_MODE_INPUT(GPIOC_PIN6) | PIN_MODE_INPUT(GPIOC_PIN7) | PIN_MODE_INPUT(GPIOC_PIN8) | PIN_MODE_INPUT(GPIOC_PIN9) | PIN_MODE_INPUT(GPIOC_PIN10) | PIN_MODE_INPUT(GPIOC_PIN11) | PIN_MODE_INPUT(GPIOC_PIN12) | PIN_MODE_INPUT(GPIOC_PIN13) | PIN_MODE_INPUT(GPIOC_PIN14) | PIN_MODE_INPUT(GPIOC_PIN15)) + +/* + * GPIOD setup: + * + * PD0 - PIN0 (input pullup). + * PD1 - PIN1 (input pullup). + * PD2 - PIN2 (input pullup). + * PD3 - PIN3 (input pullup). + * PD4 - PIN4 (input pullup). + * PD5 - PIN5 (input pullup). + * PD6 - PIN6 (input pullup). + * PD7 - PIN7 (input pullup). + * PD8 - PIN8 (input pullup). + * PD9 - PIN9 (input pullup). + * PD11 - PIN10 (input pullup). + * PD11 - PIN11 (input pullup). + * PD12 - PIN12 (input pullup). + * PD13 - PIN13 (input pullup). + * PD14 - PIN14 (input pullup). + * PD15 - PIN15 (input pullup). + */ +#define VAL_GPIOD_MODE (PIN_MODE_INPUT(GPIOD_PIN3) | PIN_MODE_INPUT(GPIOD_PIN4) | PIN_MODE_INPUT(GPIOD_PIN5) | PIN_MODE_INPUT(GPIOD_PIN6) | PIN_MODE_INPUT(GPIOD_PIN7) | PIN_MODE_INPUT(GPIOD_PIN8) | PIN_MODE_INPUT(GPIOD_PIN9) | PIN_MODE_INPUT(GPIOD_PIN10) | PIN_MODE_INPUT(GPIOD_PIN11)) + +#if !defined(_FROM_ASM_) +# ifdef __cplusplus +extern "C" { +# endif +void boardInit(void); +# ifdef __cplusplus +} +# endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/keyboards/keychron/k6/boards/SN_SN32F240B/board.mk b/keyboards/keychron/k6/boards/SN_SN32F240B/board.mk new file mode 100644 index 000000000000..708b4472bdc3 --- /dev/null +++ b/keyboards/keychron/k6/boards/SN_SN32F240B/board.mk @@ -0,0 +1,5 @@ +# List of all the board related files. +BOARDSRC = $(BOARD_PATH)/boards/SN_SN32F240B/board.c + +# Required include directories +BOARDINC = $(BOARD_PATH)/boards/SN_SN32F240B diff --git a/keyboards/keychron/k6/bootloader_defs.h b/keyboards/keychron/k6/bootloader_defs.h new file mode 100644 index 000000000000..36b4d187af16 --- /dev/null +++ b/keyboards/keychron/k6/bootloader_defs.h @@ -0,0 +1,3 @@ +/* Address for jumping to bootloader on SN32 chips. */ +/* It is chip dependent */ +// #define SN32_BOOTLOADER_ADDRESS 0x1FFF0000 diff --git a/keyboards/keychron/k6/chconf.h b/keyboards/keychron/k6/chconf.h new file mode 100644 index 000000000000..09edfcd884c9 --- /dev/null +++ b/keyboards/keychron/k6/chconf.h @@ -0,0 +1,700 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file rt/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +# define CHCONF_H + +# define _CHIBIOS_RT_CONF_ +# define _CHIBIOS_RT_CONF_VER_6_0_ + +/*===========================================================================*/ +/** + * @name System timers settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +# if !defined(CH_CFG_ST_RESOLUTION) +# define CH_CFG_ST_RESOLUTION 32 +# endif + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +# if !defined(CH_CFG_ST_FREQUENCY) +# define CH_CFG_ST_FREQUENCY 10000 +# endif + +/** + * @brief Time intervals data size. + * @note Allowed values are 16, 32 or 64 bits. + */ +# if !defined(CH_CFG_INTERVALS_SIZE) +# define CH_CFG_INTERVALS_SIZE 32 +# endif + +/** + * @brief Time types data size. + * @note Allowed values are 16 or 32 bits. + */ +# if !defined(CH_CFG_TIME_TYPES_SIZE) +# define CH_CFG_TIME_TYPES_SIZE 32 +# endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +# if !defined(CH_CFG_ST_TIMEDELTA) +# define CH_CFG_ST_TIMEDELTA 0 +# endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. + */ +# if !defined(CH_CFG_TIME_QUANTUM) +# define CH_CFG_TIME_QUANTUM 0 +# endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +# if !defined(CH_CFG_MEMCORE_SIZE) +# define CH_CFG_MEMCORE_SIZE 0 +# endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. + */ +# if !defined(CH_CFG_NO_IDLE_THREAD) +# define CH_CFG_NO_IDLE_THREAD FALSE +# endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_OPTIMIZE_SPEED) +# define CH_CFG_OPTIMIZE_SPEED FALSE +# endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_TM) +# define CH_CFG_USE_TM FALSE +# endif + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_REGISTRY) +# define CH_CFG_USE_REGISTRY TRUE +# endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_WAITEXIT) +# define CH_CFG_USE_WAITEXIT TRUE +# endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_SEMAPHORES) +# define CH_CFG_USE_SEMAPHORES TRUE +# endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +# if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY) +# define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE +# endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_MUTEXES) +# define CH_CFG_USE_MUTEXES TRUE +# endif + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +# if !defined(CH_CFG_USE_MUTEXES_RECURSIVE) +# define CH_CFG_USE_MUTEXES_RECURSIVE FALSE +# endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +# if !defined(CH_CFG_USE_CONDVARS) +# define CH_CFG_USE_CONDVARS TRUE +# endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_CONDVARS. + */ +# if !defined(CH_CFG_USE_CONDVARS_TIMEOUT) +# define CH_CFG_USE_CONDVARS_TIMEOUT FALSE +# endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_EVENTS) +# define CH_CFG_USE_EVENTS TRUE +# endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_EVENTS. + */ +# if !defined(CH_CFG_USE_EVENTS_TIMEOUT) +# define CH_CFG_USE_EVENTS_TIMEOUT TRUE +# endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_MESSAGES) +# define CH_CFG_USE_MESSAGES TRUE +# endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. + */ +# if !defined(CH_CFG_USE_MESSAGES_PRIORITY) +# define CH_CFG_USE_MESSAGES_PRIORITY FALSE +# endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +# if !defined(CH_CFG_USE_MAILBOXES) +# define CH_CFG_USE_MAILBOXES TRUE +# endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_MEMCORE) +# define CH_CFG_USE_MEMCORE FALSE +# endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +# if !defined(CH_CFG_USE_HEAP) +# define CH_CFG_USE_HEAP FALSE +# endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_MEMPOOLS) +# define CH_CFG_USE_MEMPOOLS FALSE +# endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_OBJ_FIFOS) +# define CH_CFG_USE_OBJ_FIFOS FALSE +# endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +# if !defined(CH_CFG_USE_PIPES) +# define CH_CFG_USE_PIPES FALSE +# endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. + */ +# if !defined(CH_CFG_USE_DYNAMIC) +# define CH_CFG_USE_DYNAMIC FALSE +# endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +# if !defined(CH_CFG_USE_FACTORY) +# define CH_CFG_USE_FACTORY FALSE +# endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +# if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +# define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +# endif + +/** + * @brief Enables the registry of generic objects. + */ +# if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +# define CH_CFG_FACTORY_OBJECTS_REGISTRY FALSE +# endif + +/** + * @brief Enables factory for generic buffers. + */ +# if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +# define CH_CFG_FACTORY_GENERIC_BUFFERS FALSE +# endif + +/** + * @brief Enables factory for semaphores. + */ +# if !defined(CH_CFG_FACTORY_SEMAPHORES) +# define CH_CFG_FACTORY_SEMAPHORES FALSE +# endif + +/** + * @brief Enables factory for mailboxes. + */ +# if !defined(CH_CFG_FACTORY_MAILBOXES) +# define CH_CFG_FACTORY_MAILBOXES FALSE +# endif + +/** + * @brief Enables factory for objects FIFOs. + */ +# if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +# define CH_CFG_FACTORY_OBJ_FIFOS FALSE +# endif + +/** + * @brief Enables factory for Pipes. + */ +# if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__) +# define CH_CFG_FACTORY_PIPES FALSE +# endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +# if !defined(CH_DBG_STATISTICS) +# define CH_DBG_STATISTICS FALSE +# endif + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +# if !defined(CH_DBG_SYSTEM_STATE_CHECK) +# define CH_DBG_SYSTEM_STATE_CHECK FALSE +# endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +# if !defined(CH_DBG_ENABLE_CHECKS) +# define CH_DBG_ENABLE_CHECKS FALSE +# endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +# if !defined(CH_DBG_ENABLE_ASSERTS) +# define CH_DBG_ENABLE_ASSERTS FALSE +# endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the trace buffer is activated. + * + * @note The default is @p CH_DBG_TRACE_MASK_DISABLED. + */ +# if !defined(CH_DBG_TRACE_MASK) +# define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED +# endif + +/** + * @brief Trace buffer entries. + * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is + * different from @p CH_DBG_TRACE_MASK_DISABLED. + */ +# if !defined(CH_DBG_TRACE_BUFFER_SIZE) +# define CH_DBG_TRACE_BUFFER_SIZE 128 +# endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +# if !defined(CH_DBG_ENABLE_STACK_CHECK) +# define CH_DBG_ENABLE_STACK_CHECK FALSE +# endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +# if !defined(CH_DBG_FILL_THREADS) +# define CH_DBG_FILL_THREADS FALSE +# endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p thread_t structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. + */ +# if !defined(CH_DBG_THREADS_PROFILING) +# define CH_DBG_THREADS_PROFILING FALSE +# endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System structure extension. + * @details User fields added to the end of the @p ch_system_t structure. + */ +# define CH_CFG_SYSTEM_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief System initialization hook. + * @details User initialization code added to the @p chSysInit() function + * just before interrupts are enabled globally. + */ +# define CH_CFG_SYSTEM_INIT_HOOK() \ + { /* Add threads initialization code here.*/ } + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +# define CH_CFG_THREAD_EXTRA_FIELDS /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p _thread_init() function. + * + * @note It is invoked from within @p _thread_init() and implicitly from all + * the threads creation APIs. + */ +# define CH_CFG_THREAD_INIT_HOOK(tp) \ + { /* Add threads initialization code here.*/ } + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +# define CH_CFG_THREAD_EXIT_HOOK(tp) \ + { /* Add threads finalization code here.*/ } + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +# define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) \ + { /* Context switch code here.*/ } + +/** + * @brief ISR enter hook. + */ +# define CH_CFG_IRQ_PROLOGUE_HOOK() \ + { /* IRQ prologue code here.*/ } + +/** + * @brief ISR exit hook. + */ +# define CH_CFG_IRQ_EPILOGUE_HOOK() \ + { /* IRQ epilogue code here.*/ } + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +# define CH_CFG_IDLE_ENTER_HOOK() \ + { /* Idle-enter code here.*/ } + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +# define CH_CFG_IDLE_LEAVE_HOOK() \ + { /* Idle-leave code here.*/ } + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +# define CH_CFG_IDLE_LOOP_HOOK() \ + { /* Idle loop code here.*/ } + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +# define CH_CFG_SYSTEM_TICK_HOOK() \ + { /* System tick event code here.*/ } + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +# define CH_CFG_SYSTEM_HALT_HOOK(reason) \ + { /* System halt code here.*/ } + +/** + * @brief Trace hook. + * @details This hook is invoked each time a new record is written in the + * trace buffer. + */ +# define CH_CFG_TRACE_HOOK(tep) \ + { /* Trace code here.*/ } + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/keyboards/keychron/k6/config.h b/keyboards/keychron/k6/config.h new file mode 100644 index 000000000000..13fb2e94a860 --- /dev/null +++ b/keyboards/keychron/k6/config.h @@ -0,0 +1,47 @@ +/* Copyright 2020 Adam Honse + * Copyright 2020 Dimitris Mantzouranis + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#pragma once + +#include "config_common.h" + +/* USB Device descriptor parameter */ +#define VENDOR_ID 0x05AC +#define PRODUCT_ID 0x024F +#define DEVICE_VER 0x0001 + +#define MANUFACTURER Keychron +#define PRODUCT K6 +#define DESCRIPTION K6 Gateron RGB ISO Nordic + +/* key matrix size */ +#define MATRIX_ROWS 5 +#define MATRIX_COLS 16 + +#define DIODE_DIRECTION COL2ROW +// #define MATRIX_COL_PINS { A8, A9, A10, A11, A12, A13, A14, A15, B0, B1, B2, B3, B4, B5, B6, B7, B8, B9, B10 } +#define MATRIX_COL_PINS { A8, A9, A10, A11, A12, A13, A14, A15, B0, B1, B2, B3, B4, B5, B6, B7 } +// #define MATRIX_ROW_PINS { C15, D11, D10, D9, D8, D7 } +#define MATRIX_ROW_PINS { D11, D10, D9, D8, D7 } + +// Connects each switch in the dip switch to the GPIO pin of the MCU +#define DIP_SWITCH_PINS { D5, D6 } + +/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */ +#define DEBOUNCE 0 + +#include "config_led.h" \ No newline at end of file diff --git a/keyboards/keychron/k6/config_led.c b/keyboards/keychron/k6/config_led.c new file mode 100644 index 000000000000..485ceb889bba --- /dev/null +++ b/keyboards/keychron/k6/config_led.c @@ -0,0 +1,40 @@ +#ifdef RGB_MATRIX_ENABLE + +#include "rgb_matrix.h" +#include "config_led.h" +// readability +#define NA NO_LED +/* Screenprint on the back of the pcb + * ┌───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───────┬───┐ + * │ 1 │ 6 │10 │15 │19 │23 │27 │32 │36 │40 │44 │49 │54 │  57   │64 │ + * ├───┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─────┼───┤ + * │  2  │ 7 │11 │16 │20 │24 │28 │33 │37 │41 │45 │50 │55 │     │65 │ + * ├─────┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┐59  ├───┤ + * │  3   │ 8 │12 │17 │21 │25 │29 │34 │38 │42 │46 │51 │58 │    │66 │ + * ├────┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴───┴┬───┼───┤ + * │ 4  │69 │13 │18 │22 │26 │30 │35 │39 │43 │47 │52 │  60  │62 │67 │ + * ├────┼───┴┬──┴─┬─┴───┴───┴───┴───┴───┴──┬┴──┬┴──┬┴──┬───┼───┼───┤ + * │ 5 │ 9 │ 14 │           31           │48 │53 │56 │61 │63 │68 │ + * └────┴────┴────┴────────────────────────┴───┴───┴───┴───┴───┴───┘ + */ +led_config_t g_led_config = { { +{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, NA, 15 }, +{ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, NA, NA, 31 }, +{ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, NA, 47 }, +{ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, NA, 61, 62, 63 }, +{ 64, 65, 66, NA, NA, NA, 70, NA, NA, NA, 74, 75, 76, 77, 78, 79 } +}, { + {1 , 0}, {14 , 0}, {29 , 0}, {44 , 0}, {59 , 0}, {74 , 0}, {89 , 0}, {104, 0}, {119, 0}, {134, 0}, {149, 0}, {164, 0}, {179, 0}, {194, 0}, {255,255}, {224, 0}, + {3 , 16}, {16 , 16}, {32 , 16}, {32 , 16}, {48 , 16}, {64 , 16}, {80 , 16}, {96 , 16}, {112, 16}, {128, 16}, {144, 16}, {160, 16}, {176, 16}, {255,255}, {255,255}, {224, 16}, + {5 , 32}, {19 , 48}, {34 , 48}, {48 , 48}, {63 , 48}, {78 , 48}, {92 , 48}, {107, 48}, {121, 48}, {136, 48}, {151, 48}, {165, 48}, {179, 32}, {194, 32}, {255,255}, {224, 32}, + {2 , 48}, {17 , 32}, {32 , 32}, {47 , 32}, {61 , 32}, {76 , 32}, {91 , 32}, {106, 32}, {120, 32}, {135, 32}, {150, 32}, {165, 32}, {255,255}, {194, 48}, {209, 48}, {224, 48}, + {2 , 64}, {16 , 64}, {29 , 64}, {255,255}, {255,255}, {255,255}, {80 , 64}, {255,255}, {255,255}, {255,255}, {149, 64}, {164, 64}, {179, 64}, {194, 64}, {209, 64}, {224, 64}, +}, { + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 0, 4, + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, + 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, 4, 4, + 4, 4, 4, 0, 0, 0, 4, 0, 0, 0, 4, 4, 4, 4, 4, 4 +} }; + +#endif diff --git a/keyboards/keychron/k6/config_led.h b/keyboards/keychron/k6/config_led.h new file mode 100644 index 000000000000..cabbc3f24bea --- /dev/null +++ b/keyboards/keychron/k6/config_led.h @@ -0,0 +1,32 @@ +/* +Copyright 2020 Adam Honse +Copyright 2020 Dimitris Mantzouranis + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ + +#pragma once + +// Backlight configuration +#define BACKLIGHT_LEVELS 8 + +#define LED_MATRIX_ROWS 5 +#define LED_MATRIX_ROW_CHANNELS 3 +#define LED_MATRIX_ROWS_HW (LED_MATRIX_ROWS * LED_MATRIX_ROW_CHANNELS) +#define LED_MATRIX_ROW_PINS { C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, B13, D3, B15, B14 } + +#define LED_MATRIX_COLS 16 +#define LED_MATRIX_COL_PINS { A8, A9, A10, A11, A12, A13, A14, A15, B0, B1, B2, B3, B4, B5, B6, B7 } + +#define DRIVER_LED_TOTAL (LED_MATRIX_ROWS * LED_MATRIX_COLS) \ No newline at end of file diff --git a/keyboards/keychron/k6/halconf.h b/keyboards/keychron/k6/halconf.h new file mode 100644 index 000000000000..af95d6285850 --- /dev/null +++ b/keyboards/keychron/k6/halconf.h @@ -0,0 +1,524 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +# define HALCONF_H + +# define _CHIBIOS_HAL_CONF_ +# define _CHIBIOS_HAL_CONF_VER_7_0_ + +# include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +# if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +# define HAL_USE_PAL TRUE +# endif + +/** + * @brief Enables the ADC subsystem. + */ +# if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +# define HAL_USE_ADC FALSE +# endif + +/** + * @brief Enables the CAN subsystem. + */ +# if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +# define HAL_USE_CAN FALSE +# endif + +/** + * @brief Enables the cryptographic subsystem. + */ +# if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +# define HAL_USE_CRY FALSE +# endif + +/** + * @brief Enables the DAC subsystem. + */ +# if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +# define HAL_USE_DAC FALSE +# endif + +/** + * @brief Enables the GPT subsystem. + */ +# if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +# define HAL_USE_GPT FALSE +# endif + +/** + * @brief Enables the I2C subsystem. + */ +# if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +# define HAL_USE_I2C FALSE +# endif + +/** + * @brief Enables the I2S subsystem. + */ +# if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +# define HAL_USE_I2S FALSE +# endif + +/** + * @brief Enables the ICU subsystem. + */ +# if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +# define HAL_USE_ICU FALSE +# endif + +/** + * @brief Enables the MAC subsystem. + */ +# if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +# define HAL_USE_MAC FALSE +# endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +# if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +# define HAL_USE_MMC_SPI FALSE +# endif + +/** + * @brief Enables the PWM subsystem. + */ +# if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +# define HAL_USE_PWM FALSE +# endif + +/** + * @brief Enables the RTC subsystem. + */ +# if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +# define HAL_USE_RTC FALSE +# endif + +/** + * @brief Enables the SDC subsystem. + */ +# if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +# define HAL_USE_SDC FALSE +# endif + +/** + * @brief Enables the SERIAL subsystem. + */ +# if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +# define HAL_USE_SERIAL FALSE +# endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +# if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +# define HAL_USE_SERIAL_USB TRUE +# endif + +/** + * @brief Enables the SIO subsystem. + */ +# if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +# define HAL_USE_SIO FALSE +# endif + +/** + * @brief Enables the SPI subsystem. + */ +# if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +# define HAL_USE_SPI FALSE +# endif + +/** + * @brief Enables the TRNG subsystem. + */ +# if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +# define HAL_USE_TRNG FALSE +# endif + +/** + * @brief Enables the UART subsystem. + */ +# if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +# define HAL_USE_UART FALSE +# endif + +/** + * @brief Enables the USB subsystem. + */ +# if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +# define HAL_USE_USB TRUE +# endif + +/** + * @brief Enables the WDG subsystem. + */ +# if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +# define HAL_USE_WDG FALSE +# endif + +/** + * @brief Enables the WSPI subsystem. + */ +# if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +# define HAL_USE_WSPI FALSE +# endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +# define PAL_USE_CALLBACKS FALSE +# endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +# define PAL_USE_WAIT FALSE +# endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +# define ADC_USE_WAIT TRUE +# endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +# define ADC_USE_MUTUAL_EXCLUSION TRUE +# endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +# if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +# define CAN_USE_SLEEP_MODE TRUE +# endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +# if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +# define CAN_ENFORCE_USE_CALLBACKS FALSE +# endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +# if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +# define HAL_CRY_USE_FALLBACK FALSE +# endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +# if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +# define HAL_CRY_ENFORCE_FALLBACK FALSE +# endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +# define DAC_USE_WAIT TRUE +# endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +# define DAC_USE_MUTUAL_EXCLUSION TRUE +# endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +# if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +# define I2C_USE_MUTUAL_EXCLUSION TRUE +# endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +# if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +# define MAC_USE_ZERO_COPY FALSE +# endif + +/** + * @brief Enables an event sources for incoming packets. + */ +# if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +# define MAC_USE_EVENTS TRUE +# endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +# if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +# define MMC_NICE_WAITING TRUE +# endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +# if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +# define SDC_INIT_RETRY 100 +# endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +# if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +# define SDC_MMC_SUPPORT FALSE +# endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +# if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +# define SDC_NICE_WAITING TRUE +# endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +# if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +# define SDC_INIT_OCR_V20 0x50FF8000U +# endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +# if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +# define SDC_INIT_OCR 0x80100000U +# endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +# if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +# define SERIAL_DEFAULT_BITRATE 38400 +# endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +# if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +# define SERIAL_BUFFERS_SIZE 16 +# endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +# if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +# define SERIAL_USB_BUFFERS_SIZE 1 +# endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +# if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +# define SERIAL_USB_BUFFERS_NUMBER 2 +# endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +# define SPI_USE_WAIT TRUE +# endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +# define SPI_USE_CIRCULAR FALSE +# endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +# define SPI_USE_MUTUAL_EXCLUSION TRUE +# endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +# if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +# define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +# endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +# define UART_USE_WAIT FALSE +# endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +# define UART_USE_MUTUAL_EXCLUSION FALSE +# endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +# define USB_USE_WAIT TRUE +# endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +# define WSPI_USE_WAIT TRUE +# endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +# if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +# define WSPI_USE_MUTUAL_EXCLUSION TRUE +# endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/keyboards/keychron/k6/info.json b/keyboards/keychron/k6/info.json new file mode 100644 index 000000000000..3e7757f8127b --- /dev/null +++ b/keyboards/keychron/k6/info.json @@ -0,0 +1,12 @@ +{ + "keyboard_name": "K6 Gateron RGB Nordic ISO", + "url": "https://www.keychron.com/collections/keychron-iso-keyboard-collection/products/keychron-k6-wireless-mechanical-keyboard-nordic-iso-layout", + "maintainer": "jedifindtrick", + "width": 16, + "height": 5, + "layouts": { + "LAYOUT": { + "layout": [{"label":"esc", "x":0, "y":0}, {"label":"1 !", "x":1, "y":0}, {"label":"2 @", "x":2, "y":0}, {"label":"3 #", "x":3, "y":0}, {"label":"4 $", "x":4, "y":0}, {"label":"5 %", "x":5, "y":0}, {"label":"6 &", "x":6, "y":0}, {"label":"7 /", "x":7, "y":0}, {"label":"8 (", "x":8, "y":0}, {"label":"9 )", "x":9, "y":0}, {"label":"0 =", "x":10, "y":0}, {"label":"+ ?", "x":11, "y":0}, {"label":"´ `", "x":12, "y":0}, {"label":"backspace", "x":13, "y":0, "w":2}, {"label":"rgb", "x":15, "y":0}, {"label":"tab", "x":0, "y":1, "w":1.5}, {"label":"Q", "x":1.5, "y":1}, {"label":"W", "x":2.5, "y":1}, {"label":"E", "x":3.5, "y":1}, {"label":"R", "x":4.5, "y":1}, {"label":"T", "x":5.5, "y":1}, {"label":"Y", "x":6.5, "y":1}, {"label":"U", "x":7.5, "y":1}, {"label":"I", "x":8.5, "y":1}, {"label":"O", "x":9.5, "y":1}, {"label":"P", "x":10.5, "y":1}, {"label":"Å", "x":11.5, "y":1}, {"label":"¨ ^", "x":12.5, "y":1}, {"label":"\\ |", "x":13.5, "y":1}, {"label":"7", "x":15, "y":1}, {"label":"8", "x":16, "y":1}, {"label":"9", "x":17, "y":1}, {"label":"+", "x":18, "y":1, "h":2}, {"label":"caps lock", "x":0, "y":3, "w":1.75}, {"label":"A", "x":1.75, "y":3}, {"label":"S", "x":2.75, "y":3}, {"label":"D", "x":3.75, "y":3}, {"label":"F", "x":4.75, "y":3}, {"label":"G", "x":5.75, "y":3}, {"label":"H", "x":6.75, "y":3}, {"label":"J", "x":7.75, "y":3}, {"label":"K", "x":8.75, "y":3}, {"label":"L", "x":9.75, "y":3}, {"label":"; :", "x":10.75, "y":3}, {"label":"' \"", "x":11.75, "y":3}, {"label":"enter", "x":12.75, "y":3, "w":2.25}, {"label":"4", "x":15, "y":3}, {"label":"5", "x":16, "y":3}, {"label":"6", "x":17, "y":3}, {"label":"shift", "x":0, "y":4, "w":2.25}, {"label":"Z", "x":2.25, "y":4}, {"label":"X", "x":3.25, "y":4}, {"label":"C", "x":4.25, "y":4}, {"label":"V", "x":5.25, "y":4}, {"label":"B", "x":6.25, "y":4}, {"label":"N", "x":7.25, "y":4}, {"label":"M", "x":8.25, "y":4}, {"label":", <", "x":9.25, "y":4}, {"label":". >", "x":10.25, "y":4}, {"label":"/ ?", "x":11.25, "y":4}, {"label":"shift", "x":12.25, "y":4, "w":1.75}, {"label":"up", "x":14, "y":4}, {"label":"1", "x":15, "y":4}, {"label":"2", "x":16, "y":4}, {"label":"3", "x":17, "y":4}, {"label":"enter", "x":18, "y":4, "h":2}, {"label":"control", "x":0, "y":5, "w":1.25}, {"label":"option", "x":1.25, "y":5, "w":1.25}, {"label":"cmd", "x":2.5, "y":5, "w":1.25}, {"label":"space", "x":3.75, "y":5, "w":6.25}, {"label":"cmd", "x":10, "y":5}, {"label":"fn", "x":11, "y":5}, {"label":"control", "x":12, "y":5}, {"label":"left", "x":13, "y":5}, {"label":"down", "x":14, "y":5}, {"label":"right", "x":15, "y":5}, {"label":"0", "x":16, "y":5}, {"label":".", "x":17, "y":5}] + } + } +} \ No newline at end of file diff --git a/keyboards/keychron/k6/k6.h b/keyboards/keychron/k6/k6.h new file mode 100644 index 000000000000..bbcb611c3221 --- /dev/null +++ b/keyboards/keychron/k6/k6.h @@ -0,0 +1,20 @@ +#pragma once + +#include "quantum.h" +// readability +#define XXX KC_NO + +#define LAYOUT( \ + k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, k0f, \ + k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, k1f, \ + k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, k2f, \ + k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, k3d, k3e, k3f, \ + k40, k41, k42, k46, k4a, k4b, k4c, k4d, k4e, k4f \ +) \ +{ \ + {k00, k01, k02, k03, k04, k05, k06, k07, k08, k09, k0a, k0b, k0c, k0d, XXX, k0f}, \ + {k10, k11, k12, k13, k14, k15, k16, k17, k18, k19, k1a, k1b, k1c, XXX, XXX, k1f}, \ + {k20, k21, k22, k23, k24, k25, k26, k27, k28, k29, k2a, k2b, k2c, k2d, XXX, k2f}, \ + {k30, k31, k32, k33, k34, k35, k36, k37, k38, k39, k3a, k3b, XXX, k3d, k3e, k3f}, \ + {k40, k41, k42, XXX, XXX, XXX, k46, XXX, XXX, XXX, k4a, k4b, k4c, k4d, k4e, k4f} \ +} diff --git a/keyboards/keychron/k6/keymaps/default/keymap.c b/keyboards/keychron/k6/keymaps/default/keymap.c new file mode 100644 index 000000000000..10063d7128e0 --- /dev/null +++ b/keyboards/keychron/k6/keymaps/default/keymap.c @@ -0,0 +1,115 @@ +/* +Copyright 2020 Dimitris Mantzouranis + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . +*/ +#include QMK_KEYBOARD_H +#include "keymap_swedish.h" +#define _BL 0 +#define _FL 1 +#define _SL 2 + +// Each layer gets a name for readability, which is then used in the keymap matrix below. +// The underscores don't mean anything - you can have a layer called STUFF or any other name. +// Layer names don't all need to be of the same length, obviously, and you can also skip them +// entirely and just use numbers. +enum layer_names { + _BASE, +}; + +const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = { + +/* _BL + * ┌───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───────┬───┐ + * │ESC│ 1 │ 2 │ 3 │ 4 │ 5 │ 6 │ 7 │ 8 │ 9 │ 0 │ + │ ´ │       │PRT│ + * ├───┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─────┼───┤ + * │     │ Q │ W │ E │ R │ T │ Y │ U │ I │ O │ P │ Å │ ¨ │     │DEL│ + * ├─────┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┐    ├───┤ + * │      │ A │ S │ D │ F │ G │ H │ J │ K │ L │ Ö │ Ä │ ' │    │PUP│ + * ├────┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴───┴┬───┼───┤ + * │    │ < │ Z │ X │ C │ V │ B │ N │ M │ , │ . │ - │      │UP │PDN│ + * ├────┼───┴┬──┴─┬─┴───┴───┴───┴───┴───┴──┬┴──┬┴──┬┴──┬───┼───┼───┤ + * │CTRL│ WIN│ALT │                        │ALT│FN1│FN2│LFT│DWN│RGT│ + * └────┴────┴────┴────────────────────────┴───┴───┴───┴───┴───┴───┘ + * Row: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 */ + [_BL] = { { KC_GESC, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_MINS, KC_EQL, KC_BSPC, KC_NO, KC_PSCREEN }, + { KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_LBRC, KC_RBRC, KC_NO, KC_NO, KC_DEL }, + { KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_H, KC_J, KC_K, KC_L, KC_SCLN, KC_QUOT, KC_NUHS, KC_ENT, KC_NO, KC_PGUP }, + { KC_LSFT, KC_NUBS, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_N, KC_M, KC_COMM, KC_DOT, KC_SLSH, KC_NO, KC_RSFT, KC_UP, KC_PGDN }, + { KC_LCTL, KC_LGUI, KC_LALT, KC_NO, KC_NO, KC_NO, KC_SPC, KC_NO, KC_NO, KC_NO, KC_RALT, MO(_FL), MO(_SL), KC_LEFT, KC_DOWN, KC_RGHT } + }, +/* _FL + * ┌───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───────┬───┐ + * │ │HUD│HUI│ │  │VAD│VAI│PRV│PLY│NXT│MTE│VL+│VL-│     │MOD│ + * ├───┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─────┼───┤ + * │     │   │   │   │   │   │   │   │   │   │   │   │   │     │ │ + * ├─────┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┐    ├───┤ + * │      │   │   │ │   │   │   │   │   │   │   │   │   │    │ │ + * ├────┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴───┴┬───┼───┤ + * │    │   │   │   │   │   │   │   │   │   │   │   │      │SPI│ │ + * ├────┼───┴┬──┴─┬─┴───┴───┴───┴───┴───┴──┬┴──┬┴──┬┴──┬───┼───┼───┤ + * │ │  │  │                        │ │FN1│FN2│ │SPD│ │ + * └────┴────┴────┴────────────────────────┴───┴───┴───┴───┴───┴───┘ */ + [_FL] = { { KC_NO, RGB_HUD, RGB_HUI, KC_NO, KC_NO, RGB_VAD, RGB_VAI, KC_MPRV, KC_MPLY, KC_MNXT, KC_MUTE, KC_VOLD, KC_VOLU, KC_NO, KC_NO, RGB_MOD }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_END, KC_NO, KC_NO, KC_NO }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, RGB_SPI, KC_NO }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, RGB_TOG, RGB_SPD, RGB_M_P } + }, +/* _SL + * ┌───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───────┬───┐ + * │ │ F1│ F2│ F3│ F4│ F5│ F6│ F7│ F8│ F9│F10│F11│F12│     │ │ + * ├───┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─────┼───┤ + * │     │   │   │   │   │   │   │   │   │   │   │   │   │     │ │ + * ├─────┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┬──┴┐    ├───┤ + * │      │   │   │ │   │   │   │   │   │   │   │   │   │    │ │ + * ├────┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴─┬─┴───┴┬───┼───┤ + * │    │   │   │   │   │   │   │   │   │   │   │   │      │  │ │ + * ├────┼───┴┬──┴─┬─┴───┴───┴───┴───┴───┴──┬┴──┬┴──┬┴──┬───┼───┼───┤ + * │ │  │  │                        │ │FN1│FN2│ │ │ │ + * └────┴────┴────┴────────────────────────┴───┴───┴───┴───┴───┴───┘ */ + [_SL] = { { KC_GRV, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, KC_NO, KC_NO, KC_NO }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_END, KC_NO, KC_NO, KC_NO }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO }, + { KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO, KC_NO } + } +}; +void dip_switch_update_user(uint8_t index, bool active){ + switch(index){ + case 0: + if(active){ //BT mode +// do stuff + } + else{ //Cable mode +// do stuff + } + break; + case 1: + if(active){ // Win/Android mode +// do stuff + } + else{ // Mac/iOS mode +// do stuff + } + break; + } +} +void keyboard_post_init_user(void) { + // Customise these values to desired behaviour + debug_enable=true; + debug_matrix=true; + //debug_keyboard=true; + //debug_mouse=true; +} diff --git a/keyboards/keychron/k6/led_matrix.c b/keyboards/keychron/k6/led_matrix.c new file mode 100644 index 000000000000..03d50810db0e --- /dev/null +++ b/keyboards/keychron/k6/led_matrix.c @@ -0,0 +1,78 @@ +#include +#include "rgb.h" +#include "rgb_matrix.h" +#include "rgb_matrix_types.h" +#include "color.h" + +/* + COLS key / led + PWM PWM08A - PWM02B + Y2 transistors PNP driven high + base - GPIO + collector - LED Col pins + emitter - VDD + + VDD GPIO + (E) (B) + | PNP | + |_______| + | + | + (C) + LED + + ROWS RGB + PWM PWM05B - PWM22B (PWM17B unused) + C 0-15 + Y1 transistors NPN driven low + base - GPIO + collector - LED RGB row pins + emitter - GND + + LED + (C) + | + | + _______ + | NPN | + | | + (B) (E) + GPIO GND +*/ + +LED_TYPE led_state[DRIVER_LED_TOTAL]; + +void init(void) {} + +static void flush(void) {} + +void set_color(int index, uint8_t r, uint8_t g, uint8_t b) { + led_state[index].r = r; + led_state[index].g = g; + led_state[index].b = b; +} + +static void set_color_all(uint8_t r, uint8_t g, uint8_t b) { + for (int i=0; i> USB_LED_CAPS_LOCK & 1) { + set_color(11, caps_lock_color[0], caps_lock_color[2], caps_lock_color[1]); + } else { + set_color(11, 0x00, 0x00, 0x00); + } +} +*/ \ No newline at end of file diff --git a/keyboards/keychron/k6/matrix.c b/keyboards/keychron/k6/matrix.c new file mode 100644 index 000000000000..b1deb197588b --- /dev/null +++ b/keyboards/keychron/k6/matrix.c @@ -0,0 +1,325 @@ +/* +Copyright 2011 Jun Wako + +This program is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation, either version 2 of the License, or +(at your option) any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program. If not, see . + +Ported to QMK by Stephen Peery +*/ + +#include +#include +#include +#include "ch.h" +#include "hal.h" +#include "CT16.h" + +#include "color.h" +#include "wait.h" +#include "util.h" +#include "matrix.h" +#include "debounce.h" +#include "quantum.h" + +static const pin_t row_pins[MATRIX_ROWS] = MATRIX_ROW_PINS; +static const pin_t col_pins[MATRIX_COLS] = MATRIX_COL_PINS; +static const pin_t led_row_pins[LED_MATRIX_ROWS_HW] = LED_MATRIX_ROW_PINS; +static uint16_t row_ofsts[LED_MATRIX_ROWS]; + +matrix_row_t raw_matrix[MATRIX_ROWS]; //raw values +matrix_row_t last_matrix[MATRIX_ROWS] = {0}; // raw values +matrix_row_t matrix[MATRIX_ROWS]; //debounced values + +static uint8_t current_led_row =0; + +extern volatile LED_TYPE led_state[DRIVER_LED_TOTAL]; + +__attribute__((weak)) void matrix_init_kb(void) { matrix_init_user(); } + +__attribute__((weak)) void matrix_scan_kb(void) { matrix_scan_user(); } + +__attribute__((weak)) void matrix_init_user(void) {} + +__attribute__((weak)) void matrix_scan_user(void) {} + +inline matrix_row_t matrix_get_row(uint8_t row) { return matrix[row]; } + +void matrix_print(void) {} + +static void init_pins(void) { + + // Unselect ROWs + for (uint8_t x = 0; x < MATRIX_ROWS; x++) { + setPinOutput(row_pins[x]); + writePinHigh(row_pins[x]); + } + + // Unselect COLs + for (uint8_t x = 0; x < MATRIX_COLS; x++) { + setPinInput(col_pins[x]); + writePinHigh(col_pins[x]); + } + + for (uint8_t x = 0; x < LED_MATRIX_ROWS_HW; x++) { + setPinOutput(led_row_pins[x]); + writePinLow(led_row_pins[x]); + } +} + +static void disable_rgb_matrix(void) { + syssts_t sts = chSysGetStatusAndLockX(); + // Disable LED row output + writePinLow(led_row_pins[current_led_row]); + // Disable PWM outputs on column pins + // Enable GPIO control on colun pins + SN_CT16B1->PWMIOENB = 0; + // Clear match interrupt status + SN_CT16B1->IC = mskCT16_MR24IC; + // Reset the counter + SN_CT16B1->TMRCTRL = CT16_CRST; + // Wait until timer reset done. + while (SN_CT16B1->TMRCTRL & mskCT16_CRST); + // Disable the LED interrupts + CT16B1_NvicDisable(); + chSysRestoreStatusX(sts); +} + +static void enable_rgb_matrix(void) { + syssts_t sts = chSysGetStatusAndLockX(); + // Enable PWM outputs on column pins + SN_CT16B1->PWMIOENB = (mskCT16_PWM8EN_EN \ + |mskCT16_PWM9EN_EN \ + |mskCT16_PWM10EN_EN \ + |mskCT16_PWM11EN_EN \ + |mskCT16_PWM12EN_EN \ + |mskCT16_PWM13EN_EN \ + |mskCT16_PWM14EN_EN \ + |mskCT16_PWM15EN_EN \ + |mskCT16_PWM16EN_EN \ + |mskCT16_PWM17EN_EN \ + |mskCT16_PWM18EN_EN \ + |mskCT16_PWM19EN_EN \ + |mskCT16_PWM20EN_EN \ + |mskCT16_PWM21EN_EN \ + |mskCT16_PWM22EN_EN \ + |mskCT16_PWM23EN_EN); + + //Set CT16B1 as the up-counting mode. + SN_CT16B1->TMRCTRL = (mskCT16_CRST); + // Wait until timer reset done. + while (SN_CT16B1->TMRCTRL & mskCT16_CRST); + // Let TC start counting. + SN_CT16B1->TMRCTRL |= mskCT16_CEN_EN; + // Enable the LED interrupts + CT16B1_NvicEnable(); + chSysRestoreStatusX(sts); +} +static void init_rgb_matrix(void) { + // Calculate the row offsets + for (uint8_t i = 0; i < LED_MATRIX_ROWS; i++) { + row_ofsts[i] = i * LED_MATRIX_COLS; + } + // Enable Timer Clock + SN_SYS1->AHBCLKEN_b.CT16B1CLKEN = 1; + // PFPA - Map most PWM outputs to their PWM A pins + // PWM0-2 is B for the k4 + SN_PFPA->CT16B1 = 0x00000000; + + // Enable PWM function, IOs and select the PWM modes + // Enable PWM0-PWM2, PWM8-23 + SN_CT16B1->PWMENB = (mskCT16_PWM8EN_EN \ + |mskCT16_PWM9EN_EN \ + |mskCT16_PWM10EN_EN \ + |mskCT16_PWM11EN_EN \ + |mskCT16_PWM12EN_EN \ + |mskCT16_PWM13EN_EN \ + |mskCT16_PWM14EN_EN \ + |mskCT16_PWM15EN_EN \ + |mskCT16_PWM16EN_EN \ + |mskCT16_PWM17EN_EN \ + |mskCT16_PWM18EN_EN \ + |mskCT16_PWM19EN_EN \ + |mskCT16_PWM20EN_EN \ + |mskCT16_PWM21EN_EN \ + |mskCT16_PWM22EN_EN \ + |mskCT16_PWM23EN_EN); + + // Set match interrupts and TC reset + SN_CT16B1->MCTRL3 = (mskCT16_MR24IE_EN); + SN_CT16B1->MCTRL3_b.MR24RST = 1; + + // COL match register + SN_CT16B1->MR24 = 0xFF; + + // Set prescale value + SN_CT16B1->PRE = 0x03; + enable_rgb_matrix(); +} + +static bool read_cols_on_row(matrix_row_t current_matrix[], uint8_t current_row) { + // Store last value of row prior to reading + matrix_row_t last_row_value = current_matrix[current_row]; + // Clear data in matrix row + current_matrix[current_row] = 0; + // Enable current matrix row + writePinLow(row_pins[current_row]); + // Wait to stabilize + wait_us(10); + + // Read the key matrix + for (uint8_t col_index = 0; col_index < MATRIX_COLS; col_index++) { + disable_rgb_matrix(); + // Enable the column + writePinHigh(col_pins[col_index]); + // Check col pin state + if (readPin(col_pins[col_index]) == 0) { + // Pin LO, set col bit + current_matrix[current_row] |= (MATRIX_ROW_SHIFTER << col_index); + } else { + // Pin HI, clear col bit + current_matrix[current_row] &= ~(MATRIX_ROW_SHIFTER << col_index); + } + + // Disable the column + writePinLow(col_pins[col_index]); + enable_rgb_matrix(); + } + + // Disable current matrix row + writePinHigh(row_pins[current_row]); + return (last_row_value != current_matrix[current_row]); +} + +void matrix_init(void) { + // Enable GPIO Clock + SN_SYS1->AHBCLKEN_b.P0CLKEN = 1; + SN_SYS1->AHBCLKEN_b.P1CLKEN = 1; + SN_SYS1->AHBCLKEN_b.P2CLKEN = 1; + SN_SYS1->AHBCLKEN_b.P3CLKEN = 1; + // initialize key pins + init_pins(); + + // initialize matrix state: all keys off + for (uint8_t i = 0; i < MATRIX_ROWS; i++) { + raw_matrix[i] = 0; + matrix[i] = 0; + } + + debounce_init(MATRIX_ROWS); + + matrix_init_quantum(); + // initialize the rgb matrix + init_rgb_matrix(); +} + +uint8_t matrix_scan(void) { + bool changed = false; + + // Set row, read cols + for (uint8_t current_row = 0; current_row < MATRIX_ROWS; current_row++) { + changed |= read_cols_on_row(raw_matrix, current_row); + + } + debounce(raw_matrix, matrix, MATRIX_ROWS, changed); + matrix_scan_quantum(); + return (uint8_t)changed; + +} + +uint8_t hw_row_to_matrix_row[15] = { 0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 0 }; +/** + * @brief CT16B1 interrupt handler. + * + * @isr + */ +OSAL_IRQ_HANDLER(SN32_CT16B1_HANDLER) { + + OSAL_IRQ_PROLOGUE(); + uint8_t led_row = current_led_row; + // Turn the selected LED row off + writePinLow(led_row_pins[led_row]); + // Turn the next row on + led_row = (led_row +1) % LED_MATRIX_ROWS_HW; + // Update the led status + current_led_row = led_row; + + uint8_t row_idx = hw_row_to_matrix_row[led_row]; + uint16_t row_ofst = row_ofsts[row_idx]; + + if(led_row % 3 == 0) + { + SN_CT16B1->MR8 = led_state[row_ofst + 0 ].b; + SN_CT16B1->MR9 = led_state[row_ofst + 1 ].b; + SN_CT16B1->MR10 = led_state[row_ofst + 2 ].b; + SN_CT16B1->MR11 = led_state[row_ofst + 3 ].b; + SN_CT16B1->MR12 = led_state[row_ofst + 4 ].b; + SN_CT16B1->MR13 = led_state[row_ofst + 5 ].b; + SN_CT16B1->MR14 = led_state[row_ofst + 6 ].b; + SN_CT16B1->MR15 = led_state[row_ofst + 7 ].b; + SN_CT16B1->MR16 = led_state[row_ofst + 8 ].b; + SN_CT16B1->MR17 = led_state[row_ofst + 9 ].b; + SN_CT16B1->MR18 = led_state[row_ofst + 10].b; + SN_CT16B1->MR19 = led_state[row_ofst + 11].b; + SN_CT16B1->MR20 = led_state[row_ofst + 12].b; + SN_CT16B1->MR21 = led_state[row_ofst + 13].b; + SN_CT16B1->MR22 = led_state[row_ofst + 14].b; + SN_CT16B1->MR23 = led_state[row_ofst + 15].b; + } + + if(led_row % 3 == 1) + { + SN_CT16B1->MR8 = led_state[row_ofst + 0 ].g; + SN_CT16B1->MR9 = led_state[row_ofst + 1 ].g; + SN_CT16B1->MR10 = led_state[row_ofst + 2 ].g; + SN_CT16B1->MR11 = led_state[row_ofst + 3 ].g; + SN_CT16B1->MR12 = led_state[row_ofst + 4 ].g; + SN_CT16B1->MR13 = led_state[row_ofst + 5 ].g; + SN_CT16B1->MR14 = led_state[row_ofst + 6 ].g; + SN_CT16B1->MR15 = led_state[row_ofst + 7 ].g; + SN_CT16B1->MR16 = led_state[row_ofst + 8 ].g; + SN_CT16B1->MR17 = led_state[row_ofst + 9 ].g; + SN_CT16B1->MR18 = led_state[row_ofst + 10].g; + SN_CT16B1->MR19 = led_state[row_ofst + 11].g; + SN_CT16B1->MR20 = led_state[row_ofst + 12].g; + SN_CT16B1->MR21 = led_state[row_ofst + 13].g; + SN_CT16B1->MR22 = led_state[row_ofst + 14].g; + SN_CT16B1->MR23 = led_state[row_ofst + 15].g; + } + if(led_row % 3 == 2) + { + SN_CT16B1->MR8 = led_state[row_ofst + 0 ].r; + SN_CT16B1->MR9 = led_state[row_ofst + 1 ].r; + SN_CT16B1->MR10 = led_state[row_ofst + 2 ].r; + SN_CT16B1->MR11 = led_state[row_ofst + 3 ].r; + SN_CT16B1->MR12 = led_state[row_ofst + 4 ].r; + SN_CT16B1->MR13 = led_state[row_ofst + 5 ].r; + SN_CT16B1->MR14 = led_state[row_ofst + 6 ].r; + SN_CT16B1->MR15 = led_state[row_ofst + 7 ].r; + SN_CT16B1->MR16 = led_state[row_ofst + 8 ].r; + SN_CT16B1->MR17 = led_state[row_ofst + 9 ].r; + SN_CT16B1->MR18 = led_state[row_ofst + 10].r; + SN_CT16B1->MR19 = led_state[row_ofst + 11].r; + SN_CT16B1->MR20 = led_state[row_ofst + 12].r; + SN_CT16B1->MR21 = led_state[row_ofst + 13].r; + SN_CT16B1->MR22 = led_state[row_ofst + 14].r; + SN_CT16B1->MR23 = led_state[row_ofst + 15].r; + } + writePinHigh(led_row_pins[led_row]); + CT16B1_IRQHandler(); + while (SN_CT16B1->TC == 0xFF); + OSAL_IRQ_EPILOGUE(); +} + +void HardFault_Handler(void) { + NVIC_SystemReset(); +} \ No newline at end of file diff --git a/keyboards/keychron/k6/mcuconf.h b/keyboards/keychron/k6/mcuconf.h new file mode 100644 index 000000000000..458530fbed05 --- /dev/null +++ b/keyboards/keychron/k6/mcuconf.h @@ -0,0 +1,93 @@ +/* + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F0xx_MCUCONF + +/* + * HAL driver system settings. + */ + +/* + * SN driver system settings. + */ +#define SN32_CT_IRQ_PRIORITY 2 +#define SN32_CT_USE_TIMER 2 + +#define SN32_HAS_GPIOA TRUE +#define SN32_HAS_GPIOB TRUE +#define SN32_HAS_GPIOC TRUE +#define SN32_HAS_GPIOD TRUE + +/* + * USB driver system settings. + */ +#define SN32_USB_USE_USB1 TRUE +#define SN32_USB_LOW_POWER_ON_SUSPEND TRUE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +#define CRT1_AREAS_NUMBER 1 + +#define PLATFORM_USB_USE_USB1 TRUE + +/* + * Timer driver system settings. + */ +#define SN32_PWM_USE_TIM1 FALSE +#define SN32_PWM_USE_TIM2 TRUE +#define SN32_PWM_TIM1_IRQ_PRIORITY 3 +#define SN32_PWM_TIM2_IRQ_PRIORITY 3 + +#define SYS_CLOCK_SETUP 1 +#define SYS0_CLKCFG_VAL 0 +#define AHB_PRESCALAR 0x2 +#define CLKOUT_SEL_VAL 0x0 +#define CLKOUT_PRESCALAR 0x0 + +/*---------------------------------------------------------------------------- + DEFINES + *----------------------------------------------------------------------------*/ +#define IHRC48 0 +#define ILRC 1 + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define __IHRC48_FREQ (48000000UL) +#define __ILRC_FREQ (32000UL) + +// #endif /* _MCUCONF_H_ */ + +#define PLATFORM_MCUCONF + +#endif /* MCUCONF_H */ diff --git a/keyboards/keychron/k6/readme.md b/keyboards/keychron/k6/readme.md new file mode 100644 index 000000000000..e023dc871e03 --- /dev/null +++ b/keyboards/keychron/k6/readme.md @@ -0,0 +1,14 @@ +## Keychron K6 + +Keychron K6 ISO Nordic RGB (Sonix SN32F248B) + +Layout by: [Alexander Frank](https://github.com/jedifindtrick) + +Based on Redragon K566 by: [Adam Honse](https://github.com/CalcProgrammer1), Kemove DK63 by: [Stephen Peery](https://github.com/smp4488) and Keychron K4 by: [Dimitris Mantzouranis](https://github.com/dexter93) +Hardware Supported: SN32F248BF + +Make example for this keyboard (after setting up your build environment): + + make keychron/k6:default + +See the [build environment setup](https://docs.qmk.fm/#/getting_started_build_tools) and the [make instructions](https://docs.qmk.fm/#/getting_started_make_guide) for more information. Brand new to QMK? Start with our [Complete Newbs Guide](https://docs.qmk.fm/#/newbs). diff --git a/keyboards/keychron/k6/rules.mk b/keyboards/keychron/k6/rules.mk new file mode 100644 index 000000000000..54c97e54ca1f --- /dev/null +++ b/keyboards/keychron/k6/rules.mk @@ -0,0 +1,63 @@ +# project specific files +SRC = matrix.c +SRC += led_matrix.c +SRC += config_led.c + +## chip/board settings +# - the next two should match the directories in +# /os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES) +MCU_FAMILY = SN32 +MCU_SERIES = SN32F240 + +# Linker script to use +# - it should exist either in /os/common/ports/ARMCMx/compilers/GCC/ld/ +# or /ld/ +MCU_LDSCRIPT = SN32F240B + +# Startup code to use +# - it should exist in /os/common/startup/ARMCMx/compilers/GCC/mk/ +MCU_STARTUP = sn32f24x + +# Board: it should exist either in /os/hal/boards/ +# or /boards +BOARD = SN_SN32F240B + +# Cortex version +MCU = cortex-m0 + +# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7 +ARMV = 6 + +# BOOTLOADER = flash +SN32_BOOTLOADER_ADDRESS = 0x1FFF0301 + +OPT_DEFS = -O2 + +# Options to pass to dfu-util when flashing +# DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave +# DFU_SUFFIX_ARGS = -p DF11 -v 0483 + +# Build Options +# comment out to disable the options. +# +LTO_ENABLE = no +BACKLIGHT_ENABLE = no +MAGIC_ENABLE = yes +MAGIC_KEYCODE_ENABLE = yes +BOOTMAGIC_ENABLE = full # Virtual DIP switch configuration +MOUSEKEY_ENABLE = no # Mouse keys +EXTRAKEY_ENABLE = no # Audio control and System control +CONSOLE_ENABLE = no # Console for debug +COMMAND_ENABLE = no # Commands for debug and configuration +SLEEP_LED_ENABLE = no # Breathing sleep LED during USB suspend +NKRO_ENABLE = no # USB Nkey Rollover +AUDIO_ENABLE = no +RGBLIGHT_ENABLE = no +SERIAL_LINK_ENABLE = no +WAIT_FOR_USB = no +CUSTOM_MATRIX = yes +DIP_SWITCH_ENABLE = yes + +# Custom RGB matrix handling +RGB_MATRIX_ENABLE = yes +RGB_MATRIX_DRIVER = custom \ No newline at end of file From 8c53052855908164006442b5cc175cd606989964 Mon Sep 17 00:00:00 2001 From: Alexander <48211557+jedifindtrick@users.noreply.github.com> Date: Fri, 5 Mar 2021 18:32:21 +0100 Subject: [PATCH 2/3] Update info.json Corrected the layout. --- keyboards/keychron/k6/info.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/keyboards/keychron/k6/info.json b/keyboards/keychron/k6/info.json index 3e7757f8127b..1b0251a759a0 100644 --- a/keyboards/keychron/k6/info.json +++ b/keyboards/keychron/k6/info.json @@ -6,7 +6,7 @@ "height": 5, "layouts": { "LAYOUT": { - "layout": [{"label":"esc", "x":0, "y":0}, {"label":"1 !", "x":1, "y":0}, {"label":"2 @", "x":2, "y":0}, {"label":"3 #", "x":3, "y":0}, {"label":"4 $", "x":4, "y":0}, {"label":"5 %", "x":5, "y":0}, {"label":"6 &", "x":6, "y":0}, {"label":"7 /", "x":7, "y":0}, {"label":"8 (", "x":8, "y":0}, {"label":"9 )", "x":9, "y":0}, {"label":"0 =", "x":10, "y":0}, {"label":"+ ?", "x":11, "y":0}, {"label":"´ `", "x":12, "y":0}, {"label":"backspace", "x":13, "y":0, "w":2}, {"label":"rgb", "x":15, "y":0}, {"label":"tab", "x":0, "y":1, "w":1.5}, {"label":"Q", "x":1.5, "y":1}, {"label":"W", "x":2.5, "y":1}, {"label":"E", "x":3.5, "y":1}, {"label":"R", "x":4.5, "y":1}, {"label":"T", "x":5.5, "y":1}, {"label":"Y", "x":6.5, "y":1}, {"label":"U", "x":7.5, "y":1}, {"label":"I", "x":8.5, "y":1}, {"label":"O", "x":9.5, "y":1}, {"label":"P", "x":10.5, "y":1}, {"label":"Å", "x":11.5, "y":1}, {"label":"¨ ^", "x":12.5, "y":1}, {"label":"\\ |", "x":13.5, "y":1}, {"label":"7", "x":15, "y":1}, {"label":"8", "x":16, "y":1}, {"label":"9", "x":17, "y":1}, {"label":"+", "x":18, "y":1, "h":2}, {"label":"caps lock", "x":0, "y":3, "w":1.75}, {"label":"A", "x":1.75, "y":3}, {"label":"S", "x":2.75, "y":3}, {"label":"D", "x":3.75, "y":3}, {"label":"F", "x":4.75, "y":3}, {"label":"G", "x":5.75, "y":3}, {"label":"H", "x":6.75, "y":3}, {"label":"J", "x":7.75, "y":3}, {"label":"K", "x":8.75, "y":3}, {"label":"L", "x":9.75, "y":3}, {"label":"; :", "x":10.75, "y":3}, {"label":"' \"", "x":11.75, "y":3}, {"label":"enter", "x":12.75, "y":3, "w":2.25}, {"label":"4", "x":15, "y":3}, {"label":"5", "x":16, "y":3}, {"label":"6", "x":17, "y":3}, {"label":"shift", "x":0, "y":4, "w":2.25}, {"label":"Z", "x":2.25, "y":4}, {"label":"X", "x":3.25, "y":4}, {"label":"C", "x":4.25, "y":4}, {"label":"V", "x":5.25, "y":4}, {"label":"B", "x":6.25, "y":4}, {"label":"N", "x":7.25, "y":4}, {"label":"M", "x":8.25, "y":4}, {"label":", <", "x":9.25, "y":4}, {"label":". >", "x":10.25, "y":4}, {"label":"/ ?", "x":11.25, "y":4}, {"label":"shift", "x":12.25, "y":4, "w":1.75}, {"label":"up", "x":14, "y":4}, {"label":"1", "x":15, "y":4}, {"label":"2", "x":16, "y":4}, {"label":"3", "x":17, "y":4}, {"label":"enter", "x":18, "y":4, "h":2}, {"label":"control", "x":0, "y":5, "w":1.25}, {"label":"option", "x":1.25, "y":5, "w":1.25}, {"label":"cmd", "x":2.5, "y":5, "w":1.25}, {"label":"space", "x":3.75, "y":5, "w":6.25}, {"label":"cmd", "x":10, "y":5}, {"label":"fn", "x":11, "y":5}, {"label":"control", "x":12, "y":5}, {"label":"left", "x":13, "y":5}, {"label":"down", "x":14, "y":5}, {"label":"right", "x":15, "y":5}, {"label":"0", "x":16, "y":5}, {"label":".", "x":17, "y":5}] + "layout": [{"label":"esc", "x":0, "y":0}, {"label":"1 !", "x":1, "y":0}, {"label":"2 @", "x":2, "y":0}, {"label":"3 #", "x":3, "y":0}, {"label":"4 $", "x":4, "y":0}, {"label":"5 %", "x":5, "y":0}, {"label":"6 &", "x":6, "y":0}, {"label":"7 /", "x":7, "y":0}, {"label":"8 (", "x":8, "y":0}, {"label":"9 )", "x":9, "y":0}, {"label":"0 =", "x":10, "y":0}, {"label":"+ ?", "x":11, "y":0}, {"label":"´ `", "x":12, "y":0}, {"label":"backspace", "x":13, "y":0, "w":2}, {"label":"rgb", "x":15, "y":0}, {"label":"tab", "x":0, "y":1, "w":1.5}, {"label":"Q", "x":1.5, "y":1}, {"label":"W", "x":2.5, "y":1}, {"label":"E", "x":3.5, "y":1}, {"label":"R", "x":4.5, "y":1}, {"label":"T", "x":5.5, "y":1}, {"label":"Y", "x":6.5, "y":1}, {"label":"U", "x":7.5, "y":1}, {"label":"I", "x":8.5, "y":1}, {"label":"O", "x":9.5, "y":1}, {"label":"P", "x":10.5, "y":1}, {"label":"Å", "x":11.5, "y":1}, {"label":"¨ ^", "x":12.5, "y":1}, {"label":"home", "x":15, "y":1}, {"label":"caps lock", "x":0, "y":3, "w":1.75}, {"label":"A", "x":1.75, "y":3}, {"label":"S", "x":2.75, "y":3}, {"label":"D", "x":3.75, "y":3}, {"label":"F", "x":4.75, "y":3}, {"label":"G", "x":5.75, "y":3}, {"label":"H", "x":6.75, "y":3}, {"label":"J", "x":7.75, "y":3}, {"label":"K", "x":8.75, "y":3}, {"label":"L", "x":9.75, "y":3}, {"label":"Ö", "x":10.75, "y":3}, {"label":"Ä", "x":11.75, "y":3}, {"label":"enter", "x":12.75, "y":3}, {"label":"enter", "x":13.75, "y":3, "w":2.25}, {"label":"page up", "x":15, "y":3}, {"label":"shift", "x":0, "y":4, "w":1.25}, {"label":"< >", "x":1.25, "y":4}, {"label":"Z", "x":2.25, "y":4}, {"label":"X", "x":3.25, "y":4}, {"label":"C", "x":4.25, "y":4}, {"label":"V", "x":5.25, "y":4}, {"label":"B", "x":6.25, "y":4}, {"label":"N", "x":7.25, "y":4}, {"label":"M", "x":8.25, "y":4}, {"label":", ;", "x":9.25, "y":4}, {"label":". :", "x":10.25, "y":4}, {"label":"- _", "x":11.25, "y":4}, {"label":"shift", "x":12.25, "y":4, "w":1.75}, {"label":"up", "x":14, "y":4}, {"label":"page down", "x":15, "y":4}, {"label":"control", "x":0, "y":5, "w":1.25}, {"label":"option", "x":1.25, "y":5, "w":1.25}, {"label":"cmd", "x":2.5, "y":5, "w":1.25}, {"label":"space", "x":3.75, "y":5, "w":6.25}, {"label":"cmd", "x":10, "y":5}, {"label":"fn1", "x":11, "y":5}, {"label":"fn2", "x":12, "y":5}, {"label":"left", "x":13, "y":5}, {"label":"down", "x":14, "y":5}, {"label":"right", "x":15, "y":5}] } } } \ No newline at end of file From bca0227591652ed6e28c01af9e708a19a1e63981 Mon Sep 17 00:00:00 2001 From: Alexander <48211557+jedifindtrick@users.noreply.github.com> Date: Fri, 5 Mar 2021 20:26:12 +0100 Subject: [PATCH 3/3] K6: Update MCUConf and remove CT16.h As per requested here https://github.com/SonixQMK/qmk_firmware/pull/3#issuecomment-791606661 --- keyboards/keychron/k6/CT16.h | 1318 ------------------------------- keyboards/keychron/k6/mcuconf.h | 22 +- 2 files changed, 4 insertions(+), 1336 deletions(-) delete mode 100644 keyboards/keychron/k6/CT16.h diff --git a/keyboards/keychron/k6/CT16.h b/keyboards/keychron/k6/CT16.h deleted file mode 100644 index 168d8d01ad90..000000000000 --- a/keyboards/keychron/k6/CT16.h +++ /dev/null @@ -1,1318 +0,0 @@ -#ifndef __SN32F240B_CT16_H -#define __SN32F240B_CT16_H - - -/*_____ I N C L U D E S ____________________________________________________*/ - -/*_____ D E F I N I T I O N S ______________________________________________*/ -/* -Base Address: 0x4000 0000 (CT16B0) - 0x4000 2000 (CT16B1) -*/ - -/* CT16Bn Timer Control register (0x00) */ -#define CT16_CEN_DIS 0 //[0:0] CT16Bn enable bit -#define CT16_CEN_EN 1 -#define mskCT16_CEN_DIS (CT16_CEN_DIS<<0) -#define mskCT16_CEN_EN (CT16_CEN_EN<<0) - -#define CT16_CRST 1 //[1:1] CT16Bn counter reset bit -#define mskCT16_CRST (CT16_CRST<<1) - -/* CT16Bn Count Control register (0x10) */ - //[1:0] Count/Timer Mode selection. -#define CT16_CTM_TIMER 0 //Timer mode: Every rising PCLK edge. -#define CT16_CTM_CNTER_RISING 1 //Counter mode: TC increments on rising edge of CAP input. -#define CT16_CTM_CNTER_FALLING 2 //Counter mode: TC increments on falling edge of CAP input. -#define CT16_CTM_CNTER_BOTH 3 //Counter mode: TC increments on both edge of CAP input. -#define mskCT16_CTM_TIMER (CT16_CTM_TIMER<<0) -#define mskCT16_CTM_CNTER_RISING (CT16_CTM_CNTER_RISING<<0) -#define mskCT16_CTM_CNTER_FALLING (CT16_CTM_CNTER_FALLING<<0) -#define mskCT16_CTM_CNTER_BOTH (CT16_CTM_CNTER_BOTH<<0) - -#define CT16_CIS 0 //[3:2] Count Input Select -#define mskCT16_CIS (CT16_CIS<<2) - -/* CT16Bn Match Control register (0x14) */ -#define CT16_MR0IE_EN 1 //[0:0] Enable MR0 match interrupt -#define CT16_MR0IE_DIS 0 -#define mskCT16_MR0IE_EN (CT16_MR0IE_EN<<0) -#define mskCT16_MR0IE_DIS (CT16_MR0IE_DIS<<0) - -#define CT16_MR0RST_EN 1 //[1:1] Enable reset TC when MR0 matches TC. -#define CT16_MR0RST_DIS 0 -#define mskCT16_MR0RST_EN (CT16_MR0RST_EN<<1) -#define mskCT16_MR0RST_DIS (CT16_MR0RST_DIS<<1) - -#define CT16_MR0STOP_EN 1 //[2:2] Enable stop TC and clear CEN when MR0 matches TC. -#define CT16_MR0STOP_DIS 0 -#define mskCT16_MR0STOP_EN (CT16_MR0STOP_EN<<2) -#define mskCT16_MR0STOP_DIS (CT16_MR0STOP_DIS<<2) - -#define CT16_MR1IE_EN 1 //[3:3] Enable MR1 match interrupt -#define CT16_MR1IE_DIS 0 -#define mskCT16_MR1IE_EN (CT16_MR1IE_EN<<3) -#define mskCT16_MR1IE_DIS (CT16_MR1IE_DIS<<3) - -#define CT16_MR1RST_EN 1 //[4:4] Enable reset TC when MR1 matches TC. -#define CT16_MR1RST_DIS 0 -#define mskCT16_MR1RST_EN (CT16_MR1RST_EN<<4) -#define mskCT16_MR1RST_DIS (CT16_MR1RST_DIS<<4) - -#define CT16_MR1STOP_EN 1 //[5:5] Enable stop TC and clear CEN when MR1 matches TC. -#define CT16_MR1STOP_DIS 0 -#define mskCT16_MR1STOP_EN (CT16_MR1STOP_EN<<5) -#define mskCT16_MR1STOP_DIS (CT16_MR1STOP_DIS<<5) - -#define CT16_MR2IE_EN 1 //[6:6] Enable MR2 match interrupt -#define CT16_MR2IE_DIS 0 -#define mskCT16_MR2IE_EN (CT16_MR2IE_EN<<6) -#define mskCT16_MR2IE_DIS (CT16_MR2IE_DIS<<6) - -#define CT16_MR2RST_EN 1 //[7:7] Enable reset TC when MR2 matches TC. -#define CT16_MR2RST_DIS 0 -#define mskCT16_MR2RST_EN (CT16_MR2RST_EN<<7) -#define mskCT16_MR2RST_DIS (CT16_MR2RST_DIS<<7) - -#define CT16_MR2STOP_EN 1 //[8:8] Enable stop TC and clear CEN when MR2 matches TC. -#define CT16_MR2STOP_DIS 0 -#define mskCT16_MR2STOP_EN (CT16_MR2STOP_EN<<8) -#define mskCT16_MR2STOP_DIS (CT16_MR2STOP_DIS<<8) - -#define CT16_MR3IE_EN 1 //[9:9] Enable MR3 match interrupt -#define CT16_MR3IE_DIS 0 -#define mskCT16_MR3IE_EN (CT16_MR3IE_EN<<9) -#define mskCT16_MR3IE_DIS (CT16_MR3IE_DIS<<9) - -#define CT16_MR3RST_EN 1 //[10:10] Enable reset TC when MR3 matches TC. -#define CT16_MR3RST_DIS 0 -#define mskCT16_MR3RST_EN (CT16_MR3RST_EN<<10) -#define mskCT16_MR3RST_DIS (CT16_MR3RST_DIS<<10) - -#define CT16_MR3STOP_EN 1 //[11:11] Enable stop TC and clear CEN when MR3 matches TC. -#define CT16_MR3STOP_DIS 0 -#define mskCT16_MR3STOP_EN (CT16_MR3STOP_EN<<11) -#define mskCT16_MR3STOP_DIS (CT16_MR3STOP_DIS<<11) - -#define CT16_MR4IE_EN 1 //[12:12 Enable MR4 match interrupt -#define CT16_MR4IE_DIS 0 -#define mskCT16_MR4IE_EN (CT16_MR4IE_EN<<12) -#define mskCT16_MR4IE_DIS (CT16_MR4IE_DIS<<12) - -#define CT16_MR4RST_EN 1 //[13:13] Enable reset TC when MR4 matches TC. -#define CT16_MR4RST_DIS 0 -#define mskCT16_MR4RST_EN (CT16_MR4RST_EN<<13) -#define mskCT16_MR4RST_DIS (CT16_MR4RST_DIS<<13) - -#define CT16_MR4STOP_EN 1 //[14:14] Enable stop TC and clear CEN when MR4 matches TC. -#define CT16_MR4STOP_DIS 0 -#define mskCT16_MR4STOP_EN (CT16_MR4STOP_EN<<14) -#define mskCT16_MR4STOP_DIS (CT16_MR4STOP_DIS<<14) - -#define CT16_MR5IE_EN 1 //[15:15] Enable MR5 match interrupt -#define CT16_MR5IE_DIS 0 -#define mskCT16_MR5IE_EN (CT16_MR5IE_EN<<15) -#define mskCT16_MR5IE_DIS (CT16_MR5IE_DIS<<15) - -#define CT16_MR5RST_EN 1 //[16:16] Enable reset TC when MR5 matches TC. -#define CT16_MR5RST_DIS 0 -#define mskCT16_MR5RST_EN (CT16_MR5RST_EN<<16) -#define mskCT16_MR5RST_DIS (CT16_MR5RST_DIS<<16) - -#define CT16_MR5STOP_EN 1 //[17:17] Enable stop TC and clear CEN when MR5 matches TC. -#define CT16_MR5STOP_DIS 0 -#define mskCT16_MR5STOP_EN (CT16_MR5STOP_EN<<17) -#define mskCT16_MR5STOP_DIS (CT16_MR5STOP_DIS<<17) - -#define CT16_MR6IE_EN 1 //[18:18 Enable MR6 match interrupt -#define CT16_MR6IE_DIS 0 -#define mskCT16_MR6IE_EN (CT16_MR6IE_EN<<18) -#define mskCT16_MR6IE_DIS (CT16_MR6IE_DIS<<18) - -#define CT16_MR6RST_EN 1 //[19:19] Enable reset TC when MR6 matches TC. -#define CT16_MR6RST_DIS 0 -#define mskCT16_MR6RST_EN (CT16_MR6RST_EN<<19) -#define mskCT16_MR6RST_DIS (CT16_MR6RST_DIS<<19) - -#define CT16_MR6STOP_EN 1 //[20:20] Enable stop TC and clear CEN when MR6 matches TC. -#define CT16_MR6STOP_DIS 0 -#define mskCT16_MR6STOP_EN (CT16_MR6STOP_EN<<20) -#define mskCT16_MR6STOP_DIS (CT16_MR6STOP_DIS<<20) - -#define CT16_MR7IE_EN 1 //[21:21 Enable MR7 match interrupt -#define CT16_MR7IE_DIS 0 -#define mskCT16_MR7IE_EN (CT16_MR7IE_EN<<21) -#define mskCT16_MR7IE_DIS (CT16_MR7IE_DIS<<21) - -#define CT16_MR7RST_EN 1 //[22:22] Enable reset TC when MR7 matches TC. -#define CT16_MR7RST_DIS 0 -#define mskCT16_MR7RST_EN (CT16_MR7RST_EN<<22) -#define mskCT16_MR7RST_DIS (CT16_MR7RST_DIS<<22) - -#define CT16_MR7STOP_EN 1 //[23:23] Enable stop TC and clear CEN when MR7 matches TC. -#define CT16_MR7STOP_DIS 0 -#define mskCT16_MR7STOP_EN (CT16_MR7STOP_EN<<23) -#define mskCT16_MR7STOP_DIS (CT16_MR7STOP_DIS<<23) - -#define CT16_MR8IE_EN 1 //[24:24 Enable MR8 match interrupt -#define CT16_MR8IE_DIS 0 -#define mskCT16_MR8IE_EN (CT16_MR8IE_EN<<24) -#define mskCT16_MR8IE_DIS (CT16_MR8IE_DIS<<24) - -#define CT16_MR8RST_EN 1 //[25:25] Enable reset TC when MR8 matches TC. -#define CT16_MR8RST_DIS 0 -#define mskCT16_MR8RST_EN (CT16_MR8RST_EN<<25) -#define mskCT16_MR8RST_DIS (CT16_MR8RST_DIS<<25) - -#define CT16_MR8STOP_EN 1 //[26:26] Enable stop TC and clear CEN when MR8 matches TC. -#define CT16_MR8STOP_DIS 0 -#define mskCT16_MR8STOP_EN (CT16_MR8STOP_EN<<26) -#define mskCT16_MR8STOP_DIS (CT16_MR8STOP_DIS<<26) - -#define CT16_MR9IE_EN 1 //[27:27] Enable MR9 match interrupt -#define CT16_MR9IE_DIS 0 -#define mskCT16_MR9IE_EN (CT16_MR9IE_EN<<27) -#define mskCT16_MR9IE_DIS (CT16_MR9IE_DIS<<27) - -#define CT16_MR9RST_EN 1 //[28:28] Enable reset TC when MR9 matches TC. -#define CT16_MR9RST_DIS 0 -#define mskCT16_MR9RST_EN (CT16_MR9RST_EN<<28) -#define mskCT16_MR9RST_DIS (CT16_MR9RST_DIS<<28) - -#define CT16_MR9STOP_EN 1 //[29:29] Enable stop TC and clear CEN when MR9 matches TC. -#define CT16_MR9STOP_DIS 0 -#define mskCT16_MR9STOP_EN (CT16_MR9STOP_EN<<29) -#define mskCT16_MR9STOP_DIS (CT16_MR9STOP_DIS<<29) - -/* CT16Bn Match Control register 2 (0x18) */ -#define CT16_MR10IE_EN 1 //[0:0] Enable MR10 match interrupt -#define CT16_MR10IE_DIS 0 -#define mskCT16_MR10IE_EN (CT16_MR10IE_EN<<0) -#define mskCT16_MR10IE_DIS (CT16_MR10IE_DIS<<0) - -#define CT16_MR10RST_EN 1 //[1:1] Enable reset TC when MR10 matches TC. -#define CT16_MR10RST_DIS 0 -#define mskCT16_MR10RST_EN (CT16_MR10RST_EN<<1) -#define mskCT16_MR10RST_DIS (CT16_MR10RST_DIS<<1) - -#define CT16_MR10STOP_EN 1 //[2:2] Enable stop TC and clear CEN when MR10 matches TC. -#define CT16_MR10STOP_DIS 0 -#define mskCT16_MR10STOP_EN (CT16_MR10STOP_EN<<2) -#define mskCT16_MR10STOP_DIS (CT16_MR10STOP_DIS<<2) - -#define CT16_MR11IE_EN 1 //[3:3] Enable MR11 match interrupt -#define CT16_MR11IE_DIS 0 -#define mskCT16_MR11IE_EN (CT16_MR11IE_EN<<3) -#define mskCT16_MR11IE_DIS (CT16_MR11IE_DIS<<3) - -#define CT16_MR11RST_EN 1 //[4:4] Enable reset TC when MR11 matches TC. -#define CT16_MR11RST_DIS 0 -#define mskCT16_MR11RST_EN (CT16_MR11RST_EN<<4) -#define mskCT16_MR11RST_DIS (CT16_MR11RST_DIS<<4) - -#define CT16_MR11STOP_EN 1 //[5:5] Enable stop TC and clear CEN when MR11 matches TC. -#define CT16_MR11STOP_DIS 0 -#define mskCT16_MR11STOP_EN (CT16_MR11STOP_EN<<5) -#define mskCT16_MR11STOP_DIS (CT16_MR11STOP_DIS<<5) - -#define CT16_MR12IE_EN 1 //[6:6] Enable MR12 match interrupt -#define CT16_MR12IE_DIS 0 -#define mskCT16_MR12IE_EN (CT16_MR12IE_EN<<6) -#define mskCT16_MR12IE_DIS (CT16_MR12IE_DIS<<6) - -#define CT16_MR12RST_EN 1 //[7:7] Enable reset TC when MR12 matches TC. -#define CT16_MR12RST_DIS 0 -#define mskCT16_MR12RST_EN (CT16_MR12RST_EN<<7) -#define mskCT16_MR12RST_DIS (CT16_MR12RST_DIS<<7) - -#define CT16_MR12STOP_EN 1 //[8:8] Enable stop TC and clear CEN when MR12 matches TC. -#define CT16_MR12STOP_DIS 0 -#define mskCT16_MR12STOP_EN (CT16_MR12STOP_EN<<8) -#define mskCT16_MR12STOP_DIS (CT16_MR12STOP_DIS<<8) - -#define CT16_MR13IE_EN 1 //[9:9] Enable MR13 match interrupt -#define CT16_MR13IE_DIS 0 -#define mskCT16_MR13IE_EN (CT16_MR13IE_EN<<9) -#define mskCT16_MR13IE_DIS (CT16_MR13IE_DIS<<9) - -#define CT16_MR13RST_EN 1 //[10:10] Enable reset TC when MR13 matches TC. -#define CT16_MR13RST_DIS 0 -#define mskCT16_MR13RST_EN (CT16_MR13RST_EN<<10) -#define mskCT16_MR13RST_DIS (CT16_MR13RST_DIS<<10) - -#define CT16_MR13STOP_EN 1 //[11:11] Enable stop TC and clear CEN when MR13 matches TC. -#define CT16_MR13STOP_DIS 0 -#define mskCT16_MR13STOP_EN (CT16_MR13STOP_EN<<11) -#define mskCT16_MR13STOP_DIS (CT16_MR13STOP_DIS<<11) - -#define CT16_MR14IE_EN 1 //[12:12 Enable MR14 match interrupt -#define CT16_MR14IE_DIS 0 -#define mskCT16_MR14IE_EN (CT16_MR14IE_EN<<12) -#define mskCT16_MR14IE_DIS (CT16_MR14IE_DIS<<12) - -#define CT16_MR14RST_EN 1 //[13:13] Enable reset TC when MR14 matches TC. -#define CT16_MR14RST_DIS 0 -#define mskCT16_MR14RST_EN (CT16_MR14RST_EN<<13) -#define mskCT16_MR14RST_DIS (CT16_MR14RST_DIS<<13) - -#define CT16_MR14STOP_EN 1 //[14:14] Enable stop TC and clear CEN when MR14 matches TC. -#define CT16_MR14STOP_DIS 0 -#define mskCT16_MR14STOP_EN (CT16_MR14STOP_EN<<14) -#define mskCT16_MR14STOP_DIS (CT16_MR14STOP_DIS<<14) - -#define CT16_MR15IE_EN 1 //[15:15 Enable MR15 match interrupt -#define CT16_MR15IE_DIS 0 -#define mskCT16_MR15IE_EN (CT16_MR15IE_EN<<15) -#define mskCT16_MR15IE_DIS (CT16_MR15IE_DIS<<15) - -#define CT16_MR15RST_EN 1 //[16:16] Enable reset TC when MR15 matches TC. -#define CT16_MR15RST_DIS 0 -#define mskCT16_MR15RST_EN (CT16_MR15RST_EN<<16) -#define mskCT16_MR15RST_DIS (CT16_MR15RST_DIS<<16) - -#define CT16_MR15STOP_EN 1 //[17:17] Enable stop TC and clear CEN when MR15 matches TC. -#define CT16_MR15STOP_DIS 0 -#define mskCT16_MR15STOP_EN (CT16_MR15STOP_EN<<17) -#define mskCT16_MR15STOP_DIS (CT16_MR15STOP_DIS<<17) - -#define CT16_MR16IE_EN 1 //[18:18 Enable MR16 match interrupt -#define CT16_MR16IE_DIS 0 -#define mskCT16_MR16IE_EN (CT16_MR16IE_EN<<18) -#define mskCT16_MR16IE_DIS (CT16_MR16IE_DIS<<18) - -#define CT16_MR16RST_EN 1 //[19:19] Enable reset TC when MR16 matches TC. -#define CT16_MR16RST_DIS 0 -#define mskCT16_MR16RST_EN (CT16_MR16RST_EN<<19) -#define mskCT16_MR16RST_DIS (CT16_MR16RST_DIS<<19) - -#define CT16_MR16STOP_EN 1 //[20:20] Enable stop TC and clear CEN when MR16 matches TC. -#define CT16_MR16STOP_DIS 0 -#define mskCT16_MR16STOP_EN (CT16_MR16STOP_EN<<20) -#define mskCT16_MR16STOP_DIS (CT16_MR16STOP_DIS<<20) - -#define CT16_MR17IE_EN 1 //[21:21 Enable MR17 match interrupt -#define CT16_MR17IE_DIS 0 -#define mskCT16_MR17IE_EN (CT16_MR17IE_EN<<21) -#define mskCT16_MR17IE_DIS (CT16_MR17IE_DIS<<21) - -#define CT16_MR17RST_EN 1 //[22:22] Enable reset TC when MR17 matches TC. -#define CT16_MR17RST_DIS 0 -#define mskCT16_MR17RST_EN (CT16_MR17RST_EN<<22) -#define mskCT16_MR17RST_DIS (CT16_MR17RST_DIS<<22) - -#define CT16_MR17STOP_EN 1 //[23:23] Enable stop TC and clear CEN when MR17 matches TC. -#define CT16_MR17STOP_DIS 0 -#define mskCT16_MR17STOP_EN (CT16_MR17STOP_EN<<23) -#define mskCT16_MR17STOP_DIS (CT16_MR17STOP_DIS<<23) - -#define CT16_MR18IE_EN 1 //[24:24 Enable MR18 match interrupt -#define CT16_MR18IE_DIS 0 -#define mskCT16_MR18IE_EN (CT16_MR18IE_EN<<24) -#define mskCT16_MR18IE_DIS (CT16_MR18IE_DIS<<24) - -#define CT16_MR18RST_EN 1 //[25:25] Enable reset TC when MR18 matches TC. -#define CT16_MR18RST_DIS 0 -#define mskCT16_MR18RST_EN (CT16_MR18RST_EN<<25) -#define mskCT16_MR18RST_DIS (CT16_MR18RST_DIS<<25) - -#define CT16_MR18STOP_EN 1 //[26:26] Enable stop TC and clear CEN when MR18 matches TC. -#define CT16_MR18STOP_DIS 0 -#define mskCT16_MR18STOP_EN (CT16_MR18STOP_EN<<26) -#define mskCT16_MR18STOP_DIS (CT16_MR18STOP_DIS<<26) - -#define CT16_MR19IE_EN 1 //[27:27] Enable MR19 match interrupt -#define CT16_MR19IE_DIS 0 -#define mskCT16_MR19IE_EN (CT16_MR19IE_EN<<27) -#define mskCT16_MR19IE_DIS (CT16_MR19IE_DIS<<27) - -#define CT16_MR19RST_EN 1 //[28:28] Enable reset TC when MR19 matches TC. -#define CT16_MR19RST_DIS 0 -#define mskCT16_MR19RST_EN (CT16_MR19RST_EN<<28) -#define mskCT16_MR19RST_DIS (CT16_MR19RST_DIS<<28) - -#define CT16_MR19STOP_EN 1 //[29:29] Enable stop TC and clear CEN when MR19 matches TC. -#define CT16_MR19STOP_DIS 0 -#define mskCT16_MR19STOP_EN (CT16_MR19STOP_EN<<29) -#define mskCT16_MR19STOP_DIS (CT16_MR19STOP_DIS<<29) - -/* CT16Bn Match Control register 3 (0x1C) */ -#define CT16_MR20IE_EN 1 //[0:0] Enable MR20 match interrupt -#define CT16_MR20IE_DIS 0 -#define mskCT16_MR20IE_EN (CT16_MR20IE_EN<<0) -#define mskCT16_MR20IE_DIS (CT16_MR20IE_DIS<<0) - -#define CT16_MR20RST_EN 1 //[1:1] Enable reset TC when MR20 matches TC. -#define CT16_MR20RST_DIS 0 -#define mskCT16_MR20RST_EN (CT16_MR20RST_EN<<1) -#define mskCT16_MR20RST_DIS (CT16_MR20RST_DIS<<1) - -#define CT16_MR20STOP_EN 1 //[2:2] Enable stop TC and clear CEN when MR20 matches TC. -#define CT16_MR20STOP_DIS 0 -#define mskCT16_MR20STOP_EN (CT16_MR20STOP_EN<<2) -#define mskCT16_MR20STOP_DIS (CT16_MR20STOP_DIS<<2) - -#define CT16_MR21IE_EN 1 //[3:3] Enable MR21 match interrupt -#define CT16_MR21IE_DIS 0 -#define mskCT16_MR21IE_EN (CT16_MR21IE_EN<<3) -#define mskCT16_MR21IE_DIS (CT16_MR21IE_DIS<<3) - -#define CT16_MR21RST_EN 1 //[4:4] Enable reset TC when MR21 matches TC. -#define CT16_MR21RST_DIS 0 -#define mskCT16_MR21RST_EN (CT16_MR21RST_EN<<4) -#define mskCT16_MR21RST_DIS (CT16_MR21RST_DIS<<4) - -#define CT16_MR21STOP_EN 1 //[5:5] Enable stop TC and clear CEN when MR21 matches TC. -#define CT16_MR21STOP_DIS 0 -#define mskCT16_MR21STOP_EN (CT16_MR21STOP_EN<<5) -#define mskCT16_MR21STOP_DIS (CT16_MR21STOP_DIS<<5) - -#define CT16_MR22IE_EN 1 //[6:6] Enable MR22 match interrupt -#define CT16_MR22IE_DIS 0 -#define mskCT16_MR22IE_EN (CT16_MR22IE_EN<<6) -#define mskCT16_MR22IE_DIS (CT16_MR22IE_DIS<<6) - -#define CT16_MR22RST_EN 1 //[7:7] Enable reset TC when MR22 matches TC. -#define CT16_MR22RST_DIS 0 -#define mskCT16_MR22RST_EN (CT16_MR22RST_EN<<7) -#define mskCT16_MR22RST_DIS (CT16_MR22RST_DIS<<7) - -#define CT16_MR22STOP_EN 1 //[8:8] Enable stop TC and clear CEN when MR22 matches TC. -#define CT16_MR22STOP_DIS 0 -#define mskCT16_MR22STOP_EN (CT16_MR22STOP_EN<<8) -#define mskCT16_MR22STOP_DIS (CT16_MR22STOP_DIS<<8) - -#define CT16_MR23IE_EN 1 //[9:9] Enable MR23 match interrupt -#define CT16_MR23IE_DIS 0 -#define mskCT16_MR23IE_EN (CT16_MR23IE_EN<<9) -#define mskCT16_MR23IE_DIS (CT16_MR23IE_DIS<<9) - -#define CT16_MR23RST_EN 1 //[10:10] Enable reset TC when MR23 matches TC. -#define CT16_MR23RST_DIS 0 -#define mskCT16_MR23RST_EN (CT16_MR23RST_EN<<10) -#define mskCT16_MR23RST_DIS (CT16_MR23RST_DIS<<10) - -#define CT16_MR23STOP_EN 1 //[11:11] Enable stop TC and clear CEN when MR23 matches TC. -#define CT16_MR23STOP_DIS 0 -#define mskCT16_MR23STOP_EN (CT16_MR23STOP_EN<<11) -#define mskCT16_MR23STOP_DIS (CT16_MR23STOP_DIS<<11) - -#define CT16_MR24IE_EN 1 //[12:12] Enable MR24 match interrupt -#define CT16_MR24IE_DIS 0 -#define mskCT16_MR24IE_EN (CT16_MR24IE_EN<<12) -#define mskCT16_MR24IE_DIS (CT16_MR24IE_DIS<<12) - -#define CT16_MR24RST_EN 1 //[13:13] Enable reset TC when MR24 matches TC. -#define CT16_MR24RST_DIS 0 -#define mskCT16_MR24RST_EN (CT16_MR24RST_EN<<13) -#define mskCT16_MR24RST_DIS (CT16_MR24RST_DIS<<13) - -#define CT16_MR24STOP_EN 1 //[14:14] Enable stop TC and clear CEN when MR24 matches TC. -#define CT16_MR24STOP_DIS 0 -#define mskCT16_MR24STOP_EN (CT16_MR24STOP_EN<<14) -#define mskCT16_MR24STOP_DIS (CT16_MR24STOP_DIS<<14) - -/* CT16Bn Capture Control register (0x80) */ -#define CT16_CAP0RE_EN 1 //[0:0] Enable CAP0 capture on rising edge. -#define CT16_CAP0RE_DIS 0 -#define mskCT16_CAP0RE_EN (CT16_CAP0RE_EN<<0) -#define mskCT16_CAP0RE_DIS (CT16_CAP0RE_DIS<<0) - -#define CT16_CAP0FE_EN 1 //[1:1] Enable CAP0 capture on fallng edge. -#define CT16_CAP0FE_DIS 0 -#define mskCT16_CAP0FE_EN (CT16_CAP0FE_EN<<1) -#define mskCT16_CAP0FE_DIS (CT16_CAP0FE_DIS<<1) - -#define CT16_CAP0IE_EN 1 //[2:2] Enable CAP0 interrupt. -#define CT16_CAP0IE_DIS 0 -#define mskCT16_CAP0IE_EN (CT16_CAP0IE_EN<<2) -#define mskCT16_CAP0IE_DIS (CT16_CAP0IE_DIS<<2) - -#define CT16_CAP0EN_EN 1 //[3:3] Enable CAP0 function. -#define CT16_CAP0EN_DIS 0 -#define mskCT16_CAP0EN_EN (CT16_CAP0EN_EN<<3) -#define mskCT16_CAP0EN_DIS (CT16_CAP0EN_DIS<<3) - -/* CT16Bn External Match register (0x88) */ -#define CT16_EM0 1 //[0:0] CT16Bn PWM0 drive state -#define mskCT16_EM0 (CT16_EM0<<0) -#define CT16_EM1 1 //[1:1] CT16Bn PWM1 drive state -#define mskCT16_EM1 (CT16_EM1<<1) -#define CT16_EM2 1 //[2:2] CT16Bn PWM2 drive state -#define mskCT16_EM2 (CT16_EM2<<2) -#define CT16_EM3 1 //[3:3] CT16Bn PWM3 drive state -#define mskCT16_EM3 (CT16_EM3<<3) -#define CT16_EM4 1 //[4:4] CT16Bn PWM4 drive state -#define mskCT16_EM4 (CT16_EM4<<4) -#define CT16_EM5 1 //[5:5] CT16Bn PWM5 drive state -#define mskCT16_EM5 (CT16_EM5<<5) -#define CT16_EM6 1 //[6:6] CT16Bn PWM6 drive state -#define mskCT16_EM6 (CT16_EM6<<6) -#define CT16_EM7 1 //[7:7] CT16Bn PWM7 drive state -#define mskCT16_EM7 (CT16_EM7<<7) -#define CT16_EM8 1 //[8:8] CT16Bn PWM8 drive state -#define mskCT16_EM8 (CT16_EM8<<8) -#define CT16_EM9 1 //[9:9] CT16Bn PWM9 drive state -#define mskCT16_EM9 (CT16_EM9<<9) -#define CT16_EM10 1 //[10:10] CT16Bn PWM10 drive state -#define mskCT16_EM10 (CT16_EM0<<10) -#define CT16_EM11 1 //[11:11] CT16Bn PWM11 drive state -#define mskCT16_EM11 (CT16_EM11<<11) -#define CT16_EM12 1 //[12:12] CT16Bn PWM12 drive state -#define mskCT16_EM12 (CT16_EM12<<12) -#define CT16_EM13 1 //[13:13] CT16Bn PWM13 drive state -#define mskCT16_EM13 (CT16_EM13<<13) -#define CT16_EM14 1 //[14:14] CT16Bn PWM14 drive state -#define mskCT16_EM14 (CT16_EM14<<14) -#define CT16_EM15 1 //[15:15] CT16Bn PWM15 drive state -#define mskCT16_EM15 (CT16_EM15<<15) -#define CT16_EM16 1 //[16:16] CT16Bn PWM16 drive state -#define mskCT16_EM16 (CT16_EM16<<16) -#define CT16_EM17 1 //[17:17] CT16Bn PWM17 drive state -#define mskCT16_EM17 (CT16_EM17<<17) -#define CT16_EM18 1 //[18:18] CT16Bn PWM18 drive state -#define mskCT16_EM18 (CT16_EM18<<8) -#define CT16_EM19 1 //[19:19] CT16Bn PWM19 drive state -#define mskCT16_EM19 (CT16_EM19<<19) -#define CT16_EM20 1 //[20:20] CT16Bn PWM20 drive state -#define mskCT16_EM20 (CT16_EM20<<20) -#define CT16_EM21 1 //[21:21] CT16Bn PWM21 drive state -#define mskCT16_EM21 (CT16_EM21<<21) -#define CT16_EM22 1 //[22:22] CT16Bn PWM22 drive state -#define mskCT16_EM22 (CT16_EM22<<22) -#define CT16_EM23 1 //[23:23] CT16Bn PWM23 drive state -#define mskCT16_EM23 (CT16_EM23<<23) - -/* CT16Bn External Match Control register (0x8C) */ - //[1:0]CT16Bn PWM0 functionality -#define CT16_EMC0_DO_NOTHING 0 //Do nothing. -#define CT16_EMC0_LOW 1 //CT16Bn PWM0 pin is low. -#define CT16_EMC0_HIGH 2 //CT16Bn PWM0 pin is high. -#define CT16_EMC0_TOGGLE 3 //Toggle CT16Bn PWM0 pin. -#define mskCT16_EMC0_DO_NOTHING (CT16_EMC0_LOW<<0) -#define mskCT16_EMC0_LOW (CT16_EMC0_LOW<<0) -#define mskCT16_EMC0_HIGH (CT16_EMC0_HIGH<<0) -#define mskCT16_EMC0_TOGGLE (CT16_EMC0_TOGGLE<<0) - - //[3:2]CT16Bn PWM1 functionality -#define CT16_EMC1_DO_NOTHING 0 //Do nothing. -#define CT16_EMC1_LOW 1 //CT16Bn PWM1 pin is low. -#define CT16_EMC1_HIGH 2 //CT16Bn PWM1 pin is high. -#define CT16_EMC1_TOGGLE 3 //Toggle CT16Bn PWM1 pin. -#define mskCT16_EMC1_DO_NOTHING (CT16_EMC1_LOW<<2) -#define mskCT16_EMC1_LOW (CT16_EMC1_LOW<<2) -#define mskCT16_EMC1_HIGH (CT16_EMC1_HIGH<<2) -#define mskCT16_EMC1_TOGGLE (CT16_EMC1_TOGGLE<<2) - - //[5:4]CT16Bn PWM2 functionality -#define CT16_EMC2_DO_NOTHING 0 //Do nothing. -#define CT16_EMC2_LOW 1 //CT16Bn PWM2 pin is low. -#define CT16_EMC2_HIGH 2 //CT16Bn PWM2 pin is high. -#define CT16_EMC2_TOGGLE 3 //Toggle CT16Bn PWM2 pin. -#define mskCT16_EMC2_DO_NOTHING (CT16_EMC2_LOW<<4) -#define mskCT16_EMC2_LOW (CT16_EMC2_LOW<<4) -#define mskCT16_EMC2_HIGH (CT16_EMC2_HIGH<<4) -#define mskCT16_EMC2_TOGGLE (CT16_EMC2_TOGGLE<<4) - - //[7:6]CT16Bn PWM3 functionality -#define CT16_EMC3_DO_NOTHING 0 //Do nothing. -#define CT16_EMC3_LOW 1 //CT16Bn PWM3 pin is low. -#define CT16_EMC3_HIGH 2 //CT16Bn PWM3 pin is high. -#define CT16_EMC3_TOGGLE 3 //Toggle CT16Bn PWM3 pin. -#define mskCT16_EMC3_DO_NOTHING (CT16_EMC3_LOW<<6) -#define mskCT16_EMC3_LOW (CT16_EMC3_LOW<<6) -#define mskCT16_EMC3_HIGH (CT16_EMC3_HIGH<<6) -#define mskCT16_EMC3_TOGGLE (CT16_EMC3_TOGGLE<<6) - - //[9:8]CT16Bn PWM4 functionality -#define CT16_EMC4_DO_NOTHING 0 //Do nothing. -#define CT16_EMC4_LOW 1 //CT16Bn PWM4 pin is low. -#define CT16_EMC4_HIGH 2 //CT16Bn PWM4 pin is high. -#define CT16_EMC4_TOGGLE 3 //Toggle CT16Bn PWM4 pin. -#define mskCT16_EMC4_DO_NOTHING (CT16_EMC4_LOW<<8) -#define mskCT16_EMC4_LOW (CT16_EMC4_LOW<<8) -#define mskCT16_EMC4_HIGH (CT16_EMC4_HIGH<<8) -#define mskCT16_EMC4_TOGGLE (CT16_EMC4_TOGGLE<<8) - - //[11:10]CT16Bn PWM5 functionality -#define CT16_EMC5_DO_NOTHING 0 //Do nothing. -#define CT16_EMC5_LOW 1 //CT16Bn PWM5 pin is low. -#define CT16_EMC5_HIGH 2 //CT16Bn PWM5 pin is high. -#define CT16_EMC5_TOGGLE 3 //Toggle CT16Bn PWM5 pin. -#define mskCT16_EMC5_DO_NOTHING (CT16_EMC5_LOW<<10) -#define mskCT16_EMC5_LOW (CT16_EMC5_LOW<<10) -#define mskCT16_EMC5_HIGH (CT16_EMC5_HIGH<<10) -#define mskCT16_EMC5_TOGGLE (CT16_EMC5_TOGGLE<<10) - - //[13:12]CT16Bn PWM6 functionality -#define CT16_EMC6_DO_NOTHING 0 //Do nothing. -#define CT16_EMC6_LOW 1 //CT16Bn PWM6 pin is low. -#define CT16_EMC6_HIGH 2 //CT16Bn PWM6 pin is high. -#define CT16_EMC6_TOGGLE 3 //Toggle CT16Bn PWM6 pin. -#define mskCT16_EMC6_DO_NOTHING (CT16_EMC6_LOW<<12) -#define mskCT16_EMC6_LOW (CT16_EMC6_LOW<<12) -#define mskCT16_EMC6_HIGH (CT16_EMC6_HIGH<<12) -#define mskCT16_EMC6_TOGGLE (CT16_EMC6_TOGGLE<<12) - - //[15:14]CT16Bn PWM7 functionality -#define CT16_EMC7_DO_NOTHING 0 //Do nothing. -#define CT16_EMC7_LOW 1 //CT16Bn PWM7 pin is low. -#define CT16_EMC7_HIGH 2 //CT16Bn PWM7 pin is high. -#define CT16_EMC7_TOGGLE 3 //Toggle CT16Bn PWM7 pin. -#define mskCT16_EMC7_DO_NOTHING (CT16_EMC7_LOW<<14) -#define mskCT16_EMC7_LOW (CT16_EMC7_LOW<<14) -#define mskCT16_EMC7_HIGH (CT16_EMC7_HIGH<<14) -#define mskCT16_EMC7_TOGGLE (CT16_EMC7_TOGGLE<<14) - - //[17:16]CT16Bn PWM8 functionality -#define CT16_EMC8_DO_NOTHING 0 //Do nothing. -#define CT16_EMC8_LOW 1 //CT16Bn PWM8 pin is low. -#define CT16_EMC8_HIGH 2 //CT16Bn PWM8 pin is high. -#define CT16_EMC8_TOGGLE 3 //Toggle CT16Bn PWM8 pin. -#define mskCT16_EMC8_DO_NOTHING (CT16_EMC8_LOW<<16) -#define mskCT16_EMC8_LOW (CT16_EMC8_LOW<<16) -#define mskCT16_EMC8_HIGH (CT16_EMC8_HIGH<<16) -#define mskCT16_EMC8_TOGGLE (CT16_EMC8_TOGGLE<<16) - - //[19:18]CT16Bn PWM9 functionality -#define CT16_EMC9_DO_NOTHING 0 //Do nothing. -#define CT16_EMC9_LOW 1 //CT16Bn PWM9 pin is low. -#define CT16_EMC9_HIGH 2 //CT16Bn PWM9 pin is high. -#define CT16_EMC9_TOGGLE 3 //Toggle CT16Bn PWM9 pin. -#define mskCT16_EMC9_DO_NOTHING (CT16_EMC9_LOW<<18) -#define mskCT16_EMC9_LOW (CT16_EMC9_LOW<<18) -#define mskCT16_EMC9_HIGH (CT16_EMC9_HIGH<<18) -#define mskCT16_EMC9_TOGGLE (CT16_EMC9_TOGGLE<<18) - - //[21:20]CT16Bn PWM10 functionality -#define CT16_EMC10_DO_NOTHING 0 //Do nothing. -#define CT16_EMC10_LOW 1 //CT16Bn PWM10 pin is low. -#define CT16_EMC10_HIGH 2 //CT16Bn PWM10 pin is high. -#define CT16_EMC10_TOGGLE 3 //Toggle CT16Bn PWM10 pin. -#define mskCT16_EMC10_DO_NOTHING (CT16_EMC10_LOW<<20) -#define mskCT16_EMC10_LOW (CT16_EMC10_LOW<<20) -#define mskCT16_EMC10_HIGH (CT16_EMC10_HIGH<<20) -#define mskCT16_EMC10_TOGGLE (CT16_EMC10_TOGGLE<<20) - - //[23:22]CT16Bn PWM11 functionality -#define CT16_EMC11_DO_NOTHING 0 //Do nothing. -#define CT16_EMC11_LOW 1 //CT16Bn PWM11 pin is low. -#define CT16_EMC11_HIGH 2 //CT16Bn PWM11 pin is high. -#define CT16_EMC11_TOGGLE 3 //Toggle CT16Bn PWM11 pin. -#define mskCT16_EMC11_DO_NOTHING (CT16_EMC11_LOW<<22) -#define mskCT16_EMC11_LOW (CT16_EMC11_LOW<<22) -#define mskCT16_EMC11_HIGH (CT16_EMC11_HIGH<<22) -#define mskCT16_EMC11_TOGGLE (CT16_EMC11_TOGGLE<<22) - - //[25:24]CT16Bn PWM12 functionality -#define CT16_EMC12_DO_NOTHING 0 //Do nothing. -#define CT16_EMC12_LOW 1 //CT16Bn PWM12 pin is low. -#define CT16_EMC12_HIGH 2 //CT16Bn PWM12 pin is high. -#define CT16_EMC12_TOGGLE 3 //Toggle CT16Bn PWM12 pin. -#define mskCT16_EMC12_DO_NOTHING (CT16_EMC12_LOW<<24) -#define mskCT16_EMC12_LOW (CT16_EMC12_LOW<<24) -#define mskCT16_EMC12_HIGH (CT16_EMC12_HIGH<<24) -#define mskCT16_EMC12_TOGGLE (CT16_EMC12_TOGGLE<<24) - - //[27:26]CT16Bn PWM13 functionality -#define CT16_EMC13_DO_NOTHING 0 //Do nothing. -#define CT16_EMC13_LOW 1 //CT16Bn PWM13 pin is low. -#define CT16_EMC13_HIGH 2 //CT16Bn PWM13 pin is high. -#define CT16_EMC13_TOGGLE 3 //Toggle CT16Bn PWM13 pin. -#define mskCT16_EMC13_DO_NOTHING (CT16_EMC13_LOW<<26) -#define mskCT16_EMC13_LOW (CT16_EMC13_LOW<<26) -#define mskCT16_EMC13_HIGH (CT16_EMC13_HIGH<<26) -#define mskCT16_EMC13_TOGGLE (CT16_EMC13_TOGGLE<<26) - - //[29:28]CT16Bn PWM14 functionality -#define CT16_EMC14_DO_NOTHING 0 //Do nothing. -#define CT16_EMC14_LOW 1 //CT16Bn PWM14 pin is low. -#define CT16_EMC14_HIGH 2 //CT16Bn PWM14 pin is high. -#define CT16_EMC14_TOGGLE 3 //Toggle CT16Bn PWM14 pin. -#define mskCT16_EMC14_DO_NOTHING (CT16_EMC14_LOW<<28) -#define mskCT16_EMC14_LOW (CT16_EMC14_LOW<<28) -#define mskCT16_EMC14_HIGH (CT16_EMC14_HIGH<<28) -#define mskCT16_EMC14_TOGGLE (CT16_EMC14_TOGGLE<<28) - - //[31:30]CT16Bn PWM15 functionality -#define CT16_EMC15_DO_NOTHING 0 //Do nothing. -#define CT16_EMC15_LOW 1 //CT16Bn PWM15 pin is low. -#define CT16_EMC15_HIGH 2 //CT16Bn PWM15 pin is high. -#define CT16_EMC15_TOGGLE 3 //Toggle CT16Bn PWM15 pin. -#define mskCT16_EMC15_DO_NOTHING (CT16_EMC15_LOW<<30) -#define mskCT16_EMC15_LOW (CT16_EMC15_LOW<<30) -#define mskCT16_EMC15_HIGH (CT16_EMC15_HIGH<<30) -#define mskCT16_EMC15_TOGGLE (CT16_EMC15_TOGGLE<<30) - -/* CT16Bn External Match Control register2 (0x90) */ - //[1:0]CT16Bn PWM16 functionality -#define CT16_EMC16_DO_NOTHING 0 //Do nothing. -#define CT16_EMC16_LOW 1 //CT16Bn PWM16 pin is low. -#define CT16_EMC16_HIGH 2 //CT16Bn PWM16 pin is high. -#define CT16_EMC16_TOGGLE 3 //Toggle CT16Bn PWM16 pin. -#define mskCT16_EMC16_DO_NOTHING (CT16_EMC16_LOW<<0) -#define mskCT16_EMC16_LOW (CT16_EMC16_LOW<<0) -#define mskCT16_EMC16_HIGH (CT16_EMC16_HIGH<<0) -#define mskCT16_EMC16_TOGGLE (CT16_EMC16_TOGGLE<<0) - - //[3:2]CT16Bn PWM17 functionality -#define CT16_EMC17_DO_NOTHING 0 //Do nothing. -#define CT16_EMC17_LOW 1 //CT16Bn PWM17 pin is low. -#define CT16_EMC17_HIGH 2 //CT16Bn PWM17 pin is high. -#define CT16_EMC17_TOGGLE 3 //Toggle CT16Bn PWM17 pin. -#define mskCT16_EMC17_DO_NOTHING (CT16_EMC17_LOW<<2) -#define mskCT16_EMC17_LOW (CT16_EMC17_LOW<<2) -#define mskCT16_EMC17_HIGH (CT16_EMC17_HIGH<<2) -#define mskCT16_EMC17_TOGGLE (CT16_EMC17_TOGGLE<<2) - - //[5:4]CT16Bn PWM18 functionality -#define CT16_EMC18_DO_NOTHING 0 //Do nothing. -#define CT16_EMC18_LOW 1 //CT16Bn PWM18 pin is low. -#define CT16_EMC18_HIGH 2 //CT16Bn PWM18 pin is high. -#define CT16_EMC18_TOGGLE 3 //Toggle CT16Bn PWM18 pin. -#define mskCT16_EMC18_DO_NOTHING (CT16_EMC18_LOW<<4) -#define mskCT16_EMC18_LOW (CT16_EMC18_LOW<<4) -#define mskCT16_EMC18_HIGH (CT16_EMC18_HIGH<<4) -#define mskCT16_EMC18_TOGGLE (CT16_EMC18_TOGGLE<<4) - - //[7:6]CT16Bn PWM19 functionality -#define CT16_EMC19_DO_NOTHING 0 //Do nothing. -#define CT16_EMC19_LOW 1 //CT16Bn PWM19 pin is low. -#define CT16_EMC19_HIGH 2 //CT16Bn PWM19 pin is high. -#define CT16_EMC19_TOGGLE 3 //Toggle CT16Bn PWM19 pin. -#define mskCT16_EMC19_DO_NOTHING (CT16_EMC19_LOW<<6) -#define mskCT16_EMC19_LOW (CT16_EMC19_LOW<<6) -#define mskCT16_EMC19_HIGH (CT16_EMC19_HIGH<<6) -#define mskCT16_EMC19_TOGGLE (CT16_EMC19_TOGGLE<<6) - - //[9:8]CT16Bn PWM20 functionality -#define CT16_EMC20_DO_NOTHING 0 //Do nothing. -#define CT16_EMC20_LOW 1 //CT16Bn PWM20 pin is low. -#define CT16_EMC20_HIGH 2 //CT16Bn PWM20 pin is high. -#define CT16_EMC20_TOGGLE 3 //Toggle CT16Bn PWM20 pin. -#define mskCT16_EMC20_DO_NOTHING (CT16_EMC20_LOW<<8) -#define mskCT16_EMC20_LOW (CT16_EMC20_LOW<<8) -#define mskCT16_EMC20_HIGH (CT16_EMC20_HIGH<<8) -#define mskCT16_EMC20_TOGGLE (CT16_EMC20_TOGGLE<<8) - - //[11:10]CT16Bn PWM21 functionality -#define CT16_EMC21_DO_NOTHING 0 //Do nothing. -#define CT16_EMC21_LOW 1 //CT16Bn PWM21 pin is low. -#define CT16_EMC21_HIGH 2 //CT16Bn PWM21 pin is high. -#define CT16_EMC21_TOGGLE 3 //Toggle CT16Bn PWM21 pin. -#define mskCT16_EMC21_DO_NOTHING (CT16_EMC21_LOW<<10) -#define mskCT16_EMC21_LOW (CT16_EMC21_LOW<<10) -#define mskCT16_EMC21_HIGH (CT16_EMC21_HIGH<<10) -#define mskCT16_EMC21_TOGGLE (CT16_EMC21_TOGGLE<<10) - - //[13:12]CT16Bn PWM22 functionality -#define CT16_EMC22_DO_NOTHING 0 //Do nothing. -#define CT16_EMC22_LOW 1 //CT16Bn PWM22 pin is low. -#define CT16_EMC22_HIGH 2 //CT16Bn PWM22 pin is high. -#define CT16_EMC22_TOGGLE 3 //Toggle CT16Bn PWM22 pin. -#define mskCT16_EMC22_DO_NOTHING (CT16_EMC22_LOW<<12) -#define mskCT16_EMC22_LOW (CT16_EMC22_LOW<<12) -#define mskCT16_EMC22_HIGH (CT16_EMC22_HIGH<<12) -#define mskCT16_EMC22_TOGGLE (CT16_EMC22_TOGGLE<<12) - - //[15:14]CT16Bn PWM23 functionality -#define CT16_EMC23_DO_NOTHING 0 //Do nothing. -#define CT16_EMC23_LOW 1 //CT16Bn PWM23 pin is low. -#define CT16_EMC23_HIGH 2 //CT16Bn PWM23 pin is high. -#define CT16_EMC23_TOGGLE 3 //Toggle CT16Bn PWM23 pin. -#define mskCT16_EMC23_DO_NOTHING (CT16_EMC23_LOW<<14) -#define mskCT16_EMC23_LOW (CT16_EMC23_LOW<<14) -#define mskCT16_EMC23_HIGH (CT16_EMC23_HIGH<<14) -#define mskCT16_EMC23_TOGGLE (CT16_EMC23_TOGGLE<<14) - -/* CT16Bn PWM Control register (0x94) */ - //[1:0] CT16Bn PWM0 output mode. -#define CT16_PWM0MODE_1 0 // PWM mode 1. -#define CT16_PWM0MODE_2 1 // PWM mode 2. -#define CT16_PWM0MODE_FORCE_0 2 // Force 0. -#define CT16_PWM0MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM0MODE_1 (CT16_PWM0MODE_1<<0) -#define mskCT16_PWM0MODE_2 (CT16_PWM0MODE_2<<0) -#define mskCT16_PWM0MODE_FORCE_0 (CT16_PWM0MODE_FORCE_0<<0) -#define mskCT16_PWM0MODE_FORCE_1 (CT16_PWM0MODE_FORCE_1<<0) - - //[3:2] CT16Bn PWM1 output mode. -#define CT16_PWM1MODE_1 0 // PWM mode 1. -#define CT16_PWM1MODE_2 1 // PWM mode 2. -#define CT16_PWM1MODE_FORCE_0 2 // Force 0. -#define CT16_PWM1MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM1MODE_1 (CT16_PWM1MODE_1<<2) -#define mskCT16_PWM1MODE_2 (CT16_PWM1MODE_2<<2) -#define mskCT16_PWM1MODE_FORCE_0 (CT16_PWM1MODE_FORCE_0<<2) -#define mskCT16_PWM1MODE_FORCE_1 (CT16_PWM1MODE_FORCE_1<<2) - - //[5:4] CT16Bn PWM2 output mode. -#define CT16_PWM2MODE_1 0 // PWM mode 1. -#define CT16_PWM2MODE_2 1 // PWM mode 2. -#define CT16_PWM2MODE_FORCE_0 2 // Force 0. -#define CT16_PWM2MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM2MODE_1 (CT16_PWM2MODE_1<<4) -#define mskCT16_PWM2MODE_2 (CT16_PWM2MODE_2<<4) -#define mskCT16_PWM2MODE_FORCE_0 (CT16_PWM2MODE_FORCE_0<<4) -#define mskCT16_PWM2MODE_FORCE_1 (CT16_PWM2MODE_FORCE_1<<4) - - //[7:6] CT16Bn PWM3 output mode. -#define CT16_PWM3MODE_1 0 // PWM mode 1. -#define CT16_PWM3MODE_2 1 // PWM mode 2. -#define CT16_PWM3MODE_FORCE_0 2 // Force 0. -#define CT16_PWM3MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM3MODE_1 (CT16_PWM3MODE_1<<6) -#define mskCT16_PWM3MODE_2 (CT16_PWM3MODE_2<<6) -#define mskCT16_PWM3MODE_FORCE_0 (CT16_PWM3MODE_FORCE_0<<6) -#define mskCT16_PWM3MODE_FORCE_1 (CT16_PWM3MODE_FORCE_1<<6) - - //[9:8] CT16Bn PWM4 output mode. -#define CT16_PWM4MODE_1 0 // PWM mode 1. -#define CT16_PWM4MODE_2 1 // PWM mode 2. -#define CT16_PWM4MODE_FORCE_0 2 // Force 0. -#define CT16_PWM4MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM4MODE_1 (CT16_PWM4MODE_1<<8) -#define mskCT16_PWM4MODE_2 (CT16_PWM4MODE_2<<8) -#define mskCT16_PWM4MODE_FORCE_0 (CT16_PWM4MODE_FORCE_0<<8) -#define mskCT16_PWM4MODE_FORCE_1 (CT16_PWM4MODE_FORCE_1<<8) - - //[11:10] CT16Bn PWM5 output mode. -#define CT16_PWM5MODE_1 0 // PWM mode 1. -#define CT16_PWM5MODE_2 1 // PWM mode 2. -#define CT16_PWM5MODE_FORCE_0 2 // Force 0. -#define CT16_PWM5MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM5MODE_1 (CT16_PWM5MODE_1<<10) -#define mskCT16_PWM5MODE_2 (CT16_PWM5MODE_2<<10) -#define mskCT16_PWM5MODE_FORCE_0 (CT16_PWM5MODE_FORCE_0<<10) -#define mskCT16_PWM5MODE_FORCE_1 (CT16_PWM5MODE_FORCE_1<<10) - - //[13:12] CT16Bn PWM6 output mode. -#define CT16_PWM6MODE_1 0 // PWM mode 1. -#define CT16_PWM6MODE_2 1 // PWM mode 2. -#define CT16_PWM6MODE_FORCE_0 2 // Force 0. -#define CT16_PWM6MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM6MODE_1 (CT16_PWM6MODE_1<<12) -#define mskCT16_PWM6MODE_2 (CT16_PWM6MODE_2<<12) -#define mskCT16_PWM6MODE_FORCE_0 (CT16_PWM6MODE_FORCE_0<<12) -#define mskCT16_PWM6MODE_FORCE_1 (CT16_PWM6MODE_FORCE_1<<12) - - //[15:14] CT16Bn PWM7 output mode. -#define CT16_PWM7MODE_1 0 // PWM mode 1. -#define CT16_PWM7MODE_2 1 // PWM mode 2. -#define CT16_PWM7MODE_FORCE_0 2 // Force 0. -#define CT16_PWM7MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM7MODE_1 (CT16_PWM7MODE_1<<14) -#define mskCT16_PWM7MODE_2 (CT16_PWM7MODE_2<<14) -#define mskCT16_PWM7MODE_FORCE_0 (CT16_PWM7MODE_FORCE_0<<14) -#define mskCT16_PWM7MODE_FORCE_1 (CT16_PWM7MODE_FORCE_1<<14) - - //[17:16] CT16Bn PWM8 output mode. -#define CT16_PWM8MODE_1 0 // PWM mode 1. -#define CT16_PWM8MODE_2 1 // PWM mode 2. -#define CT16_PWM8MODE_FORCE_0 2 // Force 0. -#define CT16_PWM8MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM8MODE_1 (CT16_PWM8MODE_1<<16) -#define mskCT16_PWM8MODE_2 (CT16_PWM8MODE_2<<16) -#define mskCT16_PWM8MODE_FORCE_0 (CT16_PWM8MODE_FORCE_0<<16) -#define mskCT16_PWM8MODE_FORCE_1 (CT16_PWM8MODE_FORCE_1<<16) - - //[19:18] CT16Bn PWM9 output mode. -#define CT16_PWM9MODE_1 0 // PWM mode 1. -#define CT16_PWM9MODE_2 1 // PWM mode 2. -#define CT16_PWM9MODE_FORCE_0 2 // Force 0. -#define CT16_PWM9MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM9MODE_1 (CT16_PWM9MODE_1<<18) -#define mskCT16_PWM9MODE_2 (CT16_PWM9MODE_2<<18) -#define mskCT16_PWM9MODE_FORCE_0 (CT16_PWM9MODE_FORCE_0<<18) -#define mskCT16_PWM9MODE_FORCE_1 (CT16_PWM9MODE_FORCE_1<<18) - - //[21:20] CT16Bn PWM10 output mode. -#define CT16_PWM10MODE_1 0 // PWM mode 1. -#define CT16_PWM10MODE_2 1 // PWM mode 2. -#define CT16_PWM10MODE_FORCE_0 2 // Force 0. -#define CT16_PWM10MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM10MODE_1 (CT16_PWM10MODE_1<<20) -#define mskCT16_PWM10MODE_2 (CT16_PWM10MODE_2<<20) -#define mskCT16_PWM10MODE_FORCE_0 (CT16_PWM10MODE_FORCE_0<<20) -#define mskCT16_PWM10MODE_FORCE_1 (CT16_PWM10MODE_FORCE_1<<20) - - //[23:22] CT16Bn PWM11 output mode. -#define CT16_PWM11MODE_1 0 // PWM mode 1. -#define CT16_PWM11MODE_2 1 // PWM mode 2. -#define CT16_PWM11MODE_FORCE_0 2 // Force 0. -#define CT16_PWM11MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM11MODE_1 (CT16_PWM11MODE_1<<22) -#define mskCT16_PWM11MODE_2 (CT16_PWM11MODE_2<<22) -#define mskCT16_PWM11MODE_FORCE_0 (CT16_PWM11MODE_FORCE_0<<22) -#define mskCT16_PWM11MODE_FORCE_1 (CT16_PWM11MODE_FORCE_1<<22) - - //[25:24] CT16Bn PWM12 output mode. -#define CT16_PWM12MODE_1 0 // PWM mode 1. -#define CT16_PWM12MODE_2 1 // PWM mode 2. -#define CT16_PWM12MODE_FORCE_0 2 // Force 0. -#define CT16_PWM12MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM12MODE_1 (CT16_PWM12MODE_1<<24) -#define mskCT16_PWM12MODE_2 (CT16_PWM12MODE_2<<24) -#define mskCT16_PWM12MODE_FORCE_0 (CT16_PWM12MODE_FORCE_0<<24) -#define mskCT16_PWM12MODE_FORCE_1 (CT16_PWM12MODE_FORCE_1<<24) - - //[27:26] CT16Bn PWM13 output mode. -#define CT16_PWM13MODE_1 0 // PWM mode 1. -#define CT16_PWM13MODE_2 1 // PWM mode 2. -#define CT16_PWM13MODE_FORCE_0 2 // Force 0. -#define CT16_PWM13MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM13MODE_1 (CT16_PWM13MODE_1<<26) -#define mskCT16_PWM13MODE_2 (CT16_PWM13MODE_2<<26) -#define mskCT16_PWM13MODE_FORCE_0 (CT16_PWM13MODE_FORCE_0<<26) -#define mskCT16_PWM13MODE_FORCE_1 (CT16_PWM13MODE_FORCE_1<<26) - - //[29:28] CT16Bn PWM14 output mode. -#define CT16_PWM14MODE_1 0 // PWM mode 1. -#define CT16_PWM14MODE_2 1 // PWM mode 2. -#define CT16_PWM14MODE_FORCE_0 2 // Force 0. -#define CT16_PWM14MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM14MODE_1 (CT16_PWM14MODE_1<<28) -#define mskCT16_PWM14MODE_2 (CT16_PWM14MODE_2<<28) -#define mskCT16_PWM14MODE_FORCE_0 (CT16_PWM14MODE_FORCE_0<<28) -#define mskCT16_PWM14MODE_FORCE_1 (CT16_PWM14MODE_FORCE_1<<28) - - //[31:30] CT16Bn PWM15 output mode. -#define CT16_PWM15MODE_1 0 // PWM mode 1. -#define CT16_PWM15MODE_2 1 // PWM mode 2. -#define CT16_PWM15MODE_FORCE_0 2 // Force 0. -#define CT16_PWM15MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM15MODE_1 (CT16_PWM15MODE_1<<30) -#define mskCT16_PWM15MODE_2 (CT16_PWM15MODE_2<<30) -#define mskCT16_PWM15MODE_FORCE_0 (CT16_PWM15MODE_FORCE_0<<30) -#define mskCT16_PWM15MODE_FORCE_1 (CT16_PWM15MODE_FORCE_1<<30) - -/* CT16Bn PWM Control register (0x98) */ - //[1:0] CT16Bn PWM16 output mode. -#define CT16_PWM16MODE_1 0 // PWM mode 1. -#define CT16_PWM16MODE_2 1 // PWM mode 2. -#define CT16_PWM16MODE_FORCE_0 2 // Force 0. -#define CT16_PWM16MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM16MODE_1 (CT16_PWM16MODE_1<<0) -#define mskCT16_PWM16MODE_2 (CT16_PWM16MODE_2<<0) -#define mskCT16_PWM16MODE_FORCE_0 (CT16_PWM16MODE_FORCE_0<<0) -#define mskCT16_PWM16MODE_FORCE_1 (CT16_PWM16MODE_FORCE_1<<0) - - //[3:2] CT16Bn PWM17 output mode. -#define CT16_PWM17MODE_1 0 // PWM mode 1. -#define CT16_PWM17MODE_2 1 // PWM mode 2. -#define CT16_PWM17MODE_FORCE_0 2 // Force 0. -#define CT16_PWM17MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM17MODE_1 (CT16_PWM17MODE_1<<2) -#define mskCT16_PWM17MODE_2 (CT16_PWM17MODE_2<<2) -#define mskCT16_PWM17MODE_FORCE_0 (CT16_PWM17MODE_FORCE_0<<2) -#define mskCT16_PWM17MODE_FORCE_1 (CT16_PWM17MODE_FORCE_1<<2) - - //[5:4] CT16Bn PWM18 output mode. -#define CT16_PWM18MODE_1 0 // PWM mode 1. -#define CT16_PWM18MODE_2 1 // PWM mode 2. -#define CT16_PWM18MODE_FORCE_0 2 // Force 0. -#define CT16_PWM18MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM18MODE_1 (CT16_PWM18MODE_1<<4) -#define mskCT16_PWM18MODE_2 (CT16_PWM18MODE_2<<4) -#define mskCT16_PWM18MODE_FORCE_0 (CT16_PWM18MODE_FORCE_0<<4) -#define mskCT16_PWM18MODE_FORCE_1 (CT16_PWM18MODE_FORCE_1<<4) - - //[7:6] CT16Bn PWM19 output mode. -#define CT16_PWM19MODE_1 0 // PWM mode 1. -#define CT16_PWM19MODE_2 1 // PWM mode 2. -#define CT16_PWM19MODE_FORCE_0 2 // Force 0. -#define CT16_PWM19MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM19MODE_1 (CT16_PWM19MODE_1<<6) -#define mskCT16_PWM19MODE_2 (CT16_PWM19MODE_2<<6) -#define mskCT16_PWM19MODE_FORCE_0 (CT16_PWM19MODE_FORCE_0<<6) -#define mskCT16_PWM19MODE_FORCE_1 (CT16_PWM19MODE_FORCE_1<<6) - - //[9:8] CT16Bn PWM20 output mode. -#define CT16_PWM20MODE_1 0 // PWM mode 1. -#define CT16_PWM20MODE_2 1 // PWM mode 2. -#define CT16_PWM20MODE_FORCE_0 2 // Force 0. -#define CT16_PWM20MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM20MODE_1 (CT16_PWM20MODE_1<<8) -#define mskCT16_PWM20MODE_2 (CT16_PWM20MODE_2<<8) -#define mskCT16_PWM20MODE_FORCE_0 (CT16_PWM20MODE_FORCE_0<<8) -#define mskCT16_PWM20MODE_FORCE_1 (CT16_PWM20MODE_FORCE_1<<8) - - //[11:10] CT16Bn PWM21 output mode. -#define CT16_PWM21MODE_1 0 // PWM mode 1. -#define CT16_PWM21MODE_2 1 // PWM mode 2. -#define CT16_PWM21MODE_FORCE_0 2 // Force 0. -#define CT16_PWM21MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM21MODE_1 (CT16_PWM21MODE_1<<10) -#define mskCT16_PWM21MODE_2 (CT16_PWM21MODE_2<<10) -#define mskCT16_PWM21MODE_FORCE_0 (CT16_PWM21MODE_FORCE_0<<10) -#define mskCT16_PWM21MODE_FORCE_1 (CT16_PWM21MODE_FORCE_1<<10) - - //[13:12] CT16Bn PWM22 output mode. -#define CT16_PWM22MODE_1 0 // PWM mode 1. -#define CT16_PWM22MODE_2 1 // PWM mode 2. -#define CT16_PWM22MODE_FORCE_0 2 // Force 0. -#define CT16_PWM22MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM22MODE_1 (CT16_PWM22MODE_1<<12) -#define mskCT16_PWM22MODE_2 (CT16_PWM22MODE_2<<12) -#define mskCT16_PWM22MODE_FORCE_0 (CT16_PWM22MODE_FORCE_0<<12) -#define mskCT16_PWM22MODE_FORCE_1 (CT16_PWM22MODE_FORCE_1<<12) - - //[15:14] CT16Bn PWM23 output mode. -#define CT16_PWM23MODE_1 0 // PWM mode 1. -#define CT16_PWM23MODE_2 1 // PWM mode 2. -#define CT16_PWM23MODE_FORCE_0 2 // Force 0. -#define CT16_PWM23MODE_FORCE_1 3 // Force 1. -#define mskCT16_PWM23MODE_1 (CT16_PWM23MODE_1<<14) -#define mskCT16_PWM23MODE_2 (CT16_PWM23MODE_2<<14) -#define mskCT16_PWM23MODE_FORCE_0 (CT16_PWM23MODE_FORCE_0<<14) -#define mskCT16_PWM23MODE_FORCE_1 (CT16_PWM23MODE_FORCE_1<<14) - -/* CT16Bn PWM Enable register (0x9C) */ - //[0:0] CT16Bn PWM0 enable. -#define CT16_PWM0EN_EN 1 // CT16Bn PWM0 is enabled for PWM mode. -#define CT16_PWM0EN_EM0 0 // CT16Bn PWM0 is controlled by EM0. -#define mskCT16_PWM0EN_EN (CT16_PWM0EN_EN<<0) -#define mskCT16_PWM0EN_EM0 (CT16_PWM0EN_EM0<<0) - - //[1:1] CT16Bn PWM1 enable. -#define CT16_PWM1EN_EN 1 // CT16Bn PWM1 is enabled for PWM mode. -#define CT16_PWM1EN_EM1 0 // CT16Bn PWM1 is controlled by EM1. -#define mskCT16_PWM1EN_EN (CT16_PWM1EN_EN<<1) -#define mskCT16_PWM1EN_EM1 (CT16_PWM1EN_EM1<<1) - - //[2:2] CT16Bn PWM2 enable. -#define CT16_PWM2EN_EN 1 // CT16Bn PWM2 is enabled for PWM mode. -#define CT16_PWM2EN_EM2 0 // CT16Bn PWM2 is controlled by EM2. -#define mskCT16_PWM2EN_EN (CT16_PWM2EN_EN<<2) -#define mskCT16_PWM2EN_EM2 (CT16_PWM2EN_EM2<<2) - - //[3:3] CT16Bn PWM3 enable. -#define CT16_PWM3EN_EN 1 // CT16Bn PWM3 is enabled for PWM mode. -#define CT16_PWM3EN_EM3 0 // CT16Bn PWM3 is controlled by EM3. -#define mskCT16_PWM3EN_EN (CT16_PWM3EN_EN<<3) -#define mskCT16_PWM3EN_EM3 (CT16_PWM3EN_EM3<<3) - - //[4:4] CT16Bn PWM4 enable. -#define CT16_PWM4EN_EN 1 // CT16Bn PWM4 is enabled for PWM mode. -#define CT16_PWM4EN_EM4 0 // CT16Bn PWM4 is controlled by EM4. -#define mskCT16_PWM4EN_EN (CT16_PWM4EN_EN<<4) -#define mskCT16_PWM4EN_EM4 (CT16_PWM4EN_EM4<<4) - - //[5:5] CT16Bn PWM5 enable. -#define CT16_PWM5EN_EN 1 // CT16Bn PWM5 is enabled for PWM mode. -#define CT16_PWM5EN_EM5 0 // CT16Bn PWM5 is controlled by EM5. -#define mskCT16_PWM5EN_EN (CT16_PWM5EN_EN<<5) -#define mskCT16_PWM5EN_EM5 (CT16_PWM5EN_EM5<<5) - - //[6:6] CT16Bn PWM6 enable. -#define CT16_PWM6EN_EN 1 // CT16Bn PWM6 is enabled for PWM mode. -#define CT16_PWM6EN_EM6 0 // CT16Bn PWM6 is controlled by EM6. -#define mskCT16_PWM6EN_EN (CT16_PWM6EN_EN<<6) -#define mskCT16_PWM6EN_EM6 (CT16_PWM6EN_EM6<<6) - - //[7:7] CT16Bn PWM7 enable. -#define CT16_PWM7EN_EN 1 // CT16Bn PWM7 is enabled for PWM mode. -#define CT16_PWM7EN_EM7 0 // CT16Bn PWM7 is controlled by EM7. -#define mskCT16_PWM7EN_EN (CT16_PWM7EN_EN<<7) -#define mskCT16_PWM7EN_EM7 (CT16_PWM7EN_EM7<<7) - - //[8:8] CT16Bn PWM8 enable. -#define CT16_PWM8EN_EN 1 // CT16Bn PWM8 is enabled for PWM mode. -#define CT16_PWM8EN_EM8 0 // CT16Bn PWM8 is controlled by EM8. -#define mskCT16_PWM8EN_EN (CT16_PWM8EN_EN<<8) -#define mskCT16_PWM8EN_EM8 (CT16_PWM8EN_EM8<<8) - - //[9:9] CT16Bn PWM9 enable. -#define CT16_PWM9EN_EN 1 // CT16Bn PWM9 is enabled for PWM mode. -#define CT16_PWM9EN_EM9 0 // CT16Bn PWM9 is controlled by EM9. -#define mskCT16_PWM9EN_EN (CT16_PWM9EN_EN<<9) -#define mskCT16_PWM9EN_EM9 (CT16_PWM9EN_EM9<<9) - - //[10:10] CT16Bn PWM10 enable. -#define CT16_PWM10EN_EN 1 // CT16Bn PWM10 is enabled for PWM mode. -#define CT16_PWM10EN_EM10 0 // CT16Bn PWM10 is controlled by EM10. -#define mskCT16_PWM10EN_EN (CT16_PWM10EN_EN<<10) -#define mskCT16_PWM10EN_EM10 (CT16_PWM10EN_EM10<<10) - - //[11:11] CT16Bn PWM11 enable. -#define CT16_PWM11EN_EN 1 // CT16Bn PWM11 is enabled for PWM mode. -#define CT16_PWM11EN_EM11 0 // CT16Bn PWM11 is controlled by EM11. -#define mskCT16_PWM11EN_EN (CT16_PWM11EN_EN<<11) -#define mskCT16_PWM11EN_EM11 (CT16_PWM11EN_EM11<<11) - - //[12:12] CT16Bn PWM12 enable. -#define CT16_PWM12EN_EN 1 // CT16Bn PWM12 is enabled for PWM mode. -#define CT16_PWM12EN_EM12 0 // CT16Bn PWM12 is controlled by EM12. -#define mskCT16_PWM12EN_EN (CT16_PWM12EN_EN<<12) -#define mskCT16_PWM12EN_EM12 (CT16_PWM12EN_EM12<<12) - - //[13:13] CT16Bn PWM13 enable. -#define CT16_PWM13EN_EN 1 // CT16Bn PWM13 is enabled for PWM mode. -#define CT16_PWM13EN_EM13 0 // CT16Bn PWM13 is controlled by EM13. -#define mskCT16_PWM13EN_EN (CT16_PWM13EN_EN<<13) -#define mskCT16_PWM13EN_EM13 (CT16_PWM13EN_EM13<<13) - - //[14:14] CT16Bn PWM14 enable. -#define CT16_PWM14EN_EN 1 // CT16Bn PWM14 is enabled for PWM mode. -#define CT16_PWM14EN_EM14 0 // CT16Bn PWM14 is controlled by EM14. -#define mskCT16_PWM14EN_EN (CT16_PWM14EN_EN<<14) -#define mskCT16_PWM14EN_EM14 (CT16_PWM14EN_EM14<<14) - - //[15:15] CT16Bn PWM15 enable. -#define CT16_PWM15EN_EN 1 // CT16Bn PWM15 is enabled for PWM mode. -#define CT16_PWM15EN_EM15 0 // CT16Bn PWM15 is controlled by EM15. -#define mskCT16_PWM15EN_EN (CT16_PWM15EN_EN<<15) -#define mskCT16_PWM15EN_EM15 (CT16_PWM15EN_EM15<<15) - - //[16:16] CT16Bn PWM16 enable. -#define CT16_PWM16EN_EN 1 // CT16Bn PWM16 is enabled for PWM mode. -#define CT16_PWM16EN_EM16 0 // CT16Bn PWM16 is controlled by EM16. -#define mskCT16_PWM16EN_EN (CT16_PWM16EN_EN<<16) -#define mskCT16_PWM16EN_EM16 (CT16_PWM16EN_EM16<<16) - - //[17:17] CT16Bn PWM17 enable. -#define CT16_PWM17EN_EN 1 // CT16Bn PWM17 is enabled for PWM mode. -#define CT16_PWM17EN_EM17 0 // CT16Bn PWM17 is controlled by EM17. -#define mskCT16_PWM17EN_EN (CT16_PWM17EN_EN<<17) -#define mskCT16_PWM17EN_EM17 (CT16_PWM17EN_EM17<<17) - - //[18:18] CT16Bn PWM18 enable. -#define CT16_PWM18EN_EN 1 // CT16Bn PWM18 is enabled for PWM mode. -#define CT16_PWM18EN_EM18 0 // CT16Bn PWM18 is controlled by EM18. -#define mskCT16_PWM18EN_EN (CT16_PWM18EN_EN<<18) -#define mskCT16_PWM18EN_EM18 (CT16_PWM18EN_EM18<<18) - - //[19:19] CT16Bn PWM19 enable. -#define CT16_PWM19EN_EN 1 // CT16Bn PWM19 is enabled for PWM mode. -#define CT16_PWM19EN_EM19 0 // CT16Bn PWM19 is controlled by EM19. -#define mskCT16_PWM19EN_EN (CT16_PWM19EN_EN<<19) -#define mskCT16_PWM19EN_EM19 (CT16_PWM19EN_EM19<<19) - - //[20:20] CT16Bn PWM20 enable. -#define CT16_PWM20EN_EN 1 // CT16Bn PWM20 is enabled for PWM mode. -#define CT16_PWM20EN_EM20 0 // CT16Bn PWM20 is controlled by EM20. -#define mskCT16_PWM20EN_EN (CT16_PWM20EN_EN<<20) -#define mskCT16_PWM20EN_EM20 (CT16_PWM20EN_EM20<<20) - - //[21:21] CT16Bn PWM21 enable. -#define CT16_PWM21EN_EN 1 // CT16Bn PWM21 is enabled for PWM mode. -#define CT16_PWM21EN_EM21 0 // CT16Bn PWM21 is controlled by EM21. -#define mskCT16_PWM21EN_EN (CT16_PWM21EN_EN<<21) -#define mskCT16_PWM21EN_EM21 (CT16_PWM21EN_EM21<<21) - - //[22:22] CT16Bn PWM22 enable. -#define CT16_PWM22EN_EN 1 // CT16Bn PWM22 is enabled for PWM mode. -#define CT16_PWM22EN_EM22 0 // CT16Bn PWM22 is controlled by EM22. -#define mskCT16_PWM22EN_EN (CT16_PWM22EN_EN<<22) -#define mskCT16_PWM22EN_EM22 (CT16_PWM22EN_EM22<<22) - - //[23:23] CT16Bn PWM23 enable. -#define CT16_PWM23EN_EN 1 // CT16Bn PWM23 is enabled for PWM mode. -#define CT16_PWM23EN_EM23 0 // CT16Bn PWM23 is controlled by EM23. -#define mskCT16_PWM23EN_EN (CT16_PWM23EN_EN<<23) -#define mskCT16_PWM23EN_EM23 (CT16_PWM23EN_EM23<<23) - -/* CT16Bn PWM IO Enable register (0xA0) */ - //[0:0] CT16Bn PWM0 IO selection. -#define CT16_PWM0IOEN_EN 1 // PWM0 pin acts as match output. -#define CT16_PWM0IOEN_DIS 0 // PWM0 pin acts as GPIO. -#define mskCT16_PWM0IOEN_EN (CT16_PWM0IOEN_EN<<0) -#define mskCT16_PWM0IOEN_DIS (CT16_PWM0IOEN_DIS<<0) - - //[1:1] CT16Bn PWM1 IO selection. -#define CT16_PWM1IOEN_EN 1 // PWM1 pin acts as match output. -#define CT16_PWM1IOEN_DIS 0 // PWM1 pin acts as GPIO. -#define mskCT16_PWM1IOEN_EN (CT16_PWM1IOEN_EN<<1) -#define mskCT16_PWM1IOEN_DIS (CT16_PWM1IOEN_DIS<<1) - - //[2:2] CT16Bn PWM2 IO selection. -#define CT16_PWM2IOEN_EN 1 // PWM2 pin acts as match output. -#define CT16_PWM2IOEN_DIS 0 // PWM2 pin acts as GPIO. -#define mskCT16_PWM2IOEN_EN (CT16_PWM2IOEN_EN<<2) -#define mskCT16_PWM2IOEN_DIS (CT16_PWM2IOEN_DIS<<2) - - //[3:3] CT16Bn PWM3 IO selection. -#define CT16_PWM3IOEN_EN 1 // PWM3 pin acts as match output. -#define CT16_PWM3IOEN_DIS 0 // PWM3 pin acts as GPIO. -#define mskCT16_PWM3IOEN_EN (CT16_PWM3IOEN_EN<<3) -#define mskCT16_PWM3IOEN_DIS (CT16_PWM3IOEN_DIS<<3) - - //[4:4] CT16Bn PWM4 IO selection. -#define CT16_PWM4IOEN_EN 1 // PWM4 pin acts as match output. -#define CT16_PWM4IOEN_DIS 0 // PWM4 pin acts as GPIO. -#define mskCT16_PWM4IOEN_EN (CT16_PWM4IOEN_EN<<4) -#define mskCT16_PWM4IOEN_DIS (CT16_PWM4IOEN_DIS<<4) - - //[5:5] CT16Bn PWM5 IO selection. -#define CT16_PWM5IOEN_EN 1 // PWM5 pin acts as match output. -#define CT16_PWM5IOEN_DIS 0 // PWM5 pin acts as GPIO. -#define mskCT16_PWM5IOEN_EN (CT16_PWM5IOEN_EN<<5) -#define mskCT16_PWM5IOEN_DIS (CT16_PWM5IOEN_DIS<<5) - - //[6:6] CT16Bn PWM6 IO selection. -#define CT16_PWM6IOEN_EN 1 // PWM6 pin acts as match output. -#define CT16_PWM6IOEN_DIS 0 // PWM6 pin acts as GPIO. -#define mskCT16_PWM6IOEN_EN (CT16_PWM6IOEN_EN<<6) -#define mskCT16_PWM6IOEN_DIS (CT16_PWM6IOEN_DIS<<6) - - //[7:7] CT16Bn PWM7 IO selection. -#define CT16_PWM7IOEN_EN 1 // PWM7 pin acts as match output. -#define CT16_PWM7IOEN_DIS 0 // PWM7 pin acts as GPIO. -#define mskCT16_PWM7IOEN_EN (CT16_PWM7IOEN_EN<<7) -#define mskCT16_PWM7IOEN_DIS (CT16_PWM7IOEN_DIS<<7) - - //[8:8] CT16Bn PWM8 IO selection. -#define CT16_PWM8IOEN_EN 1 // PWM8 pin acts as match output. -#define CT16_PWM8IOEN_DIS 0 // PWM8 pin acts as GPIO. -#define mskCT16_PWM8IOEN_EN (CT16_PWM8IOEN_EN<<8) -#define mskCT16_PWM8IOEN_DIS (CT16_PWM8IOEN_DIS<<8) - - //[9:9] CT16Bn PWM9 IO selection. -#define CT16_PWM9IOEN_EN 1 // PWM9 pin acts as match output. -#define CT16_PWM9IOEN_DIS 0 // PWM9 pin acts as GPIO. -#define mskCT16_PWM9IOEN_EN (CT16_PWM9IOEN_EN<<9) -#define mskCT16_PWM9IOEN_DIS (CT16_PWM9IOEN_DIS<<9) - - //[10:10] CT16Bn PWM10 IO selection. -#define CT16_PWM10IOEN_EN 1 // PWM10 pin acts as match output. -#define CT16_PWM10IOEN_DIS 0 // PWM10 pin acts as GPIO. -#define mskCT16_PWM10IOEN_EN (CT16_PWM10IOEN_EN<<10) -#define mskCT16_PWM10IOEN_DIS (CT16_PWM10IOEN_DIS<<10) - - //[11:11] CT16Bn PWM11 IO selection. -#define CT16_PWM11IOEN_EN 1 // PWM11 pin acts as match output. -#define CT16_PWM11IOEN_DIS 0 // PWM11 pin acts as GPIO. -#define mskCT16_PWM11IOEN_EN (CT16_PWM11IOEN_EN<<11) -#define mskCT16_PWM11IOEN_DIS (CT16_PWM11IOEN_DIS<<11) - - //[12:12] CT16Bn PWM12 IO selection. -#define CT16_PWM12IOEN_EN 1 // PWM12 pin acts as match output. -#define CT16_PWM12IOEN_DIS 0 // PWM12 pin acts as GPIO. -#define mskCT16_PWM12IOEN_EN (CT16_PWM12IOEN_EN<<12) -#define mskCT16_PWM12IOEN_DIS (CT16_PWM12IOEN_DIS<<12) - - //[13:13] CT16Bn PWM13 IO selection. -#define CT16_PWM13IOEN_EN 1 // PWM13 pin acts as match output. -#define CT16_PWM13IOEN_DIS 0 // PWM13 pin acts as GPIO. -#define mskCT16_PWM13IOEN_EN (CT16_PWM13IOEN_EN<<13) -#define mskCT16_PWM13IOEN_DIS (CT16_PWM13IOEN_DIS<<13) - - //[14:14] CT16Bn PWM14 IO selection. -#define CT16_PWM14IOEN_EN 1 // PWM14 pin acts as match output. -#define CT16_PWM14IOEN_DIS 0 // PWM14 pin acts as GPIO. -#define mskCT16_PWM14IOEN_EN (CT16_PWM14IOEN_EN<<14) -#define mskCT16_PWM14IOEN_DIS (CT16_PWM14IOEN_DIS<<14) - - //[15:15] CT16Bn PWM15 IO selection. -#define CT16_PWM15IOEN_EN 1 // PWM15 pin acts as match output. -#define CT16_PWM15IOEN_DIS 0 // PWM15 pin acts as GPIO. -#define mskCT16_PWM15IOEN_EN (CT16_PWM15IOEN_EN<<15) -#define mskCT16_PWM15IOEN_DIS (CT16_PWM15IOEN_DIS<<15) - - //[16:16] CT16Bn PWM16 IO selection. -#define CT16_PWM16IOEN_EN 1 // PWM16 pin acts as match output. -#define CT16_PWM16IOEN_DIS 0 // PWM16 pin acts as GPIO. -#define mskCT16_PWM16IOEN_EN (CT16_PWM16IOEN_EN<<16) -#define mskCT16_PWM16IOEN_DIS (CT16_PWM16IOEN_DIS<<16) - - //[17:17] CT16Bn PWM17 IO selection. -#define CT16_PWM17IOEN_EN 1 // PWM17 pin acts as match output. -#define CT16_PWM17IOEN_DIS 0 // PWM17 pin acts as GPIO. -#define mskCT16_PWM17IOEN_EN (CT16_PWM17IOEN_EN<<17) -#define mskCT16_PWM17IOEN_DIS (CT16_PWM17IOEN_DIS<<17) - - //[18:18] CT16Bn PWM18 IO selection. -#define CT16_PWM18IOEN_EN 1 // PWM18 pin acts as match output. -#define CT16_PWM18IOEN_DIS 0 // PWM18 pin acts as GPIO. -#define mskCT16_PWM18IOEN_EN (CT16_PWM18IOEN_EN<<18) -#define mskCT16_PWM18IOEN_DIS (CT16_PWM18IOEN_DIS<<18) - - //[19:19] CT16Bn PWM19 IO selection. -#define CT16_PWM19IOEN_EN 1 // PWM19 pin acts as match output. -#define CT16_PWM19IOEN_DIS 0 // PWM19 pin acts as GPIO. -#define mskCT16_PWM19IOEN_EN (CT16_PWM19IOEN_EN<<19) -#define mskCT16_PWM19IOEN_DIS (CT16_PWM19IOEN_DIS<<19) - - //[20:20] CT16Bn PWM20 IO selection. -#define CT16_PWM20IOEN_EN 1 // PWM20 pin acts as match output. -#define CT16_PWM20IOEN_DIS 0 // PWM20 pin acts as GPIO. -#define mskCT16_PWM20IOEN_EN (CT16_PWM20IOEN_EN<<20) -#define mskCT16_PWM20IOEN_DIS (CT16_PWM20IOEN_DIS<<20) - - //[21:21] CT16Bn PWM21 IO selection. -#define CT16_PWM21IOEN_EN 1 // PWM21 pin acts as match output. -#define CT16_PWM21IOEN_DIS 0 // PWM21 pin acts as GPIO. -#define mskCT16_PWM21IOEN_EN (CT16_PWM21IOEN_EN<<21) -#define mskCT16_PWM21IOEN_DIS (CT16_PWM21IOEN_DIS<<21) - - //[22:22] CT16Bn PWM22 IO selection. -#define CT16_PWM22IOEN_EN 1 // PWM22 pin acts as match output. -#define CT16_PWM22IOEN_DIS 0 // PWM22 pin acts as GPIO. -#define mskCT16_PWM22IOEN_EN (CT16_PWM22IOEN_EN<<22) -#define mskCT16_PWM22IOEN_DIS (CT16_PWM22IOEN_DIS<<22) - - //[23:23] CT16Bn PWM23 IO selection. -#define CT16_PWM23IOEN_EN 1 // PWM23 pin acts as match output. -#define CT16_PWM23IOEN_DIS 0 // PWM23 pin acts as GPIO. -#define mskCT16_PWM23IOEN_EN (CT16_PWM23IOEN_EN<<23) -#define mskCT16_PWM23IOEN_DIS (CT16_PWM23IOEN_DIS<<23) - - -/* CT16Bn Timer Raw Interrupt Status register (0xA4) */ -/* CT16Bn Timer Interrupt Clear register (0xA8) */ -/* The bitmask usage of iwCT16Bn_IrqEvent is the same with CT16Bn_RIS*/ -#define mskCT16_MR0IF (0x1<<0) //[0:0] Interrupt flag for match channel 0 -#define mskCT16_MR0IC mskCT16_MR0IF -#define mskCT16_MR1IF (0x1<<1) //[1:1] Interrupt flag for match channel 1 -#define mskCT16_MR1IC mskCT16_MR1IF -#define mskCT16_MR2IF (0x1<<2) //[2:2] Interrupt flag for match channel 2 -#define mskCT16_MR2IC mskCT16_MR2IF -#define mskCT16_MR3IF (0x1<<3) //[3:3] Interrupt flag for match channel 3 -#define mskCT16_MR3IC mskCT16_MR3IF -#define mskCT16_MR4IF (0x1<<4) //[4:4] Interrupt flag for match channel 4 -#define mskCT16_MR4IC mskCT16_MR4IF -#define mskCT16_MR5IF (0x1<<5) //[5:5] Interrupt flag for match channel 5 -#define mskCT16_MR5IC mskCT16_MR5IF -#define mskCT16_MR6IF (0x1<<6) //[6:6] Interrupt flag for match channel 6 -#define mskCT16_MR6IC mskCT16_MR6IF -#define mskCT16_MR7IF (0x1<<7) //[7:7] Interrupt flag for match channel 7 -#define mskCT16_MR7IC mskCT16_MR7IF -#define mskCT16_MR8IF (0x1<<8) //[8:8] Interrupt flag for match channel 8 -#define mskCT16_MR8IC mskCT16_MR8IF -#define mskCT16_MR9IF (0x1<<9) //[9:9] Interrupt flag for match channel 9 -#define mskCT16_MR9IC mskCT16_MR9IF -#define mskCT16_MR10IF (0x1<<10) //[10:10] Interrupt flag for match channel 10 -#define mskCT16_MR10IC mskCT16_MR10IF -#define mskCT16_MR11IF (0x1<<11) //[11:11] Interrupt flag for match channel 11 -#define mskCT16_MR11IC mskCT16_MR11IF -#define mskCT16_MR12IF (0x1<<12) //[12:12] Interrupt flag for match channel 12 -#define mskCT16_MR12IC mskCT16_MR12IF -#define mskCT16_MR13IF (0x1<<13) //[13:13] Interrupt flag for match channel 13 -#define mskCT16_MR13IC mskCT16_MR13IF -#define mskCT16_MR14IF (0x1<<14) //[14:14] Interrupt flag for match channel 14 -#define mskCT16_MR14IC mskCT16_MR14IF -#define mskCT16_MR15IF (0x1<<15) //[15:15] Interrupt flag for match channel 15 -#define mskCT16_MR15IC mskCT16_MR15IF -#define mskCT16_MR16IF (0x1<<16) //[16:16] Interrupt flag for match channel 16 -#define mskCT16_MR16IC mskCT16_MR16IF -#define mskCT16_MR17IF (0x1<<17) //[17:17] Interrupt flag for match channel 17 -#define mskCT16_MR17IC mskCT16_MR17IF -#define mskCT16_MR18IF (0x1<<18) //[18:18] Interrupt flag for match channel 18 -#define mskCT16_MR18IC mskCT16_MR18IF -#define mskCT16_MR19IF (0x1<<19) //[19:19] Interrupt flag for match channel 19 -#define mskCT16_MR19IC mskCT16_MR19IF -#define mskCT16_MR20IF (0x1<<20) //[20:20] Interrupt flag for match channel 20 -#define mskCT16_MR20IC mskCT16_MR20IF -#define mskCT16_MR21IF (0x1<<21) //[21:21] Interrupt flag for match channel 21 -#define mskCT16_MR21IC mskCT16_MR21IF -#define mskCT16_MR22IF (0x1<<22) //[22:22] Interrupt flag for match channel 22 -#define mskCT16_MR22IC mskCT16_MR22IF -#define mskCT16_MR23IF (0x1<<23) //[23:23] Interrupt flag for match channel 23 -#define mskCT16_MR23IC mskCT16_MR23IF -#define mskCT16_MR24IF (0x1<<24) //[24:24] Interrupt flag for match channel 24 -#define mskCT16_MR24IC mskCT16_MR24IF -#define mskCT16_CAP0IF (0x1<<25) //[25:25] Interrupt flag for capture channel 25 -#define mskCT16_CAP0IC mskCT16_CAP0IF -/*_____ M A C R O S ________________________________________________________*/ - -#endif //*__SN32F240B_CT16_H - diff --git a/keyboards/keychron/k6/mcuconf.h b/keyboards/keychron/k6/mcuconf.h index 458530fbed05..fb3221b4c7db 100644 --- a/keyboards/keychron/k6/mcuconf.h +++ b/keyboards/keychron/k6/mcuconf.h @@ -18,7 +18,7 @@ #define MCUCONF_H /* - * STM32F0xx drivers configuration. + * SN32F24x drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -31,7 +31,7 @@ * 0...3 Lowest...Highest. */ -#define STM32F0xx_MCUCONF +#define SN32F24x_MCUCONF /* * HAL driver system settings. @@ -40,9 +40,6 @@ /* * SN driver system settings. */ -#define SN32_CT_IRQ_PRIORITY 2 -#define SN32_CT_USE_TIMER 2 - #define SN32_HAS_GPIOA TRUE #define SN32_HAS_GPIOB TRUE #define SN32_HAS_GPIOC TRUE @@ -51,23 +48,12 @@ /* * USB driver system settings. */ -#define SN32_USB_USE_USB1 TRUE -#define SN32_USB_LOW_POWER_ON_SUSPEND TRUE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 - #define CRT1_AREAS_NUMBER 1 - #define PLATFORM_USB_USE_USB1 TRUE /* * Timer driver system settings. */ -#define SN32_PWM_USE_TIM1 FALSE -#define SN32_PWM_USE_TIM2 TRUE -#define SN32_PWM_TIM1_IRQ_PRIORITY 3 -#define SN32_PWM_TIM2_IRQ_PRIORITY 3 - #define SYS_CLOCK_SETUP 1 #define SYS0_CLKCFG_VAL 0 #define AHB_PRESCALAR 0x2 @@ -83,8 +69,8 @@ /*---------------------------------------------------------------------------- Define clocks *----------------------------------------------------------------------------*/ -#define __IHRC48_FREQ (48000000UL) -#define __ILRC_FREQ (32000UL) +//#define __IHRC48_FREQ (48000000UL) +//#define __ILRC_FREQ (32000UL) // #endif /* _MCUCONF_H_ */