From 0b9c4fb1505a10373aa026b0c268809389b4c493 Mon Sep 17 00:00:00 2001 From: Harry ten Berge Date: Fri, 18 Sep 2020 20:34:29 +0200 Subject: [PATCH 1/3] switch 8812AU driver to https://github.com/aircrack-ng/rtl8812au --- drivers/net/wireless/realtek/Makefile | 2 +- .../net/wireless/realtek/rtl8812au/Kconfig | 8 +- .../net/wireless/realtek/rtl8812au/Makefile | 310 +- .../realtek/rtl8812au/core/efuse/rtw_efuse.c | 12 +- .../realtek/rtl8812au/core/mesh/rtw_mesh.c | 40 +- .../realtek/rtl8812au/core/mesh/rtw_mesh.h | 2 +- .../rtl8812au/core/mesh/rtw_mesh_hwmp.c | 10 +- .../rtl8812au/core/mesh/rtw_mesh_pathtbl.c | 2 +- .../rtl8812au/core/mesh/rtw_mesh_pathtbl.h | 2 +- .../wireless/realtek/rtl8812au/core/rtw_ap.c | 26 +- .../realtek/rtl8812au/core/rtw_btcoex.c | 2 +- .../realtek/rtl8812au/core/rtw_chplan.c | 2386 ++--- .../realtek/rtl8812au/core/rtw_chplan.h | 362 +- .../wireless/realtek/rtl8812au/core/rtw_cmd.c | 55 +- .../realtek/rtl8812au/core/rtw_debug.c | 83 +- .../realtek/rtl8812au/core/rtw_ieee80211.c | 6 +- .../wireless/realtek/rtl8812au/core/rtw_io.c | 6 +- .../realtek/rtl8812au/core/rtw_ioctl_set.c | 4 +- .../realtek/rtl8812au/core/rtw_mlme.c | 78 +- .../realtek/rtl8812au/core/rtw_mlme_ext.c | 243 +- .../wireless/realtek/rtl8812au/core/rtw_mp.c | 45 +- .../realtek/rtl8812au/core/rtw_pwrctrl.c | 49 +- .../realtek/rtl8812au/core/rtw_recv.c | 117 +- .../wireless/realtek/rtl8812au/core/rtw_rf.c | 8 +- .../wireless/realtek/rtl8812au/core/rtw_rm.c | 4 +- .../realtek/rtl8812au/core/rtw_security.c | 326 +- .../realtek/rtl8812au/core/rtw_sta_mgt.c | 13 +- .../realtek/rtl8812au/core/rtw_tdls.c | 4 +- .../realtek/rtl8812au/core/rtw_wlan_util.c | 26 +- .../realtek/rtl8812au/core/rtw_xmit.c | 92 +- .../realtek/rtl8812au/hal/efuse/efuse_mask.h | 4 +- .../efuse/rtl8814a/HalEfuseMask8814A_PCIE.c | 93 + .../efuse/rtl8814a/HalEfuseMask8814A_PCIE.h | 33 + .../efuse/rtl8814a/HalEfuseMask8814A_USB.c | 90 + .../efuse/rtl8814a/HalEfuseMask8814A_USB.h | 33 + .../realtek/rtl8812au/hal/hal_btcoex.c | 43 +- .../wireless/realtek/rtl8812au/hal/hal_com.c | 80 +- .../realtek/rtl8812au/hal/hal_com_c2h.h | 4 +- .../wireless/realtek/rtl8812au/hal/hal_dm.c | 52 +- .../realtek/rtl8812au/hal/hal_dm_acs.c | 2 + .../realtek/rtl8812au/hal/hal_dm_acs.h | 4 +- .../realtek/rtl8812au/hal/hal_halmac.c | 2 +- .../realtek/rtl8812au/hal/hal_hci/hal_usb.c | 8 +- .../wireless/realtek/rtl8812au/hal/hal_intf.c | 1 - .../wireless/realtek/rtl8812au/hal/hal_mcc.c | 90 +- .../wireless/realtek/rtl8812au/hal/hal_mp.c | 133 +- .../realtek/rtl8812au/hal/led/hal_led.c | 6 +- .../realtek/rtl8812au/hal/led/hal_usb_led.c | 3 +- .../rtl8812au/hal/phydm/ap_makefile.mk | 2 +- .../realtek/rtl8812au/hal/phydm/halhwimg.h | 41 - .../rtl8812au/hal/phydm/halrf/halphyrf_iot.c | 6 +- .../rtl8812au/hal/phydm/halrf/halphyrf_win.c | 2 +- .../realtek/rtl8812au/hal/phydm/halrf/halrf.c | 6 +- .../hal/phydm/halrf/halrf_powertracking_ap.c | 2 +- .../hal/phydm/halrf/halrf_powertracking_ce.c | 2 +- .../hal/phydm/halrf/halrf_powertracking_win.c | 8 +- .../rtl8812au/hal/phydm/halrf/halrf_psd.c | 4 +- .../hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c | 2 +- .../phydm/halrf/rtl8812a/halrf_8812a_win.c | 6 +- .../hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c | 1754 ++++ .../hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h | 164 + .../hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c | 564 ++ .../hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h | 112 + .../phydm/halrf/rtl8814a/halrf_8814a_win.c | 528 + .../phydm/halrf/rtl8814a/halrf_8814a_win.h | 106 + .../phydm/halrf/rtl8814a/halrf_iqk_8814a.c | 557 ++ .../phydm/halrf/rtl8814a/halrf_iqk_8814a.h | 58 + .../hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c | 313 + .../phydm/halrf/rtl8821a/halrf_8821a_ce.h} | 45 +- .../phydm/halrf/rtl8821a/halrf_8821a_win.c | 1046 ++ .../phydm/halrf/rtl8821a/halrf_8821a_win.h | 72 + .../phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c | 731 ++ .../phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h | 42 + .../phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c | 773 ++ .../halrf/rtl8821a/halrf_iqk_8821a_ce.h} | 32 +- .../halrf/rtl8821a/halrf_iqk_8821a_win.c | 774 ++ .../halrf/rtl8821a/halrf_iqk_8821a_win.h} | 31 +- .../realtek/rtl8812au/hal/phydm/phydm.c | 6 +- .../realtek/rtl8812au/hal/phydm/phydm.h | 1 - .../realtek/rtl8812au/hal/phydm/phydm.mk | 4 +- .../rtl8812au/hal/phydm/phydm_adc_sampling.c | 2 +- .../realtek/rtl8812au/hal/phydm/phydm_ccx.c | 2 +- .../realtek/rtl8812au/hal/phydm/phydm_debug.c | 5 +- .../realtek/rtl8812au/hal/phydm/phydm_debug.h | 4 +- .../realtek/rtl8812au/hal/phydm/phydm_dig.c | 2 +- .../hal/phydm/phydm_dynamictxpower.c | 4 +- .../rtl8812au/hal/phydm/phydm_features_win.h | 4 +- .../rtl8812au/hal/phydm/phydm_hwconfig.c | 76 +- .../rtl8812au/hal/phydm/phydm_math_lib.c | 1 - .../realtek/rtl8812au/hal/phydm/phydm_mp.c | 12 +- .../realtek/rtl8812au/hal/phydm/phydm_mp.h | 2 +- .../rtl8812au/hal/phydm/phydm_noisemonitor.c | 4 +- .../rtl8812au/hal/phydm/phydm_phystatus.c | 5 +- .../rtl8812au/hal/phydm/phydm_regtable.h | 2 +- .../hal/phydm/rtl8814a/hal8814areg_odm.h | 47 + .../hal/phydm/rtl8814a/halhwimg8814a_bb.c | 4308 ++++++++ .../hal/phydm/rtl8814a/halhwimg8814a_bb.h | 99 + .../hal/phydm/rtl8814a/halhwimg8814a_fw.h | 56 + .../hal/phydm/rtl8814a/halhwimg8814a_mac.c | 325 + .../hal/phydm/rtl8814a/halhwimg8814a_mac.h | 39 + .../hal/phydm/rtl8814a/halhwimg8814a_rf.c | 8838 +++++++++++++++++ .../hal/phydm/rtl8814a/halhwimg8814a_rf.h | 149 + .../hal/phydm/rtl8814a/halphyrf_8814a_ap.c | 1754 ++++ .../hal/phydm/rtl8814a/halphyrf_8814a_ap.h | 164 + .../hal/phydm/rtl8814a/halphyrf_8814a_win.c | 528 + .../hal/phydm/rtl8814a/halphyrf_8814a_win.h | 106 + .../hal/phydm/rtl8814a/phydm_regconfig8814a.c | 219 + .../hal/phydm/rtl8814a/phydm_regconfig8814a.h | 109 + .../hal/phydm/rtl8814a/phydm_rtl8814a.c | 503 + .../hal/phydm/rtl8814a/phydm_rtl8814a.h | 78 + .../hal/phydm/rtl8814a/version_rtl8814a.h | 10 + .../hal/phydm/rtl8821a/halhwimg8821a_bb.c | 923 ++ .../hal/phydm/rtl8821a/halhwimg8821a_bb.h | 83 + .../hal/phydm/rtl8821a/halhwimg8821a_mac.c | 279 + .../phydm/rtl8821a/halhwimg8821a_mac.h} | 23 +- .../hal/phydm/rtl8821a/halhwimg8821a_rf.c | 5457 ++++++++++ .../hal/phydm/rtl8821a/halhwimg8821a_rf.h | 143 + .../hal/phydm/rtl8821a/phydm_regconfig8821a.c | 206 + .../hal/phydm/rtl8821a/phydm_regconfig8821a.h | 90 + .../hal/phydm/rtl8821a/phydm_rtl8821a.c | 129 + .../phydm/rtl8821a/phydm_rtl8821a.h} | 20 +- .../phydm/rtl8821a/version_rtl8821a.h} | 19 +- .../rtl8812au/hal/rtl8812a/rtl8812a_dm.c | 5 +- .../hal/rtl8812a/rtl8812a_hal_init.c | 38 +- .../rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c | 48 +- .../hal/rtl8812a/usb/rtl8812au_xmit.c | 15 +- .../rtl8812au/hal/rtl8812a/usb/usb_halinit.c | 2 +- .../rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c | 98 + .../rtl8812au/hal/rtl8814a/hal8814a_fw.c | 7741 +++++++++++++++ .../rtl8812au/hal/rtl8814a/rtl8814a_cmd.c | 1515 +++ .../rtl8812au/hal/rtl8814a/rtl8814a_dm.c | 407 + .../hal/rtl8814a/rtl8814a_hal_init.c | 6769 +++++++++++++ .../rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c | 3027 ++++++ .../rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c | 210 + .../rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c | 68 + .../rtl8812au/hal/rtl8814a/rtl8814a_sreset.c | 114 + .../rtl8812au/hal/rtl8814a/rtl8814a_xmit.c | 515 + .../hal/rtl8814a/usb/rtl8814au_led.c | 147 + .../hal/rtl8814a/usb/rtl8814au_recv.c | 34 + .../hal/rtl8814a/usb/rtl8814au_xmit.c | 1129 +++ .../rtl8812au/hal/rtl8814a/usb/usb_halinit.c | 2416 +++++ .../hal/rtl8814a/usb/usb_ops_linux.c | 312 + .../rtl8812au/include/Hal8188EPhyCfg.h | 260 - .../rtl8812au/include/Hal8188EPhyReg.h | 1100 -- .../rtl8812au/include/Hal8188EPwrSeq.h | 170 - .../rtl8812au/include/Hal8188FPhyCfg.h | 134 - .../rtl8812au/include/Hal8188FPhyReg.h | 1165 --- .../rtl8812au/include/Hal8188FPwrSeq.h | 212 - .../rtl8812au/include/Hal8192EPhyCfg.h | 148 - .../rtl8812au/include/Hal8192EPhyReg.h | 1146 --- .../rtl8812au/include/Hal8192EPwrSeq.h | 169 - .../rtl8812au/include/Hal8192FPhyCfg.h | 131 - .../rtl8812au/include/Hal8192FPhyReg.h | 1134 --- .../rtl8812au/include/Hal8192FPwrSeq.h | 220 - .../rtl8812au/include/Hal8703BPhyCfg.h | 132 - .../rtl8812au/include/Hal8703BPhyReg.h | 1133 --- .../rtl8812au/include/Hal8703BPwrSeq.h | 198 - .../rtl8812au/include/Hal8710BPhyCfg.h | 127 - .../rtl8812au/include/Hal8710BPhyReg.h | 1134 --- .../rtl8812au/include/Hal8710BPwrSeq.h | 167 - .../rtl8812au/include/Hal8723BPhyCfg.h | 132 - .../rtl8812au/include/Hal8723BPhyReg.h | 1131 --- .../rtl8812au/include/Hal8723BPwrSeq.h | 246 - .../rtl8812au/include/Hal8723DPhyCfg.h | 131 - .../rtl8812au/include/Hal8723DPhyReg.h | 1134 --- .../rtl8812au/include/Hal8723DPwrSeq.h | 206 - .../realtek/rtl8812au/include/Hal8723PwrSeq.h | 183 - .../realtek/rtl8812au/include/Hal8814PwrSeq.h | 14 +- .../realtek/rtl8812au/include/basic_types.h | 43 +- .../rtl8812au/include/cmn_info/rtw_sta_info.h | 2 +- .../realtek/rtl8812au/include/drv_conf.h | 13 +- .../realtek/rtl8812au/include/drv_types.h | 32 +- .../realtek/rtl8812au/include/hal_com_h2c.h | 14 +- .../realtek/rtl8812au/include/hal_data.h | 49 +- .../realtek/rtl8812au/include/hal_intf.h | 6 +- .../realtek/rtl8812au/include/ieee80211.h | 2 +- .../{wireless.h => old_unused_rtl_wireless.h} | 0 .../realtek/rtl8812au/include/osdep_service.h | 8 + .../rtl8812au/include/osdep_service_bsd.h | 1408 +-- .../rtl8812au/include/osdep_service_ce.h | 308 +- .../rtl8812au/include/osdep_service_linux.h | 6 +- .../rtl8812au/include/osdep_service_xp.h | 328 +- .../realtek/rtl8812au/include/rtl8188e_cmd.h | 165 - .../realtek/rtl8812au/include/rtl8188e_hal.h | 316 - .../realtek/rtl8812au/include/rtl8188e_led.h | 37 - .../realtek/rtl8812au/include/rtl8188e_recv.h | 161 - .../realtek/rtl8812au/include/rtl8188e_rf.h | 27 - .../realtek/rtl8812au/include/rtl8188e_spec.h | 159 - .../rtl8812au/include/rtl8188e_sreset.h | 24 - .../realtek/rtl8812au/include/rtl8188e_xmit.h | 295 - .../realtek/rtl8812au/include/rtl8188f_cmd.h | 206 - .../realtek/rtl8812au/include/rtl8188f_dm.h | 39 - .../realtek/rtl8812au/include/rtl8188f_hal.h | 260 - .../realtek/rtl8812au/include/rtl8188f_led.h | 45 - .../realtek/rtl8812au/include/rtl8188f_recv.h | 68 - .../realtek/rtl8812au/include/rtl8188f_spec.h | 275 - .../realtek/rtl8812au/include/rtl8188f_xmit.h | 336 - .../realtek/rtl8812au/include/rtl8192e_cmd.h | 147 - .../realtek/rtl8812au/include/rtl8192e_dm.h | 28 - .../realtek/rtl8812au/include/rtl8192e_hal.h | 330 - .../realtek/rtl8812au/include/rtl8192e_led.h | 36 - .../realtek/rtl8812au/include/rtl8192e_recv.h | 179 - .../realtek/rtl8812au/include/rtl8192e_rf.h | 28 - .../realtek/rtl8812au/include/rtl8192e_spec.h | 313 - .../rtl8812au/include/rtl8192e_sreset.h | 24 - .../realtek/rtl8812au/include/rtl8192e_xmit.h | 450 - .../realtek/rtl8812au/include/rtl8192f_cmd.h | 194 - .../realtek/rtl8812au/include/rtl8192f_dm.h | 27 - .../realtek/rtl8812au/include/rtl8192f_hal.h | 315 - .../realtek/rtl8812au/include/rtl8192f_led.h | 42 - .../realtek/rtl8812au/include/rtl8192f_recv.h | 111 - .../realtek/rtl8812au/include/rtl8192f_rf.h | 83 - .../realtek/rtl8812au/include/rtl8192f_spec.h | 538 - .../rtl8812au/include/rtl8192f_sreset.h | 24 - .../realtek/rtl8812au/include/rtl8192f_xmit.h | 531 - .../realtek/rtl8812au/include/rtl8703b_cmd.h | 205 - .../realtek/rtl8812au/include/rtl8703b_dm.h | 39 - .../realtek/rtl8812au/include/rtl8703b_hal.h | 266 - .../realtek/rtl8812au/include/rtl8703b_led.h | 44 - .../realtek/rtl8812au/include/rtl8703b_recv.h | 86 - .../realtek/rtl8812au/include/rtl8703b_spec.h | 464 - .../rtl8812au/include/rtl8703b_sreset.h | 24 - .../realtek/rtl8812au/include/rtl8703b_xmit.h | 335 - .../realtek/rtl8812au/include/rtl8710b_cmd.h | 175 - .../realtek/rtl8812au/include/rtl8710b_dm.h | 39 - .../realtek/rtl8812au/include/rtl8710b_hal.h | 277 - .../realtek/rtl8812au/include/rtl8710b_led.h | 44 - .../rtl8812au/include/rtl8710b_lps_poff.h | 56 - .../realtek/rtl8812au/include/rtl8710b_recv.h | 85 - .../realtek/rtl8812au/include/rtl8710b_rf.h | 20 - .../realtek/rtl8812au/include/rtl8710b_spec.h | 481 - .../realtek/rtl8812au/include/rtl8710b_xmit.h | 522 - .../realtek/rtl8812au/include/rtl8723b_cmd.h | 205 - .../realtek/rtl8812au/include/rtl8723b_dm.h | 38 - .../realtek/rtl8812au/include/rtl8723b_hal.h | 274 - .../realtek/rtl8812au/include/rtl8723b_led.h | 44 - .../realtek/rtl8812au/include/rtl8723b_recv.h | 86 - .../realtek/rtl8812au/include/rtl8723b_rf.h | 25 - .../realtek/rtl8812au/include/rtl8723b_spec.h | 280 - .../rtl8812au/include/rtl8723b_sreset.h | 24 - .../realtek/rtl8812au/include/rtl8723b_xmit.h | 335 - .../realtek/rtl8812au/include/rtl8723d_cmd.h | 189 - .../realtek/rtl8812au/include/rtl8723d_dm.h | 39 - .../realtek/rtl8812au/include/rtl8723d_hal.h | 303 - .../realtek/rtl8812au/include/rtl8723d_led.h | 44 - .../rtl8812au/include/rtl8723d_lps_poff.h | 56 - .../realtek/rtl8812au/include/rtl8723d_recv.h | 116 - .../realtek/rtl8812au/include/rtl8723d_rf.h | 21 - .../realtek/rtl8812au/include/rtl8723d_spec.h | 447 - .../rtl8812au/include/rtl8723d_sreset.h | 24 - .../realtek/rtl8812au/include/rtl8723d_xmit.h | 523 - .../rtl8812au/include/rtl8812a_sreset.h | 2 +- .../realtek/rtl8812au/include/rtl8814a_cmd.h | 0 .../realtek/rtl8812au/include/rtl8814a_hal.h | 4 +- .../realtek/rtl8812au/include/rtl8814a_recv.h | 0 .../realtek/rtl8812au/include/rtl8814a_spec.h | 8 + .../rtl8812au/include/rtl8814a_sreset.h | 2 +- .../realtek/rtl8812au/include/rtl8814a_xmit.h | 0 .../realtek/rtl8812au/include/rtl8821c_hal.h | 84 - .../realtek/rtl8812au/include/rtl8821c_spec.h | 202 - .../realtek/rtl8812au/include/rtl8821ce_hal.h | 23 - .../realtek/rtl8812au/include/rtl8821cs_hal.h | 23 - .../realtek/rtl8812au/include/rtl8821cu_hal.h | 24 - .../realtek/rtl8812au/include/rtl8822b_hal.h | 230 - .../realtek/rtl8812au/include/rtl8822be_hal.h | 27 - .../realtek/rtl8812au/include/rtl8822bs_hal.h | 31 - .../realtek/rtl8812au/include/rtl8822bu_hal.h | 65 - .../include/{autoconf.h => rtl_autoconf.h} | 24 +- .../realtek/rtl8812au/include/rtw_byteorder.h | 12 + .../realtek/rtl8812au/include/rtw_cmd.h | 2 +- .../realtek/rtl8812au/include/rtw_debug.h | 7 +- .../realtek/rtl8812au/include/rtw_mlme.h | 12 +- .../realtek/rtl8812au/include/rtw_mlme_ext.h | 6 +- .../realtek/rtl8812au/include/rtw_pwrctrl.h | 2 +- .../realtek/rtl8812au/include/rtw_qos.h | 2 +- .../realtek/rtl8812au/include/rtw_recv.h | 4 +- .../realtek/rtl8812au/include/rtw_rm_fsm.h | 2 +- .../realtek/rtl8812au/include/rtw_security.h | 6 - .../realtek/rtl8812au/include/rtw_xmit.h | 11 +- .../wireless/realtek/rtl8812au/include/wifi.h | 11 +- .../rtl8812au/os_dep/linux/ioctl_cfg80211.c | 350 +- .../rtl8812au/os_dep/linux/ioctl_cfg80211.h | 1 - .../rtl8812au/os_dep/linux/ioctl_linux.c | 91 +- .../realtek/rtl8812au/os_dep/linux/ioctl_mp.c | 91 +- .../realtek/rtl8812au/os_dep/linux/os_intfs.c | 124 +- .../rtl8812au/os_dep/linux/recv_linux.c | 4 +- .../rtl8812au/os_dep/linux/rhashtable.c | 1688 ++-- .../rtl8812au/os_dep/linux/rhashtable.h | 1654 +-- .../rtl8812au/os_dep/linux/rtw_android.c | 6 +- .../rtl8812au/os_dep/linux/rtw_cfgvendor.c | 2056 ---- .../rtl8812au/os_dep/linux/rtw_cfgvendor.h | 633 -- .../realtek/rtl8812au/os_dep/linux/rtw_proc.c | 50 +- .../realtek/rtl8812au/os_dep/linux/usb_intf.c | 182 +- .../rtl8812au/os_dep/linux/usb_ops_linux.c | 3 - .../rtl8812au/os_dep/linux/wifi_regd.c | 43 +- .../rtl8812au/os_dep/linux/xmit_linux.c | 8 +- .../realtek/rtl8812au/os_dep/osdep_service.c | 19 +- .../platform/platform_aml_s905_sdio.h | 4 + 298 files changed, 62794 insertions(+), 33600 deletions(-) mode change 100644 => 100755 drivers/net/wireless/realtek/rtl8812au/Makefile mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme_ext.c mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/core/rtw_recv.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c rename drivers/net/wireless/realtek/rtl8812au/{include/rtl8710b_sreset.h => hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h} (51%) create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c rename drivers/net/wireless/realtek/rtl8812au/{include/rtl8188e_dm.h => hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h} (55%) create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c rename drivers/net/wireless/realtek/rtl8812au/{include/rtl8703b_rf.h => hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h} (55%) create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c rename drivers/net/wireless/realtek/rtl8812au/{include/rtl8188f_sreset.h => hal/phydm/rtl8821a/halhwimg8821a_mac.h} (56%) create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c rename drivers/net/wireless/realtek/rtl8812au/{include/rtl8188f_rf.h => hal/phydm/rtl8821a/phydm_rtl8821a.h} (72%) rename drivers/net/wireless/realtek/rtl8812au/{include/rtl8821c_dm.h => hal/phydm/rtl8821a/version_rtl8821a.h} (66%) create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/hal8814a_fw.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_dm.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_halinit.c create mode 100644 drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyCfg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyReg.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPwrSeq.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/Hal8723PwrSeq.h mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/include/drv_conf.h mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/include/hal_data.h rename drivers/net/wireless/realtek/rtl8812au/include/linux/{wireless.h => old_unused_rtl_wireless.h} (100%) delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_led.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_rf.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_sreset.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_dm.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_led.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_dm.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_led.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_rf.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_sreset.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_dm.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_led.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_rf.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_sreset.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_dm.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_led.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_sreset.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_dm.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_led.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_lps_poff.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_rf.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_dm.h delete mode 100755 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_hal.h delete mode 100755 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_led.h delete mode 100755 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_rf.h delete mode 100755 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_sreset.h delete mode 100755 drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_cmd.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_dm.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_led.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_lps_poff.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_recv.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_rf.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_spec.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_sreset.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_xmit.h mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_cmd.h mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_hal.h mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_recv.h mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_spec.h mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_xmit.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_spec.h delete mode 100755 drivers/net/wireless/realtek/rtl8812au/include/rtl8821ce_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8821cs_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8821cu_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8822b_hal.h delete mode 100755 drivers/net/wireless/realtek/rtl8812au/include/rtl8822be_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8822bs_hal.h delete mode 100644 drivers/net/wireless/realtek/rtl8812au/include/rtl8822bu_hal.h rename drivers/net/wireless/realtek/rtl8812au/include/{autoconf.h => rtl_autoconf.h} (97%) mode change 100755 => 100644 drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.c delete mode 100644 drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.c delete mode 100644 drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.h diff --git a/drivers/net/wireless/realtek/Makefile b/drivers/net/wireless/realtek/Makefile index 62c8401ec2999e..2620f06c015989 100644 --- a/drivers/net/wireless/realtek/Makefile +++ b/drivers/net/wireless/realtek/Makefile @@ -9,7 +9,7 @@ obj-$(CONFIG_RTLWIFI) += rtlwifi/ obj-$(CONFIG_RTL8192CU) += rtl8192cu/ obj-$(CONFIG_RTL8XXXU) += rtl8xxxu/ obj-$(CONFIG_RTW88) += rtw88/ -obj-$(CONFIG_RTL8812AU) += rtl8812au/ +obj-$(CONFIG_88XXAU) += rtl8812au/ obj-$(CONFIG_RTL8192EU) += rtl8192eu/ obj-$(CONFIG_RTL8822BU) += rtl88x2bu/ obj-$(CONFIG_RTL8723BU) += rtl8723bu/ diff --git a/drivers/net/wireless/realtek/rtl8812au/Kconfig b/drivers/net/wireless/realtek/rtl8812au/Kconfig index f87653d5ae214e..59e3f3594531ac 100644 --- a/drivers/net/wireless/realtek/rtl8812au/Kconfig +++ b/drivers/net/wireless/realtek/rtl8812au/Kconfig @@ -1,6 +1,6 @@ -config RTL8812AU - tristate "Realtek 8812A USB WiFi" +config 88XXAU + tristate "Realtek 88XXau USB WiFi" depends on USB - ---help--- - Help message of RTL8812AU + help + Help message of 88XXau diff --git a/drivers/net/wireless/realtek/rtl8812au/Makefile b/drivers/net/wireless/realtek/rtl8812au/Makefile old mode 100644 new mode 100755 index 381607081003e0..b3b6ae720b09ac --- a/drivers/net/wireless/realtek/rtl8812au/Makefile +++ b/drivers/net/wireless/realtek/rtl8812au/Makefile @@ -1,57 +1,37 @@ -EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) -EXTRA_CFLAGS += -O1 -#EXTRA_CFLAGS += -O3 -#EXTRA_CFLAGS += -Wall -#EXTRA_CFLAGS += -Wextra -#EXTRA_CFLAGS += -Werror -#EXTRA_CFLAGS += -pedantic -#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes - +EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) -fno-pie +EXTRA_CFLAGS += -O3 EXTRA_CFLAGS += -Wno-unused-variable -EXTRA_CFLAGS += -Wno-unused-value +#EXTRA_CFLAGS += -Wno-unused-value EXTRA_CFLAGS += -Wno-unused-label -EXTRA_CFLAGS += -Wno-unused-parameter +#EXTRA_CFLAGS += -Wno-unused-parameter EXTRA_CFLAGS += -Wno-unused-function -EXTRA_CFLAGS += -Wno-unused -#EXTRA_CFLAGS += -Wno-uninitialized -EXTRA_CFLAGS += -Wno-vla -EXTRA_CFLAGS += -Wno-implicit-fallthrough - -GCC_VER_49 := $(shell echo `$(CC) -dumpversion | cut -f1-2 -d.` \>= 4.9 | bc ) -ifeq ($(GCC_VER_49),1) -EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later -endif +EXTRA_CFLAGS += -Wimplicit-fallthrough=0 +#EXTRA_CFLAGS += -Wno-parentheses-equality +#EXTRA_CFLAGS += -Wno-pointer-bool-conversion +EXTRA_CFLAGS += -Wno-unknown-pragmas +#EXTRA_CFLAGS += -Wno-unused +EXTRA_CFLAGS += -Wno-vla -g + +#GCC_VER_49 := $(shell echo `$(CC) -dumpversion | cut -f1-2 -d.` \>= 4.9 | bc ) +#ifeq ($(GCC_VER_49),1) +#EXTRA_CFLAGS += -Wno-date-time # Fix compile error && warning on gcc 4.9 and later +#endif EXTRA_CFLAGS += -I$(src)/include - -EXTRA_LDFLAGS += --strip-debug - -CONFIG_AUTOCFG_CP = n +EXTRA_LDFLAGS += --strip-all -O3 ########################## WIFI IC ############################ -CONFIG_MULTIDRV = n -CONFIG_RTL8188E = n CONFIG_RTL8812A = y -CONFIG_RTL8821A = n -CONFIG_RTL8192E = n -CONFIG_RTL8723B = n -CONFIG_RTL8814A = n -CONFIG_RTL8723C = n -CONFIG_RTL8188F = n -CONFIG_RTL8188GTV = n -CONFIG_RTL8822B = n -CONFIG_RTL8723D = n -CONFIG_RTL8821C = n -CONFIG_RTL8710B = n -CONFIG_RTL8192F = n +CONFIG_RTL8821A = y +CONFIG_RTL8814A = y ######################### Interface ########################### CONFIG_USB_HCI = y -CONFIG_PCI_HCI = n -CONFIG_SDIO_HCI = n -CONFIG_GSPI_HCI = n +########################### Android ########################### +CONFIG_SIGNAL_DISPLAY_DBM = y ########################## Features ########################### +CONFIG_NET_NS = y CONFIG_MP_INCLUDED = y -CONFIG_POWER_SAVING = y +CONFIG_POWER_SAVING = n CONFIG_USB_AUTOSUSPEND = n CONFIG_HW_PWRP_DETECTION = n CONFIG_BT_COEXIST = n @@ -73,7 +53,8 @@ CONFIG_80211W = y CONFIG_REDUCE_TX_CPU_LOADING = n CONFIG_BR_EXT = y CONFIG_TDLS = n -CONFIG_WIFI_MONITOR = n +CONFIG_WIFI_MONITOR = y +CONFIG_DISABLE_REGD_C = y CONFIG_MCC_MODE = n CONFIG_APPEND_VENDOR_IE_ENABLE = n CONFIG_RTW_NAPI = y @@ -89,7 +70,7 @@ CONFIG_IP_R_MONITOR = n #arp VOQ and high rate CONFIG_RTW_DEBUG = n # default log level is _DRV_INFO_ = 4, # please refer to "How_to_set_driver_debug_log_level.doc" to set the available level. -CONFIG_RTW_LOG_LEVEL = 4 +CONFIG_RTW_LOG_LEVEL = 2 ######################## Wake On Lan ########################## CONFIG_WOWLAN = n #bit2: deauth, bit1: unicast, bit0: magic pkt. @@ -112,10 +93,14 @@ CONFIG_RTW_SDIO_PM_KEEP_POWER = y CONFIG_MP_VHT_HW_TX_MODE = n ###################### Platform Related ####################### CONFIG_PLATFORM_I386_PC = n +CONFIG_PLATFORM_ANDROID_ARM64 = n CONFIG_PLATFORM_ARM_RPI = y +CONFIG_PLATFORM_ARM64_RPI = n +CONFIG_PLATFORM_ARM_NV_NANO = n CONFIG_PLATFORM_ANDROID_X86 = n CONFIG_PLATFORM_ANDROID_INTEL_X86 = n CONFIG_PLATFORM_JB_X86 = n +CONFIG_PLATFORM_OPENWRT_NEO2 = n CONFIG_PLATFORM_ARM_S3C2K4 = n CONFIG_PLATFORM_ARM_PXA2XX = n CONFIG_PLATFORM_ARM_S3C6K4 = n @@ -173,30 +158,35 @@ CONFIG_PLATFORM_NV_TK1_UBUNTU = n CONFIG_PLATFORM_RTL8197D = n CONFIG_PLATFORM_AML_S905 = n CONFIG_PLATFORM_ZTE_ZX296716 = n +CONFIG_PLATFORM_ARM_ODROIDC2 = n +CONFIG_PLATFORM_PPC = n ########### CUSTOMER ################################ CONFIG_CUSTOMER_HUAWEI_GENERAL = n CONFIG_DRVEXT_MODULE = n -export TopDIR ?= $(shell pwd) - -########### COMMON ################################# -ifeq ($(CONFIG_GSPI_HCI), y) -HCI_NAME = gspi +ifeq ($(CONFIG_RTL8812AU), ) +ifneq (,$(findstring /usr/lib/dkms,$(PATH))) + export TopDIR ?= $(shell pwd) +else +export TopDIR ?= $(srctree)/$(src) endif - -ifeq ($(CONFIG_SDIO_HCI), y) -HCI_NAME = sdio endif +########### COMMON ################################# ifeq ($(CONFIG_USB_HCI), y) HCI_NAME = usb endif -ifeq ($(CONFIG_PCI_HCI), y) -HCI_NAME = pci -endif +ifeq ($(CONFIG_RTL8812A)_$(CONFIG_RTL8821A)_$(CONFIG_RTL8814A), y_y_y) +EXTRA_CFLAGS += -DDRV_NAME=\"rtl88XXau\" +ifeq ($(CONFIG_USB_HCI), y) +USER_MODULE_NAME = 88XXau +endif +else +EXTRA_CFLAGS += -DDRV_NAME=\"rtl8812au\" +endif _OS_INTFS_FILES := os_dep/osdep_service.o \ os_dep/linux/os_intfs.o \ @@ -207,7 +197,6 @@ _OS_INTFS_FILES := os_dep/osdep_service.o \ os_dep/linux/mlme_linux.o \ os_dep/linux/recv_linux.o \ os_dep/linux/ioctl_cfg80211.o \ - os_dep/linux/rtw_cfgvendor.o \ os_dep/linux/wifi_regd.o \ os_dep/linux/rtw_android.o \ os_dep/linux/rtw_proc.o \ @@ -217,17 +206,6 @@ ifeq ($(CONFIG_MP_INCLUDED), y) _OS_INTFS_FILES += os_dep/linux/ioctl_mp.o endif -ifeq ($(CONFIG_SDIO_HCI), y) -_OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o -_OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o -endif - -ifeq ($(CONFIG_GSPI_HCI), y) -_OS_INTFS_FILES += os_dep/linux/custom_gpio_linux.o -_OS_INTFS_FILES += os_dep/linux/$(HCI_NAME)_ops_linux.o -endif - - _HAL_INTFS_FILES := hal/hal_intf.o \ hal/hal_com.o \ hal/hal_com_phycfg.o \ @@ -306,67 +284,6 @@ endif ifeq ($(CONFIG_SDIO_HCI), y) _HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8188E_SDIO.o endif - -endif - -########### HAL_RTL8192E ################################# -ifeq ($(CONFIG_RTL8192E), y) - -RTL871X = rtl8192e -ifeq ($(CONFIG_SDIO_HCI), y) -MODULE_NAME = 8192es -endif - -ifeq ($(CONFIG_USB_HCI), y) -MODULE_NAME = 8192eu -endif - -ifeq ($(CONFIG_PCI_HCI), y) -MODULE_NAME = 8192ee -endif -EXTRA_CFLAGS += -DCONFIG_RTL8192E -_HAL_INTFS_FILES += hal/HalPwrSeqCmd.o \ - hal/$(RTL871X)/Hal8192EPwrSeq.o\ - hal/$(RTL871X)/$(RTL871X)_xmit.o\ - hal/$(RTL871X)/$(RTL871X)_sreset.o - -_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_hal_init.o \ - hal/$(RTL871X)/$(RTL871X)_phycfg.o \ - hal/$(RTL871X)/$(RTL871X)_rf6052.o \ - hal/$(RTL871X)/$(RTL871X)_dm.o \ - hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ - hal/$(RTL871X)/$(RTL871X)_cmd.o \ - hal/$(RTL871X)/hal8192e_fw.o \ - hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ - hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ - hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ - hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o - -ifeq ($(CONFIG_SDIO_HCI), y) -_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -else -ifeq ($(CONFIG_GSPI_HCI), y) -_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o -else -_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o -endif -endif - -ifeq ($(CONFIG_USB_HCI), y) -_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_USB.o -endif -ifeq ($(CONFIG_PCI_HCI), y) -_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_PCIE.o -endif -ifeq ($(CONFIG_SDIO_HCI), y) -_HAL_INTFS_FILES +=hal/efuse/$(RTL871X)/HalEfuseMask8192E_SDIO.o -endif - -ifeq ($(CONFIG_BT_COEXIST), y) -_BTC_FILES += hal/btc/halbtc8192e1ant.o \ - hal/btc/halbtc8192e2ant.o -endif - endif ########### HAL_RTL8812A_RTL8821A ################################# @@ -538,18 +455,12 @@ endif ifeq ($(CONFIG_RTL8814A), y) ## ADD NEW VHT MP HW TX MODE ## #EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE -#CONFIG_MP_VHT_HW_TX_MODE = y +CONFIG_MP_VHT_HW_TX_MODE = n ########################################## RTL871X = rtl8814a ifeq ($(CONFIG_USB_HCI), y) MODULE_NAME = 8814au endif -ifeq ($(CONFIG_PCI_HCI), y) -MODULE_NAME = 8814ae -endif -ifeq ($(CONFIG_SDIO_HCI), y) -MODULE_NAME = 8814as -endif EXTRA_CFLAGS += -DCONFIG_RTL8814A @@ -914,7 +825,7 @@ _HAL_INTFS_FILES += \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_led.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_xmit.o \ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_SUB_NAME)_recv.o - + ifeq ($(CONFIG_PCI_HCI), y) _HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o else @@ -1210,9 +1121,12 @@ EXTRA_CFLAGS += -DCONFIG_MP_VHT_HW_TX_MODE ifeq ($(CONFIG_PLATFORM_I386_PC), y) ## For I386 X86 ToolChain use Hardware FLOATING EXTRA_CFLAGS += -mhard-float +EXTRA_CFLAGS += -DMARK_KERNEL_PFU else ## For ARM ToolChain use Hardware FLOATING -EXTRA_CFLAGS += -mfloat-abi=hard +# Raspbian kernel is with soft-float. +# 'softfp' allows FP instructions, but no FP on function call interfaces +EXTRA_CFLAGS += -mfloat-abi=softfp endif endif @@ -1230,11 +1144,11 @@ EXTRA_CFLAGS += -DDM_ODM_SUPPORT_TYPE=0x04 ifeq ($(CONFIG_PLATFORM_I386_PC), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT -SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) +SUBARCH := $(shell uname -m | sed -e "s/i.86/i386/; s/ppc/powerpc/; s/armv.l/arm/; s/aarch64/arm64/;") ARCH ?= $(SUBARCH) CROSS_COMPILE ?= -KVER ?= $(shell uname -r) -KSRC ?= /lib/modules/$(KVER)/build +KVER := $(shell uname -r) +KSRC := /lib/modules/$(KVER)/build MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ INSTALL_PREFIX := STAGINGMODDIR := /lib/modules/$(KVER)/kernel/drivers/staging @@ -1246,7 +1160,51 @@ EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ARCH ?= arm CROSS_COMPILE ?= KVER ?= $(shell uname -r) -KSRC ?= /lib/modules/$(KVER)/build +KSRC := /lib/modules/$(KVER)/build +MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ +INSTALL_PREFIX := +endif + +ifeq ($(CONFIG_PLATFORM_ARM64_RPI), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +ARCH ?= arm64 +CROSS_COMPILE ?= +KVER ?= $(shell uname -r) +KSRC := /lib/modules/$(KVER)/build +MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ +INSTALL_PREFIX := +endif + +ifeq ($(CONFIG_PLATFORM_ARM_NV_NANO), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +ARCH := arm64 +KVER := $(shell uname -r) +KSRC := /lib/modules/$(KVER)/build +MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ +INSTALL_PREFIX := +STAGINGMODDIR := /lib/modules/$(KVER)/kernel/drivers/staging +endif + +ifeq ($(CONFIG_PLATFORM_ARM_ODROIDC2), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +ARCH ?= arm64 +CROSS_COMPILE ?= +KVER ?= $(shell uname -r) +KSRC := /lib/modules/$(KVER)/build +MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ +INSTALL_PREFIX := +endif + +ifeq ($(CONFIG_PLATFORM_PPC), y) +EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN +SUBARCH := $(shell uname -m | sed -e s/ppc/powerpc/) +ARCH ?= $(SUBARCH) +CROSS_COMPILE ?= +KVER ?= $(shell uname -r) +KSRC := /lib/modules/$(KVER)/build MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ INSTALL_PREFIX := endif @@ -1295,7 +1253,6 @@ KSRC := $(KERNEL_BUILD_PATH) MODULE_NAME :=wlan endif - ifeq ($(CONFIG_PLATFORM_ACTIONS_ATM705X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC @@ -1374,6 +1331,17 @@ KVER:= 3.1.10 KSRC:= /usr/src/Mstar_kernel/3.1.10/ endif +ifeq ($(CONFIG_PLATFORM_ANDROID_ARM64), y) +# For this to work, change the "modules:" section is also needed, in order to build with CLANG. +# "$(MAKE) ARCH=$(ARCH) SUBARCH=$(ARCH) REAL_CC=${CC_DIR}/clang CLANG_TRIPLE=aarch64-linux-gnu- CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) O="$(KBUILD_OUTPUT)" modules" +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -fno-pic +EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC -DCONFIG_RADIO_WORK +#Enable this to have two interfaces: +#EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT +EXTRA_CFLAGS += -DCONFIG_P2P_IPS +endif + ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) @@ -1469,6 +1437,16 @@ CROSS_COMPILE := mips-openwrt-linux- KSRC := /home/alex/test_openwrt/tmp/linux-2.6.30.9 endif +# This is how I built for openwrt Neo2 platform. --Ben +ifeq ($(CONFIG_PLATFORM_OPENWRT_NEO2), y) +EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +ARCH := arm64 +CROSS_COMPILE := aarch64-openwrt-linux- +#export PATH=$PATH:/home/greearb/git/openwrt-neo2-dev/staging_dir/toolchain-aarch64_cortex-a53_gcc-7.3.0_musl/bin/ +#export STAGING_DIR=/home/greearb/git/openwrt-neo2-dev/staging_dir +KSRC := /home/greearb/git/openwrt-neo2-dev/build_dir/target-aarch64_cortex-a53_musl/linux-sunxi_cortexa53/linux-4.14.78 +endif + ifeq ($(CONFIG_PLATFORM_DMP_PHILIPS), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM ARCH := mips @@ -1507,13 +1485,15 @@ endif ifeq ($(CONFIG_PLATFORM_FS_MX61), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ARCH := arm -CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi- -KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env +CROSS_COMPILE ?= +KVER ?= $(shell uname -r) +KSRC := /lib/modules/$(KVER)/build +MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ +INSTALL_PREFIX := endif - - ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y) EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X ARCH := mips @@ -2177,7 +2157,6 @@ ifeq ($(CONFIG_PCI_HCI), y) MODULE_NAME := rtw_pci endif - endif USER_MODULE_NAME ?= @@ -2255,21 +2234,20 @@ $(MODULE_NAME)-y += $(_PLATFORM_FILES) $(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o -ifeq ($(CONFIG_RTL8723B), y) -$(MODULE_NAME)-$(CONFIG_MP_INCLUDED)+= core/rtw_bt_mp.o -endif - -obj-$(CONFIG_RTL8812AU) := $(MODULE_NAME).o +obj-$(CONFIG_88XXAU) := $(MODULE_NAME).o else -export CONFIG_RTL8812AU = m +export CONFIG_88XXAU = m all: modules modules: $(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) modules - + @echo "---------------------------------------------------------------------------" + @echo "Visit https://github.com/aircrack-ng/rtl8812au for support/reporting issues" + @echo "or check for newer versions (branches) of these drivers. " + @echo "---------------------------------------------------------------------------" strip: $(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded @@ -2319,24 +2297,20 @@ config_r: @echo "make config" /bin/bash script/Configure script/config.in - .PHONY: modules clean clean: #$(MAKE) -C $(KSRC) M=$(shell pwd) clean - cd hal ; rm -fr */*/*/*.mod.c */*/*/*.mod */*/*/*.o */*/*/*.o.* */*/*/.*.cmd */*/*/*.ko - cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/*.o.* */*/.*.cmd */*/*.ko - cd hal ; rm -fr */*.mod.c */*.mod */*.o */*.o.* */.*.cmd */*.ko - cd hal ; rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko - cd core/efuse ; rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko - cd core/mesh ; rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko - cd core ; rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko - cd os_dep/linux ; rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko - cd os_dep ; rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko - cd platform ; rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko + cd hal ; rm -fr */*/*/*.mod.c */*/*/*.mod */*/*/*.o */*/*/.*.cmd */*/*/*.ko + cd hal ; rm -fr */*/*.mod.c */*/*.mod */*/*.o */*/.*.cmd */*/*.ko + cd hal ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko + cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko + cd core ; rm -fr */*.mod.c */*.mod */*.o */.*.cmd */*.ko + cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko + cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko *.o.d + cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko + cd platform ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko rm -fr Module.symvers ; rm -fr Module.markers ; rm -fr modules.order - rm -fr *.mod.c *.mod *.o *.o.* .*.cmd *.ko *~ + rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~ rm -fr .tmp_versions - rm -fr .cache.mk endif - diff --git a/drivers/net/wireless/realtek/rtl8812au/core/efuse/rtw_efuse.c b/drivers/net/wireless/realtek/rtl8812au/core/efuse/rtw_efuse.c index 59b34646808dac..44d8ac4687b5a1 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/efuse/rtw_efuse.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/efuse/rtw_efuse.c @@ -931,7 +931,7 @@ void EFUSE_GetEfuseDefinition(PADAPTER adapter, u8 efusetype, u8 type, void *out *(u16 *)out = (u16)v32; return; - case TYPE_EFUSE_REAL_CONTENT_LEN: + case TYPE_EFUSE_REAL_CONTENT_LEN: rtw_halmac_get_physical_efuse_size(d, &v32); *(u16 *)out = (u16)v32; return; @@ -1035,7 +1035,7 @@ u8 rtw_efuse_bt_access(PADAPTER adapter, u8 write, u16 addr, u16 cnts, u8 *data) if (efuse) { err = rtw_halmac_read_bt_physical_efuse_map(d, efuse, size); - + if (err == -1) { RTW_ERR("%s: rtw_halmac_read_bt_physical_efuse_map fail!\n", __FUNCTION__); rtw_mfree(efuse, size); @@ -1309,7 +1309,7 @@ VOID hal_ReadEFuse_BT_logic_map( if (rtw_efuse_bt_access(padapter, _FALSE, 0, EFUSE_BT_REAL_CONTENT_LEN, phyefuse)) dump_buf(phyefuse, EFUSE_BT_REAL_BANK_CONTENT_LEN); - + total = BANK_NUM; for (bank = 1; bank <= total; bank++) { /* 8723d Max bake 0~2 */ eFuse_Addr = 0; @@ -1472,7 +1472,7 @@ static u8 hal_EfusePgPacketWrite2ByteHeader( /* RTW_INFO("%s: pg_header=0x%x\n", __FUNCTION__, pg_header); */ do { - + rtw_efuse_bt_access(padapter, _TRUE, efuse_addr, 1, &pg_header); rtw_efuse_bt_access(padapter, _FALSE, efuse_addr, 1, &tmp_header); @@ -1680,7 +1680,7 @@ u8 efuse_OneByteRead(struct _ADAPTER *a, u16 addr, u8 *data, u8 bPseudoTest) } return ret; - + } static u16 @@ -3093,7 +3093,7 @@ u8 rtw_efuse_file_read(PADAPTER padapter, u8 *filepatch, u8 *buf, u32 len) while ((j < len) && (i < count)) { if (ptmpbuf[i] == '\0') break; - + ptr = strpbrk(&ptmpbuf[i], " \t\n\r"); if (ptr) { if (ptr == &ptmpbuf[i]) { diff --git a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.c b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.c index 63a69541186861..95d0f15ce5174c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.c @@ -198,7 +198,7 @@ int rtw_bss_is_candidate_mesh_peer(WLAN_BSSID_EX *self, WLAN_BSSID_EX *target, u /* BSSBasicRateSet */ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { if (target->SupportedRates[i] == 0) - break; + break; if (target->SupportedRates[i] & 0x80) { u8 match = 0; @@ -208,7 +208,7 @@ int rtw_bss_is_candidate_mesh_peer(WLAN_BSSID_EX *self, WLAN_BSSID_EX *target, u match = rtw_is_basic_rate_ofdm(target->SupportedRates[i]); else match = rtw_is_basic_rate_mix(target->SupportedRates[i]); - } else { + } else { for (j = 0; j < NDIS_802_11_LENGTH_RATES_EX; j++) { if (self->SupportedRates[j] == 0) break; @@ -796,7 +796,7 @@ void rtw_mesh_peer_status_chk(_adapter *adapter) if (rtw_mesh_cto_mgate_required(adapter)) { flush = 1; goto flush_add; - } + } } } else { SET_CTO_MGATE_CONF_DISABLED(plink); @@ -953,7 +953,7 @@ u8 rtw_mesh_offch_candidate_accepted(_adapter *adapter) } /* - * this function is called under off channel candidate is required + * this function is called under off channel candidate is required * the channel with maximum candidate count is selected */ u8 rtw_mesh_select_operating_ch(_adapter *adapter) @@ -1191,7 +1191,7 @@ void rtw_mesh_sae_check_frames(_adapter *adapter, const u8 *buf, u32 len, u8 tx, #ifdef CONFIG_RTW_MESH_AEK static int rtw_mpm_ampe_dec(_adapter *adapter, struct mesh_plink_ent *plink , u8 *fhead, size_t flen, u8* fbody, u8 *mic_ie, u8 *ampe_buf) -{ +{ int ret = _FAIL, verify_ret; const u8 *aad[] = {adapter_mac_addr(adapter), plink->addr, fbody}; const size_t aad_len[] = {ETH_ALEN, ETH_ALEN, mic_ie - fbody}; @@ -1317,7 +1317,7 @@ static int rtw_mpm_tx_ies_sync_bss(_adapter *adapter, struct mesh_plink_ent *pli pos = BSS_EX_TLV_IES(network); while (left >= 2) { u8 id, elen; - + id = *pos++; elen = *pos++; left -= 2; @@ -1359,7 +1359,7 @@ static int rtw_mpm_tx_ies_sync_bss(_adapter *adapter, struct mesh_plink_ent *pli pos = BSS_EX_TLV_IES(network); while (left >= 2) { u8 id, elen; - + id = *pos++; elen = *pos++; left -= 2; @@ -1729,7 +1729,7 @@ static int rtw_mpm_check_frames(_adapter *adapter, u8 action, const u8 **buf, si plink->rx_conf_ies = ies; plink->rx_conf_ies_len = ies_len; } - #ifdef CONFIG_RTW_MESH_DRIVER_AID + #ifdef CONFIG_RTW_MESH_DRIVER_AID else { plink->tx_conf_ies = ies; plink->tx_conf_ies_len = ies_len; @@ -2433,7 +2433,7 @@ int rtw_mesh_peer_establish(_adapter *adapter, struct mesh_plink_ent *plink, str if (rtw_ap_parse_sta_supported_rates(adapter, sta, tlv_ies, tlv_ieslen) != _STATS_SUCCESSFUL_) goto exit; - + if (rtw_ap_parse_sta_security_ie(adapter, sta, &elems) != _STATS_SUCCESSFUL_) goto exit; @@ -3082,11 +3082,11 @@ void rtw_mesh_init_mesh_info(_adapter *adapter) _rtw_memset(minfo, 0, sizeof(struct rtw_mesh_info)); rtw_mesh_plink_ctl_init(adapter); - + minfo->last_preq = rtw_get_current_time(); /* minfo->last_sn_update = rtw_get_current_time(); */ minfo->next_perr = rtw_get_current_time(); - + ATOMIC_SET(&minfo->mpaths, 0); rtw_mesh_pathtbl_init(adapter); @@ -3099,7 +3099,7 @@ void rtw_mesh_init_mesh_info(_adapter *adapter) _rtw_init_listhead(&minfo->preq_queue.list); _rtw_spinlock_init(&minfo->mesh_preq_queue_lock); - + rtw_init_timer(&adapter->mesh_path_timer, adapter, rtw_ieee80211_mesh_path_timer, adapter); rtw_init_timer(&adapter->mesh_path_root_timer, adapter, rtw_ieee80211_mesh_path_root_timer, adapter); rtw_init_timer(&adapter->mesh_atlm_param_req_timer, adapter, rtw_mesh_atlm_param_req_timer, adapter); @@ -3260,7 +3260,7 @@ static bool rtw_mesh_data_bmc_to_uc(_adapter *adapter sta = LIST_CONTAINOR(list, struct sta_info, asoc_list); list = get_next(list); - + stainfo_offset = rtw_stainfo_offset(stapriv, sta); if (stainfo_offset_valid(stainfo_offset)) b2u_sta_id[b2u_sta_num++] = stainfo_offset; @@ -3342,7 +3342,7 @@ int rtw_mesh_addr_resolve(_adapter *adapter, struct xmit_frame *xframe, _pkt *pk res = _FAIL; goto exit; } - + xframe->pkt = pkt; #if CONFIG_RTW_MESH_DATA_BMC_TO_UC _rtw_init_listhead(b2u_list); @@ -3350,9 +3350,9 @@ int rtw_mesh_addr_resolve(_adapter *adapter, struct xmit_frame *xframe, _pkt *pk is_da_mcast = IS_MCAST(etherhdr.h_dest); if (!is_da_mcast) { - struct sta_info *next_hop; + struct sta_info *next_hop; bool mpp_lookup = 1; - + mpath = rtw_mesh_path_lookup(adapter, etherhdr.h_dest); if (mpath) { mpp_lookup = 0; @@ -3452,7 +3452,7 @@ s8 rtw_mesh_tx_set_whdr_mctrl_len(u8 mesh_frame_mode, struct pkt_attrib *attrib) RTW_WARN("Invalid mesh frame mode:%u\n", mesh_frame_mode); ret = -1; break; - } + } return ret; } @@ -3538,7 +3538,7 @@ u8 rtw_mesh_tx_build_whdr(_adapter *adapter, struct pkt_attrib *attrib RTW_WARN("Invalid mesh frame mode\n"); break; } - + return 0; } @@ -3681,7 +3681,7 @@ int rtw_mesh_rx_data_validate_mctrl(_adapter *adapter, union recv_frame *rframe } else *mctrl_len = mlen; - return ret; + return ret; } inline int rtw_mesh_rx_validate_mctrl_non_amsdu(_adapter *adapter, union recv_frame *rframe) @@ -3766,7 +3766,7 @@ int rtw_mesh_rx_msdu_act_check(union recv_frame *rframe struct rtw_mesh_info *minfo = &adapter->mesh_info; struct rx_pkt_attrib *rattrib = &rframe->u.hdr.attrib; struct rtw_mesh_path *mppath; - u8 is_mda_bmc = IS_MCAST(mda); + u8 is_mda_bmc = IS_MCAST(mda); u8 is_mda_self = !is_mda_bmc && _rtw_memcmp(mda, adapter_mac_addr(adapter), ETH_ALEN); struct xmit_frame *xframe; struct pkt_attrib *xattrib; diff --git a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.h b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.h index ad2d986424657a..73694f84df4dc7 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.h +++ b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh.h @@ -376,7 +376,7 @@ struct rtw_mesh_info { systime next_perr; /* Last used Path Discovery ID */ u32 preq_id; - + ATOMIC_T mpaths; struct rtw_mesh_table *mesh_paths; struct rtw_mesh_table *mpp_paths; diff --git a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_hwmp.c b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_hwmp.c index 6dfa701c74faf7..f64aa3de9d30b4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_hwmp.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_hwmp.c @@ -210,7 +210,7 @@ static int rtw_mesh_path_sel_frame_tx(enum rtw_mpath_frame_type mpath_action, u8 const u8 *originator_addr, u32 originator_sn, u8 target_flags, const u8 *target, u32 target_sn, const u8 *da, u8 hopcount, u8 ttl, - u32 lifetime, u32 metric, u32 preq_id, + u32 lifetime, u32 metric, u32 preq_id, _adapter *adapter) { struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); @@ -390,7 +390,7 @@ int rtw_mesh_path_error_tx(_adapter *adapter, dump_mgntframe(adapter, pmgntframe); RTW_HWMP_DBG("TX PERR toward "MAC_FMT", ra = "MAC_FMT"\n", MAC_ARG(target), MAC_ARG(ra)); - + return 0; } @@ -616,7 +616,7 @@ void rtw_ieee80211s_update_metric(_adapter *adapter, u8 mac_id, sta->metrics.total_pkt = total_pkt; rtw_ewma_err_rate_add(&sta->metrics.err_rate, per); - if (rtw_ewma_err_rate_read(&sta->metrics.err_rate) > + if (rtw_ewma_err_rate_read(&sta->metrics.err_rate) > RTW_LINK_FAIL_THRESH) rtw_mesh_plink_broken(sta); } @@ -1018,7 +1018,7 @@ static void rtw_hwmp_rann_frame_process(_adapter *adapter, _rtw_memcpy(path->add_chk_rann_snd_addr, path->rann_snd_addr, ETH_ALEN); preq_node_flag |= RTW_PREQ_Q_F_CHK; - + } #endif rtw_mesh_queue_preq(path, preq_node_flag); @@ -1159,7 +1159,7 @@ static u32 rtw_hwmp_route_info_get(_adapter *adapter, rtw_mesh_path_activate(path); #ifdef CONFIG_RTW_MESH_ADD_ROOT_CHK if (path->is_root && (action == RTW_MPATH_PREP)) { - _rtw_memcpy(path->rann_snd_addr, + _rtw_memcpy(path->rann_snd_addr, mgmt->addr2, ETH_ALEN); path->rann_metric = new_metric; } diff --git a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.c b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.c index 38a995b9e70244..d8791603dc0fb2 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.c @@ -891,7 +891,7 @@ static void rtw_table_flush_by_iface(struct rtw_mesh_table *tbl) if (!tbl) return; - + ret = rtw_rhashtable_walk_enter(&tbl->rhead, &iter); if (ret) return; diff --git a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.h b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.h index 9059ab2e52b7bd..650b239f50066d 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.h +++ b/drivers/net/wireless/realtek/rtl8812au/core/mesh/rtw_mesh_pathtbl.h @@ -42,7 +42,7 @@ * With this flag, It will try the last used rann_snd_addr * @RTW_MESH_PATH_PEER_AKA: only used toward a peer, only used in active keep * alive mechanism. PREQ's da = path dst - * + * * RTW_MESH_PATH_RESOLVED is used by the mesh path timer to * decide when to stop or cancel the mesh path discovery. */ diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_ap.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_ap.c index 1aebe07b3147e5..bc78e9c1940274 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_ap.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_ap.c @@ -59,7 +59,7 @@ u8 rtw_set_tim_ie(u8 dtim_cnt, u8 dtim_period if (tim_bmp[i]) break; n1 = i & 0xFE; - + /* find the last nonzero octet in tim_bitmap, except octet 0 */ for (i = tim_bmp_len - 1; i > 0; i--) if (tim_bmp[i]) @@ -359,7 +359,7 @@ static void rtw_check_restore_rf18(_adapter *padapter) struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); u32 reg; u8 union_ch = 0, union_bw = 0, union_offset = 0, setchbw = _FALSE; - + reg = rtw_hal_read_rfreg(padapter, 0, 0x18, 0x3FF); if ((reg & 0xFF) == 0) setchbw = _TRUE; @@ -728,7 +728,11 @@ void expire_timeout_chk(_adapter *padapter) RTW_INFO(FUNC_ADPT_FMT" asoc expire "MAC_FMT", state=0x%x\n" , FUNC_ADPT_ARG(padapter), MAC_ARG(psta->cmn.mac_addr), psta->state); + #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _FALSE); + #else + updated |= ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING, _TRUE); + #endif #ifdef CONFIG_RTW_MESH if (MLME_IS_MESH(padapter)) rtw_mesh_expire_peer(padapter, sta_addr); @@ -1515,7 +1519,7 @@ static void rtw_ap_check_scan(_adapter *padapter) if (_FALSE == ATOMIC_READ(&pmlmepriv->olbc_ht)) ATOMIC_SET(&pmlmepriv->olbc_ht, _TRUE); - + if (padapter->registrypriv.wifi_spec) RTW_INFO("%s: %s is a/b/g ap\n", __func__, pnetwork->network.Ssid.Ssid); } @@ -1732,7 +1736,7 @@ void start_bss_network(_adapter *padapter, struct createbss_parm *parm) #ifdef CONFIG_MCC_MODE if (MCC_EN(padapter)) { - /* + /* * due to check under rtw_ap_chbw_decision * if under MCC mode, means req channel setting is the same as current channel setting * if not under MCC mode, mean req channel setting is not the same as current channel setting @@ -2044,7 +2048,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) pbss_network->IELength = pbss_network->IELength - *(p+1) - 2; ret_rm = rtw_ies_remove_ie(ie , &len, _BEACON_IE_OFFSET_, _ERPINFO_IE_,NULL,0); RTW_DBG("%s, remove_ie of ERP_IE=%d\n", __FUNCTION__, ret_rm); - } else + } else ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); } @@ -2075,7 +2079,7 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; /* - Kernel < v5.1, the auth_type set as NL80211_AUTHTYPE_AUTOMATIC + Kernel < v5.1, the auth_type set as NL80211_AUTHTYPE_AUTOMATIC in cfg80211_rtw_start_ap(). if the AKM SAE in the RSN IE, we have to update the auth_type for SAE in rtw_check_beacon_data(). @@ -2428,9 +2432,9 @@ int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) /* Parsing VHT OPERATION IE */ if (vht_cap == _TRUE - && MLME_IS_MESH(padapter) /* allow only mesh temporarily before VHT IE checking is ready */ ) { - rtw_check_for_vht20(padapter, ie + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_); + if(MLME_IS_MESH(padapter)) /* allow only mesh temporarily before VHT IE checking is ready */ + rtw_check_for_vht20(padapter, ie + _BEACON_IE_OFFSET_, pbss_network->IELength - _BEACON_IE_OFFSET_); pmlmepriv->ori_vht_en = 1; pmlmepriv->vhtpriv.vht_option = _TRUE; } else if (REGSTY_IS_11AC_AUTO(pregistrypriv)) { @@ -4704,7 +4708,7 @@ u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp rtw_hal_set_mcc_setting_disconnect(adapter); } - } + } } #endif /* CONFIG_MCC_MODE */ @@ -4827,7 +4831,7 @@ u8 rtw_ap_chbw_decision(_adapter *adapter, u8 ifbmp, u8 excl_ifbmp u8 tmp_ch = dec_ch[i]; u8 tmp_bw = dec_bw[i]; u8 tmp_offset = dec_offset[i]; - + rtw_adjust_chbw(adapter, tmp_ch, &tmp_bw, &tmp_offset); rtw_get_offset_by_chbw(tmp_ch, tmp_bw, &tmp_offset); @@ -5256,7 +5260,7 @@ u16 rtw_ap_parse_sta_security_ie(_adapter *adapter, struct sta_info *sta, struct sta->flags |= WLAN_STA_MFP; } else #endif - if ((sec->mfp_opt == MFP_REQUIRED && mfp_opt == MFP_NO) || mfp_opt == MFP_INVALID) + if ((sec->mfp_opt == MFP_REQUIRED && mfp_opt == MFP_NO) || mfp_opt == MFP_INVALID) status = WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION; else if (sec->mfp_opt >= MFP_OPTIONAL && mfp_opt >= MFP_OPTIONAL) sta->flags |= WLAN_STA_MFP; diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_btcoex.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_btcoex.c index 28e5600d5650f2..d5b89bdc30f826 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_btcoex.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_btcoex.c @@ -506,7 +506,7 @@ u8 rtw_btcoex_get_ant_div_cfg(PADAPTER padapter) PHAL_DATA_TYPE pHalData; pHalData = GET_HAL_DATA(padapter); - + return (pHalData->AntDivCfg == 0) ? _FALSE : _TRUE; } diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.c index bd83fcfd83097b..34263a5fd1b4b4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.c @@ -1,1193 +1,1193 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2018 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#define _RTW_CHPLAN_C_ - -#include - -#define RTW_DOMAIN_MAP_VER "37e" -#define RTW_COUNTRY_MAP_VER "22" - -#ifdef LEGACY_CHANNEL_PLAN_REF -/******************************************************** -ChannelPlan definitions -*********************************************************/ -static RT_CHANNEL_PLAN legacy_channel_plan[] = { - /* 0x00, RTW_CHPLAN_FCC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 32}, - /* 0x01, RTW_CHPLAN_IC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 31}, - /* 0x02, RTW_CHPLAN_ETSI */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, - /* 0x03, RTW_CHPLAN_SPAIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x04, RTW_CHPLAN_FRANCE */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x05, RTW_CHPLAN_MKK */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x06, RTW_CHPLAN_MKK1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x07, RTW_CHPLAN_ISRAEL */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, - /* 0x08, RTW_CHPLAN_TELEC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, - /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, - /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, - /* 0x0B, RTW_CHPLAN_TAIWAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 26}, - /* 0x0C, RTW_CHPLAN_CHINA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 149, 153, 157, 161, 165}, 18}, - /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24}, - /* 0x0E, RTW_CHPLAN_KOREA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 31}, - /* 0x0F, RTW_CHPLAN_TURKEY */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19}, - /* 0x10, RTW_CHPLAN_JAPAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, - /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}, 20}, - /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48}, 17}, - /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 37}, - /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 149, 153, 157, 161, 165}, 19}, -}; -#endif - -enum rtw_rd_2g { - RTW_RD_2G_NULL = 0, - RTW_RD_2G_WORLD = 1, /* Worldwird 13 */ - RTW_RD_2G_ETSI1 = 2, /* Europe */ - RTW_RD_2G_FCC1 = 3, /* US */ - RTW_RD_2G_MKK1 = 4, /* Japan */ - RTW_RD_2G_ETSI2 = 5, /* France */ - RTW_RD_2G_GLOBAL = 6, /* Global domain */ - RTW_RD_2G_MKK2 = 7, /* Japan */ - RTW_RD_2G_FCC2 = 8, /* US */ - RTW_RD_2G_IC1 = 9, /* Canada */ - RTW_RD_2G_WORLD1 = 10, /* Worldwide 11 */ - RTW_RD_2G_KCC1 = 11, /* Korea */ - RTW_RD_2G_IC2 = 12, /* Canada */ - - RTW_RD_2G_MAX, -}; - -enum rtw_rd_5g { - RTW_RD_5G_NULL = 0, /* */ - RTW_RD_5G_ETSI1 = 1, /* Europe */ - RTW_RD_5G_ETSI2 = 2, /* Australia, New Zealand */ - RTW_RD_5G_ETSI3 = 3, /* Russia */ - RTW_RD_5G_FCC1 = 4, /* US */ - RTW_RD_5G_FCC2 = 5, /* FCC w/o DFS Channels */ - RTW_RD_5G_FCC3 = 6, /* Bolivia, Chile, El Salvador, Venezuela */ - RTW_RD_5G_FCC4 = 7, /* Venezuela */ - RTW_RD_5G_FCC5 = 8, /* China */ - RTW_RD_5G_FCC6 = 9, /* */ - RTW_RD_5G_FCC7 = 10, /* US(w/o Weather radar) */ - RTW_RD_5G_IC1 = 11, /* Canada(w/o Weather radar) */ - RTW_RD_5G_KCC1 = 12, /* Korea */ - RTW_RD_5G_MKK1 = 13, /* Japan */ - RTW_RD_5G_MKK2 = 14, /* Japan (W52, W53) */ - RTW_RD_5G_MKK3 = 15, /* Japan (W56) */ - RTW_RD_5G_NCC1 = 16, /* Taiwan, (w/o Weather radar) */ - RTW_RD_5G_NCC2 = 17, /* Taiwan, Band2, Band4 */ - RTW_RD_5G_NCC3 = 18, /* Taiwan w/o DFS, Band4 only */ - RTW_RD_5G_ETSI4 = 19, /* Europe w/o DFS, Band1 only */ - RTW_RD_5G_ETSI5 = 20, /* Australia, New Zealand(w/o Weather radar) */ - RTW_RD_5G_FCC8 = 21, /* Latin America */ - RTW_RD_5G_ETSI6 = 22, /* Israel, Bahrain, Egypt, India, China, Malaysia */ - RTW_RD_5G_ETSI7 = 23, /* China */ - RTW_RD_5G_ETSI8 = 24, /* Jordan */ - RTW_RD_5G_ETSI9 = 25, /* Lebanon */ - RTW_RD_5G_ETSI10 = 26, /* Qatar */ - RTW_RD_5G_ETSI11 = 27, /* Russia */ - RTW_RD_5G_NCC4 = 28, /* Taiwan, (w/o Weather radar) */ - RTW_RD_5G_ETSI12 = 29, /* Indonesia */ - RTW_RD_5G_FCC9 = 30, /* (w/o Weather radar) */ - RTW_RD_5G_ETSI13 = 31, /* (w/o Weather radar) */ - RTW_RD_5G_FCC10 = 32, /* Argentina(w/o Weather radar) */ - RTW_RD_5G_MKK4 = 33, /* Japan (W52) */ - RTW_RD_5G_ETSI14 = 34, /* Russia */ - RTW_RD_5G_FCC11 = 35, /* US(include CH144) */ - RTW_RD_5G_ETSI15 = 36, /* Malaysia */ - RTW_RD_5G_MKK5 = 37, /* Japan */ - RTW_RD_5G_ETSI16 = 38, /* Europe */ - RTW_RD_5G_ETSI17 = 39, /* Europe */ - RTW_RD_5G_FCC12 = 40, /* FCC */ - RTW_RD_5G_FCC13 = 41, /* FCC */ - RTW_RD_5G_FCC14 = 42, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ - RTW_RD_5G_FCC15 = 43, /* FCC w/o Band3 */ - RTW_RD_5G_FCC16 = 44, /* FCC w/o Band3 */ - RTW_RD_5G_ETSI18 = 45, /* ETSI w/o DFS Band2&3 */ - RTW_RD_5G_ETSI19 = 46, /* Europe */ - RTW_RD_5G_FCC17 = 47, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ - RTW_RD_5G_ETSI20 = 48, /* Europe */ - RTW_RD_5G_IC2 = 49, /* Canada(w/o Weather radar), include ch144 */ - RTW_RD_5G_ETSI21 = 50, /* Australia, New Zealand(w/o Weather radar) */ - RTW_RD_5G_FCC18 = 51, /* */ - RTW_RD_5G_WORLD = 52, /* Worldwide */ - RTW_RD_5G_CHILE1 = 53, /* Chile */ - RTW_RD_5G_ACMA1 = 54, /* Australia, New Zealand (w/o Weather radar) (w/o Ch120~Ch128) */ - RTW_RD_5G_WORLD1 = 55, /* 5G Worldwide Band1&2 */ - RTW_RD_5G_CHILE2 = 56, /* Chile (Band2,Band3) */ - RTW_RD_5G_KCC2 = 57, /* Korea (New standard) */ - - /* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */ - RTW_RD_5G_OLD_FCC1, - RTW_RD_5G_OLD_NCC1, - RTW_RD_5G_OLD_KCC1, - - RTW_RD_5G_MAX, -}; - -struct ch_list_t { - u8 *len_ch; -}; - -#define CH_LIST_ENT(_len, arg...) \ - {.len_ch = (u8[_len + 1]) {_len, ##arg}, } - -#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch[0]) -#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch[_i + 1]) - -struct chplan_ent_t { - u8 rd_2g; -#ifdef CONFIG_IEEE80211_BAND_5GHZ - u8 rd_5g; -#endif - u8 regd; /* value of REGULATION_TXPWR_LMT */ -}; - -#ifdef CONFIG_IEEE80211_BAND_5GHZ -#define CHPLAN_ENT(i2g, i5g, regd) {i2g, i5g, regd} -#else -#define CHPLAN_ENT(i2g, i5g, regd) {i2g, regd} -#endif - -static struct ch_list_t RTW_ChannelPlan2G[] = { - /* 0, RTW_RD_2G_NULL */ CH_LIST_ENT(0), - /* 1, RTW_RD_2G_WORLD */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 2, RTW_RD_2G_ETSI1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 3, RTW_RD_2G_FCC1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), - /* 4, RTW_RD_2G_MKK1 */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), - /* 5, RTW_RD_2G_ETSI2 */ CH_LIST_ENT(4, 10, 11, 12, 13), - /* 6, RTW_RD_2G_GLOBAL */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), - /* 7, RTW_RD_2G_MKK2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 8, RTW_RD_2G_FCC2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 9, RTW_RD_2G_IC1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 10, RTW_RD_2G_WORLD1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), - /* 11, RTW_RD_2G_KCC1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), - /* 12, RTW_RD_2G_IC2 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), -}; - -#ifdef CONFIG_IEEE80211_BAND_5GHZ -static struct ch_list_t RTW_ChannelPlan5G[] = { - /* 0, RTW_RD_5G_NULL */ CH_LIST_ENT(0), - /* 1, RTW_RD_5G_ETSI1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 2, RTW_RD_5G_ETSI2 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 3, RTW_RD_5G_ETSI3 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165), - /* 4, RTW_RD_5G_FCC1 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 5, RTW_RD_5G_FCC2 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), - /* 6, RTW_RD_5G_FCC3 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 7, RTW_RD_5G_FCC4 */ CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161), - /* 8, RTW_RD_5G_FCC5 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), - /* 9, RTW_RD_5G_FCC6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 10, RTW_RD_5G_FCC7 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 11, RTW_RD_5G_IC1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 12, RTW_RD_5G_KCC1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161), - /* 13, RTW_RD_5G_MKK1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 14, RTW_RD_5G_MKK2 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 15, RTW_RD_5G_MKK3 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 16, RTW_RD_5G_NCC1 */ CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 17, RTW_RD_5G_NCC2 */ CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165), - /* 18, RTW_RD_5G_NCC3 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), - /* 19, RTW_RD_5G_ETSI4 */ CH_LIST_ENT(4, 36, 40, 44, 48), - /* 20, RTW_RD_5G_ETSI5 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 21, RTW_RD_5G_FCC8 */ CH_LIST_ENT(4, 149, 153, 157, 161), - /* 22, RTW_RD_5G_ETSI6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 23, RTW_RD_5G_ETSI7 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 24, RTW_RD_5G_ETSI8 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), - /* 25, RTW_RD_5G_ETSI9 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), - /* 26, RTW_RD_5G_ETSI10 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), - /* 27, RTW_RD_5G_ETSI11 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165), - /* 28, RTW_RD_5G_NCC4 */ CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 29, RTW_RD_5G_ETSI12 */ CH_LIST_ENT(4, 149, 153, 157, 161), - /* 30, RTW_RD_5G_FCC9 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 31, RTW_RD_5G_ETSI13 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), - /* 32, RTW_RD_5G_FCC10 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161), - /* 33, RTW_RD_5G_MKK4 */ CH_LIST_ENT(4, 36, 40, 44, 48), - /* 34, RTW_RD_5G_ETSI14 */ CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140), - /* 35, RTW_RD_5G_FCC11 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 36, RTW_RD_5G_ETSI15 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165), - /* 37, RTW_RD_5G_MKK5 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 38, RTW_RD_5G_ETSI16 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 39, RTW_RD_5G_ETSI17 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 40, RTW_RD_5G_FCC12*/ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 41, RTW_RD_5G_FCC13 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 42, RTW_RD_5G_FCC14 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 43, RTW_RD_5G_FCC15 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 44, RTW_RD_5G_FCC16 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 45, RTW_RD_5G_ETSI18 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), - /* 46, RTW_RD_5G_ETSI19 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - /* 47, RTW_RD_5G_FCC17 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), - /* 48, RTW_RD_5G_ETSI20 */ CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165), - /* 49, RTW_RD_5G_IC2 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 50, RTW_RD_5G_ETSI21 */ CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 51, RTW_RD_5G_FCC18 */ CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140), - /* 52, RTW_RD_5G_WORLD */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 53, RTW_RD_5G_CHILE1 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), - /* 54, RTW_RD_5G_ACMA1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), - /* 55, RTW_RD_5G_WORLD1 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), - /* 56, RTW_RD_5G_CHILE2 */ CH_LIST_ENT(16, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144), - /* 57, RTW_RD_5G_KCC2 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), - - /* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */ - /* RTW_RD_5G_OLD_FCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), - /* RTW_RD_5G_OLD_NCC1 */ CH_LIST_ENT(15, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), - /* RTW_RD_5G_OLD_KCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165), -}; -#endif /* CONFIG_IEEE80211_BAND_5GHZ */ - -static struct chplan_ent_t RTW_ChannelPlanMap[RTW_CHPLAN_MAX] = { - /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_KCC1, TXPWR_LMT_FCC), /* 0x00, RTW_CHPLAN_FCC */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_FCC1, TXPWR_LMT_FCC), /* 0x01, RTW_CHPLAN_IC */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x02, RTW_CHPLAN_ETSI */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x03, RTW_CHPLAN_SPAIN */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x04, RTW_CHPLAN_FRANCE */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x05, RTW_CHPLAN_MKK */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x06, RTW_CHPLAN_MKK1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x07, RTW_CHPLAN_ISRAEL */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC6, TXPWR_LMT_MKK), /* 0x08, RTW_CHPLAN_TELEC */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_NCC1, TXPWR_LMT_FCC), /* 0x0B, RTW_CHPLAN_TAIWAN */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x0C, RTW_CHPLAN_CHINA */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC3, TXPWR_LMT_WW), /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_KCC1, TXPWR_LMT_ETSI), /* 0x0E, RTW_CHPLAN_KOREA */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x0F, RTW_CHPLAN_TURKEY */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_MKK), /* 0x10, RTW_CHPLAN_JAPAN */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_ETSI), /* 0x15, RTW_CHPLAN_ETSI_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NCC1, TXPWR_LMT_ETSI), /* 0x16, RTW_CHPLAN_KOREA_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1A, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1B, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1C, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1D, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1E, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */ - - /* ===== 0x20 ~ 0x7F, new channel plan ===== */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x20, RTW_CHPLAN_WORLD_NULL */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x21, RTW_CHPLAN_ETSI1_NULL */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x22, RTW_CHPLAN_FCC1_NULL */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x23, RTW_CHPLAN_MKK1_NULL */ - CHPLAN_ENT(RTW_RD_2G_ETSI2, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x24, RTW_CHPLAN_ETSI2_NULL */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x25, RTW_CHPLAN_FCC1_FCC1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x26, RTW_CHPLAN_WORLD_ETSI1 */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x27, RTW_CHPLAN_MKK1_MKK1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_KCC1, TXPWR_LMT_KCC), /* 0x28, RTW_CHPLAN_WORLD_KCC1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x29, RTW_CHPLAN_WORLD_FCC2 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x2A, RTW_CHPLAN_FCC2_NULL */ - CHPLAN_ENT(RTW_RD_2G_IC1, RTW_RD_5G_IC2, TXPWR_LMT_IC), /* 0x2B, RTW_CHPLAN_IC1_IC2 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x2C, RTW_CHPLAN_MKK2_NULL */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE1, TXPWR_LMT_CHILE), /* 0x2D, RTW_CHPLAN_WORLD_CHILE1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD1, RTW_RD_5G_WORLD1, TXPWR_LMT_WW), /* 0x2E, RTW_CHPLAN_WORLD1_WORLD1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE2, TXPWR_LMT_CHILE), /* 0x2F, RTW_CHPLAN_WORLD_CHILE2 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC3, TXPWR_LMT_FCC), /* 0x30, RTW_CHPLAN_WORLD_FCC3 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC4, TXPWR_LMT_FCC), /* 0x31, RTW_CHPLAN_WORLD_FCC4 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x32, RTW_CHPLAN_WORLD_FCC5 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC6, TXPWR_LMT_FCC), /* 0x33, RTW_CHPLAN_WORLD_FCC6 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x34, RTW_CHPLAN_FCC1_FCC7 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI2, TXPWR_LMT_ETSI), /* 0x35, RTW_CHPLAN_WORLD_ETSI2 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI3, TXPWR_LMT_ETSI), /* 0x36, RTW_CHPLAN_WORLD_ETSI3 */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK2, TXPWR_LMT_MKK), /* 0x37, RTW_CHPLAN_MKK1_MKK2 */ - CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK3, TXPWR_LMT_MKK), /* 0x38, RTW_CHPLAN_MKK1_MKK3 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC1, TXPWR_LMT_FCC), /* 0x39, RTW_CHPLAN_FCC1_NCC1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x3A, RTW_CHPLAN_ETSI1_ETSI1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x3B, RTW_CHPLAN_ETSI1_ACMA1 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x3C, RTW_CHPLAN_ETSI1_ETSI6 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x3D, RTW_CHPLAN_ETSI1_ETSI12 */ - CHPLAN_ENT(RTW_RD_2G_KCC1, RTW_RD_5G_KCC2, TXPWR_LMT_KCC), /* 0x3E, RTW_CHPLAN_KCC1_KCC2 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC11, TXPWR_LMT_FCC), /* 0x3F, RTW_CHPLAN_FCC1_FCC11*/ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x40, RTW_CHPLAN_FCC1_NCC2 */ - CHPLAN_ENT(RTW_RD_2G_GLOBAL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x41, RTW_CHPLAN_GLOBAL_NULL */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI4, TXPWR_LMT_ETSI), /* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x43, RTW_CHPLAN_FCC1_FCC2 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC3, TXPWR_LMT_FCC), /* 0x44, RTW_CHPLAN_FCC1_NCC3 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x45, RTW_CHPLAN_WORLD_ACMA1 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC8, TXPWR_LMT_FCC), /* 0x46, RTW_CHPLAN_FCC1_FCC8 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x47, RTW_CHPLAN_WORLD_ETSI6 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI7, TXPWR_LMT_ETSI), /* 0x48, RTW_CHPLAN_WORLD_ETSI7 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x49, RTW_CHPLAN_WORLD_ETSI8 */ - CHPLAN_ENT(RTW_RD_2G_IC2, RTW_RD_5G_IC2, TXPWR_LMT_IC), /* 0x4A, RTW_CHPLAN_IC2_IC2 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4B, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4C, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4D, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4E, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4F, */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI9, TXPWR_LMT_ETSI), /* 0x50, RTW_CHPLAN_WORLD_ETSI9 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI10, TXPWR_LMT_ETSI), /* 0x51, RTW_CHPLAN_WORLD_ETSI10 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI11, TXPWR_LMT_ETSI), /* 0x52, RTW_CHPLAN_WORLD_ETSI11 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC4, TXPWR_LMT_FCC), /* 0x53, RTW_CHPLAN_FCC1_NCC4 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x54, RTW_CHPLAN_WORLD_ETSI12 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC9, TXPWR_LMT_FCC), /* 0x55, RTW_CHPLAN_FCC1_FCC9 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI13, TXPWR_LMT_ETSI), /* 0x56, RTW_CHPLAN_WORLD_ETSI13 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC10, TXPWR_LMT_FCC), /* 0x57, RTW_CHPLAN_FCC1_FCC10 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK4, TXPWR_LMT_MKK), /* 0x58, RTW_CHPLAN_MKK2_MKK4 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI14, TXPWR_LMT_ETSI), /* 0x59, RTW_CHPLAN_WORLD_ETSI14 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5A, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5B, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5C, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5D, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5E, */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5F, */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x60, RTW_CHPLAN_FCC1_FCC5 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x61, RTW_CHPLAN_FCC2_FCC7 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x62, RTW_CHPLAN_FCC2_FCC1 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI15, TXPWR_LMT_ETSI), /* 0x63, RTW_CHPLAN_WORLD_ETSI15 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK5, TXPWR_LMT_MKK), /* 0x64, RTW_CHPLAN_MKK2_MKK5 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI16, TXPWR_LMT_ETSI), /* 0x65, RTW_CHPLAN_ETSI1_ETSI16 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x66, RTW_CHPLAN_FCC1_FCC14 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x67, RTW_CHPLAN_FCC1_FCC12 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x68, RTW_CHPLAN_FCC2_FCC14 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x69, RTW_CHPLAN_FCC2_FCC12 */ - CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x6A, RTW_CHPLAN_ETSI1_ETSI17 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC16, TXPWR_LMT_FCC), /* 0x6B, RTW_CHPLAN_WORLD_FCC16 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC13, TXPWR_LMT_FCC), /* 0x6C, RTW_CHPLAN_WORLD_FCC13 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC15, TXPWR_LMT_FCC), /* 0x6D, RTW_CHPLAN_FCC2_FCC15 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x6E, RTW_CHPLAN_WORLD_FCC12 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x6F, RTW_CHPLAN_NULL_ETSI8 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI18, TXPWR_LMT_ETSI), /* 0x70, RTW_CHPLAN_NULL_ETSI18 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x71, RTW_CHPLAN_NULL_ETSI17 */ - CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI19, TXPWR_LMT_ETSI), /* 0x72, RTW_CHPLAN_NULL_ETSI19 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x73, RTW_CHPLAN_WORLD_FCC7 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC17, TXPWR_LMT_FCC), /* 0x74, RTW_CHPLAN_FCC2_FCC17 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI20, TXPWR_LMT_ETSI), /* 0x75, RTW_CHPLAN_WORLD_ETSI20 */ - CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC11, TXPWR_LMT_FCC), /* 0x76, RTW_CHPLAN_FCC2_FCC11 */ - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI21, TXPWR_LMT_ETSI), /* 0x77, RTW_CHPLAN_WORLD_ETSI21 */ - CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC18, TXPWR_LMT_FCC), /* 0x78, RTW_CHPLAN_FCC1_FCC18 */ - CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x79, RTW_CHPLAN_MKK2_MKK1 */ -}; - -static struct chplan_ent_t RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = - CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_FCC); /* 0x7F, Realtek Define */ - -u8 rtw_chplan_get_default_regd(u8 id) -{ - u8 regd; - - if (id == RTW_CHPLAN_REALTEK_DEFINE) - regd = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd; - else - regd = RTW_ChannelPlanMap[id].regd; - - return regd; -} - -bool rtw_chplan_is_empty(u8 id) -{ - struct chplan_ent_t *chplan_map; - - if (id == RTW_CHPLAN_REALTEK_DEFINE) - chplan_map = &RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE; - else - chplan_map = &RTW_ChannelPlanMap[id]; - - if (chplan_map->rd_2g == RTW_RD_2G_NULL - #ifdef CONFIG_IEEE80211_BAND_5GHZ - && chplan_map->rd_5g == RTW_RD_5G_NULL - #endif - ) - return _TRUE; - - return _FALSE; -} - -bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch) -{ - int i; - - for (i = 0; i < MAX_CHANNEL_NUM; i++) { - if (regsty->excl_chs[i] == 0) - break; - if (regsty->excl_chs[i] == ch) - return _TRUE; - } - return _FALSE; -} - -inline static u8 rtw_rd_5g_band1_passive(u8 rtw_rd_5g) -{ - u8 passive = 0; - - switch (rtw_rd_5g) { - case RTW_RD_5G_FCC13: - case RTW_RD_5G_FCC16: - case RTW_RD_5G_ETSI18: - case RTW_RD_5G_ETSI19: - case RTW_RD_5G_WORLD: - case RTW_RD_5G_WORLD1: - passive = 1; - }; - - return passive; -} - -inline static u8 rtw_rd_5g_band4_passive(u8 rtw_rd_5g) -{ - u8 passive = 0; - - switch (rtw_rd_5g) { - case RTW_RD_5G_MKK5: - case RTW_RD_5G_ETSI16: - case RTW_RD_5G_ETSI18: - case RTW_RD_5G_ETSI19: - case RTW_RD_5G_WORLD: - passive = 1; - }; - - return passive; -} - -u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set) -{ - struct registry_priv *regsty = adapter_to_regsty(padapter); - u8 index, chanset_size = 0; - u8 b5GBand = _FALSE, b2_4GBand = _FALSE; - u8 rd_2g = 0, rd_5g = 0; -#ifdef CONFIG_DFS_MASTER - int i; -#endif - - if (!rtw_is_channel_plan_valid(ChannelPlan)) { - RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan); - return chanset_size; - } - - _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); - - if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G)) - b2_4GBand = _TRUE; - - if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G)) - b5GBand = _TRUE; - - if (b2_4GBand == _FALSE && b5GBand == _FALSE) { - RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n"); - return chanset_size; - } - - if (b2_4GBand) { - if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) - rd_2g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_2g; - else - rd_2g = RTW_ChannelPlanMap[ChannelPlan].rd_2g; - - for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan2G[rd_2g]); index++) { - if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index)) == _TRUE) - continue; - - if (chanset_size >= MAX_CHANNEL_NUM) { - RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); - break; - } - - channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index); - - if (ChannelPlan == RTW_CHPLAN_GLOBAL_DOAMIN - || rd_2g == RTW_RD_2G_GLOBAL - ) { - /* Channel 1~11 is active, and 12~14 is passive */ - if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11) - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - else if ((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) - channel_set[chanset_size].ScanType = SCAN_PASSIVE; - } else if (ChannelPlan == RTW_CHPLAN_WORLD_WIDE_13 - || ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G - || rd_2g == RTW_RD_2G_WORLD - ) { - /* channel 12~13, passive scan */ - if (channel_set[chanset_size].ChannelNum <= 11) - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - else - channel_set[chanset_size].ScanType = SCAN_PASSIVE; - } else - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - - chanset_size++; - } - } - -#ifdef CONFIG_IEEE80211_BAND_5GHZ - if (b5GBand) { - if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) - rd_5g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_5g; - else - rd_5g = RTW_ChannelPlanMap[ChannelPlan].rd_5g; - - for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan5G[rd_5g]); index++) { - if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index)) == _TRUE) - continue; - #ifndef CONFIG_DFS - if (rtw_is_dfs_ch(CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index))) - continue; - #endif - - if (chanset_size >= MAX_CHANNEL_NUM) { - RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); - break; - } - - channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index); - - if ((ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G) /* all channels passive */ - || (rtw_is_5g_band1(channel_set[chanset_size].ChannelNum) - && rtw_rd_5g_band1_passive(rd_5g)) /* band1 passive */ - || (rtw_is_5g_band4(channel_set[chanset_size].ChannelNum) - && rtw_rd_5g_band4_passive(rd_5g)) /* band4 passive */ - || (rtw_is_dfs_ch(channel_set[chanset_size].ChannelNum)) /* DFS channel(band2, 3) passive */ - ) - channel_set[chanset_size].ScanType = SCAN_PASSIVE; - else - channel_set[chanset_size].ScanType = SCAN_ACTIVE; - - chanset_size++; - } - } - - #ifdef CONFIG_DFS_MASTER - for (i = 0; i < chanset_size; i++) - channel_set[i].non_ocp_end_time = rtw_get_current_time(); - #endif -#endif /* CONFIG_IEEE80211_BAND_5GHZ */ - - if (chanset_size) - RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n" - , FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size); - else - RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n" - , FUNC_ADPT_ARG(padapter), ChannelPlan); - - return chanset_size; -} - -#ifdef CONFIG_80211AC_VHT -#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val) -#else -#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) -#endif - -#if RTW_DEF_MODULE_REGULATORY_CERT -#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val) -#else -#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) -#endif - -/* has def_module_flags specified, used by common map and HAL dfference map */ -#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \ - {.alpha2 = (_alpha2), .chplan = (_chplan) \ - COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \ - COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \ - } - -#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP - -#include "../platform/custom_country_chplan.h" - -#elif RTW_DEF_MODULE_REGULATORY_CERT - -/* leave def_module_flags empty, def_module_flags check is done on country_chplan_map */ -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */ -static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0), /* Chile */ - COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0), /* China */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0), /* Malaysia */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */ -static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */ -static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */ -static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */ -static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ - COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ - COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0), /* Saint Vincent and the Grenadines */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */ -static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ - COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0), /* Bahamas */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */ -static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */ -static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ - COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ - COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ - COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ - COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ - COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ - COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0), /* Sao Tome and Principe */ - COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ - COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */ -static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0), /* Canada */ - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ - COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */ -static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ -}; -#endif - -#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */ -static const struct country_chplan RTL8821CE_country_chplan_exc_map[] = { - COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ -}; -#endif - -/** - * rtw_def_module_get_chplan_from_country - - * @country_code: string of country code - * @return: - * Return NULL for case referring to common map - */ -static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code) -{ - const struct country_chplan *ent = NULL; - const struct country_chplan *hal_map = NULL; - u16 hal_map_sz = 0; - int i; - - /* TODO: runtime selection for multi driver */ -#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2) - hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU) - hal_map = RTL8821AU_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF) - hal_map = RTL8812AENF_NGFF_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC) - hal_map = RTL8812AEBT_HMC_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2) - hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2) - hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216) - hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2) - hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630) - hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE) - hal_map = RTL8822BE_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan); -#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE) - hal_map = RTL8821CE_country_chplan_exc_map; - hal_map_sz = sizeof(RTL8821CE_country_chplan_exc_map) / sizeof(struct country_chplan); -#endif - - if (hal_map == NULL || hal_map_sz == 0) - goto exit; - - for (i = 0; i < hal_map_sz; i++) { - if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) { - ent = &hal_map[i]; - break; - } - } - -exit: - return ent; -} -#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */ - -static const struct country_chplan country_chplan_map[] = { - COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */ - COUNTRY_CHPLAN_ENT("AE", 0x35, 1, 0x7FB), /* United Arab Emirates */ - COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */ - COUNTRY_CHPLAN_ENT("AG", 0x76, 1, 0x000), /* Antigua & Barbuda */ - COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */ - COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x7F1), /* Albania */ - COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x6B0), /* Armenia */ - COUNTRY_CHPLAN_ENT("AN", 0x76, 1, 0x7F1), /* Netherlands Antilles */ - COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x6E0), /* Angola */ - COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */ - COUNTRY_CHPLAN_ENT("AR", 0x61, 1, 0x7F3), /* Argentina */ - COUNTRY_CHPLAN_ENT("AS", 0x76, 1, 0x000), /* American Samoa */ - COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x7FB), /* Austria */ - COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x7FB), /* Australia */ - COUNTRY_CHPLAN_ENT("AW", 0x76, 1, 0x0B0), /* Aruba */ - COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x7F1), /* Azerbaijan */ - COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x7F1), /* Bosnia & Herzegovina */ - COUNTRY_CHPLAN_ENT("BB", 0x76, 1, 0x650), /* Barbados */ - COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x7F1), /* Bangladesh */ - COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x7FB), /* Belgium */ - COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x6B0), /* Burkina Faso */ - COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x7F1), /* Bulgaria */ - COUNTRY_CHPLAN_ENT("BH", 0x48, 1, 0x7F1), /* Bahrain */ - COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x6B0), /* Burundi */ - COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x6B0), /* Benin */ - COUNTRY_CHPLAN_ENT("BM", 0x76, 1, 0x600), /* Bermuda (UK) */ - COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x610), /* Brunei */ - COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x7F1), /* Bolivia */ - COUNTRY_CHPLAN_ENT("BR", 0x62, 1, 0x7F1), /* Brazil */ - COUNTRY_CHPLAN_ENT("BS", 0x76, 1, 0x620), /* Bahamas */ - COUNTRY_CHPLAN_ENT("BT", 0x26, 1, 0x000), /* Bhutan */ - COUNTRY_CHPLAN_ENT("BV", 0x26, 1, 0x000), /* Bouvet Island (Norway) */ - COUNTRY_CHPLAN_ENT("BW", 0x35, 1, 0x6F1), /* Botswana */ - COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x7F1), /* Belarus */ - COUNTRY_CHPLAN_ENT("BZ", 0x76, 1, 0x000), /* Belize */ - COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x7FB), /* Canada */ - COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */ - COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x6B0), /* Congo, Republic of the */ - COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x6B0), /* Central African Republic */ - COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x6B0), /* Congo, Democratic Republic of the. Zaire */ - COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x7FB), /* Switzerland */ - COUNTRY_CHPLAN_ENT("CI", 0x42, 1, 0x7F1), /* Cote d'Ivoire */ - COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */ - COUNTRY_CHPLAN_ENT("CL", 0x2D, 1, 0x7F1), /* Chile */ - COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x6B0), /* Cameroon */ - COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x7FB), /* China */ - COUNTRY_CHPLAN_ENT("CO", 0x76, 1, 0x7F1), /* Colombia */ - COUNTRY_CHPLAN_ENT("CR", 0x76, 1, 0x7F1), /* Costa Rica */ - COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x6B0), /* Cape Verde */ - COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */ - COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x7FB), /* Cyprus */ - COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x7FB), /* Czech Republic */ - COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x7FB), /* Germany */ - COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x680), /* Djibouti */ - COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x7FB), /* Denmark */ - COUNTRY_CHPLAN_ENT("DM", 0x76, 1, 0x000), /* Dominica */ - COUNTRY_CHPLAN_ENT("DO", 0x76, 1, 0x7F1), /* Dominican Republic */ - COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x7F1), /* Algeria */ - COUNTRY_CHPLAN_ENT("EC", 0x76, 1, 0x7F1), /* Ecuador */ - COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x7FB), /* Estonia */ - COUNTRY_CHPLAN_ENT("EG", 0x47, 1, 0x7F1), /* Egypt */ - COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x680), /* Western Sahara */ - COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */ - COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x7FB), /* Spain, Canary Islands, Ceuta, Melilla */ - COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x4B0), /* Ethiopia */ - COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x7FB), /* Finland */ - COUNTRY_CHPLAN_ENT("FJ", 0x76, 1, 0x600), /* Fiji */ - COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */ - COUNTRY_CHPLAN_ENT("FM", 0x76, 1, 0x000), /* Micronesia, Federated States of (USA) */ - COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */ - COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x7FB), /* France */ - COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x6B0), /* Gabon */ - COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x7FB), /* Great Britain (United Kingdom; England) */ - COUNTRY_CHPLAN_ENT("GD", 0x76, 1, 0x0B0), /* Grenada */ - COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x600), /* Georgia */ - COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */ - COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */ - COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x7F1), /* Ghana */ - COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x600), /* Gibraltar (UK) */ - COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x600), /* Greenland (Denmark) */ - COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x6B0), /* Gambia */ - COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x610), /* Guinea */ - COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x600), /* Guadeloupe (France) */ - COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x6B0), /* Equatorial Guinea */ - COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x7FB), /* Greece */ - COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */ - COUNTRY_CHPLAN_ENT("GT", 0x61, 1, 0x7F1), /* Guatemala */ - COUNTRY_CHPLAN_ENT("GU", 0x76, 1, 0x600), /* Guam (USA) */ - COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x6B0), /* Guinea-Bissau */ - COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */ - COUNTRY_CHPLAN_ENT("HK", 0x35, 1, 0x7FB), /* Hong Kong */ - COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */ - COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x7F1), /* Honduras */ - COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x7F9), /* Croatia */ - COUNTRY_CHPLAN_ENT("HT", 0x76, 1, 0x650), /* Haiti */ - COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x7FB), /* Hungary */ - COUNTRY_CHPLAN_ENT("ID", 0x3D, 0, 0x7F3), /* Indonesia */ - COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x7FB), /* Ireland */ - COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x7F1), /* Israel */ - COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */ - COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x7F1), /* India */ - COUNTRY_CHPLAN_ENT("IO", 0x26, 1, 0x000), /* British Indian Ocean Territory (UK) */ - COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */ - COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */ - COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x7FB), /* Iceland */ - COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x7FB), /* Italy */ - COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */ - COUNTRY_CHPLAN_ENT("JM", 0x32, 1, 0x7F1), /* Jamaica */ - COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x7FB), /* Jordan */ - COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x7FF), /* Japan- Telec */ - COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x7F9), /* Kenya */ - COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x7F1), /* Kyrgyzstan */ - COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x7F1), /* Cambodia */ - COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */ - COUNTRY_CHPLAN_ENT("KM", 0x26, 1, 0x000), /* Comoros */ - COUNTRY_CHPLAN_ENT("KN", 0x76, 1, 0x000), /* Saint Kitts and Nevis */ - COUNTRY_CHPLAN_ENT("KR", 0x3E, 1, 0x7FB), /* South Korea */ - COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x7FB), /* Kuwait */ - COUNTRY_CHPLAN_ENT("KY", 0x76, 1, 0x000), /* Cayman Islands (UK) */ - COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x700), /* Kazakhstan */ - COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */ - COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x7F1), /* Lebanon */ - COUNTRY_CHPLAN_ENT("LC", 0x76, 1, 0x000), /* Saint Lucia */ - COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x7FB), /* Liechtenstein */ - COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x7F1), /* Sri Lanka */ - COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x6B0), /* Liberia */ - COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x7F1), /* Lesotho */ - COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x7FB), /* Lithuania */ - COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x7FB), /* Luxembourg */ - COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x7FB), /* Latvia */ - COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */ - COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x7F1), /* Morocco */ - COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x7FB), /* Monaco */ - COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x7F1), /* Moldova */ - COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x7F1), /* Montenegro */ - COUNTRY_CHPLAN_ENT("MF", 0x76, 1, 0x000), /* Saint Martin */ - COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x620), /* Madagascar */ - COUNTRY_CHPLAN_ENT("MH", 0x76, 1, 0x000), /* Marshall Islands (USA) */ - COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x7F1), /* Republic of Macedonia (FYROM) */ - COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x6B0), /* Mali */ - COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */ - COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */ - COUNTRY_CHPLAN_ENT("MO", 0x35, 1, 0x600), /* Macau */ - COUNTRY_CHPLAN_ENT("MP", 0x76, 1, 0x000), /* Northern Mariana Islands (USA) */ - COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x640), /* Martinique (France) */ - COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x6A0), /* Mauritania */ - COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */ - COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x7FB), /* Malta */ - COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x6B0), /* Mauritius */ - COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */ - COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x6B0), /* Malawi */ - COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x7F1), /* Mexico */ - COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x7F1), /* Malaysia */ - COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x7F1), /* Mozambique */ - COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x700), /* Namibia */ - COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */ - COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x6B0), /* Niger */ - COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */ - COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x7F9), /* Nigeria */ - COUNTRY_CHPLAN_ENT("NI", 0x76, 1, 0x7F1), /* Nicaragua */ - COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x7FB), /* Netherlands */ - COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x7FB), /* Norway */ - COUNTRY_CHPLAN_ENT("NP", 0x48, 1, 0x6F0), /* Nepal */ - COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */ - COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */ - COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x7FB), /* New Zealand */ - COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x7F9), /* Oman */ - COUNTRY_CHPLAN_ENT("PA", 0x76, 1, 0x7F1), /* Panama */ - COUNTRY_CHPLAN_ENT("PE", 0x76, 1, 0x7F1), /* Peru */ - COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */ - COUNTRY_CHPLAN_ENT("PG", 0x35, 1, 0x7F1), /* Papua New Guinea */ - COUNTRY_CHPLAN_ENT("PH", 0x35, 1, 0x7F1), /* Philippines */ - COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x7F1), /* Pakistan */ - COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x7FB), /* Poland */ - COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */ - COUNTRY_CHPLAN_ENT("PR", 0x76, 1, 0x7F1), /* Puerto Rico */ - COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x7FB), /* Portugal */ - COUNTRY_CHPLAN_ENT("PW", 0x76, 1, 0x000), /* Palau */ - COUNTRY_CHPLAN_ENT("PY", 0x76, 1, 0x7F1), /* Paraguay */ - COUNTRY_CHPLAN_ENT("QA", 0x35, 1, 0x7F9), /* Qatar */ - COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */ - COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x7F1), /* Romania */ - COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x7F1), /* Serbia, Kosovo */ - COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x7FB), /* Russia(fac/gost), Kaliningrad */ - COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x0B0), /* Rwanda */ - COUNTRY_CHPLAN_ENT("SA", 0x35, 1, 0x7FB), /* Saudi Arabia */ - COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */ - COUNTRY_CHPLAN_ENT("SC", 0x76, 1, 0x690), /* Seychelles */ - COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x7FB), /* Sweden */ - COUNTRY_CHPLAN_ENT("SG", 0x35, 1, 0x7FB), /* Singapore */ - COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */ - COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x7FB), /* Slovenia */ - COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */ - COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x7FB), /* Slovakia */ - COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x6B0), /* Sierra Leone */ - COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */ - COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x7F1), /* Senegal */ - COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */ - COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */ - COUNTRY_CHPLAN_ENT("ST", 0x76, 1, 0x680), /* Sao Tome and Principe */ - COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x7F1), /* El Salvador */ - COUNTRY_CHPLAN_ENT("SX", 0x76, 1, 0x000), /* Sint Marteen */ - COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */ - COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */ - COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x6B0), /* Chad */ - COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x680), /* French Southern and Antarctic Lands (FR Southern Territories) */ - COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x6B0), /* Togo */ - COUNTRY_CHPLAN_ENT("TH", 0x35, 1, 0x7F1), /* Thailand */ - COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x640), /* Tajikistan */ - COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */ - COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */ - COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x7F1), /* Tunisia */ - COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */ - COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x7F1), /* Turkey, Northern Cyprus */ - COUNTRY_CHPLAN_ENT("TT", 0x76, 1, 0x3F1), /* Trinidad & Tobago */ - COUNTRY_CHPLAN_ENT("TV", 0x21, 0, 0x000), /* Tuvalu */ - COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x7FF), /* Taiwan */ - COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x6F0), /* Tanzania */ - COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x7FB), /* Ukraine */ - COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x6F1), /* Uganda */ - COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x7FF), /* United States of America (USA) */ - COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x7F1), /* Uruguay */ - COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x6F0), /* Uzbekistan */ - COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */ - COUNTRY_CHPLAN_ENT("VC", 0x76, 1, 0x010), /* Saint Vincent and the Grenadines */ - COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x7F1), /* Venezuela */ - COUNTRY_CHPLAN_ENT("VG", 0x76, 1, 0x000), /* British Virgin Islands (UK) */ - COUNTRY_CHPLAN_ENT("VI", 0x76, 1, 0x000), /* United States Virgin Islands (USA) */ - COUNTRY_CHPLAN_ENT("VN", 0x35, 1, 0x7F1), /* Vietnam */ - COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */ - COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */ - COUNTRY_CHPLAN_ENT("WS", 0x76, 1, 0x000), /* Samoa */ - COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */ - COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x680), /* Mayotte (France) */ - COUNTRY_CHPLAN_ENT("ZA", 0x35, 1, 0x7F1), /* South Africa */ - COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x6B0), /* Zambia */ - COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x7F1), /* Zimbabwe */ -}; - -/* -* rtw_get_chplan_from_country - -* @country_code: string of country code -* -* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given -*/ -const struct country_chplan *rtw_get_chplan_from_country(const char *country_code) -{ -#if RTW_DEF_MODULE_REGULATORY_CERT - const struct country_chplan *exc_ent = NULL; -#endif - const struct country_chplan *ent = NULL; - const struct country_chplan *map = NULL; - u16 map_sz = 0; - char code[2]; - int i; - - code[0] = alpha_to_upper(country_code[0]); - code[1] = alpha_to_upper(country_code[1]); - -#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP - map = CUSTOMIZED_country_chplan_map; - map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan); -#else - #if RTW_DEF_MODULE_REGULATORY_CERT - exc_ent = rtw_def_module_get_chplan_from_country(code); - #endif - map = country_chplan_map; - map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan); -#endif - - for (i = 0; i < map_sz; i++) { - if (strncmp(code, map[i].alpha2, 2) == 0) { - ent = &map[i]; - break; - } - } - - #if RTW_DEF_MODULE_REGULATORY_CERT - if (!ent || !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT)) - exc_ent = ent = NULL; - if (exc_ent) - ent = exc_ent; - #endif - - return ent; -} - -void dump_country_chplan(void *sel, const struct country_chplan *ent) -{ - RTW_PRINT_SEL(sel, "\"%c%c\", 0x%02X%s\n" - , ent->alpha2[0], ent->alpha2[1], ent->chplan - , COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : "" - ); -} - -void dump_country_chplan_map(void *sel) -{ - const struct country_chplan *ent; - u8 code[2]; - -#if RTW_DEF_MODULE_REGULATORY_CERT - RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT); -#endif -#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP - RTW_PRINT_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n"); -#endif - - for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) { - for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) { - ent = rtw_get_chplan_from_country(code); - if (!ent) - continue; - - dump_country_chplan(sel, ent); - } - } -} - -void dump_chplan_id_list(void *sel) -{ - u8 first = 1; - int i; - - for (i = 0; i < RTW_CHPLAN_MAX; i++) { - if (!rtw_is_channel_plan_valid(i)) - continue; - - if (first) { - RTW_PRINT_SEL(sel, "0x%02X ", i); - first = 0; - } else - _RTW_PRINT_SEL(sel, "0x%02X ", i); - } - - _RTW_PRINT_SEL(sel, "0x7F\n"); -} - -void dump_chplan_test(void *sel) -{ - int i, j; - - /* check invalid channel */ - for (i = 0; i < RTW_RD_2G_MAX; i++) { - for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan2G[i]); j++) { - if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan2G[i], j)) == 0) - RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan2G[i], j), i, j); - } - } - -#ifdef CONFIG_IEEE80211_BAND_5GHZ - for (i = 0; i < RTW_RD_5G_MAX; i++) { - for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan5G[i]); j++) { - if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan5G[i], j)) == 0) - RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan5G[i], j), i, j); - } - } -#endif -} - -void dump_chplan_ver(void *sel) -{ - RTW_PRINT_SEL(sel, "%s-%s\n", RTW_DOMAIN_MAP_VER, RTW_COUNTRY_MAP_VER); -} +/****************************************************************************** + * + * Copyright(c) 2007 - 2018 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTW_CHPLAN_C_ + +#include + +#define RTW_DOMAIN_MAP_VER "37e" +#define RTW_COUNTRY_MAP_VER "22" + +#ifdef LEGACY_CHANNEL_PLAN_REF +/******************************************************** +ChannelPlan definitions +*********************************************************/ +static RT_CHANNEL_PLAN legacy_channel_plan[] = { + /* 0x00, RTW_CHPLAN_FCC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165}, 32}, + /* 0x01, RTW_CHPLAN_IC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 31}, + /* 0x02, RTW_CHPLAN_ETSI */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, + /* 0x03, RTW_CHPLAN_SPAIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x04, RTW_CHPLAN_FRANCE */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x05, RTW_CHPLAN_MKK */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x06, RTW_CHPLAN_MKK1 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x07, RTW_CHPLAN_ISRAEL */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64}, 21}, + /* 0x08, RTW_CHPLAN_TELEC */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 40, 44, 48, 52, 56, 60, 64}, 22}, + /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14}, 14}, + /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13}, + /* 0x0B, RTW_CHPLAN_TAIWAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165}, 26}, + /* 0x0C, RTW_CHPLAN_CHINA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 149, 153, 157, 161, 165}, 18}, + /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165}, 24}, + /* 0x0E, RTW_CHPLAN_KOREA */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165}, 31}, + /* 0x0F, RTW_CHPLAN_TURKEY */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 52, 56, 60, 64}, 19}, + /* 0x10, RTW_CHPLAN_JAPAN */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140}, 32}, + /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}, 20}, + /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48}, 17}, + /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165}, 37}, + /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ {{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 56, 60, 64, 149, 153, 157, 161, 165}, 19}, +}; +#endif + +enum rtw_rd_2g { + RTW_RD_2G_NULL = 0, + RTW_RD_2G_WORLD = 1, /* Worldwird 13 */ + RTW_RD_2G_ETSI1 = 2, /* Europe */ + RTW_RD_2G_FCC1 = 3, /* US */ + RTW_RD_2G_MKK1 = 4, /* Japan */ + RTW_RD_2G_ETSI2 = 5, /* France */ + RTW_RD_2G_GLOBAL = 6, /* Global domain */ + RTW_RD_2G_MKK2 = 7, /* Japan */ + RTW_RD_2G_FCC2 = 8, /* US */ + RTW_RD_2G_IC1 = 9, /* Canada */ + RTW_RD_2G_WORLD1 = 10, /* Worldwide 11 */ + RTW_RD_2G_KCC1 = 11, /* Korea */ + RTW_RD_2G_IC2 = 12, /* Canada */ + + RTW_RD_2G_MAX, +}; + +enum rtw_rd_5g { + RTW_RD_5G_NULL = 0, /* */ + RTW_RD_5G_ETSI1 = 1, /* Europe */ + RTW_RD_5G_ETSI2 = 2, /* Australia, New Zealand */ + RTW_RD_5G_ETSI3 = 3, /* Russia */ + RTW_RD_5G_FCC1 = 4, /* US */ + RTW_RD_5G_FCC2 = 5, /* FCC w/o DFS Channels */ + RTW_RD_5G_FCC3 = 6, /* Bolivia, Chile, El Salvador, Venezuela */ + RTW_RD_5G_FCC4 = 7, /* Venezuela */ + RTW_RD_5G_FCC5 = 8, /* China */ + RTW_RD_5G_FCC6 = 9, /* */ + RTW_RD_5G_FCC7 = 10, /* US(w/o Weather radar) */ + RTW_RD_5G_IC1 = 11, /* Canada(w/o Weather radar) */ + RTW_RD_5G_KCC1 = 12, /* Korea */ + RTW_RD_5G_MKK1 = 13, /* Japan */ + RTW_RD_5G_MKK2 = 14, /* Japan (W52, W53) */ + RTW_RD_5G_MKK3 = 15, /* Japan (W56) */ + RTW_RD_5G_NCC1 = 16, /* Taiwan, (w/o Weather radar) */ + RTW_RD_5G_NCC2 = 17, /* Taiwan, Band2, Band4 */ + RTW_RD_5G_NCC3 = 18, /* Taiwan w/o DFS, Band4 only */ + RTW_RD_5G_ETSI4 = 19, /* Europe w/o DFS, Band1 only */ + RTW_RD_5G_ETSI5 = 20, /* Australia, New Zealand(w/o Weather radar) */ + RTW_RD_5G_FCC8 = 21, /* Latin America */ + RTW_RD_5G_ETSI6 = 22, /* Israel, Bahrain, Egypt, India, China, Malaysia */ + RTW_RD_5G_ETSI7 = 23, /* China */ + RTW_RD_5G_ETSI8 = 24, /* Jordan */ + RTW_RD_5G_ETSI9 = 25, /* Lebanon */ + RTW_RD_5G_ETSI10 = 26, /* Qatar */ + RTW_RD_5G_ETSI11 = 27, /* Russia */ + RTW_RD_5G_NCC4 = 28, /* Taiwan, (w/o Weather radar) */ + RTW_RD_5G_ETSI12 = 29, /* Indonesia */ + RTW_RD_5G_FCC9 = 30, /* (w/o Weather radar) */ + RTW_RD_5G_ETSI13 = 31, /* (w/o Weather radar) */ + RTW_RD_5G_FCC10 = 32, /* Argentina(w/o Weather radar) */ + RTW_RD_5G_MKK4 = 33, /* Japan (W52) */ + RTW_RD_5G_ETSI14 = 34, /* Russia */ + RTW_RD_5G_FCC11 = 35, /* US(include CH144) */ + RTW_RD_5G_ETSI15 = 36, /* Malaysia */ + RTW_RD_5G_MKK5 = 37, /* Japan */ + RTW_RD_5G_ETSI16 = 38, /* Europe */ + RTW_RD_5G_ETSI17 = 39, /* Europe */ + RTW_RD_5G_FCC12 = 40, /* FCC */ + RTW_RD_5G_FCC13 = 41, /* FCC */ + RTW_RD_5G_FCC14 = 42, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ + RTW_RD_5G_FCC15 = 43, /* FCC w/o Band3 */ + RTW_RD_5G_FCC16 = 44, /* FCC w/o Band3 */ + RTW_RD_5G_ETSI18 = 45, /* ETSI w/o DFS Band2&3 */ + RTW_RD_5G_ETSI19 = 46, /* Europe */ + RTW_RD_5G_FCC17 = 47, /* FCC w/o Weather radar(w/o 5600~5650MHz) */ + RTW_RD_5G_ETSI20 = 48, /* Europe */ + RTW_RD_5G_IC2 = 49, /* Canada(w/o Weather radar), include ch144 */ + RTW_RD_5G_ETSI21 = 50, /* Australia, New Zealand(w/o Weather radar) */ + RTW_RD_5G_FCC18 = 51, /* */ + RTW_RD_5G_WORLD = 52, /* Worldwide */ + RTW_RD_5G_CHILE1 = 53, /* Chile */ + RTW_RD_5G_ACMA1 = 54, /* Australia, New Zealand (w/o Weather radar) (w/o Ch120~Ch128) */ + RTW_RD_5G_WORLD1 = 55, /* 5G Worldwide Band1&2 */ + RTW_RD_5G_CHILE2 = 56, /* Chile (Band2,Band3) */ + RTW_RD_5G_KCC2 = 57, /* Korea (New standard) */ + + /* === Below are driver defined for legacy channel plan compatible, DON'T assign index ==== */ + RTW_RD_5G_OLD_FCC1, + RTW_RD_5G_OLD_NCC1, + RTW_RD_5G_OLD_KCC1, + + RTW_RD_5G_MAX, +}; + +struct ch_list_t { + u8 *len_ch; +}; + +#define CH_LIST_ENT(_len, arg...) \ + {.len_ch = (u8[_len + 1]) {_len, ##arg}, } + +#define CH_LIST_LEN(_ch_list) (_ch_list.len_ch[0]) +#define CH_LIST_CH(_ch_list, _i) (_ch_list.len_ch[_i + 1]) + +struct chplan_ent_t { + u8 rd_2g; +#ifdef CONFIG_IEEE80211_BAND_5GHZ + u8 rd_5g; +#endif + u8 regd; /* value of REGULATION_TXPWR_LMT */ +}; + +#ifdef CONFIG_IEEE80211_BAND_5GHZ +#define CHPLAN_ENT(i2g, i5g, regd) {i2g, i5g, regd} +#else +#define CHPLAN_ENT(i2g, i5g, regd) {i2g, regd} +#endif + +static struct ch_list_t RTW_ChannelPlan2G[] = { + /* 0, RTW_RD_2G_NULL */ CH_LIST_ENT(0), + /* 1, RTW_RD_2G_WORLD */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 2, RTW_RD_2G_ETSI1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 3, RTW_RD_2G_FCC1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), + /* 4, RTW_RD_2G_MKK1 */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), + /* 5, RTW_RD_2G_ETSI2 */ CH_LIST_ENT(4, 10, 11, 12, 13), + /* 6, RTW_RD_2G_GLOBAL */ CH_LIST_ENT(14, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14), + /* 7, RTW_RD_2G_MKK2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 8, RTW_RD_2G_FCC2 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 9, RTW_RD_2G_IC1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 10, RTW_RD_2G_WORLD1 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), + /* 11, RTW_RD_2G_KCC1 */ CH_LIST_ENT(13, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13), + /* 12, RTW_RD_2G_IC2 */ CH_LIST_ENT(11, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11), +}; + +#ifdef CONFIG_IEEE80211_BAND_5GHZ +static struct ch_list_t RTW_ChannelPlan5G[] = { + /* 0, RTW_RD_5G_NULL */ CH_LIST_ENT(0), + /* 1, RTW_RD_5G_ETSI1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 2, RTW_RD_5G_ETSI2 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 3, RTW_RD_5G_ETSI3 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 149, 153, 157, 161, 165), + /* 4, RTW_RD_5G_FCC1 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 5, RTW_RD_5G_FCC2 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), + /* 6, RTW_RD_5G_FCC3 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 7, RTW_RD_5G_FCC4 */ CH_LIST_ENT(12, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161), + /* 8, RTW_RD_5G_FCC5 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), + /* 9, RTW_RD_5G_FCC6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 10, RTW_RD_5G_FCC7 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 11, RTW_RD_5G_IC1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 12, RTW_RD_5G_KCC1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161), + /* 13, RTW_RD_5G_MKK1 */ CH_LIST_ENT(19, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 14, RTW_RD_5G_MKK2 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 15, RTW_RD_5G_MKK3 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 16, RTW_RD_5G_NCC1 */ CH_LIST_ENT(16, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 17, RTW_RD_5G_NCC2 */ CH_LIST_ENT(8, 56, 60, 64, 149, 153, 157, 161, 165), + /* 18, RTW_RD_5G_NCC3 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), + /* 19, RTW_RD_5G_ETSI4 */ CH_LIST_ENT(4, 36, 40, 44, 48), + /* 20, RTW_RD_5G_ETSI5 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 21, RTW_RD_5G_FCC8 */ CH_LIST_ENT(4, 149, 153, 157, 161), + /* 22, RTW_RD_5G_ETSI6 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 23, RTW_RD_5G_ETSI7 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 24, RTW_RD_5G_ETSI8 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), + /* 25, RTW_RD_5G_ETSI9 */ CH_LIST_ENT(11, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140), + /* 26, RTW_RD_5G_ETSI10 */ CH_LIST_ENT(5, 149, 153, 157, 161, 165), + /* 27, RTW_RD_5G_ETSI11 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140, 149, 153, 157, 161, 165), + /* 28, RTW_RD_5G_NCC4 */ CH_LIST_ENT(17, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 29, RTW_RD_5G_ETSI12 */ CH_LIST_ENT(4, 149, 153, 157, 161), + /* 30, RTW_RD_5G_FCC9 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 31, RTW_RD_5G_ETSI13 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), + /* 32, RTW_RD_5G_FCC10 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161), + /* 33, RTW_RD_5G_MKK4 */ CH_LIST_ENT(4, 36, 40, 44, 48), + /* 34, RTW_RD_5G_ETSI14 */ CH_LIST_ENT(11, 36, 40, 44, 48, 52, 56, 60, 64, 132, 136, 140), + /* 35, RTW_RD_5G_FCC11 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 36, RTW_RD_5G_ETSI15 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 149, 153, 157, 161, 165), + /* 37, RTW_RD_5G_MKK5 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 38, RTW_RD_5G_ETSI16 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 39, RTW_RD_5G_ETSI17 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 40, RTW_RD_5G_FCC12*/ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 41, RTW_RD_5G_FCC13 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 42, RTW_RD_5G_FCC14 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 43, RTW_RD_5G_FCC15 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 44, RTW_RD_5G_FCC16 */ CH_LIST_ENT(13, 36, 40, 44, 48, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 45, RTW_RD_5G_ETSI18 */ CH_LIST_ENT(9, 36, 40, 44, 48, 149, 153, 157, 161, 165), + /* 46, RTW_RD_5G_ETSI19 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + /* 47, RTW_RD_5G_FCC17 */ CH_LIST_ENT(16, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140), + /* 48, RTW_RD_5G_ETSI20 */ CH_LIST_ENT(9, 52, 56, 60, 64, 149, 153, 157, 161, 165), + /* 49, RTW_RD_5G_IC2 */ CH_LIST_ENT(22, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 50, RTW_RD_5G_ETSI21 */ CH_LIST_ENT(13, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 51, RTW_RD_5G_FCC18 */ CH_LIST_ENT(8, 100, 104, 108, 112, 116, 132, 136, 140), + /* 52, RTW_RD_5G_WORLD */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 53, RTW_RD_5G_CHILE1 */ CH_LIST_ENT(25, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144, 149, 153, 157, 161, 165), + /* 54, RTW_RD_5G_ACMA1 */ CH_LIST_ENT(21, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 132, 136, 140, 149, 153, 157, 161, 165), + /* 55, RTW_RD_5G_WORLD1 */ CH_LIST_ENT(8, 36, 40, 44, 48, 52, 56, 60, 64), + /* 56, RTW_RD_5G_CHILE2 */ CH_LIST_ENT(16, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144), + /* 57, RTW_RD_5G_KCC2 */ CH_LIST_ENT(24, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 149, 153, 157, 161, 165), + + /* === Below are driver defined for legacy channel plan compatible, NO static index assigned ==== */ + /* RTW_RD_5G_OLD_FCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), + /* RTW_RD_5G_OLD_NCC1 */ CH_LIST_ENT(15, 56, 60, 64, 100, 104, 108, 112, 116, 136, 140, 149, 153, 157, 161, 165), + /* RTW_RD_5G_OLD_KCC1 */ CH_LIST_ENT(20, 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 149, 153, 157, 161, 165), +}; +#endif /* CONFIG_IEEE80211_BAND_5GHZ */ + +static struct chplan_ent_t RTW_ChannelPlanMap[RTW_CHPLAN_MAX] = { + /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_KCC1, TXPWR_LMT_FCC), /* 0x00, RTW_CHPLAN_FCC */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_FCC1, TXPWR_LMT_FCC), /* 0x01, RTW_CHPLAN_IC */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x02, RTW_CHPLAN_ETSI */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x03, RTW_CHPLAN_SPAIN */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x04, RTW_CHPLAN_FRANCE */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x05, RTW_CHPLAN_MKK */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x06, RTW_CHPLAN_MKK1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x07, RTW_CHPLAN_ISRAEL */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC6, TXPWR_LMT_MKK), /* 0x08, RTW_CHPLAN_TELEC */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x09, RTW_CHPLAN_GLOBAL_DOAMIN */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x0A, RTW_CHPLAN_WORLD_WIDE_13 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_NCC1, TXPWR_LMT_FCC), /* 0x0B, RTW_CHPLAN_TAIWAN */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x0C, RTW_CHPLAN_CHINA */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC3, TXPWR_LMT_WW), /* 0x0D, RTW_CHPLAN_SINGAPORE_INDIA_MEXICO */ /* ETSI:Singapore, India. FCC:Mexico => WW */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_OLD_KCC1, TXPWR_LMT_ETSI), /* 0x0E, RTW_CHPLAN_KOREA */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC6, TXPWR_LMT_ETSI), /* 0x0F, RTW_CHPLAN_TURKEY */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_MKK), /* 0x10, RTW_CHPLAN_JAPAN */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x11, RTW_CHPLAN_FCC_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x12, RTW_CHPLAN_JAPAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x13, RTW_CHPLAN_WORLD_WIDE_5G */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x14, RTW_CHPLAN_TAIWAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_ETSI), /* 0x15, RTW_CHPLAN_ETSI_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NCC1, TXPWR_LMT_ETSI), /* 0x16, RTW_CHPLAN_KOREA_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_FCC7, TXPWR_LMT_MKK), /* 0x17, RTW_CHPLAN_JAPAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC5, TXPWR_LMT_ETSI), /* 0x18, RTW_CHPLAN_PAKISTAN_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x19, RTW_CHPLAN_TAIWAN2_NO_DFS */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1A, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1B, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1C, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1D, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x1E, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_FCC1, TXPWR_LMT_WW), /* 0x1F, RTW_CHPLAN_WORLD_WIDE_ONLY_5G */ + + /* ===== 0x20 ~ 0x7F, new channel plan ===== */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x20, RTW_CHPLAN_WORLD_NULL */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x21, RTW_CHPLAN_ETSI1_NULL */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x22, RTW_CHPLAN_FCC1_NULL */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x23, RTW_CHPLAN_MKK1_NULL */ + CHPLAN_ENT(RTW_RD_2G_ETSI2, RTW_RD_5G_NULL, TXPWR_LMT_ETSI), /* 0x24, RTW_CHPLAN_ETSI2_NULL */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x25, RTW_CHPLAN_FCC1_FCC1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x26, RTW_CHPLAN_WORLD_ETSI1 */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x27, RTW_CHPLAN_MKK1_MKK1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_KCC1, TXPWR_LMT_KCC), /* 0x28, RTW_CHPLAN_WORLD_KCC1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x29, RTW_CHPLAN_WORLD_FCC2 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_NULL, TXPWR_LMT_FCC), /* 0x2A, RTW_CHPLAN_FCC2_NULL */ + CHPLAN_ENT(RTW_RD_2G_IC1, RTW_RD_5G_IC2, TXPWR_LMT_IC), /* 0x2B, RTW_CHPLAN_IC1_IC2 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_NULL, TXPWR_LMT_MKK), /* 0x2C, RTW_CHPLAN_MKK2_NULL */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE1, TXPWR_LMT_CHILE), /* 0x2D, RTW_CHPLAN_WORLD_CHILE1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD1, RTW_RD_5G_WORLD1, TXPWR_LMT_WW), /* 0x2E, RTW_CHPLAN_WORLD1_WORLD1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_CHILE2, TXPWR_LMT_CHILE), /* 0x2F, RTW_CHPLAN_WORLD_CHILE2 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC3, TXPWR_LMT_FCC), /* 0x30, RTW_CHPLAN_WORLD_FCC3 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC4, TXPWR_LMT_FCC), /* 0x31, RTW_CHPLAN_WORLD_FCC4 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x32, RTW_CHPLAN_WORLD_FCC5 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC6, TXPWR_LMT_FCC), /* 0x33, RTW_CHPLAN_WORLD_FCC6 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x34, RTW_CHPLAN_FCC1_FCC7 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI2, TXPWR_LMT_ETSI), /* 0x35, RTW_CHPLAN_WORLD_ETSI2 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI3, TXPWR_LMT_ETSI), /* 0x36, RTW_CHPLAN_WORLD_ETSI3 */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK2, TXPWR_LMT_MKK), /* 0x37, RTW_CHPLAN_MKK1_MKK2 */ + CHPLAN_ENT(RTW_RD_2G_MKK1, RTW_RD_5G_MKK3, TXPWR_LMT_MKK), /* 0x38, RTW_CHPLAN_MKK1_MKK3 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC1, TXPWR_LMT_FCC), /* 0x39, RTW_CHPLAN_FCC1_NCC1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI1, TXPWR_LMT_ETSI), /* 0x3A, RTW_CHPLAN_ETSI1_ETSI1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x3B, RTW_CHPLAN_ETSI1_ACMA1 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x3C, RTW_CHPLAN_ETSI1_ETSI6 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x3D, RTW_CHPLAN_ETSI1_ETSI12 */ + CHPLAN_ENT(RTW_RD_2G_KCC1, RTW_RD_5G_KCC2, TXPWR_LMT_KCC), /* 0x3E, RTW_CHPLAN_KCC1_KCC2 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC11, TXPWR_LMT_FCC), /* 0x3F, RTW_CHPLAN_FCC1_FCC11*/ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC2, TXPWR_LMT_FCC), /* 0x40, RTW_CHPLAN_FCC1_NCC2 */ + CHPLAN_ENT(RTW_RD_2G_GLOBAL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x41, RTW_CHPLAN_GLOBAL_NULL */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI4, TXPWR_LMT_ETSI), /* 0x42, RTW_CHPLAN_ETSI1_ETSI4 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC2, TXPWR_LMT_FCC), /* 0x43, RTW_CHPLAN_FCC1_FCC2 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC3, TXPWR_LMT_FCC), /* 0x44, RTW_CHPLAN_FCC1_NCC3 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ACMA1, TXPWR_LMT_ACMA), /* 0x45, RTW_CHPLAN_WORLD_ACMA1 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC8, TXPWR_LMT_FCC), /* 0x46, RTW_CHPLAN_FCC1_FCC8 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI6, TXPWR_LMT_ETSI), /* 0x47, RTW_CHPLAN_WORLD_ETSI6 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI7, TXPWR_LMT_ETSI), /* 0x48, RTW_CHPLAN_WORLD_ETSI7 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x49, RTW_CHPLAN_WORLD_ETSI8 */ + CHPLAN_ENT(RTW_RD_2G_IC2, RTW_RD_5G_IC2, TXPWR_LMT_IC), /* 0x4A, RTW_CHPLAN_IC2_IC2 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4B, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4C, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4D, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4E, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x4F, */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI9, TXPWR_LMT_ETSI), /* 0x50, RTW_CHPLAN_WORLD_ETSI9 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI10, TXPWR_LMT_ETSI), /* 0x51, RTW_CHPLAN_WORLD_ETSI10 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI11, TXPWR_LMT_ETSI), /* 0x52, RTW_CHPLAN_WORLD_ETSI11 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_NCC4, TXPWR_LMT_FCC), /* 0x53, RTW_CHPLAN_FCC1_NCC4 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI12, TXPWR_LMT_ETSI), /* 0x54, RTW_CHPLAN_WORLD_ETSI12 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC9, TXPWR_LMT_FCC), /* 0x55, RTW_CHPLAN_FCC1_FCC9 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI13, TXPWR_LMT_ETSI), /* 0x56, RTW_CHPLAN_WORLD_ETSI13 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC10, TXPWR_LMT_FCC), /* 0x57, RTW_CHPLAN_FCC1_FCC10 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK4, TXPWR_LMT_MKK), /* 0x58, RTW_CHPLAN_MKK2_MKK4 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI14, TXPWR_LMT_ETSI), /* 0x59, RTW_CHPLAN_WORLD_ETSI14 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5A, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5B, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5C, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5D, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5E, */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_NULL, TXPWR_LMT_WW), /* 0x5F, */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC5, TXPWR_LMT_FCC), /* 0x60, RTW_CHPLAN_FCC1_FCC5 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x61, RTW_CHPLAN_FCC2_FCC7 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC1, TXPWR_LMT_FCC), /* 0x62, RTW_CHPLAN_FCC2_FCC1 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI15, TXPWR_LMT_ETSI), /* 0x63, RTW_CHPLAN_WORLD_ETSI15 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK5, TXPWR_LMT_MKK), /* 0x64, RTW_CHPLAN_MKK2_MKK5 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI16, TXPWR_LMT_ETSI), /* 0x65, RTW_CHPLAN_ETSI1_ETSI16 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x66, RTW_CHPLAN_FCC1_FCC14 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x67, RTW_CHPLAN_FCC1_FCC12 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC14, TXPWR_LMT_FCC), /* 0x68, RTW_CHPLAN_FCC2_FCC14 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x69, RTW_CHPLAN_FCC2_FCC12 */ + CHPLAN_ENT(RTW_RD_2G_ETSI1, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x6A, RTW_CHPLAN_ETSI1_ETSI17 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC16, TXPWR_LMT_FCC), /* 0x6B, RTW_CHPLAN_WORLD_FCC16 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC13, TXPWR_LMT_FCC), /* 0x6C, RTW_CHPLAN_WORLD_FCC13 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC15, TXPWR_LMT_FCC), /* 0x6D, RTW_CHPLAN_FCC2_FCC15 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC12, TXPWR_LMT_FCC), /* 0x6E, RTW_CHPLAN_WORLD_FCC12 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI8, TXPWR_LMT_ETSI), /* 0x6F, RTW_CHPLAN_NULL_ETSI8 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI18, TXPWR_LMT_ETSI), /* 0x70, RTW_CHPLAN_NULL_ETSI18 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI17, TXPWR_LMT_ETSI), /* 0x71, RTW_CHPLAN_NULL_ETSI17 */ + CHPLAN_ENT(RTW_RD_2G_NULL, RTW_RD_5G_ETSI19, TXPWR_LMT_ETSI), /* 0x72, RTW_CHPLAN_NULL_ETSI19 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC7, TXPWR_LMT_FCC), /* 0x73, RTW_CHPLAN_WORLD_FCC7 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC17, TXPWR_LMT_FCC), /* 0x74, RTW_CHPLAN_FCC2_FCC17 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI20, TXPWR_LMT_ETSI), /* 0x75, RTW_CHPLAN_WORLD_ETSI20 */ + CHPLAN_ENT(RTW_RD_2G_FCC2, RTW_RD_5G_FCC11, TXPWR_LMT_FCC), /* 0x76, RTW_CHPLAN_FCC2_FCC11 */ + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_ETSI21, TXPWR_LMT_ETSI), /* 0x77, RTW_CHPLAN_WORLD_ETSI21 */ + CHPLAN_ENT(RTW_RD_2G_FCC1, RTW_RD_5G_FCC18, TXPWR_LMT_FCC), /* 0x78, RTW_CHPLAN_FCC1_FCC18 */ + CHPLAN_ENT(RTW_RD_2G_MKK2, RTW_RD_5G_MKK1, TXPWR_LMT_MKK), /* 0x79, RTW_CHPLAN_MKK2_MKK1 */ +}; + +static struct chplan_ent_t RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = + CHPLAN_ENT(RTW_RD_2G_WORLD, RTW_RD_5G_FCC1, TXPWR_LMT_FCC); /* 0x7F, Realtek Define */ + +u8 rtw_chplan_get_default_regd(u8 id) +{ + u8 regd; + + if (id == RTW_CHPLAN_REALTEK_DEFINE) + regd = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.regd; + else + regd = RTW_ChannelPlanMap[id].regd; + + return regd; +} + +bool rtw_chplan_is_empty(u8 id) +{ + struct chplan_ent_t *chplan_map; + + if (id == RTW_CHPLAN_REALTEK_DEFINE) + chplan_map = &RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE; + else + chplan_map = &RTW_ChannelPlanMap[id]; + + if (chplan_map->rd_2g == RTW_RD_2G_NULL + #ifdef CONFIG_IEEE80211_BAND_5GHZ + && chplan_map->rd_5g == RTW_RD_5G_NULL + #endif + ) + return _TRUE; + + return _FALSE; +} + +bool rtw_regsty_is_excl_chs(struct registry_priv *regsty, u8 ch) +{ + int i; + + for (i = 0; i < MAX_CHANNEL_NUM; i++) { + if (regsty->excl_chs[i] == 0) + break; + if (regsty->excl_chs[i] == ch) + return _TRUE; + } + return _FALSE; +} + +inline static u8 rtw_rd_5g_band1_passive(u8 rtw_rd_5g) +{ + u8 passive = 0; + + switch (rtw_rd_5g) { + case RTW_RD_5G_FCC13: + case RTW_RD_5G_FCC16: + case RTW_RD_5G_ETSI18: + case RTW_RD_5G_ETSI19: + case RTW_RD_5G_WORLD: + case RTW_RD_5G_WORLD1: + passive = 1; + }; + + return passive; +} + +inline static u8 rtw_rd_5g_band4_passive(u8 rtw_rd_5g) +{ + u8 passive = 0; + + switch (rtw_rd_5g) { + case RTW_RD_5G_MKK5: + case RTW_RD_5G_ETSI16: + case RTW_RD_5G_ETSI18: + case RTW_RD_5G_ETSI19: + case RTW_RD_5G_WORLD: + passive = 1; + }; + + return passive; +} + +u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set) +{ + struct registry_priv *regsty = adapter_to_regsty(padapter); + u8 index, chanset_size = 0; + u8 b5GBand = _FALSE, b2_4GBand = _FALSE; + u8 rd_2g = 0, rd_5g = 0; +#ifdef CONFIG_DFS_MASTER + int i; +#endif + + if (!rtw_is_channel_plan_valid(ChannelPlan)) { + RTW_ERR("ChannelPlan ID 0x%02X error !!!!!\n", ChannelPlan); + return chanset_size; + } + + _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO) * MAX_CHANNEL_NUM); + + if (IsSupported24G(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_2G)) + b2_4GBand = _TRUE; + + if (is_supported_5g(regsty->wireless_mode) && hal_chk_band_cap(padapter, BAND_CAP_5G)) + b5GBand = _TRUE; + + if (b2_4GBand == _FALSE && b5GBand == _FALSE) { + RTW_WARN("HW band_cap has no intersection with SW wireless_mode setting\n"); + return chanset_size; + } + + if (b2_4GBand) { + if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) + rd_2g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_2g; + else + rd_2g = RTW_ChannelPlanMap[ChannelPlan].rd_2g; + + for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan2G[rd_2g]); index++) { + if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index)) == _TRUE) + continue; + + if (chanset_size >= MAX_CHANNEL_NUM) { + RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); + break; + } + + channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan2G[rd_2g], index); + + if (ChannelPlan == RTW_CHPLAN_GLOBAL_DOAMIN + || rd_2g == RTW_RD_2G_GLOBAL + ) { + /* Channel 1~11 is active, and 12~14 is passive */ + if (channel_set[chanset_size].ChannelNum >= 1 && channel_set[chanset_size].ChannelNum <= 11) + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + else if ((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + } else if (ChannelPlan == RTW_CHPLAN_WORLD_WIDE_13 + || ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G + || rd_2g == RTW_RD_2G_WORLD + ) { + /* channel 12~13, passive scan */ + if (channel_set[chanset_size].ChannelNum <= 11) + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + else + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + } else + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + + chanset_size++; + } + } + +#ifdef CONFIG_IEEE80211_BAND_5GHZ + if (b5GBand) { + if (ChannelPlan == RTW_CHPLAN_REALTEK_DEFINE) + rd_5g = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.rd_5g; + else + rd_5g = RTW_ChannelPlanMap[ChannelPlan].rd_5g; + + for (index = 0; index < CH_LIST_LEN(RTW_ChannelPlan5G[rd_5g]); index++) { + if (rtw_regsty_is_excl_chs(regsty, CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index)) == _TRUE) + continue; + #ifndef CONFIG_DFS + if (rtw_is_dfs_ch(CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index))) + continue; + #endif + + if (chanset_size >= MAX_CHANNEL_NUM) { + RTW_WARN("chset size can't exceed MAX_CHANNEL_NUM(%u)\n", MAX_CHANNEL_NUM); + break; + } + + channel_set[chanset_size].ChannelNum = CH_LIST_CH(RTW_ChannelPlan5G[rd_5g], index); + + if ((ChannelPlan == RTW_CHPLAN_WORLD_WIDE_5G) /* all channels passive */ + || (rtw_is_5g_band1(channel_set[chanset_size].ChannelNum) + && rtw_rd_5g_band1_passive(rd_5g)) /* band1 passive */ + || (rtw_is_5g_band4(channel_set[chanset_size].ChannelNum) + && rtw_rd_5g_band4_passive(rd_5g)) /* band4 passive */ + || (rtw_is_dfs_ch(channel_set[chanset_size].ChannelNum)) /* DFS channel(band2, 3) passive */ + ) + channel_set[chanset_size].ScanType = SCAN_PASSIVE; + else + channel_set[chanset_size].ScanType = SCAN_ACTIVE; + + chanset_size++; + } + } + + #ifdef CONFIG_DFS_MASTER + for (i = 0; i < chanset_size; i++) + channel_set[i].non_ocp_end_time = rtw_get_current_time(); + #endif +#endif /* CONFIG_IEEE80211_BAND_5GHZ */ + + if (chanset_size) + RTW_INFO(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, ch num:%d\n" + , FUNC_ADPT_ARG(padapter), ChannelPlan, chanset_size); + else + RTW_WARN(FUNC_ADPT_FMT" ChannelPlan ID:0x%02x, final chset has no channel\n" + , FUNC_ADPT_ARG(padapter), ChannelPlan); + + return chanset_size; +} + +#ifdef CONFIG_80211AC_VHT +#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val) +#else +#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) +#endif + +#if RTW_DEF_MODULE_REGULATORY_CERT +#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val) +#else +#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) +#endif + +/* has def_module_flags specified, used by common map and HAL dfference map */ +#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \ + {.alpha2 = (_alpha2), .chplan = (_chplan) \ + COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \ + COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \ + } + +#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP + +#include "../platform/custom_country_chplan.h" + +#elif RTW_DEF_MODULE_REGULATORY_CERT + +/* leave def_module_flags empty, def_module_flags check is done on country_chplan_map */ +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2) /* 2013 certify */ +static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0), /* Chile */ + COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0), /* China */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0), /* Malaysia */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU) /* 2014 certify */ +static const struct country_chplan RTL8821AU_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF) /* 2014 certify */ +static const struct country_chplan RTL8812AENF_NGFF_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC) /* 2013 certify */ +static const struct country_chplan RTL8812AEBT_HMC_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0), /* Russia(fac/gost), Kaliningrad */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 0, 0), /* Ukraine */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2) /* 2012 certify */ +static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ + COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ + COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0), /* Saint Vincent and the Grenadines */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2) /* 2013 certify */ +static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ + COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0), /* Bahamas */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216) /* 2014 certify */ +static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0), /* Barbados */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0), /* Haiti */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2) /* 2013 certify */ +static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0), /* Aruba */ + COUNTRY_CHPLAN_ENT("CA", 0x20, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0), /* Ecuador */ + COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0), /* Guatemala */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ + COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0), /* Peru */ + COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0), /* Paraguay */ + COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0), /* Seychelles */ + COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0), /* Sao Tome and Principe */ + COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0), /* Taiwan */ + COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0), /* United States of America (USA) */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723DE_NGFF1630) /* 2016 certify */ +static const struct country_chplan RTL8723DE_NGFF1630_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("CA", 0x2A, 1, 0), /* Canada */ + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ + COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0), /* Mexico */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8822BE) /* 2016 certify */ +static const struct country_chplan RTL8822BE_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ +}; +#endif + +#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821CE) /* 2016 certify */ +static const struct country_chplan RTL8821CE_country_chplan_exc_map[] = { + COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0), /* South Korea */ +}; +#endif + +/** + * rtw_def_module_get_chplan_from_country - + * @country_code: string of country code + * @return: + * Return NULL for case referring to common map + */ +static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code) +{ + const struct country_chplan *ent = NULL; + const struct country_chplan *hal_map = NULL; + u16 hal_map_sz = 0; + int i; + + /* TODO: runtime selection for multi driver */ +#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2) + hal_map = RTL8821AE_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU) + hal_map = RTL8821AU_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8821AU_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF) + hal_map = RTL8812AENF_NGFF_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC) + hal_map = RTL8812AEBT_HMC_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2) + hal_map = RTL8188EE_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2) + hal_map = RTL8723BE_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216) + hal_map = RTL8723BS_NGFF1216_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2) + hal_map = RTL8192EEBT_HMC_M2_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723DE_NGFF1630) + hal_map = RTL8723DE_NGFF1630_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8723DE_NGFF1630_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8822BE) + hal_map = RTL8822BE_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8822BE_country_chplan_exc_map) / sizeof(struct country_chplan); +#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821CE) + hal_map = RTL8821CE_country_chplan_exc_map; + hal_map_sz = sizeof(RTL8821CE_country_chplan_exc_map) / sizeof(struct country_chplan); +#endif + + if (hal_map == NULL || hal_map_sz == 0) + goto exit; + + for (i = 0; i < hal_map_sz; i++) { + if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) { + ent = &hal_map[i]; + break; + } + } + +exit: + return ent; +} +#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */ + +static const struct country_chplan country_chplan_map[] = { + COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x000), /* Andorra */ + COUNTRY_CHPLAN_ENT("AE", 0x35, 1, 0x7FB), /* United Arab Emirates */ + COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x000), /* Afghanistan */ + COUNTRY_CHPLAN_ENT("AG", 0x76, 1, 0x000), /* Antigua & Barbuda */ + COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x000), /* Anguilla(UK) */ + COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0x7F1), /* Albania */ + COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0x6B0), /* Armenia */ + COUNTRY_CHPLAN_ENT("AN", 0x76, 1, 0x7F1), /* Netherlands Antilles */ + COUNTRY_CHPLAN_ENT("AO", 0x47, 1, 0x6E0), /* Angola */ + COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x000), /* Antarctica */ + COUNTRY_CHPLAN_ENT("AR", 0x61, 1, 0x7F3), /* Argentina */ + COUNTRY_CHPLAN_ENT("AS", 0x76, 1, 0x000), /* American Samoa */ + COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0x7FB), /* Austria */ + COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0x7FB), /* Australia */ + COUNTRY_CHPLAN_ENT("AW", 0x76, 1, 0x0B0), /* Aruba */ + COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0x7F1), /* Azerbaijan */ + COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0x7F1), /* Bosnia & Herzegovina */ + COUNTRY_CHPLAN_ENT("BB", 0x76, 1, 0x650), /* Barbados */ + COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0x7F1), /* Bangladesh */ + COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0x7FB), /* Belgium */ + COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0x6B0), /* Burkina Faso */ + COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0x7F1), /* Bulgaria */ + COUNTRY_CHPLAN_ENT("BH", 0x48, 1, 0x7F1), /* Bahrain */ + COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0x6B0), /* Burundi */ + COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0x6B0), /* Benin */ + COUNTRY_CHPLAN_ENT("BM", 0x76, 1, 0x600), /* Bermuda (UK) */ + COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x610), /* Brunei */ + COUNTRY_CHPLAN_ENT("BO", 0x73, 1, 0x7F1), /* Bolivia */ + COUNTRY_CHPLAN_ENT("BR", 0x62, 1, 0x7F1), /* Brazil */ + COUNTRY_CHPLAN_ENT("BS", 0x76, 1, 0x620), /* Bahamas */ + COUNTRY_CHPLAN_ENT("BT", 0x26, 1, 0x000), /* Bhutan */ + COUNTRY_CHPLAN_ENT("BV", 0x26, 1, 0x000), /* Bouvet Island (Norway) */ + COUNTRY_CHPLAN_ENT("BW", 0x35, 1, 0x6F1), /* Botswana */ + COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0x7F1), /* Belarus */ + COUNTRY_CHPLAN_ENT("BZ", 0x76, 1, 0x000), /* Belize */ + COUNTRY_CHPLAN_ENT("CA", 0x2B, 1, 0x7FB), /* Canada */ + COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x000), /* Cocos (Keeling) Islands (Australia) */ + COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0x6B0), /* Congo, Republic of the */ + COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0x6B0), /* Central African Republic */ + COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0x6B0), /* Congo, Democratic Republic of the. Zaire */ + COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0x7FB), /* Switzerland */ + COUNTRY_CHPLAN_ENT("CI", 0x42, 1, 0x7F1), /* Cote d'Ivoire */ + COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x000), /* Cook Islands */ + COUNTRY_CHPLAN_ENT("CL", 0x2D, 1, 0x7F1), /* Chile */ + COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0x6B0), /* Cameroon */ + COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0x7FB), /* China */ + COUNTRY_CHPLAN_ENT("CO", 0x76, 1, 0x7F1), /* Colombia */ + COUNTRY_CHPLAN_ENT("CR", 0x76, 1, 0x7F1), /* Costa Rica */ + COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0x6B0), /* Cape Verde */ + COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x000), /* Christmas Island (Australia) */ + COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0x7FB), /* Cyprus */ + COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0x7FB), /* Czech Republic */ + COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0x7FB), /* Germany */ + COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x680), /* Djibouti */ + COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0x7FB), /* Denmark */ + COUNTRY_CHPLAN_ENT("DM", 0x76, 1, 0x000), /* Dominica */ + COUNTRY_CHPLAN_ENT("DO", 0x76, 1, 0x7F1), /* Dominican Republic */ + COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0x7F1), /* Algeria */ + COUNTRY_CHPLAN_ENT("EC", 0x76, 1, 0x7F1), /* Ecuador */ + COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0x7FB), /* Estonia */ + COUNTRY_CHPLAN_ENT("EG", 0x47, 1, 0x7F1), /* Egypt */ + COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x680), /* Western Sahara */ + COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x000), /* Eritrea */ + COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0x7FB), /* Spain, Canary Islands, Ceuta, Melilla */ + COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0x4B0), /* Ethiopia */ + COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0x7FB), /* Finland */ + COUNTRY_CHPLAN_ENT("FJ", 0x76, 1, 0x600), /* Fiji */ + COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x000), /* Falkland Islands (Islas Malvinas) (UK) */ + COUNTRY_CHPLAN_ENT("FM", 0x76, 1, 0x000), /* Micronesia, Federated States of (USA) */ + COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x000), /* Faroe Islands (Denmark) */ + COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0x7FB), /* France */ + COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0x6B0), /* Gabon */ + COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0x7FB), /* Great Britain (United Kingdom; England) */ + COUNTRY_CHPLAN_ENT("GD", 0x76, 1, 0x0B0), /* Grenada */ + COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x600), /* Georgia */ + COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x080), /* French Guiana */ + COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x000), /* Guernsey (UK) */ + COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0x7F1), /* Ghana */ + COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x600), /* Gibraltar (UK) */ + COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x600), /* Greenland (Denmark) */ + COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0x6B0), /* Gambia */ + COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x610), /* Guinea */ + COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x600), /* Guadeloupe (France) */ + COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0x6B0), /* Equatorial Guinea */ + COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0x7FB), /* Greece */ + COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x000), /* South Georgia and the Sandwich Islands (UK) */ + COUNTRY_CHPLAN_ENT("GT", 0x61, 1, 0x7F1), /* Guatemala */ + COUNTRY_CHPLAN_ENT("GU", 0x76, 1, 0x600), /* Guam (USA) */ + COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0x6B0), /* Guinea-Bissau */ + COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x000), /* Guyana */ + COUNTRY_CHPLAN_ENT("HK", 0x35, 1, 0x7FB), /* Hong Kong */ + COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x000), /* Heard and McDonald Islands (Australia) */ + COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0x7F1), /* Honduras */ + COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0x7F9), /* Croatia */ + COUNTRY_CHPLAN_ENT("HT", 0x76, 1, 0x650), /* Haiti */ + COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0x7FB), /* Hungary */ + COUNTRY_CHPLAN_ENT("ID", 0x3D, 0, 0x7F3), /* Indonesia */ + COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0x7FB), /* Ireland */ + COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0x7F1), /* Israel */ + COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x000), /* Isle of Man (UK) */ + COUNTRY_CHPLAN_ENT("IN", 0x48, 1, 0x7F1), /* India */ + COUNTRY_CHPLAN_ENT("IO", 0x26, 1, 0x000), /* British Indian Ocean Territory (UK) */ + COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x000), /* Iraq */ + COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x000), /* Iran */ + COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0x7FB), /* Iceland */ + COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0x7FB), /* Italy */ + COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x000), /* Jersey (UK) */ + COUNTRY_CHPLAN_ENT("JM", 0x32, 1, 0x7F1), /* Jamaica */ + COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0x7FB), /* Jordan */ + COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0x7FF), /* Japan- Telec */ + COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0x7F9), /* Kenya */ + COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0x7F1), /* Kyrgyzstan */ + COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0x7F1), /* Cambodia */ + COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x000), /* Kiribati */ + COUNTRY_CHPLAN_ENT("KM", 0x26, 1, 0x000), /* Comoros */ + COUNTRY_CHPLAN_ENT("KN", 0x76, 1, 0x000), /* Saint Kitts and Nevis */ + COUNTRY_CHPLAN_ENT("KR", 0x3E, 1, 0x7FB), /* South Korea */ + COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0x7FB), /* Kuwait */ + COUNTRY_CHPLAN_ENT("KY", 0x76, 1, 0x000), /* Cayman Islands (UK) */ + COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x700), /* Kazakhstan */ + COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x000), /* Laos */ + COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0x7F1), /* Lebanon */ + COUNTRY_CHPLAN_ENT("LC", 0x76, 1, 0x000), /* Saint Lucia */ + COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0x7FB), /* Liechtenstein */ + COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0x7F1), /* Sri Lanka */ + COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0x6B0), /* Liberia */ + COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0x7F1), /* Lesotho */ + COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0x7FB), /* Lithuania */ + COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0x7FB), /* Luxembourg */ + COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0x7FB), /* Latvia */ + COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x000), /* Libya */ + COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0x7F1), /* Morocco */ + COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0x7FB), /* Monaco */ + COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0x7F1), /* Moldova */ + COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0x7F1), /* Montenegro */ + COUNTRY_CHPLAN_ENT("MF", 0x76, 1, 0x000), /* Saint Martin */ + COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x620), /* Madagascar */ + COUNTRY_CHPLAN_ENT("MH", 0x76, 1, 0x000), /* Marshall Islands (USA) */ + COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0x7F1), /* Republic of Macedonia (FYROM) */ + COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0x6B0), /* Mali */ + COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x000), /* Burma (Myanmar) */ + COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x000), /* Mongolia */ + COUNTRY_CHPLAN_ENT("MO", 0x35, 1, 0x600), /* Macau */ + COUNTRY_CHPLAN_ENT("MP", 0x76, 1, 0x000), /* Northern Mariana Islands (USA) */ + COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x640), /* Martinique (France) */ + COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0x6A0), /* Mauritania */ + COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x000), /* Montserrat (UK) */ + COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0x7FB), /* Malta */ + COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0x6B0), /* Mauritius */ + COUNTRY_CHPLAN_ENT("MV", 0x47, 1, 0x000), /* Maldives */ + COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0x6B0), /* Malawi */ + COUNTRY_CHPLAN_ENT("MX", 0x61, 1, 0x7F1), /* Mexico */ + COUNTRY_CHPLAN_ENT("MY", 0x63, 1, 0x7F1), /* Malaysia */ + COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0x7F1), /* Mozambique */ + COUNTRY_CHPLAN_ENT("NA", 0x26, 1, 0x700), /* Namibia */ + COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x000), /* New Caledonia */ + COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0x6B0), /* Niger */ + COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x000), /* Norfolk Island (Australia) */ + COUNTRY_CHPLAN_ENT("NG", 0x75, 1, 0x7F9), /* Nigeria */ + COUNTRY_CHPLAN_ENT("NI", 0x76, 1, 0x7F1), /* Nicaragua */ + COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0x7FB), /* Netherlands */ + COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0x7FB), /* Norway */ + COUNTRY_CHPLAN_ENT("NP", 0x48, 1, 0x6F0), /* Nepal */ + COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x000), /* Nauru */ + COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x000), /* Niue */ + COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0x7FB), /* New Zealand */ + COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0x7F9), /* Oman */ + COUNTRY_CHPLAN_ENT("PA", 0x76, 1, 0x7F1), /* Panama */ + COUNTRY_CHPLAN_ENT("PE", 0x76, 1, 0x7F1), /* Peru */ + COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x000), /* French Polynesia (France) */ + COUNTRY_CHPLAN_ENT("PG", 0x35, 1, 0x7F1), /* Papua New Guinea */ + COUNTRY_CHPLAN_ENT("PH", 0x35, 1, 0x7F1), /* Philippines */ + COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0x7F1), /* Pakistan */ + COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0x7FB), /* Poland */ + COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x000), /* Saint Pierre and Miquelon (France) */ + COUNTRY_CHPLAN_ENT("PR", 0x76, 1, 0x7F1), /* Puerto Rico */ + COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0x7FB), /* Portugal */ + COUNTRY_CHPLAN_ENT("PW", 0x76, 1, 0x000), /* Palau */ + COUNTRY_CHPLAN_ENT("PY", 0x76, 1, 0x7F1), /* Paraguay */ + COUNTRY_CHPLAN_ENT("QA", 0x35, 1, 0x7F9), /* Qatar */ + COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x000), /* Reunion (France) */ + COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0x7F1), /* Romania */ + COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0x7F1), /* Serbia, Kosovo */ + COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0x7FB), /* Russia(fac/gost), Kaliningrad */ + COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0x0B0), /* Rwanda */ + COUNTRY_CHPLAN_ENT("SA", 0x35, 1, 0x7FB), /* Saudi Arabia */ + COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x000), /* Solomon Islands */ + COUNTRY_CHPLAN_ENT("SC", 0x76, 1, 0x690), /* Seychelles */ + COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0x7FB), /* Sweden */ + COUNTRY_CHPLAN_ENT("SG", 0x35, 1, 0x7FB), /* Singapore */ + COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x000), /* Saint Helena (UK) */ + COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0x7FB), /* Slovenia */ + COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x000), /* Svalbard (Norway) */ + COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0x7FB), /* Slovakia */ + COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0x6B0), /* Sierra Leone */ + COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x000), /* San Marino */ + COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0x7F1), /* Senegal */ + COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x000), /* Somalia */ + COUNTRY_CHPLAN_ENT("SR", 0x74, 1, 0x000), /* Suriname */ + COUNTRY_CHPLAN_ENT("ST", 0x76, 1, 0x680), /* Sao Tome and Principe */ + COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0x7F1), /* El Salvador */ + COUNTRY_CHPLAN_ENT("SX", 0x76, 1, 0x000), /* Sint Marteen */ + COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x020), /* Swaziland */ + COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x000), /* Turks and Caicos Islands (UK) */ + COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0x6B0), /* Chad */ + COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x680), /* French Southern and Antarctic Lands (FR Southern Territories) */ + COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0x6B0), /* Togo */ + COUNTRY_CHPLAN_ENT("TH", 0x35, 1, 0x7F1), /* Thailand */ + COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x640), /* Tajikistan */ + COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x000), /* Tokelau */ + COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x000), /* Turkmenistan */ + COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0x7F1), /* Tunisia */ + COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x000), /* Tonga */ + COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0x7F1), /* Turkey, Northern Cyprus */ + COUNTRY_CHPLAN_ENT("TT", 0x76, 1, 0x3F1), /* Trinidad & Tobago */ + COUNTRY_CHPLAN_ENT("TV", 0x21, 0, 0x000), /* Tuvalu */ + COUNTRY_CHPLAN_ENT("TW", 0x76, 1, 0x7FF), /* Taiwan */ + COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0x6F0), /* Tanzania */ + COUNTRY_CHPLAN_ENT("UA", 0x36, 1, 0x7FB), /* Ukraine */ + COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0x6F1), /* Uganda */ + COUNTRY_CHPLAN_ENT("US", 0x76, 1, 0x7FF), /* United States of America (USA) */ + COUNTRY_CHPLAN_ENT("UY", 0x30, 1, 0x7F1), /* Uruguay */ + COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0x6F0), /* Uzbekistan */ + COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x000), /* Holy See (Vatican City) */ + COUNTRY_CHPLAN_ENT("VC", 0x76, 1, 0x010), /* Saint Vincent and the Grenadines */ + COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0x7F1), /* Venezuela */ + COUNTRY_CHPLAN_ENT("VG", 0x76, 1, 0x000), /* British Virgin Islands (UK) */ + COUNTRY_CHPLAN_ENT("VI", 0x76, 1, 0x000), /* United States Virgin Islands (USA) */ + COUNTRY_CHPLAN_ENT("VN", 0x35, 1, 0x7F1), /* Vietnam */ + COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x000), /* Vanuatu */ + COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x000), /* Wallis and Futuna (France) */ + COUNTRY_CHPLAN_ENT("WS", 0x76, 1, 0x000), /* Samoa */ + COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x040), /* Yemen */ + COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x680), /* Mayotte (France) */ + COUNTRY_CHPLAN_ENT("ZA", 0x35, 1, 0x7F1), /* South Africa */ + COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0x6B0), /* Zambia */ + COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0x7F1), /* Zimbabwe */ +}; + +/* +* rtw_get_chplan_from_country - +* @country_code: string of country code +* +* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given +*/ +const struct country_chplan *rtw_get_chplan_from_country(const char *country_code) +{ +#if RTW_DEF_MODULE_REGULATORY_CERT + const struct country_chplan *exc_ent = NULL; +#endif + const struct country_chplan *ent = NULL; + const struct country_chplan *map = NULL; + u16 map_sz = 0; + char code[2]; + int i; + + code[0] = alpha_to_upper(country_code[0]); + code[1] = alpha_to_upper(country_code[1]); + +#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP + map = CUSTOMIZED_country_chplan_map; + map_sz = sizeof(CUSTOMIZED_country_chplan_map) / sizeof(struct country_chplan); +#else + #if RTW_DEF_MODULE_REGULATORY_CERT + exc_ent = rtw_def_module_get_chplan_from_country(code); + #endif + map = country_chplan_map; + map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan); +#endif + + for (i = 0; i < map_sz; i++) { + if (strncmp(code, map[i].alpha2, 2) == 0) { + ent = &map[i]; + break; + } + } + + #if RTW_DEF_MODULE_REGULATORY_CERT + if (!ent || !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT)) + exc_ent = ent = NULL; + if (exc_ent) + ent = exc_ent; + #endif + + return ent; +} + +void dump_country_chplan(void *sel, const struct country_chplan *ent) +{ + RTW_PRINT_SEL(sel, "\"%c%c\", 0x%02X%s\n" + , ent->alpha2[0], ent->alpha2[1], ent->chplan + , COUNTRY_CHPLAN_EN_11AC(ent) ? " ac" : "" + ); +} + +void dump_country_chplan_map(void *sel) +{ + const struct country_chplan *ent; + u8 code[2]; + +#if RTW_DEF_MODULE_REGULATORY_CERT + RTW_PRINT_SEL(sel, "RTW_DEF_MODULE_REGULATORY_CERT:0x%x\n", RTW_DEF_MODULE_REGULATORY_CERT); +#endif +#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP + RTW_PRINT_SEL(sel, "CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP\n"); +#endif + + for (code[0] = 'A'; code[0] <= 'Z'; code[0]++) { + for (code[1] = 'A'; code[1] <= 'Z'; code[1]++) { + ent = rtw_get_chplan_from_country(code); + if (!ent) + continue; + + dump_country_chplan(sel, ent); + } + } +} + +void dump_chplan_id_list(void *sel) +{ + u8 first = 1; + int i; + + for (i = 0; i < RTW_CHPLAN_MAX; i++) { + if (!rtw_is_channel_plan_valid(i)) + continue; + + if (first) { + RTW_PRINT_SEL(sel, "0x%02X ", i); + first = 0; + } else + _RTW_PRINT_SEL(sel, "0x%02X ", i); + } + + _RTW_PRINT_SEL(sel, "0x7F\n"); +} + +void dump_chplan_test(void *sel) +{ + int i, j; + + /* check invalid channel */ + for (i = 0; i < RTW_RD_2G_MAX; i++) { + for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan2G[i]); j++) { + if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan2G[i], j)) == 0) + RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan2G[i], j), i, j); + } + } + +#ifdef CONFIG_IEEE80211_BAND_5GHZ + for (i = 0; i < RTW_RD_5G_MAX; i++) { + for (j = 0; j < CH_LIST_LEN(RTW_ChannelPlan5G[i]); j++) { + if (rtw_ch2freq(CH_LIST_CH(RTW_ChannelPlan5G[i], j)) == 0) + RTW_PRINT_SEL(sel, "invalid ch:%u at (%d,%d)\n", CH_LIST_CH(RTW_ChannelPlan5G[i], j), i, j); + } + } +#endif +} + +void dump_chplan_ver(void *sel) +{ + RTW_PRINT_SEL(sel, "%s-%s\n", RTW_DOMAIN_MAP_VER, RTW_COUNTRY_MAP_VER); +} diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.h b/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.h index 403c8f480f0f5c..cdf9f75b284f96 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.h +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_chplan.h @@ -1,181 +1,181 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2018 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTW_CHPLAN_H__ -#define __RTW_CHPLAN_H__ - -enum rtw_chplan_id { - /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ - RTW_CHPLAN_FCC = 0x00, - RTW_CHPLAN_IC = 0x01, - RTW_CHPLAN_ETSI = 0x02, - RTW_CHPLAN_SPAIN = 0x03, - RTW_CHPLAN_FRANCE = 0x04, - RTW_CHPLAN_MKK = 0x05, - RTW_CHPLAN_MKK1 = 0x06, - RTW_CHPLAN_ISRAEL = 0x07, - RTW_CHPLAN_TELEC = 0x08, - RTW_CHPLAN_GLOBAL_DOAMIN = 0x09, - RTW_CHPLAN_WORLD_WIDE_13 = 0x0A, - RTW_CHPLAN_TAIWAN = 0x0B, - RTW_CHPLAN_CHINA = 0x0C, - RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D, - RTW_CHPLAN_KOREA = 0x0E, - RTW_CHPLAN_TURKEY = 0x0F, - RTW_CHPLAN_JAPAN = 0x10, - RTW_CHPLAN_FCC_NO_DFS = 0x11, - RTW_CHPLAN_JAPAN_NO_DFS = 0x12, - RTW_CHPLAN_WORLD_WIDE_5G = 0x13, - RTW_CHPLAN_TAIWAN_NO_DFS = 0x14, - - /* ===== 0x20 ~ 0x7F, new channel plan ===== */ - RTW_CHPLAN_WORLD_NULL = 0x20, - RTW_CHPLAN_ETSI1_NULL = 0x21, - RTW_CHPLAN_FCC1_NULL = 0x22, - RTW_CHPLAN_MKK1_NULL = 0x23, - RTW_CHPLAN_ETSI2_NULL = 0x24, - RTW_CHPLAN_FCC1_FCC1 = 0x25, - RTW_CHPLAN_WORLD_ETSI1 = 0x26, - RTW_CHPLAN_MKK1_MKK1 = 0x27, - RTW_CHPLAN_WORLD_KCC1 = 0x28, - RTW_CHPLAN_WORLD_FCC2 = 0x29, - RTW_CHPLAN_FCC2_NULL = 0x2A, - RTW_CHPLAN_IC1_IC2 = 0x2B, - RTW_CHPLAN_MKK2_NULL = 0x2C, - RTW_CHPLAN_WORLD_CHILE1= 0x2D, - RTW_CHPLAN_WORLD1_WORLD1 = 0x2E, - RTW_CHPLAN_WORLD_CHILE2 = 0x2F, - RTW_CHPLAN_WORLD_FCC3 = 0x30, - RTW_CHPLAN_WORLD_FCC4 = 0x31, - RTW_CHPLAN_WORLD_FCC5 = 0x32, - RTW_CHPLAN_WORLD_FCC6 = 0x33, - RTW_CHPLAN_FCC1_FCC7 = 0x34, - RTW_CHPLAN_WORLD_ETSI2 = 0x35, - RTW_CHPLAN_WORLD_ETSI3 = 0x36, - RTW_CHPLAN_MKK1_MKK2 = 0x37, - RTW_CHPLAN_MKK1_MKK3 = 0x38, - RTW_CHPLAN_FCC1_NCC1 = 0x39, - RTW_CHPLAN_ETSI1_ETSI1 = 0x3A, - RTW_CHPLAN_ETSI1_ACMA1 = 0x3B, - RTW_CHPLAN_ETSI1_ETSI6 = 0x3C, - RTW_CHPLAN_ETSI1_ETSI12 = 0x3D, - RTW_CHPLAN_KCC1_KCC2 = 0x3E, - RTW_CHPLAN_FCC1_FCC11 = 0x3F, - RTW_CHPLAN_FCC1_NCC2 = 0x40, - RTW_CHPLAN_GLOBAL_NULL = 0x41, - RTW_CHPLAN_ETSI1_ETSI4 = 0x42, - RTW_CHPLAN_FCC1_FCC2 = 0x43, - RTW_CHPLAN_FCC1_NCC3 = 0x44, - RTW_CHPLAN_WORLD_ACMA1 = 0x45, - RTW_CHPLAN_FCC1_FCC8 = 0x46, - RTW_CHPLAN_WORLD_ETSI6 = 0x47, - RTW_CHPLAN_WORLD_ETSI7 = 0x48, - RTW_CHPLAN_WORLD_ETSI8 = 0x49, - RTW_CHPLAN_IC2_IC2 = 0x4A, - RTW_CHPLAN_WORLD_ETSI9 = 0x50, - RTW_CHPLAN_WORLD_ETSI10 = 0x51, - RTW_CHPLAN_WORLD_ETSI11 = 0x52, - RTW_CHPLAN_FCC1_NCC4 = 0x53, - RTW_CHPLAN_WORLD_ETSI12 = 0x54, - RTW_CHPLAN_FCC1_FCC9 = 0x55, - RTW_CHPLAN_WORLD_ETSI13 = 0x56, - RTW_CHPLAN_FCC1_FCC10 = 0x57, - RTW_CHPLAN_MKK2_MKK4 = 0x58, - RTW_CHPLAN_WORLD_ETSI14 = 0x59, - RTW_CHPLAN_FCC1_FCC5 = 0x60, - RTW_CHPLAN_FCC2_FCC7 = 0x61, - RTW_CHPLAN_FCC2_FCC1 = 0x62, - RTW_CHPLAN_WORLD_ETSI15 = 0x63, - RTW_CHPLAN_MKK2_MKK5 = 0x64, - RTW_CHPLAN_ETSI1_ETSI16 = 0x65, - RTW_CHPLAN_FCC1_FCC14 = 0x66, - RTW_CHPLAN_FCC1_FCC12 = 0x67, - RTW_CHPLAN_FCC2_FCC14 = 0x68, - RTW_CHPLAN_FCC2_FCC12 = 0x69, - RTW_CHPLAN_ETSI1_ETSI17 = 0x6A, - RTW_CHPLAN_WORLD_FCC16 = 0x6B, - RTW_CHPLAN_WORLD_FCC13 = 0x6C, - RTW_CHPLAN_FCC2_FCC15 = 0x6D, - RTW_CHPLAN_WORLD_FCC12 = 0x6E, - RTW_CHPLAN_NULL_ETSI8 = 0x6F, - RTW_CHPLAN_NULL_ETSI18 = 0x70, - RTW_CHPLAN_NULL_ETSI17 = 0x71, - RTW_CHPLAN_NULL_ETSI19 = 0x72, - RTW_CHPLAN_WORLD_FCC7 = 0x73, - RTW_CHPLAN_FCC2_FCC17 = 0x74, - RTW_CHPLAN_WORLD_ETSI20 = 0x75, - RTW_CHPLAN_FCC2_FCC11 = 0x76, - RTW_CHPLAN_WORLD_ETSI21 = 0x77, - RTW_CHPLAN_FCC1_FCC18 = 0x78, - RTW_CHPLAN_MKK2_MKK1 = 0x79, - - RTW_CHPLAN_MAX, - RTW_CHPLAN_REALTEK_DEFINE = 0x7F, - RTW_CHPLAN_UNSPECIFIED = 0xFF, -}; - -u8 rtw_chplan_get_default_regd(u8 id); -bool rtw_chplan_is_empty(u8 id); -#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan)) -#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20) - -struct _RT_CHANNEL_INFO; -u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, struct _RT_CHANNEL_INFO *channel_set); - -#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF) - -#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC + M.2) */ -#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */ -#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */ -#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */ -#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC + M.2) */ -#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC + M.2) */ -#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */ -#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */ -#define RTW_MODULE_RTL8723DE_NGFF1630 BIT8 /* RTL8723DE(NGFF1630) */ -#define RTW_MODULE_RTL8822BE BIT9 /* RTL8822BE */ -#define RTW_MODULE_RTL8821CE BIT10 /* RTL8821CE */ - -struct country_chplan { - char alpha2[2]; - u8 chplan; -#ifdef CONFIG_80211AC_VHT - u8 en_11ac; -#endif -#if RTW_DEF_MODULE_REGULATORY_CERT - u16 def_module_flags; /* RTW_MODULE_RTLXXX */ -#endif -}; - -#ifdef CONFIG_80211AC_VHT -#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac) -#else -#define COUNTRY_CHPLAN_EN_11AC(_ent) 0 -#endif - -#if RTW_DEF_MODULE_REGULATORY_CERT -#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags) -#else -#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0 -#endif - -const struct country_chplan *rtw_get_chplan_from_country(const char *country_code); - -void dump_country_chplan(void *sel, const struct country_chplan *ent); -void dump_country_chplan_map(void *sel); -void dump_chplan_id_list(void *sel); -void dump_chplan_test(void *sel); -void dump_chplan_ver(void *sel); - -#endif /* __RTW_CHPLAN_H__ */ +/****************************************************************************** + * + * Copyright(c) 2007 - 2018 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __RTW_CHPLAN_H__ +#define __RTW_CHPLAN_H__ + +enum rtw_chplan_id { + /* ===== 0x00 ~ 0x1F, legacy channel plan ===== */ + RTW_CHPLAN_FCC = 0x00, + RTW_CHPLAN_IC = 0x01, + RTW_CHPLAN_ETSI = 0x02, + RTW_CHPLAN_SPAIN = 0x03, + RTW_CHPLAN_FRANCE = 0x04, + RTW_CHPLAN_MKK = 0x05, + RTW_CHPLAN_MKK1 = 0x06, + RTW_CHPLAN_ISRAEL = 0x07, + RTW_CHPLAN_TELEC = 0x08, + RTW_CHPLAN_GLOBAL_DOAMIN = 0x09, + RTW_CHPLAN_WORLD_WIDE_13 = 0x0A, + RTW_CHPLAN_TAIWAN = 0x0B, + RTW_CHPLAN_CHINA = 0x0C, + RTW_CHPLAN_SINGAPORE_INDIA_MEXICO = 0x0D, + RTW_CHPLAN_KOREA = 0x0E, + RTW_CHPLAN_TURKEY = 0x0F, + RTW_CHPLAN_JAPAN = 0x10, + RTW_CHPLAN_FCC_NO_DFS = 0x11, + RTW_CHPLAN_JAPAN_NO_DFS = 0x12, + RTW_CHPLAN_WORLD_WIDE_5G = 0x13, + RTW_CHPLAN_TAIWAN_NO_DFS = 0x14, + + /* ===== 0x20 ~ 0x7F, new channel plan ===== */ + RTW_CHPLAN_WORLD_NULL = 0x20, + RTW_CHPLAN_ETSI1_NULL = 0x21, + RTW_CHPLAN_FCC1_NULL = 0x22, + RTW_CHPLAN_MKK1_NULL = 0x23, + RTW_CHPLAN_ETSI2_NULL = 0x24, + RTW_CHPLAN_FCC1_FCC1 = 0x25, + RTW_CHPLAN_WORLD_ETSI1 = 0x26, + RTW_CHPLAN_MKK1_MKK1 = 0x27, + RTW_CHPLAN_WORLD_KCC1 = 0x28, + RTW_CHPLAN_WORLD_FCC2 = 0x29, + RTW_CHPLAN_FCC2_NULL = 0x2A, + RTW_CHPLAN_IC1_IC2 = 0x2B, + RTW_CHPLAN_MKK2_NULL = 0x2C, + RTW_CHPLAN_WORLD_CHILE1= 0x2D, + RTW_CHPLAN_WORLD1_WORLD1 = 0x2E, + RTW_CHPLAN_WORLD_CHILE2 = 0x2F, + RTW_CHPLAN_WORLD_FCC3 = 0x30, + RTW_CHPLAN_WORLD_FCC4 = 0x31, + RTW_CHPLAN_WORLD_FCC5 = 0x32, + RTW_CHPLAN_WORLD_FCC6 = 0x33, + RTW_CHPLAN_FCC1_FCC7 = 0x34, + RTW_CHPLAN_WORLD_ETSI2 = 0x35, + RTW_CHPLAN_WORLD_ETSI3 = 0x36, + RTW_CHPLAN_MKK1_MKK2 = 0x37, + RTW_CHPLAN_MKK1_MKK3 = 0x38, + RTW_CHPLAN_FCC1_NCC1 = 0x39, + RTW_CHPLAN_ETSI1_ETSI1 = 0x3A, + RTW_CHPLAN_ETSI1_ACMA1 = 0x3B, + RTW_CHPLAN_ETSI1_ETSI6 = 0x3C, + RTW_CHPLAN_ETSI1_ETSI12 = 0x3D, + RTW_CHPLAN_KCC1_KCC2 = 0x3E, + RTW_CHPLAN_FCC1_FCC11 = 0x3F, + RTW_CHPLAN_FCC1_NCC2 = 0x40, + RTW_CHPLAN_GLOBAL_NULL = 0x41, + RTW_CHPLAN_ETSI1_ETSI4 = 0x42, + RTW_CHPLAN_FCC1_FCC2 = 0x43, + RTW_CHPLAN_FCC1_NCC3 = 0x44, + RTW_CHPLAN_WORLD_ACMA1 = 0x45, + RTW_CHPLAN_FCC1_FCC8 = 0x46, + RTW_CHPLAN_WORLD_ETSI6 = 0x47, + RTW_CHPLAN_WORLD_ETSI7 = 0x48, + RTW_CHPLAN_WORLD_ETSI8 = 0x49, + RTW_CHPLAN_IC2_IC2 = 0x4A, + RTW_CHPLAN_WORLD_ETSI9 = 0x50, + RTW_CHPLAN_WORLD_ETSI10 = 0x51, + RTW_CHPLAN_WORLD_ETSI11 = 0x52, + RTW_CHPLAN_FCC1_NCC4 = 0x53, + RTW_CHPLAN_WORLD_ETSI12 = 0x54, + RTW_CHPLAN_FCC1_FCC9 = 0x55, + RTW_CHPLAN_WORLD_ETSI13 = 0x56, + RTW_CHPLAN_FCC1_FCC10 = 0x57, + RTW_CHPLAN_MKK2_MKK4 = 0x58, + RTW_CHPLAN_WORLD_ETSI14 = 0x59, + RTW_CHPLAN_FCC1_FCC5 = 0x60, + RTW_CHPLAN_FCC2_FCC7 = 0x61, + RTW_CHPLAN_FCC2_FCC1 = 0x62, + RTW_CHPLAN_WORLD_ETSI15 = 0x63, + RTW_CHPLAN_MKK2_MKK5 = 0x64, + RTW_CHPLAN_ETSI1_ETSI16 = 0x65, + RTW_CHPLAN_FCC1_FCC14 = 0x66, + RTW_CHPLAN_FCC1_FCC12 = 0x67, + RTW_CHPLAN_FCC2_FCC14 = 0x68, + RTW_CHPLAN_FCC2_FCC12 = 0x69, + RTW_CHPLAN_ETSI1_ETSI17 = 0x6A, + RTW_CHPLAN_WORLD_FCC16 = 0x6B, + RTW_CHPLAN_WORLD_FCC13 = 0x6C, + RTW_CHPLAN_FCC2_FCC15 = 0x6D, + RTW_CHPLAN_WORLD_FCC12 = 0x6E, + RTW_CHPLAN_NULL_ETSI8 = 0x6F, + RTW_CHPLAN_NULL_ETSI18 = 0x70, + RTW_CHPLAN_NULL_ETSI17 = 0x71, + RTW_CHPLAN_NULL_ETSI19 = 0x72, + RTW_CHPLAN_WORLD_FCC7 = 0x73, + RTW_CHPLAN_FCC2_FCC17 = 0x74, + RTW_CHPLAN_WORLD_ETSI20 = 0x75, + RTW_CHPLAN_FCC2_FCC11 = 0x76, + RTW_CHPLAN_WORLD_ETSI21 = 0x77, + RTW_CHPLAN_FCC1_FCC18 = 0x78, + RTW_CHPLAN_MKK2_MKK1 = 0x79, + + RTW_CHPLAN_MAX, + RTW_CHPLAN_REALTEK_DEFINE = 0x7F, + RTW_CHPLAN_UNSPECIFIED = 0xFF, +}; + +u8 rtw_chplan_get_default_regd(u8 id); +bool rtw_chplan_is_empty(u8 id); +#define rtw_is_channel_plan_valid(chplan) (((chplan) < RTW_CHPLAN_MAX || (chplan) == RTW_CHPLAN_REALTEK_DEFINE) && !rtw_chplan_is_empty(chplan)) +#define rtw_is_legacy_channel_plan(chplan) ((chplan) < 0x20) + +struct _RT_CHANNEL_INFO; +u8 init_channel_set(_adapter *padapter, u8 ChannelPlan, struct _RT_CHANNEL_INFO *channel_set); + +#define IS_ALPHA2_NO_SPECIFIED(_alpha2) ((*((u16 *)(_alpha2))) == 0xFFFF) + +#define RTW_MODULE_RTL8821AE_HMC_M2 BIT0 /* RTL8821AE(HMC + M.2) */ +#define RTW_MODULE_RTL8821AU BIT1 /* RTL8821AU */ +#define RTW_MODULE_RTL8812AENF_NGFF BIT2 /* RTL8812AENF(8812AE+8761)_NGFF */ +#define RTW_MODULE_RTL8812AEBT_HMC BIT3 /* RTL8812AEBT(8812AE+8761)_HMC */ +#define RTW_MODULE_RTL8188EE_HMC_M2 BIT4 /* RTL8188EE(HMC + M.2) */ +#define RTW_MODULE_RTL8723BE_HMC_M2 BIT5 /* RTL8723BE(HMC + M.2) */ +#define RTW_MODULE_RTL8723BS_NGFF1216 BIT6 /* RTL8723BS(NGFF1216) */ +#define RTW_MODULE_RTL8192EEBT_HMC_M2 BIT7 /* RTL8192EEBT(8192EE+8761AU)_(HMC + M.2) */ +#define RTW_MODULE_RTL8723DE_NGFF1630 BIT8 /* RTL8723DE(NGFF1630) */ +#define RTW_MODULE_RTL8822BE BIT9 /* RTL8822BE */ +#define RTW_MODULE_RTL8821CE BIT10 /* RTL8821CE */ + +struct country_chplan { + char alpha2[2]; + u8 chplan; +#ifdef CONFIG_80211AC_VHT + u8 en_11ac; +#endif +#if RTW_DEF_MODULE_REGULATORY_CERT + u16 def_module_flags; /* RTW_MODULE_RTLXXX */ +#endif +}; + +#ifdef CONFIG_80211AC_VHT +#define COUNTRY_CHPLAN_EN_11AC(_ent) ((_ent)->en_11ac) +#else +#define COUNTRY_CHPLAN_EN_11AC(_ent) 0 +#endif + +#if RTW_DEF_MODULE_REGULATORY_CERT +#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) ((_ent)->def_module_flags) +#else +#define COUNTRY_CHPLAN_DEF_MODULE_FALGS(_ent) 0 +#endif + +const struct country_chplan *rtw_get_chplan_from_country(const char *country_code); + +void dump_country_chplan(void *sel, const struct country_chplan *ent); +void dump_country_chplan_map(void *sel); +void dump_chplan_id_list(void *sel); +void dump_chplan_test(void *sel); +void dump_chplan_ver(void *sel); + +#endif /* __RTW_CHPLAN_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_cmd.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_cmd.c index 0fe874f116980e..2984f9bea8c244 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_cmd.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_cmd.c @@ -906,14 +906,14 @@ u8 rtw_sitesurvey_cmd(_adapter *padapter, struct sitesurvey_parm *pparm) u32 scan_timeout_ms; pmlmepriv->scan_start_time = rtw_get_current_time(); +#if 0 /* looking at other wlan drivers, they do not handle timeout. It is conflicting with long scans */ scan_timeout_ms = rtw_scan_timeout_decision(padapter); mlme_set_scan_to_timer(pmlmepriv,scan_timeout_ms); - +#endif rtw_led_control(padapter, LED_CTL_SITE_SURVEY); } else _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); - return res; } @@ -949,7 +949,6 @@ u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset) res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: - return res; } @@ -960,7 +959,6 @@ u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset) struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -981,11 +979,9 @@ u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset) res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: - return res; } - /* unsigned char rtw_setphy_cmd(unsigned char *adapter) @@ -1002,7 +998,6 @@ u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch) * struct registry_priv* pregistry_priv = &padapter->registrypriv; */ u8 res = _SUCCESS; - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -1018,7 +1013,6 @@ u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch) init_h2fwcmd_w_parm_no_rsp(ph2c, psetphypara, _SetPhy_CMD_); - psetphypara->modem = modem; psetphypara->rfchannel = ch; @@ -1162,7 +1156,6 @@ u8 rtw_getrfreg_cmd(_adapter *padapter, u8 offset, u8 *pval) struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -1189,7 +1182,6 @@ u8 rtw_getrfreg_cmd(_adapter *padapter, u8 offset, u8 *pval) exit: - return res; } @@ -1329,13 +1321,13 @@ static void rtw_ft_validate_akm_type(_adapter *padapter, /*IEEE802.11-2012 Std. Table 8-101-AKM suite selectors*/ if (rtw_ft_valid_akm(padapter, psecuritypriv->rsn_akm_suite_type)) { - ptmp = rtw_get_ie(&pnetwork->network.IEs[12], + ptmp = rtw_get_ie(&pnetwork->network.IEs[12], _MDIE_, &tmp_len, (pnetwork->network.IELength-12)); if (ptmp) { pft_roam->mdid = *(u16 *)(ptmp+2); pft_roam->ft_cap = *(ptmp+4); - RTW_INFO("FT: target " MAC_FMT " mdid=(0x%2x), capacity=(0x%2x)\n", + RTW_INFO("FT: target " MAC_FMT " mdid=(0x%2x), capacity=(0x%2x)\n", MAC_ARG(pnetwork->network.MacAddress), pft_roam->mdid, pft_roam->ft_cap); rtw_ft_set_flags(padapter, RTW_FT_PEER_EN); @@ -1397,7 +1389,6 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) /* for IEs is fix buf size */ t_len = sizeof(WLAN_BSSID_EX); - /* for hidden ap to set fw_state here */ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE) != _TRUE) { switch (ndis_network_mode) { @@ -1435,7 +1426,6 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) res = _FAIL; - goto exit; } @@ -1466,7 +1456,6 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) psecnetwork->IELength += rtw_restruct_sec_ie(padapter, psecnetwork->IEs + psecnetwork->IELength); - pqospriv->qos_option = 0; if (pregistrypriv->wmm_enable) { @@ -1563,7 +1552,6 @@ u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network *pnetwork) exit: - return res; } @@ -1614,11 +1602,9 @@ u8 rtw_disassoc_cmd(_adapter *padapter, u32 deauth_timeout_ms, int flags) /* for exit: - return res; } - u8 rtw_stop_ap_cmd(_adapter *adapter, u8 flags) { #ifdef CONFIG_AP_MODE @@ -1737,7 +1723,6 @@ u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool struct security_priv *psecuritypriv = &padapter->securitypriv; u8 res = _SUCCESS; - psetstakey_para = (struct set_stakey_parm *)rtw_zmalloc(sizeof(struct set_stakey_parm)); if (psetstakey_para == NULL) { res = _FAIL; @@ -1792,7 +1777,6 @@ u8 rtw_setstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 key_type, bool } exit: - return res; } @@ -1852,7 +1836,6 @@ u8 rtw_clearstakey_cmd(_adapter *padapter, struct sta_info *sta, u8 enqueue) exit: - return res; } @@ -1963,7 +1946,6 @@ u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr) exit: - return res; } @@ -1975,7 +1957,6 @@ u8 rtw_addbareq_cmd(_adapter *padapter, u8 tid, u8 *addr) u8 res = _SUCCESS; - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -2001,7 +1982,6 @@ u8 rtw_addbareq_cmd(_adapter *padapter, u8 tid, u8 *addr) exit: - return res; } @@ -2012,7 +1992,6 @@ u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u struct addBaRsp_parm *paddBaRsp_parm; u8 res = _SUCCESS; - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -2039,7 +2018,6 @@ u8 rtw_addbarsp_cmd(_adapter *padapter, u8 *addr, u16 tid, u8 status, u8 size, u exit: - return res; } /* add for CONFIG_IEEE80211W, none 11w can use it */ @@ -2050,7 +2028,6 @@ u8 rtw_reset_securitypriv_cmd(_adapter *padapter) struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -2071,13 +2048,11 @@ u8 rtw_reset_securitypriv_cmd(_adapter *padapter) init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); - /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: - return res; } @@ -2145,7 +2120,6 @@ u8 rtw_dynamic_chk_wk_cmd(_adapter *padapter) struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; - /* only primary padapter does this cmd */ ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); @@ -2167,13 +2141,11 @@ u8 rtw_dynamic_chk_wk_cmd(_adapter *padapter) pdrvextra_cmd_parm->pbuf = NULL; init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); - /* rtw_enqueue_cmd(pcmdpriv, ph2c); */ res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: - return res; } @@ -2186,7 +2158,6 @@ u8 rtw_set_chbw_cmd(_adapter *padapter, u8 ch, u8 bw, u8 ch_offset, u8 flags) struct submit_ctx sctx; u8 res = _SUCCESS; - RTW_INFO(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), ch, bw, ch_offset); @@ -2253,7 +2224,6 @@ u8 _rtw_set_chplan_cmd(_adapter *adapter, int flags, u8 chplan, const struct cou struct submit_ctx sctx; u8 res = _SUCCESS; - /* check if allow software config */ if (swconfig && rtw_hal_is_disable_sw_channel_plan(adapter) == _TRUE) { res = _FAIL; @@ -2370,8 +2340,6 @@ u8 rtw_led_blink_cmd(_adapter *padapter, PVOID pLed) u8 res = _SUCCESS; - - pcmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (pcmdobj == NULL) { res = _FAIL; @@ -2392,7 +2360,6 @@ u8 rtw_led_blink_cmd(_adapter *padapter, PVOID pLed) exit: - return res; } @@ -2458,7 +2425,6 @@ u8 rtw_enable_hw_update_tsf_cmd(_adapter *padapter) struct cmd_priv *pcmdpriv = &padapter->cmdpriv; u8 res = _SUCCESS; - ph2c = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (ph2c == NULL) { res = _FAIL; @@ -3111,7 +3077,6 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) } BusyThreshold = BusyThresholdHigh; - /* */ /* Determine if our traffic is busy now */ /* */ @@ -3220,7 +3185,6 @@ u8 traffic_status_watchdog(_adapter *padapter, u8 from_timer) } - /* for 11n Logo 4.2.31/4.2.32 */ static void dynamic_update_bcn_check(_adapter *padapter) { @@ -3306,7 +3270,6 @@ void rtw_iface_dynamic_chk_wk_hdl(_adapter *padapter) rtw_cfgvendor_rssi_monitor_evt(padapter); #endif - } void rtw_dynamic_chk_wk_hdl(_adapter *padapter) { @@ -3433,7 +3396,6 @@ u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 enqueue) /* struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); */ u8 res = _SUCCESS; - /* if(!pwrctrlpriv->bLeisurePs) */ /* return res; */ @@ -3464,7 +3426,6 @@ u8 rtw_lps_ctrl_wk_cmd(_adapter *padapter, u8 lps_ctrl_type, u8 enqueue) exit: - return res; } @@ -3626,7 +3587,6 @@ u8 rtw_rpt_timer_cfg_cmd(_adapter *padapter, u16 minRptTime) res = rtw_enqueue_cmd(pcmdpriv, ph2c); exit: - return res; } @@ -3683,7 +3643,6 @@ u8 rtw_antenna_select_cmd(_adapter *padapter, u8 antenna, u8 enqueue) antenna_select_wk_hdl(padapter, antenna); exit: - return res; } @@ -3779,7 +3738,6 @@ u8 p2p_protocol_wk_cmd(_adapter *padapter, int intCmdType) exit: - return res; } @@ -3993,7 +3951,6 @@ u8 rtw_ps_cmd(_adapter *padapter) exit: - return res; } @@ -4069,7 +4026,7 @@ void rtw_dfs_ch_switch_hdl(struct dvobj_priv *dvobj) if (ifbmp_s) { _adapter *iface; int i; - + for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; if (!iface || !(ifbmp_s & BIT(iface->iface_id))) @@ -5401,7 +5358,7 @@ static s32 rtw_req_per_cmd_hdl(_adapter *adapter) } /* group_macid: always be 0 in NIC, so only pass macid_bitmap.m0 - * rpt_type: 0 includes all info in 1, use 0 for now + * rpt_type: 0 includes all info in 1, use 0 for now * macid_bitmap: pass m0 only for NIC */ ret = rtw_hal_set_req_per_rpt_cmd(adapter, 0, 0, req_macid_bmp.m0); diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_debug.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_debug.c index c7f18d22940909..22ff44f8bbfec0 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_debug.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_debug.c @@ -42,6 +42,7 @@ const char *rtw_log_level_str[] = { void dump_drv_version(void *sel) { RTW_PRINT_SEL(sel, "%s %s\n", DRV_NAME, DRIVERVERSION); + //RTW_PRINT_SEL(sel, "build time: %s %s\n", __DATE__, __TIME__); } void dump_drv_cfg(void *sel) @@ -140,7 +141,7 @@ void dump_drv_cfg(void *sel) #ifdef CONFIG_RTW_TPT_MODE RTW_PRINT_SEL(sel, "CONFIG_RTW_TPT_MODE\n"); -#endif +#endif #ifdef CONFIG_USB_HCI #ifdef CONFIG_SUPPORT_USB_INT @@ -1804,7 +1805,7 @@ ssize_t proc_set_rate_ctl(struct file *file, const char __user *buffer, size_t c if ((fix_rate == 0) || (fix_rate == 0xFF)) en = 0; - + if (macid != 255) { RTW_INFO("Call phydm_fw_fix_rate()--en[%d] mac_id[%d] bw[%d] fix_rate[%d]\n", en, macid, bw, fix_rate); phydm_fw_fix_rate(dm, en, macid, bw, fix_rate); @@ -2696,7 +2697,7 @@ int proc_get_rx_signal(struct seq_file *m, void *v) RTW_PRINT_SEL(m, "rx_rate = %s\n", HDATA_RATE(odm->rx_rate)); return 0; - } else + } else #endif { /* RTW_PRINT_SEL(m, "rxpwdb:%d\n", padapter->recvpriv.rxpwdb); */ @@ -4917,21 +4918,21 @@ ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t co RTW_INFO("%s: back to original LPS/IPS Mode\n", __FUNCTION__); rtw_pm_set_lps(adapter, adapter->registrypriv.power_mgnt); - + rtw_pm_set_ips(adapter, adapter->registrypriv.ips_mode); goto exit; } - - if (mode == 1) { + + if (mode == 1) { /* LPS */ - RTW_INFO("%s: LPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); + RTW_INFO("%s: LPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); if (rtw_pm_set_lps(adapter, en) != 0 ) RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); - + } else if (mode == 2) { /* IPS */ - RTW_INFO("%s: IPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); + RTW_INFO("%s: IPS: %s, en=%d\n", __FUNCTION__, (en == 0) ? "disable":"enable", en); if (rtw_pm_set_ips(adapter, en) != 0 ) RTW_ERR("%s: invalid parameter, mode=%d, level=%d\n", __FUNCTION__, mode, en); } else @@ -7029,3 +7030,67 @@ inline void RTW_BUF_DUMP_SEL(uint _loglevel, void *sel, u8 *_titlestring, } #endif + +#ifdef CONFIG_RTW_SW_LED +int proc_get_led_ctrl(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct registry_priv *pregpriv = &padapter->registrypriv; + + if (pregpriv) + RTW_PRINT_SEL(m, "%d\n", pregpriv->led_ctrl); + + return 0; +} + +ssize_t proc_set_led_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data) +{ + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct registry_priv *pregpriv = &padapter->registrypriv; + struct led_priv *ledpriv = adapter_to_led(padapter); + char tmp[32]; + u32 mode; + + if (buffer == NULL || pregpriv == NULL) { + RTW_INFO("input buffer is NULL!\n"); + return -EFAULT; + } + + if (count < 1) + return -EFAULT; + + if (count > sizeof(tmp)) { + rtw_warn_on(1); + return -EFAULT; + } + + if (buffer && !copy_from_user(tmp, buffer, count)) { + + int num = sscanf(tmp, "%d ", &mode); + + if (num != 1) { + RTW_INFO("Invalid format\n"); + return count; + } + + if (mode < 0 || mode > 2 || pregpriv->led_ctrl == mode) { + RTW_INFO("Invalid mode\n"); + return count; + } + + if (mode > 0) { + pregpriv->led_ctrl = (u8) mode; + LedControlUSB(padapter, LED_CTL_POWER_ON); + } else { + LedControlUSB(padapter, LED_CTL_POWER_OFF); + pregpriv->led_ctrl = (u8) mode; + } + + RTW_INFO("led_ctrl=%d\n", pregpriv->led_ctrl); + } + + return count; +} +#endif /* CONFIG_RTW_SW_LED */ diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_ieee80211.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_ieee80211.c index 2c609edf632800..94e3d59854d205 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_ieee80211.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_ieee80211.c @@ -427,7 +427,7 @@ int rtw_remove_ie_g_rate(u8 *ie, uint *ie_len, uint offset, u8 eid) while (1) { tem_target_ie=rtw_get_ie(start,eid,&temp_target_ielen,search_len); - + /*if(tem_target_ie) RTW_INFO("%s, tem_target_ie=%u\n", __FUNCTION__,*tem_target_ie);*/ if (tem_target_ie && temp_target_ielen) { @@ -441,7 +441,7 @@ int rtw_remove_ie_g_rate(u8 *ie, uint *ie_len, uint offset, u8 eid) target_ielen=cck_rate_size;/*discount g mode rate 6, 9 12,18Mbps,id , length*/ *(tem_target_ie+1)=target_ielen;/*set new length to Supposrted Rates*/ target_ie=tem_target_ie+target_ielen + 2;/*set target ie to address of rate 6Mbps */ - + _rtw_memmove(target_ie, remain_ies, remain_len); *ie_len = *ie_len - rm_size; ret = rm_size; @@ -1707,7 +1707,7 @@ void dump_ht_cap_ie_content(void *sel, const u8 *buf, u32 buf_len) void dump_ht_cap_ie(void *sel, const u8 *ie, u32 ie_len) { const u8 *ht_cap_ie; - sint ht_cap_ielen; + sint ht_cap_ielen = 0; ht_cap_ie = rtw_get_ie(ie, WLAN_EID_HT_CAP, &ht_cap_ielen, ie_len); if (!ie || ht_cap_ie != ie) diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_io.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_io.c index e1046f3df8979e..5751c071adcb92 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_io.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_io.c @@ -47,10 +47,6 @@ jackson@realtek.com.tw #include #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - #error "Shall be Linux or Windows, but not both!\n" -#endif - #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_PLATFORM_RTL8197D) #define rtw_le16_to_cpu(val) val #define rtw_le32_to_cpu(val) val @@ -598,7 +594,7 @@ static bool match_io_sniff_en(_adapter *adapter else mask &= 0x00000000; } - + if ((sniff->type == RTW_IO_SNIFF_TYPE_EN && (mask & val)) || (sniff->type == RTW_IO_SNIFF_TYPE_DIS && (mask & val) != mask) ) { diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_ioctl_set.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_ioctl_set.c index b1ab64c2713b63..1b91233fe6446d 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_ioctl_set.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_ioctl_set.c @@ -828,7 +828,7 @@ u16 rtw_get_cur_max_rate(_adapter *adapter) else #endif /* CONFIG_80211N_HT */ { - /*station mode show :station && ap support rate; softap :show ap support rate*/ + /*station mode show :station && ap support rate; softap :show ap support rate*/ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) get_rate_set(adapter, sta_bssrate, &sta_bssrate_len);/*get sta rate and length*/ @@ -850,7 +850,7 @@ u16 rtw_get_cur_max_rate(_adapter *adapter) } } } else { - + if (rate > max_rate) max_rate = rate; diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme.c index cc83c141bb98ff..8cc28c648d9573 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme.c @@ -139,7 +139,7 @@ sint _rtw_init_mlme_priv(_adapter *padapter) #if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) rtw_roam_nb_info_init(padapter); pmlmepriv->ch_cnt = 0; -#endif +#endif #endif rtw_init_mlme_timer(padapter); @@ -698,8 +698,8 @@ int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst, u8 feature) return _TRUE; #endif - /* Wi-Fi driver doesn't consider the situation of BCN and ProbRsp sent from the same hidden AP, - * it considers these two packets are sent from different AP. + /* Wi-Fi driver doesn't consider the situation of BCN and ProbRsp sent from the same hidden AP, + * it considers these two packets are sent from different AP. * Therefore, the scan queue may store two scan results of the same hidden AP, likes below. * * index bssid ch RSSI SdBm Noise age flag ssid @@ -712,11 +712,11 @@ int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst, u8 feature) * It means the scan queue will not store two scan results of the same hidden AP, it only store ProbRsp. * For customer request. */ - + if (((_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) == _TRUE) && ((s_cap & WLAN_CAPABILITY_IBSS) == (d_cap & WLAN_CAPABILITY_IBSS)) && ((s_cap & WLAN_CAPABILITY_BSS) == (d_cap & WLAN_CAPABILITY_BSS))) { - if ((src->Ssid.SsidLength == dst->Ssid.SsidLength) && + if ((src->Ssid.SsidLength == dst->Ssid.SsidLength) && (((_rtw_memcmp(src->Ssid.Ssid, dst->Ssid.Ssid, src->Ssid.SsidLength)) == _TRUE) || //Case of normal AP (is_all_null(src->Ssid.Ssid, src->Ssid.SsidLength) == _TRUE || is_all_null(dst->Ssid.Ssid, dst->Ssid.SsidLength) == _TRUE))) //Case of hidden AP return _TRUE; @@ -993,7 +993,7 @@ bool rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) plist = get_next(plist); continue; } - + #ifdef CONFIG_RSSI_PRIORITY if ((choice == NULL) || (pnetwork->network.PhyInfo.SignalStrength < choice->network.PhyInfo.SignalStrength)) #ifdef CONFIG_RTW_MESH @@ -2657,10 +2657,10 @@ u8 rtw_ft_chk_roaming_candidate( /*The candidate don't support over-the-DS*/ if (rtw_ft_valid_otd_candidate(padapter, pmdie)) { RTW_INFO("FT: ignore the candidate(" - MAC_FMT ") for over-the-DS\n", + MAC_FMT ") for over-the-DS\n", MAC_ARG(competitor->network.MacAddress)); rtw_ft_clr_flags(padapter, RTW_FT_PEER_OTD_EN); - return _FALSE; + return _FALSE; } return _TRUE; @@ -2736,7 +2736,7 @@ void rtw_ft_reassoc_event_callback(_adapter *padapter, u8 *pbuf) void rtw_roam_nb_info_init(_adapter *padapter) { struct roam_nb_info *pnb = &(padapter->mlmepriv.nb_info); - + _rtw_memset(&pnb->nb_rpt, 0, sizeof(pnb->nb_rpt)); _rtw_memset(&pnb->nb_rpt_ch_list, 0, sizeof(pnb->nb_rpt_ch_list)); _rtw_memset(&pnb->roam_target_addr, 0, ETH_ALEN); @@ -2746,8 +2746,8 @@ void rtw_roam_nb_info_init(_adapter *padapter) pnb->nb_rpt_is_same = _TRUE; pnb->last_nb_rpt_entries = 0; #ifdef CONFIG_RTW_WNM - rtw_init_timer(&pnb->roam_scan_timer, - padapter, rtw_wnm_roam_scan_hdl, + rtw_init_timer(&pnb->roam_scan_timer, + padapter, rtw_wnm_roam_scan_hdl, padapter); #endif } @@ -2775,7 +2775,7 @@ u8 rtw_roam_nb_scan_list_set( rtw_init_sitesurvey_parm(padapter, pparm); if (rtw_roam_busy_scan(padapter, pnb)) { pparm->ch_num = 1; - pparm->ch[pmlmepriv->ch_cnt].hw_value = + pparm->ch[pmlmepriv->ch_cnt].hw_value = pnb->nb_rpt_ch_list[pmlmepriv->ch_cnt].hw_value; pmlmepriv->ch_cnt++; ret = _TRUE; @@ -2794,7 +2794,7 @@ u8 rtw_roam_nb_scan_list_set( } pmlmepriv->nb_info.nb_rpt_valid = _FALSE; - pmlmepriv->ch_cnt = 0; + pmlmepriv->ch_cnt = 0; ret = _TRUE; set_bssid_list: @@ -3139,7 +3139,7 @@ void rtw_scan_timeout_handler(void *ctx) void rtw_mlme_reset_auto_scan_int(_adapter *adapter, u8 *reason) { #if defined(CONFIG_RTW_MESH) && defined(CONFIG_DFS_MASTER) -#if CONFIG_RTW_MESH_OFFCH_CAND +#if CONFIG_RTW_MESH_OFFCH_CAND struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter); #endif #endif @@ -3253,7 +3253,7 @@ void rtw_drv_scan_by_self(_adapter *padapter, u8 reason) } #if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) - if ((reason == RTW_AUTO_SCAN_REASON_ROAM) + if ((reason == RTW_AUTO_SCAN_REASON_ROAM) && (rtw_roam_nb_scan_list_set(padapter, &parm))) goto exit; #endif @@ -3483,7 +3483,7 @@ static void collect_traffic_statistics(_adapter *padapter) dynamic_napi_th_chk (padapter); #endif /* CONFIG_RTW_NAPI_DYNAMIC */ #endif - + } void rtw_dynamic_check_timer_handlder(void *ctx) @@ -3617,10 +3617,10 @@ static int rtw_check_roaming_candidate(struct mlme_priv *mlme goto exit; #if defined(CONFIG_RTW_80211R) && defined(CONFIG_RTW_WNM) - if (rtw_wnm_btm_diff_bss(adapter) && + if (rtw_wnm_btm_diff_bss(adapter) && rtw_wnm_btm_roam_candidate(adapter, competitor)) { goto update; - } + } #endif if (competitor->network.Rssi - mlme->cur_network_scanned->network.Rssi < mlme->roam_rssi_diff_th) @@ -4064,9 +4064,9 @@ sint rtw_set_key(_adapter *adapter, struct security_priv *psecuritypriv, sint ke /* * rtw_uapsd_use_default_setting * This function is used for setting default uapsd max sp length to uapsd_max_sp_len - * in qos_priv data structure from registry. In additional, it will also map default uapsd - * ac to each uapsd TID, delivery-enabled and trigger-enabled of corresponding TID. - * + * in qos_priv data structure from registry. In additional, it will also map default uapsd + * ac to each uapsd TID, delivery-enabled and trigger-enabled of corresponding TID. + * * Arguments: * @padapter: _adapter pointer. * @@ -4081,7 +4081,7 @@ void rtw_uapsd_use_default_setting(_adapter *padapter) if (pregistrypriv->uapsd_ac_enable != 0) { pqospriv->uapsd_max_sp_len = pregistrypriv->uapsd_max_sp_len; - + CLEAR_FLAGS(pqospriv->uapsd_tid); CLEAR_FLAGS(pqospriv->uapsd_tid_delivery_enabled); CLEAR_FLAGS(pqospriv->uapsd_tid_trigger_enabled); @@ -4097,7 +4097,7 @@ void rtw_uapsd_use_default_setting(_adapter *padapter) } /* check the uapsd setting of AC_VI from registry then map these setting to each TID if necessary */ - if(TEST_FLAG(pregistrypriv->uapsd_ac_enable, DRV_CFG_UAPSD_VI)) { + if(TEST_FLAG(pregistrypriv->uapsd_ac_enable, DRV_CFG_UAPSD_VI)) { SET_FLAG(pqospriv->uapsd_tid, WMM_TID5); SET_FLAG(pqospriv->uapsd_tid_delivery_enabled, WMM_TID5); SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID5); @@ -4126,7 +4126,7 @@ void rtw_uapsd_use_default_setting(_adapter *padapter) SET_FLAG(pqospriv->uapsd_tid_trigger_enabled, WMM_TID0); } - RTW_INFO("[WMMPS] UAPSD MAX SP Len = 0x%02x, UAPSD TID enabled = 0x%02x\n", + RTW_INFO("[WMMPS] UAPSD MAX SP Len = 0x%02x, UAPSD TID enabled = 0x%02x\n", pqospriv->uapsd_max_sp_len, (u8)pqospriv->uapsd_tid); } @@ -4136,18 +4136,18 @@ void rtw_uapsd_use_default_setting(_adapter *padapter) * rtw_is_wmmps_mode * This function is used for checking whether Driver and an AP support uapsd function or not. * If both of them support uapsd function, it will return true. Otherwise returns false. - * + * * Arguments: * @padapter: _adapter pointer. * * Auther: Arvin Liu * Date: 2017/06/12 */ -bool rtw_is_wmmps_mode(_adapter *padapter) +bool rtw_is_wmmps_mode(_adapter *padapter) { struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct qos_priv *pqospriv = &pmlmepriv->qospriv; - + if ((pqospriv->uapsd_ap_supported) && ((pqospriv->uapsd_tid & BIT_MASK_TID_TC) != 0)) return _TRUE; @@ -4190,16 +4190,16 @@ int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, u #ifdef CONFIG_WMMPS_STA switch(pqospriv->uapsd_max_sp_len) { - case NO_LIMIT: + case NO_LIMIT: /* do nothing */ break; - case TWO_MSDU: + case TWO_MSDU: SET_FLAG(qos_info, BIT5); break; - case FOUR_MSDU: + case FOUR_MSDU: SET_FLAG(qos_info, BIT6); - break; - case SIX_MSDU: + break; + case SIX_MSDU: SET_FLAG(qos_info, BIT5); SET_FLAG(qos_info, BIT6); break; @@ -4221,7 +4221,7 @@ int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, u if((TEST_FLAG(pqospriv->uapsd_tid, WMM_TID3)) && (TEST_FLAG(pqospriv->uapsd_tid, WMM_TID0))) SET_FLAG(qos_info, WMM_IE_UAPSD_BE); #endif /* CONFIG_WMMPS_STA */ - + out_ie[initial_out_len + 8] = qos_info; break; @@ -4315,6 +4315,14 @@ int rtw_rsn_sync_pmkid(_adapter *adapter, u8 *ie, uint ie_len, int i_ent) if (i_ent >= 0) { RTW_INFO(FUNC_ADPT_FMT" append PMKID:"KEY_FMT"\n" , FUNC_ADPT_ARG(adapter), KEY_ARG(sec->PMKIDList[i_ent].PMKID)); + if (!info.pmkid_list) { + /* prevent nullptr dereference when trying to insert a PMKID into + * a frame that did not previously contain one. In order to be minimally + * invasive, we just discard requests like these, which might impact + * the ability to connect to certain access points, but will at least + * prevent the kernel panics */ + return 0; + } info.pmkid_cnt = 1; /* update new pmkid_cnt */ _rtw_memcpy(info.pmkid_list, sec->PMKIDList[i_ent].PMKID, 16); @@ -4332,7 +4340,7 @@ int rtw_rsn_sync_pmkid(_adapter *adapter, u8 *ie, uint ie_len, int i_ent) + 2 + 16 * info.pmkid_cnt + (info.gmcs ? 4 : 0) ; - + ie[1] = (u8)(ie_len - 2); exit: @@ -4898,7 +4906,7 @@ void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len, u8 channel) phtpriv->ampdu_enable = _TRUE; } else phtpriv->ampdu_enable = _TRUE; - } + } /* check Max Rx A-MPDU Size */ diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme_ext.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme_ext.c old mode 100755 new mode 100644 index 425752671b5487..01136fb3786a17 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme_ext.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_mlme_ext.c @@ -20,7 +20,6 @@ #endif /* CONFIG_IOCTL_CFG80211 */ #include - struct mlme_handler mlme_sta_tbl[] = { {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, @@ -1343,7 +1342,6 @@ void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) ptable->func = &OnAuth; else ptable->func = &OnAuthClient; - /* pass through */ case WIFI_ASSOCREQ: case WIFI_REASSOCREQ: _mgt_dispatcher(padapter, ptable, precv_frame); @@ -1773,17 +1771,17 @@ static void rtw_check_legacy_ap(_adapter *padapter, u8 *pframe, u32 len) if (!padapter->registrypriv.wifi_spec) return; - + if(!MLME_IS_AP(padapter)) return; - + if (pmlmeext->bstart_bss == _TRUE) { int left; unsigned char *pos; struct rtw_ieee802_11_elems elems; #ifdef CONFIG_80211N_HT - u16 cur_op_mode; + u16 cur_op_mode; #endif /* checking IEs */ left = len - sizeof(struct rtw_ieee80211_hdr_3addr) - _BEACON_IE_OFFSET_; @@ -1804,7 +1802,7 @@ static void rtw_check_legacy_ap(_adapter *padapter, u8 *pframe, u32 len) ATOMIC_SET(&pmlmepriv->olbc, _TRUE); ATOMIC_SET(&pmlmepriv->olbc_ht, _TRUE); } - + } } @@ -2730,7 +2728,7 @@ void rtw_roam_nb_discover(_adapter *padapter, u8 bfroce) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; - struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); struct sta_priv *pstapriv = &padapter->stapriv; struct sta_info *psta; u8 nb_req_issue = _FALSE; @@ -2744,11 +2742,11 @@ void rtw_roam_nb_discover(_adapter *padapter, u8 bfroce) psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress); if (!psta) return; - + if (bfroce || (!pmlmepriv->nb_info.nb_rpt_is_same)) nb_req_issue = _TRUE; - - if (nb_req_issue && (psta->rm_en_cap[0] & RTW_RRM_NB_RPT_EN)) + + if (nb_req_issue && (psta->rm_en_cap[0] & RTW_RRM_NB_RPT_EN)) rm_add_nb_req(padapter, psta); } #endif @@ -2800,7 +2798,7 @@ unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) /* AID */ res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4)) & 0x3fff); - + /* check aid value */ if (res < 1 || res > 2007) { RTW_INFO("assoc reject, aid: %d\n", res); @@ -3203,7 +3201,7 @@ unsigned int on_action_wnm(_adapter *adapter, union recv_frame *rframe) u8 *frame = rframe->u.hdr.rx_data; u32 frame_len = rframe->u.hdr.len; u8 *frame_body = (u8 *)(frame + sizeof(struct rtw_ieee80211_hdr_3addr)); - u32 frame_body_len = frame_len - sizeof(struct rtw_ieee80211_hdr_3addr); + u32 frame_body_len = frame_len - sizeof(struct rtw_ieee80211_hdr_3addr); u8 category, action; int cnt = 0; char msg[16]; @@ -3227,7 +3225,7 @@ unsigned int on_action_wnm(_adapter *adapter, union recv_frame *rframe) } ret = _SUCCESS; break; -#endif +#endif default: #ifdef CONFIG_IOCTL_CFG80211 cnt += sprintf((msg + cnt), "ACT_WNM %u", action); @@ -3274,12 +3272,12 @@ u8 rtw_rx_ampdu_size(_adapter *adapter) max_rx_ampdu_factor = (HT_CAP_AMPDU_FACTOR)adapter->driver_rx_ampdu_factor; else rtw_hal_get_def_var(adapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor); - + /* In Maximum A-MPDU Length Exponent subfield of A-MPDU Parameters field of HT Capabilities element, the unit of max_rx_ampdu_factor are octets. 8K, 16K, 32K, 64K is right. But the buffer size subfield of Block Ack Parameter Set field in ADDBA action frame indicates - the number of buffers available for this particular TID. Each buffer is equal to max. size of - MSDU or AMSDU. + the number of buffers available for this particular TID. Each buffer is equal to max. size of + MSDU or AMSDU. The size variable means how many MSDUs or AMSDUs, it's not Kbytes. */ if (MAX_AMPDU_FACTOR_64K == max_rx_ampdu_factor) @@ -3735,8 +3733,10 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr) u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_REQ; - u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; - u8 wpsielen = 0, p2pielen = 0; + u8 *wpsie; + u8 p2pie[ 255 ] = { 0x00 }; + u8 p2pielen = 0; + u8 wpsielen = 0; u16 len_channellist_attr = 0; #ifdef CONFIG_WFD u32 wfdielen = 0; @@ -3756,6 +3756,8 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr) if (pmgntframe == NULL) return; + wpsie = rtw_zmalloc(256); + RTW_INFO("[%s] In\n", __FUNCTION__); /* update attribute */ pattrib = &pmgntframe->attrib; @@ -4119,6 +4121,8 @@ void issue_p2p_GO_request(_adapter *padapter, u8 *raddr) dump_mgntframe(padapter, pmgntframe); + kfree(wpsie); + return; } @@ -4131,7 +4135,8 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l u8 action = P2P_PUB_ACTION_ACTION; u32 p2poui = cpu_to_be32(P2POUI); u8 oui_subtype = P2P_GO_NEGO_RESP; - u8 wpsie[255] = { 0x00 }, p2pie[255] = { 0x00 }; + u8 *wpsie; + u8 p2pie[ 255 ] = { 0x00 }; u8 p2pielen = 0; uint wpsielen = 0; u16 wps_devicepassword_id = 0x0000; @@ -4155,6 +4160,8 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l if (pmgntframe == NULL) return; + wpsie = rtw_zmalloc(256); + RTW_INFO("[%s] In, result = %d\n", __FUNCTION__, result); /* update attribute */ pattrib = &pmgntframe->attrib; @@ -4537,6 +4544,8 @@ void issue_p2p_GO_response(_adapter *padapter, u8 *raddr, u8 *frame_body, uint l dump_mgntframe(padapter, pmgntframe); + kfree(wpsie); + return; } @@ -6646,7 +6655,7 @@ unsigned int on_action_public(_adapter *padapter, union recv_frame *precv_frame) #if defined(CONFIG_RTW_WNM) || defined(CONFIG_RTW_80211K) static u8 rtw_wnm_nb_elem_parsing( - u8* pdata, u32 data_len, u8 from_btm, + u8* pdata, u32 data_len, u8 from_btm, u32 *nb_rpt_num, u8 *nb_rpt_is_same, struct roam_nb_info *pnb, struct wnm_btm_cant *pcandidates) { @@ -6669,7 +6678,7 @@ static u8 rtw_wnm_nb_elem_parsing( subelem_len = (u32)*(pdata+1); for (i=0; i < RTW_MAX_NB_RPT_NUM; i++) { - if (((ptr + 7) > pend) || (elem_len < subelem_len)) + if (((ptr + 7) > pend) || (elem_len < subelem_len)) break; if (*ptr != 0x34) { @@ -6678,10 +6687,10 @@ static u8 rtw_wnm_nb_elem_parsing( break; } - pie = (struct nb_rpt_hdr *)ptr; + pie = (struct nb_rpt_hdr *)ptr; if (from_btm) { - op = rtw_get_ie((u8 *)(ptr+15), - WNM_BTM_CAND_PREF_SUBEID, + op = rtw_get_ie((u8 *)(ptr+15), + WNM_BTM_CAND_PREF_SUBEID, &op_len, (subelem_len - 15)); } @@ -6700,28 +6709,28 @@ static u8 rtw_wnm_nb_elem_parsing( RTW_DBG("WNM: preference check bssid("MAC_FMT ") ,bss_info(0x%04X), reg_class(0x%02X), ch(%d)," " phy_type(0x%02X), preference(0x%02X)\n", - MAC_ARG(pcandidate->nb_rpt.bssid), pcandidate->nb_rpt.bss_info, - pcandidate->nb_rpt.reg_class, pcandidate->nb_rpt.ch_num, + MAC_ARG(pcandidate->nb_rpt.bssid), pcandidate->nb_rpt.bss_info, + pcandidate->nb_rpt.reg_class, pcandidate->nb_rpt.ch_num, pcandidate->nb_rpt.phy_type, pcandidate->preference); } else { if (_rtw_memcmp(&pnb->nb_rpt[i], pie, sizeof(struct nb_rpt_hdr)) == _FALSE) *nb_rpt_is_same = _FALSE; _rtw_memcpy(&pnb->nb_rpt[i], pie, sizeof(struct nb_rpt_hdr)); } - nb_rpt_entries++; - } + nb_rpt_entries++; + } - if (from_btm) - pnb->preference_en = (bfound)?_TRUE:_FALSE; + if (from_btm) + pnb->preference_en = (bfound)?_TRUE:_FALSE; *nb_rpt_num = nb_rpt_entries; return ret; -} +} /* selection sorting based on preference value * IN : nb_rpt_entries - candidate num * IN/OUT : pcandidates - candidate list - * return : TRUE - means pcandidates is updated. + * return : TRUE - means pcandidates is updated. */ static u8 rtw_wnm_candidates_sorting( u32 nb_rpt_entries, struct wnm_btm_cant *pcandidates) @@ -6749,13 +6758,13 @@ static u8 rtw_wnm_candidates_sorting( _rtw_memcpy((pcandidates+i), (pcandidates+pos), sizeof(struct wnm_btm_cant)); _rtw_memcpy((pcandidates+pos), &swap, sizeof(struct wnm_btm_cant)); } - } + } return updated; -} +} static void rtw_wnm_nb_info_update( - u32 nb_rpt_entries, u8 from_btm, - struct roam_nb_info *pnb, struct wnm_btm_cant *pcandidates, + u32 nb_rpt_entries, u8 from_btm, + struct roam_nb_info *pnb, struct wnm_btm_cant *pcandidates, u8 *nb_rpt_is_same) { u8 is_found; @@ -6776,10 +6785,10 @@ static void rtw_wnm_nb_info_update( _rtw_memcpy(&pnb->nb_rpt[i], &pcand->nb_rpt, sizeof(struct nb_rpt_hdr)); } - RTW_DBG("WNM: bssid(" MAC_FMT + RTW_DBG("WNM: bssid(" MAC_FMT ") , bss_info(0x%04X), reg_class(0x%02X), ch_num(%d), phy_type(0x%02X)\n", - MAC_ARG(pnb->nb_rpt[i].bssid), pnb->nb_rpt[i].bss_info, - pnb->nb_rpt[i].reg_class, pnb->nb_rpt[i].ch_num, + MAC_ARG(pnb->nb_rpt[i].bssid), pnb->nb_rpt[i].bss_info, + pnb->nb_rpt[i].reg_class, pnb->nb_rpt[i].ch_num, pnb->nb_rpt[i].phy_type); if (pnb->nb_rpt[i].ch_num == 0) @@ -6791,7 +6800,7 @@ static void rtw_wnm_nb_info_update( break; } } - + if (!is_found) { pnb->nb_rpt_ch_list[pnb->nb_rpt_ch_list_num].hw_value = pnb->nb_rpt[i].ch_num; pnb->nb_rpt_ch_list_num++; @@ -6809,7 +6818,7 @@ static void rtw_wnm_btm_candidate_select(_adapter *padapter) for (i = 0; i < pnb->last_nb_rpt_entries; i++) { pnetwork = rtw_find_network( - &(pmlmepriv->scanned_queue), + &(pmlmepriv->scanned_queue), pnb->nb_rpt[i].bssid); if (pnetwork) { @@ -6826,7 +6835,7 @@ static void rtw_wnm_btm_candidate_select(_adapter *padapter) , MAC_ARG(pnetwork->network.MacAddress) , pnetwork->network.Configuration.DSConfig , (int)pnetwork->network.Rssi); - } else + } else _rtw_memset(pnb->roam_target_addr,0, ETH_ALEN); } @@ -6837,20 +6846,20 @@ u32 rtw_wnm_btm_candidates_survey( struct wnm_btm_cant *pcandidate_list = NULL; u8 nb_rpt_is_same = _TRUE; u32 ret = _FAIL; - u32 nb_rpt_entries = 0; + u32 nb_rpt_entries = 0; if (from_btm) { u32 mlen = sizeof(struct wnm_btm_cant) * RTW_MAX_NB_RPT_NUM; pcandidate_list = (struct wnm_btm_cant *)rtw_malloc(mlen); - if (pcandidate_list == NULL) - goto exit; + if (pcandidate_list == NULL) + goto exit; } /*clean the status set last time*/ _rtw_memset(&pnb->nb_rpt_ch_list, 0, sizeof(pnb->nb_rpt_ch_list)); pnb->nb_rpt_valid = _FALSE; if (!rtw_wnm_nb_elem_parsing( - pframe, elem_len, from_btm, + pframe, elem_len, from_btm, &nb_rpt_entries, &nb_rpt_is_same, pnb, pcandidate_list)) goto exit; @@ -6860,11 +6869,11 @@ u32 rtw_wnm_btm_candidates_survey( rtw_wnm_candidates_sorting(nb_rpt_entries, pcandidate_list); rtw_wnm_nb_info_update( - nb_rpt_entries, from_btm, + nb_rpt_entries, from_btm, pnb, pcandidate_list, &nb_rpt_is_same); } - RTW_INFO("nb_rpt_is_same = %d, nb_rpt_entries = %d, last_nb_rpt_entries = %d\n", + RTW_INFO("nb_rpt_is_same = %d, nb_rpt_entries = %d, last_nb_rpt_entries = %d\n", nb_rpt_is_same, nb_rpt_entries, pnb->last_nb_rpt_entries); if ((nb_rpt_is_same == _TRUE) && (nb_rpt_entries == pnb->last_nb_rpt_entries)) pnb->nb_rpt_is_same = _TRUE; @@ -6875,14 +6884,14 @@ u32 rtw_wnm_btm_candidates_survey( if ((from_btm) && (nb_rpt_entries != 0)) rtw_wnm_btm_candidate_select(padapter); - + pnb->nb_rpt_valid = _TRUE; ret = _SUCCESS; exit: if (from_btm && pcandidate_list) rtw_mfree((u8 *)pcandidate_list, sizeof(struct wnm_btm_cant) * RTW_MAX_NB_RPT_NUM); - + return ret; } #endif @@ -6990,21 +6999,21 @@ u8 rtw_wmn_btm_rsp_reason_decision(_adapter *padapter, u8* req_mode) /* Accept */ reason = 0; goto under_survey; - } + } #endif if (((*req_mode) & DISASSOC_IMMINENT) == 0) { /* Reject - Unspecified reject reason */ reason = 1; goto candidate_remove; - } + } if (precvpriv->signal_strength_data.avg_val >= pmlmepriv->roam_rssi_threshold) { reason = 1; goto candidate_remove; } -under_survey: +under_survey: if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) { RTW_INFO("%s reject due to _FW_UNDER_SURVEY\n", __func__); reason = 1; @@ -7031,14 +7040,14 @@ static u32 rtw_wnm_btm_candidates_offset_get(u8* pframe) /* BSS Termination Duration check */ if (wnm_btm_bss_term_inc(pframe)) { offset += 12; - pos += offset; - } + pos += offset; + } /* Session Information URL check*/ if (wnm_btm_ess_disassoc_im(pframe)) { /*URL length field + URL variable length*/ offset = 1 + *(pframe + offset); - pos += offset; + pos += offset; } offset = (pos - pframe); @@ -7058,8 +7067,8 @@ static void rtw_wnm_btm_req_hdr_parsing(u8* pframe, struct btm_req_hdr *phdr) phdr->disassoc_timer = wnm_btm_disassoc_timer(pframe); phdr->validity_interval = wnm_btm_valid_interval(pframe); if (wnm_btm_bss_term_inc(pframe)) { - _rtw_memcpy(&phdr->term_duration, - wnm_btm_term_duration_offset(pframe), + _rtw_memcpy(&phdr->term_duration, + wnm_btm_term_duration_offset(pframe), sizeof(struct btm_term_duration)); } @@ -7075,9 +7084,9 @@ void rtw_wnm_roam_scan_hdl(void *ctx) _adapter *padapter = (_adapter *)ctx; struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - if (rtw_is_scan_deny(padapter)) + if (rtw_is_scan_deny(padapter)) RTW_INFO("WNM: roam scan would abort by scan_deny!\n"); - + pmlmepriv->need_to_roam = _TRUE; rtw_drv_scan_by_self(padapter, RTW_AUTO_SCAN_REASON_ROAM); } @@ -7109,10 +7118,10 @@ void rtw_wnm_process_btm_req(_adapter *padapter, u8* pframe, u32 frame_len) elem_len = (frame_len - offset); rtw_wnm_btm_candidates_survey(padapter, ptr, elem_len, _TRUE); reason = rtw_wmn_btm_rsp_reason_decision(padapter, &pframe[3]); - rtw_wnm_issue_action(padapter, + rtw_wnm_issue_action(padapter, RTW_WLAN_ACTION_WNM_BTM_RSP, reason); - if (reason == 0) + if (reason == 0) rtw_wnm_roam_scan(padapter); } @@ -7149,7 +7158,7 @@ void rtw_wnm_issue_action(_adapter *padapter, u8 action, u8 reason) if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) return ; - + pattrib = &(pmgntframe->attrib); update_mgntframe_attrib(padapter, pattrib); _rtw_memset(pmgntframe->buf_addr, 0, (WLANHDR_OFFSET + TXDESC_OFFSET)); @@ -7187,19 +7196,19 @@ void rtw_wnm_issue_action(_adapter *padapter, u8 action, u8 reason) pframe = rtw_set_fixed_ie(pframe, 1, &(reason), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(termination_delay), &(pattrib->pktlen)); if (!is_zero_mac_addr(pmlmepriv->nb_info.roam_target_addr)) { - pframe = rtw_set_fixed_ie(pframe, 6, + pframe = rtw_set_fixed_ie(pframe, 6, pmlmepriv->nb_info.roam_target_addr, &(pattrib->pktlen)); } - RTW_INFO("WNM: RTW_WLAN_ACTION_WNM_BTM_RSP sent. reason = %d\n", reason); - break; + RTW_INFO("WNM: RTW_WLAN_ACTION_WNM_BTM_RSP sent. reason = %d\n", reason); + break; default: goto exit; - } - + } + pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); -exit: +exit: return; } #endif @@ -8020,7 +8029,7 @@ void issue_beacon(_adapter *padapter, int timeout_ms) pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_BEACON_VENDOR_IE_BIT); #endif -#ifdef CONFIG_RTL8812A +#ifdef CONFIG_RTL8812A pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); #endif/*CONFIG_RTL8812A*/ @@ -8371,7 +8380,7 @@ void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probe } #endif /* CONFIG_AUTO_AP_MODE */ -#ifdef CONFIG_RTL8812A +#ifdef CONFIG_RTL8812A pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen); #endif/*CONFIG_RTL8812A*/ @@ -8505,7 +8514,7 @@ int _issue_probereq(_adapter *padapter, const NDIS_802_11_SSID *pssid, const u8 pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_PROBEREQ_VENDOR_IE_BIT); #endif -#ifdef CONFIG_RTL8812A +#ifdef CONFIG_RTL8812A pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); #endif/*CONFIG_RTL8812A*/ @@ -8619,7 +8628,6 @@ void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status pframe += sizeof(struct rtw_ieee80211_hdr_3addr); pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); - if (psta) { /* for AP mode */ #ifdef CONFIG_NATIVEAP_MLME @@ -8627,18 +8635,15 @@ void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); - /* setting auth algo number */ val16 = (u16)psta->authalg; - if (status != _STATS_SUCCESSFUL_) - val16 = 0; - if (val16) { val16 = cpu_to_le16(val16); use_shared_key = 1; + } else { + val16 = 0; } - pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); /* setting auth seq number */ @@ -8946,7 +8951,7 @@ void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *p pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCRESP_VENDOR_IE_BIT); #endif -#ifdef CONFIG_RTL8812A +#ifdef CONFIG_RTL8812A pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); #endif/*CONFIG_RTL8812A*/ @@ -9424,7 +9429,7 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc) /* OWE */ { u32 owe_ie_len; - + owe_ie_len = rtw_append_assoc_req_owe_ie(padapter, pframe); pframe += owe_ie_len; pattrib->pktlen += owe_ie_len; @@ -9437,7 +9442,7 @@ void _issue_assocreq(_adapter *padapter, u8 is_reassoc) pattrib->pktlen += rtw_build_vendor_ie(padapter , &pframe , WIFI_ASSOCREQ_VENDOR_IE_BIT); #endif -#ifdef CONFIG_RTL8812A +#ifdef CONFIG_RTL8812A pframe = rtw_hal_set_8812a_vendor_ie(padapter, pframe, &pattrib->pktlen ); #endif/*CONFIG_RTL8812A*/ @@ -9878,7 +9883,7 @@ int issue_deauth_ex(_adapter *padapter, u8 *da, unsigned short reason, int try_c break; if (i < try_cnt && wait_ms > 0 && ret == _FAIL) - rtw_msleep_os(wait_ms); + rtw_mdelay_os(wait_ms); } while ((i < try_cnt) && ((ret == _FAIL) || (wait_ms == 0))); @@ -10826,7 +10831,7 @@ unsigned int send_beacon(_adapter *padapter) #endif /* CONFIG_PCI_BCN_POLLING is for pci interface beacon polling mode */ -#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)|| defined(CONFIG_PCI_BCN_POLLING) +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)|| defined(CONFIG_PCI_BCN_POLLING) u8 bxmitok = _FALSE; int issue = 0; int poll = 0; @@ -10860,14 +10865,14 @@ unsigned int send_beacon(_adapter *padapter) rtw_hal_set_hwreg(padapter, HW_VAR_BCN_HEAD_SEL, &vap_id); #endif do { - #if defined(CONFIG_PCI_BCN_POLLING) + #if defined(CONFIG_PCI_BCN_POLLING) issue_beacon(padapter, 0); #else issue_beacon(padapter, 100); #endif issue++; do { - #if defined(CONFIG_PCI_BCN_POLLING) + #if defined(CONFIG_PCI_BCN_POLLING) rtw_msleep_os(1); #else rtw_yield_os(); @@ -10875,7 +10880,7 @@ unsigned int send_beacon(_adapter *padapter) rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8 *)(&bxmitok)); poll++; } while ((poll % 10) != 0 && _FALSE == bxmitok && !RTW_CANNOT_RUN(padapter)); - #if defined(CONFIG_PCI_BCN_POLLING) + #if defined(CONFIG_PCI_BCN_POLLING) rtw_hal_unmap_beacon_icf(padapter); #endif } while (bxmitok == _FALSE && (issue < 100) && !RTW_CANNOT_RUN(padapter)); @@ -12292,7 +12297,7 @@ static void rtw_mlmeext_disconnect(_adapter *padapter) self_action = MLME_ADHOC_STOPPED; else { RTW_INFO("state:0x%x\n", MLME_STATE(padapter)); - rtw_warn_on(1); + //rtw_warn_on(1); } /* set_opmode_cmd(padapter, infra_client_with_mlme); */ @@ -12597,9 +12602,9 @@ void rtw_delba_check(_adapter *padapter, struct sta_info *psta, u8 from_timer) */ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_BROADCOM) { for (i = 0; i < TID_NUM ; i++) { - if ((psta->recvreorder_ctrl[i].enable) && - (sta_rx_data_qos_pkts(psta, i) == sta_last_rx_data_qos_pkts(psta, i)) ) { - if (_TRUE == rtw_inc_and_chk_continual_no_rx_packet(psta, i)) { + if ((psta->recvreorder_ctrl[i].enable) && + (sta_rx_data_qos_pkts(psta, i) == sta_last_rx_data_qos_pkts(psta, i)) ) { + if (_TRUE == rtw_inc_and_chk_continual_no_rx_packet(psta, i)) { /* send a DELBA frame to the peer STA with the Reason Code field set to TIMEOUT */ if (!from_timer) ret = issue_del_ba_ex(padapter, psta->cmn.mac_addr, i, 39, 0, 3, 1); @@ -12609,7 +12614,7 @@ void rtw_delba_check(_adapter *padapter, struct sta_info *psta, u8 from_timer) if (ret != _FAIL) psta->recvreorder_ctrl[i].ampdu_size = RX_AMPDU_SIZE_INVALID; rtw_reset_continual_no_rx_packet(psta, i); - } + } } else { /* The inactivity timer is reset when MPDUs to the TID is received. */ rtw_reset_continual_no_rx_packet(psta, i); @@ -12890,7 +12895,7 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) is_p2p_enable = !rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE); #endif -#ifdef CONFIG_ISSUE_DELBA_WHEN_NO_TRAFFIC +#ifdef CONFIG_ISSUE_DELBA_WHEN_NO_TRAFFIC /*issue delba when ap does not tx data packet that is Broadcom ap */ rtw_delba_check(padapter, psta, from_timer); #endif @@ -12907,7 +12912,7 @@ void linked_status_chk(_adapter *padapter, u8 from_timer) u8 union_ch = 0, union_bw = 0, union_offset = 0; u8 switch_channel_by_drv = _TRUE; - + #ifdef CONFIG_MCC_MODE if (MCC_EN(padapter)) { /* driver doesn't switch channel under MCC */ @@ -13292,7 +13297,7 @@ void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame) uint len = precv_frame->u.hdr.len; WLAN_BSSID_EX *pbss; - if (rtw_ft_chk_status(padapter,RTW_FT_ASSOCIATED_STA) + if (rtw_ft_chk_status(padapter,RTW_FT_ASSOCIATED_STA) && (pmlmepriv->ft_roam.ft_updated_bcn == _FALSE)) { pbss = (WLAN_BSSID_EX*)rtw_malloc(sizeof(WLAN_BSSID_EX)); if (pbss) { @@ -13300,7 +13305,7 @@ void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame) struct beacon_keys recv_beacon; update_network(&(pmlmepriv->cur_network.network), pbss, padapter, _TRUE); - + /* update bcn keys */ if (rtw_get_bcn_keys(padapter, pframe, len, &recv_beacon) == _TRUE) { RTW_INFO("%s: beacon keys ready\n", __func__); @@ -13318,7 +13323,7 @@ void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame) } /* check the vendor of the assoc AP */ - pmlmeinfo->assoc_AP_vendor = + pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pframe+sizeof(struct rtw_ieee80211_hdr_3addr), (len - sizeof(struct rtw_ieee80211_hdr_3addr))); @@ -13356,26 +13361,26 @@ void rtw_ft_start_clnt_join(_adapter *padapter) } u8 rtw_ft_update_rsnie( - _adapter *padapter, u8 bwrite, + _adapter *padapter, u8 bwrite, struct pkt_attrib *pattrib, u8 **pframe) { struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); u8 *pie; u32 len; - pie = rtw_get_ie(pft_roam->updated_ft_ies, EID_WPA2, &len, + pie = rtw_get_ie(pft_roam->updated_ft_ies, EID_WPA2, &len, pft_roam->updated_ft_ies_len); if (!bwrite) return (pie)?_SUCCESS:_FAIL; - + if (pie) { - *pframe = rtw_set_ie(((u8 *)*pframe), EID_WPA2, len, + *pframe = rtw_set_ie(((u8 *)*pframe), EID_WPA2, len, pie+2, &(pattrib->pktlen)); } else return _FAIL; - return _SUCCESS; + return _SUCCESS; } static u8 rtw_ft_update_mdie( @@ -13386,10 +13391,10 @@ static u8 rtw_ft_update_mdie( u32 len = 3; if (rtw_ft_roam(padapter)) { - if ((pie = rtw_get_ie(pft_roam->updated_ft_ies, _MDIE_, + if ((pie = rtw_get_ie(pft_roam->updated_ft_ies, _MDIE_, &len, pft_roam->updated_ft_ies_len))) { pie = (pie + 2); /* ignore md-id & length */ - } else + } else return _FAIL; } else { *((u16 *)&mdie[0]) = pft_roam->mdid; @@ -13398,7 +13403,7 @@ static u8 rtw_ft_update_mdie( } *pframe = rtw_set_ie(((u8 *)*pframe), _MDIE_, len , pie, &(pattrib->pktlen)); - return _SUCCESS; + return _SUCCESS; } static u8 rtw_ft_update_ftie( @@ -13408,17 +13413,17 @@ static u8 rtw_ft_update_ftie( u8 *pie; u32 len; - if ((pie = rtw_get_ie(pft_roam->updated_ft_ies, _FTIE_, &len, + if ((pie = rtw_get_ie(pft_roam->updated_ft_ies, _FTIE_, &len, pft_roam->updated_ft_ies_len)) != NULL) { - *pframe = rtw_set_ie(*pframe, _FTIE_, len , + *pframe = rtw_set_ie(*pframe, _FTIE_, len , (pie+2), &(pattrib->pktlen)); } else return _FAIL; - return _SUCCESS; + return _SUCCESS; } -void rtw_ft_build_auth_req_ies(_adapter *padapter, +void rtw_ft_build_auth_req_ies(_adapter *padapter, struct pkt_attrib *pattrib, u8 **pframe) { u8 ftie_append = _TRUE; @@ -13435,7 +13440,7 @@ void rtw_ft_build_auth_req_ies(_adapter *padapter, rtw_ft_update_ftie(padapter, pattrib, pframe); } -void rtw_ft_build_assoc_req_ies(_adapter *padapter, +void rtw_ft_build_assoc_req_ies(_adapter *padapter, u8 is_reassoc, struct pkt_attrib *pattrib, u8 **pframe) { if (!pattrib || !(*pframe)) @@ -13448,7 +13453,7 @@ void rtw_ft_build_assoc_req_ies(_adapter *padapter, return; if (rtw_ft_update_rsnie(padapter, _FALSE, pattrib, pframe)) - rtw_ft_update_ftie(padapter, pattrib, pframe); + rtw_ft_update_ftie(padapter, pattrib, pframe); } u8 rtw_ft_update_auth_rsp_ies(_adapter *padapter, u8 *pframe, u32 len) @@ -13468,8 +13473,8 @@ u8 rtw_ft_update_auth_rsp_ies(_adapter *padapter, u8 *pframe, u32 len) if (!pframe || !len) return _FAIL; - - rtw_buf_update(&pmlmepriv->auth_rsp, + + rtw_buf_update(&pmlmepriv->auth_rsp, &pmlmepriv->auth_rsp_len, pframe, len); pft_roam->ft_event.ies = (pmlmepriv->auth_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6); @@ -13482,7 +13487,7 @@ u8 rtw_ft_update_auth_rsp_ies(_adapter *padapter, u8 *pframe, u32 len) _rtw_memcpy(target_ap_addr, pmlmepriv->assoc_bssid, ETH_ALEN); rtw_ft_report_reassoc_evt(padapter, target_ap_addr); - return ret; + return ret; } static void rtw_ft_start_clnt_action(_adapter *padapter, u8 *pTargetAddr) @@ -13655,7 +13660,7 @@ void rtw_ft_link_timer_hdl(void *ctx) rtw_ft_issue_action_req(padapter, (u8 *)pmlmepriv->roam_network->network.MacAddress); _set_timer(&pmlmeext->ft_link_timer, REASSOC_TO); } else { - pft_roam->ft_req_retry_cnt = 0; + pft_roam->ft_req_retry_cnt = 0; if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) rtw_ft_set_status(padapter, RTW_FT_ASSOCIATED_STA); else @@ -13677,11 +13682,11 @@ void rtw_ft_roam_status_reset(_adapter *padapter) { struct ft_roam_info *pft_roam = &(padapter->mlmepriv.ft_roam); - if ((rtw_to_roam(padapter) > 0) && + if ((rtw_to_roam(padapter) > 0) && (!rtw_ft_chk_status(padapter, RTW_FT_REQUESTED_STA))) { rtw_ft_reset_status(padapter); - } - + } + padapter->mlmepriv.ft_roam.ft_updated_bcn = _FALSE; } #endif @@ -14384,7 +14389,7 @@ u32 rtw_scan_timeout_decision(_adapter *padapter) struct ss_res *ss = &pmlmeext->sitesurvey_res; if (is_supported_5g(padapter->registrypriv.wireless_mode) - && IsSupported24G(padapter->registrypriv.wireless_mode)) + && IsSupported24G(padapter->registrypriv.wireless_mode)) max_chan_num = MAX_CHANNEL_NUM;/* dual band */ else max_chan_num = MAX_CHANNEL_NUM_2G;/*single band*/ @@ -16611,7 +16616,7 @@ u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) pchsw_info->ch_offset, (pchsw_info->ch_offset) ? CHANNEL_WIDTH_40 : CHANNEL_WIDTH_20, ptdls_sta->ch_switch_time) == _SUCCESS) { pchsw_info->ch_sw_state &= ~(TDLS_PEER_AT_OFF_STATE); if (pchsw_info->ch_sw_state & TDLS_CH_SW_INITIATOR_STATE) { - if (issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->cmn.mac_addr, 0, 1, + if (issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta->cmn.mac_addr, 0, 1, (padapter->registrypriv.wifi_spec == 0) ? 3 : 0) == _FAIL) rtw_tdls_cmd(padapter, ptdls_sta->cmn.mac_addr, TDLS_CH_SW_TO_BASE_CHNL); } diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_mp.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_mp.c index 5cf9f259c5b73d..aca3e8b4b5c1ad 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_mp.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_mp.c @@ -164,41 +164,7 @@ static void _init_mp_priv_(struct mp_priv *pmp_priv) } -#ifdef PLATFORM_WINDOWS #if 0 -void mp_wi_callback( - IN NDIS_WORK_ITEM *pwk_item, - IN PVOID cntx -) -{ - _adapter *padapter = (_adapter *)cntx; - struct mp_priv *pmppriv = &padapter->mppriv; - struct mp_wi_cntx *pmp_wi_cntx = &pmppriv->wi_cntx; - - /* Execute specified action. */ - if (pmp_wi_cntx->curractfunc != NULL) { - LARGE_INTEGER cur_time; - ULONGLONG start_time, end_time; - NdisGetCurrentSystemTime(&cur_time); /* driver version */ - start_time = cur_time.QuadPart / 10; /* The return value is in microsecond */ - - pmp_wi_cntx->curractfunc(padapter); - - NdisGetCurrentSystemTime(&cur_time); /* driver version */ - end_time = cur_time.QuadPart / 10; /* The return value is in microsecond */ - - } - - NdisAcquireSpinLock(&(pmp_wi_cntx->mp_wi_lock)); - pmp_wi_cntx->bmp_wi_progress = _FALSE; - NdisReleaseSpinLock(&(pmp_wi_cntx->mp_wi_lock)); - - if (pmp_wi_cntx->bmpdrv_unload) - NdisSetEvent(&(pmp_wi_cntx->mp_wi_evt)); - -} -#endif - static int init_mp_priv_by_os(struct mp_priv *pmp_priv) { struct mp_wi_cntx *pmp_wi_cntx; @@ -741,15 +707,6 @@ MPT_DeInitAdapter( #if defined(CONFIG_RTL8723B) phy_set_bb_reg(pAdapter, 0xA01, BIT0, 1); /* /suggestion by jerry for MP Rx. */ #endif -#if 0 /* for Windows */ - PlatformFreeWorkItem(&(pMptCtx->MptWorkItem)); - - while (pMptCtx->bMptWorkItemInProgress) { - if (NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50)) - break; - } - NdisFreeSpinLock(&(pMptCtx->MptWorkItemSpinLock)); -#endif } static u8 mpt_ProStartTest(PADAPTER padapter) @@ -2449,7 +2406,7 @@ u32 mp_query_psd(PADAPTER pAdapter, u8 *data) psd_data = rtw_GetPSDData(pAdapter, i - psd_pts); else psd_data = rtw_GetPSDData(pAdapter, i); - sprintf(data, "%s%x ", data, psd_data); + sprintf(data + strlen(data), "%x ", psd_data); i++; } diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_pwrctrl.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_pwrctrl.c index 5bf44291a9ff9b..b7d6dca296561c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_pwrctrl.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_pwrctrl.c @@ -94,7 +94,7 @@ void _ips_enter(_adapter *padapter) if (pwrpriv->ips_mode == IPS_LEVEL_2) pwrpriv->bkeepfwalive = _TRUE; -#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS +#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS pwrpriv->pwr_saving_start_time = rtw_get_current_time(); #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ @@ -133,8 +133,8 @@ int _ips_leave(_adapter *padapter) result = rtw_ips_pwr_up(padapter); if (result == _SUCCESS) pwrpriv->rf_pwrstate = rf_on; - -#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS + +#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); #endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ @@ -229,6 +229,7 @@ bool rtw_pwr_unassociated_idle(_adapter *adapter) || MLME_IS_AP(iface) || MLME_IS_MESH(iface) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) + || check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) || rtw_cfg80211_get_is_roch(iface) == _TRUE || (rtw_cfg80211_is_ro_ch_once(adapter) @@ -286,7 +287,7 @@ void rtw_ps_processor(_adapter *padapter) _enter_pwrlock(&adapter_to_pwrctl(padapter)->lock); ps_deny = rtw_ps_deny_get(padapter); _exit_pwrlock(&adapter_to_pwrctl(padapter)->lock); - if (ps_deny != 0) { + if ((ps_deny & (~(1<mlmepriv; - - if (tx) { /* from tx */ xmit_cnt += tx_packets; @@ -540,7 +539,7 @@ u8 rtw_cpwm_polling(_adapter *adapter, u8 rpwm, u8 cpwm_orig) do { start_time = rtw_get_current_time(); do { - rtw_msleep_os(1); + rtw_mdelay_os(1); rtw_hal_get_hwreg(adapter, HW_VAR_CPWM, &cpwm_now); if ((cpwm_orig ^ cpwm_now) & 0x80) { @@ -716,6 +715,7 @@ u8 PS_RDY_CHECK(_adapter *padapter) || MLME_IS_AP(padapter) || MLME_IS_MESH(padapter) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE) + || check_fwstate(pmlmepriv, WIFI_MONITOR_STATE) #if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) || rtw_cfg80211_get_is_roch(padapter) == _TRUE #endif @@ -884,8 +884,6 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode u8 lps_pg_hdl_id = 0; #endif - - if (ps_mode > PM_Card_Disable) { return; } @@ -1085,7 +1083,6 @@ void rtw_set_ps_mode(PADAPTER padapter, u8 ps_mode, u8 smart_ps, u8 bcn_ant_mode pwrpriv->wmm_smart_ps = pregistrypriv->wmm_smart_ps; #endif /* CONFIG_WMMPS_STA */ - if (check_fwstate(pmlmepriv, _FW_LINKED)) rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); #ifdef CONFIG_WOWLAN @@ -1227,7 +1224,6 @@ void LPS_Leave(PADAPTER padapter, const char *msg) struct debug_priv *pdbgpriv = &dvobj->drv_dbg; #endif - /* RTW_INFO("+LeisurePSLeave\n"); */ #ifdef CONFIG_BT_COEXIST @@ -1431,7 +1427,6 @@ void LPS_Leave_check( systime start_time; u8 bReady; - pwrpriv = adapter_to_pwrctl(padapter); bReady = _FALSE; @@ -1460,7 +1455,7 @@ void LPS_Leave_check( RTW_ERR("Wait for cpwm event than 100 ms!!!\n"); break; } - rtw_msleep_os(1); + rtw_mdelay_os(1); } } @@ -1653,7 +1648,6 @@ static void pwr_rpwm_timeout_handler(void *FunctionContext) PADAPTER padapter; struct pwrctrl_priv *pwrpriv; - padapter = (PADAPTER)FunctionContext; pwrpriv = adapter_to_pwrctl(padapter); if (!padapter) @@ -1683,7 +1677,6 @@ __inline static void unregister_task_alive(struct pwrctrl_priv *pwrctrl, u32 tag pwrctrl->alives &= ~tag; } - /* * Description: * Check if the fw_pwrstate is okay for I/O. @@ -1733,7 +1726,6 @@ s32 rtw_register_task_alive(PADAPTER padapter, u32 task) } #endif /* CONFIG_DETECT_CPWM_BY_POLLING */ - return res; } @@ -1752,7 +1744,6 @@ void rtw_unregister_task_alive(PADAPTER padapter, u32 task) struct pwrctrl_priv *pwrctrl; u8 pslv; - pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S0; @@ -1832,7 +1823,6 @@ s32 rtw_register_tx_alive(PADAPTER padapter) } #endif /* CONFIG_DETECT_CPWM_BY_POLLING */ - return res; } @@ -1883,7 +1873,6 @@ s32 rtw_register_cmd_alive(PADAPTER padapter) } #endif /* CONFIG_DETECT_CPWM_BY_POLLING */ - return res; } @@ -1926,7 +1915,6 @@ s32 rtw_register_evt_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; - pwrctrl = adapter_to_pwrctl(padapter); _enter_pwrlock(&pwrctrl->lock); @@ -1935,7 +1923,6 @@ s32 rtw_register_evt_alive(PADAPTER padapter) _exit_pwrlock(&pwrctrl->lock); - return _SUCCESS; } @@ -1953,7 +1940,6 @@ void rtw_unregister_tx_alive(PADAPTER padapter) struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); u8 pslv, i; - pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S0; @@ -2011,7 +1997,6 @@ void rtw_unregister_cmd_alive(PADAPTER padapter) struct pwrctrl_priv *pwrctrl; u8 pslv, i; - pwrctrl = adapter_to_pwrctl(padapter); pslv = PS_STATE_S0; @@ -2063,14 +2048,12 @@ void rtw_unregister_rx_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; - pwrctrl = adapter_to_pwrctl(padapter); _enter_pwrlock(&pwrctrl->lock); unregister_task_alive(pwrctrl, RECV_ALIVE); - _exit_pwrlock(&pwrctrl->lock); } @@ -2079,12 +2062,10 @@ void rtw_unregister_evt_alive(PADAPTER padapter) { struct pwrctrl_priv *pwrctrl; - pwrctrl = adapter_to_pwrctl(padapter); unregister_task_alive(pwrctrl, EVT_ALIVE); - _exit_pwrlock(&pwrctrl->lock); } @@ -2109,7 +2090,6 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) return; #endif - #ifdef PLATFORM_WINDOWS pwrctrlpriv->pnp_current_pwr_state = NdisDeviceStateD0; #endif @@ -2255,10 +2235,8 @@ void rtw_init_pwrctrl_priv(PADAPTER padapter) rtw_hal_set_hwreg(padapter, HW_VAR_LPS_POFF_INIT, 0); #endif - } - void rtw_free_pwrctrl_priv(PADAPTER adapter) { struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(adapter); @@ -2268,10 +2246,8 @@ void rtw_free_pwrctrl_priv(PADAPTER adapter) return; #endif - /* _rtw_memset((unsigned char *)pwrctrlpriv, 0, sizeof(struct pwrctrl_priv)); */ - #ifdef CONFIG_RESUME_IN_WORKQUEUE if (pwrctrlpriv->rtw_workqueue) { flush_workqueue(pwrctrlpriv->rtw_workqueue); @@ -2399,7 +2375,6 @@ void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) pwrpriv->early_suspend.resume = rtw_late_resume; register_early_suspend(&pwrpriv->early_suspend); - } void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) @@ -2476,7 +2451,6 @@ u8 rtw_interface_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val) return bResult; } - inline void rtw_set_ips_deny(_adapter *padapter, u32 ms) { struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); @@ -2509,11 +2483,10 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) if (rtw_time_after(rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms), pwrpriv->ips_deny_time)) pwrpriv->ips_deny_time = rtw_get_current_time() + rtw_ms_to_systime(ips_deffer_ms); - if (pwrpriv->ps_processing) { RTW_INFO("%s wait ps_processing...\n", __func__); while (pwrpriv->ps_processing && rtw_get_passing_time_ms(start) <= 3000) - rtw_msleep_os(10); + rtw_mdelay_os(10); if (pwrpriv->ps_processing) RTW_INFO("%s wait ps_processing timeout\n", __func__); else @@ -2524,7 +2497,7 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) if (rtw_hal_sreset_inprogress(padapter)) { RTW_INFO("%s wait sreset_inprogress...\n", __func__); while (rtw_hal_sreset_inprogress(padapter) && rtw_get_passing_time_ms(start) <= 4000) - rtw_msleep_os(10); + rtw_mdelay_os(10); if (rtw_hal_sreset_inprogress(padapter)) RTW_INFO("%s wait sreset_inprogress timeout\n", __func__); else @@ -2542,7 +2515,7 @@ int _rtw_pwr_wakeup(_adapter *padapter, u32 ips_deffer_ms, const char *caller) && ((rtw_get_passing_time_ms(start) <= 3000 && !rtw_is_do_late_resume(pwrpriv)) || (rtw_get_passing_time_ms(start) <= 500 && rtw_is_do_late_resume(pwrpriv))) ) - rtw_msleep_os(10); + rtw_mdelay_os(10); if (pwrpriv->bInSuspend) RTW_INFO("%s wait bInSuspend timeout\n", __func__); else diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_recv.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_recv.c old mode 100755 new mode 100644 index 3f4490db1889c9..83fa1429f46bd0 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_recv.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_recv.c @@ -17,13 +17,6 @@ #include #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - - #error "Shall be Linux or Windows, but not both!\n" - -#endif - - #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS static void rtw_signal_stat_timer_hdl(void *ctx); @@ -4013,11 +4006,40 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, u8 hdr_buf[64] = {0}; u16 rt_len = 8; + u32 tmp_32bit; + int i; /* create header */ rtap_hdr = (struct ieee80211_radiotap_header *)&hdr_buf[0]; rtap_hdr->it_version = PKTHDR_RADIOTAP_VERSION; + if(pHalData->NumTotalRFPath>0 && pattrib->physt) { + rtap_hdr->it_present |= (1<NumTotalRFPath>1) { + tmp_32bit = (1<NumTotalRFPath-1; i++) { + memcpy(&hdr_buf[rt_len], &tmp_32bit, 4); + rt_len += 4; + } + } + tmp_32bit = (1<bw = pattrib->phy_info.band_width & 0x03; +#endif + /* tsft */ if (pattrib->tsfl) { u64 tmp_64bit; @@ -4042,9 +4064,15 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, if (pattrib->mfrag) hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_FRAG; - /* always append FCS */ - hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_FCS; +#ifdef CONFIG_RX_PACKET_APPEND_FCS + // Start by always indicating FCS is there: + hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_FCS; + // Next, test for prior conditions that will remove FCS, and update flag accordingly: + if(check_fwstate(&padapter->mlmepriv,WIFI_MONITOR_STATE) == _FALSE) + if((pattrib->pkt_rpt_type == NORMAL_RX) && (pHalData->ReceiveConfig & RCR_APPFCS)) + hdr_buf[rt_len] &= ~IEEE80211_RADIOTAP_F_FCS; +#endif if (0) hdr_buf[rt_len] |= IEEE80211_RADIOTAP_F_DATAPAD; @@ -4075,16 +4103,25 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, tmp_16bit = 0; rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_CHANNEL); tmp_16bit = CHAN2FREQ(rtw_get_oper_ch(padapter)); - /*tmp_16bit = CHAN2FREQ(pHalData->current_channel);*/ memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); rt_len += 2; /* channel flags */ - tmp_16bit = 0; - if (pHalData->current_band_type == 0) + if (pHalData->current_band_type == BAND_ON_2_4G) { + tmp_16bit = 0; tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_2GHZ); - else + } else if (pHalData->current_band_type == BAND_ON_5G) { + tmp_16bit = 0; tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_5GHZ); + } else { + if (tmp_16bit >= 5000) { + tmp_16bit = 0; + tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_5GHZ); + } else { + tmp_16bit = 0; + tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_2GHZ); + } + } if (pattrib->data_rate <= DESC_RATE54M) { if (pattrib->data_rate <= DESC_RATE11M) { @@ -4094,33 +4131,43 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, /* OFDM */ tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_OFDM); } - } else + } else { tmp_16bit |= cpu_to_le16(IEEE80211_CHAN_DYN); + } memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); rt_len += 2; - /* dBm Antenna Signal */ - rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL); - hdr_buf[rt_len] = pattrib->phy_info.recv_signal_power; - rt_len += 1; + if(pattrib->physt) { + /* dBm Antenna Signal */ + rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL); + hdr_buf[rt_len] = pattrib->phy_info.recv_signal_power; + rt_len += 1; #if 0 /* dBm Antenna Noise */ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE); hdr_buf[rt_len] = 0; rt_len += 1; +#endif + + rt_len++; // alignment + } /* Signal Quality */ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_LOCK_QUALITY); - hdr_buf[rt_len] = pattrib->phy_info.signal_quality; - rt_len += 1; -#endif + tmp_16bit = cpu_to_le16(pattrib->phy_info.signal_quality); + memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); + rt_len += 2; +#if 0 /* Antenna */ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_ANTENNA); - hdr_buf[rt_len] = 0; /* pHalData->rf_type; */ + hdr_buf[rt_len] = pHalData->rf_type; rt_len += 1; + rt_len++; // alignment +#endif + /* RX flags */ rtap_hdr->it_present |= (1 << IEEE80211_RADIOTAP_RX_FLAGS); #if 0 @@ -4140,13 +4187,15 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, hdr_buf[rt_len + 1] |= (pattrib->bw & 0x03); /* guard interval */ +#ifndef CONFIG_RTL8814A hdr_buf[rt_len] |= BIT2; hdr_buf[rt_len + 1] |= (pattrib->sgi & 0x01) << 2; - +#endif /* STBC */ +#ifndef CONFIG_RTL8814A hdr_buf[rt_len] |= BIT5; hdr_buf[rt_len + 1] |= (pattrib->stbc & 0x03) << 5; - +#endif rt_len += 2; /* MCS rate index */ @@ -4179,7 +4228,9 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, hdr_buf[rt_len + 2] |= (pattrib->sgi & 0x01) << 2; /* LDPC extra OFDM symbol */ +#ifndef CONFIG_RTL8814A tmp_16bit |= BIT4; +#endif hdr_buf[rt_len + 2] |= (pattrib->ldpc & 0x01) << 4; memcpy(&hdr_buf[rt_len], &tmp_16bit, 2); @@ -4226,6 +4277,15 @@ static sint fill_radiotap_hdr(_adapter *padapter, union recv_frame *precvframe, rt_len += 2; } + if (pattrib->physt) { + for(i=0; iNumTotalRFPath; i++) { + hdr_buf[rt_len] = pattrib->phy_info.rx_pwr[i]; + rt_len ++; + hdr_buf[rt_len] = i; + rt_len ++; + } + } + /* push to skb */ pskb = (_pkt *)buf; if (skb_headroom(pskb) < rt_len) { @@ -4516,29 +4576,23 @@ int recv_func(_adapter *padapter, union recv_frame *rframe) return ret; } - s32 rtw_recv_entry(union recv_frame *precvframe) { _adapter *padapter; struct recv_priv *precvpriv; s32 ret = _SUCCESS; - - padapter = precvframe->u.hdr.adapter; precvpriv = &padapter->recvpriv; - ret = recv_func(padapter, precvframe); if (ret == _FAIL) { goto _recv_entry_drop; } - precvpriv->rx_pkts++; - return ret; _recv_entry_drop: @@ -4548,8 +4602,6 @@ s32 rtw_recv_entry(union recv_frame *precvframe) padapter->mppriv.rx_pktloss = precvpriv->rx_drop; #endif - - return ret; } @@ -5087,4 +5139,3 @@ void dump_rx_bh_tk(void *sel, struct recv_priv *recv) ); } #endif /* DBG_RX_BH_TRACKING */ - diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_rf.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_rf.c index 7ed3d5d7881e29..ab4c31828d7b45 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_rf.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_rf.c @@ -1225,7 +1225,7 @@ s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch) kfree_offset = kfree_data->bb_gain[bb_gain_sel][path]; if (IS_HARDWARE_TYPE_8723D(padapter)) RTW_INFO("%s path:%s, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n" - , __func__, (path == 0)?"S1":"S0", + , __func__, (path == 0)?"S1":"S0", ch, bb_gain_sel, kfree_offset); else RTW_INFO("%s path:%u, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n" @@ -1238,7 +1238,7 @@ s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch) void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) { -#if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8821A) u8 write_value; #endif u8 target_path = 0; @@ -1256,7 +1256,7 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) target_path = path; RTW_INFO("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff)); } - + switch (rtw_get_chip_type(adapter)) { #ifdef CONFIG_RTL8723D case RTL8723D: @@ -1311,7 +1311,7 @@ void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) rtw_warn_on(1); break; } - + if (IS_HARDWARE_TYPE_8723D(adapter)) { if (path == PPG_8723D_S1) val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff); diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_rm.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_rm.c index cd6d78f3940ff1..6576597b19ab55 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_rm.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_rm.c @@ -1879,7 +1879,7 @@ int retrieve_radio_meas_result(struct rm_obj *prm) /* IPI 0~10 */ for (i=0;i<11;i++) prm->p.ipi[i] = hal_data->acs.nhm[ch][i]; - + #else val8 = 0; prm->p.anpi = val8; @@ -2285,7 +2285,7 @@ static void rm_dbg_add_meas(_adapter *padapter, char *s) if (prm->q.action_code == RM_ACT_RADIO_MEAS_REQ) sprintf(pstr(s), "\nAdd rmid=%x, meas_type=%s ok\n", prm->rmid, rm_type_req_name(prm->q.m_type)); - else if (prm->q.action_code == RM_ACT_NB_REP_REQ) + else if (prm->q.action_code == RM_ACT_NB_REP_REQ) sprintf(pstr(s), "\nAdd rmid=%x, meas_type=bcn_req ok\n", prm->rmid); diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_security.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_security.c index 0f98c6aac3b37d..eb08ef58028416 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_security.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_security.c @@ -178,29 +178,29 @@ static u8 crc32_reverseBit(u8 data) static void crc32_init(void) { + int i, j; + u32 c; + u8 *p = (u8 *)&c, *p1; + u8 k; + if (bcrc32initialized == 1) goto exit; - else { - sint i, j; - u32 c; - u8 *p = (u8 *)&c, *p1; - u8 k; - - c = 0x12340000; - - for (i = 0; i < 256; ++i) { - k = crc32_reverseBit((u8)i); - for (c = ((u32)k) << 24, j = 8; j > 0; --j) - c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1); - p1 = (u8 *)&crc32_table[i]; - - p1[0] = crc32_reverseBit(p[3]); - p1[1] = crc32_reverseBit(p[2]); - p1[2] = crc32_reverseBit(p[1]); - p1[3] = crc32_reverseBit(p[0]); - } - bcrc32initialized = 1; + + c = 0x12340000; + + for (i = 0; i < 256; ++i) { + k = crc32_reverseBit((u8)i); + for (c = ((u32)k) << 24, j = 8; j > 0; --j) + c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1); + p1 = (u8 *)&crc32_table[i]; + + p1[0] = crc32_reverseBit(p[3]); + p1[1] = crc32_reverseBit(p[2]); + p1[2] = crc32_reverseBit(p[1]); + p1[3] = crc32_reverseBit(p[0]); } + bcrc32initialized = 1; + exit: return; } @@ -219,7 +219,6 @@ static u32 getcrc32(u8 *buf, sint len) return ~crc; /* transmit complement, per CRC-32 spec */ } - /* Need to consider the fragment situation */ @@ -241,7 +240,6 @@ void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe) struct xmit_priv *pxmitpriv = &padapter->xmitpriv; - if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL) return; @@ -2132,178 +2130,6 @@ u32 rtw_BIP_verify(_adapter *padapter, u8 *whdr_pos, sint flen #ifndef PLATFORM_FREEBSD #if defined(CONFIG_TDLS) -/* compress 512-bits */ -static int sha256_compress(struct rtw_sha256_state *md, unsigned char *buf) -{ - u32 S[8], W[64], t0, t1; - u32 t; - int i; - - /* copy state into S */ - for (i = 0; i < 8; i++) - S[i] = md->state[i]; - - /* copy the state into 512-bits into W[0..15] */ - for (i = 0; i < 16; i++) - W[i] = WPA_GET_BE32(buf + (4 * i)); - - /* fill W[16..63] */ - for (i = 16; i < 64; i++) { - W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) + - W[i - 16]; - } - - /* Compress */ -#define RND(a, b, c, d, e, f, g, h, i) do {\ - t0 = h + Sigma1(e) + Ch(e, f, g) + K[i] + W[i]; \ - t1 = Sigma0(a) + Maj(a, b, c); \ - d += t0; \ - h = t0 + t1; \ - } while (0) - - for (i = 0; i < 64; ++i) { - RND(S[0], S[1], S[2], S[3], S[4], S[5], S[6], S[7], i); - t = S[7]; - S[7] = S[6]; - S[6] = S[5]; - S[5] = S[4]; - S[4] = S[3]; - S[3] = S[2]; - S[2] = S[1]; - S[1] = S[0]; - S[0] = t; - } - - /* feedback */ - for (i = 0; i < 8; i++) - md->state[i] = md->state[i] + S[i]; - return 0; -} - -/* Initialize the hash state */ -static void sha256_init(struct rtw_sha256_state *md) -{ - md->curlen = 0; - md->length = 0; - md->state[0] = 0x6A09E667UL; - md->state[1] = 0xBB67AE85UL; - md->state[2] = 0x3C6EF372UL; - md->state[3] = 0xA54FF53AUL; - md->state[4] = 0x510E527FUL; - md->state[5] = 0x9B05688CUL; - md->state[6] = 0x1F83D9ABUL; - md->state[7] = 0x5BE0CD19UL; -} - -/** - Process a block of memory though the hash - @param md The hash state - @param in The data to hash - @param inlen The length of the data (octets) - @return CRYPT_OK if successful -*/ -static int sha256_process(struct rtw_sha256_state *md, unsigned char *in, - unsigned long inlen) -{ - unsigned long n; -#define block_size 64 - - if (md->curlen >= sizeof(md->buf)) - return -1; - - while (inlen > 0) { - if (md->curlen == 0 && inlen >= block_size) { - if (sha256_compress(md, (unsigned char *) in) < 0) - return -1; - md->length += block_size * 8; - in += block_size; - inlen -= block_size; - } else { - n = MIN(inlen, (block_size - md->curlen)); - _rtw_memcpy(md->buf + md->curlen, in, n); - md->curlen += n; - in += n; - inlen -= n; - if (md->curlen == block_size) { - if (sha256_compress(md, md->buf) < 0) - return -1; - md->length += 8 * block_size; - md->curlen = 0; - } - } - } - - return 0; -} - - -/** - Terminate the hash to get the digest - @param md The hash state - @param out [out] The destination of the hash (32 bytes) - @return CRYPT_OK if successful -*/ -static int sha256_done(struct rtw_sha256_state *md, unsigned char *out) -{ - int i; - - if (md->curlen >= sizeof(md->buf)) - return -1; - - /* increase the length of the message */ - md->length += md->curlen * 8; - - /* append the '1' bit */ - md->buf[md->curlen++] = (unsigned char) 0x80; - - /* if the length is currently above 56 bytes we append zeros - * then compress. Then we can fall back to padding zeros and length - * encoding like normal. - */ - if (md->curlen > 56) { - while (md->curlen < 64) - md->buf[md->curlen++] = (unsigned char) 0; - sha256_compress(md, md->buf); - md->curlen = 0; - } - - /* pad upto 56 bytes of zeroes */ - while (md->curlen < 56) - md->buf[md->curlen++] = (unsigned char) 0; - - /* store length */ - WPA_PUT_BE64(md->buf + 56, md->length); - sha256_compress(md, md->buf); - - /* copy output */ - for (i = 0; i < 8; i++) - WPA_PUT_BE32(out + (4 * i), md->state[i]); - - return 0; -} - -/** - * sha256_vector - SHA256 hash for data vector - * @num_elem: Number of elements in the data vector - * @addr: Pointers to the data areas - * @len: Lengths of the data blocks - * @mac: Buffer for the hash - * Returns: 0 on success, -1 of failure - */ -static int sha256_vector(size_t num_elem, u8 *addr[], size_t *len, - u8 *mac) -{ - struct rtw_sha256_state ctx; - size_t i; - - sha256_init(&ctx); - for (i = 0; i < num_elem; i++) - if (sha256_process(&ctx, addr[i], len[i])) - return -1; - if (sha256_done(&ctx, mac)) - return -1; - return 0; -} static u8 os_strlen(const char *s) { @@ -2334,78 +2160,6 @@ static int os_memcmp(const void *s1, const void *s2, u8 n) } #endif -/** - * hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104) - * @key: Key for HMAC operations - * @key_len: Length of the key in bytes - * @num_elem: Number of elements in the data vector - * @addr: Pointers to the data areas - * @len: Lengths of the data blocks - * @mac: Buffer for the hash (32 bytes) - */ -#if defined(CONFIG_TDLS) -static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem, - u8 *addr[], size_t *len, u8 *mac) -{ - unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */ - unsigned char tk[32]; - u8 *_addr[6]; - size_t _len[6], i; - - if (num_elem > 5) { - /* - * Fixed limit on the number of fragments to avoid having to - * allocate memory (which could fail). - */ - return; - } - - /* if key is longer than 64 bytes reset it to key = SHA256(key) */ - if (key_len > 64) { - sha256_vector(1, &key, &key_len, tk); - key = tk; - key_len = 32; - } - - /* the HMAC_SHA256 transform looks like: - * - * SHA256(K XOR opad, SHA256(K XOR ipad, text)) - * - * where K is an n byte key - * ipad is the byte 0x36 repeated 64 times - * opad is the byte 0x5c repeated 64 times - * and text is the data being protected */ - - /* start out by storing key in ipad */ - _rtw_memset(k_pad, 0, sizeof(k_pad)); - _rtw_memcpy(k_pad, key, key_len); - /* XOR key with ipad values */ - for (i = 0; i < 64; i++) - k_pad[i] ^= 0x36; - - /* perform inner SHA256 */ - _addr[0] = k_pad; - _len[0] = 64; - for (i = 0; i < num_elem; i++) { - _addr[i + 1] = addr[i]; - _len[i + 1] = len[i]; - } - sha256_vector(1 + num_elem, _addr, _len, mac); - - _rtw_memset(k_pad, 0, sizeof(k_pad)); - _rtw_memcpy(k_pad, key, key_len); - /* XOR key with opad values */ - for (i = 0; i < 64; i++) - k_pad[i] ^= 0x5c; - - /* perform outer SHA256 */ - _addr[0] = k_pad; - _len[0] = 64; - _addr[1] = mac; - _len[1] = 32; - sha256_vector(2, _addr, _len, mac); -} -#endif /* CONFIG_TDLS */ #endif /* PLATFORM_FREEBSD */ /** * sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2) @@ -2420,46 +2174,6 @@ static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem, * This function is used to derive new, cryptographically separate keys from a * given key. */ -#ifndef PLATFORM_FREEBSD /* Baron */ -#if defined(CONFIG_TDLS) -static void sha256_prf(u8 *key, size_t key_len, char *label, - u8 *data, size_t data_len, u8 *buf, size_t buf_len) -{ - u16 counter = 1; - size_t pos, plen; - u8 hash[SHA256_MAC_LEN]; - u8 *addr[4]; - size_t len[4]; - u8 counter_le[2], length_le[2]; - - addr[0] = counter_le; - len[0] = 2; - addr[1] = (u8 *) label; - len[1] = os_strlen(label); - addr[2] = data; - len[2] = data_len; - addr[3] = length_le; - len[3] = sizeof(length_le); - - WPA_PUT_LE16(length_le, buf_len * 8); - pos = 0; - while (pos < buf_len) { - plen = buf_len - pos; - WPA_PUT_LE16(counter_le, counter); - if (plen >= SHA256_MAC_LEN) { - hmac_sha256_vector(key, key_len, 4, addr, len, - &buf[pos]); - pos += SHA256_MAC_LEN; - } else { - hmac_sha256_vector(key, key_len, 4, addr, len, hash); - _rtw_memcpy(&buf[pos], hash, plen); - break; - } - counter++; - } -} -#endif -#endif /* PLATFORM_FREEBSD Baron */ /* AES tables*/ const u32 Te0[256] = { diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_sta_mgt.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_sta_mgt.c index f4fbdb4a6213d9..f8c390dec625a6 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_sta_mgt.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_sta_mgt.c @@ -16,13 +16,6 @@ #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - - #error "Shall be Linux or Windows, but not both!\n" - -#endif - - bool test_st_match_rule(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port) { if (ntohs(*((u16 *)local_port)) == 5001 || ntohs(*((u16 *)remote_port)) == 5001) @@ -512,13 +505,13 @@ struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, const u8 *hwaddr) /* _enter_critical_bh(&(pfree_sta_queue->lock), &irqL); */ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); - if (_rtw_queue_empty(pfree_sta_queue) == _TRUE) { - /* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); */ - _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); + if (!pstapriv->padapter->pnetdev || _rtw_queue_empty(pfree_sta_queue) == _TRUE) { psta = NULL; } else { psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list); + if (!psta) + goto exit; rtw_list_delete(&(psta->list)); /* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); */ diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_tdls.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_tdls.c index e4b20d3509fb54..4cb38921c5c736 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_tdls.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_tdls.c @@ -940,7 +940,7 @@ void rtw_tdls_set_ch_sw_oper_control(_adapter *padapter, u8 enable) } else pHalData->ch_switch_offload = _FALSE; - + if (ATOMIC_READ(&padapter->tdlsinfo.chsw_info.chsw_on) != enable) ATOMIC_SET(&padapter->tdlsinfo.chsw_info.chsw_on, enable); @@ -1869,7 +1869,7 @@ sint On_TDLS_Setup_Req(_adapter *padapter, union recv_frame *precv_frame, struct ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); if (ptdls_sta == NULL) goto exit; - + ptdlsinfo->sta_cnt++; } else { diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_wlan_util.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_wlan_util.c index acff3792bc8d6b..b4cecd11622b9c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_wlan_util.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_wlan_util.c @@ -592,7 +592,7 @@ void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char #endif if (padapter->bNotifyChannelChange) - RTW_INFO("[%s] ch = %d, offset = %d, bwmode = %d\n", __FUNCTION__, channel, channel_offset, bwmode); + RTW_INFO("[%s] ch = %d, offset = %d, bwmode = %d\n", __func__, channel, channel_offset, bwmode); center_ch = rtw_get_center_ch(channel, bwmode, channel_offset); @@ -1543,7 +1543,7 @@ void WMMOnAssocRsp(_adapter *padapter) #ifdef CONFIG_WMMPS_STA struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); struct qos_priv *pqospriv = &pmlmepriv->qospriv; -#endif /* CONFIG_WMMPS_STA */ +#endif /* CONFIG_WMMPS_STA */ acm_mask = 0; @@ -1669,7 +1669,7 @@ void WMMOnAssocRsp(_adapter *padapter) pxmitpriv->wmm_para_seq[i] = inx[i]; RTW_INFO("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]); } - + #ifdef CONFIG_WMMPS_STA /* if AP supports UAPSD function, driver must set each uapsd TID to coresponding mac register 0x693 */ if (pmlmeinfo->WMM_param.QoS_info & AP_SUPPORTED_UAPSD) { @@ -2074,7 +2074,7 @@ void HTOnAssocRsp(_adapter *padapter) struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - RTW_INFO("%s\n", __FUNCTION__); + RTW_INFO("%s\n", __func__); if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) pmlmeinfo->HT_enable = 1; @@ -2133,7 +2133,7 @@ void HTOnAssocRsp(_adapter *padapter) for (i = 0; i < 16; i++) pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; #endif - RTW_INFO("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __FUNCTION__); + RTW_INFO("%s(): WLAN_HT_CAP_SM_PS_STATIC\n", __func__); } /* */ @@ -2317,11 +2317,11 @@ inline bool match_ranges(u16 EID, u32 value) /* * rtw_validate_value: validate the IE contain. * - * Input : + * Input : * EID : Element ID * p : IE buffer (without EID & length) * len : IE length - * return: + * return: * _TRUE : All Values are validated. * _FALSE : At least one value is NOT validated. */ @@ -2348,7 +2348,7 @@ bool rtw_validate_value(u16 EID, u8 *p, u16 len) inline bool hidden_ssid_ap(WLAN_BSSID_EX *snetwork) { - return ((snetwork->Ssid.SsidLength == 0) || + return ((snetwork->Ssid.SsidLength == 0) || is_all_null(snetwork->Ssid.Ssid, snetwork->Ssid.SsidLength) == _TRUE); } @@ -2386,7 +2386,7 @@ void rtw_absorb_ssid_ifneed(_adapter *padapter, WLAN_BSSID_EX *bssid, u8 *pframe ie_offset = _FIXED_IE_LENGTH_; } } - + _enter_critical_bh(&padapter->mlmepriv.scanned_queue.lock, &irqL); scanned = _rtw_find_network(&padapter->mlmepriv.scanned_queue, mac); if (!scanned) { @@ -3167,7 +3167,7 @@ unsigned char check_assoc_AP(u8 *pframe, uint len) void get_assoc_AP_Vendor(char *vendor, u8 assoc_AP_vendor) { switch (assoc_AP_vendor) { - + case HT_IOT_PEER_UNKNOWN: sprintf(vendor, "%s", "unknown"); break; @@ -3229,7 +3229,7 @@ void rtw_parse_sta_vendor_ie_8812(_adapter *adapter, struct sta_info *sta, u8 *t RTW_INFO("\n"); if(*(p+6) != 2) goto exit; - + if(*(p+8) == RT_HT_CAP_USE_JAGUAR_BCUT) sta->vendor_8812 = TRUE; else if (*(p+8) == RT_HT_CAP_USE_JAGUAR_CCUT) @@ -3456,7 +3456,7 @@ int rtw_ies_get_supported_rate(u8 *ies, uint ies_len, u8 *rate_set, u8 *rate_num {IEEE80211_OFDM_RATE_48MB, _FALSE, _FALSE}, {IEEE80211_OFDM_RATE_54MB, _FALSE, _FALSE}, }; - + if (!rate_set || !rate_num) return _FALSE; @@ -3667,7 +3667,7 @@ inline bool rtw_macid_is_set(struct macid_bmp *map, u8 id) return map->m3 & BIT(id - 96); #endif else - rtw_warn_on(1); + //rtw_warn_on(1); return 0; } diff --git a/drivers/net/wireless/realtek/rtl8812au/core/rtw_xmit.c b/drivers/net/wireless/realtek/rtl8812au/core/rtw_xmit.c index 8f345f0297ac99..90e215385bd30f 100644 --- a/drivers/net/wireless/realtek/rtl8812au/core/rtw_xmit.c +++ b/drivers/net/wireless/realtek/rtl8812au/core/rtw_xmit.c @@ -16,11 +16,7 @@ #include #include - -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - #error "Shall be Linux or Windows, but not both!\n" -#endif - +#include static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 }; static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 }; @@ -32,11 +28,9 @@ static void _init_txservq(struct tx_servq *ptxservq) ptxservq->qcnt = 0; } - void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv) { - _rtw_memset((unsigned char *)psta_xmitpriv, 0, sizeof(struct sta_xmit_priv)); _rtw_spinlock_init(&psta_xmitpriv->lock); @@ -881,9 +875,9 @@ static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitf #ifdef CONFIG_WMMPS_STA /* * update_attrib_trigger_frame_info - * For Station mode, if a specific TID of driver setting and an AP support uapsd function, the data + * For Station mode, if a specific TID of driver setting and an AP support uapsd function, the data * frame with corresponding TID will be a trigger frame when driver is in wmm power saving mode. - * + * * Arguments: * @padapter: _adapter pointer. * @pattrib: pkt_attrib pointer. @@ -893,7 +887,7 @@ static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitf */ static void update_attrib_trigger_frame_info(_adapter *padapter, struct pkt_attrib *pattrib) { struct mlme_priv *pmlmepriv = &padapter->mlmepriv; - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); struct qos_priv *pqospriv = &pmlmepriv->qospriv; u8 trigger_frame_en = 0; @@ -1561,7 +1555,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr } } } - + update_attrib_phy_info(padapter, pattrib, psta); /* RTW_INFO("%s ==> mac_id(%d)\n",__FUNCTION__,pattrib->mac_id ); */ @@ -1579,7 +1573,7 @@ static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattr #ifdef CONFIG_WMMPS_STA update_attrib_trigger_frame_info(padapter, pattrib); -#endif /* CONFIG_WMMPS_STA */ +#endif /* CONFIG_WMMPS_STA */ /* pattrib->priority = 5; */ /* force to used VI queue, for testing */ pattrib->hw_ssn_sel = pxmitpriv->hw_ssn_seq_no; @@ -1882,7 +1876,7 @@ s32 rtw_make_wlanhdr(_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib) /* TBD: temporary set (rspi, eosp) = (0, 1) which means End MPSP */ set_rspi(qc, 0); SetEOSP(qc, 1); - + set_mctrl_present(qc, 1); } #endif @@ -2023,7 +2017,9 @@ s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib) } - return ptxservq->qcnt; + if (ptxservq) + return ptxservq->qcnt; + return 0; } #ifdef CONFIG_TDLS @@ -3493,11 +3489,7 @@ void rtw_init_xmitframe(struct xmit_frame *pxframe) #ifdef CONFIG_USB_HCI pxframe->pkt = NULL; -#ifdef USB_PACKET_OFFSET_SZ pxframe->pkt_offset = (PACKET_OFFSET_SZ / 8); -#else - pxframe->pkt_offset = 1;/* default use pkt_offset to fill tx desc */ -#endif #ifdef CONFIG_USB_TX_AGGREGATION pxframe->agg_num = 1; @@ -4417,10 +4409,12 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) struct xmit_frame *pmgntframe; struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); + struct registry_priv *pregpriv = &(padapter->registrypriv); unsigned char *pframe; u8 dummybuf[32]; - int len = skb->len, rtap_len; + int len = skb->len, rtap_len, consume; + int alloc_tries, alloc_delay; rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); @@ -4437,18 +4431,27 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) if (unlikely(skb->len < rtap_len)) goto fail; - if (rtap_len != 12) { - RTW_INFO("radiotap len (should be 14): %d\n", rtap_len); - goto fail; + len -= sizeof(struct ieee80211_radiotap_header); + rtap_len -= sizeof(struct ieee80211_radiotap_header); + + while(rtap_len) { + consume = rtap_len > sizeof(dummybuf) ? sizeof(dummybuf) : rtap_len; + _rtw_pktfile_read(&pktfile, dummybuf, consume); + rtap_len -= consume; + len -= consume; } - _rtw_pktfile_read(&pktfile, dummybuf, rtap_len-sizeof(struct ieee80211_radiotap_header)); - len = len - rtap_len; #endif - pmgntframe = alloc_mgtxmitframe(pxmitpriv); - if (pmgntframe == NULL) { - rtw_udelay_os(500); - goto fail; + + alloc_delay = 100; + for (alloc_tries=3; alloc_tries > 0; alloc_tries--) { + pmgntframe = alloc_mgtxmitframe(pxmitpriv); + if (pmgntframe != NULL) + break; + rtw_udelay_os(alloc_delay); + alloc_delay += alloc_delay/2; } + if (pmgntframe == NULL) + goto fail; _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; @@ -4458,22 +4461,37 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) /* Check DATA/MGNT frames */ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; - frame_ctl = le16_to_cpu(pwlanhdr->frame_ctl); - if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { + pattrib = &pmgntframe->attrib; + pattrib->injected = _TRUE; - pattrib = &pmgntframe->attrib; - update_monitor_frame_attrib(padapter, pattrib); + if (pregpriv->monitor_disable_1m) { - if (is_broadcast_mac_addr(pwlanhdr->addr3) || is_broadcast_mac_addr(pwlanhdr->addr1)) - pattrib->rate = MGN_24M; + frame_ctl = le16_to_cpu(pwlanhdr->frame_ctl); + if ((frame_ctl & RTW_IEEE80211_FCTL_FTYPE) == RTW_IEEE80211_FTYPE_DATA) { + + update_monitor_frame_attrib(padapter, pattrib); + + if (is_broadcast_mac_addr(pwlanhdr->addr3) || is_broadcast_mac_addr(pwlanhdr->addr1)) + pattrib->rate = MGN_24M; + } else { + update_mgntframe_attrib(padapter, pattrib); + } } else { - pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); + pattrib->rate = MGN_1M; + + pattrib->ldpc = _FALSE; + pattrib->stbc = 0; + } - pattrib->retry_ctrl = _FALSE; + + if (pregpriv->monitor_retransmit) + pattrib->retry_ctrl = _TRUE; + else + pattrib->retry_ctrl = _FALSE; pattrib->pktlen = len; pmlmeext->mgnt_seq = GetSequence(pwlanhdr); pattrib->seqnum = pmlmeext->mgnt_seq; @@ -4481,6 +4499,8 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev) pattrib->last_txcmdsz = pattrib->pktlen; dump_mgntframe(padapter, pmgntframe); + pxmitpriv->tx_pkts++; + pxmitpriv->tx_bytes += skb->len; fail: rtw_skb_free(skb); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/efuse/efuse_mask.h b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/efuse_mask.h index 347a448ef6a827..f6059e4ec5392c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/efuse/efuse_mask.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/efuse_mask.h @@ -62,11 +62,11 @@ #if defined(CONFIG_RTL8821C) #include "rtl8821c/HalEfuseMask8821C_USB.h" #endif - + #if defined(CONFIG_RTL8710B) #include "rtl8710b/HalEfuseMask8710B_USB.h" #endif - + #if defined(CONFIG_RTL8192F) #include "rtl8192f/HalEfuseMask8192F_USB.h" #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c new file mode 100644 index 00000000000000..22f793cc35fb8a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.c @@ -0,0 +1,93 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ +#include + +#include "HalEfuseMask8814A_PCIE.h" + +/****************************************************************************** +* MPCIE.TXT +******************************************************************************/ + +u1Byte Array_MP_8814A_MPCIE[] = { + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xF3, + 0xFF, + 0x10, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; + +u2Byte +EFUSE_GetArrayLen_MP_8814A_MPCIE(VOID) +{ + return sizeof(Array_MP_8814A_MPCIE)/sizeof(u1Byte); +} + +VOID +EFUSE_GetMaskArray_MP_8814A_MPCIE(pu1Byte Array) +{ + u2Byte len = EFUSE_GetArrayLen_MP_8814A_MPCIE(), i = 0; + + for (i = 0; i < len; ++i) + Array[i] = Array_MP_8814A_MPCIE[i]; +} + +BOOLEAN +EFUSE_IsAddressMasked_MP_8814A_MPCIE(u2Byte Offset) +{ + int r = Offset/16; + int c = (Offset%16) / 2; + int result = 0; + + if (c < 4) /*Upper double word*/ + result = (Array_MP_8814A_MPCIE[r] & (0x10 << c)); + else + result = (Array_MP_8814A_MPCIE[r] & (0x01 << (c-4))); + + return (result > 0) ? 0 : 1; +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h new file mode 100644 index 00000000000000..8b51c1b4a6a797 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_PCIE.h @@ -0,0 +1,33 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + + +/****************************************************************************** +* MPCIE.TXT +******************************************************************************/ + + +u2Byte EFUSE_GetArrayLen_MP_8814A_MPCIE(VOID); + +VOID EFUSE_GetMaskArray_MP_8814A_MPCIE(pu1Byte Array); + +BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MPCIE(u2Byte Offset); + + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c new file mode 100644 index 00000000000000..cd80e92943e48a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.c @@ -0,0 +1,90 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ +#include + +#include "HalEfuseMask8814A_USB.h" + +/****************************************************************************** +* MUSB.TXT +******************************************************************************/ + +u1Byte Array_MP_8814A_MUSB[] = { + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xFF, + 0xF3, + 0x7F, + 0xFF, + 0xFF, + 0xFF, + 0x70, + 0x04, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + +}; + +u2Byte EFUSE_GetArrayLen_MP_8814A_MUSB(VOID) +{ + return sizeof(Array_MP_8814A_MUSB)/sizeof(u1Byte); +} + +VOID EFUSE_GetMaskArray_MP_8814A_MUSB(pu1Byte Array) +{ + u2Byte len = EFUSE_GetArrayLen_MP_8814A_MUSB(), i = 0; + + for (i = 0; i < len; ++i) + Array[i] = Array_MP_8814A_MUSB[i]; +} + +BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MUSB(u2Byte Offset) +{ + int r = Offset/16; + int c = (Offset%16) / 2; + int result = 0; + + if (c < 4) /*Upper double word*/ + result = (Array_MP_8814A_MUSB[r] & (0x10 << c)); + else + result = (Array_MP_8814A_MUSB[r] & (0x01 << (c-4))); + + return (result > 0) ? 0 : 1; +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h new file mode 100644 index 00000000000000..4262400d713dd2 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/efuse/rtl8814a/HalEfuseMask8814A_USB.h @@ -0,0 +1,33 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + + + +/****************************************************************************** +* MUSB.TXT +******************************************************************************/ + + +u2Byte EFUSE_GetArrayLen_MP_8814A_MUSB(VOID); + +VOID EFUSE_GetMaskArray_MP_8814A_MUSB(pu1Byte Array); + +BOOLEAN EFUSE_IsAddressMasked_MP_8814A_MUSB(u2Byte Offset); + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_btcoex.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_btcoex.c index 6a861bbb5464db..bb0c3dc1aafaea 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_btcoex.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_btcoex.c @@ -643,7 +643,7 @@ struct btc_wifi_link_info halbtcoutsrc_getwifilinkinfo(PBTC_COEXIST pBtCoexist) iface = dvobj->padapters[i]; if (!iface) continue; - + mlmeext = &iface->mlmeextpriv; if (MLME_IS_GO(iface)) { wifi_link_info.link_mode = BTC_LINK_ONLY_GO; @@ -681,7 +681,7 @@ struct btc_wifi_link_info halbtcoutsrc_getwifilinkinfo(PBTC_COEXIST pBtCoexist) wifi_link_info.link_mode = BTC_LINK_NONE; } else if (n_assoc_iface == 1) { /* by pass */ - } else if (n_assoc_iface == 2) { + } else if (n_assoc_iface == 2) { if (sta_iface && p2p_iface) { u8 band_sta = sta_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; u8 band_p2p = p2p_iface->mlmeextpriv.cur_channel > 14 ? BAND_ON_5G : BAND_ON_2_4G; @@ -721,8 +721,11 @@ struct btc_wifi_link_info halbtcoutsrc_getwifilinkinfo(PBTC_COEXIST pBtCoexist) return wifi_link_info; } - +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) static void _btmpoper_timer_hdl(void *p) +#else +static void _btmpoper_timer_hdl(struct timer_list *t) +#endif { if (GLBtcBtMpRptWait == _TRUE) { GLBtcBtMpRptWait = _FALSE; @@ -1242,7 +1245,7 @@ u8 halbtcoutsrc_Get(void *pBtcContext, u8 getType, void *pOutBuf) #ifdef CONFIG_P2P { struct wifidirect_info *pwdinfo = &(padapter->wdinfo); - + *pU1Tmp = pwdinfo->operating_channel; } #else @@ -1321,7 +1324,7 @@ u16 halbtcoutsrc_LnaConstrainLvl(void *pBtcContext, u8 *lna_constrain_level) ret = _btmpoper_cmd(pBtCoexist, BT_OP_SET_BT_LANCONSTRAIN_LEVEL, 0, lna_constrain_level, 1); _exit_critical_mutex(&GLBtcBtMpOperLock, &irqL); - } else { + } else { ret = BT_STATUS_NOT_IMPLEMENT; RTW_INFO("%s halbtcoutsrc_IsHwMailboxExist(pBtCoexist) == FALSE\n", __func__); } @@ -1886,7 +1889,7 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) pBtCoexist->btc_get(pBtCoexist, BTC_GET_BL_WIFI_ROAM, &bRoam); CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ", "Link/ Roam/ Scan", bLink, bRoam, bScan); - CL_PRINTF(cliBuf); + CL_PRINTF(cliBuf); pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_IQK_TOTAL, &iqk_cnt_total); pBtCoexist->btc_get(pBtCoexist, BTC_GET_U4_WIFI_IQK_OK, &iqk_cnt_ok); @@ -1895,7 +1898,7 @@ void halbtcoutsrc_DisplayWifiStatus(PBTC_COEXIST pBtCoexist) "IQK All/ OK/ Fail/AutoLoad/FWDL", iqk_cnt_total, iqk_cnt_ok, iqk_cnt_fail, ((halbtcoutsrc_is_autoload_fail(pBtCoexist) == _TRUE) ? "fail":"ok"), ((halbtcoutsrc_is_fw_ready(pBtCoexist) == _TRUE) ? "ok":"fail")); CL_PRINTF(cliBuf); - + if (wifiLinkStatus & WIFI_STA_CONNECTED) { CL_SPRINTF(cliBuf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "IOT Peer", GLBtcIotPeerString[padapter->mlmeextpriv.mlmext_info.assoc_AP_vendor]); CL_PRINTF(cliBuf); @@ -2198,7 +2201,7 @@ halbtcoutsrc_SetBtTRXMASK( bStatus = NDBG_SetBtTRXMASK(Adapter, 2, bt_trx_mask, &btCanTx); } - + if (bStatus) return TRUE; else @@ -2244,7 +2247,7 @@ u16 halbtcoutsrc_GetBtReg_with_status(void *pBtcContext, u8 RegType, u32 RegAddr u32 halbtcoutsrc_GetBtReg(void *pBtcContext, u8 RegType, u32 RegAddr) { u32 regVal; - + return (BT_STATUS_BT_OP_SUCCESS == halbtcoutsrc_GetBtReg_with_status(pBtcContext, RegType, RegAddr, ®Val)) ? regVal : 0xffffffff; } @@ -2441,7 +2444,7 @@ u32 halbtcoutsrc_GetBleScanParaFromBt(void *pBtcContext, u8 scanType) _irqL irqL; u8 op_code; u8 status; - + buf[0] = scanType; _enter_critical_mutex(&GLBtcBtMpOperLock, &irqL); @@ -2838,7 +2841,11 @@ u8 EXhalbtcoutsrc_InitlizeVariables(void *padapter) /* BT Control H2C/C2H*/ GLBtcBtMpOperSeq = 0; _rtw_mutex_init(&GLBtcBtMpOperLock); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 15, 0) rtw_init_timer(&GLBtcBtMpOperTimer, padapter, _btmpoper_timer_hdl, pBtCoexist); +#else + timer_setup(&GLBtcBtMpOperTimer, _btmpoper_timer_hdl, 0); +#endif _rtw_init_sema(&GLBtcBtMpRptSema, 0); GLBtcBtMpRptSeq = 0; GLBtcBtMpRptStatus = 0; @@ -3422,7 +3429,7 @@ void EXhalbtcoutsrc_connect_notify(PBTC_COEXIST pBtCoexist, u8 assoType) pBtCoexist->statistics.cnt_connect_notify++; if (pBtCoexist->manual_control) return; - + /* All notify is called in cmd thread, don't need to leave low power again * halbtcoutsrc_LeaveLowPower(pBtCoexist); */ if (IS_HARDWARE_TYPE_8821(pBtCoexist->Adapter)) { @@ -3684,7 +3691,7 @@ void EXhalbtcoutsrc_specific_packet_notify(PBTC_COEXIST pBtCoexist, u8 pktType) /* compatible for 8812A */ if (hal->current_band_type == BAND_ON_5G) packetType &= ~BTC_5G_BAND; - + if (pBtCoexist->board_info.btdm_ant_num == 2) ex_halbtc8812a2ant_specific_packet_notify(pBtCoexist, packetType); else if (pBtCoexist->board_info.btdm_ant_num == 1) @@ -4565,7 +4572,7 @@ void EXhalbtcoutsrc_switchband_notify(struct btc_coexist *pBtCoexist, u8 type) { if(!halbtcoutsrc_IsBtCoexistAvailable(pBtCoexist)) return; - + if(pBtCoexist->manual_control) return; @@ -4735,7 +4742,7 @@ u8 EXhalbtcoutsrc_rate_id_to_btc_rate_id(u8 rate_id) case DESC_RATEMCS31: btc_rate_id = BTC_MCS_31; break; - + case DESC_RATEVHTSS1MCS0: btc_rate_id = BTC_VHT_1SS_MCS_0; break; @@ -4860,7 +4867,7 @@ u8 EXhalbtcoutsrc_rate_id_to_btc_rate_id(u8 rate_id) btc_rate_id = BTC_VHT_4SS_MCS_9; break; } - + return btc_rate_id; } @@ -5052,7 +5059,7 @@ void hal_btcoex_ConnectNotify(PADAPTER padapter, u8 action) else assoType = BTC_ASSOCIATE_FINISH; } - + EXhalbtcoutsrc_connect_notify(&GLBtCoexist, assoType); } @@ -5208,7 +5215,7 @@ u8 hal_btcoex_IsBtControlLps(PADAPTER padapter) { if (GLBtCoexist.bdontenterLPS == _TRUE) return _TRUE; - + if (hal_btcoex_IsBtExist(padapter) == _FALSE) return _FALSE; @@ -5225,7 +5232,7 @@ u8 hal_btcoex_IsLpsOn(PADAPTER padapter) { if (GLBtCoexist.bdontenterLPS == _TRUE) return _FALSE; - + if (hal_btcoex_IsBtExist(padapter) == _FALSE) return _FALSE; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_com.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_com.c index 2a7e8ceef309e1..dcf8edf4aae23c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_com.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_com.c @@ -1340,7 +1340,7 @@ void rtw_hal_c2h_pkt_pre_hdl(_adapter *adapter, u8 *buf, u16 len) } hdl_here = rtw_hal_c2h_id_handle_directly(adapter, id, seq, plen, payload) == _TRUE ? 1 : 0; - if (hdl_here) + if (hdl_here) ret = rtw_hal_c2h_handler(adapter, id, seq, plen, payload); else ret = rtw_c2h_packet_wk_cmd(adapter, buf, len); @@ -1660,7 +1660,7 @@ int c2h_defeature_dbg_hdl(_adapter *adapter, u8 *data, u8 len) RTW_PRINT("%s: 0x%02X\n", __func__, *(data + i)); ret = _SUCCESS; - + exit: return ret; } @@ -1904,9 +1904,9 @@ u8 rtw_hal_set_req_per_rpt_cmd(_adapter *adapter, u8 group_macid, SET_H2CCMD_REQ_PER_RPT_RPT_TYPE(cmd_buf, rpt_type); SET_H2CCMD_REQ_PER_RPT_MACID_BMAP(cmd_buf, macid_bitmap); - ret = rtw_hal_fill_h2c_cmd(adapter, - H2C_REQ_PER_RPT, - H2C_REQ_PER_RPT_LEN, + ret = rtw_hal_fill_h2c_cmd(adapter, + H2C_REQ_PER_RPT, + H2C_REQ_PER_RPT_LEN, cmd_buf); return ret; } @@ -3109,7 +3109,7 @@ void rtw_ap_multi_bcn_cfg(_adapter *adapter) if (IS_HARDWARE_TYPE_8821(adapter) || IS_HARDWARE_TYPE_8192E(adapter))/* select BCN on port 0 for DualBeacon*/ rtw_write8(adapter, REG_CCK_CHECK, rtw_read8(adapter, REG_CCK_CHECK) & (~BIT_BCN_PORT_SEL)); - /* Enable HW seq for BCN + /* Enable HW seq for BCN * 0x4FC[0]: EN_HWSEQ / 0x4FC[1]: EN_HWSEQEXT */ #ifdef CONFIG_RTL8822B if (IS_HARDWARE_TYPE_8822B(adapter)) @@ -3671,7 +3671,7 @@ void rtw_hal_rcr_set_chk_bssid(_adapter *adapter, u8 self_action) else if ((MSTATE_AP_NUM(&mstate) && adapter->registrypriv.wifi_spec) /* for 11n Logo 4.2.31/4.2.32 */ || MSTATE_MESH_NUM(&mstate) ) - rcr_new &= ~RCR_CBSSID_BCN; + rcr_new &= ~RCR_CBSSID_BCN; else rcr_new |= RCR_CBSSID_BCN; @@ -5364,11 +5364,11 @@ static u8 rtw_hal_set_wowlan_ctrl_cmd(_adapter *adapter, u8 enable, u8 change_un gpionum = WAKEUP_GPIO_IDX; sdio_wakeup_enable = 0; #endif /* CONFIG_GPIO_WAKEUP */ - + if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED)) no_wake = 1; - + if (!ppwrpriv->wowlan_pno_enable && registry_par->wakeup_event & BIT(0) && !no_wake) magic_pkt = enable; @@ -5495,31 +5495,31 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) u1H2CRemoteWakeCtrlParm, 0); } #endif /* CONFIG_GTK_OL */ - + #ifdef CONFIG_IPV6 if (ppwrpriv->wowlan_ns_offload_en == _TRUE) { RTW_INFO("enable NS offload\n"); SET_H2CCMD_REMOTE_WAKE_CTRL_NDP_OFFLOAD_EN( u1H2CRemoteWakeCtrlParm, enable); } - + /* * filter NetBios name service pkt to avoid being waked-up * by this kind of unicast pkt this exceptional modification * is used for match competitor's behavior */ - + SET_H2CCMD_REMOTE_WAKE_CTRL_NBNS_FILTER_EN( u1H2CRemoteWakeCtrlParm, enable); #endif /*CONFIG_IPV6*/ - + #ifdef CONFIG_RTL8192F if (IS_HARDWARE_TYPE_8192F(adapter)){ SET_H2CCMD_REMOTE_WAKE_CTRL_FW_UNICAST_EN( u1H2CRemoteWakeCtrlParm, enable); } #endif /* CONFIG_RTL8192F */ - + if ((psecuritypriv->dot11PrivacyAlgrthm == _AES_) || (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_) || (psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_)) { @@ -5529,12 +5529,12 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) SET_H2CCMD_REMOTE_WAKE_CTRL_ARP_ACTION( u1H2CRemoteWakeCtrlParm, 1); } - + if (psecuritypriv->dot11PrivacyAlgrthm == _TKIP_ && psecuritypriv->ndisauthtype == Ndis802_11AuthModeWPA2PSK) { SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( u1H2CRemoteWakeCtrlParm, enable); - + if (IS_HARDWARE_TYPE_8188E(adapter) || IS_HARDWARE_TYPE_8812(adapter)) { SET_H2CCMD_REMOTE_WAKE_CTRL_TKIP_OFFLOAD_EN( @@ -5543,7 +5543,7 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) u1H2CRemoteWakeCtrlParm, 1); } } - + SET_H2CCMD_REMOTE_WAKE_CTRL_FW_PARSING_UNTIL_WAKEUP( u1H2CRemoteWakeCtrlParm, 1); } @@ -5555,7 +5555,7 @@ static u8 rtw_hal_set_remote_wake_ctrl_cmd(_adapter *adapter, u8 enable) u1H2CRemoteWakeCtrlParm, enable); } #endif - + #ifdef CONFIG_P2P_WOWLAN if (_TRUE == ppwrpriv->wowlan_p2p_mode) { RTW_INFO("P2P OFFLOAD ENABLE\n"); @@ -5638,7 +5638,7 @@ void rtw_hal_set_fw_wow_related_cmd(_adapter *padapter, u8 enable) u16 media_status_rpt; u8 pkt_type = 0, no_wake = 0; u8 ret = _SUCCESS; - + if(pregistry->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED)) no_wake = 1; @@ -9743,12 +9743,12 @@ static void rtw_hal_wow_disable(_adapter *adapter) u8 val8; RTW_PRINT("%s, WOWLAN_DISABLE\n", __func__); - + if(registry_par->suspend_type == FW_IPS_DISABLE_BBRF && !check_fwstate(pmlmepriv, _FW_LINKED)) { RTW_INFO("FW_IPS_DISABLE_BBRF resume\n"); return; } - + if (!pwrctl->wowlan_pno_enable) { psta = rtw_get_stainfo(&adapter->stapriv, get_bssid(pmlmepriv)); if (psta != NULL) @@ -10494,7 +10494,7 @@ static void _rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished, u8 *page /*======== Qos null data * 1 page ======== */ if (pwrctl->wowlan_mode == _FALSE || - pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/ + pwrctl->wowlan_in_resume == _TRUE) {/*Normal mode*/ if (MLME_IS_STA(sta_iface) || (nr_assoc_if == 0)) { RsvdPageLoc.LocQosNull = TotalPageNum; RTW_INFO("LocQosNull: %d\n", RsvdPageLoc.LocQosNull); @@ -11482,7 +11482,7 @@ void rtw_hal_update_uapsd_tid(_adapter *adapter) struct mlme_priv *pmlmepriv = &adapter->mlmepriv; struct qos_priv *pqospriv = &pmlmepriv->qospriv; - /* write complement of pqospriv->uapsd_tid to mac register 0x693 because + /* write complement of pqospriv->uapsd_tid to mac register 0x693 because it's designed for "0" represents "enable" and "1" represents "disable" */ rtw_write8(adapter, REG_WMMPS_UAPSD_TID, (u8)(~pqospriv->uapsd_tid)); } @@ -11829,7 +11829,7 @@ u8 SetHwReg(_adapter *adapter, u8 variable, u8 *val) break; #endif/*CONFIG_RTS_FULL_BW*/ #if defined(CONFIG_PCI_HCI) - case HW_VAR_ENSWBCN: + case HW_VAR_ENSWBCN: if (*val == _TRUE) { rtw_write8(adapter, REG_CR + 1, rtw_read8(adapter, REG_CR + 1) | BIT(0)); @@ -11864,7 +11864,7 @@ void GetHwReg(_adapter *adapter, u8 variable, u8 *val) break; case HW_VAR_RF_TYPE: *((u8 *)val) = hal_data->rf_type; -#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA +#ifdef CONFIG_CUSTOMER01_SMART_ANTENNA *((u8 *)val) = RF_1T1R; #endif break; @@ -12795,7 +12795,7 @@ u32 Hal_readPGDataFromConfigFile(PADAPTER padapter) if (maplen < 256 || maplen > EEPROM_MAX_SIZE) { RTW_ERR("eFuse length error :%d\n", maplen); return _FALSE; - } + } ret = rtw_read_efuse_from_file(EFUSE_MAP_PATH, hal_data->efuse_eeprom_data, maplen); @@ -12826,6 +12826,8 @@ u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr) int hal_config_macaddr(_adapter *adapter, bool autoload_fail) { + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(adapter); + struct usb_device *udev = pdvobjpriv->pusbdev; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); u8 addr[ETH_ALEN]; int addr_offset = hal_efuse_macaddr_offset(adapter); @@ -12876,8 +12878,8 @@ int hal_config_macaddr(_adapter *adapter, bool autoload_fail) _rtw_memset(hal_data->EEPROMMACAddr, 0, ETH_ALEN); ret = _FAIL; - exit: + dev_info(&udev->dev, "88XXau %pM hw_info[%02x]", hw_addr, addr_offset); return ret; } @@ -13774,7 +13776,7 @@ void update_IOT_info(_adapter *padapter) } } -#ifdef CONFIG_RTS_FULL_BW +#ifdef CONFIG_RTS_FULL_BW /* 8188E: not support full RTS BW feature(mac REG no define 480[5]) */ @@ -13793,18 +13795,18 @@ void rtw_set_rts_bw(_adapter *padapter) { station = NULL; station = macid_ctl->sta[i]; if(station) { - + _adapter *sta_adapter =station->padapter; struct mlme_ext_priv *pmlmeext = &(sta_adapter->mlmeextpriv); struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); - + if ( pmlmeinfo->state != WIFI_FW_NULL_STATE) { if(_rtw_memcmp(macid_ctl->sta[i]->cmn.mac_addr, bc_addr, ETH_ALEN) != _TRUE) { if ( macid_ctl->sta[i]->vendor_8812) { connect_to_8812 = _TRUE; enable = 0; - } - } + } + } } } } @@ -13812,7 +13814,7 @@ void rtw_set_rts_bw(_adapter *padapter) { if(connect_to_8812) break; } - + RTW_INFO("%s connect_to_8812=%d,enable=%u\n", __FUNCTION__,connect_to_8812,enable); rtw_hal_set_hwreg(padapter, HW_VAR_SET_RTS_BW, &enable); } @@ -13840,7 +13842,7 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) #endif #if defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || \ defined(CONFIG_RTL8723D) || defined(CONFIG_RTL8821A) || \ - defined(CONFIG_RTL8192E) + defined(CONFIG_RTL8192E) case RTL8723B: case RTL8703B: case RTL8723D: @@ -13860,7 +13862,7 @@ void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap) case RTL8822B: case RTL8821C: - case RTL8192F: + case RTL8192F: /* write 0x28[6:1] = 0x24[30:25] = CrystalCap */ crystal_cap = crystal_cap & 0x3F; phy_set_bb_reg(adapter, REG_AFE_XTAL_CTRL, 0x7E000000, crystal_cap); @@ -14295,8 +14297,8 @@ void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode) rtw_hw_client_port_release(Adapter); #endif #if defined(CONFIG_RTL8192F) - rtw_write16(Adapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(Adapter, - REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION); + rtw_write16(Adapter, REG_WLAN_ACT_MASK_CTRL_1, rtw_read16(Adapter, + REG_WLAN_ACT_MASK_CTRL_1) | EN_PORT_0_FUNCTION); #endif } #endif @@ -14409,7 +14411,7 @@ void rtw_dump_phy_cap_by_hal(void *sel, _adapter *adapter) phy_cap = _FALSE; rtw_hal_get_def_var(adapter, HAL_DEF_RX_LDPC, (u8 *)&phy_cap); RTW_PRINT_SEL(sel, "[HAL] LDPC Rx : %s\n\n", (_TRUE == phy_cap) ? "Supported" : "N/A"); - + #ifdef CONFIG_BEAMFORMING phy_cap = _FALSE; rtw_hal_get_def_var(adapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&phy_cap); @@ -14631,7 +14633,7 @@ u8 * rtw_hal_set_8812a_vendor_ie(_adapter *padapter , u8 *pframe ,uint *frlen ) else vendor_info[6] = RT_HT_CAP_USE_JAGUAR_BCUT; pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_,vender_len,vendor_info , frlen); - + return pframe; } #endif /*CONFIG_RTL8812A*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_com_c2h.h b/drivers/net/wireless/realtek/rtl8812au/hal/hal_com_c2h.h index fb5eab99cbf4ef..1efabc9dcceaa2 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_com_c2h.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_com_c2h.h @@ -18,7 +18,7 @@ #define C2H_TYPE_REG 0 #define C2H_TYPE_PKT 1 -/* +/* * C2H event format: * Fields TRIGGER PAYLOAD SEQ PLEN ID * BITS [127:120] [119:16] [15:8] [7:4] [3:0] @@ -32,7 +32,7 @@ #define SET_C2H_PLEN(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 4, 4, _val) #define SET_C2H_SEQ(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1 , 0, 8, _val) -/* +/* * C2H event format: * Fields TRIGGER PLEN PAYLOAD SEQ ID * BITS [127:120] [119:112] [111:16] [15:8] [7:0] diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm.c index 2fcf28c6c95455..c5fa43e301f4d9 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm.c @@ -490,20 +490,20 @@ struct turbo_edca_setting{ static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = { TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 0 */ TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */ - TURBO_EDCA_ENT(0x4319, 0x4319), /* mode 2 */ - + TURBO_EDCA_ENT(0x4319, 0x4319), /* mode 2 */ + TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */ TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 4 */ - TURBO_EDCA_ENT(0x5e4319, 0x5e4319), /* mode 5 */ - + TURBO_EDCA_ENT(0x5e4319, 0x5e4319), /* mode 5 */ + TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 6 */ TURBO_EDCA_ENT(0x6e431c, 0x6e431c), /* mode 7 */ TURBO_EDCA_ENT(0x6e4319, 0x6e4319), /* mode 8 */ - + TURBO_EDCA_ENT(0x5ea42b, 0xa42b), /* mode 9 */ TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 10 */ TURBO_EDCA_ENT(0x5e4319, 0x4319), /* mode 11 */ - + TURBO_EDCA_ENT(0x6ea42b, 0xa42b), /* mode 12 */ TURBO_EDCA_ENT(0x6e431c, 0x431c), /* mode 13 */ TURBO_EDCA_ENT(0x6e4319, 0x4319), /* mode 14 */ @@ -520,18 +520,18 @@ static struct turbo_edca_setting rtw_turbo_edca[TURBO_EDCA_MODE_NUM] = { /* { UL, DL } */ TURBO_EDCA_ENT(0x5e431c, 0x431c), /* mode 0 */ - TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */ - + TURBO_EDCA_ENT(0x431c, 0x431c), /* mode 1 */ + TURBO_EDCA_ENT(0x5e431c, 0x5e431c), /* mode 2 */ TURBO_EDCA_ENT(0x5ea42b, 0x5ea42b), /* mode 3 */ - + TURBO_EDCA_ENT(0x5ea42b, 0x431c), /* mode 4 */ - + TURBO_EDCA_ENT(0x6ea42b, 0x6ea42b), /* mode 5 */ TURBO_EDCA_ENT(0xa42b, 0xa42b), /* mode 6 */ - + TURBO_EDCA_ENT(0x5e431c, 0xa42b), /* mode 7 */ }; #endif @@ -667,15 +667,15 @@ void rtw_hal_turbo_edca(_adapter *adapter) EDCA_BE_DL = 0x00431c; #ifdef CONFIG_RTW_TPT_MODE - if ( dvobj->tpt_mode > 0 ) { + if ( dvobj->tpt_mode > 0 ) { EDCA_BE_UL = dvobj->edca_be_ul; EDCA_BE_DL = dvobj->edca_be_dl; } #endif /* CONFIG_RTW_TPT_MODE */ /* keep this condition at last check */ - if (hal_data->dis_turboedca == 2) { - + if (hal_data->dis_turboedca == 2) { + if (hal_data->edca_param_mode < TURBO_EDCA_MODE_NUM) { struct turbo_edca_setting param; @@ -684,12 +684,12 @@ void rtw_hal_turbo_edca(_adapter *adapter) EDCA_BE_UL = param.edca_ul; EDCA_BE_DL = param.edca_dl; - + } else { - + EDCA_BE_UL = hal_data->edca_param_mode; EDCA_BE_DL = hal_data->edca_param_mode; - } + } } if (traffic_index == DOWN_LINK) @@ -707,7 +707,7 @@ void rtw_hal_turbo_edca(_adapter *adapter) struct sta_info *psta; struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); u8 mac_id, role, current_rate_id; - + /* search all used & connect2AP macid */ for (mac_id = 0; mac_id < macid_ctl->num; mac_id++) { if (rtw_macid_is_used(macid_ctl, mac_id)) { @@ -752,7 +752,7 @@ void rtw_hal_turbo_edca(_adapter *adapter) #endif if ( edca_param != hal_data->ac_param_be) { - + rtw_hal_set_hwreg(adapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); RTW_INFO("Turbo EDCA =0x%x\n", edca_param); @@ -1218,7 +1218,7 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta) else _RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.tx_tp_kbits); - if (rx_tp_mbips) + if (rx_tp_mbips) _RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips); else _RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.rx_tp_kbits); @@ -1238,7 +1238,7 @@ void dump_sta_traffic(void *sel, _adapter *adapter, struct sta_info *psta) else _RTW_PRINT_SEL(sel, "Tx : %d(Kbps) ", psta->sta_stats.smooth_tx_tp_kbits); - if (rx_tp_mbips) + if (rx_tp_mbips) _RTW_PRINT_SEL(sel, "Rx : %d(Mbps) ", rx_tp_mbips); else _RTW_PRINT_SEL(sel, "Rx : %d(Kbps) ", psta->sta_stats.smooth_rx_tp_kbits); @@ -1386,7 +1386,7 @@ static u8 _rtw_phydm_rfk_condition_check(_adapter *adapter, u8 is_scaning, u8 if #ifdef CONFIG_MCC_MODE /*not in MCC State*/ - if (MCC_EN(adapter) && + if (MCC_EN(adapter) && rtw_hal_check_mcc_status(adapter, MCC_STATUS_DOING_MCC)) { rfk_allowed = _FALSE; if (0) @@ -1488,15 +1488,15 @@ void rtw_dyn_soml_config(_adapter *adapter) RTW_INFO("dyn_soml_en = 1\n"); } else { if (adapter->registrypriv.dyn_soml_en == 2) { - rtw_dyn_soml_para_set(adapter, - adapter->registrypriv.dyn_soml_train_num, - adapter->registrypriv.dyn_soml_interval, + rtw_dyn_soml_para_set(adapter, + adapter->registrypriv.dyn_soml_train_num, + adapter->registrypriv.dyn_soml_interval, adapter->registrypriv.dyn_soml_period, adapter->registrypriv.dyn_soml_delay); RTW_INFO("dyn_soml_en = 2\n"); RTW_INFO("dyn_soml_en, param = %d, %d, %d, %d\n", adapter->registrypriv.dyn_soml_train_num, - adapter->registrypriv.dyn_soml_interval, + adapter->registrypriv.dyn_soml_interval, adapter->registrypriv.dyn_soml_period, adapter->registrypriv.dyn_soml_delay); } else if (adapter->registrypriv.dyn_soml_en == 0) { diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.c index 5c19d999370657..49fc8a060b375f 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.c @@ -539,8 +539,10 @@ s16 rtw_noise_measure_curchan(_adapter *padapter) u8 is_pause_dig = _TRUE; u8 cur_chan = rtw_get_oper_ch(padapter); +#ifndef CONFIG_ALLOW_UNLINKED_NOISE_MONITOR if (rtw_linked_check(padapter) == _FALSE) return noise; +#endif rtw_ps_deny(padapter, PS_DENY_IOCTL); LeaveAllPowerSaveModeDirect(padapter); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.h b/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.h index f18c15b8509769..871c1448780b6e 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_dm_acs.h @@ -41,7 +41,7 @@ enum NHM_PID { nhm.mntr_time = time;\ } while (0) - + #define init_acs_clm(clm, time) \ init_clm_param(clm, CLM_ACS, CLM_LV_2, time) @@ -50,7 +50,7 @@ enum NHM_PID { #define init_11K_high_nhm(nhm, time) \ init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_HIGH, NHM_LV_2, time) - + #define init_11K_low_nhm(nhm, time) \ init_nhm_param(nhm, NHM_EXCLUDE_TXON, NHM_EXCLUDE_CCA, NHM_CNT_ALL, IEEE_11K_LOW, NHM_LV_2, time) diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_halmac.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_halmac.c index 1143d4d2f243bd..0b74ecb481eed4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_halmac.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_halmac.c @@ -2603,7 +2603,7 @@ int rtw_halmac_poweron(struct dvobj_priv *d) addr = 0x3F3; v8 = rtw_read8(a, addr); RTW_PRINT("%s: 0x%X = 0x%02x\n", __FUNCTION__, addr, v8); - + /* are we in pcie debug mode? */ if (!(v8 & BIT(2))) { RTW_PRINT("%s: Enable pcie debug mode\n", __FUNCTION__); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_hci/hal_usb.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_hci/hal_usb.c index 0b5e756428ad30..20dc07bdfb46c7 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_hci/hal_usb.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_hci/hal_usb.c @@ -333,7 +333,7 @@ u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) wvalue = (u16)(addr & 0x0000ffff); len = 1; - + /* WLANON PAGE0_REG needs to add an offset 0x8000 */ #if defined(CONFIG_RTL8710B) if(wvalue >= 0x0000 && wvalue < 0x0100) @@ -363,7 +363,7 @@ u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) wvalue = (u16)(addr & 0x0000ffff); len = 2; - + /* WLANON PAGE0_REG needs to add an offset 0x8000 */ #if defined(CONFIG_RTL8710B) if(wvalue >= 0x0000 && wvalue < 0x0100) @@ -394,7 +394,7 @@ u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) wvalue = (u16)(addr & 0x0000ffff); len = 4; - + /* WLANON PAGE0_REG needs to add an offset 0x8000 */ #if defined(CONFIG_RTL8710B) if(wvalue >= 0x0000 && wvalue < 0x0100) @@ -426,7 +426,7 @@ int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) wvalue = (u16)(addr & 0x0000ffff); len = 1; data = val; - + /* WLANON PAGE0_REG needs to add an offset 0x8000 */ #if defined(CONFIG_RTL8710B) if(wvalue >= 0x0000 && wvalue < 0x0100) diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_intf.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_intf.c index afc924eb586528..66a2954c5213ac 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_intf.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_intf.c @@ -1082,7 +1082,6 @@ s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) case C2H_EXTEND: sub_id = payload[0]; /* no handle, goto default */ - default: if (phydm_c2H_content_parsing(adapter_to_phydm(adapter), id, plen, payload) != TRUE) ret = _FAIL; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_mcc.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_mcc.c index bad0131d02031b..179d4d54beb422 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_mcc.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_mcc.c @@ -64,7 +64,7 @@ static void dump_iqk_val_table(PADAPTER padapter) ); } } - } + } RTW_INFO("=============================================\n"); #endif @@ -96,7 +96,7 @@ static void rtw_hal_mcc_build_p2p_noa_attr(PADAPTER padapter, u8 *ie, u32 *ie_le /* attrute ID(1 byte) */ p2p_noa_attr_ie[p2p_noa_attr_len] = P2P_ATTR_NOA; p2p_noa_attr_len = p2p_noa_attr_len + 1; - + /* attrute length(2 bytes) length = noa_desc_num*13 + 2 */ RTW_PUT_LE16(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_desc_num * 13 + 2)); p2p_noa_attr_len = p2p_noa_attr_len + 2; @@ -153,7 +153,7 @@ static void rtw_hal_mcc_update_go_p2p_ie(PADAPTER padapter) else { /* has noa attribut, modify it */ u32 noa_duration = 0; - + /* update index */ pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 15; /* 0~255 */ @@ -277,7 +277,7 @@ static void rtw_hal_mcc_update_policy_table(PADAPTER adapter) mcc_switch_channel_policy_table[mcc_policy_idx][MCC_START_TIME_OFFSET_IDX] = new_starttime_offset; - + } @@ -314,7 +314,7 @@ static void rtw_hal_config_mcc_switch_channel_setting(PADAPTER padapter) } -static void rtw_hal_mcc_assign_tx_threshold(PADAPTER padapter) +static void rtw_hal_mcc_assign_tx_threshold(PADAPTER padapter) { struct registry_priv *preg = &padapter->registrypriv; struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv; @@ -458,7 +458,7 @@ static void rtw_hal_config_mcc_role_setting(PADAPTER padapter, u8 order) phead = &pstapriv->asoc_list; plist = get_next(phead); pmccadapriv->mcc_macid_bitmap = 0; - + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); plist = get_next(plist); @@ -584,7 +584,7 @@ static u8 rtw_hal_mcc_check_start_time_is_valid(PADAPTER padapter, u8 case_num, u8 intersection = _FALSE; u8 min_start_time = 5; u8 max_start_time = 95; - + duration_0 = mccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration; duration_1 = mccobjpriv->iface[1]->mcc_adapterpriv.mcc_duration; @@ -687,7 +687,7 @@ static void rtw_hal_mcc_decide_duration(PADAPTER padapter) iface_order1 = mccobjpriv->iface[1]; mccadapriv_order0 = &iface_order0->mcc_adapterpriv; mccadapriv_order1 = &iface_order1->mcc_adapterpriv; - + if (mccobjpriv->duration == 0) { /* default */ duration = 30;/*(%)*/ @@ -746,7 +746,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat u8 valid = _FALSE; u8 case_num = 1; u8 i = 0; - + /* query TSF */ rtw_hal_mcc_rqt_tsf(padapter, tsf); @@ -816,7 +816,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat rtw_hal_mcc_decide_duration(padapter); if (tsfdiff <= 50) { - + /* RX TBTT 0 */ case_num = 1; valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, @@ -824,7 +824,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat if (valid) goto valid_result; - + /* RX TBTT 1 */ case_num = 2; valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, @@ -832,7 +832,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat if (valid) goto valid_result; - + /* RX TBTT 2 */ case_num = 3; valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, @@ -857,8 +857,8 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat if (valid) goto valid_result; - - + + /* RX TBTT 1 */ case_num = 5; valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, @@ -867,7 +867,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat if (valid) goto valid_result; - + /* RX TBTT 2 */ case_num = 6; valid = rtw_hal_mcc_check_start_time_is_valid(padapter, case_num, tsfdiff, @@ -883,7 +883,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat } } - + valid_result: RTW_INFO("********************\n"); @@ -893,7 +893,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat __func__, upper_bound_0, lower_bound_0); RTW_INFO("%s: upper_bound_1:%d, lower_bound_1:%d\n", __func__, upper_bound_1, lower_bound_1); - + for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; if (iface == NULL) @@ -922,7 +922,7 @@ static u8 rtw_hal_mcc_update_timing_parameters(PADAPTER padapter, u8 force_updat FUNC_ADPT_ARG(iface), pmccadapriv->mgmt_queue_macid, pmccadapriv->mcc_macid_bitmap); RTW_INFO("********************\n"); } - + } exit: return need_update; @@ -1181,7 +1181,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, i, pmccobjpriv->mcc_pwr_idx_rsvd_page[i]); total_rate_offset = start; - + for (path = RF_PATH_A; path < hal->NumTotalRFPath; ++path) { total_rate = 0; /* PATH A for 0~63 byte, PATH B for 64~127 byte*/ @@ -1223,7 +1223,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), center_ch, MGN_RATE_STR(rates[j]), power_index); - + shift = rate % 4; power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); if (shift == 3) { @@ -1233,7 +1233,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, total_rate++; } #endif - + } } @@ -1344,7 +1344,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, RTW_INFO("TXPWR("ADPT_FMT"): [%c][%s]ch:%u, %s, pwr_idx:%u\n", ADPT_ARG(iface), rf_path_char(path), ch_width_str(bw), center_ch, MGN_RATE_STR(rates[j]), power_index); - + shift = rate % 4; power_index_4bytes |= ((power_index & 0xff) << (shift * 8)); if (shift == 3) { @@ -1427,7 +1427,7 @@ u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index, } #endif } - + } /* total rate store in offset 0 */ *total_rate_offset = total_rate; @@ -1523,7 +1523,7 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter) u8 fw_eable = 1; u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME; u8 starting_ap_num = DEV_AP_STARTING_NUM(dvobj); - u8 ap_num = DEV_AP_NUM(dvobj); + u8 ap_num = DEV_AP_NUM(dvobj); if (starting_ap_num == 0 && ap_num == 0) /* For STA+GC/STA+STA, TSF of GC/STA does not need to sync from TSF of other STA/GC */ @@ -1548,7 +1548,7 @@ static void rtw_hal_set_mcc_time_setting_cmd(PADAPTER padapter) tsf_bsae_port = rtw_hal_get_port(order1_iface); tsf_sync_port = rtw_hal_get_port(order0_iface); - + /* FW set enable */ SET_H2CCMD_MCC_TIME_SETTING_FW_EN(cmd, fw_eable); /* TSF Sync offset */ @@ -1683,7 +1683,7 @@ static void rtw_hal_set_mcc_macid_cmd(PADAPTER padapter) pmccadapriv = &iface->mcc_adapterpriv; if (pmccadapriv->role == MCC_ROLE_MAX) continue; - + order = pmccadapriv->order; bitmap = pmccadapriv->mcc_macid_bitmap; @@ -2215,7 +2215,7 @@ static void rtw_hal_mcc_start_posthdl(PADAPTER padapter) mccadapriv = &iface->mcc_adapterpriv; if (mccadapriv->role == MCC_ROLE_MAX) continue; - + mccadapriv->mcc_tx_bytes_from_kernel = 0; mccadapriv->mcc_last_tx_bytes_from_kernel = 0; mccadapriv->mcc_tx_bytes_to_port = 0; @@ -2426,12 +2426,12 @@ static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen, u8 policy_idx = pmccobjpriv->policy_index; u8 noa_tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX]; u8 noa_start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX]; - + for (i = 0; i < pdvobjpriv->iface_nums; i++) { iface = pdvobjpriv->padapters[i]; if (iface == NULL) continue; - + pmccadapriv = &iface->mcc_adapterpriv; if (pmccadapriv->role == MCC_ROLE_MAX) continue; @@ -2518,7 +2518,7 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) if (0) RTW_INFO("%d,order:%d,TSF:0x%llx\n", tmpBuf[0], tmpBuf[1], RTW_GET_LE64(tmpBuf + 2)); - + switch (pmccobjpriv->mcc_c2h_status) { case MCC_RPT_SUCCESS: _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL); @@ -2566,12 +2566,12 @@ void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf) } void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) -{ +{ struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct mcc_obj_priv *mccobjpriv = &(dvobj->mcc_objpriv); u8 cmd[H2C_MCC_TIME_SETTING_LEN] = {0}; u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME; - u8 ap_num = DEV_AP_NUM(dvobj); + u8 ap_num = DEV_AP_NUM(dvobj); if (ap_num == 0) { u8 need_update = _FALSE; @@ -2581,7 +2581,7 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) if (need_update == _FALSE) return; - + start_time_offset = mccobjpriv->start_time; interval = mccobjpriv->interval; duration = mccobjpriv->iface[0]->mcc_adapterpriv.mcc_duration; @@ -2626,11 +2626,11 @@ void rtw_hal_mcc_update_parameter(PADAPTER padapter, u8 force_update) iface = dvobj->padapters[i]; if (iface == NULL) continue; - + mccadapriv = &iface->mcc_adapterpriv; if (mccadapriv->role == MCC_ROLE_MAX) continue; - + if (mccadapriv->role == MCC_ROLE_GO) rtw_hal_mcc_update_go_p2p_ie(iface); } @@ -2672,7 +2672,7 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter) u8 noa_enable = _FALSE; u8 i = 0; _irqL irqL; - u8 ap_num = DEV_AP_NUM(dvobj); + u8 ap_num = DEV_AP_NUM(dvobj); /* #define MCC_RESTART 1 */ @@ -2692,12 +2692,12 @@ void rtw_hal_mcc_sw_status_check(PADAPTER padapter) mccadapriv = &iface->mcc_adapterpriv; if (mccadapriv->role == MCC_ROLE_MAX) continue; - + if (iface->wdinfo.p2p_ps_mode == P2P_PS_NOA) { noa_enable = _TRUE; break; } - } + } if (!noa_enable && ap_num == 0) rtw_hal_mcc_update_parameter(padapter, _FALSE); @@ -2780,7 +2780,7 @@ u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset) /* disable PS_ANNC & TX_RESUME for all interface */ /* ToDo: TX_RESUME by interface in SCAN_BACKING_OP */ mlmeext = &padapter->mlmeextpriv; - + flags = mlmeext_scan_backop_flags(mlmeext); if (mlmeext_chk_scan_backop_flags(mlmeext, SS_BACKOP_PS_ANNC)) flags &= ~SS_BACKOP_PS_ANNC; @@ -2809,7 +2809,7 @@ u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset) /* bypass non-linked/non-linking interface/scan interface */ continue; } - + if (back_op) { *ch = mlmeext->cur_channel; *bw = mlmeext->cur_bwmode; @@ -2965,7 +2965,7 @@ u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter) if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) { rtw_hal_mcc_assign_scan_flag(padapter, 1); - ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_SCAN_DONE); + ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_SCAN_DONE); } _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL); } @@ -3179,7 +3179,7 @@ void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj) } } RTW_PRINT_SEL(sel, "------------------------------------------\n"); - RTW_PRINT_SEL(sel, "policy index:%d\n", mccobjpriv->policy_index); + RTW_PRINT_SEL(sel, "policy index:%d\n", mccobjpriv->policy_index); RTW_PRINT_SEL(sel, "------------------------------------------\n"); RTW_PRINT_SEL(sel, "define data:\n"); RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", MCC_AP_BW20_TARGET_TX_TP); @@ -3281,7 +3281,7 @@ u8 *rtw_hal_mcc_append_go_p2p_ie(PADAPTER padapter, u8 *pframe, u32 *len) if (!MCC_EN(padapter)) return pframe; - + if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) return pframe; @@ -3433,7 +3433,7 @@ u8 rtw_set_mcc_duration_hdl(PADAPTER adapter, u8 type, const u8 *val) rtw_hal_mcc_update_policy_table(adapter); } - /* only update sw parameter under MCC + /* only update sw parameter under MCC it will be force update during */ if (noa_enable) goto exit; @@ -3452,7 +3452,7 @@ u8 rtw_set_mcc_duration_cmd(_adapter *adapter, u8 type, u8 val) u8 *mcc_duration = NULL; u8 res = _FAIL; - + cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(struct cmd_obj)); if (cmdobj == NULL) goto exit; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/hal_mp.c b/drivers/net/wireless/realtek/rtl8812au/hal/hal_mp.c index 4149ef56e183f4..0f084c7e9e68da 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/hal_mp.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/hal_mp.c @@ -30,7 +30,7 @@ #ifdef CONFIG_RTL8192E #include #endif - #ifdef CONFIG_RTL8814A + #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8812A) #include #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) @@ -862,7 +862,7 @@ VOID mpt_SetRFPath_8814A(PADAPTER pAdapter) mpt_ToggleIG_8814A(pAdapter); } #endif /* CONFIG_RTL8814A */ -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8812A) VOID mpt_SetSingleTone_8814A( IN PADAPTER pAdapter, @@ -966,126 +966,6 @@ mpt_SetSingleTone_8814A( phy_set_bb_reg(pAdapter, rD_TxScale_Jaguar2, bMaskDWord, regIG3); /* 0x1A1C[31:21]*/ } } - -#endif - -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) -void mpt_SetRFPath_8812A(PADAPTER pAdapter) -{ - HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); - PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.mpt_ctx; - struct mp_priv *pmp = &pAdapter->mppriv; - u8 channel = pmp->channel; - u8 bandwidth = pmp->bandwidth; - u8 eLNA_2g = pHalData->ExternalLNA_2G; - u32 ulAntennaTx, ulAntennaRx; - - ulAntennaTx = pHalData->antenna_tx_path; - ulAntennaRx = pHalData->AntennaRxPath; - - switch (ulAntennaTx) { - case ANTENNA_A: - pMptCtx->mpt_rf_path = RF_PATH_A; - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x1111); - if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); - break; - case ANTENNA_B: - pMptCtx->mpt_rf_path = RF_PATH_B; - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x2222); - if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x1); - break; - case ANTENNA_AB: - pMptCtx->mpt_rf_path = RF_PATH_AB; - phy_set_bb_reg(pAdapter, rTxPath_Jaguar, bMaskLWord, 0x3333); - if (pHalData->rfe_type == 3 && IS_HARDWARE_TYPE_8812(pAdapter)) - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, bMask_AntselPathFollow_Jaguar, 0x0); - break; - default: - pMptCtx->mpt_rf_path = RF_PATH_AB; - RTW_INFO("Unknown Tx antenna.\n"); - break; - } - - switch (ulAntennaRx) { - u32 reg0xC50; - case ANTENNA_A: - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x11); - phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x1); /*/ RF_B_0x0[19:16] = 1, Standby mode*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); - phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); - - /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ - reg0xC50 = phy_query_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0); - phy_set_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50 + 2); - phy_set_bb_reg(pAdapter, rA_IGI_Jaguar, bMaskByte0, reg0xC50); - - /* set PWED_TH for BB Yn user guide R29 */ - if (IS_HARDWARE_TYPE_8812(pAdapter)) { - if (channel <= 14) { /* 2.4G */ - if (bandwidth == CHANNEL_WIDTH_20 - && eLNA_2g == 0) { - /* 0x830[3:1]=3'b010 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); - } else - /* 0x830[3:1]=3'b100 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } else - /* 0x830[3:1]=3'b100 for 5G */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } - break; - case ANTENNA_B: - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x22); - phy_set_rf_reg(pAdapter, RF_PATH_A, RF_AC_Jaguar, 0xF0000, 0x1);/*/ RF_A_0x0[19:16] = 1, Standby mode */ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x1); - phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, BIT19 | BIT18 | BIT17 | BIT16, 0x3); - - /*/ <20121101, Kordan> To prevent gain table from not switched, asked by Ynlin.*/ - reg0xC50 = phy_query_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0); - phy_set_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50 + 2); - phy_set_bb_reg(pAdapter, rB_IGI_Jaguar, bMaskByte0, reg0xC50); - - /* set PWED_TH for BB Yn user guide R29 */ - if (IS_HARDWARE_TYPE_8812(pAdapter)) { - if (channel <= 14) { - if (bandwidth == CHANNEL_WIDTH_20 - && eLNA_2g == 0) { - /* 0x830[3:1]=3'b010 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x02); - } else - /* 0x830[3:1]=3'b100 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } else - /* 0x830[3:1]=3'b100 for 5G */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - } - break; - case ANTENNA_AB: - phy_set_bb_reg(pAdapter, rRxPath_Jaguar, bMaskByte0, 0x33); - phy_set_rf_reg(pAdapter, RF_PATH_B, RF_AC_Jaguar, 0xF0000, 0x3); /*/ RF_B_0x0[19:16] = 3, Rx mode*/ - phy_set_bb_reg(pAdapter, rCCK_RX_Jaguar, bCCK_RX_Jaguar, 0x0); - /* set PWED_TH for BB Yn user guide R29 */ - phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, BIT1 | BIT2 | BIT3, 0x04); - break; - default: - RTW_INFO("Unknown Rx antenna.\n"); - break; - } - - if (pHalData->rfe_type == 5 || pHalData->rfe_type == 1) { - if (ulAntennaTx == ANTENNA_A || ulAntennaTx == ANTENNA_AB) { - /* WiFi */ - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x2); - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); - } else { - /* BT */ - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(1) | BIT(0), 0x1); - phy_set_bb_reg(pAdapter, r_ANTSEL_SW_Jaguar, BIT(9) | BIT(8), 0x3); - } - } -} #endif #ifdef CONFIG_RTL8723B @@ -1526,12 +1406,6 @@ void hal_mpt_SetAntenna(PADAPTER pAdapter) return; } #endif -#if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) - if (IS_HARDWARE_TYPE_JAGUAR(pAdapter)) { - mpt_SetRFPath_8812A(pAdapter); - return; - } -#endif #ifdef CONFIG_RTL8723B if (IS_HARDWARE_TYPE_8723B(pAdapter)) { mpt_SetRFPath_8723B(pAdapter); @@ -2148,8 +2022,7 @@ static VOID mpt_StartOfdmContTx( pMptCtx->bOfdmContTx = TRUE; } /* mpt_StartOfdmContTx */ - -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_MP_VHT_HW_TX_MODE) /* for HW TX mode */ void mpt_ProSetPMacTx(PADAPTER Adapter) { diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_led.c b/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_led.c index d693ac680e4fb8..033d23b4ce8a41 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_led.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_led.c @@ -63,7 +63,7 @@ void rtw_led_set_strategy(_adapter *adapter, u8 strategy) rtw_hal_sw_led_deinit(pri_adapter); #endif - rtw_led_control(pri_adapter, RTW_LED_OFF); + rtw_led_control(pri_adapter, (LED_CTL_MODE)RTW_LED_OFF); } #ifdef CONFIG_RTW_SW_LED @@ -102,7 +102,7 @@ void rtw_sw_led_blink_uc_trx_only(LED_DATA *led) led->BlinkingLedState = RTW_LED_OFF; else led->BlinkingLedState = RTW_LED_ON; - + if (bStopBlinking) { led->CurrLedState = RTW_LED_OFF; led->bLedBlinkInProgress = _FALSE; @@ -225,7 +225,7 @@ void rtw_led_set_iface_en_mask(_adapter *adapter, u8 mask) void rtw_led_set_ctl_en_mask(_adapter *adapter, u32 ctl_mask) { struct led_priv *ledpriv = adapter_to_led(adapter); - + #if CONFIG_RTW_SW_LED_TRX_DA_CLASSIFY if (ctl_mask & BIT(LED_CTL_TX)) ctl_mask |= BIT(LED_CTL_UC_TX) | BIT(LED_CTL_BMC_TX); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_usb_led.c b/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_usb_led.c index 19505b130f5e05..80f7a393c42778 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_usb_led.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/led/hal_usb_led.c @@ -4139,7 +4139,8 @@ LedControlUSB( return; } - if (ledpriv->bRegUseLed == _FALSE) + if (ledpriv->bRegUseLed == _FALSE || + padapter->registrypriv.led_ctrl == 0) return; /* if(priv->bInHctTest) */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/ap_makefile.mk b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/ap_makefile.mk index 9296b534617ab4..def4490a17f10a 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/ap_makefile.mk +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/ap_makefile.mk @@ -98,7 +98,7 @@ ifeq ($(CONFIG_WLAN_HAL_8822CE),y) _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_8822c.o _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_iqk_8822c.o _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_dpk_8822c.o - _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_rfk_init_8822c.o + _PHYDM_FILES += phydm/halrf/rtl8822c/halrf_rfk_init_8822c.o ifeq ($(CONFIG_RTL_ODM_WLAN_DRIVER),y) _PHYDM_FILES += \ phydm/rtl8822c/halhwimg8822c_bb.o\ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halhwimg.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halhwimg.h index 6d658b3935edaf..2ae2aaa18d031e 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halhwimg.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halhwimg.h @@ -91,47 +91,6 @@ #define RTL8188ES_HWIMG_SUPPORT 0 #endif -#else /* PLATFORM_WINDOWS & MacOSX */ - - /* @For 92C */ - #define RTL8192CE_HWIMG_SUPPORT 1 - #define RTL8192CE_TEST_HWIMG_SUPPORT 1 - #define RTL8192CU_HWIMG_SUPPORT 1 - #define RTL8192CU_TEST_HWIMG_SUPPORT 1 - - /* @For 92D */ - #define RTL8192DE_HWIMG_SUPPORT 1 - #define RTL8192DE_TEST_HWIMG_SUPPORT 1 - #define RTL8192DU_HWIMG_SUPPORT 1 - #define RTL8192DU_TEST_HWIMG_SUPPORT 1 - - #if defined(UNDER_CE) - /* @For 8723 */ - #define RTL8723E_HWIMG_SUPPORT 0 - #define RTL8723U_HWIMG_SUPPORT 0 - #define RTL8723S_HWIMG_SUPPORT 1 - - /* @For 88E */ - #define RTL8188EE_HWIMG_SUPPORT 0 - #define RTL8188EU_HWIMG_SUPPORT 0 - #define RTL8188ES_HWIMG_SUPPORT 0 - - #else - - /* @For 8723 */ - #define RTL8723E_HWIMG_SUPPORT 1 - /* @#define RTL_8723E_TEST_HWIMG_SUPPORT 1 */ - #define RTL8723U_HWIMG_SUPPORT 1 - /* @#define RTL_8723U_TEST_HWIMG_SUPPORT 1 */ - #define RTL8723S_HWIMG_SUPPORT 1 - /* @#define RTL_8723S_TEST_HWIMG_SUPPORT 1 */ - - /* @For 88E */ - #define RTL8188EE_HWIMG_SUPPORT 1 - #define RTL8188EU_HWIMG_SUPPORT 1 - #define RTL8188ES_HWIMG_SUPPORT 1 - #endif - #endif #endif /* @__INC_HW_IMG_H */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_iot.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_iot.c index 07192ef78f1f4d..8145fc9bc89e4f 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_iot.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_iot.c @@ -500,7 +500,7 @@ odm_reset_iqk_result( u8 odm_get_right_chnl_place_for_iqk(u8 chnl) { - + } void @@ -508,7 +508,7 @@ odm_iq_calibrate( struct dm_struct *dm ) { - + } void phydm_rf_init(void *dm_void) @@ -516,7 +516,7 @@ void phydm_rf_init(void *dm_void) struct dm_struct *dm = (struct dm_struct *)dm_void; odm_txpowertracking_init(dm); - + odm_clear_txpowertracking_state(dm); } diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_win.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_win.c index f9ba9d1c8ef3bb..79702788a8ff8d 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_win.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halphyrf_win.c @@ -783,7 +783,7 @@ odm_iq_calibrate( { void *adapter = dm->adapter; struct dm_iqk_info *iqk_info = &dm->IQK_info; - + RF_DBG(dm, DBG_RF_IQK, "=>%s\n",__FUNCTION__); #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf.c index 9f5f599af4a65c..32fd1f3db731cf 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf.c @@ -1935,7 +1935,7 @@ void halrf_dpk_track(void *dm_void) #if (RTL8822C_SUPPORT == 1) case ODM_RTL8822C: dpk_track_8822c(dm); - break; + break; #endif #if (RTL8195B_SUPPORT == 1) @@ -1961,7 +1961,7 @@ void halrf_dpk_track(void *dm_void) #if (RTL8198F_SUPPORT == 1) case ODM_RTL8198F: dpk_track_8198f(dm); - break; + break; #endif #endif @@ -2003,7 +2003,7 @@ void halrf_dpk_reload(void *dm_void) case ODM_RTL8198F: if (dpk_info->dpk_path_ok > 0) dpk_reload_8198f(dm); - break; + break; #endif #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c index 9151a3a11587f0..cafd92f8dd6ef1 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ap.c @@ -1032,7 +1032,7 @@ odm_txpowertracking_thermal_meter_init( void *adapter = dm->adapter; HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); struct dm_priv *pdmpriv = &hal_data->dmpriv; - + pdmpriv->is_txpowertracking = true; pdmpriv->tx_powercount = 0; pdmpriv->is_txpowertracking_init = false; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c index ae065157174720..55ec7bf166deca 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_ce.c @@ -806,7 +806,7 @@ void odm_txpowertracking_check_ce(void *dm_void) dm->rf_calibrate_info.tm_trigger = 1; return; } - + if (dm->support_ic_type & (ODM_RTL8822C | ODM_RTL8814B)) return; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c index 20e7beef4471da..bad28f508d568e 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_powertracking_win.c @@ -530,8 +530,8 @@ get_swing_index( u32 bb_swing, table_value; if (dm->support_ic_type == ODM_RTL8188E || dm->support_ic_type == ODM_RTL8723B || - dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || - dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || + dm->support_ic_type == ODM_RTL8192E || dm->support_ic_type == ODM_RTL8188F || + dm->support_ic_type == ODM_RTL8703B || dm->support_ic_type == ODM_RTL8723D || dm->support_ic_type == ODM_RTL8192F || dm->support_ic_type == ODM_RTL8710B || dm->support_ic_type == ODM_RTL8821) { bb_swing = odm_get_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, 0xFFC00000); @@ -674,11 +674,11 @@ odm_txpowertracking_thermal_meter_init( cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ cali_info->default_cck_index = 28; /*CCK: -6dB*/ /* JJ ADD 20161014 */ - } else if (dm->support_ic_type == ODM_RTL8710B) { + } else if (dm->support_ic_type == ODM_RTL8710B) { cali_info->default_ofdm_index = 28; /*OFDM: -1dB*/ cali_info->default_cck_index = 28; /*CCK: -6dB*/ /*Winnita add 20170828*/ - } else if (dm->support_ic_type == ODM_RTL8192F) { + } else if (dm->support_ic_type == ODM_RTL8192F) { cali_info->default_ofdm_index = 30; /*OFDM: 0dB*/ cali_info->default_cck_index = 28; /*CCK: -6dB*/ } else { diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_psd.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_psd.c index dd68d264343ef5..8c2f874291b2ad 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_psd.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/halrf_psd.c @@ -127,7 +127,7 @@ void halrf_psd( psd->buf_size = 256; mode = average >> 16; - + if (mode == 1) average_tmp = average & 0xffff; else if (mode == 2) @@ -284,7 +284,7 @@ void halrf_iqk_psd( psd->buf_size = 256; mode = average >> 16; - + if (mode == 1) average_tmp = average & 0xffff; else if (mode == 2) { diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c index 2de116e0fe41aa..8861416bfb5e86 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_ap.c @@ -2113,7 +2113,7 @@ phy_iq_calibrate_8812a( ) { struct dm_struct *dm = (struct dm_struct *)dm_void; - + _phy_iq_calibrate_8812a(dm, *dm->channel); } #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c index 4cd2dc6af83441..8a08f6b46b0074 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8812a/halrf_8812a_win.c @@ -474,7 +474,7 @@ void _iqk_tx_fill_iqc_8812a( ) { struct _hal_rf_ *rf = &(dm->rf_table); - + switch (path) { case RF_PATH_A: { @@ -2867,10 +2867,10 @@ phy_dp_calibrate_8812a( struct dm_struct *dm ) { -#if 0 +#if 0 struct _hal_rf_ *rf = &(dm->rf_table); - + rf->dpk_done = true; RF_DBG(dm, DBG_RF_IQK, "===> phy_dp_calibrate_8812a\n"); _phy_dp_calibrate_path_a_8812a(dm); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c new file mode 100644 index 00000000000000..238df1bf487bf3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.c @@ -0,0 +1,1754 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#if !defined(__ECOS) && !defined(CONFIG_COMPAT_WIRELESS) +#include "mp_precomp.h" +#else +#include "../mp_precomp.h" +#endif +#include "../phydm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ +// 2010/04/25 MH Define the max tx power tracking tx agc power. +#define ODM_TXPWRTRACK_MAX_IDX8814A 6 + +/*---------------------------Define Local Constant---------------------------*/ + + +//3============================================================ +//3 Tx Power Tracking +//3============================================================ + +u1Byte +CheckRFGainOffset( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath + ) +{ + s1Byte UpperBound = 10, LowerBound = -5; // 4'b1010 = 10 + s1Byte Final_RF_Index = 0; + BOOLEAN bPositive = FALSE; + u4Byte bitMask = 0; + u1Byte Final_OFDM_Swing_Index = 0, TxScalingUpperBound = 28, TxScalingLowerBound = 4;// upper bound +2dB, lower bound -9dB + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + if(Method == MIX_MODE) //normal Tx power tracking + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("is 8814 MP chip\n")); + bitMask = BIT19; + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] + pRFCalibrateInfo->KfreeOffset[RFPath]; + + if( pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0) // check if RF_Index is positive or not + bPositive = TRUE; + else + bPositive = FALSE; + + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, bPositive); + + bitMask = BIT18|BIT17|BIT16|BIT15; + Final_RF_Index = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] / 2; /*TxBB 1 step equal 1dB, BB swing 1step equal 0.5dB*/ + + } + + if(Final_RF_Index > UpperBound) //Upper bound = 10dB, if more htan upper bound, then move to bb swing max = +2dB + { + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, UpperBound); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] - (UpperBound << 1)); + + if(Final_OFDM_Swing_Index > TxScalingUpperBound) // bb swing upper bound = +2dB + Final_OFDM_Swing_Index = TxScalingUpperBound; + + return Final_OFDM_Swing_Index; + } + else if(Final_RF_Index < LowerBound) // lower bound = -5dB + { + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*(LowerBound)); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex - ((LowerBound<<1) - pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]); + + if(Final_OFDM_Swing_Index < TxScalingLowerBound) // bb swing lower bound = -10dB + Final_OFDM_Swing_Index = TxScalingLowerBound; + return Final_OFDM_Swing_Index; + } + else // normal case + { + + if(bPositive == TRUE) + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, Final_RF_Index); //set RF Reg0x55 per path + else + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*Final_RF_Index); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath])%2; + return Final_OFDM_Swing_Index; + } + + return FALSE; +} + + +VOID +ODM_TxPwrTrackSetPwr8814A( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath, + u1Byte ChannelMappedIndex + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PADAPTER Adapter = pDM_Odm->Adapter; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +#endif + u1Byte Final_OFDM_Swing_Index = 0; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + if (Method == MIX_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pDM_Odm->DefaultOfdmIndex=%d, pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", + pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath)); + + Final_OFDM_Swing_Index = CheckRFGainOffset(pDM_Odm, MIX_MODE, RFPath); + } + else if(Method == TSSI_MODE) + { + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0); + } + else if(Method == BBSWING) // use for mp driver clean power tracking status + { + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] + pRFCalibrateInfo->KfreeOffset[RFPath]; + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]); + + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0); + } + + if((Method == MIX_MODE) || (Method == BBSWING)) + { + switch(RFPath) + { + case ODM_RF_PATH_A: + + ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case ODM_RF_PATH_B: + + ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case ODM_RF_PATH_C: + + ODM_SetBBReg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case ODM_RF_PATH_D: + + ODM_SetBBReg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + default: + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("Wrong Path name!!!! \n")); + + break; + } + } + return; +} // ODM_TxPwrTrackSetPwr8814A + +VOID +GetDeltaSwingTable_8814A( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_A, + OUT pu1Byte *TemperatureDOWN_A, + OUT pu1Byte *TemperatureUP_B, + OUT pu1Byte *TemperatureDOWN_B + ) +{ + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + u2Byte rate = *(pDM_Odm->pForcedDataRate); + u1Byte channel = *(pDM_Odm->pChannel); + + if ( 1 <= channel && channel <= 14) { + if (IS_CCK_RATE(rate)) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N; + } else { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N; + } + } else if ( 36 <= channel && channel <= 64) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0]; + } else if ( 100 <= channel && channel <= 140) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1]; + } else if ( 149 <= channel && channel <= 173) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2]; + } else { + *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_DEFAULT; + *TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_DEFAULT; + } + + return; +} + + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_C, + OUT pu1Byte *TemperatureDOWN_C, + OUT pu1Byte *TemperatureUP_D, + OUT pu1Byte *TemperatureDOWN_D + ) +{ + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + u2Byte rate = *(pDM_Odm->pForcedDataRate); + u1Byte channel = *(pDM_Odm->pChannel); + + if ( 1 <= channel && channel <= 14) { + if (IS_CCK_RATE(rate)) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_N; + } else { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_N; + } + } else if ( 36 <= channel && channel <= 64) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[0]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[0]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[0]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[0]; + } else if ( 100 <= channel && channel <= 140) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[1]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[1]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[1]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[1]; + } else if ( 149 <= channel && channel <= 173) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[2]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[2]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[2]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[2]; + } else { + *TemperatureUP_C = (pu1Byte)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_C = (pu1Byte)DeltaSwingTableIdx_2GA_N_DEFAULT; + *TemperatureUP_D = (pu1Byte)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_D = (pu1Byte)DeltaSwingTableIdx_2GA_N_DEFAULT; + } + + return; +} + + +void ConfigureTxpowerTrack_8814A( + IN PTXPWRTRACK_CFG pConfig + ) +{ + pConfig->SwingTableSize_CCK = ODM_CCK_TABLE_SIZE; + pConfig->SwingTableSize_OFDM = ODM_OFDM_TABLE_SIZE; + pConfig->Threshold_IQK = 8; + pConfig->AverageThermalNum = AVG_THERMAL_NUM_8814A; + pConfig->RfPathCount = MAX_PATH_NUM_8814A; + pConfig->ThermalRegAddr = RF_T_METER_8814A; + + pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr8814A; + pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8814A; + pConfig->DoIQK = DoIQK_8814A; + pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8814A; + pConfig->GetDeltaSwingTable8814only = GetDeltaSwingTable_8814A_PathCD; +} + + + +//1 7. IQK + + + +// +// 2011/07/26 MH Add an API for testing IQK fail case. +// +// MP Already declare in odm.c +#if 0 //!(DM_ODM_SUPPORT_TYPE & ODM_WIN) +BOOLEAN +ODM_CheckPowerStatus( + IN PADAPTER Adapter) +{ + /* + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; + RT_RF_POWER_STATE rtState; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. + if (pMgntInfo->init_adpt_in_progress == TRUE) + { + ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); + return TRUE; + } + + // + // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. + // + Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState)); + if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) + { + ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", + Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); + return FALSE; + } + */ + return TRUE; +} +#endif + +VOID + _PHY_SaveADDARegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN pu4Byte ADDABackup, + IN u4Byte RegisterNum + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif + + if (ODM_CheckPowerStatus(pAdapter) == FALSE) + return; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); + for( i = 0 ; i < RegisterNum ; i++){ + ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); + } +} + + +VOID + _PHY_SaveMACRegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); + for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); + } + MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); + +} + + +VOID + _PHY_ReloadADDARegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN pu4Byte ADDABackup, + IN u4Byte RegiesterNum + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); + for(i = 0 ; i < RegiesterNum; i++) + { + ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); + } +} + +VOID + _PHY_ReloadMACRegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ) +{ + u4Byte i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); + for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)MACBackup[i]); + } + ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); +} + + + +VOID + _PHY_MACSettingCalibration_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ) +{ + u4Byte i = 0; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); + + ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); + + for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ + ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT3))); + } + ODM_Write1Byte(pDM_Odm, MACReg[i], (u1Byte)(MACBackup[i]&(~BIT5))); + +} + +#if 0 +#define BW_20M 0 +#define BW_40M 1 +#define BW_80M 2 +#endif + +VOID + phy_LCCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T + ) +{ + u4Byte /*RF_Amode=0, RF_Bmode=0,*/ LC_Cal = 0, tmp = 0; + u4Byte cnt; + + //Check continuous TX and Packet TX + u4Byte reg0x914 = ODM_Read4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar);; + + // Backup RF reg18. + + if((reg0x914 & 0x70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812, 0xFF); + + //3 3. Read RF reg18 + LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + + //3 4. Set LC calibration begin bit15 + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000, 0x1); + + ODM_delay_ms(100); + + for (cnt = 0; cnt < 100; cnt++) { + if (ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1) + break; + ODM_delay_ms(10); + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt)); + + + //3 Restore original situation + if((reg0x914 & 70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812, 0x00); + + // Recover channel number + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal); +} + +//Analog Pre-distortion calibration +#define APK_BB_REG_NUM 8 +#define APK_CURVE_REG_NUM 4 +#define PATH_NUM 2 + +VOID + phy_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta, + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + u4Byte regD[PATH_NUM]; + u4Byte tmpReg, index, offset, apkbound; + u1Byte path, i, pathbound = PATH_NUM; + u4Byte BB_backup[APK_BB_REG_NUM]; + u4Byte BB_REG[APK_BB_REG_NUM] = { + rFPGA1_TxBlock, rOFDM0_TRxPathEnable, + rFPGA0_RFMOD, rOFDM0_TRMuxPar, + rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, + rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; + u4Byte BB_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x00204000 }; + u4Byte BB_normal_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x22204000 }; + + u4Byte AFE_backup[IQK_ADDA_REG_NUM]; + u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + + u4Byte MAC_backup[IQK_MAC_REG_NUM]; + u4Byte MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + u4Byte APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, + {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} + }; + + u4Byte APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings + {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} + }; + + u4Byte APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, + {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} + }; + + u4Byte APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} + }; + + u4Byte AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u4Byte APK_offset[PATH_NUM] = { + rConfig_AntA, rConfig_AntB}; + + u4Byte APK_normal_offset[PATH_NUM] = { + rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; + + u4Byte APK_value[PATH_NUM] = { + 0x92fc0000, 0x12fc0000}; + + u4Byte APK_normal_value[PATH_NUM] = { + 0x92680000, 0x12680000}; + + s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} + }; + + u4Byte APK_normal_setting_value_1[13] = { + 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, + 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, + 0x12680000, 0x00880000, 0x00880000 + }; + + u4Byte APK_normal_setting_value_2[16] = { + 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, + 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, + 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, + 0x00050006 + }; + + u4Byte APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a + // u4Byte AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; + + s4Byte BB_offset, delta_V, delta_offset; + +#if defined(MP_DRIVER) && (MP_DRIVER == 1) +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); +#else + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); +#endif + pMptCtx->APK_bound[0] = 45; + pMptCtx->APK_bound[1] = 52; + +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8814A() delta %d\n", delta)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); + if(!is2T) + pathbound = 1; + + //2 FOR NORMAL CHIP SETTINGS + + // Temporarily do not allow normal driver to do the following settings because these offset + // and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal + // will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the + // root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. +#if !defined(MP_DRIVER) || (MP_DRIVER != 1) + return; +#endif + //settings adjust for normal chip + for(index = 0; index < PATH_NUM; index ++) + { + APK_offset[index] = APK_normal_offset[index]; + APK_value[index] = APK_normal_value[index]; + AFE_on_off[index] = 0x6fdb25a4; + } + + for(index = 0; index < APK_BB_REG_NUM; index ++) + { + for(path = 0; path < pathbound; path++) + { + APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; + APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; + } + BB_AP_MODE[index] = BB_normal_AP_MODE[index]; + } + + apkbound = 6; + + //save BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(index == 0) //skip + continue; + BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); + } + + //save MAC default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_SaveMACRegisters_8814A(pAdapter, MAC_REG, MAC_backup); + + //save AFE default value + _PHY_SaveADDARegisters_8814A(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#else + _PHY_SaveMACRegisters_8814A(pDM_Odm, MAC_REG, MAC_backup); + + //save AFE default value + _PHY_SaveADDARegisters_8814A(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#endif + + for(path = 0; path < pathbound; path++) + { + + + if(path == RF_PATH_A) + { + //path A APK + //load APK setting + //path-A + offset = rPdp_AntA; + for(index = 0; index < 11; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); + + offset = rConfig_AntA; + for(; index < 13; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path A + offset = rPdp_AntA; + for(index = 0; index < 16; index++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + } + else if(path == RF_PATH_B) + { + //path B APK + //load APK setting + //path-B + offset = rPdp_AntB; + for(index = 0; index < 10; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); + + offset = rConfig_AntA; + index = 11; + for(; index < 13; index ++) //offset 0xb68, 0xb6c + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path B + offset = 0xb60; + for(index = 0; index < 16; index++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); + } + + //save RF default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); +#else + regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); +#endif + + //Path A AFE all on, path B AFE All off or vise versa + for(index = 0; index < IQK_ADDA_REG_NUM ; index++) + ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); + + //BB to AP mode + if(path == 0) + { + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + else if (index < 5) + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); + else if (BB_REG[index] == 0x870) + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); + else + ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); + } + + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + } + else //path B + { + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); + + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); + + //MAC settings +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_MACSettingCalibration_8814A(pAdapter, MAC_REG, MAC_backup); +#else + _PHY_MACSettingCalibration_8814A(pDM_Odm, MAC_REG, MAC_backup); +#endif + + if(path == RF_PATH_A) //Path B to standby mode + { + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x10000); + } + else //Path A to standby mode + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); + } + + delta_offset = ((delta+14)/2); + if(delta_offset < 0) + delta_offset = 0; + else if (delta_offset > 12) + delta_offset = 12; + + //AP calibration + for(index = 0; index < APK_BB_REG_NUM; index++) + { + if(index != 1) //only DO PA11+PAD01001, AP RF setting + continue; + + tmpReg = APK_RF_init_value[path][index]; +#if 1 + if(!pDM_Odm->RFCalibrateInfo.bAPKThermalMeterIgnore) + { + BB_offset = (tmpReg & 0xF0000) >> 16; + + if(!(tmpReg & BIT15)) //sign bit 0 + { + BB_offset = -BB_offset; + } + + delta_V = APK_delta_mapping[index][delta_offset]; + + BB_offset += delta_V; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, (int)delta_V, (int)delta_offset)); + + if(BB_offset < 0) + { + tmpReg = tmpReg & (~BIT15); + BB_offset = -BB_offset; + } + else + { + tmpReg = tmpReg | BIT15; + } + tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); + } +#endif + + ODM_SetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord, 0x8992e); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); +#else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); +#endif + + // PA11+PAD01111, one shot + i = 0; + do + { + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + { + ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); + ODM_delay_ms(3); + ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); + + ODM_delay_ms(20); + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + if(path == RF_PATH_A) + tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); + else + tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xbd8[25:21] %x\n", tmpReg)); + + + i++; + } + while(tmpReg > apkbound && i < 4); + + APK_result[path][index] = tmpReg; + } + } + + //reload MAC default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_ReloadMACRegisters_8814A(pAdapter, MAC_REG, MAC_backup); +#else + _PHY_ReloadMACRegisters_8814A(pDM_Odm, MAC_REG, MAC_backup); +#endif + + //reload BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); + } + + //reload AFE default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_ReloadADDARegisters_8814A(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#else + _PHY_ReloadADDARegisters_8814A(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#endif + + //reload RF path default value + for(path = 0; path < pathbound; path++) + { + ODM_SetRFReg(pDM_Odm, path, 0xd, bMaskDWord, regD[path]); + if(path == RF_PATH_B) + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); + } + + //note no index == 0 + if (APK_result[path][1] > 6) + APK_result[path][1] = 6; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); + + + for(path = 0; path < pathbound; path++) + { + ODM_SetRFReg(pDM_Odm, path, 0x3, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); + if(path == RF_PATH_A) + ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); + else + ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + ODM_SetRFReg(pDM_Odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord, + ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); +#endif + } + + pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8814A()\n")); +} + + + + + + +VOID +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ) +{ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n")); + phy_LCCalibrate_8814A(pDM_Odm, TRUE); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n")); +} + +VOID + PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif +#ifdef DISABLE_BB_RF + return; +#endif + + return; +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) + if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) + { + return; + } +#endif + +#if defined(FOR_BRAZIL_PRETEST) && (FOR_BRAZIL_PRETEST != 1) + if(pDM_Odm->RFCalibrateInfo.bAPKdone) +#endif + return; + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if(IS_92C_SERIAL( pHalData->VersionID)){ + phy_APCalibrate_8814A(pAdapter, delta, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_APCalibrate_8814A(pAdapter, delta, FALSE); +#else + phy_APCalibrate_8814A(pDM_Odm, delta, FALSE); +#endif + } +} + VOID phy_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if(!pAdapter->bHWInitReady) +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(pAdapter->hw_init_completed == _FALSE) +#endif + { + u1Byte u1bTmp; + u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; + ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); + //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + +#endif + + if(is2T) //92C + { + if(bMain) + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT + } + else //88C + { + + if(bMain) + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); //Main + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); //Aux + } +} + VOID PHY_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain + ) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#ifdef DISABLE_BB_RF + return; +#endif + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if (IS_92C_SERIAL(pHalData->VersionID)) + { + phy_SetRFPathSwitch_8814A(pAdapter, bMain, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_SetRFPathSwitch_8814A(pAdapter, bMain, FALSE); +#else + phy_SetRFPathSwitch_8814A(pDM_Odm, bMain, FALSE); +#endif + } +} + + +#define DP_BB_REG_NUM 7 +#define DP_RF_REG_NUM 1 +#define DP_RETRY_LIMIT 10 +#define DP_PATH_NUM 2 +#define DP_DPK_NUM 3 +#define DP_DPK_VALUE_NUM 2 + + + + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +//digital predistortion +VOID + phy_DigitalPredistortion_8814A( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter, +#else + IN PDM_ODM_T pDM_Odm, +#endif + IN BOOLEAN is2T + ) +{ +#if (RT_PLATFORM == PLATFORM_WINDOWS) +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + + u4Byte tmpReg, tmpReg2, index, i; + u1Byte path, pathbound = PATH_NUM; + u4Byte AFE_backup[IQK_ADDA_REG_NUM]; + u4Byte AFE_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + + u4Byte BB_backup[DP_BB_REG_NUM]; + u4Byte BB_REG[DP_BB_REG_NUM] = { + rOFDM0_TRxPathEnable, rFPGA0_RFMOD, + rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, + rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, + rFPGA0_XB_RFInterfaceOE}; + u4Byte BB_settings[DP_BB_REG_NUM] = { + 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, + 0x0, 0x0, 0x0}; + + u4Byte RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; + u4Byte RF_REG[DP_RF_REG_NUM] = { + RF_TXBIAS_A}; + + u4Byte MAC_backup[IQK_MAC_REG_NUM]; + u4Byte MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + u4Byte Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { + {0x1e1e1e1e, 0x03901e1e}, + {0x18181818, 0x03901818}, + {0x0e0e0e0e, 0x03900e0e} + }; + + u4Byte AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u1Byte RetryCount = 0; + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion_8814A()\n")); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion_8814A for %s %s\n", (is2T ? "2T2R" : "1T1R"))); + + //save BB default value + for(index=0; index tx_agc 1f ~11 + // PA gain = 11 & PAD2 => tx_agc 10~0e + // PA gain = 01 => tx_agc 0b~0d + // PA gain = 00 => tx_agc 0a~00 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + //do inner loopback DPK 3 times + for(i = 0; i < 3; i++) + { + //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 + for(index = 0; index < 3; index++) + ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); + ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); + + // PAGE_B for Path-A inner loopback DPK setting + ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098); + ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); + + //----send one shot signal----// + // Path A + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788); + ODM_delay_ms(50); + } + + //PA gain = 11 => tx_agc = 1a + for(index = 0; index < 3; index++) + ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434); + ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434); + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434); + + //==================================== + // PAGE_B for Path-A DPK setting + //==================================== + // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 + ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098); + ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); + + //rf_lpbk_setup + //1.rf 00:5205a, rf 0d:0e52c + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0c, bMaskDWord, 0x8992b); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bMaskDWord, 0x5205a ); + + //----send one shot signal----// + // Path A + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + + while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathAOK) + { + //----read back measurement results----// + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018); + tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord); + ODM_delay_ms(10); + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f); + tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord); + ODM_delay_ms(10); + + tmpReg = (tmpReg & bMaskHWord) >> 16; + tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; + if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) + { + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + RetryCount++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2)); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n")); + pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE; + break; + } + } + RetryCount = 0; + + //DPP path A + if(pDM_Odm->RFCalibrateInfo.bDPPathAOK) + { + // DP settings + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098); + ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + for(i=rPdp_AntA; i<=0xb3c; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i)); + } + + //pwsf + ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040); + ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040); + ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920); + + for(i=0xb4c; i<=0xb5c; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); + } + + //TX_AGC boundary + ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + } + else + { + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000); + } + + //DPK path B + if(is2T) + { + //Path A to standby mode + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); + + // LUTs => tx_agc + // PA gain = 11 & PAD1, => tx_agc 1f ~11 + // PA gain = 11 & PAD2, => tx_agc 10 ~0e + // PA gain = 01 => tx_agc 0b ~0d + // PA gain = 00 => tx_agc 0a ~00 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + //do inner loopback DPK 3 times + for(i = 0; i < 3; i++) + { + //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); + + // PAGE_B for Path-A inner loopback DPK setting + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); + + //----send one shot signal----// + // Path B + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788); + ODM_delay_ms(50); + } + + // PA gain = 11 => tx_agc = 1a + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434); + + // PAGE_B for Path-B DPK setting + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); + + // RF lpbk switches on + ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f); + ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103); + + //Path-B RF lpbk + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0c, bMaskDWord, 0x8992b); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x5205a); + + //----send one shot signal----// + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + + while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathBOK) + { + //----read back measurement results----// + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018); + tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord); + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f); + tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord); + + tmpReg = (tmpReg & bMaskHWord) >> 16; + tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; + + if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) + { + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + RetryCount++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2)); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n")); + pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE; + break; + } + } + + //DPP path B + if(pDM_Odm->RFCalibrateInfo.bDPPathBOK) + { + // DP setting + // LUT by SRAM + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + for(i=0xb60; i<=0xb9c; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i)); + } + + // PWSF + ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040); + ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050); + ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920); + + for(i=0xbac; i<=0xbbc; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); + } + + // tx_agc boundary + ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + } + else + { + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000); + } + } + + //reload BB default value + for(index=0; indexRFCalibrateInfo.bDPdone = TRUE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion_8814A()\n")); +#endif +} + +VOID + phy_DigitalPredistortion_8814A_8814A( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter +#else + IN PDM_ODM_T pDM_Odm +#endif + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif +#if DISABLE_BB_RF + return; +#endif + + return; + + if(pDM_Odm->RFCalibrateInfo.bDPdone) + return; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + if(IS_92C_SERIAL( pHalData->VersionID)){ + phy_DigitalPredistortion_8814A(pAdapter, TRUE); + } + else +#endif + { + // For 88C 1T1R + phy_DigitalPredistortion_8814A(pAdapter, FALSE); + } +} + + + +//return value TRUE => Main; FALSE => Aux + + BOOLEAN phy_QueryRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + if(!pAdapter->bHWInitReady) + { + u1Byte u1bTmp; + u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; + ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); + //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) // + { + if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) + return TRUE; + else + return FALSE; + } + else + { + if((ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3) == 0x0) || + (ODM_GetBBReg(pDM_Odm, rConfig_ram64x16, BIT31) == 0x0)) + return TRUE; + else + return FALSE; + } +} + + + +//return value TRUE => Main; FALSE => Aux + BOOLEAN PHY_QueryRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#if DISABLE_BB_RF + return TRUE; +#endif +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + //if(IS_92C_SERIAL( pHalData->VersionID)){ + if(IS_2T2R( pHalData->VersionID)){ + return phy_QueryRFPathSwitch_8814A(pAdapter, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + return phy_QueryRFPathSwitch_8814A(pAdapter, FALSE); +#else + return phy_QueryRFPathSwitch_8814A(pDM_Odm, FALSE); +#endif + } +} +#endif + + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h new file mode 100644 index 00000000000000..46eaa801e149de --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ap.h @@ -0,0 +1,164 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __HAL_PHY_RF_8814A_H__ +#define __HAL_PHY_RF_8814A_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define IQK_DELAY_TIME_8814A 10 //ms +#define index_mapping_NUM_8814A 15 +#define AVG_THERMAL_NUM_8814A 4 +#define RF_T_METER_8814A 0x42 +#define MAX_PATH_NUM_8814A 4 + +#include "../halphyrf_ap.h" + + +void ConfigureTxpowerTrack_8814A( + PTXPWRTRACK_CFG pConfig + ); + +VOID +GetDeltaSwingTable_8814A( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_A, + OUT pu1Byte *TemperatureDOWN_A, + OUT pu1Byte *TemperatureUP_B, + OUT pu1Byte *TemperatureDOWN_B + ); + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_C, + OUT pu1Byte *TemperatureDOWN_C, + OUT pu1Byte *TemperatureUP_D, + OUT pu1Byte *TemperatureDOWN_D + ); + +VOID +ConfigureTxpowerTrack_8814A( + IN PTXPWRTRACK_CFG pConfig + ); + + +VOID +ODM_TxPwrTrackSetPwr8814A( + IN PDM_ODM_T pDM_Odm, + IN PWRTRACK_METHOD Method, + IN u1Byte RFPath, + IN u1Byte ChannelMappedIndex + ); + + +u1Byte +CheckRFGainOffset( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath + ); + + +// +// LC calibrate +// +void +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm +); + +void +phy_LCCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T +); + + +// +// AP calibrate +// +void +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta); +void +PHY_DigitalPredistortion_8814A( IN PADAPTER pAdapter); + + +#if 0 //FOR_8814_IQK +VOID +_PHY_SaveADDARegisters( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN pu4Byte ADDABackup, + IN u4Byte RegisterNum + ); + +VOID +_PHY_PathADDAOn( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN BOOLEAN isPathAOn, + IN BOOLEAN is2T + ); + +VOID +_PHY_MACSettingCalibration( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ); + + + +VOID +_PHY_PathAStandBy( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ); + +#endif + + +#endif // #ifndef __HAL_PHY_RF_8814A_H__ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c new file mode 100644 index 00000000000000..09c65ed3ff6bbd --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.c @@ -0,0 +1,564 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "mp_precomp.h" +#include "../../phydm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ +// 2010/04/25 MH Define the max tx power tracking tx agc power. +#define ODM_TXPWRTRACK_MAX_IDX_8814A 6 + +/*---------------------------Define Local Constant---------------------------*/ + +//3============================================================ +//3 Tx Power Tracking +//3============================================================ + + +// Add CheckRFGainOffset By YuChen to make sure that RF gain offset will not over upperbound 4'b1010 + +u8 +CheckRFGainOffset( + struct dm_struct *pDM_Odm, + enum pwrtrack_method Method, + u8 RFPath + ) +{ + s1Byte UpperBound = 10, LowerBound = -5; // 4'b1010 = 10 + s1Byte Final_RF_Index = 0; + BOOLEAN bPositive = FALSE; + u32 bitMask = 0; + u8 Final_OFDM_Swing_Index = 0, TxScalingUpperBound = 28, TxScalingLowerBound = 4;// upper bound +2dB, lower bound -10dB + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + if(Method == MIX_MODE) //normal Tx power tracking + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("is 8814 MP chip\n")); + bitMask = BIT19; + prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] = prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] + prf_calibrate_info->kfree_offset[RFPath]; + + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("=========================== [Path-%d] TXBB Offset============================\n", RFPath)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("absolute_ofdm_swing_idx[RFPath](%d) = absolute_ofdm_swing_idx[RFPath](%d) + kfree_offset[RFPath](%d), RFPath=%d\n", prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], prf_calibrate_info->kfree_offset[RFPath], RFPath)); + + if (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] >= 0) /* check if RF_Index is positive or not*/ + bPositive = TRUE; + else + bPositive = FALSE; + + odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, bPositive); + + bitMask = BIT18|BIT17|BIT16|BIT15; + Final_RF_Index = prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] / 2; /*TxBB 1 step equal 1dB, BB swing 1step equal 0.5dB*/ + + } + + if(Final_RF_Index > UpperBound) //Upper bound = 10dB, if more htan upper bound, then move to bb swing max = +2dB + { + odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, UpperBound); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index + (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] - (UpperBound << 1)); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) = default_ofdm_index(%d) + (absolute_ofdm_swing_idx[RFPath](%d) - (UpperBound(%d) << 1)), RFPath=%d\n", Final_OFDM_Swing_Index, prf_calibrate_info->default_ofdm_index, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], UpperBound, RFPath)); + + if (Final_OFDM_Swing_Index > TxScalingUpperBound) { /* bb swing upper bound = +2dB */ + Final_OFDM_Swing_Index = TxScalingUpperBound; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) > TxScalingUpperBound(%d) Final_OFDM_Swing_Index = TxScalingUpperBound\n", Final_OFDM_Swing_Index, TxScalingUpperBound)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n")); + } + + return Final_OFDM_Swing_Index; + } + else if(Final_RF_Index < LowerBound) // lower bound = -5dB + { + odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*(LowerBound)); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index - ((LowerBound<<1) - prf_calibrate_info->absolute_ofdm_swing_idx[RFPath]); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) = default_ofdm_index(%d) - ((LowerBound(%d)<<1) - absolute_ofdm_swing_idx[RFPath](%d)), RFPath=%d\n", Final_OFDM_Swing_Index, prf_calibrate_info->default_ofdm_index, LowerBound, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], RFPath)); + + if (Final_OFDM_Swing_Index < TxScalingLowerBound) { /* BB swing lower bound = -10dB */ + Final_OFDM_Swing_Index = TxScalingLowerBound; + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) > TxScalingLowerBound(%d) Final_OFDM_Swing_Index = TxScalingLowerBound\n", Final_OFDM_Swing_Index, TxScalingLowerBound)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n")); + } + return Final_OFDM_Swing_Index; + } + else // normal case + { + + if(bPositive == TRUE) + odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, Final_RF_Index); //set RF Reg0x55 per path + else + odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*Final_RF_Index); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index + (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath])%2; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_OFDM_Swing_Index(%d) = default_ofdm_index(%d) + (absolute_ofdm_swing_idx[RFPath])//2(%d), RFPath=%d\n", Final_OFDM_Swing_Index, prf_calibrate_info->default_ofdm_index, (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath])%2, RFPath)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n")); + + return Final_OFDM_Swing_Index; + } + + return FALSE; +} + + +VOID +ODM_TxPwrTrackSetPwr8814A( + IN PVOID pDM_VOID, + enum pwrtrack_method Method, + u8 RFPath, + u8 ChannelMappedIndex + ) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + PADAPTER Adapter = pDM_Odm->adapter; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + u8 Final_OFDM_Swing_Index = 0; + + if (Method == MIX_MODE) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("prf_calibrate_info->default_ofdm_index=%d, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath]=%d, RF_Path = %d\n", + prf_calibrate_info->default_ofdm_index, prf_calibrate_info->absolute_ofdm_swing_idx[RFPath], RFPath)); + + Final_OFDM_Swing_Index = CheckRFGainOffset(pDM_Odm, MIX_MODE, RFPath); + } + else if(Method == TSSI_MODE) + { + odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0); + } + else if(Method == BBSWING) // use for mp driver clean power tracking status + { + prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] = prf_calibrate_info->absolute_ofdm_swing_idx[RFPath] + prf_calibrate_info->kfree_offset[RFPath]; + + Final_OFDM_Swing_Index = prf_calibrate_info->default_ofdm_index + (prf_calibrate_info->absolute_ofdm_swing_idx[RFPath]); + + odm_set_rf_reg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0); + } + + if((Method == MIX_MODE) || (Method == BBSWING)) + { + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("=========================== [Path-%d] BBSWING Offset============================\n", RFPath)); + + switch(RFPath) + { + case RF_PATH_A: + + odm_set_bb_reg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case RF_PATH_B: + + odm_set_bb_reg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case RF_PATH_C: + + odm_set_bb_reg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case RF_PATH_D: + + odm_set_bb_reg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, tx_scaling_table_jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + default: + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("Wrong Path name!!!! \n")); + + break; + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===========================================================================\n")); + } + return; +} // ODM_TxPwrTrackSetPwr8814A + + +VOID +GetDeltaSwingTable_8814A( + IN PVOID pDM_VOID, + u8* *TemperatureUP_A, + u8* *TemperatureDOWN_A, + u8* *TemperatureUP_B, + u8* *TemperatureDOWN_B + ) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + PADAPTER Adapter = pDM_Odm->adapter; + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 TxRate = 0xFF; + u8 channel = pHalData->current_channel; + + + if (*(pDM_Odm->mp_mode) == TRUE) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (MP_DRIVER == 1) + PMPT_CONTEXT pMptCtx = &(Adapter->mpt_ctx); + + TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); + #endif + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); + + TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); + #endif + #endif + } else { + u2Byte rate = *(pDM_Odm->forced_data_rate); + + if (!rate) { /*auto rate*/ + if (pDM_Odm->tx_rate != 0xFF) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->tx_rate); + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + TxRate = hw_rate_to_m_rate(pDM_Odm->tx_rate); + #endif + } + } else { /*force rate*/ + TxRate = (u8)rate; + } + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); + + if (1 <= channel && channel <= 14) { + if (IS_CCK_RATE(TxRate)) { + *TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_2g_cck_a_p; + *TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_2g_cck_a_n; + *TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_2g_cck_b_p; + *TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_2g_cck_b_n; + } else { + *TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_2ga_p; + *TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_2ga_n; + *TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_2gb_p; + *TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_2gb_n; + } + } else if (36 <= channel && channel <= 64) { + *TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_5ga_p[0]; + *TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_5ga_n[0]; + *TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_5gb_p[0]; + *TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_5gb_n[0]; + } else if (100 <= channel && channel <= 144) { + *TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_5ga_p[1]; + *TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_5ga_n[1]; + *TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_5gb_p[1]; + *TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_5gb_n[1]; + } else if (149 <= channel && channel <= 173) { + *TemperatureUP_A = prf_calibrate_info->delta_swing_table_idx_5ga_p[2]; + *TemperatureDOWN_A = prf_calibrate_info->delta_swing_table_idx_5ga_n[2]; + *TemperatureUP_B = prf_calibrate_info->delta_swing_table_idx_5gb_p[2]; + *TemperatureDOWN_B = prf_calibrate_info->delta_swing_table_idx_5gb_n[2]; + } else { + *TemperatureUP_A = (u8*)delta_swing_table_idx_2ga_p_8188e; + *TemperatureDOWN_A = (u8*)delta_swing_table_idx_2ga_n_8188e; + *TemperatureUP_B = (u8*)delta_swing_table_idx_2ga_p_8188e; + *TemperatureDOWN_B = (u8*)delta_swing_table_idx_2ga_n_8188e; + } + + + + return; +} + + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PVOID pDM_VOID, + u8* *TemperatureUP_C, + u8* *TemperatureDOWN_C, + u8* *TemperatureUP_D, + u8* *TemperatureDOWN_D + ) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + PADAPTER Adapter = pDM_Odm->adapter; + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 TxRate = 0xFF; + u8 channel = pHalData->current_channel; + + + if (*(pDM_Odm->mp_mode) == TRUE) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (MP_DRIVER == 1) + PMPT_CONTEXT pMptCtx = &(Adapter->mpt_ctx); + + TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); + #endif + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); + + TxRate = mpt_to_mgnt_rate(pMptCtx->mpt_rate_index); + #endif + #endif + } else { + u2Byte rate = *(pDM_Odm->forced_data_rate); + + if (!rate) { /*auto rate*/ + if (pDM_Odm->tx_rate != 0xFF) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->tx_rate); + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + TxRate = hw_rate_to_m_rate(pDM_Odm->tx_rate); + #endif + } + } else { /*force rate*/ + TxRate = (u8)rate; + } + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); + + if ( 1 <= channel && channel <= 14) { + if (IS_CCK_RATE(TxRate)) { + *TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_2g_cck_c_p; + *TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_2g_cck_c_n; + *TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_2g_cck_d_p; + *TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_2g_cck_d_n; + } else { + *TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_2gc_p; + *TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_2gc_n; + *TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_2gd_p; + *TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_2gd_n; + } + } else if (36 <= channel && channel <= 64) { + *TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_5gc_p[0]; + *TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_5gc_n[0]; + *TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_5gd_p[0]; + *TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_5gd_n[0]; + } else if (100 <= channel && channel <= 144) { + *TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_5gc_p[1]; + *TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_5gc_n[1]; + *TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_5gd_p[1]; + *TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_5gd_n[1]; + } else if (149 <= channel && channel <= 173) { + *TemperatureUP_C = prf_calibrate_info->delta_swing_table_idx_5gc_p[2]; + *TemperatureDOWN_C = prf_calibrate_info->delta_swing_table_idx_5gc_n[2]; + *TemperatureUP_D = prf_calibrate_info->delta_swing_table_idx_5gd_p[2]; + *TemperatureDOWN_D = prf_calibrate_info->delta_swing_table_idx_5gd_n[2]; + } else { + *TemperatureUP_C = (u8*)delta_swing_table_idx_2ga_p_8188e; + *TemperatureDOWN_C = (u8*)delta_swing_table_idx_2ga_n_8188e; + *TemperatureUP_D = (u8*)delta_swing_table_idx_2ga_p_8188e; + *TemperatureDOWN_D = (u8*)delta_swing_table_idx_2ga_n_8188e; + } + + return; +} + +void configure_txpower_track_8814a( + struct txpwrtrack_cfg *pConfig + ) +{ + pConfig->swing_table_size_cck = CCK_TABLE_SIZE; + pConfig->swing_table_size_ofdm = OFDM_TABLE_SIZE; + pConfig->threshold_iqk = 8; + pConfig->average_thermal_num = AVG_THERMAL_NUM_8814A; + pConfig->rf_path_count = MAX_PATH_NUM_8814A; + pConfig->thermal_reg_addr = RF_T_METER_88E; + + pConfig->odm_tx_pwr_track_set_pwr = ODM_TxPwrTrackSetPwr8814A; + pConfig->do_iqk = DoIQK_8814A; + pConfig->phy_lc_calibrate = phy_lc_calibrate_8814a; + pConfig->get_delta_swing_table = GetDeltaSwingTable_8814A; + pConfig->get_delta_swing_table8814only = GetDeltaSwingTable_8814A_PathCD; +} + +VOID +_phy_lc_calibrate_8814a( + IN struct dm_struct * pDM_Odm, + IN BOOLEAN is2T + ) +{ + u32 /*RF_Amode=0, RF_Bmode=0,*/ LC_Cal = 0, tmp = 0, cnt; + + //Check continuous TX and Packet TX + u32 reg0x914 = odm_read_4byte(pDM_Odm, rSingleTone_ContTx_Jaguar);; + + // Backup RF reg18. + + if((reg0x914 & 0x70000) == 0) + odm_write_1byte(pDM_Odm, REG_TXPAUSE, 0xFF); + + //3 3. Read RF reg18 + LC_Cal = odm_get_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + + //3 4. Set LC calibration begin bit15 + odm_set_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x1b126); + + ODM_delay_ms(100); + + for (cnt = 0; cnt < 100; cnt++) { + if (odm_get_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1) + break; + ODM_delay_ms(10); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt)); + + odm_set_rf_reg( pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x13126); + odm_set_rf_reg( pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, 0x13124); + //3 Restore original situation + if((reg0x914 & 70000) == 0) + odm_write_1byte(pDM_Odm, REG_TXPAUSE, 0x00); + + // Recover channel number + odm_set_rf_reg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal); + + //DbgPrint("Call %s\n", __FUNCTION__); +} + + +VOID +phy_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN struct dm_struct * pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta, + IN BOOLEAN is2T + ) +{ +} + + +VOID +phy_lc_calibrate_8814a( + IN PVOID pDM_VOID + ) +{ + BOOLEAN bStartContTx = FALSE, bSingleTone = FALSE, bCarrierSuppression = FALSE; + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PADAPTER pAdapter = pDM_Odm->adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#if (MP_DRIVER == 1) +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PMPT_CONTEXT pMptCtx = &(pAdapter->mpt_ctx); + bStartContTx = pMptCtx->bStartContTx; + bSingleTone = pMptCtx->bSingleTone; + bCarrierSuppression = pMptCtx->bCarrierSuppression; +#else + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); +#endif +#endif +#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n")); + +//#if (MP_DRIVER == 1) + _phy_lc_calibrate_8814a(pDM_Odm, TRUE); +//#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n")); + +} + +VOID +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN struct dm_struct * pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ) +{ + +} + + +VOID +PHY_DPCalibrate_8814A( + IN struct dm_struct * pDM_Odm + ) +{ +} + + +BOOLEAN +phy_QueryRFPathSwitch_8814A( + IN PADAPTER pAdapter + ) +{ + return TRUE; +} + + +BOOLEAN PHY_QueryRFPathSwitch_8814A( + IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#if DISABLE_BB_RF + return TRUE; +#endif + + return phy_QueryRFPathSwitch_8814A(pAdapter); +} + + +VOID _phy_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN struct dm_struct * pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ +} +VOID phy_set_rf_path_switch_8814a( +#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE)) + IN struct dm_struct * pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN boolean bMain + ) +{ +} + + + + + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h new file mode 100644 index 00000000000000..1f885b32e4c752 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_ce.h @@ -0,0 +1,112 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __HAL_PHY_RF_8814A_H__ +#define __HAL_PHY_RF_8814A_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define AVG_THERMAL_NUM_8814A 4 +#define RF_T_METER_8814A 0x42 + +#include "../halphyrf_ce.h" + +void configure_txpower_track_8814a( + struct txpwrtrack_cfg *pConfig + ); + +VOID +GetDeltaSwingTable_8814A( + IN PVOID pDM_VOID, + u8* *TemperatureUP_A, + u8* *TemperatureDOWN_A, + u8* *TemperatureUP_B, + u8* *TemperatureDOWN_B + ); + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PVOID pDM_VOID, + u8* *TemperatureUP_C, + u8* *TemperatureDOWN_C, + u8* *TemperatureUP_D, + u8* *TemperatureDOWN_D + ); + +VOID +ODM_TxPwrTrackSetPwr8814A( + IN PVOID pDM_VOID, + enum pwrtrack_method Method, + u8 RFPath, + u8 ChannelMappedIndex + ); + +u8 +CheckRFGainOffset( + struct dm_struct *pDM_Odm, + enum pwrtrack_method Method, + u8 RFPath + ); + +VOID +phy_iq_calibrate_8814a( + IN PVOID pDM_VOID, + boolean bReCovery + ); + +// +// LC calibrate +// +void +phy_lc_calibrate_8814a( + IN PVOID pDM_VOID + ); + +// +// AP calibrate +// +void +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + struct dm_struct * pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ); + + +VOID +PHY_DPCalibrate_8814A( + struct dm_struct * pDM_Odm + ); + + +VOID phy_set_rf_path_switch_8814a( +#if ((DM_ODM_SUPPORT_TYPE & ODM_AP) || (DM_ODM_SUPPORT_TYPE == ODM_CE)) + struct dm_struct * pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + boolean bMain + ); + + +#endif // #ifndef __HAL_PHY_RF_8188E_H__ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c new file mode 100644 index 00000000000000..eb91c4d8af7aad --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.c @@ -0,0 +1,528 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8814A_SUPPORT == 1) + + +/*---------------------------Define Local Constant---------------------------*/ +// 2010/04/25 MH Define the max tx power tracking tx agc power. +#define ODM_TXPWRTRACK_MAX_IDX_8814A 6 + +/*---------------------------Define Local Constant---------------------------*/ + +//3============================================================ +//3 Tx Power Tracking +//3============================================================ + +// Add CheckRFGainOffset By YuChen to make sure that RF gain offset will not over upperbound 4'b1010 + +u1Byte +CheckRFGainOffset( + PDM_ODM_T pDM_Odm, + u1Byte RFPath + ) +{ + u1Byte UpperBound = 10; // 4'b1010 = 10 + u1Byte Final_RF_Index = 0; + BOOLEAN bPositive = FALSE; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + if( pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0) // check if RF_Index is positive or not + { + Final_RF_Index = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1; + bPositive = TRUE; + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive); + } + else + { + Final_RF_Index = (-1)*pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1; + bPositive = FALSE; + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive); + } + + if(bPositive == TRUE) + { + if(Final_RF_Index >= UpperBound) + { + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, UpperBound); //set RF Reg0x55 per path + return UpperBound; + } + else + { + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path + return Final_RF_Index; + } + } + else + { + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path + return Final_RF_Index; + + } + + return FALSE; + +} + + + + +VOID +ODM_TxPwrTrackSetPwr8814A( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath, + u1Byte ChannelMappedIndex + ) +{ + u1Byte Final_OFDM_Swing_Index = 0; + u1Byte Final_CCK_Swing_Index = 0; + u1Byte Final_RF_Index = 0; + u1Byte UpperBound = 10, TxScalingUpperBound = 28; // Upperbound = 4'b1010, TxScalingUpperBound = +2 dB + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + + if (Method == MIX_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pRFCalibrateInfo->DefaultOfdmIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", + pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath)); + + Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath])%2; + + Final_RF_Index = CheckRFGainOffset(pDM_Odm, RFPath); // check if Final_RF_Index >= 10 + + if((Final_RF_Index == UpperBound) && (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0)) // check BBSW is not over +2dB + { + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] - (UpperBound << 1)); + if(Final_OFDM_Swing_Index > TxScalingUpperBound) + Final_OFDM_Swing_Index = TxScalingUpperBound; + } + + switch(RFPath) + { + case ODM_RF_PATH_A: + + ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + case ODM_RF_PATH_B: + + ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + case ODM_RF_PATH_C: + + ODM_SetBBReg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + case ODM_RF_PATH_D: + + ODM_SetBBReg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + default: + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("Wrong Path name!!!! \n")); + + break; + } + + + } + + return; +} // ODM_TxPwrTrackSetPwr8814A + + +VOID +GetDeltaSwingTable_8814A( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_A, + OUT pu1Byte *TemperatureDOWN_A, + OUT pu1Byte *TemperatureUP_B, + OUT pu1Byte *TemperatureDOWN_B + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u1Byte TxRate = 0xFF; + u1Byte channel = pHalData->CurrentChannel; + + + if (pDM_Odm->mp_mode == TRUE) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (MP_DRIVER == 1) + PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #endif + } else { + u2Byte rate = *(pDM_Odm->pForcedDataRate); + + if (!rate) { /*auto rate*/ + if (rate != 0xFF) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + TxRate = HwRateToMRate(pDM_Odm->TxRate); + #endif + } + } else { /*force rate*/ + TxRate = (u1Byte)rate; + } + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); + + if (1 <= channel && channel <= 14) { + if (IS_CCK_RATE(TxRate)) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N; + } else { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N; + } + } else if (36 <= channel && channel <= 64) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0]; + } else if (100 <= channel && channel <= 144) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1]; + } else if (149 <= channel && channel <= 173) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2]; + } else { + *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + *TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + } + + + return; +} + + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_C, + OUT pu1Byte *TemperatureDOWN_C, + OUT pu1Byte *TemperatureUP_D, + OUT pu1Byte *TemperatureDOWN_D + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u1Byte TxRate = 0xFF; + u1Byte channel = pHalData->CurrentChannel; + + if (pDM_Odm->mp_mode == TRUE) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (MP_DRIVER == 1) + PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #endif + } else { + u2Byte rate = *(pDM_Odm->pForcedDataRate); + + if (!rate) { /*auto rate*/ + if (rate != 0xFF) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + TxRate = HwRateToMRate(pDM_Odm->TxRate); + #endif + } + } else { /*force rate*/ + TxRate = (u1Byte)rate; + } + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); + + + if ( 1 <= channel && channel <= 14) { + if (IS_CCK_RATE(TxRate)) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_N; + } else { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_N; + } + } else if (36 <= channel && channel <= 64) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[0]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[0]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[0]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[0]; + } else if (100 <= channel && channel <= 144) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[1]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[1]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[1]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[1]; + } else if (149 <= channel && channel <= 173) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[2]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[2]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[2]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[2]; + } else { + *TemperatureUP_C = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_C = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + *TemperatureUP_D = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_D = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + } + + + return; +} + +void ConfigureTxpowerTrack_8814A( + PTXPWRTRACK_CFG pConfig + ) +{ + pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE; + pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE; + pConfig->Threshold_IQK = 8; + pConfig->AverageThermalNum = AVG_THERMAL_NUM_8814A; + pConfig->RfPathCount = MAX_PATH_NUM_8814A; + pConfig->ThermalRegAddr = RF_T_METER_88E; + + pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr8814A; + pConfig->DoIQK = DoIQK_8814A; + pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8814A; + pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8814A; + pConfig->GetDeltaSwingTable8814only = GetDeltaSwingTable_8814A_PathCD; +} + +VOID +phy_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm, + IN BOOLEAN is2T + ) +{ + u4Byte LC_Cal = 0, cnt; + + //Check continuous TX and Packet TX + u4Byte reg0x914 = ODM_Read4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar);; + + // Backup RF reg18. + LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + + if((reg0x914 & 0x70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0xFF); + + //3 3. Read RF reg18 + LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + + //3 4. Set LC calibration begin bit15 + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal|0x08000); + + ODM_delay_ms(100); + + for (cnt = 0; cnt < 100; cnt++) { + if (ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1) + break; + ODM_delay_ms(10); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt)); + + + + //3 Restore original situation + if((reg0x914 & 70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0x00); + + // Recover channel number + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal); + + DbgPrint("Call %s\n", __FUNCTION__); +} + + +VOID +phy_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta, + IN BOOLEAN is2T + ) +{ +} + + +VOID +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ) +{ + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PADAPTER pAdapter = pDM_Odm->Adapter; + +#if (MP_DRIVER == 1) +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); +#else + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); +#endif +#endif +#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n")); + +//#if (MP_DRIVER == 1) + phy_LCCalibrate_8814A(pDM_Odm, TRUE); +//#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n")); + +} + +VOID +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ) +{ + +} + + +VOID +PHY_DPCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ) +{ +} + + +BOOLEAN +phy_QueryRFPathSwitch_8814A( + IN PADAPTER pAdapter + ) +{ + return TRUE; +} + + +BOOLEAN PHY_QueryRFPathSwitch_8814A( + IN PADAPTER pAdapter + ) +{ + +#if DISABLE_BB_RF + return TRUE; +#endif + + return phy_QueryRFPathSwitch_8814A(pAdapter); +} + + +VOID phy_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ +} +VOID PHY_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain + ) +{ +} + + + + +#else /* (RTL8814A_SUPPORT == 0)*/ +VOID +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ){} + +VOID +PHY_IQCalibrate_8814A( + IN PDM_ODM_T pDM_Odm, + IN BOOLEAN bReCovery + ){} +#endif /* (RTL8814A_SUPPORT == 0)*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h new file mode 100644 index 00000000000000..658d6f063c0fec --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_8814a_win.h @@ -0,0 +1,106 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __HAL_PHY_RF_8814A_H__ +#define __HAL_PHY_RF_8814A_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define AVG_THERMAL_NUM_8814A 4 + +#include "halphyrf_win.h" + +void ConfigureTxpowerTrack_8814A( + PTXPWRTRACK_CFG pConfig + ); + +VOID +GetDeltaSwingTable_8814A( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_A, + OUT pu1Byte *TemperatureDOWN_A, + OUT pu1Byte *TemperatureUP_B, + OUT pu1Byte *TemperatureDOWN_B + ); + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_C, + OUT pu1Byte *TemperatureDOWN_C, + OUT pu1Byte *TemperatureUP_D, + OUT pu1Byte *TemperatureDOWN_D + ); + + +VOID +ODM_TxPwrTrackSetPwr8814A( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath, + u1Byte ChannelMappedIndex + ); + +u1Byte +CheckRFGainOffset( + PDM_ODM_T pDM_Odm, + u1Byte RFPath + ); + + +// +// LC calibrate +// +void +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ); + +// +// AP calibrate +// +void +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ); + + +VOID +PHY_DPCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ); + + +VOID PHY_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain + ); + + +#endif // #ifndef __HAL_PHY_RF_8188E_H__ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c new file mode 100644 index 00000000000000..e019df35a9bba6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.c @@ -0,0 +1,557 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "mp_precomp.h" +#include "../../phydm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ + + +/*---------------------------Define Local Constant---------------------------*/ + + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void DoIQK_8814A( + void* pDM_VOID, + u8 DeltaThermalIndex, + u8 ThermalValue, + u8 Threshold + ) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + + odm_reset_iqk_result(pDM_Odm); + + pDM_Odm->rf_calibrate_info.thermal_value_iqk= ThermalValue; + + phy_iq_calibrate_8814a(pDM_Odm, FALSE); + +} +#else +/*Originally pConfig->DoIQK is hooked PHY_IQCalibrate_8814A, but DoIQK_8814A and PHY_IQCalibrate_8814A have different arguments*/ +void DoIQK_8814A( + void* pDM_VOID, + u8 DeltaThermalIndex, + u8 ThermalValue, + u8 Threshold + ) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + boolean bReCovery = (boolean) DeltaThermalIndex; + + phy_iq_calibrate_8814a(pDM_Odm, bReCovery); +} +#endif +//1 7. IQK + +VOID +_IQK_BackupMacBB_8814A( + IN struct dm_struct * pDM_Odm, + u32* MAC_backup, + u32* BB_backup, + u32* Backup_MAC_REG, + u32* Backup_BB_REG + ) +{ + u32 i; + //save MACBB default value + for (i = 0; i < MAC_REG_NUM_8814; i++){ + MAC_backup[i] = odm_read_4byte(pDM_Odm, Backup_MAC_REG[i]); + } + for (i = 0; i < BB_REG_NUM_8814; i++){ + BB_backup[i] = odm_read_4byte(pDM_Odm, Backup_BB_REG[i]); + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BackupMacBB Success!!!!\n")); +} + + +VOID +_IQK_BackupRF_8814A( + IN struct dm_struct * pDM_Odm, + u32 RF_backup[][4], + u32* Backup_RF_REG + ) +{ + u32 i; + //Save RF Parameters + for (i = 0; i < RF_REG_NUM_8814; i++){ + RF_backup[i][RF_PATH_A] = odm_get_rf_reg(pDM_Odm, RF_PATH_A, Backup_RF_REG[i], bRFRegOffsetMask); + RF_backup[i][RF_PATH_B] = odm_get_rf_reg(pDM_Odm, RF_PATH_B, Backup_RF_REG[i], bRFRegOffsetMask); + RF_backup[i][RF_PATH_C] = odm_get_rf_reg(pDM_Odm, RF_PATH_C, Backup_RF_REG[i], bRFRegOffsetMask); + RF_backup[i][RF_PATH_D] = odm_get_rf_reg(pDM_Odm, RF_PATH_D, Backup_RF_REG[i], bRFRegOffsetMask); + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BackupRF Success!!!!\n")); +} + + +VOID +_IQK_AFESetting_8814A( + IN struct dm_struct * pDM_Odm, + IN boolean Do_IQK + ) +{ + if(Do_IQK) + { + // IQK AFE Setting RX_WAIT_CCA mode + odm_write_4byte(pDM_Odm, 0xc60, 0x0e808003); + odm_write_4byte(pDM_Odm, 0xe60, 0x0e808003); + odm_write_4byte(pDM_Odm, 0x1860, 0x0e808003); + odm_write_4byte(pDM_Odm, 0x1a60, 0x0e808003); + odm_set_bb_reg(pDM_Odm, 0x90c, BIT(13), 0x1); + + odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x3); + odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x0); + + odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x1); + odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x0); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AFE IQK mode Success!!!!\n")); + } + else + { + odm_write_4byte(pDM_Odm, 0xc60, 0x07808003); + odm_write_4byte(pDM_Odm, 0xe60, 0x07808003); + odm_write_4byte(pDM_Odm, 0x1860, 0x07808003); + odm_write_4byte(pDM_Odm, 0x1a60, 0x07808003); + odm_set_bb_reg(pDM_Odm, 0x90c, BIT(13), 0x1); + + odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x3); + odm_set_bb_reg(pDM_Odm, 0x764, BIT(10)|BIT(9), 0x0); + + odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x1); + odm_set_bb_reg(pDM_Odm, 0x804, BIT(2), 0x0); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AFE Normal mode Success!!!!\n")); + } + +} + + +VOID +_IQK_RestoreMacBB_8814A( + IN struct dm_struct * pDM_Odm, + u32* MAC_backup, + u32* BB_backup, + u32* Backup_MAC_REG, + u32* Backup_BB_REG + ) +{ + u32 i; + //Reload MacBB Parameters + for (i = 0; i < MAC_REG_NUM_8814; i++){ + odm_write_4byte(pDM_Odm, Backup_MAC_REG[i], MAC_backup[i]); + } + for (i = 0; i < BB_REG_NUM_8814; i++){ + odm_write_4byte(pDM_Odm, Backup_BB_REG[i], BB_backup[i]); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreMacBB Success!!!!\n")); +} + +VOID +_IQK_RestoreRF_8814A( + IN struct dm_struct * pDM_Odm, + u32* Backup_RF_REG, + u32 RF_backup[][4] + ) +{ + u32 i; + + odm_set_rf_reg(pDM_Odm, RF_PATH_A, 0xef, bRFRegOffsetMask, 0x0); + odm_set_rf_reg(pDM_Odm, RF_PATH_B, 0xef, bRFRegOffsetMask, 0x0); + odm_set_rf_reg(pDM_Odm, RF_PATH_C, 0xef, bRFRegOffsetMask, 0x0); + odm_set_rf_reg(pDM_Odm, RF_PATH_D, 0xef, bRFRegOffsetMask, 0x0); + + for (i = 0; i < RF_REG_NUM_8814; i++){ + odm_set_rf_reg(pDM_Odm, RF_PATH_A, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_A]); + odm_set_rf_reg(pDM_Odm, RF_PATH_B, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_B]); + odm_set_rf_reg(pDM_Odm, RF_PATH_C, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_C]); + odm_set_rf_reg(pDM_Odm, RF_PATH_D, Backup_RF_REG[i], bRFRegOffsetMask, RF_backup[i][RF_PATH_D]); + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("RestoreRF Success!!!!\n")); + +} + +VOID +PHY_ResetIQKResult_8814A( + IN struct dm_struct * pDM_Odm +) +{ + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000); + odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000); + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000002); + odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000); + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000004); + odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000); + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000006); + odm_write_4byte(pDM_Odm, 0x1b38, 0x20000000); + odm_write_4byte(pDM_Odm, 0xc10, 0x100); + odm_write_4byte(pDM_Odm, 0xe10, 0x100); + odm_write_4byte(pDM_Odm, 0x1810, 0x100); + odm_write_4byte(pDM_Odm, 0x1a10, 0x100); +} + +VOID +_IQK_ResetNCTL_8814A( + IN struct dm_struct * pDM_Odm +) +{ + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000); + odm_write_4byte(pDM_Odm, 0x1b80, 0x00000006); + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000); + odm_write_4byte(pDM_Odm, 0x1b80, 0x00000002); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ResetNCTL Success!!!!\n")); +} + +VOID +_IQK_ConfigureMAC_8814A( + IN struct dm_struct * pDM_Odm + ) +{ + // ========MAC register setting======== + odm_write_1byte(pDM_Odm, 0x522, 0x3f); + odm_set_bb_reg(pDM_Odm, 0x550, BIT(11)|BIT(3), 0x0); + odm_write_1byte(pDM_Odm, 0x808, 0x00); // RX ante off + odm_set_bb_reg(pDM_Odm, 0x838, 0xf, 0xe); // CCA off + odm_set_bb_reg(pDM_Odm, 0xa14, BIT(9)|BIT(8), 0x3); // CCK RX Path off + odm_write_4byte(pDM_Odm, 0xcb0, 0x77777777); + odm_write_4byte(pDM_Odm, 0xeb0, 0x77777777); + odm_write_4byte(pDM_Odm, 0x18b4, 0x77777777); + odm_write_4byte(pDM_Odm, 0x1ab4, 0x77777777); + odm_set_bb_reg(pDM_Odm, 0x1abc, 0x0ff00000, 0x77); + /*by YN*/ + odm_set_bb_reg(pDM_Odm, 0xcbc, 0xf, 0x0); +} + +VOID +_LOK_One_Shot( + IN void* pDM_VOID +) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + struct dm_iqk_info * pIQK_info = &pDM_Odm->IQK_info; + u8 Path = 0, delay_count = 0, ii; + boolean LOK_notready = FALSE; + u32 LOK_temp1 = 0, LOK_temp2 = 0; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("============ LOK ============\n")); + for(Path =0; Path <=3; Path++){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("==========S%d LOK ==========\n", Path)); + + odm_set_bb_reg(pDM_Odm, 0x9a4, BIT(21)|BIT(20), Path); // ADC Clock source + odm_write_4byte(pDM_Odm, 0x1b00, (0xf8000001|(1<<(4+Path)))); // LOK: CMD ID = 0 {0xf8000011, 0xf8000021, 0xf8000041, 0xf8000081} + ODM_delay_ms(LOK_delay); + delay_count = 0; + LOK_notready = TRUE; + + while(LOK_notready){ + LOK_notready = (boolean) odm_get_bb_reg(pDM_Odm, 0x1b00, BIT(0)); + ODM_delay_ms(1); + delay_count++; + if(delay_count >= 10){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, + ("S%d LOK timeout!!!\n", Path)); + + _IQK_ResetNCTL_8814A(pDM_Odm); + break; + } + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("S%d ==> delay_count = 0x%d\n", Path, delay_count)); + + if(!LOK_notready){ + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000|(Path<<1)); + odm_write_4byte(pDM_Odm, 0x1bd4, 0x003f0001); + LOK_temp2 = (odm_get_bb_reg(pDM_Odm, 0x1bfc, 0x003e0000)+0x10)&0x1f; + LOK_temp1 = (odm_get_bb_reg(pDM_Odm, 0x1bfc, 0x0000003e)+0x10)&0x1f; + + for(ii = 1; ii<5; ii++){ + LOK_temp1 = LOK_temp1 + ((LOK_temp1 & BIT(4-ii))<<(ii*2)); + LOK_temp2 = LOK_temp2 + ((LOK_temp2 & BIT(4-ii))<<(ii*2)); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("LOK_temp1 = 0x%x, LOK_temp2 = 0x%x\n", LOK_temp1>>4, LOK_temp2>>4)); + + odm_set_rf_reg(pDM_Odm, Path, 0x8, 0x07c00, LOK_temp1>>4); + odm_set_rf_reg(pDM_Odm, Path, 0x8, 0xf8000, LOK_temp2>>4); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("==>S%d fill LOK\n", Path)); + + } + else{ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("==>S%d LOK Fail!!!\n", Path)); + odm_set_rf_reg(pDM_Odm, Path, 0x8, bRFRegOffsetMask, 0x08400); + } + pIQK_info->lok_fail[Path] = LOK_notready; + + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, + ("LOK0_notready = %d, LOK1_notready = %d, LOK2_notready = %d, LOK3_notready = %d\n", + pIQK_info->lok_fail[0], pIQK_info->lok_fail[1], pIQK_info->lok_fail[2], pIQK_info->lok_fail[3])); +} + +VOID +_IQK_One_Shot( + IN void* pDM_VOID +) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + struct dm_iqk_info * pIQK_info = &pDM_Odm->IQK_info; + u8 Path = 0, delay_count = 0, cal_retry = 0, idx; + boolean notready = TRUE, fail = TRUE; + u32 IQK_CMD; + u16 IQK_Apply[4] = {0xc94, 0xe94, 0x1894, 0x1a94}; + + for(idx = 0; idx <= 1; idx++){ // ii = 0:TXK , 1: RXK + + if(idx == TX_IQK){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, + ("============ WBTXIQK ============\n")); + } + else if(idx == RX_IQK){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, + ("============ WBRXIQK ============\n")); + } + + for(Path =0; Path <=3; Path++){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("==========S%d IQK ==========\n", Path)); + cal_retry = 0; + fail = TRUE; + while(fail){ + odm_set_bb_reg(pDM_Odm, 0x9a4, BIT(21)|BIT(20), Path); + if(idx == TX_IQK){ + IQK_CMD = (0xf8000001|(*pDM_Odm->band_width+3)<<8|(1<<(4+Path))); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("TXK_Trigger = 0x%x\n", IQK_CMD)); + /* + {0xf8000311, 0xf8000321, 0xf8000341, 0xf8000381} ==> 20 WBTXK (CMD = 3) + {0xf8000411, 0xf8000421, 0xf8000441, 0xf8000481} ==> 40 WBTXK (CMD = 4) + {0xf8000511, 0xf8000521, 0xf8000541, 0xf8000581} ==> 80 WBTXK (CMD = 5) + */ + odm_write_4byte(pDM_Odm, 0x1b00, IQK_CMD); + } + else if(idx == RX_IQK){ + IQK_CMD = (0xf8000001|(9-*pDM_Odm->band_width)<<8|(1<<(4+Path))); + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("TXK_Trigger = 0x%x\n", IQK_CMD)); + /* + {0xf8000911, 0xf8000921, 0xf8000941, 0xf8000981} ==> 20 WBRXK (CMD = 9) + {0xf8000811, 0xf8000821, 0xf8000841, 0xf8000881} ==> 40 WBRXK (CMD = 8) + {0xf8000711, 0xf8000721, 0xf8000741, 0xf8000781} ==> 80 WBRXK (CMD = 7) + */ + odm_write_4byte(pDM_Odm, 0x1b00, IQK_CMD); + } + + ODM_delay_ms(WBIQK_delay); + + delay_count = 0; + notready = TRUE; + while(notready){ + notready = (boolean) odm_get_bb_reg(pDM_Odm, 0x1b00, BIT(0)); + if(!notready){ + fail = (boolean) odm_get_bb_reg(pDM_Odm, 0x1b08, BIT(26)); + break; + } + ODM_delay_ms(1); + delay_count++; + if(delay_count >= 20){ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, + ("S%d IQK timeout!!!\n", Path)); + _IQK_ResetNCTL_8814A(pDM_Odm); + break; + } + } + if(fail) + cal_retry++; + if(cal_retry >3 ) + break; + + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("S%d ==> 0x1b00 = 0x%x\n", Path, odm_read_4byte(pDM_Odm, 0x1b00))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("S%d ==> 0x1b08 = 0x%x\n", Path, odm_read_4byte(pDM_Odm, 0x1b08))); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("S%d ==> delay_count = 0x%d, cal_retry = %x\n", Path, delay_count, cal_retry)); + + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000000|(Path<<1)); + if(!fail){ + if(idx == TX_IQK){ + pIQK_info->iqc_matrix[idx][Path] = odm_read_4byte(pDM_Odm, 0x1b38); + } + else if(idx == RX_IQK){ + odm_write_4byte(pDM_Odm, 0x1b3c, 0x20000000); + pIQK_info->iqc_matrix[idx][Path] = odm_read_4byte(pDM_Odm, 0x1b3c); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_TRACE, + ("S%d_IQC = 0x%x\n", Path, pIQK_info->iqc_matrix[idx][Path])); + + } + + if(idx == RX_IQK){ + if(pIQK_info->iqk_fail[TX_IQK][Path] == FALSE) // TXIQK success in RXIQK + odm_write_4byte( pDM_Odm, 0x1b38, pIQK_info->iqc_matrix[TX_IQK][Path]); + else + odm_set_bb_reg(pDM_Odm, IQK_Apply[Path], BIT0, 0x0); + + if(fail) // RXIQK Fail + odm_set_bb_reg(pDM_Odm, IQK_Apply[Path], (BIT11|BIT10), 0x0); + } + + pIQK_info->iqk_fail[idx][Path] = fail; + + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, + ("IQK0_fail = %d, IQK1_fail = %d, IQK2_fail = %d, IQK3_fail = %d\n", + pIQK_info->iqk_fail[idx][0], pIQK_info->iqk_fail[idx][1], pIQK_info->iqk_fail[idx][2], pIQK_info->iqk_fail[idx][3])); + } +} + +VOID +_IQK_Tx_8814A( + IN struct dm_struct * pDM_Odm, + IN u8 chnlIdx + ) +{ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("BandWidth = %d, ExtPA2G = %d\n", *pDM_Odm->p_band_width, pDM_Odm->ext_pa)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Interface = %d, pBandType = %d\n", pDM_Odm->support_interface, *pDM_Odm->p_band_type)); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("CutVersion = %x\n", pDM_Odm->cut_version)); + + odm_set_rf_reg(pDM_Odm, RF_PATH_A, 0x58, BIT(19), 0x1); + odm_set_rf_reg(pDM_Odm, RF_PATH_B, 0x58, BIT(19), 0x1); + odm_set_rf_reg(pDM_Odm, RF_PATH_C, 0x58, BIT(19), 0x1); + odm_set_rf_reg(pDM_Odm, RF_PATH_D, 0x58, BIT(19), 0x1); + + odm_set_bb_reg(pDM_Odm, 0xc94, (BIT11|BIT10|BIT0), 0x401); + odm_set_bb_reg(pDM_Odm, 0xe94, (BIT11|BIT10|BIT0), 0x401); + odm_set_bb_reg(pDM_Odm, 0x1894, (BIT11|BIT10|BIT0), 0x401); + odm_set_bb_reg(pDM_Odm, 0x1a94, (BIT11|BIT10|BIT0), 0x401); + + if(*pDM_Odm->band_type == ODM_BAND_5G) + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000ff1); + else + odm_write_4byte(pDM_Odm, 0x1b00, 0xf8000ef1); + + ODM_delay_ms(1); + + odm_write_4byte(pDM_Odm, 0x810, 0x20101063); + odm_write_4byte(pDM_Odm, 0x90c, 0x0B00C000); + + _LOK_One_Shot(pDM_Odm); + _IQK_One_Shot(pDM_Odm); + +} + +VOID +_phy_iq_calibrate_8814a( + IN struct dm_struct * pDM_Odm, + IN u8 Channel + ) +{ + + u32 MAC_backup[MAC_REG_NUM_8814], BB_backup[BB_REG_NUM_8814], RF_backup[RF_REG_NUM_8814][4]; + u32 Backup_MAC_REG[MAC_REG_NUM_8814] = {0x520, 0x550}; + u32 Backup_BB_REG[BB_REG_NUM_8814] = {0xa14, 0x808, 0x838, 0x90c, 0x810, 0xcb0, 0xeb0, + 0x18b4, 0x1ab4, 0x1abc, 0x9a4, 0x764, 0xcbc}; + u32 Backup_RF_REG[RF_REG_NUM_8814] = {0x0, 0x8f}; + u8 chnlIdx = odm_get_right_chnl_place_for_iqk(Channel); + + _IQK_BackupMacBB_8814A(pDM_Odm, MAC_backup, BB_backup, Backup_MAC_REG, Backup_BB_REG); + _IQK_AFESetting_8814A(pDM_Odm,TRUE); + _IQK_BackupRF_8814A(pDM_Odm, RF_backup, Backup_RF_REG); + _IQK_ConfigureMAC_8814A(pDM_Odm); + _IQK_Tx_8814A(pDM_Odm, chnlIdx); + _IQK_ResetNCTL_8814A(pDM_Odm); //for 3-wire to BB use + _IQK_AFESetting_8814A(pDM_Odm,FALSE); + _IQK_RestoreMacBB_8814A(pDM_Odm, MAC_backup, BB_backup, Backup_MAC_REG, Backup_BB_REG); + _IQK_RestoreRF_8814A(pDM_Odm, Backup_RF_REG, RF_backup); +} + +/*IQK version:v1.1*/ +/*update 0xcbc setting*/ + + +VOID +phy_iq_calibrate_8814a( + IN void* pDM_VOID, + IN boolean bReCovery + ) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PADAPTER pAdapter = pDM_Odm->adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + #if (MP_DRIVER == 1) + #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); + #else// (DM_ODM_SUPPORT_TYPE == ODM_CE) + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); + #endif + #endif//(MP_DRIVER == 1) + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN)) + if (odm_check_power_status(pAdapter) == FALSE) + return; + #endif + + #if MP_DRIVER == 1 + if( pMptCtx->is_single_tone || pMptCtx->is_carrier_suppression ) + return; + #endif + +#endif + #if (DM_ODM_SUPPORT_TYPE & (ODM_CE)) + _phy_iq_calibrate_8814a(pDM_Odm, pHalData->current_channel); + /*DBG_871X("%s,%d, do IQK %u ms\n", __func__, __LINE__, rtw_get_passing_time_ms(time_iqk));*/ + #else + _phy_iq_calibrate_8814a(pDM_Odm, *pDM_Odm->pChannel); + #endif +} + +VOID +PHY_IQCalibrate_8814A_Init( + IN void* pDM_VOID + ) +{ + struct dm_struct * pDM_Odm = (struct dm_struct *)pDM_VOID; + struct dm_iqk_info *pIQK_info = &pDM_Odm->IQK_info; + u8 ii, jj; + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("=====>PHY_IQCalibrate_8814A_Init\n")); + for(jj = 0; jj < 2; jj++){ + for(ii = 0; ii < NUM; ii++){ + pIQK_info->lok_fail[ii] = TRUE; + pIQK_info->iqk_fail[jj][ii] = TRUE; + pIQK_info->iqc_matrix[jj][ii] = 0x20000000; + } + } +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h new file mode 100644 index 00000000000000..15d9cf0377a617 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8814a/halrf_iqk_8814a.h @@ -0,0 +1,58 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __PHYDM_IQK_8814A_H__ +#define __PHYDM_IQK_8814A_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define MAC_REG_NUM_8814 2 +#define BB_REG_NUM_8814 13 +#define RF_REG_NUM_8814 2 +/*---------------------------End Define Parameters-------------------------------*/ + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +VOID +DoIQK_8814A( + PVOID pDM_VOID, + u8 DeltaThermalIndex, + u8 ThermalValue, + u8 Threshold + ); +#else +VOID +DoIQK_8814A( + PVOID pDM_VOID, + u8 DeltaThermalIndex, + u8 ThermalValue, + u8 Threshold + ); +#endif + +VOID +phy_iq_calibrate_8814a( + IN PVOID pDM_VOID, + boolean bReCovery + ); + +VOID +PHY_IQCalibrate_8814A_Init( + IN PVOID pDM_VOID + ); + + #endif /* #ifndef __PHYDM_IQK_8814A_H__*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c new file mode 100644 index 00000000000000..ef0f72c5618450 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.c @@ -0,0 +1,313 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "mp_precomp.h" +#include "../../phydm_precomp.h" + +/*---------------------------Define Local Constant---------------------------*/ +/* 2010/04/25 MH Define the max tx power tracking tx agc power. */ +#define ODM_TXPWRTRACK_MAX_IDX8821A 6 + +/*---------------------------Define Local Constant---------------------------*/ + +/* 3 ============================================================ + * 3 Tx Power Tracking + * 3 ============================================================ */ +void halrf_rf_lna_setting_8821a( + struct dm_struct *dm, + enum halrf_lna_set type +) +{ + /*phydm_disable_lna*/ + if (type == HALRF_LNA_DISABLE) { + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f); + odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb09b); /*disable LNA*/ + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + } else if (type == HALRF_LNA_ENABLE) { + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f); + odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb0bb); /*disable LNA*/ + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + } +} +void +odm_tx_pwr_track_set_pwr8821a( + void *dm_void, + enum pwrtrack_method method, + u8 rf_path, + u8 channel_mapped_index +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter); + + u8 pwr_tracking_limit = 26; /* +1.0dB */ + u8 tx_rate = 0xFF; + u8 final_ofdm_swing_index = 0; + u8 final_cck_swing_index = 0; + u8 i = 0; + u32 final_bb_swing_idx[1]; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct _hal_rf_ *rf = &(dm->rf_table); + + if (*(dm->mp_mode) == true) { +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#if (MP_DRIVER == 1) + PMPT_CONTEXT p_mpt_ctx = &(adapter->mpt_ctx); + + tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); +#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) +#ifdef CONFIG_MP_INCLUDED + PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx); + + tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); +#endif +#endif +#endif + } else { + u16 rate = *(dm->forced_data_rate); + + if (!rate) { /*auto rate*/ +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + if (dm->number_linked_client != 0) + tx_rate = hw_rate_to_m_rate(dm->tx_rate); + else + tx_rate = rf->p_rate_index; +#endif + } else /*force rate*/ + tx_rate = (u8)rate; + } + + //PHYDM_DBG(dm, DBG_COMP_MCC, "Power Tracking tx_rate=0x%X\n", tx_rate); + //PHYDM_DBG(dm, DBG_COMP_MCC, "===>odm_tx_pwr_track_set_pwr8821a\n"); + + if (tx_rate != 0xFF) { + /* 2 CCK */ + if (((tx_rate >= MGN_1M) && (tx_rate <= MGN_5_5M)) || (tx_rate == MGN_11M)) + pwr_tracking_limit = 32; /* +4dB */ + /* 2 OFDM */ + else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M)) + pwr_tracking_limit = 30; /* +3dB */ + else if (tx_rate == MGN_54M) + pwr_tracking_limit = 28; /* +2dB */ + /* 2 HT */ + else if ((tx_rate >= MGN_MCS0) && (tx_rate <= MGN_MCS2)) /* QPSK/BPSK */ + pwr_tracking_limit = 34; /* +5dB */ + else if ((tx_rate >= MGN_MCS3) && (tx_rate <= MGN_MCS4)) /* 16QAM */ + pwr_tracking_limit = 30; /* +3dB */ + else if ((tx_rate >= MGN_MCS5) && (tx_rate <= MGN_MCS7)) /* 64QAM */ + pwr_tracking_limit = 28; /* +2dB */ + + /* 2 VHT */ + else if ((tx_rate >= MGN_VHT1SS_MCS0) && (tx_rate <= MGN_VHT1SS_MCS2)) /* QPSK/BPSK */ + pwr_tracking_limit = 34; /* +5dB */ + else if ((tx_rate >= MGN_VHT1SS_MCS3) && (tx_rate <= MGN_VHT1SS_MCS4)) /* 16QAM */ + pwr_tracking_limit = 30; /* +3dB */ + else if ((tx_rate >= MGN_VHT1SS_MCS5) && (tx_rate <= MGN_VHT1SS_MCS6)) /* 64QAM */ + pwr_tracking_limit = 28; /* +2dB */ + else if (tx_rate == MGN_VHT1SS_MCS7) /* 64QAM */ + pwr_tracking_limit = 26; /* +1dB */ + else if (tx_rate == MGN_VHT1SS_MCS8) /* 256QAM */ + pwr_tracking_limit = 24; /* +0dB */ + else if (tx_rate == MGN_VHT1SS_MCS9) /* 256QAM */ + pwr_tracking_limit = 22; /* -1dB */ + + else + pwr_tracking_limit = 24; + } + //PHYDM_DBG(dm, DBG_COMP_MCC, "tx_rate=0x%x, pwr_tracking_limit=%d\n", tx_rate, pwr_tracking_limit); + + if (method == BBSWING) { + if (rf_path == RF_PATH_A) { + final_bb_swing_idx[RF_PATH_A] = (dm->rf_calibrate_info.OFDM_index[RF_PATH_A] > pwr_tracking_limit) ? pwr_tracking_limit : dm->rf_calibrate_info.OFDM_index[RF_PATH_A]; + /*PHYDM_DBG(dm, DBG_COMP_MCC, "dm->rf_calibrate_info.OFDM_index[RF_PATH_A]=%d, dm->RealBbSwingIdx[RF_PATH_A]=%d\n", + dm->rf_calibrate_info.OFDM_index[RF_PATH_A], final_bb_swing_idx[RF_PATH_A]);*/ + + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[final_bb_swing_idx[RF_PATH_A]]); + } + } else if (method == MIX_MODE) { + /*PHYDM_DBG(dm, DBG_COMP_MCC, "cali_info->default_ofdm_index=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n", + cali_info->default_ofdm_index, cali_info->absolute_ofdm_swing_idx[rf_path], rf_path);*/ + + final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; + final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path]; + + if (rf_path == RF_PATH_A) { + if (final_ofdm_swing_index > pwr_tracking_limit) { /*BBSwing higher then Limit*/ + cali_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit; + cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit; + + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[pwr_tracking_limit]); + + cali_info->modify_tx_agc_flag_path_a = true; + + phy_set_tx_power_level_by_path(adapter, *dm->channel, RF_PATH_A); + + //PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit, cali_info->remnant_ofdm_swing_idx[rf_path]); + } else if (final_ofdm_swing_index <= 0) { + cali_info->remnant_cck_swing_idx = final_cck_swing_index; + cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index; + + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[0]); + + cali_info->modify_tx_agc_flag_path_a = true; + + phy_set_tx_power_level_by_path(adapter, *dm->channel, RF_PATH_A); + + //PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", cali_info->remnant_ofdm_swing_idx[rf_path]); + } else { + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[final_ofdm_swing_index]); + + //PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index); + + if (cali_info->modify_tx_agc_flag_path_a) { /*If tx_agc has changed, reset tx_agc again*/ + cali_info->remnant_cck_swing_idx = 0; + cali_info->remnant_ofdm_swing_idx[rf_path] = 0; + + phy_set_tx_power_level_by_path(adapter, *dm->channel, RF_PATH_A); + + cali_info->modify_tx_agc_flag_path_a = false; + + PHYDM_DBG(dm, DBG_COMP_MCC, "******Path_A dm->Modify_TxAGC_Flag = false\n"); + } + } + } + } else + return; +} /* odm_TxPwrTrackSetPwr88E */ + +void +get_delta_swing_table_8821a( + void *dm_void, + u8 **temperature_up_a, + u8 **temperature_down_a, + u8 **temperature_up_b, + u8 **temperature_down_b +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + struct _ADAPTER *adapter = dm->adapter; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + struct _hal_rf_ *rf = &(dm->rf_table); + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter); + u8 tx_rate = 0xFF; + u8 channel = *dm->channel; + + if (*(dm->mp_mode) == true) { +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#if (MP_DRIVER == 1) + PMPT_CONTEXT p_mpt_ctx = &(adapter->mpt_ctx); + + tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); +#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) +#ifdef CONFIG_MP_INCLUDED + PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx); + + tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); +#endif +#endif +#endif + } else { + u16 rate = *(dm->forced_data_rate); + + if (!rate) { /*auto rate*/ +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + if (dm->number_linked_client != 0) + tx_rate = hw_rate_to_m_rate(dm->tx_rate); + else + tx_rate = rf->p_rate_index; +#endif + } else /*force rate*/ + tx_rate = (u8)rate; + } + + //PHYDM_DBG(dm, DBG_COMP_MCC, "Power Tracking tx_rate=0x%X\n", tx_rate); + + + if (1 <= channel && channel <= 14) { + if (IS_CCK_RATE(tx_rate)) { + *temperature_up_a = cali_info->delta_swing_table_idx_2g_cck_a_p; + *temperature_down_a = cali_info->delta_swing_table_idx_2g_cck_a_n; + *temperature_up_b = cali_info->delta_swing_table_idx_2g_cck_b_p; + *temperature_down_b = cali_info->delta_swing_table_idx_2g_cck_b_n; + } else { + *temperature_up_a = cali_info->delta_swing_table_idx_2ga_p; + *temperature_down_a = cali_info->delta_swing_table_idx_2ga_n; + *temperature_up_b = cali_info->delta_swing_table_idx_2gb_p; + *temperature_down_b = cali_info->delta_swing_table_idx_2gb_n; + } + } else if (36 <= channel && channel <= 64) { + *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[0]; + *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[0]; + *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[0]; + *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[0]; + } else if (100 <= channel && channel <= 144) { + *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[1]; + *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[1]; + *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[1]; + *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[1]; + } else if (149 <= channel && channel <= 177) { + *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[2]; + *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[2]; + *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[2]; + *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[2]; + } else { + *temperature_up_a = (u8 *)delta_swing_table_idx_2ga_p_8188e; + *temperature_down_a = (u8 *)delta_swing_table_idx_2ga_n_8188e; + *temperature_up_b = (u8 *)delta_swing_table_idx_2ga_p_8188e; + *temperature_down_b = (u8 *)delta_swing_table_idx_2ga_n_8188e; + } + + return; +} + +void configure_txpower_track_8821a( + struct txpwrtrack_cfg *config +) +{ + config->swing_table_size_cck = TXSCALE_TABLE_SIZE; + config->swing_table_size_ofdm = TXSCALE_TABLE_SIZE; + config->threshold_iqk = IQK_THRESHOLD; + config->average_thermal_num = AVG_THERMAL_NUM_8812A; + config->rf_path_count = MAX_PATH_NUM_8821A; + config->thermal_reg_addr = RF_T_METER_8812A; + + config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr8821a; + config->do_iqk = do_iqk_8821a; + config->phy_lc_calibrate = halrf_lck_trigger; + config->get_delta_swing_table = get_delta_swing_table_8821a; +} + +void +phy_lc_calibrate_8821a( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + phy_lc_calibrate_8812a(dm); +} diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_sreset.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h similarity index 51% rename from drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_sreset.h rename to drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h index ac5c64edd3453f..684852a77a6b94 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_sreset.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_ce.h @@ -12,13 +12,42 @@ * more details. * *****************************************************************************/ -#ifndef _RTL8710B_SRESET_H_ -#define _RTL8710B_SRESET_H_ -#include +#ifndef __HAL_PHY_RF_8821A_H__ +#define __HAL_PHY_RF_8821A_H__ -#ifdef DBG_CONFIG_ERROR_DETECT - extern void rtl8710b_sreset_xmit_status_check(_adapter *padapter); - extern void rtl8710b_sreset_linked_status_check(_adapter *padapter); -#endif -#endif +/*--------------------------Define Parameters-------------------------------*/ + +void configure_txpower_track_8821a( + struct txpwrtrack_cfg *config +); + +void +odm_tx_pwr_track_set_pwr8821a( + void *dm_void, + enum pwrtrack_method method, + u8 rf_path, + u8 channel_mapped_index +); + +void +phy_lc_calibrate_8821a( + void *dm_void +); + +void +get_delta_swing_table_8821a( + void *dm_void, + u8 **temperature_up_a, + u8 **temperature_down_a, + u8 **temperature_up_b, + u8 **temperature_down_b +); + +void +halrf_rf_lna_setting_8821a( + struct dm_struct *dm, + enum halrf_lna_set type +); + +#endif /* #ifndef __HAL_PHY_RF_8821A_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c new file mode 100644 index 00000000000000..cfb7592db50d39 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.c @@ -0,0 +1,1046 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "mp_precomp.h" + +#if RT_PLATFORM==PLATFORM_MACOSX +#include "phydm_precomp.h" +#else +#include "../phydm_precomp.h" +#endif + + + +/*---------------------------Define Local Constant---------------------------*/ +/* 2010/04/25 MH Define the max tx power tracking tx agc power. */ +#define ODM_TXPWRTRACK_MAX_IDX8821A 6 + +/*---------------------------Define Local Constant---------------------------*/ + + +/* 3 ============================================================ + * 3 Tx Power Tracking + * 3 ============================================================ */ + +void halrf_rf_lna_setting_8821a( + struct dm_struct *dm, + enum halrf_lna_set type +) +{ + /*phydm_disable_lna*/ + if (type == HALRF_LNA_DISABLE) { + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f); + odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb09b); /*disable LNA*/ + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + } else if (type == HALRF_LNA_ENABLE) { + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x1); + odm_set_rf_reg(dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ + odm_set_rf_reg(dm, RF_PATH_A, 0x31, 0xfffff, 0x0002f); + odm_set_rf_reg(dm, RF_PATH_A, 0x32, 0xfffff, 0xfb0bb); /*disable LNA*/ + odm_set_rf_reg(dm, RF_PATH_A, 0xef, 0x80000, 0x0); + } +} + + +void set_iqk_matrix_8821a( + struct dm_struct *dm, + u8 OFDM_index, + u8 rf_path, + s32 iqk_result_x, + s32 iqk_result_y +) +{ + s32 ele_A = 0, ele_D, ele_C = 0, value32; + + ele_D = (ofdm_swing_table_new[OFDM_index] & 0xFFC00000) >> 22; + + /* new element A = element D x X */ + if ((iqk_result_x != 0) && (*(dm->band_type) == ODM_BAND_2_4G)) { + if ((iqk_result_x & 0x00000200) != 0) /* consider minus */ + iqk_result_x = iqk_result_x | 0xFFFFFC00; + ele_A = ((iqk_result_x * ele_D) >> 8) & 0x000003FF; + + /* new element C = element D x Y */ + if ((iqk_result_y & 0x00000200) != 0) + iqk_result_y = iqk_result_y | 0xFFFFFC00; + ele_C = ((iqk_result_y * ele_D) >> 8) & 0x000003FF; + + if (rf_path == RF_PATH_A) + switch (rf_path) { + case RF_PATH_A: + /* wirte new elements A, C, D to regC80 and regC94, element B is always 0 */ + value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A; + odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, value32); + + value32 = (ele_C & 0x000003C0) >> 6; + odm_set_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, value32); + + value32 = ((iqk_result_x * ele_D) >> 7) & 0x01; + odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), value32); + break; + default: + break; + } + } else { + switch (rf_path) { + case RF_PATH_A: + odm_set_bb_reg(dm, REG_OFDM_0_XA_TX_IQ_IMBALANCE, MASKDWORD, ofdm_swing_table_new[OFDM_index]); + odm_set_bb_reg(dm, REG_OFDM_0_XC_TX_AFE, MASKH4BITS, 0x00); + odm_set_bb_reg(dm, REG_OFDM_0_ECCA_THRESHOLD, BIT(24), 0x00); + break; + + default: + break; + } + } + + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", + (u32)iqk_result_x, (u32)iqk_result_y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)iqk_result_x, (u32)iqk_result_y); +} + +void do_iqk_8821a( + void *dm_void, + u8 delta_thermal_index, + u8 thermal_value, + u8 threshold +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + odm_reset_iqk_result(dm); + dm->rf_calibrate_info.thermal_value_iqk = thermal_value; + halrf_iqk_trigger(dm, false); +} + + +void +odm_tx_pwr_track_set_pwr8821a( + void *dm_void, + enum pwrtrack_method method, + u8 rf_path, + u8 channel_mapped_index +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + PADAPTER adapter = (PADAPTER)dm->adapter; + + u8 pwr_tracking_limit = 26; /* +1.0dB */ + u8 tx_rate = 0xFF; + u8 final_ofdm_swing_index = 0; + u8 final_cck_swing_index = 0; + u32 final_bb_swing_idx[1]; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + + if (*(dm->mp_mode) == true) { +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#if (MP_DRIVER == 1) + PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx); + + tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex); +#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) +#ifdef CONFIG_MP_INCLUDED + PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx); + + tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); +#endif +#endif +#endif + } else { + u16 rate = *(dm->forced_data_rate); + + if (!rate) { /*auto rate*/ +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + tx_rate = hw_rate_to_m_rate(dm->tx_rate); +#endif + } else /*force rate*/ + tx_rate = (u8)rate; + } + + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "===>odm_tx_pwr_track_set_pwr8821a\n"); + + if (tx_rate != 0xFF) { + /* 2 CCK */ + if (((tx_rate >= MGN_1M) && (tx_rate <= MGN_5_5M)) || (tx_rate == MGN_11M)) + pwr_tracking_limit = 32; /* +4dB */ + /* 2 OFDM */ + else if ((tx_rate >= MGN_6M) && (tx_rate <= MGN_48M)) + pwr_tracking_limit = 30; /* +3dB */ + else if (tx_rate == MGN_54M) + pwr_tracking_limit = 28; /* +2dB */ + /* 2 HT */ + else if ((tx_rate >= MGN_MCS0) && (tx_rate <= MGN_MCS2)) /* QPSK/BPSK */ + pwr_tracking_limit = 34; /* +5dB */ + else if ((tx_rate >= MGN_MCS3) && (tx_rate <= MGN_MCS4)) /* 16QAM */ + pwr_tracking_limit = 30; /* +3dB */ + else if ((tx_rate >= MGN_MCS5) && (tx_rate <= MGN_MCS7)) /* 64QAM */ + pwr_tracking_limit = 28; /* +2dB */ + + /* 2 VHT */ + else if ((tx_rate >= MGN_VHT1SS_MCS0) && (tx_rate <= MGN_VHT1SS_MCS2)) /* QPSK/BPSK */ + pwr_tracking_limit = 34; /* +5dB */ + else if ((tx_rate >= MGN_VHT1SS_MCS3) && (tx_rate <= MGN_VHT1SS_MCS4)) /* 16QAM */ + pwr_tracking_limit = 30; /* +3dB */ + else if ((tx_rate >= MGN_VHT1SS_MCS5) && (tx_rate <= MGN_VHT1SS_MCS6)) /* 64QAM */ + pwr_tracking_limit = 28; /* +2dB */ + else if (tx_rate == MGN_VHT1SS_MCS7) /* 64QAM */ + pwr_tracking_limit = 26; /* +1dB */ + else if (tx_rate == MGN_VHT1SS_MCS8) /* 256QAM */ + pwr_tracking_limit = 24; /* +0dB */ + else if (tx_rate == MGN_VHT1SS_MCS9) /* 256QAM */ + pwr_tracking_limit = 22; /* -1dB */ + + else + pwr_tracking_limit = 24; + } + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "tx_rate=0x%x, pwr_tracking_limit=%d\n", tx_rate, pwr_tracking_limit); + + if (method == BBSWING) { + if (rf_path == RF_PATH_A) { + final_bb_swing_idx[RF_PATH_A] = (cali_info->OFDM_index[RF_PATH_A] > pwr_tracking_limit) ? pwr_tracking_limit : cali_info->OFDM_index[RF_PATH_A]; + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "cali_info->OFDM_index[RF_PATH_A]=%d, dm->RealBbSwingIdx[RF_PATH_A]=%d\n", + cali_info->OFDM_index[RF_PATH_A], final_bb_swing_idx[RF_PATH_A]); + + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[final_bb_swing_idx[RF_PATH_A]]); + } + } else if (method == MIX_MODE) { + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "cali_info->default_ofdm_index=%d, cali_info->absolute_ofdm_swing_idx[rf_path]=%d, rf_path = %d\n", + cali_info->default_ofdm_index, cali_info->absolute_ofdm_swing_idx[rf_path], rf_path); + + final_cck_swing_index = cali_info->default_cck_index + cali_info->absolute_ofdm_swing_idx[rf_path]; + final_ofdm_swing_index = cali_info->default_ofdm_index + cali_info->absolute_ofdm_swing_idx[rf_path]; + + if (rf_path == RF_PATH_A) { + if (final_ofdm_swing_index > pwr_tracking_limit) { /* BBSwing higher then Limit */ + cali_info->remnant_cck_swing_idx = final_cck_swing_index - pwr_tracking_limit; + cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index - pwr_tracking_limit; + + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[pwr_tracking_limit]); + + cali_info->modify_tx_agc_flag_path_a = true; + + PHY_SetTxPowerLevelByPath(adapter, *dm->channel, RF_PATH_A); + + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Over BBSwing Limit, pwr_tracking_limit = %d, Remnant tx_agc value = %d\n", pwr_tracking_limit, cali_info->remnant_ofdm_swing_idx[rf_path]); + } else if (final_ofdm_swing_index < 0) { + cali_info->remnant_cck_swing_idx = final_cck_swing_index; + cali_info->remnant_ofdm_swing_idx[rf_path] = final_ofdm_swing_index; + + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[0]); + + cali_info->modify_tx_agc_flag_path_a = true; + + PHY_SetTxPowerLevelByPath(adapter, *dm->channel, RF_PATH_A); + + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Lower then BBSwing lower bound 0, Remnant tx_agc value = %d\n", cali_info->remnant_ofdm_swing_idx[rf_path]); + } else { + odm_set_bb_reg(dm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[final_ofdm_swing_index]); + + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A Compensate with BBSwing, final_ofdm_swing_index = %d\n", final_ofdm_swing_index); + + if (cali_info->modify_tx_agc_flag_path_a) { /* If tx_agc has changed, reset tx_agc again */ + cali_info->remnant_cck_swing_idx = 0; + cali_info->remnant_ofdm_swing_idx[rf_path] = 0; + + PHY_SetTxPowerLevelByPath(adapter, *dm->channel, RF_PATH_A); + + cali_info->modify_tx_agc_flag_path_a = false; + + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "******Path_A dm->Modify_TxAGC_Flag = false\n"); + } + } + } + } else + return; +} /* odm_TxPwrTrackSetPwr88E */ + +void +get_delta_swing_table_8821a( + void *dm_void, + u8 **temperature_up_a, + u8 **temperature_down_a, + u8 **temperature_up_b, + u8 **temperature_down_b +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + PADAPTER adapter = (PADAPTER)dm->adapter; + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + u8 tx_rate = 0xFF; + u8 channel = *dm->channel; + + if (*(dm->mp_mode) == true) { +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) +#if (MP_DRIVER == 1) + PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx); + + tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex); +#endif +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) +#ifdef CONFIG_MP_INCLUDED + PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx); + + tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index); +#endif +#endif +#endif + } else { + u16 rate = *(dm->forced_data_rate); + + if (!rate) { /*auto rate*/ +#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(dm->tx_rate); +#elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + tx_rate = hw_rate_to_m_rate(dm->tx_rate); +#endif + } else /*force rate*/ + tx_rate = (u8)rate; + } + + PHYDM_DBG(dm, ODM_COMP_TX_PWR_TRACK, "Power Tracking tx_rate=0x%X\n", tx_rate); + + + if (1 <= channel && channel <= 14) { + if (IS_CCK_RATE(tx_rate)) { + *temperature_up_a = cali_info->delta_swing_table_idx_2g_cck_a_p; + *temperature_down_a = cali_info->delta_swing_table_idx_2g_cck_a_n; + *temperature_up_b = cali_info->delta_swing_table_idx_2g_cck_b_p; + *temperature_down_b = cali_info->delta_swing_table_idx_2g_cck_b_n; + } else { + *temperature_up_a = cali_info->delta_swing_table_idx_2ga_p; + *temperature_down_a = cali_info->delta_swing_table_idx_2ga_n; + *temperature_up_b = cali_info->delta_swing_table_idx_2gb_p; + *temperature_down_b = cali_info->delta_swing_table_idx_2gb_n; + } + } else if (36 <= channel && channel <= 64) { + *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[0]; + *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[0]; + *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[0]; + *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[0]; + } else if (100 <= channel && channel <= 144) { + *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[1]; + *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[1]; + *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[1]; + *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[1]; + } else if (149 <= channel && channel <= 177) { + *temperature_up_a = cali_info->delta_swing_table_idx_5ga_p[2]; + *temperature_down_a = cali_info->delta_swing_table_idx_5ga_n[2]; + *temperature_up_b = cali_info->delta_swing_table_idx_5gb_p[2]; + *temperature_down_b = cali_info->delta_swing_table_idx_5gb_n[2]; + } else { + *temperature_up_a = (u8 *)delta_swing_table_idx_2ga_p_8188e; + *temperature_down_a = (u8 *)delta_swing_table_idx_2ga_n_8188e; + *temperature_up_b = (u8 *)delta_swing_table_idx_2ga_p_8188e; + *temperature_down_b = (u8 *)delta_swing_table_idx_2ga_n_8188e; + } + + return; +} + +void configure_txpower_track_8821a( + struct txpwrtrack_cfg *config +) +{ + config->swing_table_size_cck = TXSCALE_TABLE_SIZE; + config->swing_table_size_ofdm = TXSCALE_TABLE_SIZE; + config->threshold_iqk = IQK_THRESHOLD; + config->average_thermal_num = AVG_THERMAL_NUM_8812A; + config->rf_path_count = MAX_PATH_NUM_8821A; + config->thermal_reg_addr = RF_T_METER_8812A; + + config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr8821a; + config->do_iqk = do_iqk_8821a; + config->phy_lc_calibrate = phy_lc_calibrate_8821a; + config->get_delta_swing_table = get_delta_swing_table_8821a; +} + +/* 1 7. IQK */ +#define MAX_TOLERANCE 5 +#define IQK_DELAY_TIME 1 /* ms */ + +void _iqk_rx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int RX_X, + unsigned int RX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, RX_X >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, RX_Y >> 1); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X = %x;;RX_Y = %x ====>fill to IQC\n", RX_X >> 1, RX_Y >> 1); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc10 = %x ====>fill to IQC\n", odm_read_4byte(dm, 0xc10)); + } + break; + default: + break; + }; +} + +void _iqk_tx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int TX_X, + unsigned int TX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_set_bb_reg(dm, 0xccc, 0x000007ff, TX_Y); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, TX_X); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "TX_X = %x;;TX_Y = %x =====> fill to IQC\n", TX_X, TX_Y); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xcd4 = %x;;0xccc = %x ====>fill to IQC\n", odm_get_bb_reg(dm, 0xcd4, 0x000007ff), odm_get_bb_reg(dm, 0xccc, 0x000007ff)); + } + break; + default: + break; + }; +} + +void _iqk_backup_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* save MACBB default value */ + for (i = 0; i < MACBB_NUM; i++) + MACBB_backup[i] = odm_read_4byte(dm, backup_macbb_reg[i]); + + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupMacBB Success!!!!\n"); +} +void _iqk_backup_rf_8821a( + struct dm_struct *dm, + u32 *RFA_backup, + u32 *RFB_backup, + u32 *backup_rf_reg, + u32 RF_NUM +) +{ + + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save RF Parameters */ + for (i = 0; i < RF_NUM; i++) + RFA_backup[i] = odm_get_rf_reg(dm, RF_PATH_A, backup_rf_reg[i], MASKDWORD); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupRF Success!!!!\n"); +} +void _iqk_backup_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + AFE_backup[i] = odm_read_4byte(dm, backup_afe_reg[i]); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupAFE Success!!!!\n"); +} +void _iqk_restore_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload MacBB Parameters */ + for (i = 0; i < MACBB_NUM; i++) + odm_write_4byte(dm, backup_macbb_reg[i], MACBB_backup[i]); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreMacBB Success!!!!\n"); +} +void _iqk_restore_rf_8821a( + struct dm_struct *dm, + enum rf_path path, + u32 *backup_rf_reg, + u32 *RF_backup, + u32 RF_REG_NUM +) +{ + u32 i; + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + for (i = 0; i < RF_REG_NUM; i++) + odm_set_rf_reg(dm, (enum rf_path)path, backup_rf_reg[i], RFREGOFFSETMASK, RF_backup[i]); + + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreRF path A Success!!!!\n"); + } + break; + default: + break; + } +} +void _iqk_restore_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + odm_write_4byte(dm, backup_afe_reg[i], AFE_backup[i]); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x0); + odm_write_4byte(dm, 0xc84, 0x0); + odm_write_4byte(dm, 0xc88, 0x0); + odm_write_4byte(dm, 0xc8c, 0x3c000000); + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xc94, 0x00000000); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_write_4byte(dm, 0xcb8, 0x0); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreAFE Success!!!!\n"); +} + + +void _iqk_configure_mac_8821a( + struct dm_struct *dm +) +{ + /* ========MAC register setting======== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_write_1byte(dm, 0x522, 0x3f); + odm_set_bb_reg(dm, 0x550, BIT(11) | BIT(3), 0x0); + odm_write_1byte(dm, 0x808, 0x00); /* RX ante off */ + odm_set_bb_reg(dm, 0x838, 0xf, 0xc); /* CCA off */ + odm_write_1byte(dm, 0xa07, 0xf); /* CCK RX path off */ +} + +#define cal_num 3 + +void _iqk_tx_8821a( + struct dm_struct *dm, + enum rf_path path +) +{ + u32 TX_fail, RX_fail, delay_count, IQK_ready, cal_retry, cal = 0; + int TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0, tx_average = 0, rx_average = 0, rx_iqk_loop = 0, RX_X_temp = 0, RX_Y_temp = 0; + int TX_X0[cal_num], TX_Y0[cal_num], RX_X0[2][cal_num], RX_Y0[2][cal_num]; + boolean TX0IQKOK = false, RX0IQKOK = false; + int i, ii, dx = 0, dy = 0, TX_finish = 0, RX_finish1 = 0, RX_finish2 = 0; + + + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "band_width = %d, support_interface = %d, ext_pa = %d, ext_pa_5g = %d\n", *dm->band_width, dm->support_interface, dm->ext_pa, dm->ext_pa_5g); + + while (cal < cal_num) { + switch (path) { + case RF_PATH_A: + { + /* path-A LOK */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* ========path-A AFE all on======== */ + /* Port 0 DAC/ADC on */ + odm_write_4byte(dm, 0xc60, 0x77777777); + odm_write_4byte(dm, 0xc64, 0x77777777); + + odm_write_4byte(dm, 0xc68, 0x19791979); + + odm_set_bb_reg(dm, 0xc00, 0xf, 0x4);/* hardware 3-wire off */ + + /* LOK setting */ + /* ====== LOK ====== */ + /* 1. DAC/ADC sampling rate (160 MHz) */ + odm_set_bb_reg(dm, 0xc5c, BIT(26) | BIT(25) | BIT(24), 0x7); + + /* 2. LoK RF setting (at BW = 20M) */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80002); + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x00462910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403f4); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x68163e96); + else + odm_write_4byte(dm, 0xc8c, 0x28163e96); + + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] N SI/PI iqk_dpk module */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0x58, 0x7fe00, odm_get_rf_reg(dm, (enum rf_path)path, 0x8, 0xffc00)); + switch (*dm->band_width) { + case 1: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x1); + } + break; + case 2: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x0); + } + break; + default: + break; + + } + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + /* 3. TX RF setting */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x0046a910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403e3); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x40163e96); + else + odm_write_4byte(dm, 0xc8c, 0x00163e96); + + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] SI/PIiqk_dpk module */ + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============TXIQK Check============== */ + TX_fail = odm_get_bb_reg(dm, 0xd00, BIT(12)); + + if (~TX_fail) { + odm_write_4byte(dm, 0xcb8, 0x02000000); + TX_X0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x04000000); + TX_Y0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + TX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } else { + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + + + if (TX0IQKOK == false) + break; /* TXK fail, Don't do RXK */ + + /* ====== RX IQK ====== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* 1. RX RF setting */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x30000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0002f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xfffbb); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x88001); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d8); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + + odm_set_bb_reg(dm, 0x978, 0x03FF8000, (TX_X0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, 0x000007FF, (TX_Y0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, BIT(31), 0x1); + odm_set_bb_reg(dm, 0x97c, BIT(31), 0x0); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_write_4byte(dm, 0x984, 0x0046a911); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x38008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x18008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xc88, 0x02140119); + + if (dm->support_interface == 1) { + rx_iqk_loop = 2; /* for 2% fail; */ + } else + rx_iqk_loop = 1; + for (i = 0; i < rx_iqk_loop; i++) { + if (dm->support_interface == 1) + if (i == 0) + odm_write_4byte(dm, 0xc8c, 0x28161100); /* Good */ + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] SI/PI iqk_dpk module */ + + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============RXIQK Check============== */ + RX_fail = odm_get_bb_reg(dm, 0xd00, BIT(11)); + if (RX_fail == 0) { + /* + dbg_print("====== RXIQK (%d) ======", i); + odm_write_4byte(dm, 0xcb8, 0x05000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x06000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + dbg_print("reg1 = %d, reg2 = %d", reg1, reg2); + image_power = (reg2<<32)+reg1; + dbg_print("Before PW = %d\n", image_power); + odm_write_4byte(dm, 0xcb8, 0x07000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x08000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + image_power = (reg2<<32)+reg1; + dbg_print("After PW = %d\n", image_power); + */ + + odm_write_4byte(dm, 0xcb8, 0x06000000); + RX_X0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x08000000); + RX_Y0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + RX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x200 >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, 0x0 >> 1); + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + + } + } else { + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + + if (TX0IQKOK) + tx_average++; + if (RX0IQKOK) + rx_average++; + } + break; + default: + break; + } + cal++; + } + /* FillIQK Result */ + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "========Path_A =======\n"); + if (tx_average == 0) + break; + + for (i = 0; i < tx_average; i++) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "TX_X0[%d] = %x ;; TX_Y0[%d] = %x\n", i, (TX_X0[i]) >> 21 & 0x000007ff, i, (TX_Y0[i]) >> 21 & 0x000007ff); + for (i = 0; i < tx_average; i++) { + for (ii = i + 1; ii < tx_average; ii++) { + dx = (TX_X0[i] >> 21) - (TX_X0[ii] >> 21); + if (dx < 3 && dx > -3) { + dy = (TX_Y0[i] >> 21) - (TX_Y0[ii] >> 21); + if (dy < 3 && dy > -3) { + TX_X = ((TX_X0[i] >> 21) + (TX_X0[ii] >> 21)) / 2; + TX_Y = ((TX_Y0[i] >> 21) + (TX_Y0[ii] >> 21)) / 2; + TX_finish = 1; + break; + } + } + } + if (TX_finish == 1) + break; + } + + if (TX_finish == 1) + _iqk_tx_fill_iqc_8821a(dm, path, TX_X, TX_Y); + else + _iqk_tx_fill_iqc_8821a(dm, path, 0x200, 0x0); + + if (rx_average == 0) + break; + + for (i = 0; i < rx_average; i++) { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X0[0][%d] = %x ;; RX_Y0[0][%d] = %x\n", i, (RX_X0[0][i]) >> 21 & 0x000007ff, i, (RX_Y0[0][i]) >> 21 & 0x000007ff); + if (rx_iqk_loop == 2) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X0[1][%d] = %x ;; RX_Y0[1][%d] = %x\n", i, (RX_X0[1][i]) >> 21 & 0x000007ff, i, (RX_Y0[1][i]) >> 21 & 0x000007ff); + } + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[0][i] >> 21) - (RX_X0[0][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[0][i] >> 21) - (RX_Y0[0][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X_temp = ((RX_X0[0][i] >> 21) + (RX_X0[0][ii] >> 21)) / 2; + RX_Y_temp = ((RX_Y0[0][i] >> 21) + (RX_Y0[0][ii] >> 21)) / 2; + RX_finish1 = 1; + break; + } + } + } + if (RX_finish1 == 1) { + RX_X = RX_X_temp; + RX_Y = RX_Y_temp; + break; + } + } + if (rx_iqk_loop == 2) { + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[1][i] >> 21) - (RX_X0[1][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[1][i] >> 21) - (RX_Y0[1][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X = ((RX_X0[1][i] >> 21) + (RX_X0[1][ii] >> 21)) / 2; + RX_Y = ((RX_Y0[1][i] >> 21) + (RX_Y0[1][ii] >> 21)) / 2; + RX_finish2 = 1; + break; + } + } + } + if (RX_finish2 == 1) + break; + } + if (RX_finish1 && RX_finish2) { + RX_X = (RX_X + RX_X_temp) / 2; + RX_Y = (RX_Y + RX_Y_temp) / 2; + } + } + if (RX_finish1 || RX_finish1) + _iqk_rx_fill_iqc_8821a(dm, path, RX_X, RX_Y); + else + _iqk_rx_fill_iqc_8821a(dm, path, 0x200, 0x0); + } + break; + default: + break; + } +} + +#define MACBB_REG_NUM 8 +#define AFE_REG_NUM 4 +#define RF_REG_NUM 3 + +void +_phy_iq_calibrate_by_fw_8821a( + struct dm_struct *dm +) +{ + PADAPTER adapter = (PADAPTER)dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA((adapter)); + u8 iqk_cmd[3] = {hal_data->CurrentChannel, 0x0, 0x0}; + u8 buf1 = 0x0; + u8 buf2 = 0x0; + + /* Byte 2, Bit 4 ~ Bit 5 : band_type */ + if (hal_data->CurrentBandType) + buf1 = 0x2 << 4; + else + buf1 = 0x1 << 4; + + /* Byte 2, Bit 0 ~ Bit 3 : bandwidth */ + if (hal_data->CurrentChannelBW == CHANNEL_WIDTH_20) + buf2 = 0x1; + else if (hal_data->CurrentChannelBW == CHANNEL_WIDTH_40) + buf2 = 0x1 << 1; + else if (hal_data->CurrentChannelBW == CHANNEL_WIDTH_80) + buf2 = 0x1 << 2; + else + buf2 = 0x1 << 3; + + iqk_cmd[1] = buf1 | buf2; + iqk_cmd[2] = hal_data->ExternalPA_5G | hal_data->ExternalLNA_5G << 1; + + + RT_TRACE(COMP_MP, DBG_LOUD, ("== FW IQK Start ==\n")); + hal_data->IQK_StartTimer = 0; + hal_data->IQK_StartTimer = PlatformGetCurrentTime(); + RT_TRACE(COMP_MP, DBG_LOUD, ("== start_time: %u\n", hal_data->IQK_StartTimer)); + +#if (H2C_USE_IO_THREAD == 1) + FW8821A_FillH2cCommand(adapter, 0x45, 3, iqk_cmd); +#else + FillH2CCommand8821A(adapter, 0x45, 3, iqk_cmd); +#endif +} + +void +_phy_iq_calibrate_8821a( + struct dm_struct *dm +) +{ + u32 MACBB_backup[MACBB_REG_NUM], AFE_backup[AFE_REG_NUM], RFA_backup[RF_REG_NUM], RFB_backup[RF_REG_NUM]; + u32 backup_macbb_reg[MACBB_REG_NUM] = {0x520, 0x550, 0x808, 0xa04, 0x90c, 0xc00, 0x838, 0x82c}; + u32 backup_afe_reg[AFE_REG_NUM] = {0xc5c, 0xc60, 0xc64, 0xc68}; + u32 backup_rf_reg[RF_REG_NUM] = {0x65, 0x8f, 0x0}; + + _iqk_backup_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM); + _iqk_backup_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM); + _iqk_backup_rf_8821a(dm, RFA_backup, RFB_backup, backup_rf_reg, RF_REG_NUM); + + _iqk_configure_mac_8821a(dm); + _iqk_tx_8821a(dm, RF_PATH_A); + _iqk_restore_rf_8821a(dm, RF_PATH_A, backup_rf_reg, RFA_backup, RF_REG_NUM); + + _iqk_restore_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM); + _iqk_restore_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM); + + /* _IQK_Exit_8821A(dm); */ + /* _IQK_TX_CheckResult_8821A */ + +} + +void +phy_reset_iqk_result_8821a( + struct dm_struct *dm +) +{ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + odm_write_4byte(dm, 0xce8, 0x0); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x100); +} + +/*for win*/ +/*IQK:0x1*/ +void +phy_iq_calibrate_8821a( + void *dm_void, + boolean is_recovery +) +{ + + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 counter = 0; + + if (dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) { + _phy_iq_calibrate_by_fw_8821a(dm); + for (counter = 0; counter < 10; counter++) { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== FW IQK PROGRESS == #%d\n", counter); + ODM_delay_ms(50); + if (!dm->rf_calibrate_info.is_iqk_in_progress) { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== FW IQK RETURN FROM WAITING ==\n"); + break; + } + } + if (dm->rf_calibrate_info.is_iqk_in_progress) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== FW IQK TIMEOUT (Still in progress after 500ms) ==\n"); + } else + _phy_iq_calibrate_8821a(dm); +} + + +void +phy_lc_calibrate_8821a( + void *dm_void +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + phy_lc_calibrate_8812a(dm); +} diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h new file mode 100644 index 00000000000000..2f50dac05ad4a0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_8821a_win.h @@ -0,0 +1,72 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#ifndef __HAL_PHY_RF_8821A_H__ +#define __HAL_PHY_RF_8821A_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define IQK_DELAY_TIME_8821A 10 /* ms */ +#define index_mapping_NUM_8821A 15 +#define AVG_THERMAL_NUM_8821A 4 +#define RF_T_METER_8821A 0x42 + +void configure_txpower_track_8821a( + struct txpwrtrack_cfg *config +); + +void do_iqk_8821a( + void *dm_void, + u8 delta_thermal_index, + u8 thermal_value, + u8 threshold +); + +void +odm_tx_pwr_track_set_pwr8821a( + void *dm_void, + enum pwrtrack_method method, + u8 rf_path, + u8 channel_mapped_index +); + +/* 1 7. IQK */ + +void +phy_iq_calibrate_8821a( + void *dm_void, + boolean is_recovery +); + +void +phy_lc_calibrate_8821a( + IN void *dm_void +); + +void +get_delta_swing_table_8821a( + void *dm_void, + u8 **temperature_up_a, + u8 **temperature_down_a, + u8 **temperature_up_b, + u8 **temperature_down_b +); + +void +halrf_rf_lna_setting_8821a( + struct dm_struct *dm, + enum phydm_lna_set type +); + +#endif /* #ifndef __HAL_PHY_RF_8821A_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c new file mode 100644 index 00000000000000..c98cbc01ccf938 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.c @@ -0,0 +1,731 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "mp_precomp.h" +#include "../../phydm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ +#define cal_num_8821A 3 +#define MACBB_REG_NUM_8821A 8 +#define AFE_REG_NUM_8821A 4 +#define RF_REG_NUM_8821A 3 +/*---------------------------Define Local Constant---------------------------*/ +void _iqk_rx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int RX_X, + unsigned int RX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, RX_X >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, (RX_Y >> 1) & 0x000003ff); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X = %x;;RX_Y = %x ====>fill to IQC\n", RX_X >> 1, RX_Y >> 1); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc10 = %x ====>fill to IQC\n", odm_read_4byte(dm, 0xc10)); + } + break; + default: + break; + }; +} + +void _iqk_tx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int TX_X, + unsigned int TX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_set_bb_reg(dm, 0xccc, 0x000007ff, TX_Y); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, TX_X); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "TX_X = %x;;TX_Y = %x =====> fill to IQC\n", TX_X, TX_Y); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xcd4 = %x;;0xccc = %x ====>fill to IQC\n", odm_get_bb_reg(dm, 0xcd4, 0x000007ff), odm_get_bb_reg(dm, 0xccc, 0x000007ff)); + } + break; + default: + break; + }; +} + +void _iqk_backup_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* save MACBB default value */ + for (i = 0; i < MACBB_NUM; i++) + MACBB_backup[i] = odm_read_4byte(dm, backup_macbb_reg[i]); + + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupMacBB Success!!!!\n"); +} + +void _iqk_backup_rf_8821a( + struct dm_struct *dm, + u32 *RFA_backup, + u32 *RFB_backup, + u32 *backup_rf_reg, + u32 RF_NUM +) +{ + + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save RF Parameters */ + for (i = 0; i < RF_NUM; i++) + RFA_backup[i] = odm_get_rf_reg(dm, RF_PATH_A, backup_rf_reg[i], MASKDWORD); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupRF Success!!!!\n"); +} + +void _iqk_backup_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + AFE_backup[i] = odm_read_4byte(dm, backup_afe_reg[i]); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupAFE Success!!!!\n"); +} + +void _iqk_restore_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload MacBB Parameters */ + for (i = 0; i < MACBB_NUM; i++) + odm_write_4byte(dm, backup_macbb_reg[i], MACBB_backup[i]); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreMacBB Success!!!!\n"); +} + +void _iqk_restore_rf_8821a( + struct dm_struct *dm, + enum rf_path path, + u32 *backup_rf_reg, + u32 *RF_backup, + u32 RF_REG_NUM +) +{ + u32 i; + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + for (i = 0; i < RF_REG_NUM; i++) + odm_set_rf_reg(dm, (enum rf_path)path, backup_rf_reg[i], RFREGOFFSETMASK, RF_backup[i]); + + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreRF path A Success!!!!\n"); + } + break; + default: + break; + } +} + +void _iqk_restore_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + odm_write_4byte(dm, backup_afe_reg[i], AFE_backup[i]); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x0); + odm_write_4byte(dm, 0xc84, 0x0); + odm_write_4byte(dm, 0xc88, 0x0); + odm_write_4byte(dm, 0xc8c, 0x3c000000); + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xc94, 0x00000000); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_write_4byte(dm, 0xcb8, 0x0); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreAFE Success!!!!\n"); +} + +void _iqk_configure_mac_8821a( + struct dm_struct *dm +) +{ + /* ========MAC register setting======== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_write_1byte(dm, 0x522, 0x3f); + odm_set_bb_reg(dm, 0x550, BIT(11) | BIT(3), 0x0); + odm_write_1byte(dm, 0x808, 0x00); /* RX ante off */ + odm_set_bb_reg(dm, 0x838, 0xf, 0xc); /* CCA off */ + odm_write_1byte(dm, 0xa07, 0xf); /* CCK RX path off */ +} + +void _iqk_tx_8821a( + struct dm_struct *dm, + enum rf_path path +) +{ + u32 TX_fail, RX_fail, delay_count, IQK_ready, cal_retry, cal = 0; + int TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0, tx_average = 0, rx_average = 0, rx_iqk_loop = 0, RX_X_temp = 0, RX_Y_temp = 0; + int TX_X0[cal_num_8821A], TX_Y0[cal_num_8821A], RX_X0[2][cal_num_8821A], RX_Y0[2][cal_num_8821A]; + boolean TX0IQKOK = false, RX0IQKOK = false; + boolean VDF_enable = false; + int i, k, VDF_Y[3], VDF_X[3], tx_dt[3], ii, dx = 0, dy = 0, TX_finish = 0, RX_finish1 = 0, RX_finish2 = 0; + + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "band_width = %d, support_interface = %d, ext_pa = %d, ext_pa_5g = %d\n", *dm->band_width, dm->support_interface, dm->ext_pa, dm->ext_pa_5g); + if (*dm->band_width == 2) + VDF_enable = true; + + while (cal < cal_num_8821A) { + switch (path) { + case RF_PATH_A: + { + /* path-A LOK */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* ========path-A AFE all on======== */ + /* Port 0 DAC/ADC on */ + odm_write_4byte(dm, 0xc60, 0x77777777); + odm_write_4byte(dm, 0xc64, 0x77777777); + + odm_write_4byte(dm, 0xc68, 0x19791979); + + odm_set_bb_reg(dm, 0xc00, 0xf, 0x4);/* hardware 3-wire off */ + + /* LOK setting */ + /* ====== LOK ====== */ + /* 1. DAC/ADC sampling rate (160 MHz) */ + odm_set_bb_reg(dm, 0xc5c, BIT(26) | BIT(25) | BIT(24), 0x7); + + /* 2. LoK RF setting (at BW = 20M) */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80002); + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x00462910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403f4); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x68163e96); + else + odm_write_4byte(dm, 0xc8c, 0x28163e96); + + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0x58, 0x7fe00, + odm_get_rf_reg(dm, (enum rf_path)path, 0x8, 0xffc00)); + switch (*dm->band_width) { + case 1: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x1); + } + break; + case 2: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x0); + } + break; + default: + break; + } + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + /* 3. TX RF setting */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x0046a910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403e3); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x40163e96); + else + odm_write_4byte(dm, 0xc8c, 0x00163e96); + + if (VDF_enable == 1) { + for (k = 0; k <= 2; k++) { + switch (k) { + case 0: + { + odm_write_4byte(dm, 0xc80, 0x18008c38);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c38);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x0); + } + break; + case 1: + { + odm_set_bb_reg(dm, 0xc80, BIT(28), 0x0); + odm_set_bb_reg(dm, 0xc84, BIT(28), 0x0); + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x0); + } + break; + case 2: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "VDF_Y[1] = %x;;;VDF_Y[0] = %x\n", VDF_Y[1] >> 21 & 0x00007ff, VDF_Y[0] >> 21 & 0x00007ff); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "VDF_X[1] = %x;;;VDF_X[0] = %x\n", VDF_X[1] >> 21 & 0x00007ff, VDF_X[0] >> 21 & 0x00007ff); + tx_dt[cal] = (VDF_Y[1] >> 20) - (VDF_Y[0] >> 20); + tx_dt[cal] = ((16 * tx_dt[cal]) * 10000 / 15708); + tx_dt[cal] = (tx_dt[cal] >> 1) + (tx_dt[cal] & BIT(0)); + odm_write_4byte(dm, 0xc80, 0x18008c20);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c20);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x1); + odm_set_bb_reg(dm, 0xce8, 0x3fff0000, tx_dt[cal] & 0x00003fff); + } + break; + } + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============TXIQK Check============== */ + TX_fail = odm_get_bb_reg(dm, 0xd00, BIT(12)); + + if (~TX_fail) { + odm_write_4byte(dm, 0xcb8, 0x02000000); + VDF_X[k] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x04000000); + VDF_Y[k] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + TX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } else { + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + if (k == 3) { + TX_X0[cal] = VDF_X[k - 1] ; + TX_Y0[cal] = VDF_Y[k - 1]; + } + } else { + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============TXIQK Check============== */ + TX_fail = odm_get_bb_reg(dm, 0xd00, BIT(12)); + + if (~TX_fail) { + odm_write_4byte(dm, 0xcb8, 0x02000000); + TX_X0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x04000000); + TX_Y0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + TX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } else { + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + + if (TX0IQKOK == false) + break; /* TXK fail, Don't do RXK */ + + /* ====== RX IQK ====== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* 1. RX RF setting */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x30000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0002f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xfffbb); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x88001); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d8); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + + if ((get_bonding_type_8881A() == BOND_8881AM) && (dm->ext_pa_5g) && (dm->ext_lna_5g)) { + odm_set_rf_reg(dm, (enum rf_path)path, 0xdf, 0x00800, 0x1); + odm_set_rf_reg(dm, (enum rf_path)path, 0x56, 0x003e0, 0x1); + } + + odm_set_bb_reg(dm, 0x978, 0x03FF8000, (TX_X0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, 0x000007FF, (TX_Y0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, BIT(31), 0x1); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0x978 = 0x%x\n", odm_get_bb_reg(dm, 0x978, MASKDWORD)); + odm_set_bb_reg(dm, 0x97c, BIT(31), 0x0); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_write_4byte(dm, 0x984, 0x0046a911); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x38008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x18008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xc88, 0x02140119); + + if (dm->support_interface == 1) { + rx_iqk_loop = 2; /* for 2% fail; */ + } else + rx_iqk_loop = 1; + for (i = 0; i < rx_iqk_loop; i++) { + if (dm->support_interface == 1) + if (i == 0) { + if ((get_bonding_type_8881A() == BOND_8881AM) && (dm->ext_pa_5g) && (dm->ext_lna_5g)) + odm_write_4byte(dm, 0xc8c, 0x28161800); /* Good */ + else + odm_write_4byte(dm, 0xc8c, 0x28161100); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc8c (i=0) = 0x%x\n", odm_get_bb_reg(dm, 0xc8c, MASKDWORD)); + } else { + if ((get_bonding_type_8881A() == BOND_8881AM) && (dm->ext_pa_5g) && (dm->ext_lna_5g)) + odm_write_4byte(dm, 0xc8c, 0x28160c00); + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc8c = 0x%x\n", odm_get_bb_reg(dm, 0xc8c, MASKDWORD)); + } + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + odm_set_rf_reg(dm, RF_PATH_A, 0xdf, 0x00800, 0x0); + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============RXIQK Check============== */ + RX_fail = odm_get_bb_reg(dm, 0xd00, BIT(11)); + if (RX_fail == 0) { + /* + dbg_print("====== RXIQK (%d) ======", i); + odm_write_4byte(dm, 0xcb8, 0x05000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x06000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + dbg_print("reg1 = %d, reg2 = %d", reg1, reg2); + image_power = (reg2<<32)+reg1; + dbg_print("Before PW = %d\n", image_power); + odm_write_4byte(dm, 0xcb8, 0x07000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x08000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + image_power = (reg2<<32)+reg1; + dbg_print("After PW = %d\n", image_power); + */ + + odm_write_4byte(dm, 0xcb8, 0x06000000); + RX_X0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x08000000); + RX_Y0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + RX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x200 >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, 0x0 >> 1); + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + + } + } else { + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + + if (TX0IQKOK) + tx_average++; + if (RX0IQKOK) + rx_average++; + } + break; + default: + break; + } + cal++; + } + /* FillIQK Result */ + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "========Path_A =======\n"); + if (tx_average == 0) + break; + + for (i = 0; i < tx_average; i++) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "TX_X0[%d] = %x ;; TX_Y0[%d] = %x\n", i, (TX_X0[i]) >> 21 & 0x000007ff, i, (TX_Y0[i]) >> 21 & 0x000007ff); + for (i = 0; i < tx_average; i++) { + for (ii = i + 1; ii < tx_average; ii++) { + dx = (TX_X0[i] >> 21) - (TX_X0[ii] >> 21); + if (dx < 3 && dx > -3) { + dy = (TX_Y0[i] >> 21) - (TX_Y0[ii] >> 21); + if (dy < 3 && dy > -3) { + TX_X = ((TX_X0[i] >> 21) + (TX_X0[ii] >> 21)) / 2; + TX_Y = ((TX_Y0[i] >> 21) + (TX_Y0[ii] >> 21)) / 2; + TX_finish = 1; + break; + } + } + } + if (TX_finish == 1) + break; + } + + if (TX_finish == 1) + _iqk_tx_fill_iqc_8821a(dm, path, TX_X, TX_Y); + else + _iqk_tx_fill_iqc_8821a(dm, path, 0x200, 0x0); + + if (rx_average == 0) + break; + + for (i = 0; i < rx_average; i++) { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X0[0][%d] = %x ;; RX_Y0[0][%d] = %x\n", i, (RX_X0[0][i]) >> 21 & 0x000007ff, i, (RX_Y0[0][i]) >> 21 & 0x000007ff); + if (rx_iqk_loop == 2) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X0[1][%d] = %x ;; RX_Y0[1][%d] = %x\n", i, (RX_X0[1][i]) >> 21 & 0x000007ff, i, (RX_Y0[1][i]) >> 21 & 0x000007ff); + } + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[0][i] >> 21) - (RX_X0[0][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[0][i] >> 21) - (RX_Y0[0][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X_temp = ((RX_X0[0][i] >> 21) + (RX_X0[0][ii] >> 21)) / 2; + RX_Y_temp = ((RX_Y0[0][i] >> 21) + (RX_Y0[0][ii] >> 21)) / 2; + RX_finish1 = 1; + break; + } + } + } + if (RX_finish1 == 1) { + RX_X = RX_X_temp; + RX_Y = RX_Y_temp; + break; + } + } + if (rx_iqk_loop == 2) { + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[1][i] >> 21) - (RX_X0[1][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[1][i] >> 21) - (RX_Y0[1][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X = ((RX_X0[1][i] >> 21) + (RX_X0[1][ii] >> 21)) / 2; + RX_Y = ((RX_Y0[1][i] >> 21) + (RX_Y0[1][ii] >> 21)) / 2; + RX_finish2 = 1; + break; + } + } + } + if (RX_finish2 == 1) + break; + } + if (RX_finish1 && RX_finish2) { + RX_X = (RX_X + RX_X_temp) / 2; + RX_Y = (RX_Y + RX_Y_temp) / 2; + } + } + if (RX_finish1 || RX_finish2) + _iqk_rx_fill_iqc_8821a(dm, path, RX_X, RX_Y); + else + _iqk_rx_fill_iqc_8821a(dm, path, 0x200, 0x0); + } + break; + default: + break; + } + +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + if (!TX0IQKOK) + panic_printk("[IQK] please check TXIQK\n"); + if (!RX0IQKOK) + panic_printk("[IQK] please check RXIQK\n"); +#endif +} + + +/*IQK: 0x1*/ +/*1. add IQK debug message*/ +void +_phy_iq_calibrate_8821a( + struct dm_struct *dm +) +{ + u32 MACBB_backup[MACBB_REG_NUM_8821A], AFE_backup[AFE_REG_NUM_8821A], RFA_backup[RF_REG_NUM_8821A], RFB_backup[RF_REG_NUM_8821A]; + u32 backup_macbb_reg[MACBB_REG_NUM_8821A] = {0x520, 0x550, 0x808, 0xa04, 0x90c, 0xc00, 0x838, 0x82c}; + u32 backup_afe_reg[AFE_REG_NUM_8821A] = {0xc5c, 0xc60, 0xc64, 0xc68}; + u32 backup_rf_reg[RF_REG_NUM_8821A] = {0x65, 0x8f, 0x0}; + + _iqk_backup_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM_8821A); + _iqk_backup_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM_8821A); + _iqk_backup_rf_8821a(dm, RFA_backup, RFB_backup, backup_rf_reg, RF_REG_NUM_8821A); + + _iqk_configure_mac_8821a(dm); + _iqk_tx_8821a(dm, RF_PATH_A); + + _iqk_restore_rf_8821a(dm, RF_PATH_A, backup_rf_reg, RFA_backup, RF_REG_NUM_8821A); + _iqk_restore_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM_8821A); + _iqk_restore_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM_8821A); +} + +void +phy_reset_iqk_result_8821a( + struct dm_struct *dm +) +{ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + odm_write_4byte(dm, 0xce8, 0x0); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x100); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, 0x0); +} + +void +phy_iq_calibrate_8821a( + void *dm_void, + boolean is_recovery +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 counter = 0; + + _phy_iq_calibrate_8821a(dm); +} \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h new file mode 100644 index 00000000000000..82cbf62ffe4189 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ap.h @@ -0,0 +1,42 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#ifndef __PHYDM_IQK_8821A_H__ +#define __PHYDM_IQK_8821A_H__ + +/*--------------------------Define Parameters-------------------------------*/ + + +/*---------------------------End Define Parameters-------------------------------*/ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void +do_iqk_8821a( + struct dm_struct *dm, + u8 delta_thermal_index, + u8 thermal_value, + u8 threshold +); +void +phy_iq_calibrate_8821a( + struct dm_struct *dm, + boolean is_recovery +); +#else +void +_phy_iq_calibrate_8821a( + struct dm_struct *dm +); +#endif +#endif /* #ifndef __PHYDM_IQK_8821A_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c new file mode 100644 index 00000000000000..b6491baf787874 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.c @@ -0,0 +1,773 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "mp_precomp.h" +#include "../../phydm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ +#define cal_num_8821A 3 +#define MACBB_REG_NUM_8821A 8 +#define AFE_REG_NUM_8821A 4 +#define RF_REG_NUM_8821A 3 +/*---------------------------Define Local Constant---------------------------*/ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void do_iqk_8821a( + void *dm_void, + u8 delta_thermal_index, + u8 thermal_value, + u8 threshold +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + dm->rf_calibrate_info.thermal_value_iqk = thermal_value; + halrf_iqk_trigger(dm, false); +} +#endif +void _iqk_rx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int RX_X, + unsigned int RX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, RX_X >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, (RX_Y >> 1) & 0x000003ff); + PHYDM_DBG(dm, DBG_COMP_MCC, "RX_X = %x;;RX_Y = %x ====>fill to IQC\n", RX_X >> 1, RX_Y >> 1); + PHYDM_DBG(dm, DBG_COMP_MCC, "0xc10 = %x ====>fill to IQC\n", odm_read_4byte(dm, 0xc10)); + } + break; + default: + break; + }; +} + +void _iqk_tx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int TX_X, + unsigned int TX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_set_bb_reg(dm, 0xccc, 0x000007ff, TX_Y); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, TX_X); + PHYDM_DBG(dm, DBG_COMP_MCC, "TX_X = %x;;TX_Y = %x =====> fill to IQC\n", TX_X, TX_Y); + PHYDM_DBG(dm, DBG_COMP_MCC, "0xcd4 = %x;;0xccc = %x ====>fill to IQC\n", odm_get_bb_reg(dm, 0xcd4, 0x000007ff), odm_get_bb_reg(dm, 0xccc, 0x000007ff)); + } + break; + default: + break; + }; +} + +void _iqk_backup_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* save MACBB default value */ + for (i = 0; i < MACBB_NUM; i++) + MACBB_backup[i] = odm_read_4byte(dm, backup_macbb_reg[i]); + + PHYDM_DBG(dm, DBG_COMP_MCC, "BackupMacBB Success!!!!\n"); +} + +void _iqk_backup_rf_8821a( + struct dm_struct *dm, + u32 *RFA_backup, + u32 *RFB_backup, + u32 *backup_rf_reg, + u32 RF_NUM +) +{ + + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save RF Parameters */ + for (i = 0; i < RF_NUM; i++) + RFA_backup[i] = odm_get_rf_reg(dm, RF_PATH_A, backup_rf_reg[i], MASKDWORD); + PHYDM_DBG(dm, DBG_COMP_MCC, "BackupRF Success!!!!\n"); +} + +void _iqk_backup_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + AFE_backup[i] = odm_read_4byte(dm, backup_afe_reg[i]); + PHYDM_DBG(dm, DBG_COMP_MCC, "BackupAFE Success!!!!\n"); +} + +void _iqk_restore_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload MacBB Parameters */ + for (i = 0; i < MACBB_NUM; i++) + odm_write_4byte(dm, backup_macbb_reg[i], MACBB_backup[i]); + PHYDM_DBG(dm, DBG_COMP_MCC, "RestoreMacBB Success!!!!\n"); +} + +void _iqk_restore_rf_8821a( + struct dm_struct *dm, + enum rf_path path, + u32 *backup_rf_reg, + u32 *RF_backup, + u32 RF_REG_NUM +) +{ + u32 i; + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + for (i = 0; i < RF_REG_NUM; i++) + odm_set_rf_reg(dm, (enum rf_path)path, backup_rf_reg[i], RFREGOFFSETMASK, RF_backup[i]); + + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, DBG_COMP_MCC, "RestoreRF path A Success!!!!\n"); + } + break; + default: + break; + } +} + +void _iqk_restore_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + odm_write_4byte(dm, backup_afe_reg[i], AFE_backup[i]); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x0); + odm_write_4byte(dm, 0xc84, 0x0); + odm_write_4byte(dm, 0xc88, 0x0); + odm_write_4byte(dm, 0xc8c, 0x3c000000); + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xc94, 0x00000000); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_write_4byte(dm, 0xcb8, 0x0); + PHYDM_DBG(dm, DBG_COMP_MCC, "RestoreAFE Success!!!!\n"); +} + +void _iqk_configure_mac_8821a( + struct dm_struct *dm +) +{ + /* ========MAC register setting======== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_write_1byte(dm, 0x522, 0x3f); + odm_set_bb_reg(dm, 0x550, BIT(11) | BIT(3), 0x0); + odm_write_1byte(dm, 0x808, 0x00); /* RX ante off */ + odm_set_bb_reg(dm, 0x838, 0xf, 0xc); /* CCA off */ + odm_write_1byte(dm, 0xa07, 0xf); /* CCK RX path off */ +} + +void _iqk_tx_8821a( + struct dm_struct *dm, + enum rf_path path +) +{ + u32 TX_fail, RX_fail, delay_count, IQK_ready, cal_retry, cal = 0; + int TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0, tx_average = 0, rx_average = 0, rx_iqk_loop = 0, RX_X_temp = 0, RX_Y_temp = 0; + int TX_X0[cal_num_8821A], TX_Y0[cal_num_8821A], RX_X0[2][cal_num_8821A], RX_Y0[2][cal_num_8821A]; + boolean TX0IQKOK = false, RX0IQKOK = false; + boolean VDF_enable = false; + int i, k, VDF_Y[3], VDF_X[3], tx_dt[3], ii, dx = 0, dy = 0, TX_finish = 0, RX_finish1 = 0, RX_finish2 = 0; + + PHYDM_DBG(dm, DBG_COMP_MCC, "band_width = %d, support_interface = %d, ext_pa = %d, ext_pa_5g = %d\n", *dm->band_width, dm->support_interface, dm->ext_pa, dm->ext_pa_5g); + if (*dm->band_width == 2) + VDF_enable = true; + + while (cal < cal_num_8821A) { + switch (path) { + case RF_PATH_A: + { + /* path-A LOK */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* ========path-A AFE all on======== */ + /* Port 0 DAC/ADC on */ + odm_write_4byte(dm, 0xc60, 0x77777777); + odm_write_4byte(dm, 0xc64, 0x77777777); + + odm_write_4byte(dm, 0xc68, 0x19791979); + + odm_set_bb_reg(dm, 0xc00, 0xf, 0x4);/* hardware 3-wire off */ + + /* LOK setting */ + /* ====== LOK ====== */ + /* 1. DAC/ADC sampling rate (160 MHz) */ + odm_set_bb_reg(dm, 0xc5c, BIT(26) | BIT(25) | BIT(24), 0x7); + + /* 2. LoK RF setting (at BW = 20M) */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80002); + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + + if (dm->rf_calibrate_info.is_iqk_pa_off == 1) + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3ec3); + else + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x00462910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403f4); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x68163e96); + else + odm_write_4byte(dm, 0xc8c, 0x28163e96); + + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20]iqk_dpk module */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0x58, 0x7fe00, odm_get_rf_reg(dm, (enum rf_path)path, 0x8, 0xffc00)); + switch (*dm->band_width) { + case 1: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x1); + } + break; + case 2: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x0); + } + break; + default: + break; + } + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + /* 3. TX RF setting */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + + if (dm->rf_calibrate_info.is_iqk_pa_off == 1) + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3ec3); + else + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x0046a910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403e3); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x40163e96); + else + odm_write_4byte(dm, 0xc8c, 0x00163e96); + + if (VDF_enable == 1) { + for (k = 0; k <= 2; k++) { + switch (k) { + case 0: + { + odm_write_4byte(dm, 0xc80, 0x18008c38);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c38);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x0); + } + break; + case 1: + { + odm_set_bb_reg(dm, 0xc80, BIT(28), 0x0); + odm_set_bb_reg(dm, 0xc84, BIT(28), 0x0); + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x0); + } + break; + case 2: + { + PHYDM_DBG(dm, DBG_COMP_MCC, "VDF_Y[1] = %x;;;VDF_Y[0] = %x\n", VDF_Y[1] >> 21 & 0x00007ff, VDF_Y[0] >> 21 & 0x00007ff); + PHYDM_DBG(dm, DBG_COMP_MCC, "VDF_X[1] = %x;;;VDF_X[0] = %x\n", VDF_X[1] >> 21 & 0x00007ff, VDF_X[0] >> 21 & 0x00007ff); + tx_dt[cal] = (VDF_Y[1] >> 20) - (VDF_Y[0] >> 20); + tx_dt[cal] = ((16 * tx_dt[cal]) * 10000 / 15708); + tx_dt[cal] = (tx_dt[cal] >> 1) + (tx_dt[cal] & BIT(0)); + odm_write_4byte(dm, 0xc80, 0x18008c20);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c20);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x1); + odm_set_bb_reg(dm, 0xce8, 0x3fff0000, tx_dt[cal] & 0x00003fff); + } + break; + } + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] iqk_dpk module */ + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============TXIQK Check============== */ + TX_fail = odm_get_bb_reg(dm, 0xd00, BIT(12)); + + if (~TX_fail) { + odm_write_4byte(dm, 0xcb8, 0x02000000); + VDF_X[k] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x04000000); + VDF_Y[k] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + TX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } else { + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + if (k == 3) { + TX_X0[cal] = VDF_X[k - 1] ; + TX_Y0[cal] = VDF_Y[k - 1]; + } + } else { + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] iqk_dpk module */ + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============TXIQK Check============== */ + TX_fail = odm_get_bb_reg(dm, 0xd00, BIT(12)); + + if (~TX_fail) { + odm_write_4byte(dm, 0xcb8, 0x02000000); + TX_X0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x04000000); + TX_Y0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + TX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } else { + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + + if (TX0IQKOK == false) + break; /* TXK fail, Don't do RXK */ + + /* ====== RX IQK ====== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* 1. RX RF setting */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x30000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0002f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xfffbb); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x88001); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d8); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + + odm_set_bb_reg(dm, 0x978, 0x03FF8000, (TX_X0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, 0x000007FF, (TX_Y0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, BIT(31), 0x1); + odm_set_bb_reg(dm, 0x97c, BIT(31), 0x0); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_write_4byte(dm, 0x984, 0x0046a911); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x38008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x18008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xc88, 0x02140119); + + if (dm->support_interface == 1) { + rx_iqk_loop = 2; /* for 2% fail; */ + } else + rx_iqk_loop = 1; + for (i = 0; i < rx_iqk_loop; i++) { + if (dm->support_interface == 1) + if (i == 0) + odm_write_4byte(dm, 0xc8c, 0x28161100); /* Good */ + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] iqk_dpk module */ + + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============RXIQK Check============== */ + RX_fail = odm_get_bb_reg(dm, 0xd00, BIT(11)); + if (RX_fail == 0) { + /* + dbg_print("====== RXIQK (%d) ======", i); + odm_write_4byte(dm, 0xcb8, 0x05000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x06000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + dbg_print("reg1 = %d, reg2 = %d", reg1, reg2); + image_power = (reg2<<32)+reg1; + dbg_print("Before PW = %d\n", image_power); + odm_write_4byte(dm, 0xcb8, 0x07000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x08000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + image_power = (reg2<<32)+reg1; + dbg_print("After PW = %d\n", image_power); + */ + + odm_write_4byte(dm, 0xcb8, 0x06000000); + RX_X0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x08000000); + RX_Y0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + RX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x200 >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, 0x0 >> 1); + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + + } + } else { + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + + if (TX0IQKOK) + tx_average++; + if (RX0IQKOK) + rx_average++; + } + break; + default: + break; + } + cal++; + } + /* FillIQK Result */ + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, DBG_COMP_MCC, "========Path_A =======\n"); + if (tx_average == 0) + break; + + for (i = 0; i < tx_average; i++) + PHYDM_DBG(dm, DBG_COMP_MCC, "TX_X0[%d] = %x ;; TX_Y0[%d] = %x\n", i, (TX_X0[i]) >> 21 & 0x000007ff, i, (TX_Y0[i]) >> 21 & 0x000007ff); + for (i = 0; i < tx_average; i++) { + for (ii = i + 1; ii < tx_average; ii++) { + dx = (TX_X0[i] >> 21) - (TX_X0[ii] >> 21); + if (dx < 3 && dx > -3) { + dy = (TX_Y0[i] >> 21) - (TX_Y0[ii] >> 21); + if (dy < 3 && dy > -3) { + TX_X = ((TX_X0[i] >> 21) + (TX_X0[ii] >> 21)) / 2; + TX_Y = ((TX_Y0[i] >> 21) + (TX_Y0[ii] >> 21)) / 2; + TX_finish = 1; + break; + } + } + } + if (TX_finish == 1) + break; + } + + if (TX_finish == 1) + _iqk_tx_fill_iqc_8821a(dm, path, TX_X, TX_Y); + else + _iqk_tx_fill_iqc_8821a(dm, path, 0x200, 0x0); + + if (rx_average == 0) + break; + + for (i = 0; i < rx_average; i++) { + PHYDM_DBG(dm, DBG_COMP_MCC, "RX_X0[0][%d] = %x ;; RX_Y0[0][%d] = %x\n", i, (RX_X0[0][i]) >> 21 & 0x000007ff, i, (RX_Y0[0][i]) >> 21 & 0x000007ff); + if (rx_iqk_loop == 2) { + PHYDM_DBG(dm, DBG_COMP_MCC, "RX_X0[1][%d] = %x ;; RX_Y0[1][%d] = %x\n", i, (RX_X0[1][i]) >> 21 & 0x000007ff, i, (RX_Y0[1][i]) >> 21 & 0x000007ff); + } + } + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[0][i] >> 21) - (RX_X0[0][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[0][i] >> 21) - (RX_Y0[0][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X_temp = ((RX_X0[0][i] >> 21) + (RX_X0[0][ii] >> 21)) / 2; + RX_Y_temp = ((RX_Y0[0][i] >> 21) + (RX_Y0[0][ii] >> 21)) / 2; + RX_finish1 = 1; + break; + } + } + } + if (RX_finish1 == 1) { + RX_X = RX_X_temp; + RX_Y = RX_Y_temp; + break; + } + } + if (rx_iqk_loop == 2) { + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[1][i] >> 21) - (RX_X0[1][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[1][i] >> 21) - (RX_Y0[1][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X = ((RX_X0[1][i] >> 21) + (RX_X0[1][ii] >> 21)) / 2; + RX_Y = ((RX_Y0[1][i] >> 21) + (RX_Y0[1][ii] >> 21)) / 2; + RX_finish2 = 1; + break; + } + } + } + if (RX_finish2 == 1) + break; + } + if (RX_finish1 && RX_finish2) { + RX_X = (RX_X + RX_X_temp) / 2; + RX_Y = (RX_Y + RX_Y_temp) / 2; + } + } + if (RX_finish1 || RX_finish2) + _iqk_rx_fill_iqc_8821a(dm, path, RX_X, RX_Y); + else + _iqk_rx_fill_iqc_8821a(dm, path, 0x200, 0x0); + } + break; + default: + break; + } +} + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void +_phy_iq_calibrate_by_fw_8821a( + struct dm_struct *dm +) +{ + + u8 iqk_cmd[3] = { *dm->channel, 0x0, 0x0}; + u8 buf1 = 0x0; + u8 buf2 = 0x0; + PHYDM_DBG(dm, DBG_COMP_MCC, "channel: %d\n", *dm->channel); + + + /* Byte 2, Bit 4 ~ Bit 5 : band_type */ + if (*dm->band_type == ODM_BAND_5G) + buf1 = 0x2 << 4; + else + buf1 = 0x1 << 4; + + /* Byte 2, Bit 0 ~ Bit 3 : bandwidth */ + if (*dm->band_width == CHANNEL_WIDTH_20) + buf2 = 0x1; + else if (*dm->band_width == CHANNEL_WIDTH_40) + buf2 = 0x1 << 1; + else if (*dm->band_width == CHANNEL_WIDTH_80) + buf2 = 0x1 << 2; + else + buf2 = 0x1 << 3; + + iqk_cmd[1] = buf1 | buf2; + iqk_cmd[2] = dm->ext_pa_5g | dm->ext_lna_5g << 1; + + odm_fill_h2c_cmd(dm, ODM_H2C_IQ_CALIBRATION, 3, iqk_cmd); +} +#endif + +void +_phy_iq_calibrate_8821a( + struct dm_struct *dm +) +{ + u32 MACBB_backup[MACBB_REG_NUM_8821A], AFE_backup[AFE_REG_NUM_8821A], RFA_backup[RF_REG_NUM_8821A], RFB_backup[RF_REG_NUM_8821A]; + u32 backup_macbb_reg[MACBB_REG_NUM_8821A] = {0x520, 0x550, 0x808, 0xa04, 0x90c, 0xc00, 0x838, 0x82c}; + u32 backup_afe_reg[AFE_REG_NUM_8821A] = {0xc5c, 0xc60, 0xc64, 0xc68}; + u32 backup_rf_reg[RF_REG_NUM_8821A] = {0x65, 0x8f, 0x0}; + + _iqk_backup_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM_8821A); + _iqk_backup_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM_8821A); + _iqk_backup_rf_8821a(dm, RFA_backup, RFB_backup, backup_rf_reg, RF_REG_NUM_8821A); + + _iqk_configure_mac_8821a(dm); + _iqk_tx_8821a(dm, RF_PATH_A); + + _iqk_restore_rf_8821a(dm, RF_PATH_A, backup_rf_reg, RFA_backup, RF_REG_NUM_8821A); + _iqk_restore_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM_8821A); + _iqk_restore_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM_8821A); +} + +void +phy_reset_iqk_result_8821a( + struct dm_struct *dm +) +{ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + odm_write_4byte(dm, 0xce8, 0x0); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x100); +} + + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +/*IQK: 0x1*/ +void +phy_iq_calibrate_8821a( + void *dm_void, + boolean is_recovery +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 counter = 0; + + if ((dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) && !(*(dm->mp_mode))) { + _phy_iq_calibrate_by_fw_8821a(dm); + phydm_iqk_wait(dm, 500); + if (dm->rf_calibrate_info.is_iqk_in_progress) { + PHYDM_DBG(dm, DBG_COMP_MCC, "== FW IQK TIMEOUT (Still in progress after 500ms) ==\n"); + } + } else + _phy_iq_calibrate_8821a(dm); +} +#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_dm.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h similarity index 55% rename from drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_dm.h rename to drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h index 501d3a9c6e2bf8..23d61e5c75c653 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_dm.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_ce.h @@ -12,16 +12,30 @@ * more details. * *****************************************************************************/ -#ifndef __RTL8188E_DM_H__ -#define __RTL8188E_DM_H__ -void rtl8188e_init_dm_priv(IN PADAPTER Adapter); -void rtl8188e_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8188e_InitHalDm(IN PADAPTER Adapter); -void rtl8188e_HalDmWatchDog(IN PADAPTER Adapter); +#ifndef __PHYDM_IQK_8821A_H__ +#define __PHYDM_IQK_8821A_H__ -/* VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); */ - -/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */ +/*--------------------------Define Parameters-------------------------------*/ +/*---------------------------End Define Parameters-------------------------------*/ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void +do_iqk_8821a( + void *dm_void, + u8 delta_thermal_index, + u8 thermal_value, + u8 threshold +); +void +phy_iq_calibrate_8821a( + void *dm_void, + boolean is_recovery +); +#else +void +_phy_iq_calibrate_8821a( + struct dm_struct *dm +); #endif +#endif /* #ifndef __PHYDM_IQK_8821A_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c new file mode 100644 index 00000000000000..e1c267a5f3ccef --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.c @@ -0,0 +1,774 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "mp_precomp.h" +#include "../phydm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ +#define cal_num_8821A 3 +#define MACBB_REG_NUM_8821A 8 +#define AFE_REG_NUM_8821A 4 +#define RF_REG_NUM_8821A 3 +/*---------------------------Define Local Constant---------------------------*/ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void do_iqk_8821a( + struct dm_struct *dm, + u8 delta_thermal_index, + u8 thermal_value, + u8 threshold +) +{ + dm->rf_calibrate_info.thermal_value_iqk = thermal_value; + halrf_iqk_trigger(dm, false); +} +#endif +void _iqk_rx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int RX_X, + unsigned int RX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, RX_X >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, (RX_Y >> 1) & 0x000003ff); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X = %x;;RX_Y = %x ====>fill to IQC\n", RX_X >> 1, RX_Y >> 1); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xc10 = %x ====>fill to IQC\n", odm_read_4byte(dm, 0xc10)); + } + break; + default: + break; + }; +} + +void _iqk_tx_fill_iqc_8821a( + struct dm_struct *dm, + enum rf_path path, + unsigned int TX_X, + unsigned int TX_Y +) +{ + switch (path) { + case RF_PATH_A: + { + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_set_bb_reg(dm, 0xccc, 0x000007ff, TX_Y); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, TX_X); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "TX_X = %x;;TX_Y = %x =====> fill to IQC\n", TX_X, TX_Y); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "0xcd4 = %x;;0xccc = %x ====>fill to IQC\n", odm_get_bb_reg(dm, 0xcd4, 0x000007ff), odm_get_bb_reg(dm, 0xccc, 0x000007ff)); + } + break; + default: + break; + }; +} + +void _iqk_backup_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* save MACBB default value */ + for (i = 0; i < MACBB_NUM; i++) + MACBB_backup[i] = odm_read_4byte(dm, backup_macbb_reg[i]); + + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupMacBB Success!!!!\n"); +} + +void _iqk_backup_rf_8821a( + struct dm_struct *dm, + u32 *RFA_backup, + u32 *RFB_backup, + u32 *backup_rf_reg, + u32 RF_NUM +) +{ + + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save RF Parameters */ + for (i = 0; i < RF_NUM; i++) + RFA_backup[i] = odm_get_rf_reg(dm, RF_PATH_A, backup_rf_reg[i], MASKDWORD); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupRF Success!!!!\n"); +} + +void _iqk_backup_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Save AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + AFE_backup[i] = odm_read_4byte(dm, backup_afe_reg[i]); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "BackupAFE Success!!!!\n"); +} + +void _iqk_restore_mac_bb_8821a( + struct dm_struct *dm, + u32 *MACBB_backup, + u32 *backup_macbb_reg, + u32 MACBB_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload MacBB Parameters */ + for (i = 0; i < MACBB_NUM; i++) + odm_write_4byte(dm, backup_macbb_reg[i], MACBB_backup[i]); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreMacBB Success!!!!\n"); +} + +void _iqk_restore_rf_8821a( + struct dm_struct *dm, + enum rf_path path, + u32 *backup_rf_reg, + u32 *RF_backup, + u32 RF_REG_NUM +) +{ + u32 i; + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + for (i = 0; i < RF_REG_NUM; i++) + odm_set_rf_reg(dm, (enum rf_path)path, backup_rf_reg[i], RFREGOFFSETMASK, RF_backup[i]); + + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreRF path A Success!!!!\n"); + } + break; + default: + break; + } +} + +void _iqk_restore_afe_8821a( + struct dm_struct *dm, + u32 *AFE_backup, + u32 *backup_afe_reg, + u32 AFE_NUM +) +{ + u32 i; + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* Reload AFE Parameters */ + for (i = 0; i < AFE_NUM; i++) + odm_write_4byte(dm, backup_afe_reg[i], AFE_backup[i]); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x0); + odm_write_4byte(dm, 0xc84, 0x0); + odm_write_4byte(dm, 0xc88, 0x0); + odm_write_4byte(dm, 0xc8c, 0x3c000000); + odm_write_4byte(dm, 0xc90, 0x00000080); + odm_write_4byte(dm, 0xc94, 0x00000000); + odm_write_4byte(dm, 0xcc4, 0x20040000); + odm_write_4byte(dm, 0xcc8, 0x20000000); + odm_write_4byte(dm, 0xcb8, 0x0); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RestoreAFE Success!!!!\n"); +} + +void _iqk_configure_mac_8821a( + struct dm_struct *dm +) +{ + /* ========MAC register setting======== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_write_1byte(dm, 0x522, 0x3f); + odm_set_bb_reg(dm, 0x550, BIT(11) | BIT(3), 0x0); + odm_write_1byte(dm, 0x808, 0x00); /* RX ante off */ + odm_set_bb_reg(dm, 0x838, 0xf, 0xc); /* CCA off */ + odm_write_1byte(dm, 0xa07, 0xf); /* CCK RX path off */ +} + +void _iqk_tx_8821a( + struct dm_struct *dm, + enum rf_path path +) +{ + u32 TX_fail, RX_fail, delay_count, IQK_ready, cal_retry, cal = 0; + int TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0, tx_average = 0, rx_average = 0, rx_iqk_loop = 0, RX_X_temp = 0, RX_Y_temp = 0; + int TX_X0[cal_num_8821A], TX_Y0[cal_num_8821A], RX_X0[2][cal_num_8821A], RX_Y0[2][cal_num_8821A]; + boolean TX0IQKOK = false, RX0IQKOK = false; + boolean VDF_enable = false; + int i, k, VDF_Y[3], VDF_X[3], tx_dt[3], ii, dx = 0, dy = 0, TX_finish = 0, RX_finish1 = 0, RX_finish2 = 0; + + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "band_width = %d, support_interface = %d, ext_pa = %d, ext_pa_5g = %d\n", *dm->band_width, dm->support_interface, dm->ext_pa, dm->ext_pa_5g); + if (*dm->band_width == 2) + VDF_enable = true; + + while (cal < cal_num_8821A) { + switch (path) { + case RF_PATH_A: + { + /* path-A LOK */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* ========path-A AFE all on======== */ + /* Port 0 DAC/ADC on */ + odm_write_4byte(dm, 0xc60, 0x77777777); + odm_write_4byte(dm, 0xc64, 0x77777777); + + odm_write_4byte(dm, 0xc68, 0x19791979); + + odm_set_bb_reg(dm, 0xc00, 0xf, 0x4);/* hardware 3-wire off */ + + /* LOK setting */ + /* ====== LOK ====== */ + /* 1. DAC/ADC sampling rate (160 MHz) */ + odm_set_bb_reg(dm, 0xc5c, BIT(26) | BIT(25) | BIT(24), 0x7); + + /* 2. LoK RF setting (at BW = 20M) */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80002); + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x00462910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403f4); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x68163e96); + else + odm_write_4byte(dm, 0xc8c, 0x28163e96); + + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0x58, 0x7fe00, + odm_get_rf_reg(dm, (enum rf_path)path, 0x8, 0xffc00)); + + switch (*dm->band_width) { + case 1: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x1); + } + break; + case 2: + { + odm_set_rf_reg(dm, (enum rf_path)path, 0x18, 0x00c00, 0x0); + } + break; + default: + break; + } + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + /* 3. TX RF setting */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x20000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0003f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xf3fc3); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d5); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x8a001); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_set_bb_reg(dm, 0xc94, BIT(0), 0x1); + odm_write_4byte(dm, 0x978, 0x29002000);/* TX (X,Y) */ + odm_write_4byte(dm, 0x97c, 0xa9002000);/* RX (X,Y) */ + odm_write_4byte(dm, 0x984, 0x0046a910);/* [0]:AGC_en, [15]:idac_K_Mask */ + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + + if (dm->ext_pa_5g) + odm_write_4byte(dm, 0xc88, 0x821403f7); + else + odm_write_4byte(dm, 0xc88, 0x821403e3); + + if (*dm->band_type == ODM_BAND_5G) + odm_write_4byte(dm, 0xc8c, 0x40163e96); + else + odm_write_4byte(dm, 0xc8c, 0x00163e96); + + if (VDF_enable == 1) { + for (k = 0; k <= 2; k++) { + switch (k) { + case 0: + { + odm_write_4byte(dm, 0xc80, 0x18008c38);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c38);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x0); + } + break; + case 1: + { + odm_set_bb_reg(dm, 0xc80, BIT(28), 0x0); + odm_set_bb_reg(dm, 0xc84, BIT(28), 0x0); + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x0); + } + break; + case 2: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "VDF_Y[1] = %x;;;VDF_Y[0] = %x\n", VDF_Y[1] >> 21 & 0x00007ff, VDF_Y[0] >> 21 & 0x00007ff); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "VDF_X[1] = %x;;;VDF_X[0] = %x\n", VDF_X[1] >> 21 & 0x00007ff, VDF_X[0] >> 21 & 0x00007ff); + tx_dt[cal] = (VDF_Y[1] >> 20) - (VDF_Y[0] >> 20); + tx_dt[cal] = ((16 * tx_dt[cal]) * 10000 / 15708); + tx_dt[cal] = (tx_dt[cal] >> 1) + (tx_dt[cal] & BIT(0)); + odm_write_4byte(dm, 0xc80, 0x18008c20);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c20);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_set_bb_reg(dm, 0xce8, BIT(31), 0x1); + odm_set_bb_reg(dm, 0xce8, 0x3fff0000, tx_dt[cal] & 0x00003fff); + } + break; + } + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============TXIQK Check============== */ + TX_fail = odm_get_bb_reg(dm, 0xd00, BIT(12)); + + if (~TX_fail) { + odm_write_4byte(dm, 0xcb8, 0x02000000); + VDF_X[k] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x04000000); + VDF_Y[k] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + TX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } else { + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + if (k == 3) { + TX_X0[cal] = VDF_X[k - 1] ; + TX_Y0[cal] = VDF_Y[k - 1]; + } + } else { + odm_write_4byte(dm, 0xc80, 0x18008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x38008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============TXIQK Check============== */ + TX_fail = odm_get_bb_reg(dm, 0xd00, BIT(12)); + + if (~TX_fail) { + odm_write_4byte(dm, 0xcb8, 0x02000000); + TX_X0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x04000000); + TX_Y0[cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + TX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } else { + TX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + + if (TX0IQKOK == false) + break; /* TXK fail, Don't do RXK */ + + /* ====== RX IQK ====== */ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + /* 1. RX RF setting */ + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x80000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x30, RFREGOFFSETMASK, 0x30000); + odm_set_rf_reg(dm, (enum rf_path)path, 0x31, RFREGOFFSETMASK, 0x0002f); + odm_set_rf_reg(dm, (enum rf_path)path, 0x32, RFREGOFFSETMASK, 0xfffbb); + odm_set_rf_reg(dm, (enum rf_path)path, 0x8f, RFREGOFFSETMASK, 0x88001); + odm_set_rf_reg(dm, (enum rf_path)path, 0x65, RFREGOFFSETMASK, 0x931d8); + odm_set_rf_reg(dm, (enum rf_path)path, 0xef, RFREGOFFSETMASK, 0x00000); + + odm_set_bb_reg(dm, 0x978, 0x03FF8000, (TX_X0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, 0x000007FF, (TX_Y0[cal]) >> 21 & 0x000007ff); + odm_set_bb_reg(dm, 0x978, BIT(31), 0x1); + odm_set_bb_reg(dm, 0x97c, BIT(31), 0x0); + odm_write_4byte(dm, 0x90c, 0x00008000); + odm_write_4byte(dm, 0x984, 0x0046a911); + + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_write_4byte(dm, 0xc80, 0x38008c10);/* TX_Tone_idx[9:0], TxK_Mask[29] TX_Tone = 16 */ + odm_write_4byte(dm, 0xc84, 0x18008c10);/* RX_Tone_idx[9:0], RxK_Mask[29] */ + odm_write_4byte(dm, 0xc88, 0x02140119); + + if (dm->support_interface == 1) { + rx_iqk_loop = 2; /* for 2% fail; */ + } else + rx_iqk_loop = 1; + for (i = 0; i < rx_iqk_loop; i++) { + if (dm->support_interface == 1) + if (i == 0) + odm_write_4byte(dm, 0xc8c, 0x28161100); /* Good */ + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + else + odm_write_4byte(dm, 0xc8c, 0x28160d00); + + odm_write_4byte(dm, 0xcb8, 0x00100000);/* cb8[20] �N SI/PI �ϥ��v���� iqk_dpk module */ + + cal_retry = 0; + while (1) { + /* one shot */ + odm_write_4byte(dm, 0x980, 0xfa000000); + odm_write_4byte(dm, 0x980, 0xf8000000); + + ODM_delay_ms(10); /* delay 10ms */ + odm_write_4byte(dm, 0xcb8, 0x00000000); + delay_count = 0; + while (1) { + IQK_ready = odm_get_bb_reg(dm, 0xd00, BIT(10)); + if ((~IQK_ready) || (delay_count > 20)) + break; + else { + ODM_delay_ms(1); + delay_count++; + } + } + + if (delay_count < 20) { /* If 20ms No Result, then cal_retry++ */ + /* ============RXIQK Check============== */ + RX_fail = odm_get_bb_reg(dm, 0xd00, BIT(11)); + if (RX_fail == 0) { + /* + dbg_print("====== RXIQK (%d) ======", i); + odm_write_4byte(dm, 0xcb8, 0x05000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x06000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + dbg_print("reg1 = %d, reg2 = %d", reg1, reg2); + image_power = (reg2<<32)+reg1; + dbg_print("Before PW = %d\n", image_power); + odm_write_4byte(dm, 0xcb8, 0x07000000); + reg1 = odm_get_bb_reg(dm, 0xd00, 0xffffffff); + odm_write_4byte(dm, 0xcb8, 0x08000000); + reg2 = odm_get_bb_reg(dm, 0xd00, 0x0000001f); + image_power = (reg2<<32)+reg1; + dbg_print("After PW = %d\n", image_power); + */ + + odm_write_4byte(dm, 0xcb8, 0x06000000); + RX_X0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + odm_write_4byte(dm, 0xcb8, 0x08000000); + RX_Y0[i][cal] = odm_get_bb_reg(dm, 0xd00, 0x07ff0000) << 21; + RX0IQKOK = true; + break; + } else { + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x200 >> 1); + odm_set_bb_reg(dm, 0xc10, 0x03ff0000, 0x0 >> 1); + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + + } + } else { + RX0IQKOK = false; + cal_retry++; + if (cal_retry == 10) + break; + } + } + } + + if (TX0IQKOK) + tx_average++; + if (RX0IQKOK) + rx_average++; + } + break; + default: + break; + } + cal++; + } + /* FillIQK Result */ + switch (path) { + case RF_PATH_A: + { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "========Path_A =======\n"); + if (tx_average == 0) + break; + + for (i = 0; i < tx_average; i++) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "TX_X0[%d] = %x ;; TX_Y0[%d] = %x\n", i, (TX_X0[i]) >> 21 & 0x000007ff, i, (TX_Y0[i]) >> 21 & 0x000007ff); + for (i = 0; i < tx_average; i++) { + for (ii = i + 1; ii < tx_average; ii++) { + dx = (TX_X0[i] >> 21) - (TX_X0[ii] >> 21); + if (dx < 3 && dx > -3) { + dy = (TX_Y0[i] >> 21) - (TX_Y0[ii] >> 21); + if (dy < 3 && dy > -3) { + TX_X = ((TX_X0[i] >> 21) + (TX_X0[ii] >> 21)) / 2; + TX_Y = ((TX_Y0[i] >> 21) + (TX_Y0[ii] >> 21)) / 2; + TX_finish = 1; + break; + } + } + } + if (TX_finish == 1) + break; + } + + if (TX_finish == 1) + _iqk_tx_fill_iqc_8821a(dm, path, TX_X, TX_Y); + else + _iqk_tx_fill_iqc_8821a(dm, path, 0x200, 0x0); + + if (rx_average == 0) + break; + + for (i = 0; i < rx_average; i++) { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X0[0][%d] = %x ;; RX_Y0[0][%d] = %x\n", i, (RX_X0[0][i]) >> 21 & 0x000007ff, i, (RX_Y0[0][i]) >> 21 & 0x000007ff); + if (rx_iqk_loop == 2) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "RX_X0[1][%d] = %x ;; RX_Y0[1][%d] = %x\n", i, (RX_X0[1][i]) >> 21 & 0x000007ff, i, (RX_Y0[1][i]) >> 21 & 0x000007ff); + } + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[0][i] >> 21) - (RX_X0[0][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[0][i] >> 21) - (RX_Y0[0][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X_temp = ((RX_X0[0][i] >> 21) + (RX_X0[0][ii] >> 21)) / 2; + RX_Y_temp = ((RX_Y0[0][i] >> 21) + (RX_Y0[0][ii] >> 21)) / 2; + RX_finish1 = 1; + break; + } + } + } + if (RX_finish1 == 1) { + RX_X = RX_X_temp; + RX_Y = RX_Y_temp; + break; + } + } + if (rx_iqk_loop == 2) { + for (i = 0; i < rx_average; i++) { + for (ii = i + 1; ii < rx_average; ii++) { + dx = (RX_X0[1][i] >> 21) - (RX_X0[1][ii] >> 21); + if (dx < 4 && dx > -4) { + dy = (RX_Y0[1][i] >> 21) - (RX_Y0[1][ii] >> 21); + if (dy < 4 && dy > -4) { + RX_X = ((RX_X0[1][i] >> 21) + (RX_X0[1][ii] >> 21)) / 2; + RX_Y = ((RX_Y0[1][i] >> 21) + (RX_Y0[1][ii] >> 21)) / 2; + RX_finish2 = 1; + break; + } + } + } + if (RX_finish2 == 1) + break; + } + if (RX_finish1 && RX_finish2) { + RX_X = (RX_X + RX_X_temp) / 2; + RX_Y = (RX_Y + RX_Y_temp) / 2; + } + } + if (RX_finish1 || RX_finish2) + _iqk_rx_fill_iqc_8821a(dm, path, RX_X, RX_Y); + else + _iqk_rx_fill_iqc_8821a(dm, path, 0x200, 0x0); + } + break; + default: + break; + } +} + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void +_phy_iq_calibrate_by_fw_8821a( + struct dm_struct *dm +) +{ + + u8 iqk_cmd[3] = { *dm->channel, 0x0, 0x0}; + u8 buf1 = 0x0; + u8 buf2 = 0x0; + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "channel: %d\n", *dm->channel); + + + /* Byte 2, Bit 4 ~ Bit 5 : band_type */ + if (*dm->band_type == ODM_BAND_5G) + buf1 = 0x2 << 4; + else + buf1 = 0x1 << 4; + + /* Byte 2, Bit 0 ~ Bit 3 : bandwidth */ + if (*dm->band_width == CHANNEL_WIDTH_20) + buf2 = 0x1; + else if (*dm->band_width == CHANNEL_WIDTH_40) + buf2 = 0x1 << 1; + else if (*dm->band_width == CHANNEL_WIDTH_80) + buf2 = 0x1 << 2; + else + buf2 = 0x1 << 3; + + iqk_cmd[1] = buf1 | buf2; + iqk_cmd[2] = dm->ext_pa_5g | dm->ext_lna_5g << 1; + + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== FW IQK Start ==\n"); + dm->rf_calibrate_info.iqk_start_time = 0; + dm->rf_calibrate_info.iqk_start_time = odm_get_current_time(dm); + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== start_time: %lld\n", dm->rf_calibrate_info.iqk_start_time); + odm_fill_h2c_cmd(dm, ODM_H2C_IQ_CALIBRATION, 3, iqk_cmd); + + +} +#endif + +void +_phy_iq_calibrate_8821a( + struct dm_struct *dm +) +{ + u32 MACBB_backup[MACBB_REG_NUM_8821A], AFE_backup[AFE_REG_NUM_8821A], RFA_backup[RF_REG_NUM_8821A], RFB_backup[RF_REG_NUM_8821A]; + u32 backup_macbb_reg[MACBB_REG_NUM_8821A] = {0x520, 0x550, 0x808, 0xa04, 0x90c, 0xc00, 0x838, 0x82c}; + u32 backup_afe_reg[AFE_REG_NUM_8821A] = {0xc5c, 0xc60, 0xc64, 0xc68}; + u32 backup_rf_reg[RF_REG_NUM_8821A] = {0x65, 0x8f, 0x0}; + + _iqk_backup_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM_8821A); + _iqk_backup_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM_8821A); + _iqk_backup_rf_8821a(dm, RFA_backup, RFB_backup, backup_rf_reg, RF_REG_NUM_8821A); + + _iqk_configure_mac_8821a(dm); + _iqk_tx_8821a(dm, RF_PATH_A); + + _iqk_restore_rf_8821a(dm, RF_PATH_A, backup_rf_reg, RFA_backup, RF_REG_NUM_8821A); + _iqk_restore_afe_8821a(dm, AFE_backup, backup_afe_reg, AFE_REG_NUM_8821A); + _iqk_restore_mac_bb_8821a(dm, MACBB_backup, backup_macbb_reg, MACBB_REG_NUM_8821A); +} + +void +phy_reset_iqk_result_8821a( + struct dm_struct *dm +) +{ + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x1); /* [31] = 1 --> Page C1 */ + odm_set_bb_reg(dm, 0xccc, 0x000007ff, 0x0); + odm_set_bb_reg(dm, 0xcd4, 0x000007ff, 0x200); + odm_write_4byte(dm, 0xce8, 0x0); + odm_set_bb_reg(dm, 0x82c, BIT(31), 0x0); /* [31] = 0 --> Page C */ + odm_set_bb_reg(dm, 0xc10, 0x000003ff, 0x100); +} + + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void +phy_iq_calibrate_8821a( + void *dm_void, + boolean is_recovery +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + u32 counter = 0; + + if ((dm->fw_offload_ability & PHYDM_RF_IQK_OFFLOAD) && !(*(dm->mp_mode))) { + _phy_iq_calibrate_by_fw_8821a(dm); + for (counter = 0; counter < 10; counter++) { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== FW IQK PROGRESS == #%d\n", counter); + ODM_delay_ms(50); + if (!dm->rf_calibrate_info.is_iqk_in_progress) { + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== FW IQK RETURN FROM WAITING ==\n"); + break; + } + } + if (dm->rf_calibrate_info.is_iqk_in_progress) + PHYDM_DBG(dm, ODM_COMP_CALIBRATION, "== FW IQK TIMEOUT (Still in progress after 500ms) ==\n"); + } else + _phy_iq_calibrate_8821a(dm); +} +#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_rf.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h similarity index 55% rename from drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_rf.h rename to drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h index 8d980a88fa6737..d325102b8a1ccc 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_rf.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/halrf/rtl8821a/halrf_iqk_8821a_win.h @@ -12,14 +12,31 @@ * more details. * *****************************************************************************/ -#ifndef __RTL8703B_RF_H__ -#define __RTL8703B_RF_H__ -int PHY_RF6052_Config8703B(IN PADAPTER Adapter); +#ifndef __PHYDM_IQK_8821A_H__ +#define __PHYDM_IQK_8821A_H__ -VOID -PHY_RF6052SetBandwidth8703B( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); +/*--------------------------Define Parameters-------------------------------*/ + +/*---------------------------End Define Parameters-------------------------------*/ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) +void +do_iqk_8821a( + struct dm_struct *dm, + u8 delta_thermal_index, + u8 thermal_value, + u8 threshold +); +void +phy_iq_calibrate_8821a( + void *dm_void, + boolean is_recovery +); +#else +void +_phy_iq_calibrate_8821a( + struct dm_struct *dm +); #endif +#endif /* #ifndef __PHYDM_IQK_8821A_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.c index d50e3cb4c7c434..1e980630e50c3b 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.c @@ -489,10 +489,12 @@ void phydm_hw_setting(struct dm_struct *dm) odm_hw_setting_8821a(dm); #endif +#if 0 /* TODO: implementation done but may not work and do nothing with current flags. Commenting the code to match previous version behavior*/ #if (RTL8814A_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8814A) phydm_hwsetting_8814a(dm); #endif +#endif #if (RTL8822B_SUPPORT == 1) if (dm->support_ic_type & ODM_RTL8822B) @@ -2082,10 +2084,6 @@ void odm_cmn_info_init(struct dm_struct *dm, enum odm_cmninfo cmn_info, dm->support_interface = (u8)value; break; - case ODM_CMNINFO_MP_TEST_CHIP: - dm->is_mp_chip = (u8)value; - break; - case ODM_CMNINFO_IC_TYPE: dm->support_ic_type = (u32)value; break; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.h index d1dabb488660bd..820be2fa87c6b4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.h @@ -829,7 +829,6 @@ struct dm_struct { u8 rssi_max; u8 rssi_max_macid; u8 rssi_min_by_path; - boolean is_mp_chip; boolean is_one_entry_only; u32 one_entry_macid; u32 one_entry_tp; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.mk b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.mk index f19430e3853e25..a05df647d9dfa2 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.mk +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm.mk @@ -40,7 +40,7 @@ _PHYDM_FILES := hal/phydm/phydm_debug.o \ hal/phydm/halrf/halrf_powertracking_ce.o\ hal/phydm/halrf/halrf_powertracking.o\ hal/phydm/halrf/halrf_kfree.o - + ifeq ($(CONFIG_RTL8188E), y) RTL871X = rtl8188e _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8188e_mac.o\ @@ -189,7 +189,7 @@ _PHYDM_FILES += hal/phydm/$(RTL871X)/halhwimg8192f_bb.o\ hal/phydm/$(RTL871X)/phydm_hal_api8192f.o\ hal/phydm/$(RTL871X)/phydm_regconfig8192f.o\ hal/phydm/$(RTL871X)/phydm_rtl8192f.o\ - hal/phydm/halrf/$(RTL871X)/halrf_8192f.o + hal/phydm/halrf/$(RTL871X)/halrf_8192f.o endif ifeq ($(CONFIG_RTL8198F), y) diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_adc_sampling.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_adc_sampling.c index ea9d0c02e8b4ac..d2278560ebd958 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_adc_sampling.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_adc_sampling.c @@ -1075,7 +1075,7 @@ void phydm_la_set_buff_mode(void *dm_void, enum la_buff_mode mode) end_pos_tmp = 0x8000; break; default: - pr_debug("[%s] Warning!", __func__); + //pr_debug("[%s] Warning!", __func__); break; } diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_ccx.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_ccx.c index 7ac54da12358cc..f9ea9bb99d6b17 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_ccx.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_ccx.c @@ -1364,7 +1364,7 @@ u8 phydm_clm_mntr_set(void *dm_void, struct clm_para_info *clm_para) return PHYDM_SET_FAIL; } - if (phydm_clm_racing_ctrl(dm, clm_para->clm_lv) == PHYDM_SET_FAIL) + if (phydm_clm_racing_ctrl(dm, (enum phydm_nhm_level)clm_para->clm_lv) == PHYDM_SET_FAIL) return PHYDM_SET_FAIL; if (clm_para->mntr_time >= 262) diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.c index 37143830359b74..57d24e0e68a4d4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.c @@ -2201,7 +2201,7 @@ void phydm_basic_dbg_message(void *dm_void) /*if (!(dm->debug_components & DBG_CMN))*/ /* return; */ - + if (dm->cmn_dbg_msg_cnt >= dm->cmn_dbg_msg_period) { dm->cmn_dbg_msg_cnt = PHYDM_WATCH_DOG_PERIOD; @@ -2409,9 +2409,6 @@ void phydm_basic_profile(void *dm_void, u32 *_used, char *output, u32 *_out_len) release_ver = RELEASE_VERSION_8812F; } #endif - PDM_SNPF(out_len, used, output + used, out_len - used, - " %-35s: %s (MP Chip: %s)\n", "IC type", ic_type, - dm->is_mp_chip ? "Yes" : "No"); if (dm->cut_version == ODM_CUT_A) cut = "A"; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.h index 660f48f031a959..a795f30d79ac70 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_debug.h @@ -276,6 +276,8 @@ static __inline void PHYDM_DBG_F(PDM_ODM_T dm, int comp, char *fmt, ...) } while (0) #endif +#define ODM_RT_TRACE(dm, comp, level, fmt) + #else /*@#if DBG*/ #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) static __inline void PHYDM_DBG(struct dm_struct *dm, int comp, char *fmt, ...) @@ -309,7 +311,7 @@ static __inline void PHYDM_DBG_F(struct dm_struct *dm, int comp, char *fmt, ...) #define PHYDM_DBG_F(dm, comp, fmt, args...) #endif #define PHYDM_PRINT_ADDR(dm, comp, title_str, ptr) - +#define ODM_RT_TRACE(dm, comp, level, fmt) #endif #define DBGPORT_PRI_3 3 /*@Debug function (the highest priority)*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_dig.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_dig.c index 01c19f31268196..eea6dcee4b42d3 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_dig.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_dig.c @@ -135,7 +135,7 @@ void phydm_dig_damping_chk(void *dm_void) switch (igi_bitmap_4bit) { case 0x5: - /*@ 4b'0101 + /*@ 4b'0101 * IGI:[3]down(0x24)->[2]up(0x26)->[1]down(0x24)->[0]up(0x26)->[new](Lock @ 0x26) * FA: [3] >high1 ->[2] [1] >high1 ->[0] [new] rssi, dtp->sta_tx_high_power_lvl); - if (dtp->sta_tx_high_power_lvl == tx_high_pwr_level_unchange + if (dtp->sta_tx_high_power_lvl == tx_high_pwr_level_unchange || dtp->sta_tx_high_power_lvl == dtp->sta_last_dtp_lvl) { dtp->sta_tx_high_power_lvl = dtp->sta_last_dtp_lvl; PHYDM_DBG(dm, DBG_DYN_TXPWR, diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_features_win.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_features_win.h index 907448227ed99c..8d2d1310932afb 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_features_win.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_features_win.h @@ -120,11 +120,11 @@ /*#define CONFIG_HL_SMART_ANTENNA_TYPE1*/ #define CONFIG_FAT_PATCH #endif - + #if (RTL8822B_SUPPORT) /*#define CONFIG_HL_SMART_ANTENNA_TYPE2*/ #endif - + #if (defined(CONFIG_HL_SMART_ANTENNA_TYPE1) || defined(CONFIG_HL_SMART_ANTENNA_TYPE2)) #define CONFIG_HL_SMART_ANTENNA #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_hwconfig.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_hwconfig.c index 35228178692fcf..4c4d9386e7d5eb 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_hwconfig.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_hwconfig.c @@ -23,7 +23,7 @@ * *****************************************************************************/ -/*@************************************************************ +/************************************************************* * include files ************************************************************/ @@ -31,28 +31,12 @@ #include "phydm_precomp.h" #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm)) -#define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm)) -#if (PHYDM_TESTCHIP_SUPPORT == 1) -#define READ_AND_CONFIG(ic, txt) \ - do { \ - if (dm->is_mp_chip) \ - READ_AND_CONFIG_MP(ic, txt); \ - else \ - READ_AND_CONFIG_TC(ic, txt); \ - } while (0) -#else #define READ_AND_CONFIG READ_AND_CONFIG_MP -#endif - +#define READ_FIRMWARE READ_FIRMWARE_MP #define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt()) -#define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt()) -#if (PHYDM_TESTCHIP_SUPPORT == 1) -#define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt)) -#else -#define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt) -#endif +#define GET_VERSION(ic, txt) GET_VERSION_MP(ic,txt) enum hal_status odm_config_rf_with_header_file(struct dm_struct *dm, @@ -65,8 +49,6 @@ odm_config_rf_with_header_file(struct dm_struct *dm, #endif enum hal_status result = HAL_STATUS_SUCCESS; - PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, - (dm->is_mp_chip) ? "MPChip" : "TestChip"); PHYDM_DBG(dm, ODM_COMP_INIT, "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", dm->support_platform, dm->support_interface, dm->board_type); @@ -189,7 +171,7 @@ odm_config_rf_with_header_file(struct dm_struct *dm, else if (e_rf_path == RF_PATH_D) READ_AND_CONFIG_MP(8814a, _radiod); } else if (config_type == CONFIG_RF_TXPWR_LMT) { - if (dm->rfe_type == 0) + /*if (dm->rfe_type == 0) READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0); else if (dm->rfe_type == 1) READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1); @@ -203,7 +185,7 @@ odm_config_rf_with_header_file(struct dm_struct *dm, READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7); else if (dm->rfe_type == 8) READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8); - else + else*/ READ_AND_CONFIG_MP(8814a, _txpwr_lmt); } } @@ -470,8 +452,6 @@ odm_config_rf_with_header_file(struct dm_struct *dm, enum hal_status odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm) { - PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, - (dm->is_mp_chip) ? "MPChip" : "TestChip"); PHYDM_DBG(dm, ODM_COMP_INIT, "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", dm->support_platform, dm->support_interface, dm->board_type); @@ -493,10 +473,7 @@ odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm) if (dm->support_interface == ODM_ITRF_PCIE) READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie); else if (dm->support_interface == ODM_ITRF_USB) { - if (dm->rfe_type == 3 && dm->is_mp_chip) - READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3); - else - READ_AND_CONFIG_MP(8812a, _txpowertrack_usb); + READ_AND_CONFIG_MP(8812a, _txpowertrack_usb); } } #endif @@ -572,14 +549,14 @@ odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm) READ_AND_CONFIG_MP(8814a, _txpowertrack_type2); else if (dm->rfe_type == 5) READ_AND_CONFIG_MP(8814a, _txpowertrack_type5); - else if (dm->rfe_type == 7) + /*else if (dm->rfe_type == 7) READ_AND_CONFIG_MP(8814a, _txpowertrack_type7); else if (dm->rfe_type == 8) - READ_AND_CONFIG_MP(8814a, _txpowertrack_type8); + READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);*/ else READ_AND_CONFIG_MP(8814a, _txpowertrack); - READ_AND_CONFIG_MP(8814a, _txpowertssi); + //READ_AND_CONFIG_MP(8814a, _txpowertssi); } #endif #if RTL8703B_SUPPORT @@ -793,24 +770,7 @@ odm_config_bb_with_header_file(struct dm_struct *dm, else if (config_type == CONFIG_BB_AGC_TAB) READ_AND_CONFIG_MP(8812a, _agc_tab); else if (config_type == CONFIG_BB_PHY_REG_PG) { - if (dm->rfe_type == 3 && dm->is_mp_chip) - READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus); -#if (DM_ODM_SUPPORT_TYPE & ODM_WIN) - else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip) - READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec); -#if RT_PLATFORM == PLATFORM_MACOSX - /*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/ - else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) - READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni); - /* TP-Link T4UH, Isaiah 2015-03-16*/ - else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) { - pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n"); - READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink); - } -#endif -#endif - else - READ_AND_CONFIG_MP(8812a, _phy_reg_pg); + READ_AND_CONFIG_MP(8812a, _phy_reg_pg); } else if (config_type == CONFIG_BB_PHY_REG_MP) READ_AND_CONFIG_MP(8812a, _phy_reg_mp); else if (config_type == CONFIG_BB_AGC_TAB_DIFF) { @@ -838,16 +798,6 @@ odm_config_bb_with_header_file(struct dm_struct *dm, READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa); else #endif -#if (RT_PLATFORM == PLATFORM_MACOSX) - /*@ for BUFFALO pwr by rate table */ - if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) { - /*@ for BUFFALO pwr by rate table (JP/US)*/ - if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G) - READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us); - else - READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp); - } else -#endif #endif READ_AND_CONFIG_MP(8821a, _phy_reg_pg); } @@ -914,7 +864,7 @@ odm_config_bb_with_header_file(struct dm_struct *dm, else if (config_type == CONFIG_BB_AGC_TAB) READ_AND_CONFIG_MP(8814a, _agc_tab); else if (config_type == CONFIG_BB_PHY_REG_PG) { - if (dm->rfe_type == 0) + /*if (dm->rfe_type == 0) READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0); else if (dm->rfe_type == 2) READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2); @@ -928,7 +878,7 @@ odm_config_bb_with_header_file(struct dm_struct *dm, READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7); else if (dm->rfe_type == 8) READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8); - else + else*/ READ_AND_CONFIG_MP(8814a, _phy_reg_pg); } else if (config_type == CONFIG_BB_PHY_REG_MP) READ_AND_CONFIG_MP(8814a, _phy_reg_mp); @@ -1184,8 +1134,6 @@ odm_config_mac_with_header_file(struct dm_struct *dm) { enum hal_status result = HAL_STATUS_SUCCESS; - PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__, - (dm->is_mp_chip) ? "MPChip" : "TestChip"); PHYDM_DBG(dm, ODM_COMP_INIT, "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n", dm->support_platform, dm->support_interface, dm->board_type); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_math_lib.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_math_lib.c index aa5f3a918de9b9..cf1568ca4251cb 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_math_lib.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_math_lib.c @@ -181,7 +181,6 @@ u32 odm_convert_to_db(u64 value) } else { if (db_invert_table[i][j] - value > value - db_invert_table[i][j - 1]) { - i = i; j = j - 1; } } diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.c index 5112e24e24ed59..7d964f5d6ec970 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.c @@ -272,7 +272,7 @@ void phydm_mp_set_single_carrier(void *dm_void, boolean is_single_carrier) odm_set_bb_reg(dm, R_0x100, 0x100, 0x0); odm_set_bb_reg(dm, R_0x100, 0x100, 0x1); } - } + } } void phydm_mp_reset_rx_counters_phy(void *dm_void) { @@ -306,9 +306,9 @@ void phydm_mp_get_tx_ok(void *dm_void, u32 rate_index) void phydm_mp_get_rx_ok(void *dm_void) { struct dm_struct *dm = (struct dm_struct *)dm_void; - struct phydm_mp *mp = &dm->dm_mp_table; + struct phydm_mp *mp = &dm->dm_mp_table; - u32 cck_ok = 0, ofdm_ok = 0, ht_ok = 0, vht_ok = 0; + u32 cck_ok = 0, ofdm_ok = 0, ht_ok = 0, vht_ok = 0; u32 cck_err = 0, ofdm_err = 0, ht_err = 0, vht_err = 0; if (dm->support_ic_type & ODM_IC_JGR3_SERIES) { @@ -316,7 +316,7 @@ void phydm_mp_get_rx_ok(void *dm_void) ofdm_ok = odm_get_bb_reg(dm, R_0x2c14, 0xffff); ht_ok = odm_get_bb_reg(dm, R_0x2c10, 0xffff); vht_ok = odm_get_bb_reg(dm, R_0x2c0c, 0xffff); - + cck_err = odm_get_bb_reg(dm, R_0x2c04, 0xffff0000); ofdm_err = odm_get_bb_reg(dm, R_0x2c14, 0xffff0000); ht_err = odm_get_bb_reg(dm, R_0x2c10, 0xffff0000); @@ -326,7 +326,7 @@ void phydm_mp_get_rx_ok(void *dm_void) ofdm_ok = odm_get_bb_reg(dm, R_0xf14, 0x3FFF); ht_ok = odm_get_bb_reg(dm, R_0xf10, 0x3FFF); vht_ok = odm_get_bb_reg(dm, R_0xf0c, 0x3FFF); - + cck_err = odm_get_bb_reg(dm, R_0xf04, 0x3FFF0000); ofdm_err = odm_get_bb_reg(dm, R_0xf14, 0x3FFF0000); ht_err = odm_get_bb_reg(dm, R_0xf10, 0x3FFF0000); @@ -335,7 +335,7 @@ void phydm_mp_get_rx_ok(void *dm_void) cck_ok = odm_get_bb_reg(dm, R_0xf88, MASKDWORD); ofdm_ok = odm_get_bb_reg(dm, R_0xf94, 0xffff); ht_ok = odm_get_bb_reg(dm, R_0xf90, 0xffff); - + cck_err = odm_get_bb_reg(dm, R_0xf84, MASKDWORD); ofdm_err = odm_get_bb_reg(dm, R_0xf94, 0xffff0000); ht_err = odm_get_bb_reg(dm, R_0xf90, 0xffff0000); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.h index ee030bbd09cc9c..40088c6cea1db8 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_mp.h @@ -60,7 +60,7 @@ struct phydm_mp { * 1 ============================================================ */ enum TX_MODE_OFDM { - OFDM_OFF = 0, + OFDM_OFF = 0, OFDM_CONT_TX = 1, OFDM_SINGLE_CARRIER = 2, OFDM_SINGLE_TONE = 4, diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_noisemonitor.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_noisemonitor.c index aeeb2556bd03f9..77fe94e3f4b679 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_noisemonitor.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_noisemonitor.c @@ -263,12 +263,12 @@ s16 odm_inband_noise_monitor_ac(struct dm_struct *dm, u8 pause_dig, u8 igi, s16 rpt = 0; u8 val_u8 = 0; - if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C)) { + if (dm->support_ic_type & (ODM_RTL8822B | ODM_RTL8821C | ODM_RTL8814A)) { rpt = phydm_idle_noise_measure_ac(dm, pause_dig, igi, max_time); return rpt; } - if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821 | ODM_RTL8814A))) + if (!(dm->support_ic_type & (ODM_RTL8812 | ODM_RTL8821))) return 0; func_start = odm_get_current_time(dm); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_phystatus.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_phystatus.c index 856354c94d2724..bbcb6bd7bd5779 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_phystatus.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_phystatus.c @@ -1228,10 +1228,7 @@ void phydm_rx_physts_1st_type(struct dm_struct *dm, /* @== [PWDB] ========================================================*/ /*@(Avg PWDB calculated by hardware*/ - if (!dm->is_mp_chip) /*@8812, 8821*/ - val = phy_sts->pwdb_all; - else - val = phy_sts->pwdb_all >> 1; /*old fomula*/ + val = phy_sts->pwdb_all >> 1; /*old fomula*/ rx_pwr_db = (val & 0x7f) - 110; phy_info->rx_pwdb_all = phydm_pwr_2_percent(rx_pwr_db); diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_regtable.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_regtable.h index 9d1b6a8f54c107..cf2226c3b0ec7f 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_regtable.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/phydm_regtable.h @@ -267,7 +267,7 @@ #define R_0x3a44 0x3a44 #define R_0x3a48 0x3a48 #define R_0x3a4c 0x3a4c -#define R_0x3a50 0x3a50 +#define R_0x3a50 0x3a50 #define R_0x3a54 0x3a54 #define R_0x3a58 0x3a58 #define R_0x3a5c 0x3a5c diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h new file mode 100644 index 00000000000000..1cd40304ae061a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/hal8814areg_odm.h @@ -0,0 +1,47 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +//============================================================ +/* File Name: hal8814areg_odm.h */ +// +// Description: +// +// This file is for RTL8814A register definition. +// +// +//============================================================ +#ifndef __HAL_8814A_REG_H__ +#define __HAL_8814A_REG_H__ + +// +// Register Definition +// +#define TRX_ANTDIV_PATH 0x860 +#define RX_ANTDIV_PATH 0xb2c +#define ODM_R_A_AGC_CORE1_8814A 0xc50 + + +// +// Bitmap Definition +// +#define BIT_FA_RESET_8814A BIT0 + + +#endif + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c new file mode 100644 index 00000000000000..181b88a859acd5 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.c @@ -0,0 +1,4308 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.19*/ +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8814A_SUPPORT == 1) +static BOOLEAN +CheckPositive( + struct dm_struct *pDM_Odm, + const u32 Condition1, + const u32 Condition2, + const u32 Condition3, + const u32 Condition4 +) +{ + u1Byte _BoardType = ((pDM_Odm->board_type & BIT4) >> 4) << 0 | /* _GLNA*/ + ((pDM_Odm->board_type & BIT3) >> 3) << 1 | /* _GPA*/ + ((pDM_Odm->board_type & BIT7) >> 7) << 2 | /* _ALNA*/ + ((pDM_Odm->board_type & BIT6) >> 6) << 3 | /* _APA */ + ((pDM_Odm->board_type & BIT2) >> 2) << 4; /* _BT*/ + + u32 cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; + u32 driver1 = pDM_Odm->cut_version << 24 | + (pDM_Odm->support_interface & 0xF0) << 16 | + pDM_Odm->support_platform << 16 | + pDM_Odm->package_type << 12 | + (pDM_Odm->support_interface & 0x0F) << 8 | + _BoardType; + + u32 driver2 = (pDM_Odm->type_glna & 0xFF) << 0 | + (pDM_Odm->type_gpa & 0xFF) << 8 | + (pDM_Odm->type_alna & 0xFF) << 16 | + (pDM_Odm->type_apa & 0xFF) << 24; + +u32 driver3 = 0; + + u32 driver4 = (pDM_Odm->type_glna & 0xFF00) >> 8 | + (pDM_Odm->type_gpa & 0xFF00) | + (pDM_Odm->type_alna & 0xFF00) << 8 | + (pDM_Odm->type_apa & 0xFF00) << 16; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + "===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + "===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + " (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->support_platform, pDM_Odm->support_interface); + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + " (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->board_type, pDM_Odm->package_type); + + + /*============== Value Defined Check ===============*/ + /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ + + if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return FALSE; + if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return FALSE; + + /*=============== Bit Defined Check ================*/ + /* We don't care [31:28] */ + + cond1 &= 0x00FF0FFF; + driver1 &= 0x00FF0FFF; + + if ((cond1 & driver1) == cond1) { + u32 bitMask = 0; + + if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ + return TRUE; + + if ((cond1 & BIT0) != 0) /*GLNA*/ + bitMask |= 0x000000FF; + if ((cond1 & BIT1) != 0) /*GPA*/ + bitMask |= 0x0000FF00; + if ((cond1 & BIT2) != 0) /*ALNA*/ + bitMask |= 0x00FF0000; + if ((cond1 & BIT3) != 0) /*APA*/ + bitMask |= 0xFF000000; + + if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ + return TRUE; + else + return FALSE; + } else + return FALSE; +} +static BOOLEAN +CheckNegative( + struct dm_struct *pDM_Odm, + const u32 Condition1, + const u32 Condition2 +) +{ + return TRUE; +} + +/****************************************************************************** +* AGC_TAB.TXT +******************************************************************************/ + +u32 Array_MP_8814A_AGC_TAB[] = { + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x81C, 0xFE000003, + 0x81C, 0xFF000003, + 0x81C, 0xFE020003, + 0x81C, 0xFD040003, + 0x81C, 0xFC060003, + 0x81C, 0xFB080003, + 0x81C, 0xFA0A0003, + 0x81C, 0xF90C0003, + 0x81C, 0xF80E0003, + 0x81C, 0xF7100003, + 0x81C, 0xF6120003, + 0x81C, 0xF5140003, + 0x81C, 0xF4160003, + 0x81C, 0xF3180003, + 0x81C, 0xF21A0003, + 0x81C, 0xF11C0003, + 0x81C, 0xF01E0003, + 0x81C, 0xEF200003, + 0x81C, 0xEE220003, + 0x81C, 0xED240003, + 0x81C, 0xEC260003, + 0x81C, 0xEB280003, + 0x81C, 0xEA2A0003, + 0x81C, 0xE92C0003, + 0x81C, 0xE82E0003, + 0x81C, 0xE7300003, + 0x81C, 0xE6320003, + 0x81C, 0xE5340003, + 0x81C, 0xE4360003, + 0x81C, 0xE3380003, + 0x81C, 0xC53A0003, + 0x81C, 0xC43C0003, + 0x81C, 0xC33E0003, + 0x81C, 0xC2400003, + 0x81C, 0xC1420003, + 0x81C, 0xA8440003, + 0x81C, 0xA7460003, + 0x81C, 0xA6480003, + 0x81C, 0xA54A0003, + 0x81C, 0xA44C0003, + 0x81C, 0xA34E0003, + 0x81C, 0xA2500003, + 0x81C, 0x65520003, + 0x81C, 0x64540003, + 0x81C, 0x63560003, + 0x81C, 0x62580003, + 0x81C, 0x615A0003, + 0x81C, 0x475C0003, + 0x81C, 0x465E0003, + 0x81C, 0x45600003, + 0x81C, 0x44620003, + 0x81C, 0x43640003, + 0x81C, 0x42660003, + 0x81C, 0x41680003, + 0x81C, 0x416A0003, + 0x81C, 0x416C0003, + 0x81C, 0x416E0003, + 0x81C, 0x41700003, + 0x81C, 0x41720003, + 0x81C, 0x41740003, + 0x81C, 0x41760003, + 0x81C, 0x41780003, + 0x81C, 0x417A0003, + 0x81C, 0x417C0003, + 0x81C, 0x417E0003, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x81C, 0xFE000003, + 0x81C, 0xFE000003, + 0x81C, 0xFD020003, + 0x81C, 0xFC040003, + 0x81C, 0xFB060003, + 0x81C, 0xFA080003, + 0x81C, 0xF90A0003, + 0x81C, 0xF80C0003, + 0x81C, 0xF70E0003, + 0x81C, 0xF6100003, + 0x81C, 0xF5120003, + 0x81C, 0xF4140003, + 0x81C, 0xF3160003, + 0x81C, 0xF2180003, + 0x81C, 0xF11A0003, + 0x81C, 0xF01C0003, + 0x81C, 0xEF1E0003, + 0x81C, 0xEE200003, + 0x81C, 0xED220003, + 0x81C, 0xEC240003, + 0x81C, 0xEB260003, + 0x81C, 0xEA280003, + 0x81C, 0xE92A0003, + 0x81C, 0xE82C0003, + 0x81C, 0xE72E0003, + 0x81C, 0xE6300003, + 0x81C, 0xE5320003, + 0x81C, 0xE4340003, + 0x81C, 0xE3360003, + 0x81C, 0xC6380003, + 0x81C, 0xC53A0003, + 0x81C, 0xC43C0003, + 0x81C, 0xC33E0003, + 0x81C, 0xC2400003, + 0x81C, 0xA9420003, + 0x81C, 0xA8440003, + 0x81C, 0xA7460003, + 0x81C, 0xA6480003, + 0x81C, 0xA54A0003, + 0x81C, 0xA44C0003, + 0x81C, 0xA34E0003, + 0x81C, 0x66500003, + 0x81C, 0x65520003, + 0x81C, 0x64540003, + 0x81C, 0x63560003, + 0x81C, 0x49580003, + 0x81C, 0x485A0003, + 0x81C, 0x475C0003, + 0x81C, 0x465E0003, + 0x81C, 0x45600003, + 0x81C, 0x44620003, + 0x81C, 0x43640003, + 0x81C, 0x42660003, + 0x81C, 0x41680003, + 0x81C, 0x416A0003, + 0x81C, 0x416C0003, + 0x81C, 0x416E0003, + 0x81C, 0x41700003, + 0x81C, 0x41720003, + 0x81C, 0x41740003, + 0x81C, 0x41760003, + 0x81C, 0x41780003, + 0x81C, 0x417A0003, + 0x81C, 0x417C0003, + 0x81C, 0x417E0003, + 0xA0000000, 0x00000000, + 0x81C, 0xFF000003, + 0x81C, 0xFE020003, + 0x81C, 0xFD040003, + 0x81C, 0xFC060003, + 0x81C, 0xFB080003, + 0x81C, 0xFA0A0003, + 0x81C, 0xF90C0003, + 0x81C, 0xF80E0003, + 0x81C, 0xF7100003, + 0x81C, 0xF6120003, + 0x81C, 0xF5140003, + 0x81C, 0xF4160003, + 0x81C, 0xF3180003, + 0x81C, 0xF21A0003, + 0x81C, 0xF11C0003, + 0x81C, 0xF01E0003, + 0x81C, 0xEF200003, + 0x81C, 0xEE220003, + 0x81C, 0xED240003, + 0x81C, 0xCF260003, + 0x81C, 0xCE280003, + 0x81C, 0xCD2A0003, + 0x81C, 0xCC2C0003, + 0x81C, 0xCB2E0003, + 0x81C, 0xCA300003, + 0x81C, 0xC9320003, + 0x81C, 0xC8340003, + 0x81C, 0xC7360003, + 0x81C, 0xC6380003, + 0x81C, 0xC53A0003, + 0x81C, 0xC43C0003, + 0x81C, 0xA63E0003, + 0x81C, 0xA5400003, + 0x81C, 0xA4420003, + 0x81C, 0xA3440003, + 0x81C, 0xA2460003, + 0x81C, 0xA1480003, + 0x81C, 0x864A0003, + 0x81C, 0x854C0003, + 0x81C, 0x844E0003, + 0x81C, 0x83500003, + 0x81C, 0x66520003, + 0x81C, 0x65540003, + 0x81C, 0x64560003, + 0x81C, 0x63580003, + 0x81C, 0x625A0003, + 0x81C, 0x615C0003, + 0x81C, 0x435E0003, + 0x81C, 0x42600003, + 0x81C, 0x41620003, + 0x81C, 0x27640003, + 0x81C, 0x26660003, + 0x81C, 0x25680003, + 0x81C, 0x246A0003, + 0x81C, 0x236C0003, + 0x81C, 0x226E0003, + 0x81C, 0x21700003, + 0x81C, 0x21720003, + 0x81C, 0x21740003, + 0x81C, 0x21760003, + 0x81C, 0x21780003, + 0x81C, 0x217A0003, + 0x81C, 0x217C0003, + 0x81C, 0x217E0003, + 0x81C, 0x217E0003, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x81C, 0xFA000103, + 0x81C, 0xF9020103, + 0x81C, 0xF8040103, + 0x81C, 0xF7060103, + 0x81C, 0xF6080103, + 0x81C, 0xF50A0103, + 0x81C, 0xF40C0103, + 0x81C, 0xF30E0103, + 0x81C, 0xF2100103, + 0x81C, 0xF1120103, + 0x81C, 0xF0140103, + 0x81C, 0xEF160103, + 0x81C, 0xEE180103, + 0x81C, 0xED1A0103, + 0x81C, 0xEC1C0103, + 0x81C, 0xEB1E0103, + 0x81C, 0xEA200103, + 0x81C, 0xE9220103, + 0x81C, 0xE8240103, + 0x81C, 0xE7260103, + 0x81C, 0xE6280103, + 0x81C, 0xE52A0103, + 0x81C, 0xE42C0103, + 0x81C, 0xE32E0103, + 0x81C, 0xE2300103, + 0x81C, 0xE1320103, + 0x81C, 0xA5340103, + 0x81C, 0xA4360103, + 0x81C, 0xA3380103, + 0x81C, 0xA23A0103, + 0x81C, 0xA13C0103, + 0x81C, 0x843E0103, + 0x81C, 0x83400103, + 0x81C, 0x82420103, + 0x81C, 0x81440103, + 0x81C, 0x64460103, + 0x81C, 0x63480103, + 0x81C, 0x624A0103, + 0x81C, 0x614C0103, + 0x81C, 0x454E0103, + 0x81C, 0x44500103, + 0x81C, 0x43520103, + 0x81C, 0x42540103, + 0x81C, 0x41560103, + 0x81C, 0x24580103, + 0x81C, 0x235A0103, + 0x81C, 0x225C0103, + 0x81C, 0x055E0103, + 0x81C, 0x04600103, + 0x81C, 0x03620103, + 0x81C, 0x02640103, + 0x81C, 0x01660103, + 0x81C, 0x01680103, + 0x81C, 0x016A0103, + 0x81C, 0x016C0103, + 0x81C, 0x016E0103, + 0x81C, 0x01700103, + 0x81C, 0x01720103, + 0x81C, 0x01740103, + 0x81C, 0x01760103, + 0x81C, 0x01780103, + 0x81C, 0x017A0103, + 0x81C, 0x017C0103, + 0x81C, 0x017E0103, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x81C, 0xF8000103, + 0x81C, 0xF7020103, + 0x81C, 0xF6040103, + 0x81C, 0xF5060103, + 0x81C, 0xF4080103, + 0x81C, 0xF30A0103, + 0x81C, 0xF20C0103, + 0x81C, 0xF10E0103, + 0x81C, 0xF0100103, + 0x81C, 0xEF120103, + 0x81C, 0xEE140103, + 0x81C, 0xED160103, + 0x81C, 0xEC180103, + 0x81C, 0xEB1A0103, + 0x81C, 0xEA1C0103, + 0x81C, 0xE91E0103, + 0x81C, 0xE8200103, + 0x81C, 0xE7220103, + 0x81C, 0xE6240103, + 0x81C, 0xE5260103, + 0x81C, 0xE4280103, + 0x81C, 0xE32A0103, + 0x81C, 0xE22C0103, + 0x81C, 0xE12E0103, + 0x81C, 0xA5300103, + 0x81C, 0xA4320103, + 0x81C, 0xA3340103, + 0x81C, 0xA2360103, + 0x81C, 0xA1380103, + 0x81C, 0x843A0103, + 0x81C, 0x833C0103, + 0x81C, 0x823E0103, + 0x81C, 0x81400103, + 0x81C, 0x64420103, + 0x81C, 0x63440103, + 0x81C, 0x62460103, + 0x81C, 0x61480103, + 0x81C, 0x454A0103, + 0x81C, 0x444C0103, + 0x81C, 0x434E0103, + 0x81C, 0x42500103, + 0x81C, 0x25520103, + 0x81C, 0x24540103, + 0x81C, 0x23560103, + 0x81C, 0x06580103, + 0x81C, 0x055A0103, + 0x81C, 0x045C0103, + 0x81C, 0x035E0103, + 0x81C, 0x02600103, + 0x81C, 0x01620103, + 0x81C, 0x01640103, + 0x81C, 0x01660103, + 0x81C, 0x01680103, + 0x81C, 0x016A0103, + 0x81C, 0x016C0103, + 0x81C, 0x016E0103, + 0x81C, 0x01700103, + 0x81C, 0x01720103, + 0x81C, 0x01740103, + 0x81C, 0x01760103, + 0x81C, 0x01780103, + 0x81C, 0x017A0103, + 0x81C, 0x017C0103, + 0x81C, 0x017E0103, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x81C, 0xFC000103, + 0x81C, 0xFB020103, + 0x81C, 0xFA040103, + 0x81C, 0xF9060103, + 0x81C, 0xF8080103, + 0x81C, 0xF70A0103, + 0x81C, 0xF60C0103, + 0x81C, 0xF50E0103, + 0x81C, 0xF4100103, + 0x81C, 0xF3120103, + 0x81C, 0xF2140103, + 0x81C, 0xF1160103, + 0x81C, 0xF0180103, + 0x81C, 0xEF1A0103, + 0x81C, 0xEE1C0103, + 0x81C, 0xED1E0103, + 0x81C, 0xEC200103, + 0x81C, 0xEB220103, + 0x81C, 0xEA240103, + 0x81C, 0xE9260103, + 0x81C, 0xE8280103, + 0x81C, 0xE72A0103, + 0x81C, 0xE62C0103, + 0x81C, 0xE52E0103, + 0x81C, 0xE4300103, + 0x81C, 0xE3320103, + 0x81C, 0xE2340103, + 0x81C, 0xE1360103, + 0x81C, 0x87380103, + 0x81C, 0x863A0103, + 0x81C, 0x853C0103, + 0x81C, 0x843E0103, + 0x81C, 0x83400103, + 0x81C, 0x82420103, + 0x81C, 0x81440103, + 0x81C, 0x64460103, + 0x81C, 0x63480103, + 0x81C, 0x624A0103, + 0x81C, 0x464C0103, + 0x81C, 0x454E0103, + 0x81C, 0x44500103, + 0x81C, 0x43520103, + 0x81C, 0x26540103, + 0x81C, 0x25560103, + 0x81C, 0x24580103, + 0x81C, 0x075A0103, + 0x81C, 0x065C0103, + 0x81C, 0x055E0103, + 0x81C, 0x04600103, + 0x81C, 0x03620103, + 0x81C, 0x02640103, + 0x81C, 0x01660103, + 0x81C, 0x01680103, + 0x81C, 0x016A0103, + 0x81C, 0x016C0103, + 0x81C, 0x016E0103, + 0x81C, 0x01700103, + 0x81C, 0x01720103, + 0x81C, 0x01740103, + 0x81C, 0x01760103, + 0x81C, 0x01780103, + 0x81C, 0x017A0103, + 0x81C, 0x017C0103, + 0x81C, 0x017E0103, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x81C, 0xF9000103, + 0x81C, 0xF8020103, + 0x81C, 0xF7040103, + 0x81C, 0xF6060103, + 0x81C, 0xF5080103, + 0x81C, 0xF40A0103, + 0x81C, 0xF30C0103, + 0x81C, 0xF20E0103, + 0x81C, 0xF1100103, + 0x81C, 0xF0120103, + 0x81C, 0xEF140103, + 0x81C, 0xEE160103, + 0x81C, 0xED180103, + 0x81C, 0xEC1A0103, + 0x81C, 0xEB1C0103, + 0x81C, 0xEA1E0103, + 0x81C, 0xE9200103, + 0x81C, 0xE8220103, + 0x81C, 0xE7240103, + 0x81C, 0xE6260103, + 0x81C, 0xE5280103, + 0x81C, 0xE42A0103, + 0x81C, 0xE32C0103, + 0x81C, 0xE22E0103, + 0x81C, 0xA6300103, + 0x81C, 0xA5320103, + 0x81C, 0xA4340103, + 0x81C, 0xA3360103, + 0x81C, 0xA2380103, + 0x81C, 0xA13A0103, + 0x81C, 0x843C0103, + 0x81C, 0x833E0103, + 0x81C, 0x82400103, + 0x81C, 0x81420103, + 0x81C, 0x64440103, + 0x81C, 0x63460103, + 0x81C, 0x62480103, + 0x81C, 0x614A0103, + 0x81C, 0x444C0103, + 0x81C, 0x434E0103, + 0x81C, 0x42500103, + 0x81C, 0x41520103, + 0x81C, 0x25540103, + 0x81C, 0x24560103, + 0x81C, 0x23580103, + 0x81C, 0x225A0103, + 0x81C, 0x055C0103, + 0x81C, 0x045E0103, + 0x81C, 0x03600103, + 0x81C, 0x02620103, + 0x81C, 0x01640103, + 0x81C, 0x01660103, + 0x81C, 0x01680103, + 0x81C, 0x016A0103, + 0x81C, 0x016C0103, + 0x81C, 0x016E0103, + 0x81C, 0x01700103, + 0x81C, 0x01720103, + 0x81C, 0x01740103, + 0x81C, 0x01760103, + 0x81C, 0x01780103, + 0x81C, 0x017A0103, + 0x81C, 0x017C0103, + 0x81C, 0x017E0103, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x81C, 0xFD000103, + 0x81C, 0xFC020103, + 0x81C, 0xFB040103, + 0x81C, 0xFA060103, + 0x81C, 0xF9080103, + 0x81C, 0xF80A0103, + 0x81C, 0xF70C0103, + 0x81C, 0xF60E0103, + 0x81C, 0xF5100103, + 0x81C, 0xF4120103, + 0x81C, 0xF3140103, + 0x81C, 0xF2160103, + 0x81C, 0xF1180103, + 0x81C, 0xF01A0103, + 0x81C, 0xEF1C0103, + 0x81C, 0xEE1E0103, + 0x81C, 0xED200103, + 0x81C, 0xEC220103, + 0x81C, 0xEB240103, + 0x81C, 0xEA260103, + 0x81C, 0xE9280103, + 0x81C, 0xE82A0103, + 0x81C, 0xE72C0103, + 0x81C, 0xE62E0103, + 0x81C, 0xE5300103, + 0x81C, 0xE4320103, + 0x81C, 0xE3340103, + 0x81C, 0xE2360103, + 0x81C, 0xE1380103, + 0x81C, 0xA33A0103, + 0x81C, 0xA23C0103, + 0x81C, 0xA13E0103, + 0x81C, 0x84400103, + 0x81C, 0x83420103, + 0x81C, 0x82440103, + 0x81C, 0x81460103, + 0x81C, 0x64480103, + 0x81C, 0x634A0103, + 0x81C, 0x624C0103, + 0x81C, 0x614E0103, + 0x81C, 0x45500103, + 0x81C, 0x44520103, + 0x81C, 0x43540103, + 0x81C, 0x42560103, + 0x81C, 0x25580103, + 0x81C, 0x245A0103, + 0x81C, 0x235C0103, + 0x81C, 0x065E0103, + 0x81C, 0x05600103, + 0x81C, 0x04620103, + 0x81C, 0x03640103, + 0x81C, 0x02660103, + 0x81C, 0x01680103, + 0x81C, 0x016A0103, + 0x81C, 0x016C0103, + 0x81C, 0x016E0103, + 0x81C, 0x01700103, + 0x81C, 0x01720103, + 0x81C, 0x01740103, + 0x81C, 0x01760103, + 0x81C, 0x01780103, + 0x81C, 0x017A0103, + 0x81C, 0x017C0103, + 0x81C, 0x017E0103, + 0xA0000000, 0x00000000, + 0x81C, 0xFF000103, + 0x81C, 0xFE020103, + 0x81C, 0xFD040103, + 0x81C, 0xFC060103, + 0x81C, 0xFB080103, + 0x81C, 0xFA0A0103, + 0x81C, 0xF90C0103, + 0x81C, 0xF80E0103, + 0x81C, 0xF7100103, + 0x81C, 0xF6120103, + 0x81C, 0xF5140103, + 0x81C, 0xF4160103, + 0x81C, 0xF3180103, + 0x81C, 0xF21A0103, + 0x81C, 0xF11C0103, + 0x81C, 0xF01E0103, + 0x81C, 0xEF200103, + 0x81C, 0xEE220103, + 0x81C, 0xED240103, + 0x81C, 0xEC260103, + 0x81C, 0xEB280103, + 0x81C, 0xEA2A0103, + 0x81C, 0xE92C0103, + 0x81C, 0xE82E0103, + 0x81C, 0xE7300103, + 0x81C, 0xE6320103, + 0x81C, 0xE5340103, + 0x81C, 0xE4360103, + 0x81C, 0xE3380103, + 0x81C, 0xE23A0103, + 0x81C, 0xE13C0103, + 0x81C, 0xA43E0103, + 0x81C, 0xA3400103, + 0x81C, 0xA2420103, + 0x81C, 0xA1440103, + 0x81C, 0x86460103, + 0x81C, 0x85480103, + 0x81C, 0x844A0103, + 0x81C, 0x834C0103, + 0x81C, 0x824E0103, + 0x81C, 0x81500103, + 0x81C, 0x64520103, + 0x81C, 0x63540103, + 0x81C, 0x62560103, + 0x81C, 0x61580103, + 0x81C, 0x435A0103, + 0x81C, 0x425C0103, + 0x81C, 0x415E0103, + 0x81C, 0x25600103, + 0x81C, 0x24620103, + 0x81C, 0x06640103, + 0x81C, 0x05660103, + 0x81C, 0x04680103, + 0x81C, 0x036A0103, + 0x81C, 0x026C0103, + 0x81C, 0x016E0103, + 0x81C, 0x01700103, + 0x81C, 0x01720103, + 0x81C, 0x01740103, + 0x81C, 0x01760103, + 0x81C, 0x01780103, + 0x81C, 0x017A0103, + 0x81C, 0x017C0103, + 0x81C, 0x017E0103, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x81C, 0xFC000203, + 0x81C, 0xFB020203, + 0x81C, 0xFA040203, + 0x81C, 0xF9060203, + 0x81C, 0xF8080203, + 0x81C, 0xF70A0203, + 0x81C, 0xF60C0203, + 0x81C, 0xF50E0203, + 0x81C, 0xF4100203, + 0x81C, 0xF3120203, + 0x81C, 0xF2140203, + 0x81C, 0xF1160203, + 0x81C, 0xF0180203, + 0x81C, 0xEF1A0203, + 0x81C, 0xEE1C0203, + 0x81C, 0xED1E0203, + 0x81C, 0xEC200203, + 0x81C, 0xEB220203, + 0x81C, 0xEA240203, + 0x81C, 0xE9260203, + 0x81C, 0xE8280203, + 0x81C, 0xE72A0203, + 0x81C, 0xE62C0203, + 0x81C, 0xE52E0203, + 0x81C, 0xE4300203, + 0x81C, 0xE3320203, + 0x81C, 0xE2340203, + 0x81C, 0xE1360203, + 0x81C, 0xA5380203, + 0x81C, 0xA43A0203, + 0x81C, 0xA33C0203, + 0x81C, 0x853E0203, + 0x81C, 0x84400203, + 0x81C, 0x83420203, + 0x81C, 0x82440203, + 0x81C, 0x81460203, + 0x81C, 0x64480203, + 0x81C, 0x634A0203, + 0x81C, 0x624C0203, + 0x81C, 0x614E0203, + 0x81C, 0x46500203, + 0x81C, 0x45520203, + 0x81C, 0x44540203, + 0x81C, 0x43560203, + 0x81C, 0x25580203, + 0x81C, 0x245A0203, + 0x81C, 0x235C0203, + 0x81C, 0x075E0203, + 0x81C, 0x06600203, + 0x81C, 0x05620203, + 0x81C, 0x04640203, + 0x81C, 0x03660203, + 0x81C, 0x02680203, + 0x81C, 0x016A0203, + 0x81C, 0x016C0203, + 0x81C, 0x016E0203, + 0x81C, 0x01700203, + 0x81C, 0x01720203, + 0x81C, 0x01740203, + 0x81C, 0x01760203, + 0x81C, 0x01780203, + 0x81C, 0x017A0203, + 0x81C, 0x017C0203, + 0x81C, 0x017E0203, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x81C, 0xF8000203, + 0x81C, 0xF7020203, + 0x81C, 0xF6040203, + 0x81C, 0xF5060203, + 0x81C, 0xF4080203, + 0x81C, 0xF30A0203, + 0x81C, 0xF20C0203, + 0x81C, 0xF10E0203, + 0x81C, 0xF0100203, + 0x81C, 0xEF120203, + 0x81C, 0xEE140203, + 0x81C, 0xED160203, + 0x81C, 0xEC180203, + 0x81C, 0xEB1A0203, + 0x81C, 0xEA1C0203, + 0x81C, 0xE91E0203, + 0x81C, 0xE8200203, + 0x81C, 0xE7220203, + 0x81C, 0xE6240203, + 0x81C, 0xE5260203, + 0x81C, 0xE4280203, + 0x81C, 0xE32A0203, + 0x81C, 0xE22C0203, + 0x81C, 0xE12E0203, + 0x81C, 0xA6300203, + 0x81C, 0xA5320203, + 0x81C, 0xA4340203, + 0x81C, 0xA3360203, + 0x81C, 0xA2380203, + 0x81C, 0x853A0203, + 0x81C, 0x843C0203, + 0x81C, 0x833E0203, + 0x81C, 0x82400203, + 0x81C, 0x81420203, + 0x81C, 0x64440203, + 0x81C, 0x63460203, + 0x81C, 0x62480203, + 0x81C, 0x614A0203, + 0x81C, 0x444C0203, + 0x81C, 0x434E0203, + 0x81C, 0x42500203, + 0x81C, 0x25520203, + 0x81C, 0x24540203, + 0x81C, 0x23560203, + 0x81C, 0x06580203, + 0x81C, 0x055A0203, + 0x81C, 0x045C0203, + 0x81C, 0x035E0203, + 0x81C, 0x02600203, + 0x81C, 0x01620203, + 0x81C, 0x01640203, + 0x81C, 0x01660203, + 0x81C, 0x01680203, + 0x81C, 0x016A0203, + 0x81C, 0x016C0203, + 0x81C, 0x016E0203, + 0x81C, 0x01700203, + 0x81C, 0x01720203, + 0x81C, 0x01740203, + 0x81C, 0x01760203, + 0x81C, 0x01780203, + 0x81C, 0x017A0203, + 0x81C, 0x017C0203, + 0x81C, 0x017E0203, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x81C, 0xFC000203, + 0x81C, 0xFB020203, + 0x81C, 0xFA040203, + 0x81C, 0xF9060203, + 0x81C, 0xF8080203, + 0x81C, 0xF70A0203, + 0x81C, 0xF60C0203, + 0x81C, 0xF50E0203, + 0x81C, 0xF4100203, + 0x81C, 0xF3120203, + 0x81C, 0xF2140203, + 0x81C, 0xF1160203, + 0x81C, 0xF0180203, + 0x81C, 0xEF1A0203, + 0x81C, 0xEE1C0203, + 0x81C, 0xED1E0203, + 0x81C, 0xEC200203, + 0x81C, 0xEB220203, + 0x81C, 0xEA240203, + 0x81C, 0xE9260203, + 0x81C, 0xE8280203, + 0x81C, 0xE72A0203, + 0x81C, 0xE62C0203, + 0x81C, 0xE52E0203, + 0x81C, 0xE4300203, + 0x81C, 0xE3320203, + 0x81C, 0xE2340203, + 0x81C, 0xE1360203, + 0x81C, 0x87380203, + 0x81C, 0x863A0203, + 0x81C, 0x853C0203, + 0x81C, 0x843E0203, + 0x81C, 0x83400203, + 0x81C, 0x82420203, + 0x81C, 0x81440203, + 0x81C, 0x64460203, + 0x81C, 0x63480203, + 0x81C, 0x624A0203, + 0x81C, 0x474C0203, + 0x81C, 0x464E0203, + 0x81C, 0x45500203, + 0x81C, 0x44520203, + 0x81C, 0x43540203, + 0x81C, 0x42560203, + 0x81C, 0x24580203, + 0x81C, 0x235A0203, + 0x81C, 0x075C0203, + 0x81C, 0x065E0203, + 0x81C, 0x05600203, + 0x81C, 0x04620203, + 0x81C, 0x03640203, + 0x81C, 0x02660203, + 0x81C, 0x01680203, + 0x81C, 0x016A0203, + 0x81C, 0x016C0203, + 0x81C, 0x016E0203, + 0x81C, 0x01700203, + 0x81C, 0x01720203, + 0x81C, 0x01740203, + 0x81C, 0x01760203, + 0x81C, 0x01780203, + 0x81C, 0x017A0203, + 0x81C, 0x017C0203, + 0x81C, 0x017E0203, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x81C, 0xF8000203, + 0x81C, 0xF7020203, + 0x81C, 0xF6040203, + 0x81C, 0xF5060203, + 0x81C, 0xF4080203, + 0x81C, 0xF30A0203, + 0x81C, 0xF20C0203, + 0x81C, 0xF10E0203, + 0x81C, 0xF0100203, + 0x81C, 0xEF120203, + 0x81C, 0xEE140203, + 0x81C, 0xED160203, + 0x81C, 0xEC180203, + 0x81C, 0xEB1A0203, + 0x81C, 0xEA1C0203, + 0x81C, 0xE91E0203, + 0x81C, 0xE8200203, + 0x81C, 0xE7220203, + 0x81C, 0xE6240203, + 0x81C, 0xE5260203, + 0x81C, 0xE4280203, + 0x81C, 0xE32A0203, + 0x81C, 0xE22C0203, + 0x81C, 0xE12E0203, + 0x81C, 0xA6300203, + 0x81C, 0xA5320203, + 0x81C, 0xA4340203, + 0x81C, 0xA3360203, + 0x81C, 0xA2380203, + 0x81C, 0xA13A0203, + 0x81C, 0x843C0203, + 0x81C, 0x833E0203, + 0x81C, 0x82400203, + 0x81C, 0x81420203, + 0x81C, 0x64440203, + 0x81C, 0x63460203, + 0x81C, 0x62480203, + 0x81C, 0x614A0203, + 0x81C, 0x444C0203, + 0x81C, 0x434E0203, + 0x81C, 0x42500203, + 0x81C, 0x41520203, + 0x81C, 0x25540203, + 0x81C, 0x24560203, + 0x81C, 0x23580203, + 0x81C, 0x065A0203, + 0x81C, 0x055C0203, + 0x81C, 0x045E0203, + 0x81C, 0x03600203, + 0x81C, 0x02620203, + 0x81C, 0x01640203, + 0x81C, 0x01660203, + 0x81C, 0x01680203, + 0x81C, 0x016A0203, + 0x81C, 0x016C0203, + 0x81C, 0x016E0203, + 0x81C, 0x01700203, + 0x81C, 0x01720203, + 0x81C, 0x01740203, + 0x81C, 0x01760203, + 0x81C, 0x01780203, + 0x81C, 0x017A0203, + 0x81C, 0x017C0203, + 0x81C, 0x017E0203, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x81C, 0xFB000203, + 0x81C, 0xFA020203, + 0x81C, 0xF9040203, + 0x81C, 0xF8060203, + 0x81C, 0xF7080203, + 0x81C, 0xF60A0203, + 0x81C, 0xF50C0203, + 0x81C, 0xF40E0203, + 0x81C, 0xF3100203, + 0x81C, 0xF2120203, + 0x81C, 0xF1140203, + 0x81C, 0xF0160203, + 0x81C, 0xEF180203, + 0x81C, 0xEE1A0203, + 0x81C, 0xED1C0203, + 0x81C, 0xEC1E0203, + 0x81C, 0xEB200203, + 0x81C, 0xEA220203, + 0x81C, 0xE9240203, + 0x81C, 0xE8260203, + 0x81C, 0xE7280203, + 0x81C, 0xE62A0203, + 0x81C, 0xE52C0203, + 0x81C, 0xE42E0203, + 0x81C, 0xE3300203, + 0x81C, 0xE2320203, + 0x81C, 0xE1340203, + 0x81C, 0xA5360203, + 0x81C, 0xA4380203, + 0x81C, 0xA33A0203, + 0x81C, 0xA23C0203, + 0x81C, 0x843E0203, + 0x81C, 0x83400203, + 0x81C, 0x82420203, + 0x81C, 0x81440203, + 0x81C, 0x64460203, + 0x81C, 0x63480203, + 0x81C, 0x624A0203, + 0x81C, 0x614C0203, + 0x81C, 0x474E0203, + 0x81C, 0x46500203, + 0x81C, 0x45520203, + 0x81C, 0x44540203, + 0x81C, 0x43560203, + 0x81C, 0x25580203, + 0x81C, 0x245A0203, + 0x81C, 0x235C0203, + 0x81C, 0x075E0203, + 0x81C, 0x06600203, + 0x81C, 0x05620203, + 0x81C, 0x04640203, + 0x81C, 0x03660203, + 0x81C, 0x02680203, + 0x81C, 0x016A0203, + 0x81C, 0x016C0203, + 0x81C, 0x016E0203, + 0x81C, 0x01700203, + 0x81C, 0x01720203, + 0x81C, 0x01740203, + 0x81C, 0x01760203, + 0x81C, 0x01780203, + 0x81C, 0x017A0203, + 0x81C, 0x017C0203, + 0x81C, 0x017E0203, + 0xA0000000, 0x00000000, + 0x81C, 0xFF000203, + 0x81C, 0xFF020203, + 0x81C, 0xFE040203, + 0x81C, 0xFD060203, + 0x81C, 0xFC080203, + 0x81C, 0xFB0A0203, + 0x81C, 0xFA0C0203, + 0x81C, 0xF90E0203, + 0x81C, 0xF8100203, + 0x81C, 0xF7120203, + 0x81C, 0xF6140203, + 0x81C, 0xF5160203, + 0x81C, 0xF4180203, + 0x81C, 0xF31A0203, + 0x81C, 0xF21C0203, + 0x81C, 0xF11E0203, + 0x81C, 0xF0200203, + 0x81C, 0xEF220203, + 0x81C, 0xEE240203, + 0x81C, 0xED260203, + 0x81C, 0xEC280203, + 0x81C, 0xEB2A0203, + 0x81C, 0xEA2C0203, + 0x81C, 0xE92E0203, + 0x81C, 0xE8300203, + 0x81C, 0xE7320203, + 0x81C, 0xE6340203, + 0x81C, 0xE5360203, + 0x81C, 0xE4380203, + 0x81C, 0xE33A0203, + 0x81C, 0xE23C0203, + 0x81C, 0xE13E0203, + 0x81C, 0xA4400203, + 0x81C, 0xA3420203, + 0x81C, 0xA2440203, + 0x81C, 0xA1460203, + 0x81C, 0x85480203, + 0x81C, 0x844A0203, + 0x81C, 0x834C0203, + 0x81C, 0x824E0203, + 0x81C, 0x81500203, + 0x81C, 0x64520203, + 0x81C, 0x63540203, + 0x81C, 0x62560203, + 0x81C, 0x61580203, + 0x81C, 0x445A0203, + 0x81C, 0x435C0203, + 0x81C, 0x425E0203, + 0x81C, 0x25600203, + 0x81C, 0x24620203, + 0x81C, 0x06640203, + 0x81C, 0x05660203, + 0x81C, 0x04680203, + 0x81C, 0x036A0203, + 0x81C, 0x026C0203, + 0x81C, 0x016E0203, + 0x81C, 0x01700203, + 0x81C, 0x01720203, + 0x81C, 0x01740203, + 0x81C, 0x01760203, + 0x81C, 0x01780203, + 0x81C, 0x017A0203, + 0x81C, 0x017C0203, + 0x81C, 0x017E0203, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x81C, 0xF9000303, + 0x81C, 0xF8020303, + 0x81C, 0xF7040303, + 0x81C, 0xF6060303, + 0x81C, 0xF5080303, + 0x81C, 0xF40A0303, + 0x81C, 0xF30C0303, + 0x81C, 0xF20E0303, + 0x81C, 0xF1100303, + 0x81C, 0xF0120303, + 0x81C, 0xEF140303, + 0x81C, 0xEE160303, + 0x81C, 0xED180303, + 0x81C, 0xEC1A0303, + 0x81C, 0xEB1C0303, + 0x81C, 0xEA1E0303, + 0x81C, 0xE9200303, + 0x81C, 0xE8220303, + 0x81C, 0xE7240303, + 0x81C, 0xE6260303, + 0x81C, 0xE5280303, + 0x81C, 0xE42A0303, + 0x81C, 0xE32C0303, + 0x81C, 0xE22E0303, + 0x81C, 0xE1300303, + 0x81C, 0xA6320303, + 0x81C, 0xA5340303, + 0x81C, 0xA4360303, + 0x81C, 0xA3380303, + 0x81C, 0xA23A0303, + 0x81C, 0xA13C0303, + 0x81C, 0x853E0303, + 0x81C, 0x84400303, + 0x81C, 0x83420303, + 0x81C, 0x82440303, + 0x81C, 0x81460303, + 0x81C, 0x64480303, + 0x81C, 0x634A0303, + 0x81C, 0x624C0303, + 0x81C, 0x614E0303, + 0x81C, 0x44500303, + 0x81C, 0x43520303, + 0x81C, 0x42540303, + 0x81C, 0x41560303, + 0x81C, 0x25580303, + 0x81C, 0x245A0303, + 0x81C, 0x235C0303, + 0x81C, 0x055E0303, + 0x81C, 0x04600303, + 0x81C, 0x03620303, + 0x81C, 0x02640303, + 0x81C, 0x01660303, + 0x81C, 0x01680303, + 0x81C, 0x016A0303, + 0x81C, 0x016C0303, + 0x81C, 0x016E0303, + 0x81C, 0x01700303, + 0x81C, 0x01720303, + 0x81C, 0x01740303, + 0x81C, 0x01760303, + 0x81C, 0x01780303, + 0x81C, 0x017A0303, + 0x81C, 0x017C0303, + 0x81C, 0x017E0303, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x81C, 0xF7000303, + 0x81C, 0xF6020303, + 0x81C, 0xF5040303, + 0x81C, 0xF4060303, + 0x81C, 0xF3080303, + 0x81C, 0xF20A0303, + 0x81C, 0xF10C0303, + 0x81C, 0xF00E0303, + 0x81C, 0xEF100303, + 0x81C, 0xEE120303, + 0x81C, 0xED140303, + 0x81C, 0xEC160303, + 0x81C, 0xEB180303, + 0x81C, 0xEA1A0303, + 0x81C, 0xE91C0303, + 0x81C, 0xE81E0303, + 0x81C, 0xE7200303, + 0x81C, 0xE6220303, + 0x81C, 0xE5240303, + 0x81C, 0xE4260303, + 0x81C, 0xE3280303, + 0x81C, 0xC32A0303, + 0x81C, 0xC22C0303, + 0x81C, 0xC12E0303, + 0x81C, 0xA5300303, + 0x81C, 0xA4320303, + 0x81C, 0xA3340303, + 0x81C, 0xA2360303, + 0x81C, 0xA1380303, + 0x81C, 0x853A0303, + 0x81C, 0x843C0303, + 0x81C, 0x833E0303, + 0x81C, 0x82400303, + 0x81C, 0x81420303, + 0x81C, 0x64440303, + 0x81C, 0x63460303, + 0x81C, 0x62480303, + 0x81C, 0x614A0303, + 0x81C, 0x454C0303, + 0x81C, 0x444E0303, + 0x81C, 0x43500303, + 0x81C, 0x25520303, + 0x81C, 0x24540303, + 0x81C, 0x23560303, + 0x81C, 0x06580303, + 0x81C, 0x055A0303, + 0x81C, 0x045C0303, + 0x81C, 0x035E0303, + 0x81C, 0x02600303, + 0x81C, 0x01620303, + 0x81C, 0x01640303, + 0x81C, 0x01660303, + 0x81C, 0x01680303, + 0x81C, 0x016A0303, + 0x81C, 0x016C0303, + 0x81C, 0x016E0303, + 0x81C, 0x01700303, + 0x81C, 0x01720303, + 0x81C, 0x01740303, + 0x81C, 0x01760303, + 0x81C, 0x01780303, + 0x81C, 0x017A0303, + 0x81C, 0x017C0303, + 0x81C, 0x017E0303, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x81C, 0xF9000303, + 0x81C, 0xF8020303, + 0x81C, 0xF7040303, + 0x81C, 0xF6060303, + 0x81C, 0xF5080303, + 0x81C, 0xF40A0303, + 0x81C, 0xF30C0303, + 0x81C, 0xF20E0303, + 0x81C, 0xF1100303, + 0x81C, 0xF0120303, + 0x81C, 0xEF140303, + 0x81C, 0xEE160303, + 0x81C, 0xED180303, + 0x81C, 0xEC1A0303, + 0x81C, 0xEB1C0303, + 0x81C, 0xEA1E0303, + 0x81C, 0xE9200303, + 0x81C, 0xE8220303, + 0x81C, 0xE7240303, + 0x81C, 0xE6260303, + 0x81C, 0xE5280303, + 0x81C, 0xE42A0303, + 0x81C, 0xE32C0303, + 0x81C, 0xE22E0303, + 0x81C, 0xE1300303, + 0x81C, 0xA4320303, + 0x81C, 0xA3340303, + 0x81C, 0xA2360303, + 0x81C, 0xA1380303, + 0x81C, 0x853A0303, + 0x81C, 0x843C0303, + 0x81C, 0x833E0303, + 0x81C, 0x82400303, + 0x81C, 0x81420303, + 0x81C, 0x64440303, + 0x81C, 0x63460303, + 0x81C, 0x62480303, + 0x81C, 0x614A0303, + 0x81C, 0x444C0303, + 0x81C, 0x434E0303, + 0x81C, 0x42500303, + 0x81C, 0x25520303, + 0x81C, 0x24540303, + 0x81C, 0x23560303, + 0x81C, 0x07580303, + 0x81C, 0x065A0303, + 0x81C, 0x055C0303, + 0x81C, 0x045E0303, + 0x81C, 0x03600303, + 0x81C, 0x02620303, + 0x81C, 0x01640303, + 0x81C, 0x01660303, + 0x81C, 0x01680303, + 0x81C, 0x016A0303, + 0x81C, 0x016C0303, + 0x81C, 0x016E0303, + 0x81C, 0x01700303, + 0x81C, 0x01720303, + 0x81C, 0x01740303, + 0x81C, 0x01760303, + 0x81C, 0x01780303, + 0x81C, 0x017A0303, + 0x81C, 0x017C0303, + 0x81C, 0x017E0303, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x81C, 0xF7000303, + 0x81C, 0xF6020303, + 0x81C, 0xF5040303, + 0x81C, 0xF4060303, + 0x81C, 0xF3080303, + 0x81C, 0xF20A0303, + 0x81C, 0xF10C0303, + 0x81C, 0xF00E0303, + 0x81C, 0xEF100303, + 0x81C, 0xEE120303, + 0x81C, 0xED140303, + 0x81C, 0xEC160303, + 0x81C, 0xEB180303, + 0x81C, 0xEA1A0303, + 0x81C, 0xE91C0303, + 0x81C, 0xE81E0303, + 0x81C, 0xE7200303, + 0x81C, 0xE6220303, + 0x81C, 0xE5240303, + 0x81C, 0xE4260303, + 0x81C, 0xE3280303, + 0x81C, 0xE22A0303, + 0x81C, 0xE12C0303, + 0x81C, 0xA72E0303, + 0x81C, 0xA6300303, + 0x81C, 0xA5320303, + 0x81C, 0xA4340303, + 0x81C, 0xA3360303, + 0x81C, 0xA2380303, + 0x81C, 0xA13A0303, + 0x81C, 0x843C0303, + 0x81C, 0x833E0303, + 0x81C, 0x82400303, + 0x81C, 0x81420303, + 0x81C, 0x64440303, + 0x81C, 0x63460303, + 0x81C, 0x62480303, + 0x81C, 0x614A0303, + 0x81C, 0x454C0303, + 0x81C, 0x444E0303, + 0x81C, 0x43500303, + 0x81C, 0x42520303, + 0x81C, 0x41540303, + 0x81C, 0x24560303, + 0x81C, 0x23580303, + 0x81C, 0x065A0303, + 0x81C, 0x055C0303, + 0x81C, 0x045E0303, + 0x81C, 0x03600303, + 0x81C, 0x02620303, + 0x81C, 0x01640303, + 0x81C, 0x01660303, + 0x81C, 0x01680303, + 0x81C, 0x016A0303, + 0x81C, 0x016C0303, + 0x81C, 0x016E0303, + 0x81C, 0x01700303, + 0x81C, 0x01720303, + 0x81C, 0x01740303, + 0x81C, 0x01760303, + 0x81C, 0x01780303, + 0x81C, 0x017A0303, + 0x81C, 0x017C0303, + 0x81C, 0x017E0303, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x81C, 0xFB000303, + 0x81C, 0xFA020303, + 0x81C, 0xF9040303, + 0x81C, 0xF8060303, + 0x81C, 0xF7080303, + 0x81C, 0xF60A0303, + 0x81C, 0xF50C0303, + 0x81C, 0xF40E0303, + 0x81C, 0xF3100303, + 0x81C, 0xF2120303, + 0x81C, 0xF1140303, + 0x81C, 0xF0160303, + 0x81C, 0xEF180303, + 0x81C, 0xEE1A0303, + 0x81C, 0xED1C0303, + 0x81C, 0xEC1E0303, + 0x81C, 0xEB200303, + 0x81C, 0xEA220303, + 0x81C, 0xE9240303, + 0x81C, 0xE8260303, + 0x81C, 0xE7280303, + 0x81C, 0xE62A0303, + 0x81C, 0xE52C0303, + 0x81C, 0xE42E0303, + 0x81C, 0xE3300303, + 0x81C, 0xE2320303, + 0x81C, 0xE1340303, + 0x81C, 0xC2360303, + 0x81C, 0xC1380303, + 0x81C, 0xA33A0303, + 0x81C, 0xA23C0303, + 0x81C, 0x853E0303, + 0x81C, 0x84400303, + 0x81C, 0x83420303, + 0x81C, 0x66440303, + 0x81C, 0x65460303, + 0x81C, 0x64480303, + 0x81C, 0x634A0303, + 0x81C, 0x624C0303, + 0x81C, 0x614E0303, + 0x81C, 0x45500303, + 0x81C, 0x44520303, + 0x81C, 0x43540303, + 0x81C, 0x42560303, + 0x81C, 0x25580303, + 0x81C, 0x245A0303, + 0x81C, 0x235C0303, + 0x81C, 0x065E0303, + 0x81C, 0x05600303, + 0x81C, 0x04620303, + 0x81C, 0x03640303, + 0x81C, 0x02660303, + 0x81C, 0x01680303, + 0x81C, 0x016A0303, + 0x81C, 0x016C0303, + 0x81C, 0x016E0303, + 0x81C, 0x01700303, + 0x81C, 0x01720303, + 0x81C, 0x01740303, + 0x81C, 0x01760303, + 0x81C, 0x01780303, + 0x81C, 0x017A0303, + 0x81C, 0x017C0303, + 0x81C, 0x017E0303, + 0xA0000000, 0x00000000, + 0x81C, 0xFD000303, + 0x81C, 0xFC020303, + 0x81C, 0xFB040303, + 0x81C, 0xFA060303, + 0x81C, 0xF9080303, + 0x81C, 0xF80A0303, + 0x81C, 0xF70C0303, + 0x81C, 0xF60E0303, + 0x81C, 0xF5100303, + 0x81C, 0xF4120303, + 0x81C, 0xF3140303, + 0x81C, 0xF2160303, + 0x81C, 0xF1180303, + 0x81C, 0xF01A0303, + 0x81C, 0xEF1C0303, + 0x81C, 0xEE1E0303, + 0x81C, 0xED200303, + 0x81C, 0xEC220303, + 0x81C, 0xEB240303, + 0x81C, 0xEA260303, + 0x81C, 0xE9280303, + 0x81C, 0xE82A0303, + 0x81C, 0xE72C0303, + 0x81C, 0xE62E0303, + 0x81C, 0xE5300303, + 0x81C, 0xE4320303, + 0x81C, 0xE3340303, + 0x81C, 0xE2360303, + 0x81C, 0xE1380303, + 0x81C, 0xA53A0303, + 0x81C, 0xA43C0303, + 0x81C, 0xA33E0303, + 0x81C, 0xA2400303, + 0x81C, 0xA1420303, + 0x81C, 0x87440303, + 0x81C, 0x86460303, + 0x81C, 0x85480303, + 0x81C, 0x844A0303, + 0x81C, 0x834C0303, + 0x81C, 0x824E0303, + 0x81C, 0x81500303, + 0x81C, 0x64520303, + 0x81C, 0x63540303, + 0x81C, 0x62560303, + 0x81C, 0x61580303, + 0x81C, 0x435A0303, + 0x81C, 0x425C0303, + 0x81C, 0x415E0303, + 0x81C, 0x07600303, + 0x81C, 0x06620303, + 0x81C, 0x05640303, + 0x81C, 0x04660303, + 0x81C, 0x03680303, + 0x81C, 0x026A0303, + 0x81C, 0x016C0303, + 0x81C, 0x016E0303, + 0x81C, 0x01700303, + 0x81C, 0x01720303, + 0x81C, 0x01740303, + 0x81C, 0x01760303, + 0x81C, 0x01780303, + 0x81C, 0x017A0303, + 0x81C, 0x017C0303, + 0x81C, 0x017E0303, + 0xB0000000, 0x00000000, + 0xC50, 0x00000022, + 0xC50, 0x00000020, + 0xE50, 0x00000022, + 0xE50, 0x00000020, + 0x1850, 0x00000022, + 0x1850, 0x00000020, + 0x1A50, 0x00000022, + 0x1A50, 0x00000020, + +}; + +void +odm_read_and_config_mp_8814a_agc_tab( + struct dm_struct* pDM_Odm +) +{ + u32 i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u32 ArrayLen = sizeof(Array_MP_8814A_AGC_TAB)/sizeof(u32); + u32* Array = Array_MP_8814A_AGC_TAB; + + u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_AGC_TAB\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigBB_AGC_8814A(pDM_Odm, v1, bMaskDWord, v2); + } + i = i + 2; + } +} + +u32 +ODM_GetVersion_MP_8814A_AGC_TAB(void) +{ + return 85; +} + +/****************************************************************************** +* PHY_REG.TXT +******************************************************************************/ + +u32 Array_MP_8814A_PHY_REG[] = { + 0x800, 0x9020D010, + 0x804, 0x08011280, + 0x808, 0x0E0282FF, + 0x80C, 0x1000002F, + 0x8000000f, 0xaaaaaaaa, 0x40000000, 0x00000000, + 0x810, 0x21101263, + 0x9000000f, 0xaa00aaaa, 0x40000000, 0x00550000, + 0x810, 0x21101263, + 0xA0000000, 0x00000000, + 0x810, 0x20101263, + 0xB0000000, 0x00000000, + 0x814, 0x020C3D10, + 0x818, 0x04A10385, + 0x820, 0x00000000, + 0x824, 0x00033E40, + 0x828, 0x00000000, + 0x82C, 0x73985170, + 0x830, 0x79A0EA08, + 0x834, 0x042E7086, + 0x8000000f, 0x55555555, 0x40000000, 0x00000000, + 0x838, 0x86667640, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x838, 0x86667641, + 0xA0000000, 0x00000000, + 0x838, 0x86667640, + 0xB0000000, 0x00000000, + 0x83C, 0x9798B9B9, + 0x840, 0x17577F60, + 0x844, 0x4BBDFCDE, + 0x848, 0x5CD07F8B, + 0x84C, 0x6CFBF7B5, + 0x850, 0x28834706, + 0x854, 0x0001520C, + 0x858, 0x4060C000, + 0x85C, 0x74210368, + 0x860, 0x6929C321, + 0x864, 0x79727432, + 0x868, 0x8CA7A314, + 0x86C, 0x438C2878, + 0x870, 0x44444444, + 0x874, 0x21612C2E, + 0x878, 0x00003152, + 0x87C, 0x000FC000, + 0x8A0, 0x00000013, + 0x8A4, 0x7F7F7F7F, + 0x8A8, 0xA202033E, + 0x8AC, 0xF40F550A, + 0x8B0, 0x00000600, + 0x8B4, 0x000FC080, + 0x8B8, 0xEC0057FF, + 0x8BC, 0x8CA520C3, + 0x8C0, 0x3FF00020, + 0x8C4, 0x44C00000, + 0x8C8, 0x80025169, + 0x8CC, 0x08250492, + 0x8D0, 0x0000B800, + 0x8D4, 0x940008A0, + 0x8D8, 0x290B5612, + 0x8DC, 0x00000000, + 0x8E0, 0x32316407, + 0x8E4, 0x4A092925, + 0x8E8, 0xFFFFC42C, + 0x8EC, 0x99999999, + 0x8F0, 0x00009999, + 0x8F4, 0x00F80FA1, + 0x8F8, 0x400082C0, + 0x8FC, 0x00000000, + 0x900, 0x00400700, + 0x90C, 0x09004000, + 0x910, 0x0000FC00, + 0x914, 0xD6400404, + 0x918, 0x1C1028C0, + 0x91C, 0x64B11A1C, + 0x920, 0xE0767233, + 0x924, 0x055AA500, + 0x928, 0x4AB0E4E4, + 0x92C, 0xFFFE0000, + 0x930, 0xFFFFFFFE, + 0x934, 0x001FFFFF, + 0x938, 0x00008400, + 0x93C, 0x932C0642, + 0x940, 0x093E9360, + 0x944, 0x08000000, + 0x948, 0x04000000, + 0x950, 0x02010080, + 0x954, 0x86510080, + 0x960, 0x00000000, + 0x964, 0x00000000, + 0x968, 0x00000000, + 0x96C, 0x00000000, + 0x970, 0x801FFFFF, + 0x978, 0x00000000, + 0x97C, 0x00000000, + 0x980, 0x00000000, + 0x984, 0x00000000, + 0x988, 0x00000000, + 0x98C, 0x03440000, + 0x990, 0x27100000, + 0x994, 0xFFFF0100, + 0x998, 0xFFFFFF5C, + 0x99C, 0xFFFFFFFF, + 0x9A0, 0x000000FF, + 0x9A4, 0x00080080, + 0x9A8, 0x0C2F0000, + 0x9AC, 0x00560000, + 0x9B0, 0x81081008, + 0x9B4, 0x00000000, + 0x9B8, 0x01081008, + 0x9BC, 0x01081008, + 0x9D0, 0x00000000, + 0x9D4, 0x00000000, + 0x9D8, 0x00000000, + 0x9DC, 0x00000000, + 0x9E4, 0x00000002, + 0x9E8, 0x000022D5, + 0x9FC, 0xEFFFF7FF, + 0xB00, 0xE3100000, + 0xB04, 0x0000B000, + 0xB0C, 0x31EAA006, + 0xB5C, 0x41CFFFFF, + 0xC00, 0x00000007, + 0xC04, 0x00042020, + 0xC08, 0x80410231, + 0xC0C, 0x00000000, + 0xC10, 0x00000100, + 0xC14, 0x01000000, + 0xC1C, 0x40000053, + 0xC50, 0x00000020, + 0xC54, 0x00000000, + 0x8000000f, 0x55555555, 0x40000000, 0x00000000, + 0xC58, 0x3C0A0C14, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0xC58, 0x3C0A0C14, + 0xA0000000, 0x00000000, + 0xC58, 0x3C020C14, + 0xB0000000, 0x00000000, + 0xC5C, 0x0D000058, + 0xC60, 0x1B800000, + 0xC60, 0x0B800001, + 0xC60, 0x05800002, + 0xC60, 0x07800003, + 0xC60, 0x1A800004, + 0xC60, 0x0B800005, + 0xC60, 0x05800006, + 0xC60, 0x0E800007, + 0xC60, 0x1A800008, + 0xC60, 0x0B800009, + 0xC60, 0x1580000A, + 0xC60, 0x0880000B, + 0xC60, 0x1A80000C, + 0xC60, 0x0B80000D, + 0xC60, 0x0580000E, + 0xC60, 0x0E80000F, + 0xC60, 0x1A800010, + 0xC60, 0x0B800011, + 0xC60, 0x15800012, + 0xC60, 0x08800013, + 0xC60, 0x1A800014, + 0xC60, 0x0B800015, + 0xC60, 0x05800016, + 0xC60, 0x07800017, + 0xC60, 0x1A800018, + 0xC60, 0x0B800019, + 0xC60, 0x1580001A, + 0xC60, 0x0880001B, + 0xC60, 0x1B80001C, + 0xC60, 0x0B80001D, + 0xC60, 0x0580001E, + 0xC60, 0x0780001F, + 0xC60, 0x1B800020, + 0xC60, 0x0B800021, + 0xC60, 0x05800022, + 0xC60, 0x07800023, + 0xC60, 0x1B800024, + 0xC60, 0x0B800025, + 0xC60, 0x05800026, + 0xC60, 0x07800027, + 0xC60, 0x1B800028, + 0xC60, 0x0B800029, + 0xC60, 0x0580002A, + 0xC60, 0x0780002B, + 0xC60, 0x1B800030, + 0xC60, 0x0B800031, + 0xC60, 0x05800032, + 0xC60, 0x00800033, + 0xC60, 0x1B800034, + 0xC60, 0x0B800035, + 0xC60, 0x05800036, + 0xC60, 0x00800037, + 0xC60, 0x1B800038, + 0xC60, 0x0B800039, + 0xC60, 0x0580003A, + 0xC60, 0x0E80803B, + 0xC94, 0x01000401, + 0xC98, 0x00188000, + 0xCA0, 0x00002929, + 0xCA4, 0x08040201, + 0xCA8, 0x80402010, + 0xCAC, 0x77777000, + 0xCB0, 0x54775477, + 0xCB4, 0x54775477, + 0xCB8, 0x00500000, + 0xCBC, 0x77700000, + 0xCC0, 0x00000010, + 0xCC8, 0x00000010, + 0xE00, 0x00000007, + 0xE04, 0x00042020, + 0xE08, 0x80410231, + 0xE0C, 0x00000000, + 0xE10, 0x00000100, + 0xE14, 0x01000000, + 0xE1C, 0x40000053, + 0xE50, 0x00000020, + 0xE54, 0x00000000, + 0x8000000f, 0x55555555, 0x40000000, 0x00000000, + 0xE58, 0x3C0A0C14, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0xE58, 0x3C0A0C14, + 0xA0000000, 0x00000000, + 0xE58, 0x3C020C14, + 0xB0000000, 0x00000000, + 0xE5C, 0x0D000058, + 0xE60, 0x1B800000, + 0xE60, 0x0B800001, + 0xE60, 0x05800002, + 0xE60, 0x07800003, + 0xE60, 0x1A800004, + 0xE60, 0x0B800005, + 0xE60, 0x05800006, + 0xE60, 0x0E800007, + 0xE60, 0x1A800008, + 0xE60, 0x0B800009, + 0xE60, 0x1580000A, + 0xE60, 0x0880000B, + 0xE60, 0x1A80000C, + 0xE60, 0x0B80000D, + 0xE60, 0x0580000E, + 0xE60, 0x0E80000F, + 0xE60, 0x1A800010, + 0xE60, 0x0B800011, + 0xE60, 0x15800012, + 0xE60, 0x08800013, + 0xE60, 0x1A800014, + 0xE60, 0x0B800015, + 0xE60, 0x05800016, + 0xE60, 0x07800017, + 0xE60, 0x1A800018, + 0xE60, 0x0B800019, + 0xE60, 0x1580001A, + 0xE60, 0x0880001B, + 0xE60, 0x1B80001C, + 0xE60, 0x0B80001D, + 0xE60, 0x0580001E, + 0xE60, 0x0780001F, + 0xE60, 0x1B800020, + 0xE60, 0x0B800021, + 0xE60, 0x05800022, + 0xE60, 0x07800023, + 0xE60, 0x1B800024, + 0xE60, 0x0B800025, + 0xE60, 0x05800026, + 0xE60, 0x07800027, + 0xE60, 0x1B800028, + 0xE60, 0x0B800029, + 0xE60, 0x0580002A, + 0xE60, 0x0780002B, + 0xE60, 0x1B800030, + 0xE60, 0x0B800031, + 0xE60, 0x05800032, + 0xE60, 0x00800033, + 0xE60, 0x1B800034, + 0xE60, 0x0B800035, + 0xE60, 0x05800036, + 0xE60, 0x00800037, + 0xE60, 0x1B800038, + 0xE60, 0x0B800039, + 0xE60, 0x0580003A, + 0xE60, 0x0E80803B, + 0xE94, 0x01000401, + 0xE98, 0x00188000, + 0xEA0, 0x00002929, + 0xEA4, 0x08040201, + 0xEA8, 0x80402010, + 0xEAC, 0x77777000, + 0xEB0, 0x54775477, + 0xEB4, 0x54775477, + 0xEB8, 0x00500000, + 0xEBC, 0x77700000, + 0x1800, 0x00000007, + 0x1804, 0x00042020, + 0x1808, 0x80410231, + 0x180C, 0x00000000, + 0x1810, 0x00000100, + 0x1814, 0x01000000, + 0x181C, 0x40000053, + 0x1850, 0x00000020, + 0x1854, 0x00000000, + 0x8000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1858, 0x3C0A0C14, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1858, 0x3C0A0C14, + 0xA0000000, 0x00000000, + 0x1858, 0x3C020C14, + 0xB0000000, 0x00000000, + 0x185C, 0x0D000058, + 0x1860, 0x1B800000, + 0x1860, 0x0B800001, + 0x1860, 0x05800002, + 0x1860, 0x07800003, + 0x1860, 0x1A800004, + 0x1860, 0x0B800005, + 0x1860, 0x05800006, + 0x1860, 0x0E800007, + 0x1860, 0x1A800008, + 0x1860, 0x0B800009, + 0x1860, 0x1580000A, + 0x1860, 0x0880000B, + 0x1860, 0x1A80000C, + 0x1860, 0x0B80000D, + 0x1860, 0x0580000E, + 0x1860, 0x0E80000F, + 0x1860, 0x1A800010, + 0x1860, 0x0B800011, + 0x1860, 0x15800012, + 0x1860, 0x08800013, + 0x1860, 0x1A800014, + 0x1860, 0x0B800015, + 0x1860, 0x05800016, + 0x1860, 0x07800017, + 0x1860, 0x1A800018, + 0x1860, 0x0B800019, + 0x1860, 0x1580001A, + 0x1860, 0x0880001B, + 0x1860, 0x1B80001C, + 0x1860, 0x0B80001D, + 0x1860, 0x0580001E, + 0x1860, 0x0780001F, + 0x1860, 0x1B800020, + 0x1860, 0x0B800021, + 0x1860, 0x05800022, + 0x1860, 0x07800023, + 0x1860, 0x1B800024, + 0x1860, 0x0B800025, + 0x1860, 0x05800026, + 0x1860, 0x07800027, + 0x1860, 0x1B800028, + 0x1860, 0x0B800029, + 0x1860, 0x0580002A, + 0x1860, 0x0780002B, + 0x1860, 0x1B800030, + 0x1860, 0x0B800031, + 0x1860, 0x05800032, + 0x1860, 0x00800033, + 0x1860, 0x1B800034, + 0x1860, 0x0B800035, + 0x1860, 0x05800036, + 0x1860, 0x00800037, + 0x1860, 0x1B800038, + 0x1860, 0x0B800039, + 0x1860, 0x0580003A, + 0x1860, 0x0E80803B, + 0x1894, 0x01000401, + 0x1898, 0x00188000, + 0x18A0, 0x00002929, + 0x18A4, 0x08040201, + 0x18A8, 0x80402010, + 0x18AC, 0x77777000, + 0x18B0, 0x54775477, + 0x18B4, 0x54775477, + 0x18B8, 0x00500000, + 0x18BC, 0x77700000, + 0x1A00, 0x00000007, + 0x1A04, 0x00042020, + 0x1A08, 0x80410231, + 0x1A0C, 0x00000000, + 0x1A10, 0x00000100, + 0x1A14, 0x01000000, + 0x1A1C, 0x40000053, + 0x1A50, 0x00000020, + 0x1A54, 0x00000000, + 0x8000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1A58, 0x3C0A0C14, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1A58, 0x3C0A0C14, + 0xA0000000, 0x00000000, + 0x1A58, 0x3C020C14, + 0xB0000000, 0x00000000, + 0x1A5C, 0x0D000058, + 0x1A60, 0x1B800000, + 0x1A60, 0x0B800001, + 0x1A60, 0x05800002, + 0x1A60, 0x07800003, + 0x1A60, 0x1A800004, + 0x1A60, 0x0B800005, + 0x1A60, 0x05800006, + 0x1A60, 0x0E800007, + 0x1A60, 0x1A800008, + 0x1A60, 0x0B800009, + 0x1A60, 0x1580000A, + 0x1A60, 0x0880000B, + 0x1A60, 0x1A80000C, + 0x1A60, 0x0B80000D, + 0x1A60, 0x0580000E, + 0x1A60, 0x0E80000F, + 0x1A60, 0x1A800010, + 0x1A60, 0x0B800011, + 0x1A60, 0x15800012, + 0x1A60, 0x08800013, + 0x1A60, 0x1A800014, + 0x1A60, 0x0B800015, + 0x1A60, 0x05800016, + 0x1A60, 0x07800017, + 0x1A60, 0x1A800018, + 0x1A60, 0x0B800019, + 0x1A60, 0x1580001A, + 0x1A60, 0x0880001B, + 0x1A60, 0x1B80001C, + 0x1A60, 0x0B80001D, + 0x1A60, 0x0580001E, + 0x1A60, 0x0780001F, + 0x1A60, 0x1B800020, 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0xaa00aaaa, 0x40000000, 0x00550000, + 0x1B80, 0x68241C85, + 0x1B80, 0x68241C87, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x68241C85, + 0x1B80, 0x68241C87, + 0xA0000000, 0x00000000, + 0x1B80, 0x68481C85, + 0x1B80, 0x68481C87, + 0xB0000000, 0x00000000, + 0x1B80, 0x66061C95, + 0x1B80, 0x66061C97, + 0x8000000c, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x650C1CA5, + 0x1B80, 0x650C1CA7, + 0x9000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1B80, 0x650C1CA5, + 0x1B80, 0x650C1CA7, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1B80, 0x650C1CA5, + 0x1B80, 0x650C1CA7, + 0x9000000f, 0xaaaaaaaa, 0x40000000, 0x00000000, + 0x1B80, 0x650C1CA5, + 0x1B80, 0x650C1CA7, + 0x9000000f, 0xaa00aaaa, 0x40000000, 0x00550000, + 0x1B80, 0x650C1CA5, + 0x1B80, 0x650C1CA7, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x650C1CA5, + 0x1B80, 0x650C1CA7, + 0xA0000000, 0x00000000, + 0x1B80, 0x65041CA5, + 0x1B80, 0x65041CA7, + 0xB0000000, 0x00000000, + 0x1B80, 0x64471CB5, + 0x1B80, 0x64471CB7, + 0x1B80, 0x23411CC5, + 0x1B80, 0x23411CC7, + 0x1B80, 0x100E1CD5, + 0x1B80, 0x100E1CD7, + 0x8000000c, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x60101CE5, + 0x1B80, 0x60101CE7, + 0x9000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1B80, 0x60101CE5, + 0x1B80, 0x60101CE7, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1B80, 0x60101CE5, + 0x1B80, 0x60101CE7, + 0x9000000f, 0xaaaaaaaa, 0x40000000, 0x00000000, + 0x1B80, 0x60101CE5, + 0x1B80, 0x60101CE7, + 0x9000000f, 0xaa00aaaa, 0x40000000, 0x00550000, + 0x1B80, 0x60101CE5, + 0x1B80, 0x60101CE7, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x60101CE5, + 0x1B80, 0x60101CE7, + 0xA0000000, 0x00000000, + 0x1B80, 0x60011CE5, + 0x1B80, 0x60011CE7, + 0xB0000000, 0x00000000, + 0x1B80, 0x23411CF5, + 0x1B80, 0x23411CF7, + 0x8000000c, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x60811D05, + 0x1B80, 0x60811D07, + 0x9000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1B80, 0x60811D05, + 0x1B80, 0x60811D07, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1B80, 0x60811D05, + 0x1B80, 0x60811D07, + 0x9000000f, 0xaaaaaaaa, 0x40000000, 0x00000000, + 0x1B80, 0x60811D05, + 0x1B80, 0x60811D07, + 0x9000000f, 0xaa00aaaa, 0x40000000, 0x00550000, + 0x1B80, 0x60811D05, + 0x1B80, 0x60811D07, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x60811D05, + 0x1B80, 0x60811D07, + 0xA0000000, 0x00000000, + 0x1B80, 0x60611D05, + 0x1B80, 0x60611D07, + 0xB0000000, 0x00000000, + 0x1B80, 0x23411D15, + 0x1B80, 0x23411D17, + 0x1B80, 0x70E11D25, + 0x1B80, 0x70E11D27, + 0x1B80, 0x4D001D35, + 0x1B80, 0x4D001D37, + 0x1B80, 0x00011D45, + 0x1B80, 0x00011D47, + 0x1B80, 0x00041D55, + 0x1B80, 0x00041D57, + 0x1B80, 0x6B401D65, + 0x1B80, 0x6B401D67, + 0x1B80, 0x4D041D75, + 0x1B80, 0x4D041D77, + 0x1B80, 0x68481D85, + 0x1B80, 0x68481D87, + 0x1B80, 0x66061D95, + 0x1B80, 0x66061D97, + 0x8000000c, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x65081DA5, + 0x1B80, 0x65081DA7, + 0x9000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1B80, 0x65181DA5, + 0x1B80, 0x65181DA7, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1B80, 0x65181DA5, + 0x1B80, 0x65181DA7, + 0x9000000f, 0xaaaaaaaa, 0x40000000, 0x00000000, + 0x1B80, 0x65181DA5, + 0x1B80, 0x65181DA7, + 0x9000000f, 0xaa00aaaa, 0x40000000, 0x00550000, + 0x1B80, 0x65181DA5, + 0x1B80, 0x65181DA7, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x65081DA5, + 0x1B80, 0x65081DA7, + 0xA0000000, 0x00000000, + 0x1B80, 0x65081DA5, + 0x1B80, 0x65081DA7, + 0xB0000000, 0x00000000, + 0x1B80, 0x64471DB5, + 0x1B80, 0x64471DB7, + 0x1B80, 0x23411DC5, + 0x1B80, 0x23411DC7, + 0x8000000c, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x11E41DD5, + 0x1B80, 0x11E41DD7, + 0x9000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1B80, 0x11E81DD5, + 0x1B80, 0x11E81DD7, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1B80, 0x11E81DD5, + 0x1B80, 0x11E81DD7, + 0x9000000f, 0xaaaaaaaa, 0x40000000, 0x00000000, + 0x1B80, 0x11E81DD5, + 0x1B80, 0x11E81DD7, + 0x9000000f, 0xaa00aaaa, 0x40000000, 0x00550000, + 0x1B80, 0x11E81DD5, + 0x1B80, 0x11E81DD7, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x11E41DD5, + 0x1B80, 0x11E41DD7, + 0xA0000000, 0x00000000, + 0x1B80, 0x11E41DD5, + 0x1B80, 0x11E41DD7, + 0xB0000000, 0x00000000, + 0x1B80, 0x60011DE5, + 0x1B80, 0x60011DE7, + 0x1B80, 0x23411DF5, + 0x1B80, 0x23411DF7, + 0x8000000c, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x60E11E05, + 0x1B80, 0x60E11E07, + 0x9000000f, 0x55555555, 0x40000000, 0x00000000, + 0x1B80, 0x61E11E05, + 0x1B80, 0x61E11E07, + 0x9000000f, 0x55ff5555, 0x40000000, 0x00000000, + 0x1B80, 0x61E11E05, + 0x1B80, 0x61E11E07, + 0x9000000f, 0xaaaaaaaa, 0x40000000, 0x00000000, + 0x1B80, 0x61E11E05, + 0x1B80, 0x61E11E07, + 0x9000000f, 0xaa00aaaa, 0x40000000, 0x00550000, + 0x1B80, 0x61E11E05, + 0x1B80, 0x61E11E07, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x1B80, 0x60E11E05, + 0x1B80, 0x60E11E07, + 0xA0000000, 0x00000000, + 0x1B80, 0x60E11E05, + 0x1B80, 0x60E11E07, + 0xB0000000, 0x00000000, + 0x1B80, 0x23411E15, + 0x1B80, 0x23411E17, + 0x1B80, 0x70611E25, + 0x1B80, 0x70611E27, + 0x1B80, 0x4D001E35, + 0x1B80, 0x4D001E37, + 0x1B80, 0x00011E45, + 0x1B80, 0x00011E47, + 0x1B80, 0x00001E55, + 0x1B80, 0x00001E57, + 0x1B80, 0x00001E65, + 0x1B80, 0x00001E67, + 0x1B80, 0x00001E75, + 0x1B80, 0x00001E77, + 0x1B80, 0x00001E85, + 0x1B80, 0x00001E87, + 0x1B80, 0x00001E95, + 0x1B80, 0x00001E97, + 0x1B80, 0x00001EA5, + 0x1B80, 0x00001EA7, + 0x1B80, 0x00001EB5, + 0x1B80, 0x00001EB7, + 0x1B80, 0x00001EC5, + 0x1B80, 0x00001EC7, + 0x1B80, 0x00001ED5, + 0x1B80, 0x00001ED7, + 0x1B80, 0x00001EE5, + 0x1B80, 0x00001EE7, + 0x1B80, 0x00001EF5, + 0x1B80, 0x00001EF7, + 0x1B80, 0x00001F05, + 0x1B80, 0x00001F07, + 0x1B80, 0x00001F15, + 0x1B80, 0x00001F17, + 0x1B80, 0x00001F25, + 0x1B80, 0x00001F27, + 0x1B80, 0x00001F35, + 0x1B80, 0x00001F37, + 0x1B80, 0x00001F45, + 0x1B80, 0x00001F47, + 0x1B80, 0x00001F55, + 0x1B80, 0x00001F57, + 0x1B80, 0x00001F65, + 0x1B80, 0x00001F67, + 0x1B80, 0x00001F75, + 0x1B80, 0x00001F77, + 0x1B80, 0x00001F85, + 0x1B80, 0x00001F87, + 0x1B80, 0x00001F95, + 0x1B80, 0x00001F97, + 0x1B80, 0x00001FA5, + 0x1B80, 0x00001FA7, + 0x1B80, 0x00001FB5, + 0x1B80, 0x00001FB7, + 0x1B80, 0x00001FC5, + 0x1B80, 0x00001FC7, + 0x1B80, 0x00001FD5, + 0x1B80, 0x00001FD7, + 0x1B80, 0x00001FE5, + 0x1B80, 0x00001FE7, + 0x1B80, 0x00001FF5, + 0x1B80, 0x00001FF7, + 0x1B80, 0x00000006, + 0x1B80, 0x00000002, + +}; + +void +odm_read_and_config_mp_8814a_phy_reg( + struct dm_struct* pDM_Odm +) +{ + u32 i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u32 ArrayLen = sizeof(Array_MP_8814A_PHY_REG)/sizeof(u32); + u32* Array = Array_MP_8814A_PHY_REG; + + u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_PHY_REG\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigBB_PHY_8814A(pDM_Odm, v1, bMaskDWord, v2); + } + i = i + 2; + } +} + +u32 +ODM_GetVersion_MP_8814A_PHY_REG(void) +{ + return 85; +} + +/****************************************************************************** +* PHY_REG_MP.TXT +******************************************************************************/ + +u32 Array_MP_8814A_PHY_REG_MP[] = { + 0x8FC, 0x00000000, + 0x838, 0x86667641, + +}; + +void +odm_read_and_config_mp_8814a_phy_reg_mp( + struct dm_struct* pDM_Odm +) +{ + u32 i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u32 ArrayLen = sizeof(Array_MP_8814A_PHY_REG_MP)/sizeof(u32); + u32* Array = Array_MP_8814A_PHY_REG_MP; + + u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_PHY_REG_MP\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigBB_PHY_8814A(pDM_Odm, v1, bMaskDWord, v2); + } + i = i + 2; + } +} + +u32 +ODM_GetVersion_MP_8814A_PHY_REG_MP(void) +{ + return 85; +} + +/****************************************************************************** +* PHY_REG_PG.TXT +******************************************************************************/ + +u32 Array_MP_8814A_PHY_REG_PG[] = { + 0, 0, 0, 0x00000c20, 0xffffffff, 0x34363840, + 0, 0, 0, 0x00000c24, 0xffffffff, 0x42424444, + 0, 0, 0, 0x00000c28, 0xffffffff, 0x30323638, + 0, 0, 0, 0x00000c2c, 0xffffffff, 0x40424444, + 0, 0, 0, 0x00000c30, 0xffffffff, 0x28303236, + 0, 0, 1, 0x00000c34, 0xffffffff, 0x38404242, + 0, 0, 1, 0x00000c38, 0xffffffff, 0x26283034, + 0, 0, 2, 0x00000cd8, 0xffffffff, 0x36384040, + 0, 0, 2, 0x00000cdc, 0xffffffff, 0x24262832, + 0, 0, 0, 0x00000c3c, 0xffffffff, 0x40424444, + 0, 0, 0, 0x00000c40, 0xffffffff, 0x28303236, + 0, 0, 0, 0x00000c44, 0xffffffff, 0x42422426, + 0, 0, 1, 0x00000c48, 0xffffffff, 0x30343840, + 0, 0, 1, 0x00000c4c, 0xffffffff, 0x22242628, + 0, 0, 2, 0x00000ce0, 0xffffffff, 0x36384040, + 0, 0, 2, 0x00000ce4, 0xffffffff, 0x24262832, + 0, 0, 2, 0x00000ce8, 0x0000ffff, 0x20202022, + 0, 1, 0, 0x00000e20, 0xffffffff, 0x34363840, + 0, 1, 0, 0x00000e24, 0xffffffff, 0x42424444, + 0, 1, 0, 0x00000e28, 0xffffffff, 0x30323638, + 0, 1, 0, 0x00000e2c, 0xffffffff, 0x40424444, + 0, 1, 0, 0x00000e30, 0xffffffff, 0x28303236, + 0, 1, 1, 0x00000e34, 0xffffffff, 0x38404242, + 0, 1, 1, 0x00000e38, 0xffffffff, 0x26283034, + 0, 1, 2, 0x00000ed8, 0xffffffff, 0x36384040, + 0, 1, 2, 0x00000edc, 0xffffffff, 0x24262832, + 0, 1, 0, 0x00000e3c, 0xffffffff, 0x40424444, + 0, 1, 0, 0x00000e40, 0xffffffff, 0x28303236, + 0, 1, 0, 0x00000e44, 0xffffffff, 0x42422426, + 0, 1, 1, 0x00000e48, 0xffffffff, 0x30343840, + 0, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628, + 0, 1, 2, 0x00000ee0, 0xffffffff, 0x36384040, + 0, 1, 2, 0x00000ee4, 0xffffffff, 0x24262832, + 0, 1, 2, 0x00000ee8, 0x0000ffff, 0x20202022, + 0, 2, 0, 0x00001820, 0xffffffff, 0x34363840, + 0, 2, 0, 0x00001824, 0xffffffff, 0x42424444, + 0, 2, 0, 0x00001828, 0xffffffff, 0x30323638, + 0, 2, 0, 0x0000182c, 0xffffffff, 0x40424444, + 0, 2, 0, 0x00001830, 0xffffffff, 0x28303236, + 0, 2, 1, 0x00001834, 0xffffffff, 0x38404242, + 0, 2, 1, 0x00001838, 0xffffffff, 0x26283034, + 0, 2, 2, 0x000018d8, 0xffffffff, 0x36384040, + 0, 2, 2, 0x000018dc, 0xffffffff, 0x24262832, + 0, 2, 0, 0x0000183c, 0xffffffff, 0x40424444, + 0, 2, 0, 0x00001840, 0xffffffff, 0x28303236, + 0, 2, 0, 0x00001844, 0xffffffff, 0x42422426, + 0, 2, 1, 0x00001848, 0xffffffff, 0x30343840, + 0, 2, 1, 0x0000184c, 0xffffffff, 0x22242628, + 0, 2, 2, 0x000018e0, 0xffffffff, 0x36384040, + 0, 2, 2, 0x000018e4, 0xffffffff, 0x24262832, + 0, 2, 2, 0x000018e8, 0x0000ffff, 0x20202022, + 0, 3, 0, 0x00001a20, 0xffffffff, 0x34363840, + 0, 3, 0, 0x00001a24, 0xffffffff, 0x42424444, + 0, 3, 0, 0x00001a28, 0xffffffff, 0x30323638, + 0, 3, 0, 0x00001a2c, 0xffffffff, 0x40424444, + 0, 3, 0, 0x00001a30, 0xffffffff, 0x28303236, + 0, 3, 1, 0x00001a34, 0xffffffff, 0x38404242, + 0, 3, 1, 0x00001a38, 0xffffffff, 0x26283034, + 0, 3, 2, 0x00001ad8, 0xffffffff, 0x36384040, + 0, 3, 2, 0x00001adc, 0xffffffff, 0x24262832, + 0, 3, 0, 0x00001a3c, 0xffffffff, 0x40424444, + 0, 3, 0, 0x00001a40, 0xffffffff, 0x28303236, + 0, 3, 0, 0x00001a44, 0xffffffff, 0x42422426, + 0, 3, 1, 0x00001a48, 0xffffffff, 0x30343840, + 0, 3, 1, 0x00001a4c, 0xffffffff, 0x22242628, + 0, 3, 2, 0x00001ae0, 0xffffffff, 0x36384040, + 0, 3, 2, 0x00001ae4, 0xffffffff, 0x24262832, + 0, 3, 2, 0x00001ae8, 0x0000ffff, 0x20202022, + 1, 0, 0, 0x00000c24, 0xffffffff, 0x42424444, + 1, 0, 0, 0x00000c28, 0xffffffff, 0x30323640, + 1, 0, 0, 0x00000c2c, 0xffffffff, 0x40424444, + 1, 0, 0, 0x00000c30, 0xffffffff, 0x28303236, + 1, 0, 1, 0x00000c34, 0xffffffff, 0x38404242, + 1, 0, 1, 0x00000c38, 0xffffffff, 0x26283034, + 1, 0, 2, 0x00000cd8, 0xffffffff, 0x36384040, + 1, 0, 2, 0x00000cdc, 0xffffffff, 0x24262832, + 1, 0, 0, 0x00000c3c, 0xffffffff, 0x40424444, + 1, 0, 0, 0x00000c40, 0xffffffff, 0x28303236, + 1, 0, 0, 0x00000c44, 0xffffffff, 0x42422426, + 1, 0, 1, 0x00000c48, 0xffffffff, 0x30343840, + 1, 0, 1, 0x00000c4c, 0xffffffff, 0x22242628, + 1, 0, 2, 0x00000ce0, 0xffffffff, 0x36384040, + 1, 0, 2, 0x00000ce4, 0xffffffff, 0x24262832, + 1, 0, 2, 0x00000ce8, 0x0000ffff, 0x20202022, + 1, 1, 0, 0x00000e24, 0xffffffff, 0x42424444, + 1, 1, 0, 0x00000e28, 0xffffffff, 0x30323640, + 1, 1, 0, 0x00000e2c, 0xffffffff, 0x40424444, + 1, 1, 0, 0x00000e30, 0xffffffff, 0x28303236, + 1, 1, 1, 0x00000e34, 0xffffffff, 0x38404242, + 1, 1, 1, 0x00000e38, 0xffffffff, 0x26283034, + 1, 1, 2, 0x00000ed8, 0xffffffff, 0x36384040, + 1, 1, 2, 0x00000edc, 0xffffffff, 0x24262832, + 1, 1, 0, 0x00000e3c, 0xffffffff, 0x40424444, + 1, 1, 0, 0x00000e40, 0xffffffff, 0x28303236, + 1, 1, 0, 0x00000e44, 0xffffffff, 0x42422426, + 1, 1, 1, 0x00000e48, 0xffffffff, 0x30343840, + 1, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628, + 1, 1, 2, 0x00000ee0, 0xffffffff, 0x36384040, + 1, 1, 2, 0x00000ee4, 0xffffffff, 0x24262832, + 1, 1, 2, 0x00000ee8, 0x0000ffff, 0x20202022, + 1, 2, 0, 0x00001824, 0xffffffff, 0x42424444, + 1, 2, 0, 0x00001828, 0xffffffff, 0x30323640, + 1, 2, 0, 0x0000182c, 0xffffffff, 0x40424444, + 1, 2, 0, 0x00001830, 0xffffffff, 0x28303236, + 1, 2, 1, 0x00001834, 0xffffffff, 0x38404242, + 1, 2, 1, 0x00001838, 0xffffffff, 0x26283034, + 1, 2, 2, 0x000018d8, 0xffffffff, 0x36384040, + 1, 2, 2, 0x000018dc, 0xffffffff, 0x24262832, + 1, 2, 0, 0x0000183c, 0xffffffff, 0x40424444, + 1, 2, 0, 0x00001840, 0xffffffff, 0x28303236, + 1, 2, 0, 0x00001844, 0xffffffff, 0x42422426, + 1, 2, 1, 0x00001848, 0xffffffff, 0x30343840, + 1, 2, 1, 0x0000184c, 0xffffffff, 0x22242628, + 1, 2, 2, 0x000018e0, 0xffffffff, 0x36384040, + 1, 2, 2, 0x000018e4, 0xffffffff, 0x24262832, + 1, 2, 2, 0x000018e8, 0x0000ffff, 0x20202022, + 1, 3, 0, 0x00001a24, 0xffffffff, 0x42424444, + 1, 3, 0, 0x00001a28, 0xffffffff, 0x30323640, + 1, 3, 0, 0x00001a2c, 0xffffffff, 0x40424444, + 1, 3, 0, 0x00001a30, 0xffffffff, 0x28303236, + 1, 3, 1, 0x00001a34, 0xffffffff, 0x38404242, + 1, 3, 1, 0x00001a38, 0xffffffff, 0x26283034, + 1, 3, 2, 0x00001ad8, 0xffffffff, 0x36384040, + 1, 3, 2, 0x00001adc, 0xffffffff, 0x24262832, + 1, 3, 0, 0x00001a3c, 0xffffffff, 0x40424444, + 1, 3, 0, 0x00001a40, 0xffffffff, 0x28303236, + 1, 3, 0, 0x00001a44, 0xffffffff, 0x42422426, + 1, 3, 1, 0x00001a48, 0xffffffff, 0x30343840, + 1, 3, 1, 0x00001a4c, 0xffffffff, 0x22242628, + 1, 3, 2, 0x00001ae0, 0xffffffff, 0x36384040, + 1, 3, 2, 0x00001ae4, 0xffffffff, 0x24262832, + 1, 3, 2, 0x00001ae8, 0x0000ffff, 0x20202022 +}; + +void +odm_read_and_config_mp_8814a_phy_reg_pg( + struct dm_struct* pDM_Odm +) +{ + u32 i = 0; + u32 ArrayLen = sizeof(Array_MP_8814A_PHY_REG_PG)/sizeof(u32); + u32* Array = Array_MP_8814A_PHY_REG_PG; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PlatformZeroMemory(pHalData->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesReadPwrByRate = ArrayLen/6; +#endif + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_PHY_REG_PG\n"); + + pDM_Odm->phy_reg_pg_version = 1; + pDM_Odm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; + + for (i = 0; i < ArrayLen; i += 6) { + u32 v1 = Array[i]; + u32 v2 = Array[i+1]; + u32 v3 = Array[i+2]; + u32 v4 = Array[i+3]; + u32 v5 = Array[i+4]; + u32 v6 = Array[i+5]; + + odm_ConfigBB_PHY_REG_PG_8814A(pDM_Odm, v1, v2, v3, v4, v5, v6); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)pHalData->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0?"2.4G":" 5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6); +#endif + } +} + + + +/****************************************************************************** +* PHY_REG_PG_Type2.TXT +******************************************************************************\ + +u32 Array_MP_8814A_PHY_REG_PG_Type2[] = { + 0, 0, 0, 0x00000c20, 0xffffffff, 0x36363636, + 0, 0, 0, 0x00000c24, 0xffffffff, 0x36363636, + 0, 0, 0, 0x00000c28, 0xffffffff, 0x30323436, + 0, 0, 0, 0x00000c2c, 0xffffffff, 0x36363636, + 0, 0, 0, 0x00000c30, 0xffffffff, 0x28303234, + 0, 0, 1, 0x00000c34, 0xffffffff, 0x34343434, + 0, 0, 1, 0x00000c38, 0xffffffff, 0x26283032, + 0, 0, 2, 0x00000cd8, 0xffffffff, 0x32323232, + 0, 0, 2, 0x00000cdc, 0xffffffff, 0x24262830, + 0, 0, 0, 0x00000c3c, 0xffffffff, 0x36363636, + 0, 0, 0, 0x00000c40, 0xffffffff, 0x28303234, + 0, 0, 0, 0x00000c44, 0xffffffff, 0x34342426, + 0, 0, 1, 0x00000c48, 0xffffffff, 0x30323434, + 0, 0, 1, 0x00000c4c, 0xffffffff, 0x22242628, + 0, 0, 2, 0x00000ce0, 0xffffffff, 0x32323232, + 0, 0, 2, 0x00000ce4, 0xffffffff, 0x24262830, + 0, 0, 2, 0x00000ce8, 0x0000ffff, 0x20202022, + 0, 1, 0, 0x00000e20, 0xffffffff, 0x36363636, + 0, 1, 0, 0x00000e24, 0xffffffff, 0x36363636, + 0, 1, 0, 0x00000e28, 0xffffffff, 0x30323436, + 0, 1, 0, 0x00000e2c, 0xffffffff, 0x36363636, + 0, 1, 0, 0x00000e30, 0xffffffff, 0x28303234, + 0, 1, 1, 0x00000e34, 0xffffffff, 0x34343434, + 0, 1, 1, 0x00000e38, 0xffffffff, 0x26283032, + 0, 1, 2, 0x00000ed8, 0xffffffff, 0x32323232, + 0, 1, 2, 0x00000edc, 0xffffffff, 0x24262830, + 0, 1, 0, 0x00000e3c, 0xffffffff, 0x36363636, + 0, 1, 0, 0x00000e40, 0xffffffff, 0x28303234, + 0, 1, 0, 0x00000e44, 0xffffffff, 0x34342426, + 0, 1, 1, 0x00000e48, 0xffffffff, 0x30323434, + 0, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628, + 0, 1, 2, 0x00000ee0, 0xffffffff, 0x32323232, + 0, 1, 2, 0x00000ee4, 0xffffffff, 0x24262830, + 0, 1, 2, 0x00000ee8, 0x0000ffff, 0x20202022, + 0, 2, 0, 0x00001820, 0xffffffff, 0x36363636, + 0, 2, 0, 0x00001824, 0xffffffff, 0x36363636, + 0, 2, 0, 0x00001828, 0xffffffff, 0x30323436, + 0, 2, 0, 0x0000182c, 0xffffffff, 0x36363636, + 0, 2, 0, 0x00001830, 0xffffffff, 0x28303234, + 0, 2, 1, 0x00001834, 0xffffffff, 0x34343434, + 0, 2, 1, 0x00001838, 0xffffffff, 0x26283032, + 0, 2, 2, 0x000018d8, 0xffffffff, 0x32323232, + 0, 2, 2, 0x000018dc, 0xffffffff, 0x24262830, + 0, 2, 0, 0x0000183c, 0xffffffff, 0x36363636, + 0, 2, 0, 0x00001840, 0xffffffff, 0x28303234, + 0, 2, 0, 0x00001844, 0xffffffff, 0x34342426, + 0, 2, 1, 0x00001848, 0xffffffff, 0x30323434, + 0, 2, 1, 0x0000184c, 0xffffffff, 0x22242628, + 0, 2, 2, 0x000018e0, 0xffffffff, 0x32323232, + 0, 2, 2, 0x000018e4, 0xffffffff, 0x24262830, + 0, 2, 2, 0x000018e8, 0x0000ffff, 0x20202022, + 0, 3, 0, 0x00001a20, 0xffffffff, 0x36363636, + 0, 3, 0, 0x00001a24, 0xffffffff, 0x36363636, + 0, 3, 0, 0x00001a28, 0xffffffff, 0x30323436, + 0, 3, 0, 0x00001a2c, 0xffffffff, 0x36363636, + 0, 3, 0, 0x00001a30, 0xffffffff, 0x28303234, + 0, 3, 1, 0x00001a34, 0xffffffff, 0x34343434, + 0, 3, 1, 0x00001a38, 0xffffffff, 0x26283032, + 0, 3, 2, 0x00001ad8, 0xffffffff, 0x32323232, + 0, 3, 2, 0x00001adc, 0xffffffff, 0x24262830, + 0, 3, 0, 0x00001a3c, 0xffffffff, 0x36363636, + 0, 3, 0, 0x00001a40, 0xffffffff, 0x28303234, + 0, 3, 0, 0x00001a44, 0xffffffff, 0x34342426, + 0, 3, 1, 0x00001a48, 0xffffffff, 0x30323434, + 0, 3, 1, 0x00001a4c, 0xffffffff, 0x22242628, + 0, 3, 2, 0x00001ae0, 0xffffffff, 0x32323232, + 0, 3, 2, 0x00001ae4, 0xffffffff, 0x24262830, + 0, 3, 2, 0x00001ae8, 0x0000ffff, 0x20202022, + 1, 0, 0, 0x00000c24, 0xffffffff, 0x36363636, + 1, 0, 0, 0x00000c28, 0xffffffff, 0x30323436, + 1, 0, 0, 0x00000c2c, 0xffffffff, 0x36363636, + 1, 0, 0, 0x00000c30, 0xffffffff, 0x28303234, + 1, 0, 1, 0x00000c34, 0xffffffff, 0x34343434, + 1, 0, 1, 0x00000c38, 0xffffffff, 0x26283032, + 1, 0, 2, 0x00000cd8, 0xffffffff, 0x32323232, + 1, 0, 2, 0x00000cdc, 0xffffffff, 0x24262830, + 1, 0, 0, 0x00000c3c, 0xffffffff, 0x36363636, + 1, 0, 0, 0x00000c40, 0xffffffff, 0x28303234, + 1, 0, 0, 0x00000c44, 0xffffffff, 0x34342426, + 1, 0, 1, 0x00000c48, 0xffffffff, 0x30323434, + 1, 0, 1, 0x00000c4c, 0xffffffff, 0x22242628, + 1, 0, 2, 0x00000ce0, 0xffffffff, 0x32323232, + 1, 0, 2, 0x00000ce4, 0xffffffff, 0x24262830, + 1, 0, 2, 0x00000ce8, 0x0000ffff, 0x20202022, + 1, 1, 0, 0x00000e24, 0xffffffff, 0x36363636, + 1, 1, 0, 0x00000e28, 0xffffffff, 0x30323436, + 1, 1, 0, 0x00000e2c, 0xffffffff, 0x36363636, + 1, 1, 0, 0x00000e30, 0xffffffff, 0x28303234, + 1, 1, 1, 0x00000e34, 0xffffffff, 0x34343434, + 1, 1, 1, 0x00000e38, 0xffffffff, 0x26283032, + 1, 1, 2, 0x00000ed8, 0xffffffff, 0x32323232, + 1, 1, 2, 0x00000edc, 0xffffffff, 0x24262830, + 1, 1, 0, 0x00000e3c, 0xffffffff, 0x36363636, + 1, 1, 0, 0x00000e40, 0xffffffff, 0x28303234, + 1, 1, 0, 0x00000e44, 0xffffffff, 0x34342426, + 1, 1, 1, 0x00000e48, 0xffffffff, 0x30323434, + 1, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628, + 1, 1, 2, 0x00000ee0, 0xffffffff, 0x32323232, + 1, 1, 2, 0x00000ee4, 0xffffffff, 0x24262830, + 1, 1, 2, 0x00000ee8, 0x0000ffff, 0x20202022, + 1, 2, 0, 0x00001824, 0xffffffff, 0x36363636, + 1, 2, 0, 0x00001828, 0xffffffff, 0x30323436, + 1, 2, 0, 0x0000182c, 0xffffffff, 0x36363636, + 1, 2, 0, 0x00001830, 0xffffffff, 0x28303234, + 1, 2, 1, 0x00001834, 0xffffffff, 0x34343434, + 1, 2, 1, 0x00001838, 0xffffffff, 0x26283032, + 1, 2, 2, 0x000018d8, 0xffffffff, 0x32323232, + 1, 2, 2, 0x000018dc, 0xffffffff, 0x24262830, + 1, 2, 0, 0x0000183c, 0xffffffff, 0x36363636, + 1, 2, 0, 0x00001840, 0xffffffff, 0x28303234, + 1, 2, 0, 0x00001844, 0xffffffff, 0x34342426, + 1, 2, 1, 0x00001848, 0xffffffff, 0x30323434, + 1, 2, 1, 0x0000184c, 0xffffffff, 0x22242628, + 1, 2, 2, 0x000018e0, 0xffffffff, 0x32323232, + 1, 2, 2, 0x000018e4, 0xffffffff, 0x24262830, + 1, 2, 2, 0x000018e8, 0x0000ffff, 0x20202022, + 1, 3, 0, 0x00001a24, 0xffffffff, 0x36363636, + 1, 3, 0, 0x00001a28, 0xffffffff, 0x30323436, + 1, 3, 0, 0x00001a2c, 0xffffffff, 0x36363636, + 1, 3, 0, 0x00001a30, 0xffffffff, 0x28303234, + 1, 3, 1, 0x00001a34, 0xffffffff, 0x34343434, + 1, 3, 1, 0x00001a38, 0xffffffff, 0x26283032, + 1, 3, 2, 0x00001ad8, 0xffffffff, 0x32323232, + 1, 3, 2, 0x00001adc, 0xffffffff, 0x24262830, + 1, 3, 0, 0x00001a3c, 0xffffffff, 0x36363636, + 1, 3, 0, 0x00001a40, 0xffffffff, 0x28303234, + 1, 3, 0, 0x00001a44, 0xffffffff, 0x34342426, + 1, 3, 1, 0x00001a48, 0xffffffff, 0x30323434, + 1, 3, 1, 0x00001a4c, 0xffffffff, 0x22242628, + 1, 3, 2, 0x00001ae0, 0xffffffff, 0x32323232, + 1, 3, 2, 0x00001ae4, 0xffffffff, 0x24262830, + 1, 3, 2, 0x00001ae8, 0x0000ffff, 0x20202022 +}; + +void +_odm_read_and_config_mp_8814a_phy_reg_pg_type2( + struct dm_struct* pDM_Odm +) +{ + u32 i = 0; + u32 ArrayLen = sizeof(Array_MP_8814A_PHY_REG_PG_Type2)/sizeof(u32); + u32* Array = Array_MP_8814A_PHY_REG_PG_Type2; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PlatformZeroMemory(pHalData->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesReadPwrByRate = ArrayLen/6; +#endif + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_PHY_REG_PG_Type2\n"); + + pDM_Odm->phy_reg_pg_version = 1; + pDM_Odm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; + + for (i = 0; i < ArrayLen; i += 6) { + u32 v1 = Array[i]; + u32 v2 = Array[i+1]; + u32 v3 = Array[i+2]; + u32 v4 = Array[i+3]; + u32 v5 = Array[i+4]; + u32 v6 = Array[i+5]; + + odm_ConfigBB_PHY_REG_PG_8814A(pDM_Odm, v1, v2, v3, v4, v5, v6); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)pHalData->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0?"2.4G":" 5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6); +#endif + } +} + + +****************************************************************************** +* PHY_REG_PG_Type3.TXT +****************************************************************************** + +u32 Array_MP_8814A_PHY_REG_PG_Type3[] = { + 0, 0, 0, 0x00000c20, 0xffffffff, 0x48484848, + 0, 0, 0, 0x00000c24, 0xffffffff, 0x46464646, + 0, 0, 0, 0x00000c28, 0xffffffff, 0x44464646, + 0, 0, 0, 0x00000c2c, 0xffffffff, 0x46464646, + 0, 0, 0, 0x00000c30, 0xffffffff, 0x42444646, + 0, 0, 1, 0x00000c34, 0xffffffff, 0x44444444, + 0, 0, 1, 0x00000c38, 0xffffffff, 0x40424444, + 0, 0, 2, 0x00000cd8, 0xffffffff, 0x42424242, + 0, 0, 2, 0x00000cdc, 0xffffffff, 0x38404242, + 0, 0, 0, 0x00000c3c, 0xffffffff, 0x46464646, + 0, 0, 0, 0x00000c40, 0xffffffff, 0x42444646, + 0, 0, 0, 0x00000c44, 0xffffffff, 0x44444040, + 0, 0, 1, 0x00000c48, 0xffffffff, 0x44444444, + 0, 0, 1, 0x00000c4c, 0xffffffff, 0x38384042, + 0, 0, 2, 0x00000ce0, 0xffffffff, 0x42424242, + 0, 0, 2, 0x00000ce4, 0xffffffff, 0x38404242, + 0, 0, 2, 0x00000ce8, 0x0000ffff, 0x20203636, + 0, 1, 0, 0x00000e20, 0xffffffff, 0x48484848, + 0, 1, 0, 0x00000e24, 0xffffffff, 0x46464646, + 0, 1, 0, 0x00000e28, 0xffffffff, 0x44464646, + 0, 1, 0, 0x00000e2c, 0xffffffff, 0x46464646, + 0, 1, 0, 0x00000e30, 0xffffffff, 0x42444646, + 0, 1, 1, 0x00000e34, 0xffffffff, 0x44444444, + 0, 1, 1, 0x00000e38, 0xffffffff, 0x40424444, + 0, 1, 2, 0x00000ed8, 0xffffffff, 0x42424242, + 0, 1, 2, 0x00000edc, 0xffffffff, 0x38404242, + 0, 1, 0, 0x00000e3c, 0xffffffff, 0x46464646, + 0, 1, 0, 0x00000e40, 0xffffffff, 0x42444646, + 0, 1, 0, 0x00000e44, 0xffffffff, 0x44444040, + 0, 1, 1, 0x00000e48, 0xffffffff, 0x44444444, + 0, 1, 1, 0x00000e4c, 0xffffffff, 0x38384042, + 0, 1, 2, 0x00000ee0, 0xffffffff, 0x42424242, + 0, 1, 2, 0x00000ee4, 0xffffffff, 0x38404242, + 0, 1, 2, 0x00000ee8, 0x0000ffff, 0x20203636, + 0, 2, 0, 0x00001820, 0xffffffff, 0x48484848, + 0, 2, 0, 0x00001824, 0xffffffff, 0x46464646, + 0, 2, 0, 0x00001828, 0xffffffff, 0x44464646, + 0, 2, 0, 0x0000182c, 0xffffffff, 0x46464646, + 0, 2, 0, 0x00001830, 0xffffffff, 0x42444646, + 0, 2, 1, 0x00001834, 0xffffffff, 0x44444444, + 0, 2, 1, 0x00001838, 0xffffffff, 0x40424444, + 0, 2, 2, 0x000018d8, 0xffffffff, 0x42424242, + 0, 2, 2, 0x000018dc, 0xffffffff, 0x38404242, + 0, 2, 0, 0x0000183c, 0xffffffff, 0x46464646, + 0, 2, 0, 0x00001840, 0xffffffff, 0x42444646, + 0, 2, 0, 0x00001844, 0xffffffff, 0x44444040, + 0, 2, 1, 0x00001848, 0xffffffff, 0x44444444, + 0, 2, 1, 0x0000184c, 0xffffffff, 0x38384042, + 0, 2, 2, 0x000018e0, 0xffffffff, 0x42424242, + 0, 2, 2, 0x000018e4, 0xffffffff, 0x38404242, + 0, 2, 2, 0x000018e8, 0x0000ffff, 0x20203636, + 0, 3, 0, 0x00001a20, 0xffffffff, 0x48484848, + 0, 3, 0, 0x00001a24, 0xffffffff, 0x46464646, + 0, 3, 0, 0x00001a28, 0xffffffff, 0x44464646, + 0, 3, 0, 0x00001a2c, 0xffffffff, 0x46464646, + 0, 3, 0, 0x00001a30, 0xffffffff, 0x42444646, + 0, 3, 1, 0x00001a34, 0xffffffff, 0x44444444, + 0, 3, 1, 0x00001a38, 0xffffffff, 0x40424444, + 0, 3, 2, 0x00001ad8, 0xffffffff, 0x42424242, + 0, 3, 2, 0x00001adc, 0xffffffff, 0x38404242, + 0, 3, 0, 0x00001a3c, 0xffffffff, 0x46464646, + 0, 3, 0, 0x00001a40, 0xffffffff, 0x42444646, + 0, 3, 0, 0x00001a44, 0xffffffff, 0x44444040, + 0, 3, 1, 0x00001a48, 0xffffffff, 0x44444444, + 0, 3, 1, 0x00001a4c, 0xffffffff, 0x38384042, + 0, 3, 2, 0x00001ae0, 0xffffffff, 0x42424242, + 0, 3, 2, 0x00001ae4, 0xffffffff, 0x38404242, + 0, 3, 2, 0x00001ae8, 0x0000ffff, 0x20203636, + 1, 0, 0, 0x00000c24, 0xffffffff, 0x46464646, + 1, 0, 0, 0x00000c28, 0xffffffff, 0x44464646, + 1, 0, 0, 0x00000c2c, 0xffffffff, 0x46464646, + 1, 0, 0, 0x00000c30, 0xffffffff, 0x42444646, + 1, 0, 1, 0x00000c34, 0xffffffff, 0x44444444, + 1, 0, 1, 0x00000c38, 0xffffffff, 0x40424444, + 1, 0, 2, 0x00000cd8, 0xffffffff, 0x42424242, + 1, 0, 2, 0x00000cdc, 0xffffffff, 0x38404242, + 1, 0, 0, 0x00000c3c, 0xffffffff, 0x46464646, + 1, 0, 0, 0x00000c40, 0xffffffff, 0x42444646, + 1, 0, 0, 0x00000c44, 0xffffffff, 0x44443840, + 1, 0, 1, 0x00000c48, 0xffffffff, 0x44444444, + 1, 0, 1, 0x00000c4c, 0xffffffff, 0x36384042, + 1, 0, 2, 0x00000ce0, 0xffffffff, 0x42424242, + 1, 0, 2, 0x00000ce4, 0xffffffff, 0x38404242, + 1, 0, 2, 0x00000ce8, 0x0000ffff, 0x20203436, + 1, 1, 0, 0x00000e24, 0xffffffff, 0x46464646, + 1, 1, 0, 0x00000e28, 0xffffffff, 0x44464646, + 1, 1, 0, 0x00000e2c, 0xffffffff, 0x46464646, + 1, 1, 0, 0x00000e30, 0xffffffff, 0x42444646, + 1, 1, 1, 0x00000e34, 0xffffffff, 0x44444444, + 1, 1, 1, 0x00000e38, 0xffffffff, 0x40424444, + 1, 1, 2, 0x00000ed8, 0xffffffff, 0x42424242, + 1, 1, 2, 0x00000edc, 0xffffffff, 0x38404242, + 1, 1, 0, 0x00000e3c, 0xffffffff, 0x46464646, + 1, 1, 0, 0x00000e40, 0xffffffff, 0x42444646, + 1, 1, 0, 0x00000e44, 0xffffffff, 0x44443840, + 1, 1, 1, 0x00000e48, 0xffffffff, 0x44444444, + 1, 1, 1, 0x00000e4c, 0xffffffff, 0x36384042, + 1, 1, 2, 0x00000ee0, 0xffffffff, 0x42424242, + 1, 1, 2, 0x00000ee4, 0xffffffff, 0x38404242, + 1, 1, 2, 0x00000ee8, 0x0000ffff, 0x20203436, + 1, 2, 0, 0x00001824, 0xffffffff, 0x46464646, + 1, 2, 0, 0x00001828, 0xffffffff, 0x44464646, + 1, 2, 0, 0x0000182c, 0xffffffff, 0x46464646, + 1, 2, 0, 0x00001830, 0xffffffff, 0x42444646, + 1, 2, 1, 0x00001834, 0xffffffff, 0x44444444, + 1, 2, 1, 0x00001838, 0xffffffff, 0x40424444, + 1, 2, 2, 0x000018d8, 0xffffffff, 0x42424242, + 1, 2, 2, 0x000018dc, 0xffffffff, 0x38404242, + 1, 2, 0, 0x0000183c, 0xffffffff, 0x46464646, + 1, 2, 0, 0x00001840, 0xffffffff, 0x42444646, + 1, 2, 0, 0x00001844, 0xffffffff, 0x44443840, + 1, 2, 1, 0x00001848, 0xffffffff, 0x44444444, + 1, 2, 1, 0x0000184c, 0xffffffff, 0x36384042, + 1, 2, 2, 0x000018e0, 0xffffffff, 0x42424242, + 1, 2, 2, 0x000018e4, 0xffffffff, 0x38404242, + 1, 2, 2, 0x000018e8, 0x0000ffff, 0x20203436, + 1, 3, 0, 0x00001a24, 0xffffffff, 0x46464646, + 1, 3, 0, 0x00001a28, 0xffffffff, 0x44464646, + 1, 3, 0, 0x00001a2c, 0xffffffff, 0x46464646, + 1, 3, 0, 0x00001a30, 0xffffffff, 0x42444646, + 1, 3, 1, 0x00001a34, 0xffffffff, 0x44444444, + 1, 3, 1, 0x00001a38, 0xffffffff, 0x40424444, + 1, 3, 2, 0x00001ad8, 0xffffffff, 0x42424242, + 1, 3, 2, 0x00001adc, 0xffffffff, 0x38404242, + 1, 3, 0, 0x00001a3c, 0xffffffff, 0x46464646, + 1, 3, 0, 0x00001a40, 0xffffffff, 0x42444646, + 1, 3, 0, 0x00001a44, 0xffffffff, 0x44443840, + 1, 3, 1, 0x00001a48, 0xffffffff, 0x44444444, + 1, 3, 1, 0x00001a4c, 0xffffffff, 0x36384042, + 1, 3, 2, 0x00001ae0, 0xffffffff, 0x42424242, + 1, 3, 2, 0x00001ae4, 0xffffffff, 0x38404242, + 1, 3, 2, 0x00001ae8, 0x0000ffff, 0x20203436 +}; + +void +_odm_read_and_config_mp_8814a_phy_reg_pg_type3( + struct dm_struct* pDM_Odm +) +{ + u32 i = 0; + u32 ArrayLen = sizeof(Array_MP_8814A_PHY_REG_PG_Type3)/sizeof(u32); + u32* Array = Array_MP_8814A_PHY_REG_PG_Type3; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PlatformZeroMemory(pHalData->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesReadPwrByRate = ArrayLen/6; +#endif + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_PHY_REG_PG_Type3\n"); + + pDM_Odm->phy_reg_pg_version = 1; + pDM_Odm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; + + for (i = 0; i < ArrayLen; i += 6) { + u32 v1 = Array[i]; + u32 v2 = Array[i+1]; + u32 v3 = Array[i+2]; + u32 v4 = Array[i+3]; + u32 v5 = Array[i+4]; + u32 v6 = Array[i+5]; + + odm_ConfigBB_PHY_REG_PG_8814A(pDM_Odm, v1, v2, v3, v4, v5, v6); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)pHalData->BufOfLinesPwrByRate[i/6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0?"2.4G":" 5G"), (v2 == 0?"A":"B"), (v3 == 0?"1Tx":"2Tx"), v4, v5, v6); +#endif + } +} +*/ + + +#endif /* end of HWIMG_SUPPORT*/ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h new file mode 100644 index 00000000000000..949b6f978f4585 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_bb.h @@ -0,0 +1,99 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +/*Image2HeaderVersion: 2.19*/ +#if (RTL8814A_SUPPORT == 1) +#ifndef __INC_MP_BB_HW_IMG_8814A_H +#define __INC_MP_BB_HW_IMG_8814A_H + + +/****************************************************************************** +* AGC_TAB.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_agc_tab(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct * pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_AGC_TAB(void); + +/****************************************************************************** +* PHY_REG.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_phy_reg(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct * pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_PHY_REG(void); + +/****************************************************************************** +* PHY_REG_MP.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_phy_reg_mp(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct * pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_PHY_REG_MP(void); + +/****************************************************************************** +* PHY_REG_PG.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_phy_reg_pg(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct * pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG(void); + +/****************************************************************************** +* PHY_REG_PG_Type2.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_phy_reg_pg_type2(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct * pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG_Type2(void); + +/****************************************************************************** +* PHY_REG_PG_Type3.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_phy_reg_pg_type3(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct * pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG_Type3(void); + +/****************************************************************************** +* PHY_REG_PG_Type5.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_phy_reg_pg_type5(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct * pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_PHY_REG_PG_Type5(void); + +#endif +#endif /* end of HWIMG_SUPPORT*/ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h new file mode 100644 index 00000000000000..3f8de123d2d2a9 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_fw.h @@ -0,0 +1,56 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +#if (RTL8814A_SUPPORT == 1) +#ifndef __INC_MP_FW_HW_IMG_8814A_H +#define __INC_MP_FW_HW_IMG_8814A_H + + +/****************************************************************************** +* FW_AP.TXT +******************************************************************************/ + +void +ODM_ReadFirmware_MP_8814A_FW_AP( + struct dm_struct *pDM_Odm, + u8 *pFirmware, + u32 *pFirmwareSize +); +u4Byte ODM_GetVersion_MP_8814A_FW_AP(void); +extern u32 array_length_mp_8814a_fw_ap; +extern u8 array_mp_8814a_fw_ap[]; + +/****************************************************************************** +* FW_NIC.TXT +******************************************************************************/ + +void +ODM_ReadFirmware_MP_8814A_FW_NIC( + struct dm_struct *pDM_Odm, + u8 *pFirmware, + u32 *pFirmwareSize +); +u4Byte ODM_GetVersion_MP_8814A_FW_NIC(void); +extern u32 array_length_mp_8814a_fw_nic; +extern u8 array_mp_8814a_fw_nic[]; + +#endif +#endif // end of HWIMG_SUPPORT + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c new file mode 100644 index 00000000000000..0d586702868b84 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.c @@ -0,0 +1,325 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.19*/ +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8814A_SUPPORT == 1) +static BOOLEAN +CheckPositive( + struct dm_struct *pDM_Odm, + u32 Condition1, + u32 Condition2, + u32 Condition3, + u32 Condition4 +) +{ + u1Byte _BoardType = ((pDM_Odm->board_type & BIT4) >> 4) << 0 | /* _GLNA*/ + ((pDM_Odm->board_type & BIT3) >> 3) << 1 | /* _GPA*/ + ((pDM_Odm->board_type & BIT7) >> 7) << 2 | /* _ALNA*/ + ((pDM_Odm->board_type & BIT6) >> 6) << 3 | /* _APA */ + ((pDM_Odm->board_type & BIT2) >> 2) << 4; /* _BT*/ + + u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; + u4Byte driver1 = pDM_Odm->cut_version << 24 | + (pDM_Odm->support_interface & 0xF0) << 16 | + pDM_Odm->support_platform << 16 | + pDM_Odm->package_type << 12 | + (pDM_Odm->support_interface & 0x0F) << 8 | + _BoardType; + + u4Byte driver2 = (pDM_Odm->type_glna & 0xFF) << 0 | + (pDM_Odm->type_gpa & 0xFF) << 8 | + (pDM_Odm->type_alna & 0xFF) << 16 | + (pDM_Odm->type_apa & 0xFF) << 24; + +u4Byte driver3 = 0; + + u4Byte driver4 = (pDM_Odm->type_glna & 0xFF00) >> 8 | + (pDM_Odm->type_gpa & 0xFF00) | + (pDM_Odm->type_alna & 0xFF00) << 8 | + (pDM_Odm->type_apa & 0xFF00) << 16; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + "===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + "===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + " (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->support_platform, pDM_Odm->support_interface); + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + " (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->board_type, pDM_Odm->package_type); + + + /*============== Value Defined Check ===============*/ + /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ + + if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return FALSE; + if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return FALSE; + + /*=============== Bit Defined Check ================*/ + /* We don't care [31:28] */ + + cond1 &= 0x00FF0FFF; + driver1 &= 0x00FF0FFF; + + if ((cond1 & driver1) == cond1) { + u4Byte bitMask = 0; + + if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ + return TRUE; + + if ((cond1 & BIT0) != 0) /*GLNA*/ + bitMask |= 0x000000FF; + if ((cond1 & BIT1) != 0) /*GPA*/ + bitMask |= 0x0000FF00; + if ((cond1 & BIT2) != 0) /*ALNA*/ + bitMask |= 0x00FF0000; + if ((cond1 & BIT3) != 0) /*APA*/ + bitMask |= 0xFF000000; + + if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ + return TRUE; + else + return FALSE; + } else + return FALSE; +} +static BOOLEAN +CheckNegative( + struct dm_struct *pDM_Odm, + u32 Condition1, + u32 Condition2 +) +{ + return TRUE; +} + +/****************************************************************************** +* MAC_REG.TXT +******************************************************************************/ + +u4Byte Array_MP_8814A_MAC_REG[] = { + 0x010, 0x0000007C, + 0x014, 0x000000DB, + 0x016, 0x00000002, + 0x073, 0x00000010, + 0x420, 0x00000080, + 0x421, 0x0000000F, + 0x428, 0x0000000A, + 0x429, 0x00000010, + 0x430, 0x00000000, + 0x431, 0x00000000, + 0x432, 0x00000000, + 0x433, 0x00000001, + 0x434, 0x00000004, + 0x435, 0x00000005, + 0x436, 0x00000007, + 0x437, 0x00000008, + 0x43C, 0x00000004, + 0x43D, 0x00000005, + 0x43E, 0x00000007, + 0x43F, 0x00000008, + 0x440, 0x0000005D, + 0x441, 0x00000001, + 0x442, 0x00000000, + 0x444, 0x00000010, + 0x445, 0x000000F0, + 0x446, 0x00000001, + 0x447, 0x000000FE, + 0x448, 0x00000000, + 0x449, 0x00000000, + 0x44A, 0x00000000, + 0x44B, 0x00000040, + 0x44C, 0x00000010, + 0x44D, 0x000000F0, + 0x44E, 0x0000003F, + 0x44F, 0x00000000, + 0x450, 0x00000000, + 0x451, 0x00000000, + 0x452, 0x00000000, + 0x453, 0x00000040, + 0x45E, 0x00000004, + 0x49C, 0x00000010, + 0x49D, 0x000000F0, + 0x49E, 0x00000000, + 0x49F, 0x00000006, + 0x4A0, 0x000000E0, + 0x4A1, 0x00000003, + 0x4A2, 0x00000000, + 0x4A3, 0x00000040, + 0x4A4, 0x00000015, + 0x4A5, 0x000000F0, + 0x4A6, 0x00000000, + 0x4A7, 0x00000006, + 0x4A8, 0x000000E0, + 0x4A9, 0x00000000, + 0x4AA, 0x00000000, + 0x4AB, 0x00000000, + 0x7DA, 0x00000008, + 0x1448, 0x00000006, + 0x144A, 0x00000006, + 0x144C, 0x00000006, + 0x144E, 0x00000006, + 0x4C8, 0x000000FF, + 0x4C9, 0x00000008, + 0x4CA, 0x0000003C, + 0x4CB, 0x0000003C, + 0x4CC, 0x000000FF, + 0x4CD, 0x000000FF, + 0x4CE, 0x00000001, + 0x4CF, 0x00000008, + 0x500, 0x00000026, + 0x501, 0x000000A2, + 0x502, 0x0000002F, + 0x503, 0x00000000, + 0x504, 0x00000028, + 0x505, 0x000000A3, + 0x506, 0x0000005E, + 0x507, 0x00000000, + 0x508, 0x0000002B, + 0x509, 0x000000A4, + 0x50A, 0x0000005E, + 0x50B, 0x00000000, + 0x50C, 0x0000004F, + 0x50D, 0x000000A4, + 0x50E, 0x00000000, + 0x50F, 0x00000000, + 0x512, 0x0000001C, + 0x514, 0x0000000A, + 0x516, 0x0000000A, + 0x521, 0x0000002F, + 0x525, 0x0000004F, + 0x550, 0x00000010, + 0x551, 0x00000010, + 0x559, 0x00000002, + 0x55C, 0x00000064, + 0x55D, 0x000000FF, + 0x577, 0x00000003, + 0x5BE, 0x00000064, + 0x604, 0x00000001, + 0x605, 0x00000030, + 0x607, 0x00000001, + 0x608, 0x0000000E, + 0x609, 0x0000002A, + 0x60A, 0x00000000, + 0x60C, 0x00000018, + 0x60D, 0x00000050, + 0x6A0, 0x000000FF, + 0x6A1, 0x000000FF, + 0x6A2, 0x000000FF, + 0x6A3, 0x000000FF, + 0x6A4, 0x000000FF, + 0x6A5, 0x000000FF, + 0x6DE, 0x00000084, + 0x620, 0x000000FF, + 0x621, 0x000000FF, + 0x622, 0x000000FF, + 0x623, 0x000000FF, + 0x624, 0x000000FF, + 0x625, 0x000000FF, + 0x626, 0x000000FF, + 0x627, 0x000000FF, + 0x638, 0x00000064, + 0x63C, 0x0000000A, + 0x63D, 0x0000000A, + 0x63E, 0x0000000E, + 0x63F, 0x0000000E, + 0x640, 0x00000040, + 0x642, 0x00000040, + 0x643, 0x00000000, + 0x652, 0x000000C8, + 0x66E, 0x00000005, + 0x700, 0x00000021, + 0x701, 0x00000043, + 0x702, 0x00000065, + 0x703, 0x00000087, + 0x708, 0x00000021, + 0x709, 0x00000043, + 0x70A, 0x00000065, + 0x70B, 0x00000087, + 0x718, 0x00000040, + 0x7D5, 0x000000BC, + 0x7D8, 0x00000028, + 0x7D9, 0x00000000, + 0x7DA, 0x0000000B, + +}; + +void +odm_read_and_config_mp_8814a_mac_reg( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u4Byte ArrayLen = sizeof(Array_MP_8814A_MAC_REG)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8814A_MAC_REG; + + u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_MAC_REG\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigMAC_8814A(pDM_Odm, v1, (u1Byte)v2); + } + i = i + 2; + } +} + +u4Byte +odm_get_version_mp_8814a_mac_reg(void) +{ + return 85; +} + +#endif /* end of HWIMG_SUPPORT*/ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h new file mode 100644 index 00000000000000..94f6a2daf44ed1 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_mac.h @@ -0,0 +1,39 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +/*Image2HeaderVersion: 2.19*/ +#if (RTL8814A_SUPPORT == 1) +#ifndef __INC_MP_MAC_HW_IMG_8814A_H +#define __INC_MP_MAC_HW_IMG_8814A_H + + +/****************************************************************************** +* MAC_REG.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_mac_reg(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte odm_get_version_mp_8814a_mac_reg(void); + +#endif +#endif /* end of HWIMG_SUPPORT*/ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c new file mode 100644 index 00000000000000..c7225cd93ffa66 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.c @@ -0,0 +1,8838 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.19*/ +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8814A_SUPPORT == 1) +static BOOLEAN +CheckPositive( + struct dm_struct *pDM_Odm, + u32 Condition1, + u32 Condition2, + u32 Condition3, + u32 Condition4 +) +{ + u1Byte _BoardType = ((pDM_Odm->board_type & BIT4) >> 4) << 0 | /* _GLNA*/ + ((pDM_Odm->board_type & BIT3) >> 3) << 1 | /* _GPA*/ + ((pDM_Odm->board_type & BIT7) >> 7) << 2 | /* _ALNA*/ + ((pDM_Odm->board_type & BIT6) >> 6) << 3 | /* _APA */ + ((pDM_Odm->board_type & BIT2) >> 2) << 4; /* _BT*/ + + u4Byte cond1 = Condition1, cond2 = Condition2, cond3 = Condition3, cond4 = Condition4; + u4Byte driver1 = pDM_Odm->cut_version << 24 | + (pDM_Odm->support_interface & 0xF0) << 16 | + pDM_Odm->support_platform << 16 | + pDM_Odm->package_type << 12 | + (pDM_Odm->support_interface & 0x0F) << 8 | + _BoardType; + + u4Byte driver2 = (pDM_Odm->type_glna & 0xFF) << 0 | + (pDM_Odm->type_gpa & 0xFF) << 8 | + (pDM_Odm->type_alna & 0xFF) << 16 | + (pDM_Odm->type_apa & 0xFF) << 24; + +u4Byte driver3 = 0; + + u4Byte driver4 = (pDM_Odm->type_glna & 0xFF00) >> 8 | + (pDM_Odm->type_gpa & 0xFF00) | + (pDM_Odm->type_alna & 0xFF00) << 8 | + (pDM_Odm->type_apa & 0xFF00) << 16; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + "===> CheckPositive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + "===> CheckPositive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + " (Platform, Interface) = (0x%X, 0x%X)\n", pDM_Odm->support_platform, pDM_Odm->support_interface); + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, + " (Board, Package) = (0x%X, 0x%X)\n", pDM_Odm->board_type, pDM_Odm->package_type); + + + /*============== Value Defined Check ===============*/ + /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/ + + if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return FALSE; + if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return FALSE; + + /*=============== Bit Defined Check ================*/ + /* We don't care [31:28] */ + + cond1 &= 0x00FF0FFF; + driver1 &= 0x00FF0FFF; + + if ((cond1 & driver1) == cond1) { + u4Byte bitMask = 0; + + if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/ + return TRUE; + + if ((cond1 & BIT0) != 0) /*GLNA*/ + bitMask |= 0x000000FF; + if ((cond1 & BIT1) != 0) /*GPA*/ + bitMask |= 0x0000FF00; + if ((cond1 & BIT2) != 0) /*ALNA*/ + bitMask |= 0x00FF0000; + if ((cond1 & BIT3) != 0) /*APA*/ + bitMask |= 0xFF000000; + + if (((cond2 & bitMask) == (driver2 & bitMask)) && ((cond4 & bitMask) == (driver4 & bitMask))) /* BoardType of each RF path is matched*/ + return TRUE; + else + return FALSE; + } else + return FALSE; +} +static BOOLEAN +CheckNegative( + struct dm_struct *pDM_Odm, + u32 Condition1, + u32 Condition2 +) +{ + return TRUE; +} + +/****************************************************************************** +* RadioA.TXT +******************************************************************************/ + +u4Byte Array_MP_8814A_RadioA[] = { + 0x018, 0x00013124, + 0x040, 0x00000C00, + 0x058, 0x00000F98, + 0x07F, 0x00068004, + 0x0B0, 0x000FFFFE, + 0x0B1, 0x0003FF48, + 0x0B2, 0x0006AA3F, + 0x0B3, 0x000FFC9A, + 0x0B4, 0x0000A78F, + 0x0B5, 0x00000A3F, + 0x0B6, 0x0000C09C, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x0B7, 0x00030008, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x0B7, 0x00030008, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x0B7, 0x00030008, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x0B7, 0x00030008, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x0B7, 0x00030008, + 0xA0000000, 0x00000000, + 0x0B7, 0x0003000C, + 0xB0000000, 0x00000000, + 0x0B8, 0x0007400E, + 0x0B9, 0x00008250, + 0x0BA, 0x00050780, + 0x0BB, 0x00000000, + 0x0BC, 0x00040009, + 0x0BD, 0x00000000, + 0x0BE, 0x00000000, + 0x0BF, 0x00000000, + 0x0EF, 0x00020000, + 0x03E, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030000, + 0xA0000000, 0x00000000, + 0x03F, 0x00030000, + 0xB0000000, 0x00000000, + 0x03E, 0x00020000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00040000, + 0xA0000000, 0x00000000, + 0x03F, 0x00040000, + 0xB0000000, 0x00000000, + 0x03E, 0x00040000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030000, + 0xA0000000, 0x00000000, + 0x03F, 0x00030000, + 0xB0000000, 0x00000000, + 0x03E, 0x00060000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03F, 0x00030000, + 0xA0000000, 0x00000000, + 0x03F, 0x00030000, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x00010000, + 0x03E, 0x00000000, + 0x03F, 0x00006800, + 0x03E, 0x00000080, + 0x03F, 0x00006000, + 0x03E, 0x00000100, + 0x03F, 0x00004800, + 0x03E, 0x00000180, + 0x03F, 0x00004000, + 0x03E, 0x00000200, + 0x03F, 0x00004000, + 0x03E, 0x00000280, + 0x03F, 0x00002800, + 0x03E, 0x00000300, + 0x03F, 0x00002800, + 0x03E, 0x00000380, + 0x03F, 0x00002000, + 0x0EF, 0x00000000, + 0x0EF, 0x00040000, + 0x03E, 0x00000000, + 0x03F, 0x000000BC, + 0x03E, 0x00000040, + 0x03F, 0x00000053, + 0x03E, 0x00000050, + 0x03F, 0x00000050, + 0x03E, 0x00000060, + 0x03F, 0x00000050, + 0x0EF, 0x00000000, + 0x0EF, 0x00000400, + 0x03E, 0x00000006, + 0x041, 0x000EE080, + 0x03E, 0x00000008, + 0x041, 0x000EE0C0, + 0x03E, 0x0000000A, + 0x041, 0x000EE100, + 0x03E, 0x0000000C, + 0x041, 0x000EE100, + 0x0EF, 0x00000000, + 0x018, 0x00000006, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0xA0000000, 0x00000000, + 0x086, 0x000E4B58, + 0xB0000000, 0x00000000, + 0x80000004, 0x00550000, 0x40000000, 0x00000000, + 0x087, 0x00079F80, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x087, 0x00079F80, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x087, 0x00079F80, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x087, 0x00079F80, + 0xA0000000, 0x00000000, + 0x087, 0x00049F80, + 0xB0000000, 0x00000000, + 0x0DF, 0x00000008, + 0x0EF, 0x00002000, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x03B, 0x0003F19B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x000179C3, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x03B, 0x0003F19B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x000179C3, + 0xA0000000, 0x00000000, + 0x03B, 0x0003F258, + 0x03B, 0x00030A58, + 0x03B, 0x0002FA58, + 0x03B, 0x00022590, + 0x03B, 0x0001FA50, + 0x03B, 0x00010248, + 0x03B, 0x00008240, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000100, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0000ADF6, + 0x034, 0x00009DF3, + 0x034, 0x00008DF0, + 0x034, 0x00007DED, + 0x034, 0x00006DEA, + 0x034, 0x00005CED, + 0x034, 0x00004CEA, + 0x034, 0x000034EA, + 0x034, 0x000024E7, + 0x034, 0x0000146A, + 0x034, 0x0000006B, + 0xB0000000, 0x00000000, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0008ADF6, + 0x034, 0x00089DF3, + 0x034, 0x00088DF0, + 0x034, 0x00087DED, + 0x034, 0x00086DEA, + 0x034, 0x00085CED, + 0x034, 0x00084CEA, + 0x034, 0x000834EA, + 0x034, 0x000824E7, + 0x034, 0x0008146A, + 0x034, 0x0008006B, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x000020A2, + 0x0DF, 0x00000080, + 0x035, 0x00000192, + 0x035, 0x00008192, + 0x035, 0x00010192, + 0x036, 0x00000024, + 0x036, 0x00008024, + 0x036, 0x00010024, + 0x036, 0x00018024, + 0x0EF, 0x00000000, + 0x051, 0x00000C21, + 0x052, 0x000006D9, + 0x053, 0x000FC649, + 0x054, 0x0000017E, + 0x018, 0x0001012A, + 0x081, 0x0007FC00, + 0x089, 0x00050110, + 0x08A, 0x00043E50, + 0x08B, 0x0002E180, + 0x08C, 0x00093C3C, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x000F8000, + 0xA0000000, 0x00000000, + 0x085, 0x000F8000, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x08D, 0x000FFFF0, + 0xA0000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0xB0000000, 0x00000000, + 0x0EF, 0x00001000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00024000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03C, 0x00024000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03C, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03C, 0x00088000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03C, 0x00000000, + 0xA0000000, 0x00000000, + 0x03C, 0x00028000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00030023, + 0x03C, 0x00048000, + 0x03A, 0x0000013C, + 0x03B, 0x00028623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00021633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0001C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00010293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00009593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0000078B, + 0x03C, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0xA0000000, 0x00000000, + 0x03A, 0x0000013C, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03B, 0x00078023, + 0x03C, 0x00024000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03B, 0x00078023, + 0x03C, 0x000AC000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03B, 0x00078023, + 0x03C, 0x00024000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03B, 0x00078023, + 0x03C, 0x00088000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03B, 0x00078023, + 0x03C, 0x00024000, + 0xA0000000, 0x00000000, + 0x03B, 0x00078023, + 0x03C, 0x0004C000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00070023, + 0x03C, 0x00048000, + 0x03A, 0x0000013C, + 0x03B, 0x00068623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00061633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0005C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00050293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00049593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0004078B, + 0x03C, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0xA0000000, 0x00000000, + 0x03A, 0x0000013C, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03B, 0x000B8023, + 0x03C, 0x00084000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03B, 0x000B8023, + 0x03C, 0x0008C000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03B, 0x000B8023, + 0x03C, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03B, 0x000B8023, + 0x03C, 0x00084000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03B, 0x000B8023, + 0x03C, 0x00000000, + 0xA0000000, 0x00000000, + 0x03B, 0x000B8023, + 0x03C, 0x00004000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B0023, + 0x80000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03C, 0x00020000, + 0xA0000000, 0x00000000, + 0x03C, 0x00020000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000A8623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000A1633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0009C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00090293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00089593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0008078B, + 0x03C, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x00000800, + 0x03B, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x00000803, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x00000801, + 0xA0000000, 0x00000000, + 0x03A, 0x00000803, + 0xB0000000, 0x00000000, + 0x03B, 0x00040000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x00001000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x00001801, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x00000003, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x00000003, + 0xA0000000, 0x00000000, + 0x03A, 0x00001000, + 0xB0000000, 0x00000000, + 0x03B, 0x00080000, + 0x03A, 0x00001802, + 0x0EF, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000008, + 0x03C, 0x00000000, + 0x03C, 0x00000400, + 0x03C, 0x00000800, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x018, 0x00013124, + 0x0EF, 0x00000100, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004A1AD, + 0x034, 0x000491AA, + 0x034, 0x000481A7, + 0x034, 0x000470AA, + 0x034, 0x000460A7, + 0x034, 0x00045049, + 0x034, 0x00044046, + 0x034, 0x00043026, + 0x034, 0x00042009, + 0x034, 0x00041006, + 0x034, 0x00040003, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0004A3EF, + 0x034, 0x000493AF, + 0x034, 0x000483AB, + 0x034, 0x0004718C, + 0x034, 0x00046189, + 0x034, 0x0004506D, + 0x034, 0x0004406A, + 0x034, 0x0004302C, + 0x034, 0x00042029, + 0x034, 0x00041026, + 0x034, 0x00040023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0004A3EF, + 0x034, 0x000493AF, + 0x034, 0x000483AB, + 0x034, 0x0004718C, + 0x034, 0x00046189, + 0x034, 0x0004506D, + 0x034, 0x0004406A, + 0x034, 0x0004302C, + 0x034, 0x00042029, + 0x034, 0x00041026, + 0x034, 0x00040023, + 0xA0000000, 0x00000000, + 0x034, 0x0004AFF1, + 0x034, 0x00049FEE, + 0x034, 0x00048FEB, + 0x034, 0x00047FE8, + 0x034, 0x00046DEA, + 0x034, 0x00045DE7, + 0x034, 0x00044CEA, + 0x034, 0x00043CE7, + 0x034, 0x00042C69, + 0x034, 0x00041C66, + 0x034, 0x00040C28, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0002A1AD, + 0x034, 0x000291AA, + 0x034, 0x000281A7, + 0x034, 0x000270AA, + 0x034, 0x000260A7, + 0x034, 0x00025049, + 0x034, 0x00024046, + 0x034, 0x00023026, + 0x034, 0x00022009, + 0x034, 0x00021006, + 0x034, 0x00020003, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0002A3EF, + 0x034, 0x000293AC, + 0x034, 0x0002838A, + 0x034, 0x0002718C, + 0x034, 0x00026189, + 0x034, 0x0002506D, + 0x034, 0x0002406A, + 0x034, 0x0002302C, + 0x034, 0x00022029, + 0x034, 0x00021026, + 0x034, 0x00020023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0002A3EF, + 0x034, 0x000293AC, + 0x034, 0x0002838A, + 0x034, 0x0002718C, + 0x034, 0x00026189, + 0x034, 0x0002506D, + 0x034, 0x0002406A, + 0x034, 0x0002302C, + 0x034, 0x00022029, + 0x034, 0x00021026, + 0x034, 0x00020023, + 0xA0000000, 0x00000000, + 0x034, 0x0002AFF1, + 0x034, 0x00029FEE, + 0x034, 0x00028FEB, + 0x034, 0x00027FE8, + 0x034, 0x00026DEA, + 0x034, 0x00025DE7, + 0x034, 0x00024CEA, + 0x034, 0x00023CE7, + 0x034, 0x00022C69, + 0x034, 0x00021C66, + 0x034, 0x00020C28, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0000A3EC, + 0x034, 0x0000938C, + 0x034, 0x000081AD, + 0x034, 0x000071AA, + 0x034, 0x000061A7, + 0x034, 0x000050AA, + 0x034, 0x000040A7, + 0x034, 0x0000302C, + 0x034, 0x00002029, + 0x034, 0x0000100C, + 0x034, 0x00000009, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0000A3EE, + 0x034, 0x000093AC, + 0x034, 0x0000838A, + 0x034, 0x0000718C, + 0x034, 0x00006189, + 0x034, 0x0000506D, + 0x034, 0x0000406A, + 0x034, 0x0000302C, + 0x034, 0x00002029, + 0x034, 0x00001026, + 0x034, 0x00000023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0000A3EE, + 0x034, 0x000093AC, + 0x034, 0x0000838A, + 0x034, 0x0000718C, + 0x034, 0x00006189, + 0x034, 0x0000506D, + 0x034, 0x0000406A, + 0x034, 0x0000302C, + 0x034, 0x00002029, + 0x034, 0x00001026, + 0x034, 0x00000023, + 0xA0000000, 0x00000000, + 0x034, 0x0000AFF1, + 0x034, 0x00009FEE, + 0x034, 0x00008FEB, + 0x034, 0x00007FE8, + 0x034, 0x00006DEA, + 0x034, 0x00005DE7, + 0x034, 0x00004CEA, + 0x034, 0x00003CE7, + 0x034, 0x00002C69, + 0x034, 0x00001C66, + 0x034, 0x00000C28, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000CA1AD, + 0x034, 0x000C91AA, + 0x034, 0x000C81A7, + 0x034, 0x000C70AA, + 0x034, 0x000C60A7, + 0x034, 0x000C5049, + 0x034, 0x000C4046, + 0x034, 0x000C3026, + 0x034, 0x000C2009, + 0x034, 0x000C1006, + 0x034, 0x000C0003, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x000CA3EF, + 0x034, 0x000C93AF, + 0x034, 0x000C83AB, + 0x034, 0x000C718C, + 0x034, 0x000C6189, + 0x034, 0x000C506D, + 0x034, 0x000C406A, + 0x034, 0x000C302C, + 0x034, 0x000C2029, + 0x034, 0x000C1026, + 0x034, 0x000C0023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x000CA3EF, + 0x034, 0x000C93AF, + 0x034, 0x000C83AB, + 0x034, 0x000C718C, + 0x034, 0x000C6189, + 0x034, 0x000C506D, + 0x034, 0x000C406A, + 0x034, 0x000C302C, + 0x034, 0x000C2029, + 0x034, 0x000C1026, + 0x034, 0x000C0023, + 0xA0000000, 0x00000000, + 0x034, 0x000CA794, + 0x034, 0x000C9791, + 0x034, 0x000C878E, + 0x034, 0x000C778B, + 0x034, 0x000C658D, + 0x034, 0x000C558A, + 0x034, 0x000C448D, + 0x034, 0x000C348A, + 0x034, 0x000C244C, + 0x034, 0x000C1449, + 0x034, 0x000C042B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000AA1AD, + 0x034, 0x000A91AA, + 0x034, 0x000A81A7, + 0x034, 0x000A70AA, + 0x034, 0x000A60A7, + 0x034, 0x000A5049, + 0x034, 0x000A4046, + 0x034, 0x000A3026, + 0x034, 0x000A2009, + 0x034, 0x000A1006, + 0x034, 0x000A0003, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x000AA3EF, + 0x034, 0x000A93AC, + 0x034, 0x000A838A, + 0x034, 0x000A718C, + 0x034, 0x000A6189, + 0x034, 0x000A506D, + 0x034, 0x000A406A, + 0x034, 0x000A302C, + 0x034, 0x000A2029, + 0x034, 0x000A1026, + 0x034, 0x000A0023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x000AA3EF, + 0x034, 0x000A93AC, + 0x034, 0x000A838A, + 0x034, 0x000A718C, + 0x034, 0x000A6189, + 0x034, 0x000A506D, + 0x034, 0x000A406A, + 0x034, 0x000A302C, + 0x034, 0x000A2029, + 0x034, 0x000A1026, + 0x034, 0x000A0023, + 0xA0000000, 0x00000000, + 0x034, 0x000AA794, + 0x034, 0x000A9791, + 0x034, 0x000A878E, + 0x034, 0x000A778B, + 0x034, 0x000A658D, + 0x034, 0x000A558A, + 0x034, 0x000A448D, + 0x034, 0x000A348A, + 0x034, 0x000A244C, + 0x034, 0x000A1449, + 0x034, 0x000A042B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0008A3EC, + 0x034, 0x0008938C, + 0x034, 0x000881AD, + 0x034, 0x000871AA, + 0x034, 0x000861A7, + 0x034, 0x000850AA, + 0x034, 0x000840A7, + 0x034, 0x0008302C, + 0x034, 0x00082029, + 0x034, 0x0008100C, + 0x034, 0x00080009, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0008A3EE, + 0x034, 0x000893AC, + 0x034, 0x0008838A, + 0x034, 0x0008718C, + 0x034, 0x00086189, + 0x034, 0x0008506D, + 0x034, 0x0008406A, + 0x034, 0x0008302C, + 0x034, 0x00082029, + 0x034, 0x00081026, + 0x034, 0x00080023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0008A3EE, + 0x034, 0x000893AC, + 0x034, 0x0008838A, + 0x034, 0x0008718C, + 0x034, 0x00086189, + 0x034, 0x0008506D, + 0x034, 0x0008406A, + 0x034, 0x0008302C, + 0x034, 0x00082029, + 0x034, 0x00081026, + 0x034, 0x00080023, + 0xA0000000, 0x00000000, + 0x034, 0x0008A794, + 0x034, 0x00089791, + 0x034, 0x0008878E, + 0x034, 0x0008778B, + 0x034, 0x0008658D, + 0x034, 0x0008558A, + 0x034, 0x0008448D, + 0x034, 0x0008348A, + 0x034, 0x0008244C, + 0x034, 0x00081449, + 0x034, 0x0008042B, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0DF, 0x00000001, + 0x018, 0x0001712A, + 0x0EF, 0x00000040, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0xA0000000, 0x00000000, + 0x035, 0x00000747, + 0x035, 0x00008747, + 0x035, 0x00010747, + 0x035, 0x00020747, + 0x035, 0x00028747, + 0x035, 0x00030747, + 0x035, 0x00040747, + 0x035, 0x00048747, + 0x035, 0x00050747, + 0x035, 0x000805FB, + 0x035, 0x000885FB, + 0x035, 0x000905FB, + 0x035, 0x000A05FB, + 0x035, 0x000A85FB, + 0x035, 0x000B05FB, + 0x035, 0x000C05FB, + 0x035, 0x000C85FB, + 0x035, 0x000D05FB, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0DF, 0x00000001, + 0x018, 0x0001712A, + 0x0EF, 0x00000010, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x00000473, + 0x036, 0x00008473, + 0x036, 0x00010473, + 0x036, 0x00020473, + 0x036, 0x00028473, + 0x036, 0x00030473, + 0x036, 0x00040473, + 0x036, 0x00048473, + 0x036, 0x00050473, + 0x036, 0x00080473, + 0x036, 0x00088473, + 0x036, 0x00090473, + 0x036, 0x000A0473, + 0x036, 0x000A8473, + 0x036, 0x000B0473, + 0x036, 0x000C0473, + 0x036, 0x000C8473, + 0x036, 0x000D0473, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0xA0000000, 0x00000000, + 0x036, 0x00000473, + 0x036, 0x00008473, + 0x036, 0x00010473, + 0x036, 0x00020473, + 0x036, 0x00028473, + 0x036, 0x00030473, + 0x036, 0x00040473, + 0x036, 0x00048473, + 0x036, 0x00050473, + 0x036, 0x00080473, + 0x036, 0x00088473, + 0x036, 0x00090473, + 0x036, 0x000A0473, + 0x036, 0x000A8473, + 0x036, 0x000B0473, + 0x036, 0x000C0473, + 0x036, 0x000C8473, + 0x036, 0x000D0473, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000004, + 0x037, 0x00000000, + 0x038, 0x00005146, + 0x037, 0x00004000, + 0x038, 0x00005146, + 0x037, 0x00008000, + 0x038, 0x00005146, + 0x037, 0x00010000, + 0x038, 0x00005146, + 0x037, 0x00014000, + 0x038, 0x00005146, + 0x037, 0x00018000, + 0x038, 0x00004D4E, + 0x037, 0x0001C000, + 0x038, 0x00004D4E, + 0x037, 0x00020000, + 0x038, 0x00004D4E, + 0x037, 0x00024000, + 0x038, 0x000071C6, + 0x037, 0x00028000, + 0x038, 0x000071C6, + 0x037, 0x0002C000, + 0x038, 0x000071C6, + 0x037, 0x00030000, + 0x038, 0x000071CE, + 0x037, 0x00034000, + 0x038, 0x000071CE, + 0x037, 0x00038000, + 0x038, 0x00005126, + 0x037, 0x0003C000, + 0x038, 0x00005126, + 0x037, 0x00040000, + 0x038, 0x00005126, + 0x037, 0x00044000, + 0x038, 0x00005126, + 0x037, 0x00048000, + 0x038, 0x00005126, + 0x037, 0x00080000, + 0x038, 0x00005ECE, + 0x037, 0x00084000, + 0x038, 0x00005ECE, + 0x037, 0x00088000, + 0x038, 0x00005ECE, + 0x037, 0x00090000, + 0x038, 0x00005ECE, + 0x037, 0x00094000, + 0x038, 0x00005ECE, + 0x037, 0x00098000, + 0x038, 0x00005ECE, + 0x037, 0x0009C000, + 0x038, 0x00005ECE, + 0x037, 0x000A0000, + 0x038, 0x00005ECE, + 0x037, 0x000A4000, + 0x038, 0x00005ECE, + 0x037, 0x000A8000, + 0x038, 0x00005ECE, + 0x037, 0x000AC000, + 0x038, 0x00005ECE, + 0x037, 0x000B0000, + 0x038, 0x00005ECE, + 0x037, 0x000B4000, + 0x038, 0x00005ECE, + 0x037, 0x000B8000, + 0x038, 0x00005ECE, + 0x037, 0x000BC000, + 0x038, 0x00005ECE, + 0x037, 0x000C0000, + 0x038, 0x00005ECE, + 0x037, 0x000C4000, + 0x038, 0x00005ECE, + 0x037, 0x000C8000, + 0x038, 0x00005ECE, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000008, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x03C, 0x0000007D, + 0x03C, 0x0000047D, + 0x03C, 0x0000087D, + 0x03C, 0x0000107D, + 0x03C, 0x0000147D, + 0x03C, 0x0000187D, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027D, + 0x03C, 0x0000054A, + 0x03C, 0x00000821, + 0x03C, 0x0000127D, + 0x03C, 0x0000154A, + 0x03C, 0x00001821, + 0x03C, 0x0000227D, + 0x03C, 0x0000254A, + 0x03C, 0x00002821, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027D, + 0x03C, 0x0000054A, + 0x03C, 0x00000821, + 0x03C, 0x0000127D, + 0x03C, 0x0000154A, + 0x03C, 0x00001821, + 0x03C, 0x0000227D, + 0x03C, 0x0000254A, + 0x03C, 0x00002821, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027D, + 0x03C, 0x0000054A, + 0x03C, 0x00000821, + 0x03C, 0x0000127D, + 0x03C, 0x0000154A, + 0x03C, 0x00001821, + 0x03C, 0x0000227D, + 0x03C, 0x0000254A, + 0x03C, 0x00002821, + 0xA0000000, 0x00000000, + 0x03C, 0x0000037E, + 0x03C, 0x00000575, + 0x03C, 0x00000971, + 0x03C, 0x0000127E, + 0x03C, 0x00001575, + 0x03C, 0x00001871, + 0x03C, 0x0000217E, + 0x03C, 0x00002575, + 0x03C, 0x00002871, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x061, 0x000C0D47, + 0x062, 0x0000133C, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0xA0000000, 0x00000000, + 0x063, 0x0007D0E7, + 0xB0000000, 0x00000000, + 0x064, 0x00014FEC, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0xA0000000, 0x00000000, + 0x065, 0x000933FF, + 0xB0000000, 0x00000000, + 0x066, 0x00000040, + 0x057, 0x00050000, + 0x056, 0x00051DF0, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x055, 0x00082061, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x055, 0x00082061, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x055, 0x00082061, + 0xA0000000, 0x00000000, + 0x055, 0x00082060, + 0xB0000000, 0x00000000, + 0x01C, 0x000739D2, + 0x01F, 0x0002295C, + 0x018, 0x0001B126, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x018, 0x00013126, + 0x018, 0x00013124, + +}; + +void +odm_read_and_config_mp_8814a_radioa( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u4Byte ArrayLen = sizeof(Array_MP_8814A_RadioA)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8814A_RadioA; + + u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_RadioA\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigRF_RadioA_8814A(pDM_Odm, v1, v2); + } + i = i + 2; + } +} + +u4Byte +ODM_GetVersion_MP_8814A_RadioA(void) +{ + return 85; +} + +/****************************************************************************** +* RadioB.TXT +******************************************************************************/ + +u4Byte Array_MP_8814A_RadioB[] = { + 0x018, 0x00013124, + 0x040, 0x00000C00, + 0x058, 0x00000F98, + 0x07F, 0x00068004, + 0x018, 0x00000006, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0xA0000000, 0x00000000, + 0x086, 0x000E4B58, + 0xB0000000, 0x00000000, + 0x80000004, 0x00550000, 0x40000000, 0x00000000, + 0x087, 0x00079F80, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x087, 0x00079F80, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x087, 0x00079F80, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x087, 0x00079F80, + 0xA0000000, 0x00000000, + 0x087, 0x00049F80, + 0xB0000000, 0x00000000, + 0x0DF, 0x00000008, + 0x0EF, 0x00002000, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x03B, 0x0003F19B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x00017BC3, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x03B, 0x0003F39B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x00017BC3, + 0xA0000000, 0x00000000, + 0x03B, 0x0003F258, + 0x03B, 0x00030A58, + 0x03B, 0x0002FA58, + 0x03B, 0x00022590, + 0x03B, 0x0001FA50, + 0x03B, 0x00010248, + 0x03B, 0x00008240, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000100, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0000ADF6, + 0x034, 0x00009DF3, + 0x034, 0x00008DF0, + 0x034, 0x00007DED, + 0x034, 0x00006DEA, + 0x034, 0x00005CED, + 0x034, 0x00004CEA, + 0x034, 0x000034EA, + 0x034, 0x000024E7, + 0x034, 0x0000146A, + 0x034, 0x0000006B, + 0xB0000000, 0x00000000, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0008ADF6, + 0x034, 0x00089DF3, + 0x034, 0x00088DF0, + 0x034, 0x00087DED, + 0x034, 0x00086DEA, + 0x034, 0x00085CED, + 0x034, 0x00084CEA, + 0x034, 0x000834EA, + 0x034, 0x000824E7, + 0x034, 0x0008146A, + 0x034, 0x0008006B, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x000020A2, + 0x0DF, 0x00000080, + 0x035, 0x00000192, + 0x035, 0x00008192, + 0x035, 0x00010192, + 0x036, 0x00000024, + 0x036, 0x00008024, + 0x036, 0x00010024, + 0x036, 0x00018024, + 0x0EF, 0x00000000, + 0x051, 0x00000C21, + 0x052, 0x000006D9, + 0x053, 0x000FC649, + 0x054, 0x0000017E, + 0x018, 0x0001012A, + 0x081, 0x0007FC00, + 0x089, 0x00050110, + 0x08A, 0x00043E50, + 0x08B, 0x0002E180, + 0x08C, 0x00093C3C, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x000F8000, + 0xA0000000, 0x00000000, + 0x085, 0x000F8000, + 0xB0000000, 0x00000000, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x90000004, 0x00000000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x08D, 0x000FFFF0, + 0xA0000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0xB0000000, 0x00000000, + 0x0EF, 0x00001000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00088000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03C, 0x00084000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03C, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03C, 0x00088000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03C, 0x00000000, + 0xA0000000, 0x00000000, + 0x03C, 0x00040000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00030023, + 0x03C, 0x00048000, + 0x03A, 0x0000013C, + 0x03B, 0x00028623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00021633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0001C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00010293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00009593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0000078B, + 0x03C, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00020000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00060000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00048000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00048000, + 0xA0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00020000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00070023, + 0x03C, 0x00048000, + 0x03A, 0x0000013C, + 0x03B, 0x00068623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00061633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0005C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00050293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00049593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0004078B, + 0x03C, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00048000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00060000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x0004C000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00044000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x0004C000, + 0xA0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00020000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B0023, + 0x80000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03C, 0x00020000, + 0xA0000000, 0x00000000, + 0x03C, 0x00020000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000A8623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000A1633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0009C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00090293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00089593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0008078B, + 0x03C, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x00000800, + 0x03B, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x00000803, + 0xA0000000, 0x00000000, + 0x03A, 0x00000803, + 0xB0000000, 0x00000000, + 0x03B, 0x00040000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x00001000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x00001001, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x00000803, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x00001003, + 0xA0000000, 0x00000000, + 0x03A, 0x00001000, + 0xB0000000, 0x00000000, + 0x03B, 0x00080000, + 0x80000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x00000000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x00000000, + 0xA0000000, 0x00000000, + 0x03A, 0x00001802, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000008, + 0x03C, 0x00000000, + 0x03C, 0x00000400, + 0x03C, 0x00000800, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x018, 0x00013124, + 0x0EF, 0x00000100, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004A38C, + 0x034, 0x000491AD, + 0x034, 0x000481AA, + 0x034, 0x000471A7, + 0x034, 0x000460AA, + 0x034, 0x000450A7, + 0x034, 0x0004402C, + 0x034, 0x00043029, + 0x034, 0x0004200C, + 0x034, 0x00041009, + 0x034, 0x00040006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0004A38C, + 0x034, 0x00049389, + 0x034, 0x0004816D, + 0x034, 0x0004716A, + 0x034, 0x0004606D, + 0x034, 0x0004506A, + 0x034, 0x0004402C, + 0x034, 0x00043029, + 0x034, 0x00042026, + 0x034, 0x00041009, + 0x034, 0x00040006, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0004A38B, + 0x034, 0x00049388, + 0x034, 0x0004818B, + 0x034, 0x00047188, + 0x034, 0x0004606D, + 0x034, 0x0004506A, + 0x034, 0x0004402C, + 0x034, 0x00043029, + 0x034, 0x00042026, + 0x034, 0x00041009, + 0x034, 0x00040006, + 0xA0000000, 0x00000000, + 0x034, 0x0004AFF4, + 0x034, 0x00049FF1, + 0x034, 0x00048FEE, + 0x034, 0x00047FEB, + 0x034, 0x00046FE8, + 0x034, 0x00045DEA, + 0x034, 0x00044CED, + 0x034, 0x00043CEA, + 0x034, 0x00042C6C, + 0x034, 0x00041C69, + 0x034, 0x00040C2B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0002A38C, + 0x034, 0x000291AD, + 0x034, 0x000281AA, + 0x034, 0x000271A7, + 0x034, 0x000260AA, + 0x034, 0x000250A7, + 0x034, 0x0002402C, + 0x034, 0x00023029, + 0x034, 0x0002200C, + 0x034, 0x00021009, + 0x034, 0x00020006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0002A3EE, + 0x034, 0x000293AC, + 0x034, 0x00028389, + 0x034, 0x0002716D, + 0x034, 0x0002616A, + 0x034, 0x0002506D, + 0x034, 0x0002406A, + 0x034, 0x0002302C, + 0x034, 0x00022029, + 0x034, 0x00021026, + 0x034, 0x00020023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0002A3EF, + 0x034, 0x000293AD, + 0x034, 0x0002838A, + 0x034, 0x0002718C, + 0x034, 0x00026189, + 0x034, 0x0002506D, + 0x034, 0x0002406A, + 0x034, 0x0002302C, + 0x034, 0x00022029, + 0x034, 0x00021026, + 0x034, 0x00020023, + 0xA0000000, 0x00000000, + 0x034, 0x0002AFF4, + 0x034, 0x00029FF1, + 0x034, 0x00028FEE, + 0x034, 0x00027FEB, + 0x034, 0x00026FE8, + 0x034, 0x00025DEA, + 0x034, 0x00024CED, + 0x034, 0x00023CEA, + 0x034, 0x00022C6C, + 0x034, 0x00021C69, + 0x034, 0x00020C2B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0000A38C, + 0x034, 0x000091AD, + 0x034, 0x000081AA, + 0x034, 0x000071A7, + 0x034, 0x000060AA, + 0x034, 0x000050A7, + 0x034, 0x0000402C, + 0x034, 0x00003029, + 0x034, 0x00002026, + 0x034, 0x00001009, + 0x034, 0x00000006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0000A3EC, + 0x034, 0x000093AC, + 0x034, 0x000081EC, + 0x034, 0x0000716D, + 0x034, 0x0000616A, + 0x034, 0x0000506D, + 0x034, 0x0000404C, + 0x034, 0x0000302C, + 0x034, 0x00002029, + 0x034, 0x00001026, + 0x034, 0x00000023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0000A3EF, + 0x034, 0x000093AD, + 0x034, 0x0000838A, + 0x034, 0x0000718C, + 0x034, 0x00006189, + 0x034, 0x0000506D, + 0x034, 0x0000406A, + 0x034, 0x0000302C, + 0x034, 0x00002029, + 0x034, 0x00001026, + 0x034, 0x00000023, + 0xA0000000, 0x00000000, + 0x034, 0x0000AFF4, + 0x034, 0x00009FF1, + 0x034, 0x00008FEE, + 0x034, 0x00007FEB, + 0x034, 0x00006FE8, + 0x034, 0x00005DEA, + 0x034, 0x00004CED, + 0x034, 0x00003CEA, + 0x034, 0x00002C6C, + 0x034, 0x00001C69, + 0x034, 0x00000C2B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000CA38C, + 0x034, 0x000C91AD, + 0x034, 0x000C81AA, + 0x034, 0x000C71A7, + 0x034, 0x000C60AA, + 0x034, 0x000C50A7, + 0x034, 0x000C402C, + 0x034, 0x000C3029, + 0x034, 0x000C200C, + 0x034, 0x000C1009, + 0x034, 0x000C0006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x000CA38C, + 0x034, 0x000C9389, + 0x034, 0x000C816D, + 0x034, 0x000C716A, + 0x034, 0x000C606D, + 0x034, 0x000C506A, + 0x034, 0x000C402C, + 0x034, 0x000C3029, + 0x034, 0x000C2026, + 0x034, 0x000C1009, + 0x034, 0x000C0006, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x000CA38B, + 0x034, 0x000C9388, + 0x034, 0x000C818B, + 0x034, 0x000C7188, + 0x034, 0x000C606D, + 0x034, 0x000C506A, + 0x034, 0x000C402C, + 0x034, 0x000C3029, + 0x034, 0x000C2026, + 0x034, 0x000C1009, + 0x034, 0x000C0006, + 0xA0000000, 0x00000000, + 0x034, 0x000CA794, + 0x034, 0x000C9791, + 0x034, 0x000C878E, + 0x034, 0x000C778B, + 0x034, 0x000C658D, + 0x034, 0x000C558A, + 0x034, 0x000C448D, + 0x034, 0x000C348A, + 0x034, 0x000C244C, + 0x034, 0x000C1449, + 0x034, 0x000C042B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000AA38C, + 0x034, 0x000A91AD, + 0x034, 0x000A81AA, + 0x034, 0x000A71A7, + 0x034, 0x000A60AA, + 0x034, 0x000A50A7, + 0x034, 0x000A402C, + 0x034, 0x000A3029, + 0x034, 0x000A200C, + 0x034, 0x000A1009, + 0x034, 0x000A0006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x000AA3EE, + 0x034, 0x000A93AC, + 0x034, 0x000A8389, + 0x034, 0x000A716D, + 0x034, 0x000A616A, + 0x034, 0x000A506D, + 0x034, 0x000A406A, + 0x034, 0x000A302C, + 0x034, 0x000A2029, + 0x034, 0x000A1026, + 0x034, 0x000A0023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x000AA3EF, + 0x034, 0x000A93AD, + 0x034, 0x000A838A, + 0x034, 0x000A718C, + 0x034, 0x000A6189, + 0x034, 0x000A506D, + 0x034, 0x000A406A, + 0x034, 0x000A302C, + 0x034, 0x000A2029, + 0x034, 0x000A1026, + 0x034, 0x000A0023, + 0xA0000000, 0x00000000, + 0x034, 0x000AA794, + 0x034, 0x000A9791, + 0x034, 0x000A878E, + 0x034, 0x000A778B, + 0x034, 0x000A658D, + 0x034, 0x000A558A, + 0x034, 0x000A448D, + 0x034, 0x000A348A, + 0x034, 0x000A244C, + 0x034, 0x000A1449, + 0x034, 0x000A042B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0008A38C, + 0x034, 0x000891AD, + 0x034, 0x000881AA, + 0x034, 0x000871A7, + 0x034, 0x000860AA, + 0x034, 0x000850A7, + 0x034, 0x0008402C, + 0x034, 0x00083029, + 0x034, 0x00082026, + 0x034, 0x00081009, + 0x034, 0x00080006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0008A3EC, + 0x034, 0x000893AC, + 0x034, 0x000881EC, + 0x034, 0x0008716D, + 0x034, 0x0008616A, + 0x034, 0x0008506D, + 0x034, 0x0008404C, + 0x034, 0x0008302C, + 0x034, 0x00082029, + 0x034, 0x00081026, + 0x034, 0x00080023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0008A3EF, + 0x034, 0x000893AD, + 0x034, 0x0008838A, + 0x034, 0x0008718C, + 0x034, 0x00086189, + 0x034, 0x0008506D, + 0x034, 0x0008406A, + 0x034, 0x0008302C, + 0x034, 0x00082029, + 0x034, 0x00081026, + 0x034, 0x00080023, + 0xA0000000, 0x00000000, + 0x034, 0x0008A794, + 0x034, 0x00089791, + 0x034, 0x0008878E, + 0x034, 0x0008778B, + 0x034, 0x0008658D, + 0x034, 0x0008558A, + 0x034, 0x0008448D, + 0x034, 0x0008348A, + 0x034, 0x0008244C, + 0x034, 0x00081449, + 0x034, 0x0008042B, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0xA0000000, 0x00000000, + 0x0DF, 0x00000000, + 0xB0000000, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000040, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0xA0000000, 0x00000000, + 0x035, 0x00000484, + 0x035, 0x00008484, + 0x035, 0x00010484, + 0x035, 0x00020584, + 0x035, 0x00028584, + 0x035, 0x00030584, + 0x035, 0x00040584, + 0x035, 0x00048584, + 0x035, 0x00050584, + 0x035, 0x000805FB, + 0x035, 0x000885FB, + 0x035, 0x000905FB, + 0x035, 0x000A05FB, + 0x035, 0x000A85FB, + 0x035, 0x000B05FB, + 0x035, 0x000C05FB, + 0x035, 0x000C85FB, + 0x035, 0x000D05FB, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0xA0000000, 0x00000000, + 0x0DF, 0x00000000, + 0xB0000000, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000010, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x00000473, + 0x036, 0x00008473, + 0x036, 0x00010473, + 0x036, 0x00020473, + 0x036, 0x00028473, + 0x036, 0x00030473, + 0x036, 0x00040473, + 0x036, 0x00048473, + 0x036, 0x00050473, + 0x036, 0x00080473, + 0x036, 0x00088473, + 0x036, 0x00090473, + 0x036, 0x000A0473, + 0x036, 0x000A8473, + 0x036, 0x000B0473, + 0x036, 0x000C0473, + 0x036, 0x000C8473, + 0x036, 0x000D0473, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0xA0000000, 0x00000000, + 0x036, 0x00000474, + 0x036, 0x00008474, + 0x036, 0x00010474, + 0x036, 0x00020474, + 0x036, 0x00028474, + 0x036, 0x00030474, + 0x036, 0x00040474, + 0x036, 0x00048474, + 0x036, 0x00050474, + 0x036, 0x00080474, + 0x036, 0x00088474, + 0x036, 0x00090474, + 0x036, 0x000A0474, + 0x036, 0x000A8474, + 0x036, 0x000B0474, + 0x036, 0x000C0474, + 0x036, 0x000C8474, + 0x036, 0x000D0474, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000004, + 0x037, 0x00000000, + 0x038, 0x0000514E, + 0x037, 0x00004000, + 0x038, 0x0000514E, + 0x037, 0x00008000, + 0x038, 0x0000514E, + 0x037, 0x00010000, + 0x038, 0x0000514E, + 0x037, 0x00014000, + 0x038, 0x0000514E, + 0x037, 0x00018000, + 0x038, 0x0000514E, + 0x037, 0x0001C000, + 0x038, 0x0000514E, + 0x037, 0x00020000, + 0x038, 0x0000514E, + 0x037, 0x00024000, + 0x038, 0x0000514E, + 0x037, 0x00028000, + 0x038, 0x0000514E, + 0x037, 0x0002C000, + 0x038, 0x0000714E, + 0x037, 0x00030000, + 0x038, 0x0000514E, + 0x037, 0x00034000, + 0x038, 0x0000514E, + 0x037, 0x00038000, + 0x038, 0x0000514E, + 0x037, 0x0003C000, + 0x038, 0x0000514E, + 0x037, 0x00040000, + 0x038, 0x0000514E, + 0x037, 0x00044000, + 0x038, 0x0000514E, + 0x037, 0x00048000, + 0x038, 0x0000514E, + 0x037, 0x00080000, + 0x038, 0x00005ECE, + 0x037, 0x00084000, + 0x038, 0x00005ECE, + 0x037, 0x00088000, + 0x038, 0x00005ECE, + 0x037, 0x00090000, + 0x038, 0x00005ECE, + 0x037, 0x00094000, + 0x038, 0x00005ECE, + 0x037, 0x00098000, + 0x038, 0x00005ECE, + 0x037, 0x0009C000, + 0x038, 0x00005ECE, + 0x037, 0x000A0000, + 0x038, 0x00005ECE, + 0x037, 0x000A4000, + 0x038, 0x00005ECE, + 0x037, 0x000A8000, + 0x038, 0x00005ECE, + 0x037, 0x000AC000, + 0x038, 0x00005ECE, + 0x037, 0x000B0000, + 0x038, 0x00005ECE, + 0x037, 0x000B4000, + 0x038, 0x00005ECE, + 0x037, 0x000B8000, + 0x038, 0x00005ECE, + 0x037, 0x000BC000, + 0x038, 0x00005ECE, + 0x037, 0x000C0000, + 0x038, 0x00005ECE, + 0x037, 0x000C4000, + 0x038, 0x00005ECE, + 0x037, 0x000C8000, + 0x038, 0x00005ECE, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000008, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x03C, 0x0000007D, + 0x03C, 0x0000047D, + 0x03C, 0x0000087D, + 0x03C, 0x0000107D, + 0x03C, 0x0000147D, + 0x03C, 0x0000187D, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027E, + 0x03C, 0x00000546, + 0x03C, 0x00000821, + 0x03C, 0x0000127E, + 0x03C, 0x00001546, + 0x03C, 0x00001821, + 0x03C, 0x0000227E, + 0x03C, 0x00002546, + 0x03C, 0x00002821, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027E, + 0x03C, 0x00000546, + 0x03C, 0x00000821, + 0x03C, 0x0000127E, + 0x03C, 0x00001546, + 0x03C, 0x00001821, + 0x03C, 0x0000227E, + 0x03C, 0x00002546, + 0x03C, 0x00002821, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027E, + 0x03C, 0x00000546, + 0x03C, 0x00000821, + 0x03C, 0x0000127E, + 0x03C, 0x00001546, + 0x03C, 0x00001821, + 0x03C, 0x0000227E, + 0x03C, 0x00002546, + 0x03C, 0x00002821, + 0xA0000000, 0x00000000, + 0x03C, 0x0000037E, + 0x03C, 0x00000575, + 0x03C, 0x00000971, + 0x03C, 0x0000127E, + 0x03C, 0x00001575, + 0x03C, 0x00001871, + 0x03C, 0x0000217E, + 0x03C, 0x00002575, + 0x03C, 0x00002871, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x061, 0x000C0D47, + 0x062, 0x0000133C, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0xA0000000, 0x00000000, + 0x063, 0x0007D0E7, + 0xB0000000, 0x00000000, + 0x064, 0x00014FEC, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0xA0000000, 0x00000000, + 0x065, 0x000923FF, + 0xB0000000, 0x00000000, + 0x066, 0x00000040, + 0x057, 0x00050000, + 0x056, 0x00051DF0, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x055, 0x00082060, + 0xB0000000, 0x00000000, + +}; + +void +odm_read_and_config_mp_8814a_radiob( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u4Byte ArrayLen = sizeof(Array_MP_8814A_RadioB)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8814A_RadioB; + + u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_RadioB\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigRF_RadioB_8814A(pDM_Odm, v1, v2); + } + i = i + 2; + } +} + +u4Byte +ODM_GetVersion_MP_8814A_RadioB(void) +{ + return 85; +} + +/****************************************************************************** +* RadioC.TXT +******************************************************************************/ + +u4Byte Array_MP_8814A_RadioC[] = { + 0x018, 0x00013124, + 0x040, 0x00000C00, + 0x058, 0x00000F98, + 0x07F, 0x00068004, + 0x018, 0x00000006, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0x087, 0x00079F80, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0x087, 0x00079F80, + 0xA0000000, 0x00000000, + 0x086, 0x000E4B58, + 0x087, 0x00049F80, + 0xB0000000, 0x00000000, + 0x0DF, 0x00000008, + 0x0EF, 0x00002000, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x03B, 0x0003F19B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x00017823, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x03B, 0x0003F19B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x00017823, + 0xA0000000, 0x00000000, + 0x03B, 0x0003F258, + 0x03B, 0x00030A58, + 0x03B, 0x0002FA58, + 0x03B, 0x00022590, + 0x03B, 0x0001FA50, + 0x03B, 0x00010248, + 0x03B, 0x00008240, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000100, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0000ADF6, + 0x034, 0x00009DF3, + 0x034, 0x00008DF0, + 0x034, 0x00007DED, + 0x034, 0x00006DEA, + 0x034, 0x00005CED, + 0x034, 0x00004CEA, + 0x034, 0x000034EA, + 0x034, 0x000024E7, + 0x034, 0x0000146A, + 0x034, 0x0000006B, + 0xB0000000, 0x00000000, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0008ADF6, + 0x034, 0x00089DF3, + 0x034, 0x00088DF0, + 0x034, 0x00087DED, + 0x034, 0x00086DEA, + 0x034, 0x00085CED, + 0x034, 0x00084CEA, + 0x034, 0x000834EA, + 0x034, 0x000824E7, + 0x034, 0x0008146A, + 0x034, 0x0008006B, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x000020A2, + 0x0DF, 0x00000080, + 0x035, 0x00000192, + 0x035, 0x00008192, + 0x035, 0x00010192, + 0x036, 0x00000024, + 0x036, 0x00008024, + 0x036, 0x00010024, + 0x036, 0x00018024, + 0x0EF, 0x00000000, + 0x051, 0x00000C21, + 0x052, 0x000006D9, + 0x053, 0x000FC649, + 0x054, 0x0000017E, + 0x018, 0x0001012A, + 0x081, 0x0007FC00, + 0x089, 0x00050110, + 0x08A, 0x00043E50, + 0x08B, 0x0002E180, + 0x08C, 0x00093C3C, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x000F8000, + 0xA0000000, 0x00000000, + 0x085, 0x000F8000, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x08D, 0x000FFFF0, + 0xA0000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0xB0000000, 0x00000000, + 0x0EF, 0x00001000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x0006C000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03C, 0x000D4000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03C, 0x00080000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03C, 0x00088000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03C, 0x00000000, + 0xA0000000, 0x00000000, + 0x03C, 0x000A0000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00030023, + 0x03C, 0x00048000, + 0x03A, 0x0000013C, + 0x03B, 0x00028623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00021633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0001C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00010293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00009593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0000078B, + 0x03C, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x0004C000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00084000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00080000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00000000, + 0xA0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00078023, + 0x03C, 0x00028000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00070023, + 0x03C, 0x00048000, + 0x03A, 0x0000013C, + 0x03B, 0x00068623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00061633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0005C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00050293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00049593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0004078B, + 0x03C, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00024000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00060000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00080000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00024000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00000000, + 0xA0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B8023, + 0x03C, 0x00020000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000B0023, + 0x80000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03C, 0x00020000, + 0xA0000000, 0x00000000, + 0x03C, 0x00020000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000A8623, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x000A1633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x0009C633, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00090293, + 0x03C, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00089593, + 0x03C, 0x00000000, + 0x03A, 0x00000148, + 0x03B, 0x0008078B, + 0x03C, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x00000800, + 0x03B, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x00000803, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x00000000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x00001803, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x00001803, + 0xA0000000, 0x00000000, + 0x03A, 0x00000803, + 0xB0000000, 0x00000000, + 0x03B, 0x00040000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x00001000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x00000800, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x00000803, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x00000803, + 0xA0000000, 0x00000000, + 0x03A, 0x00001000, + 0xB0000000, 0x00000000, + 0x03B, 0x00080000, + 0x80000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x00000000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x00000000, + 0xA0000000, 0x00000000, + 0x03A, 0x00001802, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000008, + 0x03C, 0x00000000, + 0x03C, 0x00000400, + 0x03C, 0x00000800, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x018, 0x00013124, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x018, 0x00013124, + 0xA0000000, 0x00000000, + 0x018, 0x00013124, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000100, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004A38C, + 0x034, 0x000491AD, + 0x034, 0x000481AA, + 0x034, 0x000471A7, + 0x034, 0x000460AA, + 0x034, 0x000450A7, + 0x034, 0x0004402C, + 0x034, 0x00043029, + 0x034, 0x0004200C, + 0x034, 0x00041009, + 0x034, 0x00040006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0004A3EF, + 0x034, 0x000493AD, + 0x034, 0x0004838A, + 0x034, 0x0004718C, + 0x034, 0x00046189, + 0x034, 0x0004506D, + 0x034, 0x0004404C, + 0x034, 0x0004302C, + 0x034, 0x00042029, + 0x034, 0x00041026, + 0x034, 0x00040023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0004A3EF, + 0x034, 0x000493AD, + 0x034, 0x0004838A, + 0x034, 0x0004718C, + 0x034, 0x00046189, + 0x034, 0x0004506D, + 0x034, 0x0004404C, + 0x034, 0x0004302C, + 0x034, 0x00042029, + 0x034, 0x00041026, + 0x034, 0x00040023, + 0xA0000000, 0x00000000, + 0x034, 0x0004AFF4, + 0x034, 0x00049FF1, + 0x034, 0x00048FEE, + 0x034, 0x00047FEB, + 0x034, 0x00046FE8, + 0x034, 0x00045DEA, + 0x034, 0x00044CED, + 0x034, 0x00043CEA, + 0x034, 0x00042C6C, + 0x034, 0x00041C69, + 0x034, 0x00040C2B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0002A3EC, + 0x034, 0x0002938C, + 0x034, 0x000281AD, + 0x034, 0x000271AA, + 0x034, 0x000261A7, + 0x034, 0x000250AA, + 0x034, 0x000240A7, + 0x034, 0x0002302C, + 0x034, 0x00022029, + 0x034, 0x0002100C, + 0x034, 0x00020009, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0002A3EC, + 0x034, 0x0002936D, + 0x034, 0x0002836A, + 0x034, 0x0002716D, + 0x034, 0x0002616A, + 0x034, 0x0002506D, + 0x034, 0x0002406A, + 0x034, 0x0002302C, + 0x034, 0x00022029, + 0x034, 0x00021026, + 0x034, 0x00020023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0002A3EC, + 0x034, 0x000293AC, + 0x034, 0x0002838A, + 0x034, 0x0002718C, + 0x034, 0x00026189, + 0x034, 0x0002506D, + 0x034, 0x0002406A, + 0x034, 0x0002302C, + 0x034, 0x00022029, + 0x034, 0x00021026, + 0x034, 0x00020023, + 0xA0000000, 0x00000000, + 0x034, 0x0002AFF4, + 0x034, 0x00029FF1, + 0x034, 0x00028FEE, + 0x034, 0x00027FEB, + 0x034, 0x00026FE8, + 0x034, 0x00025DEA, + 0x034, 0x00024CED, + 0x034, 0x00023CEA, + 0x034, 0x00022C6C, + 0x034, 0x00021C69, + 0x034, 0x00020C2B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0000A38C, + 0x034, 0x000091AD, + 0x034, 0x000081AA, + 0x034, 0x000071A7, + 0x034, 0x000060AA, + 0x034, 0x000050A7, + 0x034, 0x0000402C, + 0x034, 0x00003029, + 0x034, 0x0000200C, + 0x034, 0x00001009, + 0x034, 0x00000006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0000A3EE, + 0x034, 0x000093AB, + 0x034, 0x00008389, + 0x034, 0x0000718C, + 0x034, 0x00006189, + 0x034, 0x0000506D, + 0x034, 0x0000406A, + 0x034, 0x0000302C, + 0x034, 0x00002029, + 0x034, 0x00001026, + 0x034, 0x00000023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0000A3EE, + 0x034, 0x000093AB, + 0x034, 0x00008389, + 0x034, 0x0000718C, + 0x034, 0x00006189, + 0x034, 0x0000506D, + 0x034, 0x0000406A, + 0x034, 0x0000302C, + 0x034, 0x00002029, + 0x034, 0x00001026, + 0x034, 0x00000023, + 0xA0000000, 0x00000000, + 0x034, 0x0000AFF4, + 0x034, 0x00009FF1, + 0x034, 0x00008FEE, + 0x034, 0x00007FEB, + 0x034, 0x00006FE8, + 0x034, 0x00005DEA, + 0x034, 0x00004CED, + 0x034, 0x00003CEA, + 0x034, 0x00002C6C, + 0x034, 0x00001C69, + 0x034, 0x00000C2B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000CA38C, + 0x034, 0x000C91AD, + 0x034, 0x000C81AA, + 0x034, 0x000C71A7, + 0x034, 0x000C60AA, + 0x034, 0x000C50A7, + 0x034, 0x000C402C, + 0x034, 0x000C3029, + 0x034, 0x000C200C, + 0x034, 0x000C1009, + 0x034, 0x000C0006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x000CA3EF, + 0x034, 0x000C93AD, + 0x034, 0x000C838A, + 0x034, 0x000C718C, + 0x034, 0x000C6189, + 0x034, 0x000C506D, + 0x034, 0x000C404C, + 0x034, 0x000C302C, + 0x034, 0x000C2029, + 0x034, 0x000C1026, + 0x034, 0x000C0023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x000CA3EF, + 0x034, 0x000C93AD, + 0x034, 0x000C838A, + 0x034, 0x000C718C, + 0x034, 0x000C6189, + 0x034, 0x000C506D, + 0x034, 0x000C404C, + 0x034, 0x000C302C, + 0x034, 0x000C2029, + 0x034, 0x000C1026, + 0x034, 0x000C0023, + 0xA0000000, 0x00000000, + 0x034, 0x000CA794, + 0x034, 0x000C9791, + 0x034, 0x000C878E, + 0x034, 0x000C778B, + 0x034, 0x000C658D, + 0x034, 0x000C558A, + 0x034, 0x000C448D, + 0x034, 0x000C348A, + 0x034, 0x000C244C, + 0x034, 0x000C1449, + 0x034, 0x000C042B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000AA3EC, + 0x034, 0x000A938C, + 0x034, 0x000A81AD, + 0x034, 0x000A71AA, + 0x034, 0x000A61A7, + 0x034, 0x000A50AA, + 0x034, 0x000A40A7, + 0x034, 0x000A302C, + 0x034, 0x000A2029, + 0x034, 0x000A100C, + 0x034, 0x000A0009, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x000AA3EC, + 0x034, 0x000A936D, + 0x034, 0x000A836A, + 0x034, 0x000A716D, + 0x034, 0x000A616A, + 0x034, 0x000A506D, + 0x034, 0x000A406A, + 0x034, 0x000A302C, + 0x034, 0x000A2029, + 0x034, 0x000A1026, + 0x034, 0x000A0023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x000AA3EC, + 0x034, 0x000A93AC, + 0x034, 0x000A838A, + 0x034, 0x000A718C, + 0x034, 0x000A6189, + 0x034, 0x000A506D, + 0x034, 0x000A406A, + 0x034, 0x000A302C, + 0x034, 0x000A2029, + 0x034, 0x000A1026, + 0x034, 0x000A0023, + 0xA0000000, 0x00000000, + 0x034, 0x000AA794, + 0x034, 0x000A9791, + 0x034, 0x000A878E, + 0x034, 0x000A778B, + 0x034, 0x000A658D, + 0x034, 0x000A558A, + 0x034, 0x000A448D, + 0x034, 0x000A348A, + 0x034, 0x000A244C, + 0x034, 0x000A1449, + 0x034, 0x000A042B, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0008A38C, + 0x034, 0x000891AD, + 0x034, 0x000881AA, + 0x034, 0x000871A7, + 0x034, 0x000860AA, + 0x034, 0x000850A7, + 0x034, 0x0008402C, + 0x034, 0x00083029, + 0x034, 0x0008200C, + 0x034, 0x00081009, + 0x034, 0x00000006, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x034, 0x0008A3EE, + 0x034, 0x000893AB, + 0x034, 0x00088389, + 0x034, 0x0008718C, + 0x034, 0x00086189, + 0x034, 0x0008506D, + 0x034, 0x0008406A, + 0x034, 0x0008302C, + 0x034, 0x00082029, + 0x034, 0x00081026, + 0x034, 0x00080023, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x034, 0x0008A3EE, + 0x034, 0x000893AB, + 0x034, 0x00088389, + 0x034, 0x0008718C, + 0x034, 0x00086189, + 0x034, 0x0008506D, + 0x034, 0x0008406A, + 0x034, 0x0008302C, + 0x034, 0x00082029, + 0x034, 0x00081026, + 0x034, 0x00080023, + 0xA0000000, 0x00000000, + 0x034, 0x0008A794, + 0x034, 0x00089791, + 0x034, 0x0008878E, + 0x034, 0x0008778B, + 0x034, 0x0008658D, + 0x034, 0x0008558A, + 0x034, 0x0008448D, + 0x034, 0x0008348A, + 0x034, 0x0008244C, + 0x034, 0x00081449, + 0x034, 0x0008042B, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0xA0000000, 0x00000000, + 0x0DF, 0x00000000, + 0xB0000000, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000040, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0xA0000000, 0x00000000, + 0x035, 0x00000484, + 0x035, 0x00008484, + 0x035, 0x00010484, + 0x035, 0x00020584, + 0x035, 0x00028584, + 0x035, 0x00030584, + 0x035, 0x00040584, + 0x035, 0x00048584, + 0x035, 0x00050584, + 0x035, 0x000805FB, + 0x035, 0x000885FB, + 0x035, 0x000905FB, + 0x035, 0x000A05FB, + 0x035, 0x000A85FB, + 0x035, 0x000B05FB, + 0x035, 0x000C05FB, + 0x035, 0x000C85FB, + 0x035, 0x000D05FB, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0xA0000000, 0x00000000, + 0x0DF, 0x00000000, + 0xB0000000, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000010, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x00000473, + 0x036, 0x00008473, + 0x036, 0x00010473, + 0x036, 0x00020473, + 0x036, 0x00028473, + 0x036, 0x00030473, + 0x036, 0x00040473, + 0x036, 0x00048473, + 0x036, 0x00050473, + 0x036, 0x00080473, + 0x036, 0x00088473, + 0x036, 0x00090473, + 0x036, 0x000A0473, + 0x036, 0x000A8473, + 0x036, 0x000B0473, + 0x036, 0x000C0473, + 0x036, 0x000C8473, + 0x036, 0x000D0473, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0xA0000000, 0x00000000, + 0x036, 0x00000474, + 0x036, 0x00008474, + 0x036, 0x00010474, + 0x036, 0x00020474, + 0x036, 0x00028474, + 0x036, 0x00030474, + 0x036, 0x00040474, + 0x036, 0x00048474, + 0x036, 0x00050474, + 0x036, 0x00080474, + 0x036, 0x00088474, + 0x036, 0x00090474, + 0x036, 0x000A0474, + 0x036, 0x000A8474, + 0x036, 0x000B0474, + 0x036, 0x000C0474, + 0x036, 0x000C8474, + 0x036, 0x000D0474, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000004, + 0x037, 0x00000000, + 0x038, 0x0000514E, + 0x037, 0x00004000, + 0x038, 0x0000514E, + 0x037, 0x00008000, + 0x038, 0x0000514E, + 0x037, 0x00010000, + 0x038, 0x0000514E, + 0x037, 0x00014000, + 0x038, 0x0000514E, + 0x037, 0x00018000, + 0x038, 0x0000514E, + 0x037, 0x0001C000, + 0x038, 0x0000514E, + 0x037, 0x00020000, + 0x038, 0x0000514E, + 0x037, 0x00024000, + 0x038, 0x0000514E, + 0x037, 0x00028000, + 0x038, 0x0000514E, + 0x037, 0x0002C000, + 0x038, 0x0000714E, + 0x037, 0x00030000, + 0x038, 0x0000514E, + 0x037, 0x00034000, + 0x038, 0x0000514E, + 0x037, 0x00038000, + 0x038, 0x0000514E, + 0x037, 0x0003C000, + 0x038, 0x0000514E, + 0x037, 0x00040000, + 0x038, 0x0000514E, + 0x037, 0x00044000, + 0x038, 0x0000514E, + 0x037, 0x00048000, + 0x038, 0x0000514E, + 0x037, 0x00080000, + 0x038, 0x00005ECE, + 0x037, 0x00084000, + 0x038, 0x00005ECE, + 0x037, 0x00088000, + 0x038, 0x00005ECE, + 0x037, 0x00090000, + 0x038, 0x00005ECE, + 0x037, 0x00094000, + 0x038, 0x00005ECE, + 0x037, 0x00098000, + 0x038, 0x00005ECE, + 0x037, 0x0009C000, + 0x038, 0x00005ECE, + 0x037, 0x000A0000, + 0x038, 0x00005ECE, + 0x037, 0x000A4000, + 0x038, 0x00005ECE, + 0x037, 0x000A8000, + 0x038, 0x00005ECE, + 0x037, 0x000AC000, + 0x038, 0x00005ECE, + 0x037, 0x000B0000, + 0x038, 0x00005ECE, + 0x037, 0x000B4000, + 0x038, 0x00005ECE, + 0x037, 0x000B8000, + 0x038, 0x00005ECE, + 0x037, 0x000BC000, + 0x038, 0x00005ECE, + 0x037, 0x000C0000, + 0x038, 0x00005ECE, + 0x037, 0x000C4000, + 0x038, 0x00005ECE, + 0x037, 0x000C8000, + 0x038, 0x00005ECE, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000008, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x03C, 0x0000007D, + 0x03C, 0x0000047D, + 0x03C, 0x0000087D, + 0x03C, 0x0000107D, + 0x03C, 0x0000147D, + 0x03C, 0x0000187D, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027D, + 0x03C, 0x00000541, + 0x03C, 0x00000821, + 0x03C, 0x0000127D, + 0x03C, 0x00001541, + 0x03C, 0x00001821, + 0x03C, 0x0000227D, + 0x03C, 0x00002541, + 0x03C, 0x00002821, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027D, + 0x03C, 0x00000546, + 0x03C, 0x00000821, + 0x03C, 0x0000127D, + 0x03C, 0x00001546, + 0x03C, 0x00001821, + 0x03C, 0x0000227D, + 0x03C, 0x00002546, + 0x03C, 0x00002821, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027D, + 0x03C, 0x00000546, + 0x03C, 0x00000821, + 0x03C, 0x0000127D, + 0x03C, 0x00001546, + 0x03C, 0x00001821, + 0x03C, 0x0000227D, + 0x03C, 0x00002546, + 0x03C, 0x00002821, + 0xA0000000, 0x00000000, + 0x03C, 0x0000037E, + 0x03C, 0x00000575, + 0x03C, 0x00000971, + 0x03C, 0x0000127E, + 0x03C, 0x00001575, + 0x03C, 0x00001871, + 0x03C, 0x0000217E, + 0x03C, 0x00002575, + 0x03C, 0x00002871, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x061, 0x000C0D47, + 0x062, 0x0000133C, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0xA0000000, 0x00000000, + 0x063, 0x0007D0E7, + 0xB0000000, 0x00000000, + 0x064, 0x00014FEC, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0xA0000000, 0x00000000, + 0x065, 0x000923FF, + 0xB0000000, 0x00000000, + 0x066, 0x00000040, + 0x057, 0x00050000, + 0x056, 0x00051DF0, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x055, 0x00082060, + 0xB0000000, 0x00000000, + +}; + +void +odm_read_and_config_mp_8814a_radioc( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u4Byte ArrayLen = sizeof(Array_MP_8814A_RadioC)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8814A_RadioC; + + u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_RadioC\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigRF_RadioC_8814A(pDM_Odm, v1, v2); + } + i = i + 2; + } +} + +u4Byte +ODM_GetVersion_MP_8814A_RadioC(void) +{ + return 85; +} + +/****************************************************************************** +* RadioD.TXT +******************************************************************************/ + +u4Byte Array_MP_8814A_RadioD[] = { + 0x018, 0x00013124, + 0x040, 0x00000C00, + 0x058, 0x00000F98, + 0x07F, 0x00068004, + 0x018, 0x00000006, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0x087, 0x00079F80, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x086, 0x000E335A, + 0x087, 0x00079F80, + 0xA0000000, 0x00000000, + 0x086, 0x000E4B58, + 0x087, 0x00049F80, + 0xB0000000, 0x00000000, + 0x0DF, 0x00000008, + 0x0EF, 0x00002000, + 0x80000001, 0x00000055, 0x40000000, 0x00000000, + 0x03B, 0x0003F19B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x00017803, + 0x90000001, 0x000000aa, 0x40000000, 0x00000000, + 0x03B, 0x0003F09B, + 0x03B, 0x00037A5B, + 0x03B, 0x0002A433, + 0x03B, 0x00027BD3, + 0x03B, 0x0001F80B, + 0x03B, 0x00017803, + 0xA0000000, 0x00000000, + 0x03B, 0x0003F258, + 0x03B, 0x00030A58, + 0x03B, 0x0002FA58, + 0x03B, 0x00022590, + 0x03B, 0x0001FA50, + 0x03B, 0x00010248, + 0x03B, 0x00008240, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000100, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0000ADF6, + 0x034, 0x00009DF3, + 0x034, 0x00008DF0, + 0x034, 0x00007DED, + 0x034, 0x00006DEA, + 0x034, 0x00005CED, + 0x034, 0x00004CEA, + 0x034, 0x000034EA, + 0x034, 0x000024E7, + 0x034, 0x0000146A, + 0x034, 0x0000006B, + 0xB0000000, 0x00000000, + 0x80000002, 0x00005500, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0x90000002, 0x0000aa00, 0x40000000, 0x00000000, + 0x034, 0x0000A0D0, + 0x034, 0x000090CD, + 0x034, 0x000080CA, + 0x034, 0x0000704D, + 0x034, 0x0000604A, + 0x034, 0x00005047, + 0x034, 0x0000400A, + 0x034, 0x00003007, + 0x034, 0x00002004, + 0x034, 0x00001001, + 0x034, 0x00000001, + 0xA0000000, 0x00000000, + 0x034, 0x0008ADF6, + 0x034, 0x00089DF3, + 0x034, 0x00088DF0, + 0x034, 0x00087DED, + 0x034, 0x00086DEA, + 0x034, 0x00085CED, + 0x034, 0x00084CEA, + 0x034, 0x000834EA, + 0x034, 0x000824E7, + 0x034, 0x0008146A, + 0x034, 0x0008006B, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x000020A2, + 0x0DF, 0x00000080, + 0x035, 0x00000192, + 0x035, 0x00008192, + 0x035, 0x00010192, + 0x036, 0x00000024, + 0x036, 0x00008024, + 0x036, 0x00010024, + 0x036, 0x00018024, + 0x0EF, 0x00000000, + 0x051, 0x00000C21, + 0x052, 0x000006D9, + 0x053, 0x000FC649, + 0x054, 0x0000017E, + 0x018, 0x0001012A, + 0x081, 0x0007FC00, + 0x089, 0x00050110, + 0x08A, 0x00043E50, + 0x08B, 0x0002E180, + 0x08C, 0x00093C3C, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x085, 0x000F8000, + 0xA0000000, 0x00000000, + 0x085, 0x000F8000, + 0xB0000000, 0x00000000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x08D, 0x000FFFF0, + 0xA0000000, 0x00000000, + 0x08D, 0x000FFFF0, + 0xB0000000, 0x00000000, + 0x0EF, 0x00001000, + 0x80000004, 0x00000000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x03C, 0x00044000, + 0x90000004, 0x00550000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x03C, 0x00048000, + 0x90000004, 0x00aa0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x03C, 0x00000000, + 0x90000004, 0x00ff0000, 0x40000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x03C, 0x00088000, + 0x90000004, 0x00000000, 0x40000000, 0x00550000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x03C, 0x00000000, + 0xA0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00038023, + 0x03C, 0x00048000, + 0xB0000000, 0x00000000, + 0x03A, 0x0000013C, + 0x03B, 0x00030023, + 0x03C, 0x00048000, + 0x03A, 0x0000013C, + 0x03B, 0x00028623, + 0x03C, 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0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x035, 0x000006CC, + 0x035, 0x000086CC, + 0x035, 0x000106CC, + 0x035, 0x000206CC, + 0x035, 0x000286CC, + 0x035, 0x000306CC, + 0x035, 0x000406CC, + 0x035, 0x000486CC, + 0x035, 0x000506CC, + 0x035, 0x000806CC, + 0x035, 0x000886CC, + 0x035, 0x000906CC, + 0x035, 0x000A06CC, + 0x035, 0x000A86CC, + 0x035, 0x000B06CC, + 0x035, 0x000C06CC, + 0x035, 0x000C86CC, + 0x035, 0x000D06CC, + 0xA0000000, 0x00000000, + 0x035, 0x00000484, + 0x035, 0x00008484, + 0x035, 0x00010484, + 0x035, 0x00020584, + 0x035, 0x00028584, + 0x035, 0x00030584, + 0x035, 0x00040584, + 0x035, 0x00048584, + 0x035, 0x00050584, + 0x035, 0x000805FB, + 0x035, 0x000885FB, + 0x035, 0x000905FB, + 0x035, 0x000A05FB, + 0x035, 0x000A85FB, + 0x035, 0x000B05FB, + 0x035, 0x000C05FB, + 0x035, 0x000C85FB, + 0x035, 0x000D05FB, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x0DF, 0x00000001, + 0xA0000000, 0x00000000, + 0x0DF, 0x00000000, + 0xB0000000, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000010, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x00000473, + 0x036, 0x00008473, + 0x036, 0x00010473, + 0x036, 0x00020473, + 0x036, 0x00028473, + 0x036, 0x00030473, + 0x036, 0x00040473, + 0x036, 0x00048473, + 0x036, 0x00050473, + 0x036, 0x00080473, + 0x036, 0x00088473, + 0x036, 0x00090473, + 0x036, 0x000A0473, + 0x036, 0x000A8473, + 0x036, 0x000B0473, + 0x036, 0x000C0473, + 0x036, 0x000C8473, + 0x036, 0x000D0473, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x036, 0x00000475, + 0x036, 0x00008475, + 0x036, 0x00010475, + 0x036, 0x00020475, + 0x036, 0x00028475, + 0x036, 0x00030475, + 0x036, 0x00040475, + 0x036, 0x00048475, + 0x036, 0x00050475, + 0x036, 0x00080475, + 0x036, 0x00088475, + 0x036, 0x00090475, + 0x036, 0x000A0475, + 0x036, 0x000A8475, + 0x036, 0x000B0475, + 0x036, 0x000C0475, + 0x036, 0x000C8475, + 0x036, 0x000D0475, + 0xA0000000, 0x00000000, + 0x036, 0x00000474, + 0x036, 0x00008474, + 0x036, 0x00010474, + 0x036, 0x00020474, + 0x036, 0x00028474, + 0x036, 0x00030474, + 0x036, 0x00040474, + 0x036, 0x00048474, + 0x036, 0x00050474, + 0x036, 0x00080474, + 0x036, 0x00088474, + 0x036, 0x00090474, + 0x036, 0x000A0474, + 0x036, 0x000A8474, + 0x036, 0x000B0474, + 0x036, 0x000C0474, + 0x036, 0x000C8474, + 0x036, 0x000D0474, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x0EF, 0x00000004, + 0x037, 0x00000000, + 0x038, 0x0000514E, + 0x037, 0x00004000, + 0x038, 0x0000514E, + 0x037, 0x00008000, + 0x038, 0x0000514E, + 0x037, 0x00010000, + 0x038, 0x0000514E, + 0x037, 0x00014000, + 0x038, 0x0000514E, + 0x037, 0x00018000, + 0x038, 0x0000514E, + 0x037, 0x0001C000, + 0x038, 0x0000514E, + 0x037, 0x00020000, + 0x038, 0x0000514E, + 0x037, 0x00024000, + 0x038, 0x0000514E, + 0x037, 0x00028000, + 0x038, 0x0000514E, + 0x037, 0x0002C000, + 0x038, 0x0000714E, + 0x037, 0x00030000, + 0x038, 0x0000514E, + 0x037, 0x00034000, + 0x038, 0x0000514E, + 0x037, 0x00038000, + 0x038, 0x0000514E, + 0x037, 0x0003C000, + 0x038, 0x0000514E, + 0x037, 0x00040000, + 0x038, 0x0000514E, + 0x037, 0x00044000, + 0x038, 0x0000514E, + 0x037, 0x00048000, + 0x038, 0x0000514E, + 0x037, 0x00080000, + 0x038, 0x00005ECE, + 0x037, 0x00084000, + 0x038, 0x00005ECE, + 0x037, 0x00088000, + 0x038, 0x00005ECE, + 0x037, 0x00090000, + 0x038, 0x00005ECE, + 0x037, 0x00094000, + 0x038, 0x00005ECE, + 0x037, 0x00098000, + 0x038, 0x00005ECE, + 0x037, 0x0009C000, + 0x038, 0x00005ECE, + 0x037, 0x000A0000, + 0x038, 0x00005ECE, + 0x037, 0x000A4000, + 0x038, 0x00005ECE, + 0x037, 0x000A8000, + 0x038, 0x00005ECE, + 0x037, 0x000AC000, + 0x038, 0x00005ECE, + 0x037, 0x000B0000, + 0x038, 0x00005ECE, + 0x037, 0x000B4000, + 0x038, 0x00005ECE, + 0x037, 0x000B8000, + 0x038, 0x00005ECE, + 0x037, 0x000BC000, + 0x038, 0x00005ECE, + 0x037, 0x000C0000, + 0x038, 0x00005ECE, + 0x037, 0x000C4000, + 0x038, 0x00005ECE, + 0x037, 0x000C8000, + 0x038, 0x00005ECE, + 0x0EF, 0x00000000, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000008, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x03C, 0x0000007D, + 0x03C, 0x0000047D, + 0x03C, 0x0000087D, + 0x03C, 0x0000107D, + 0x03C, 0x0000147D, + 0x03C, 0x0000187D, + 0xB0000000, 0x00000000, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000275, + 0x03C, 0x00000542, + 0x03C, 0x00000821, + 0x03C, 0x00001275, + 0x03C, 0x00001542, + 0x03C, 0x00001821, + 0x03C, 0x00002275, + 0x03C, 0x00002542, + 0x03C, 0x00002821, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027F, + 0x03C, 0x00000542, + 0x03C, 0x00000821, + 0x03C, 0x0000127F, + 0x03C, 0x00001542, + 0x03C, 0x00001821, + 0x03C, 0x0000227F, + 0x03C, 0x00002542, + 0x03C, 0x00002821, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x03C, 0x0000027F, + 0x03C, 0x00000542, + 0x03C, 0x00000821, + 0x03C, 0x0000127F, + 0x03C, 0x00001542, + 0x03C, 0x00001821, + 0x03C, 0x0000227F, + 0x03C, 0x00002542, + 0x03C, 0x00002821, + 0xA0000000, 0x00000000, + 0x03C, 0x0000037E, + 0x03C, 0x00000575, + 0x03C, 0x00000971, + 0x03C, 0x0000127E, + 0x03C, 0x00001575, + 0x03C, 0x00001871, + 0x03C, 0x0000217E, + 0x03C, 0x00002575, + 0x03C, 0x00002871, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x061, 0x000C0D47, + 0x062, 0x0000133C, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x063, 0x000750E7, + 0xA0000000, 0x00000000, + 0x063, 0x0007D0E7, + 0xB0000000, 0x00000000, + 0x064, 0x00014FEC, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0x065, 0x000920D0, + 0xA0000000, 0x00000000, + 0x065, 0x000923FF, + 0xB0000000, 0x00000000, + 0x066, 0x00000040, + 0x057, 0x00050000, + 0x056, 0x00051DF0, + 0x80000008, 0x00000000, 0x40000000, 0x00000000, + 0x90000008, 0x55000000, 0x40000000, 0x00000000, + 0x90000008, 0xaa000000, 0x40000000, 0x00000000, + 0xA0000000, 0x00000000, + 0x055, 0x00082060, + 0xB0000000, 0x00000000, + +}; + +void +odm_read_and_config_mp_8814a_radiod( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u1Byte cCond; + BOOLEAN bMatched = TRUE, bSkipped = FALSE; + u4Byte ArrayLen = sizeof(Array_MP_8814A_RadioD)/sizeof(u4Byte); + pu4Byte Array = Array_MP_8814A_RadioD; + + u4Byte v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_RadioD\n"); + + while ((i + 1) < ArrayLen) { + v1 = Array[i]; + v2 = Array[i + 1]; + + if (v1 & (BIT31 | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT31) {/* positive condition*/ + cCond = (u1Byte)((v1 & (BIT29|BIT28)) >> 28); + if (cCond == COND_ENDIF) {/*end*/ + bMatched = TRUE; + bSkipped = FALSE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ENDIF\n"); + } else if (cCond == COND_ELSE) { /*else*/ + bMatched = bSkipped?FALSE:TRUE; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT30) { /*negative condition*/ + if (bSkipped == FALSE) { + if (CheckPositive(pDM_Odm, pre_v1, pre_v2, v1, v2)) { + bMatched = TRUE; + bSkipped = TRUE; + } else { + bMatched = FALSE; + bSkipped = FALSE; + } + } else + bMatched = FALSE; + } + } else { + if (bMatched) + odm_ConfigRF_RadioD_8814A(pDM_Odm, v1, v2); + } + i = i + 2; + } +} + +u4Byte +ODM_GetVersion_MP_8814A_RadioD(void) +{ + return 85; +} + +/****************************************************************************** +* TxPowerTrack.TXT +******************************************************************************/ + +u1Byte gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 9, 9, 10, 11, 11, 12, 13, 13, 14, 15, 15, 16, 17, 17, 18, 19, 19}, + {0, 1, 1, 2, 2, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 14, 15, 15, 16, 17, 17, 18}, + {0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 12, 12, 13, 14, 14, 15, 16, 16, 17, 17, 18, 19}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 25, 25, 25, 25}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 23, 24, 25, 25, 25, 25}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 23, 24, 25, 25, 25, 25}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 2, 2, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 10, 10, 11, 12, 13, 14, 15, 15, 15, 15, 16, 16, 17, 18}, + {0, 1, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 17, 18, 19, 19, 20}, + {0, 1, 1, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 14, 15, 16, 17, 18, 18, 19, 20, 20}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16, 17, 18, 19, 20, 21, 21, 22, 23, 24, 25, 25}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 23, 24, 24, 25, 25, 25}, + {0, 1, 2, 3, 4, 5, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16, 17, 18, 19, 20, 21, 22, 23, 23, 24, 25, 25}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 2, 2, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 16, 17, 17}, + {0, 1, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 17, 18, 19, 19, 20}, + {0, 1, 1, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 14, 15, 16, 17, 18, 18, 19, 20, 20}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 3, 4, 5, 6, 7, 8, 8, 9, 10, 11, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 22, 23, 23, 24}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 18, 19, 20, 21, 22, 23, 24, 25, 25, 25, 25}, + {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 16, 17, 18, 19, 20, 20, 21, 22, 23, 24, 25, 25}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 11, 11, 11, 12, 12, 13, 13, 14}, + {0, 1, 1, 2, 3, 4, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 11, 12, 13, 14, 14, 15, 16, 16, 17, 18, 19, 19, 20, 21}, + {0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 12, 12, 13, 14, 14, 15, 16, 16, 17, 17, 18, 19}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 11, 12, 12, 13, 14, 15, 16, 16, 17, 18, 19, 20, 21, 21, 22, 23, 24}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 23, 24, 25, 25, 25, 25}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 17, 18, 19, 20, 21, 22, 23, 24, 25, 25, 25, 25}, +}; +u1Byte gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 10, 11, 11, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 11, 11, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 11, 11, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 8, 8, 9, 9, 9, 10, 10, 11, 11, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14}; + +void +odm_read_and_config_mp_8814a_txpowertrack( + struct dm_struct * pDM_Odm +) +{ + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8814A\n"); + + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_p, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_n, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_p, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_n, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_p, gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_n, gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_p, gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_n, gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_p, gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_n, gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_p, gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_n, gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_p, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_n, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_p, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_n, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_p, gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_n, gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_p, gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_n, gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_8814A, DELTA_SWINGIDX_SIZE*3); +} + +/****************************************************************************** +* TxPowerTrack_Type0.TXT +******************************************************************************/ + +u1Byte gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, + {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_Type0_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 1, 1, 2, 3, 3, 4, 5, 5, 6, 6, 7, 8, 8, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, +}; +u1Byte gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 5, 6, 7, 7, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_Type0_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9}; + +void +odm_read_and_config_mp_8814a_txpowertrack_type0( + struct dm_struct * pDM_Odm +) +{ + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8814A\n"); + + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_p, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_n, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_p, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_n, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_p, gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_n, gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_p, gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_n, gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_p, gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_n, gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_p, gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_n, gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_p, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_n, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_p, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_n, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_p, gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_n, gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_p, gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_n, gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_Type0_8814A, DELTA_SWINGIDX_SIZE*3); +} + +/****************************************************************************** +* TxPowerTrack_Type2.TXT +******************************************************************************/ + +u1Byte gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11, 11, 12, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 1, 2, 3, 4, 5, 5, 6, 6, 7, 8, 9, 9, 10, 10, 10, 10, 11, 11, 12, 12, 13, 14, 15, 16, 16, 16, 16, 16, 16}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 9, 10, 10, 11, 11, 11, 12, 12, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 22, 22, 22, 22, 22}, + {0, 1, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 22, 22, 22, 22, 22}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 23, 23, 23, 23, 23, 23}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11, 11, 12, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 1, 2, 3, 4, 5, 5, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 1, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 9, 10, 11, 11, 12, 12, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 4, 5, 6, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 21, 21, 21, 21, 21, 21}, + {0, 1, 2, 3, 4, 5, 6, 6, 7, 8, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 20, 20, 21, 21, 21, 21, 21}, + {0, 1, 2, 3, 3, 4, 5, 6, 7, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 21, 21, 21, 21, 21, 21}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 10, 11, 12, 13, 13, 13, 14, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 1, 2, 3, 4, 5, 5, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 1, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 9, 10, 11, 11, 12, 12, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 21, 21, 21, 21, 21, 21, 21}, + {0, 0, 1, 2, 3, 4, 5, 6, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 20, 20, 20, 20, 20, 20}, + {0, 1, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 21, 21, 21, 21, 21, 21}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 4, 5, 5, 6, 7, 7, 8, 9, 10, 10, 11, 11, 11, 12, 13, 13, 13, 13, 14, 15, 15, 15, 15, 15, 15, 15}, + {0, 1, 2, 3, 3, 4, 5, 6, 7, 8, 8, 9, 10, 10, 11, 12, 12, 12, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14}, + {0, 1, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 11, 11, 11, 12, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13, 13, 13, 13}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_Type2_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 4, 5, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20, 20, 20}, + {0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 11, 12, 13, 14, 15, 16, 16, 17, 18, 19, 20, 20, 20, 20, 20, 20, 20}, + {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 11, 12, 13, 14, 15, 15, 16, 17, 18, 19, 19, 20, 20, 20, 20, 20, 20, 20}, +}; +u1Byte gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_Type2_8814A[] = {0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 7, 8, 9, 10, 11, 11, 11, 11, 11, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 9, 10, 10, 11, 12, 12, 13, 14, 14, 14, 14, 14, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 10, 11, 12, 12, 13, 13, 13, 13, 14, 14, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 3, 3, 4, 4, 4, 5, 5, 6, 7, 8, 8, 9, 10, 10, 11, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 14, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 13, 13, 13, 14, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_Type2_8814A[] = {0, 0, 1, 2, 2, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 9, 9, 9, 10, 11, 11, 12, 12, 13, 13, 13, 13, 13, 13, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 3, 3, 4, 4, 4, 5, 6, 6, 7, 7, 8, 8, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 7, 8, 9, 9, 9, 9, 9, 9, 10, 10, 11, 11, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 1, 2, 3, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 10, 10, 10, 11, 12, 12, 13, 14, 14, 14, 14, 14, 14, 14}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_Type2_8814A[] = {0, 0, 1, 2, 2, 3, 4, 5, 5, 6, 6, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 11, 12, 13, 13, 13, 13, 13, 13, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_Type2_8814A[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 7, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 13, 13, 13, 13, 13, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 2, 2, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 10, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_Type2_8814A[] = {0, 1, 1, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 12, 12, 13, 13, 13, 13, 13, 13, 13, 13}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_Type2_8814A[] = {0, 1, 2, 2, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_Type2_8814A[] = {0, 0, 1, 2, 2, 3, 3, 4, 5, 5, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 13, 13, 13, 13, 13, 13, 13, 13}; + +void +odm_read_and_config_mp_8814a_txpowertrack_type2( + struct dm_struct * pDM_Odm +) +{ + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8814A\n"); + + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_p, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_n, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_p, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_n, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_p, gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_n, gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_p, gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_n, gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_p, gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_n, gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_p, gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_n, gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_p, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_n, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_p, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_n, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_p, gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_n, gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_p, gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_n, gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_Type2_8814A, DELTA_SWINGIDX_SIZE*3); +} + +/****************************************************************************** +* TxPowerTrack_Type5.TXT +******************************************************************************/ + +u1Byte gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 3, 3, 3, 4, 6, 6, 7, 7, 8, 9, 10, 11, 12, 13, 13, 14, 14, 14, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 4, 5, 6, 7, 7, 8, 7, 8, 10, 11, 12, 12, 13, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 5, 5, 6, 7, 8, 9, 9, 10, 11, 12, 13, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 0, 1, 2, 2, 3, 4, 5, 5, 6, 7, 9, 10, 10, 11, 12, 12, 12, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13}, + {0, 0, 0, 1, 1, 1, 2, 3, 4, 5, 6, 7, 8, 8, 9, 11, 12, 12, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14}, + {0, 0, 0, 1, 1, 2, 2, 3, 5, 7, 8, 9, 10, 11, 12, 13, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 2, 3, 3, 4, 6, 7, 7, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12}, + {0, 1, 2, 3, 3, 7, 7, 8, 8, 9, 11, 12, 12, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 0, 1, 2, 3, 4, 5, 7, 8, 8, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 0, 1, 1, 2, 2, 3, 4, 5, 6, 6, 7, 8, 9, 11, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 13, 13, 13, 13}, + {0, 0, 1, 2, 3, 3, 5, 5, 6, 8, 8, 9, 10, 11, 13, 13, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14}, + {0, 0, 1, 2, 3, 4, 4, 5, 7, 8, 9, 9, 10, 11, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 2, 2, 2, 3, 4, 5, 6, 7, 9, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12}, + {0, 1, 2, 3, 3, 7, 7, 8, 8, 9, 11, 12, 12, 13, 14, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 0, 1, 2, 3, 4, 5, 7, 8, 8, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 1, 2, 2, 4, 5, 6, 6, 7, 8, 9, 10, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 0, 0, 2, 3, 4, 5, 6, 8, 8, 9, 9, 11, 12, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14}, + {0, 0, 0, 1, 2, 3, 3, 4, 6, 7, 8, 9, 10, 11, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 0, 1, 2, 3, 3, 3, 4, 5, 6, 6, 7, 8, 8, 9, 10, 10, 10, 11, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12}, + {0, 2, 3, 4, 5, 7, 7, 8, 9, 10, 12, 13, 14, 15, 16, 17, 17, 17, 17, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18, 18}, + {0, 1, 2, 3, 3, 4, 6, 7, 8, 8, 10, 11, 11, 12, 13, 13, 13, 13, 13, 13, 13, 14, 14, 14, 14, 14, 14, 14, 14, 14}, +}; +u1Byte gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_Type5_8814A[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 3, 3, 3, 5, 5, 6, 6, 8, 8, 9, 10, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12}, + {0, 1, 2, 3, 4, 4, 5, 6, 7, 8, 8, 9, 11, 12, 13, 14, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15}, + {0, 0, 1, 3, 3, 4, 5, 5, 6, 7, 7, 8, 10, 10, 11, 11, 11, 11, 12, 12, 12, 12, 12, 13, 13, 13, 13, 13, 13, 13}, +}; +u1Byte gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_Type5_8814A[] = {0, 1, 2, 2, 3, 4, 4, 5, 6, 6, 7, 7, 7, 8, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_Type5_8814A[] = {0, 1, 1, 2, 2, 2, 3, 4, 4, 5, 6, 6, 7, 7, 8, 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10}; +u1Byte gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_Type5_8814A[] = {0, 1, 2, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_Type5_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 8, 8, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_Type5_8814A[] = {0, 1, 2, 2, 3, 4, 4, 5, 6, 6, 7, 7, 8, 9, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_Type5_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 8, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_Type5_8814A[] = {0, 1, 2, 2, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 10, 10, 10, 10, 11, 11, 11, 11, 111, 12, 12, 12, 12, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_Type5_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 6, 7, 8, 8, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 11, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_Type5_8814A[] = {0, 1, 2, 2, 3, 4, 5, 5, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 10, 10, 10, 10, 10, 11, 11, 10, 11, 11, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_Type5_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_Type5_8814A[] = {0, 2, 3, 4, 4, 5, 6, 6, 7, 8, 8, 8, 8, 9, 10, 10, 10, 10, 11, 11, 11, 11, 11, 11, 12, 12, 12, 12, 12, 12}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_Type5_8814A[] = {0, 0, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_Type5_8814A[] = {0, 2, 3, 4, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 10, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_Type5_8814A[] = {0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_Type5_8814A[] = {0, 1, 2, 2, 3, 4, 5, 5, 6, 7, 7, 8, 8, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10}; +u1Byte gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_Type5_8814A[] = {0, 1, 1, 2, 2, 2, 3, 4, 4, 5, 6, 7, 8, 8, 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10, 10}; + +void +odm_read_and_config_mp_8814a_txpowertrack_type5( + struct dm_struct * pDM_Odm +) +{ + struct dm_rf_calibration_struct * prf_calibrate_info = &(pDM_Odm->rf_calibrate_info); + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8814A\n"); + + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_p, gDeltaSwingTableIdx_MP_2GA_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2ga_n, gDeltaSwingTableIdx_MP_2GA_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_p, gDeltaSwingTableIdx_MP_2GB_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gb_n, gDeltaSwingTableIdx_MP_2GB_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_p, gDeltaSwingTableIdx_MP_2GC_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gc_n, gDeltaSwingTableIdx_MP_2GC_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_p, gDeltaSwingTableIdx_MP_2GD_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2gd_n, gDeltaSwingTableIdx_MP_2GD_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_p, gDeltaSwingTableIdx_MP_2GCCKA_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_a_n, gDeltaSwingTableIdx_MP_2GCCKA_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_p, gDeltaSwingTableIdx_MP_2GCCKB_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_b_n, gDeltaSwingTableIdx_MP_2GCCKB_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_p, gDeltaSwingTableIdx_MP_2GCCKC_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_c_n, gDeltaSwingTableIdx_MP_2GCCKC_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_p, gDeltaSwingTableIdx_MP_2GCCKD_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_2g_cck_d_n, gDeltaSwingTableIdx_MP_2GCCKD_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE); + + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_p, gDeltaSwingTableIdx_MP_5GA_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5ga_n, gDeltaSwingTableIdx_MP_5GA_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_p, gDeltaSwingTableIdx_MP_5GB_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gb_n, gDeltaSwingTableIdx_MP_5GB_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_p, gDeltaSwingTableIdx_MP_5GC_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gc_n, gDeltaSwingTableIdx_MP_5GC_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_p, gDeltaSwingTableIdx_MP_5GD_P_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); + odm_move_memory(pDM_Odm, prf_calibrate_info->delta_swing_table_idx_5gd_n, gDeltaSwingTableIdx_MP_5GD_N_TxPowerTrack_Type5_8814A, DELTA_SWINGIDX_SIZE*3); +} + +/****************************************************************************** +* TXPWR_LMT.TXT +******************************************************************************/ + +const char *Array_MP_8814A_TXPWR_LMT[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "32", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "32", + "MKK", "2.4G", "20M", "HT", "1T", "01", "32", + "FCC", "2.4G", "20M", "HT", "1T", "02", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", + "MKK", "2.4G", "20M", "HT", "1T", "02", "32", + "FCC", "2.4G", "20M", "HT", "1T", "03", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", + "MKK", "2.4G", "20M", "HT", "1T", "03", "32", + "FCC", "2.4G", "20M", "HT", "1T", "04", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", + "MKK", "2.4G", "20M", "HT", "1T", "04", "32", + "FCC", "2.4G", "20M", "HT", "1T", "05", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", + "MKK", "2.4G", "20M", "HT", "1T", "05", "32", + "FCC", "2.4G", "20M", "HT", "1T", "06", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", + "MKK", "2.4G", "20M", "HT", "1T", "06", "32", + "FCC", "2.4G", "20M", "HT", "1T", "07", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", + "MKK", "2.4G", "20M", "HT", "1T", "07", "32", + "FCC", "2.4G", "20M", "HT", "1T", "08", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", + "MKK", "2.4G", "20M", "HT", "1T", "08", "32", + "FCC", "2.4G", "20M", "HT", "1T", "09", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", + "MKK", "2.4G", "20M", "HT", "1T", "09", "32", + "FCC", "2.4G", "20M", "HT", "1T", "10", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", + "MKK", "2.4G", "20M", "HT", "1T", "10", "32", + "FCC", "2.4G", "20M", "HT", "1T", "11", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", + "MKK", "2.4G", "20M", "HT", "1T", "11", "32", + "FCC", "2.4G", "20M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", + "MKK", "2.4G", "20M", "HT", "1T", "12", "32", + "FCC", "2.4G", "20M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "32", + "MKK", "2.4G", "20M", "HT", "1T", "13", "32", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "30", + "MKK", "2.4G", "20M", "HT", "2T", "01", "30", + "FCC", "2.4G", "20M", "HT", "2T", "02", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "30", + "MKK", "2.4G", "20M", "HT", "2T", "02", "30", + "FCC", "2.4G", "20M", "HT", "2T", "03", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "30", + "MKK", "2.4G", "20M", "HT", "2T", "03", "30", + "FCC", "2.4G", "20M", "HT", "2T", "04", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "30", + "MKK", "2.4G", "20M", "HT", "2T", "04", "30", + "FCC", "2.4G", "20M", "HT", "2T", "05", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "30", + "MKK", "2.4G", "20M", "HT", "2T", "05", "30", + "FCC", "2.4G", "20M", "HT", "2T", "06", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "06", "30", + "MKK", "2.4G", "20M", "HT", "2T", "06", "30", + "FCC", "2.4G", "20M", "HT", "2T", "07", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "07", "30", + "MKK", "2.4G", "20M", "HT", "2T", "07", "30", + "FCC", "2.4G", "20M", "HT", "2T", "08", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "08", "30", + "MKK", "2.4G", "20M", "HT", "2T", "08", "30", + "FCC", "2.4G", "20M", "HT", "2T", "09", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "09", "30", + "MKK", "2.4G", "20M", "HT", "2T", "09", "30", + "FCC", "2.4G", "20M", "HT", "2T", "10", "34", + "ETSI", "2.4G", "20M", "HT", "2T", "10", "30", + "MKK", "2.4G", "20M", "HT", "2T", "10", "30", + "FCC", "2.4G", "20M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "30", + "MKK", "2.4G", "20M", "HT", "2T", "11", "30", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "30", + "MKK", "2.4G", "20M", "HT", "2T", "12", "30", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "30", + "MKK", "2.4G", "20M", "HT", "2T", "13", "30", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "20M", "HT", "3T", "01", "30", + "ETSI", "2.4G", "20M", "HT", "3T", "01", "28", + "MKK", "2.4G", "20M", "HT", "3T", "01", "28", + "FCC", "2.4G", "20M", "HT", "3T", "02", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "02", "28", + "MKK", "2.4G", "20M", "HT", "3T", "02", "28", + "FCC", "2.4G", "20M", "HT", "3T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "03", "28", + "MKK", "2.4G", "20M", "HT", "3T", "03", "28", + "FCC", "2.4G", "20M", "HT", "3T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "04", "28", + "MKK", "2.4G", "20M", "HT", "3T", "04", "28", + "FCC", "2.4G", "20M", "HT", "3T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "05", "28", + "MKK", "2.4G", "20M", "HT", "3T", "05", "28", + "FCC", "2.4G", "20M", "HT", "3T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "06", "28", + "MKK", "2.4G", "20M", "HT", "3T", "06", "28", + "FCC", "2.4G", "20M", "HT", "3T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "07", "28", + "MKK", "2.4G", "20M", "HT", "3T", "07", "28", + "FCC", "2.4G", "20M", "HT", "3T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "08", "28", + "MKK", "2.4G", "20M", "HT", "3T", "08", "28", + "FCC", "2.4G", "20M", "HT", "3T", "09", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "09", "28", + "MKK", "2.4G", "20M", "HT", "3T", "09", "28", + "FCC", "2.4G", "20M", "HT", "3T", "10", "32", + "ETSI", "2.4G", "20M", "HT", "3T", "10", "28", + "MKK", "2.4G", "20M", "HT", "3T", "10", "28", + "FCC", "2.4G", "20M", "HT", "3T", "11", "28", + "ETSI", "2.4G", "20M", "HT", "3T", "11", "28", + "MKK", "2.4G", "20M", "HT", "3T", "11", "28", + "FCC", "2.4G", "20M", "HT", "3T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "3T", "12", "28", + "MKK", "2.4G", "20M", "HT", "3T", "12", "28", + "FCC", "2.4G", "20M", "HT", "3T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "3T", "13", "28", + "MKK", "2.4G", "20M", "HT", "3T", "13", "28", + "FCC", "2.4G", "20M", "HT", "3T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "3T", "14", "63", + "MKK", "2.4G", "20M", "HT", "3T", "14", "63", + "FCC", "2.4G", "20M", "HT", "4T", "01", "28", + "ETSI", "2.4G", "20M", "HT", "4T", "01", "26", + "MKK", "2.4G", "20M", "HT", "4T", "01", "26", + "FCC", "2.4G", "20M", "HT", "4T", "02", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "02", "26", + "MKK", "2.4G", "20M", "HT", "4T", "02", "26", + "FCC", "2.4G", "20M", "HT", "4T", "03", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "03", "26", + "MKK", "2.4G", "20M", "HT", "4T", "03", "26", + "FCC", "2.4G", "20M", "HT", "4T", "04", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "04", "26", + "MKK", "2.4G", "20M", "HT", "4T", "04", "26", + "FCC", "2.4G", "20M", "HT", "4T", "05", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "05", "26", + "MKK", "2.4G", "20M", "HT", "4T", "05", "26", + "FCC", "2.4G", "20M", "HT", "4T", "06", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "06", "26", + "MKK", "2.4G", "20M", "HT", "4T", "06", "26", + "FCC", "2.4G", "20M", "HT", "4T", "07", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "07", "26", + "MKK", "2.4G", "20M", "HT", "4T", "07", "26", + "FCC", "2.4G", "20M", "HT", "4T", "08", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "08", "26", + "MKK", "2.4G", "20M", "HT", "4T", "08", "26", + "FCC", "2.4G", "20M", "HT", "4T", "09", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "09", "26", + "MKK", "2.4G", "20M", "HT", "4T", "09", "26", + "FCC", "2.4G", "20M", "HT", "4T", "10", "30", + "ETSI", "2.4G", "20M", "HT", "4T", "10", "26", + "MKK", "2.4G", "20M", "HT", "4T", "10", "26", + "FCC", "2.4G", "20M", "HT", "4T", "11", "26", + "ETSI", "2.4G", "20M", "HT", "4T", "11", "26", + "MKK", "2.4G", "20M", "HT", "4T", "11", "26", + "FCC", "2.4G", "20M", "HT", "4T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "4T", "12", "26", + "MKK", "2.4G", "20M", "HT", "4T", "12", "26", + "FCC", "2.4G", "20M", "HT", "4T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "4T", "13", "26", + "MKK", "2.4G", "20M", "HT", "4T", "13", "26", + "FCC", "2.4G", "20M", "HT", "4T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "4T", "14", "63", + "MKK", "2.4G", "20M", "HT", "4T", "14", "63", + "FCC", "2.4G", "40M", "HT", "1T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", + "MKK", "2.4G", "40M", "HT", "1T", "01", "63", + "FCC", "2.4G", "40M", "HT", "1T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", + "MKK", "2.4G", "40M", "HT", "1T", "02", "63", + "FCC", "2.4G", "40M", "HT", "1T", "03", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "03", "32", + "MKK", "2.4G", "40M", "HT", "1T", "03", "32", + "FCC", "2.4G", "40M", "HT", "1T", "04", "36", + "ETSI", "2.4G", "40M", "HT", "1T", "04", "32", + "MKK", "2.4G", "40M", "HT", "1T", "04", "32", + "FCC", "2.4G", "40M", "HT", "1T", "05", "36", + "ETSI", "2.4G", "40M", "HT", "1T", "05", "32", + "MKK", "2.4G", "40M", "HT", "1T", "05", "32", + "FCC", "2.4G", "40M", "HT", "1T", "06", "36", + "ETSI", "2.4G", "40M", "HT", "1T", "06", "32", + "MKK", "2.4G", "40M", "HT", "1T", "06", "32", + "FCC", "2.4G", "40M", "HT", "1T", "07", "36", + "ETSI", "2.4G", "40M", "HT", "1T", "07", "32", + "MKK", "2.4G", "40M", "HT", "1T", "07", "32", + "FCC", "2.4G", "40M", "HT", "1T", "08", "36", + "ETSI", "2.4G", "40M", "HT", "1T", "08", "32", + "MKK", "2.4G", "40M", "HT", "1T", "08", "32", + "FCC", "2.4G", "40M", "HT", "1T", "09", "36", + "ETSI", "2.4G", "40M", "HT", "1T", "09", "32", + "MKK", "2.4G", "40M", "HT", "1T", "09", "32", + "FCC", "2.4G", "40M", "HT", "1T", "10", "36", + "ETSI", "2.4G", "40M", "HT", "1T", "10", "32", + "MKK", "2.4G", "40M", "HT", "1T", "10", "32", + "FCC", "2.4G", "40M", "HT", "1T", "11", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "11", "32", + "MKK", "2.4G", "40M", "HT", "1T", "11", "32", + "FCC", "2.4G", "40M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "12", "32", + "MKK", "2.4G", "40M", "HT", "1T", "12", "32", + "FCC", "2.4G", "40M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "13", "32", + "MKK", "2.4G", "40M", "HT", "1T", "13", "32", + "FCC", "2.4G", "40M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", + "MKK", "2.4G", "40M", "HT", "1T", "14", "63", + "FCC", "2.4G", "40M", "HT", "2T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", + "MKK", "2.4G", "40M", "HT", "2T", "01", "63", + "FCC", "2.4G", "40M", "HT", "2T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", + "MKK", "2.4G", "40M", "HT", "2T", "02", "63", + "FCC", "2.4G", "40M", "HT", "2T", "03", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", + "MKK", "2.4G", "40M", "HT", "2T", "03", "30", + "FCC", "2.4G", "40M", "HT", "2T", "04", "34", + "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", + "MKK", "2.4G", "40M", "HT", "2T", "04", "30", + "FCC", "2.4G", "40M", "HT", "2T", "05", "34", + "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", + "MKK", "2.4G", "40M", "HT", "2T", "05", "30", + "FCC", "2.4G", "40M", "HT", "2T", "06", "34", + "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", + "MKK", "2.4G", "40M", "HT", "2T", "06", "30", + "FCC", "2.4G", "40M", "HT", "2T", "07", "34", + "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", + "MKK", "2.4G", "40M", "HT", "2T", "07", "30", + "FCC", "2.4G", "40M", "HT", "2T", "08", "34", + "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", + "MKK", "2.4G", "40M", "HT", "2T", "08", "30", + "FCC", "2.4G", "40M", "HT", "2T", "09", "34", + "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", + "MKK", "2.4G", "40M", "HT", "2T", "09", "30", + "FCC", "2.4G", "40M", "HT", "2T", "10", "34", + "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", + "MKK", "2.4G", "40M", "HT", "2T", "10", "30", + "FCC", "2.4G", "40M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", + "MKK", "2.4G", "40M", "HT", "2T", "11", "30", + "FCC", "2.4G", "40M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "12", "30", + "MKK", "2.4G", "40M", "HT", "2T", "12", "30", + "FCC", "2.4G", "40M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "13", "30", + "MKK", "2.4G", "40M", "HT", "2T", "13", "30", + "FCC", "2.4G", "40M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", + "MKK", "2.4G", "40M", "HT", "2T", "14", "63", + "FCC", "2.4G", "40M", "HT", "3T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "01", "63", + "MKK", "2.4G", "40M", "HT", "3T", "01", "63", + "FCC", "2.4G", "40M", "HT", "3T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "02", "63", + "MKK", "2.4G", "40M", "HT", "3T", "02", "63", + "FCC", "2.4G", "40M", "HT", "3T", "03", "28", + "ETSI", "2.4G", "40M", "HT", "3T", "03", "28", + "MKK", "2.4G", "40M", "HT", "3T", "03", "28", + "FCC", "2.4G", "40M", "HT", "3T", "04", "32", + "ETSI", "2.4G", "40M", "HT", "3T", "04", "28", + "MKK", "2.4G", "40M", "HT", "3T", "04", "28", + "FCC", "2.4G", "40M", "HT", "3T", "05", "32", + "ETSI", "2.4G", "40M", "HT", "3T", "05", "28", + "MKK", "2.4G", "40M", "HT", "3T", "05", "28", + "FCC", "2.4G", "40M", "HT", "3T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "3T", "06", "28", + "MKK", "2.4G", "40M", "HT", "3T", "06", "28", + "FCC", "2.4G", "40M", "HT", "3T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "3T", "07", "28", + "MKK", "2.4G", "40M", "HT", "3T", "07", "28", + "FCC", "2.4G", "40M", "HT", "3T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "3T", "08", "28", + "MKK", "2.4G", "40M", "HT", "3T", "08", "28", + "FCC", "2.4G", "40M", "HT", "3T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "3T", "09", "28", + "MKK", "2.4G", "40M", "HT", "3T", "09", "28", + "FCC", "2.4G", "40M", "HT", "3T", "10", "32", + "ETSI", "2.4G", "40M", "HT", "3T", "10", "28", + "MKK", "2.4G", "40M", "HT", "3T", "10", "28", + "FCC", "2.4G", "40M", "HT", "3T", "11", "28", + "ETSI", "2.4G", "40M", "HT", "3T", "11", "28", + "MKK", "2.4G", "40M", "HT", "3T", "11", "28", + "FCC", "2.4G", "40M", "HT", "3T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "12", "28", + "MKK", "2.4G", "40M", "HT", "3T", "12", "28", + "FCC", "2.4G", "40M", "HT", "3T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "13", "28", + "MKK", "2.4G", "40M", "HT", "3T", "13", "28", + "FCC", "2.4G", "40M", "HT", "3T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "14", "63", + "MKK", "2.4G", "40M", "HT", "3T", "14", "63", + "FCC", "2.4G", "40M", "HT", "4T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "01", "63", + "MKK", "2.4G", "40M", "HT", "4T", "01", "63", + "FCC", "2.4G", "40M", "HT", "4T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "02", "63", + "MKK", "2.4G", "40M", "HT", "4T", "02", "63", + "FCC", "2.4G", "40M", "HT", "4T", "03", "26", + "ETSI", "2.4G", "40M", "HT", "4T", "03", "26", + "MKK", "2.4G", "40M", "HT", "4T", "03", "26", + "FCC", "2.4G", "40M", "HT", "4T", "04", "30", + "ETSI", "2.4G", "40M", "HT", "4T", "04", "26", + "MKK", "2.4G", "40M", "HT", "4T", "04", "26", + "FCC", "2.4G", "40M", "HT", "4T", "05", "30", + "ETSI", "2.4G", "40M", "HT", "4T", "05", "26", + "MKK", "2.4G", "40M", "HT", "4T", "05", "26", + "FCC", "2.4G", "40M", "HT", "4T", "06", "30", + "ETSI", "2.4G", "40M", "HT", "4T", "06", "26", + "MKK", "2.4G", "40M", "HT", "4T", "06", "26", + "FCC", "2.4G", "40M", "HT", "4T", "07", "30", + "ETSI", "2.4G", "40M", "HT", "4T", "07", "26", + "MKK", "2.4G", "40M", "HT", "4T", "07", "26", + "FCC", "2.4G", "40M", "HT", "4T", "08", "30", + "ETSI", "2.4G", "40M", "HT", "4T", "08", "26", + "MKK", "2.4G", "40M", "HT", "4T", "08", "26", + "FCC", "2.4G", "40M", "HT", "4T", "09", "30", + "ETSI", "2.4G", "40M", "HT", "4T", "09", "26", + "MKK", "2.4G", "40M", "HT", "4T", "09", "26", + "FCC", "2.4G", "40M", "HT", "4T", "10", "30", + "ETSI", "2.4G", "40M", "HT", "4T", "10", "26", + "MKK", "2.4G", "40M", "HT", "4T", "10", "26", + "FCC", "2.4G", "40M", "HT", "4T", "11", "26", + "ETSI", "2.4G", "40M", "HT", "4T", "11", "26", + "MKK", "2.4G", "40M", "HT", "4T", "11", "26", + "FCC", "2.4G", "40M", "HT", "4T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "12", "26", + "MKK", "2.4G", "40M", "HT", "4T", "12", "26", + "FCC", "2.4G", "40M", "HT", "4T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "13", "26", + "MKK", "2.4G", "40M", "HT", "4T", "13", "26", + "FCC", "2.4G", "40M", "HT", "4T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "14", "63", + "MKK", "2.4G", "40M", "HT", "4T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "32", + "MKK", "5G", "20M", "OFDM", "1T", "36", "32", + "FCC", "5G", "20M", "OFDM", "1T", "40", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "32", + "MKK", "5G", "20M", "OFDM", "1T", "40", "32", + "FCC", "5G", "20M", "OFDM", "1T", "44", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "32", + "MKK", "5G", "20M", "OFDM", "1T", "44", "32", + "FCC", "5G", "20M", "OFDM", "1T", "48", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "32", + "MKK", "5G", "20M", "OFDM", "1T", "48", "32", + "FCC", "5G", "20M", "OFDM", "1T", "52", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "32", + "MKK", "5G", "20M", "OFDM", "1T", "52", "32", + "FCC", "5G", "20M", "OFDM", "1T", "56", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "32", + "MKK", "5G", "20M", "OFDM", "1T", "56", "32", + "FCC", "5G", "20M", "OFDM", "1T", "60", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "32", + "MKK", "5G", "20M", "OFDM", "1T", "60", "32", + "FCC", "5G", "20M", "OFDM", "1T", "64", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "32", + "MKK", "5G", "20M", "OFDM", "1T", "64", "32", + "FCC", "5G", "20M", "OFDM", "1T", "100", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "32", + "MKK", "5G", "20M", "OFDM", "1T", "100", "32", + "FCC", "5G", "20M", "OFDM", "1T", "104", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "32", + "MKK", "5G", "20M", "OFDM", "1T", "104", "32", + "FCC", "5G", "20M", "OFDM", "1T", "108", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "32", + "MKK", "5G", "20M", "OFDM", "1T", "108", "32", + "FCC", "5G", "20M", "OFDM", "1T", "112", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "32", + "MKK", "5G", "20M", "OFDM", "1T", "112", "32", + "FCC", "5G", "20M", "OFDM", "1T", "116", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "32", + "MKK", "5G", "20M", "OFDM", "1T", "116", "32", + "FCC", "5G", "20M", "OFDM", "1T", "120", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "32", + "MKK", "5G", "20M", "OFDM", "1T", "120", "32", + "FCC", "5G", "20M", "OFDM", "1T", "124", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "32", + "MKK", "5G", "20M", "OFDM", "1T", "124", "32", + "FCC", "5G", "20M", "OFDM", "1T", "128", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "32", + "MKK", "5G", "20M", "OFDM", "1T", "128", "32", + "FCC", "5G", "20M", "OFDM", "1T", "132", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "32", + "MKK", "5G", "20M", "OFDM", "1T", "132", "32", + "FCC", "5G", "20M", "OFDM", "1T", "136", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "32", + "MKK", "5G", "20M", "OFDM", "1T", "136", "32", + "FCC", "5G", "20M", "OFDM", "1T", "140", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "32", + "MKK", "5G", "20M", "OFDM", "1T", "140", "32", + "FCC", "5G", "20M", "OFDM", "1T", "149", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "32", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "32", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "32", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "32", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "32", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "30", + "ETSI", "5G", "20M", "HT", "1T", "36", "32", + "MKK", "5G", "20M", "HT", "1T", "36", "32", + "FCC", "5G", "20M", "HT", "1T", "40", "30", + "ETSI", "5G", "20M", "HT", "1T", "40", "32", + "MKK", "5G", "20M", "HT", "1T", "40", "32", + "FCC", "5G", "20M", "HT", "1T", "44", "30", + "ETSI", "5G", "20M", "HT", "1T", "44", "32", + "MKK", "5G", "20M", "HT", "1T", "44", "32", + "FCC", "5G", "20M", "HT", "1T", "48", "30", + "ETSI", "5G", "20M", "HT", "1T", "48", "32", + "MKK", "5G", "20M", "HT", "1T", "48", "32", + "FCC", "5G", "20M", "HT", "1T", "52", "36", + "ETSI", "5G", "20M", "HT", "1T", "52", "32", + "MKK", "5G", "20M", "HT", "1T", "52", "32", + "FCC", "5G", "20M", "HT", "1T", "56", "34", + "ETSI", "5G", "20M", "HT", "1T", "56", "32", + "MKK", "5G", "20M", "HT", "1T", "56", "32", + "FCC", "5G", "20M", "HT", "1T", "60", "32", + "ETSI", "5G", "20M", "HT", "1T", "60", "32", + "MKK", "5G", "20M", "HT", "1T", "60", "32", + "FCC", "5G", "20M", "HT", "1T", "64", "28", + "ETSI", "5G", "20M", "HT", "1T", "64", "32", + "MKK", "5G", "20M", "HT", "1T", "64", "32", + "FCC", "5G", "20M", "HT", "1T", "100", "30", + "ETSI", "5G", "20M", "HT", "1T", "100", "32", + "MKK", "5G", "20M", "HT", "1T", "100", "32", + "FCC", "5G", "20M", "HT", "1T", "104", "30", + "ETSI", "5G", "20M", "HT", "1T", "104", "32", + "MKK", "5G", "20M", "HT", "1T", "104", "32", + "FCC", "5G", "20M", "HT", "1T", "108", "32", + "ETSI", "5G", "20M", "HT", "1T", "108", "32", + "MKK", "5G", "20M", "HT", "1T", "108", "32", + "FCC", "5G", "20M", "HT", "1T", "112", "34", + "ETSI", "5G", "20M", "HT", "1T", "112", "32", + "MKK", "5G", "20M", "HT", "1T", "112", "32", + "FCC", "5G", "20M", "HT", "1T", "116", "34", + "ETSI", "5G", "20M", "HT", "1T", "116", "32", + "MKK", "5G", "20M", "HT", "1T", "116", "32", + "FCC", "5G", "20M", "HT", "1T", "120", "36", + "ETSI", "5G", "20M", "HT", "1T", "120", "32", + "MKK", "5G", "20M", "HT", "1T", "120", "32", + "FCC", "5G", "20M", "HT", "1T", "124", "34", + "ETSI", "5G", "20M", "HT", "1T", "124", "32", + "MKK", "5G", "20M", "HT", "1T", "124", "32", + "FCC", "5G", "20M", "HT", "1T", "128", "32", + "ETSI", "5G", "20M", "HT", "1T", "128", "32", + "MKK", "5G", "20M", "HT", "1T", "128", "32", + "FCC", "5G", "20M", "HT", "1T", "132", "30", + "ETSI", "5G", "20M", "HT", "1T", "132", "32", + "MKK", "5G", "20M", "HT", "1T", "132", "32", + "FCC", "5G", "20M", "HT", "1T", "136", "30", + "ETSI", "5G", "20M", "HT", "1T", "136", "32", + "MKK", "5G", "20M", "HT", "1T", "136", "32", + "FCC", "5G", "20M", "HT", "1T", "140", "28", + "ETSI", "5G", "20M", "HT", "1T", "140", "32", + "MKK", "5G", "20M", "HT", "1T", "140", "32", + "FCC", "5G", "20M", "HT", "1T", "149", "36", + "ETSI", "5G", "20M", "HT", "1T", "149", "32", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "36", + "ETSI", "5G", "20M", "HT", "1T", "153", "32", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "36", + "ETSI", "5G", "20M", "HT", "1T", "157", "32", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "36", + "ETSI", "5G", "20M", "HT", "1T", "161", "32", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "36", + "ETSI", "5G", "20M", "HT", "1T", "165", "32", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "28", + "ETSI", "5G", "20M", "HT", "2T", "36", "30", + "MKK", "5G", "20M", "HT", "2T", "36", "30", + "FCC", "5G", "20M", "HT", "2T", "40", "28", + "ETSI", "5G", "20M", "HT", "2T", "40", "30", + "MKK", "5G", "20M", "HT", "2T", "40", "30", + "FCC", "5G", "20M", "HT", "2T", "44", "28", + "ETSI", "5G", "20M", "HT", "2T", "44", "30", + "MKK", "5G", "20M", "HT", "2T", "44", "30", + "FCC", "5G", "20M", "HT", "2T", "48", "28", + "ETSI", "5G", "20M", "HT", "2T", "48", "30", + "MKK", "5G", "20M", "HT", "2T", "48", "30", + "FCC", "5G", "20M", "HT", "2T", "52", "34", + "ETSI", "5G", "20M", "HT", "2T", "52", "30", + "MKK", "5G", "20M", "HT", "2T", "52", "30", + "FCC", "5G", "20M", "HT", "2T", "56", "32", + "ETSI", "5G", "20M", "HT", "2T", "56", "30", + "MKK", "5G", "20M", "HT", "2T", "56", "30", + "FCC", "5G", "20M", "HT", "2T", "60", "30", + "ETSI", "5G", "20M", "HT", "2T", "60", "30", + "MKK", "5G", "20M", "HT", "2T", "60", "30", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "30", + "MKK", "5G", "20M", "HT", "2T", "64", "30", + "FCC", "5G", "20M", "HT", "2T", "100", "28", + "ETSI", "5G", "20M", "HT", "2T", "100", "30", + "MKK", "5G", "20M", "HT", "2T", "100", "30", + "FCC", "5G", "20M", "HT", "2T", "104", "28", + "ETSI", "5G", "20M", "HT", "2T", "104", "30", + "MKK", "5G", "20M", "HT", "2T", "104", "30", + "FCC", "5G", "20M", "HT", "2T", "108", "30", + "ETSI", "5G", "20M", "HT", "2T", "108", "30", + "MKK", "5G", "20M", "HT", "2T", "108", "30", + "FCC", "5G", "20M", "HT", "2T", "112", "32", + "ETSI", "5G", "20M", "HT", "2T", "112", "30", + "MKK", "5G", "20M", "HT", "2T", "112", "30", + "FCC", "5G", "20M", "HT", "2T", "116", "32", + "ETSI", "5G", "20M", "HT", "2T", "116", "30", + "MKK", "5G", "20M", "HT", "2T", "116", "30", + "FCC", "5G", "20M", "HT", "2T", "120", "34", + "ETSI", "5G", "20M", "HT", "2T", "120", "30", + "MKK", "5G", "20M", "HT", "2T", "120", "30", + "FCC", "5G", "20M", "HT", "2T", "124", "32", + "ETSI", "5G", "20M", "HT", "2T", "124", "30", + "MKK", "5G", "20M", "HT", "2T", "124", "30", + "FCC", "5G", "20M", "HT", "2T", "128", "30", + "ETSI", "5G", "20M", "HT", "2T", "128", "30", + "MKK", "5G", "20M", "HT", "2T", "128", "30", + "FCC", "5G", "20M", "HT", "2T", "132", "28", + "ETSI", "5G", "20M", "HT", "2T", "132", "30", + "MKK", "5G", "20M", "HT", "2T", "132", "30", + "FCC", "5G", "20M", "HT", "2T", "136", "28", + "ETSI", "5G", "20M", "HT", "2T", "136", "30", + "MKK", "5G", "20M", "HT", "2T", "136", "30", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "30", + "MKK", "5G", "20M", "HT", "2T", "140", "30", + "FCC", "5G", "20M", "HT", "2T", "149", "34", + "ETSI", "5G", "20M", "HT", "2T", "149", "30", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "34", + "ETSI", "5G", "20M", "HT", "2T", "153", "30", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "34", + "ETSI", "5G", "20M", "HT", "2T", "157", "30", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "34", + "ETSI", "5G", "20M", "HT", "2T", "161", "30", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "34", + "ETSI", "5G", "20M", "HT", "2T", "165", "30", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "20M", "HT", "3T", "36", "26", + "ETSI", "5G", "20M", "HT", "3T", "36", "28", + "MKK", "5G", "20M", "HT", "3T", "36", "28", + "FCC", "5G", "20M", "HT", "3T", "40", "26", + "ETSI", "5G", "20M", "HT", "3T", "40", "28", + "MKK", "5G", "20M", "HT", "3T", "40", "28", + "FCC", "5G", "20M", "HT", "3T", "44", "26", + "ETSI", "5G", "20M", "HT", "3T", "44", "28", + "MKK", "5G", "20M", "HT", "3T", "44", "28", + "FCC", "5G", "20M", "HT", "3T", "48", "26", + "ETSI", "5G", "20M", "HT", "3T", "48", "28", + "MKK", "5G", "20M", "HT", "3T", "48", "28", + "FCC", "5G", "20M", "HT", "3T", "52", "32", + "ETSI", "5G", "20M", "HT", "3T", "52", "28", + "MKK", "5G", "20M", "HT", "3T", "52", "28", + "FCC", "5G", "20M", "HT", "3T", "56", "30", + "ETSI", "5G", "20M", "HT", "3T", "56", "28", + "MKK", "5G", "20M", "HT", "3T", "56", "28", + "FCC", "5G", "20M", "HT", "3T", "60", "28", + "ETSI", "5G", "20M", "HT", "3T", "60", "28", + "MKK", "5G", "20M", "HT", "3T", "60", "28", + "FCC", "5G", "20M", "HT", "3T", "64", "24", + "ETSI", "5G", "20M", "HT", "3T", "64", "28", + "MKK", "5G", "20M", "HT", "3T", "64", "28", + "FCC", "5G", "20M", "HT", "3T", "100", "26", + "ETSI", "5G", "20M", "HT", "3T", "100", "28", + "MKK", "5G", "20M", "HT", "3T", "100", "28", + "FCC", "5G", "20M", "HT", "3T", "104", "26", + "ETSI", "5G", "20M", "HT", "3T", "104", "28", + "MKK", "5G", "20M", "HT", "3T", "104", "28", + "FCC", "5G", "20M", "HT", "3T", "108", "28", + "ETSI", "5G", "20M", "HT", "3T", "108", "28", + "MKK", "5G", "20M", "HT", "3T", "108", "28", + "FCC", "5G", "20M", "HT", "3T", "112", "30", + "ETSI", "5G", "20M", "HT", "3T", "112", "28", + "MKK", "5G", "20M", "HT", "3T", "112", "28", + "FCC", "5G", "20M", "HT", "3T", "116", "30", + "ETSI", "5G", "20M", "HT", "3T", "116", "28", + "MKK", "5G", "20M", "HT", "3T", "116", "28", + "FCC", "5G", "20M", "HT", "3T", "120", "32", + "ETSI", "5G", "20M", "HT", "3T", "120", "28", + "MKK", "5G", "20M", "HT", "3T", "120", "28", + "FCC", "5G", "20M", "HT", "3T", "124", "30", + "ETSI", "5G", "20M", "HT", "3T", "124", "28", + "MKK", "5G", "20M", "HT", "3T", "124", "28", + "FCC", "5G", "20M", "HT", "3T", "128", "28", + "ETSI", "5G", "20M", "HT", "3T", "128", "28", + "MKK", "5G", "20M", "HT", "3T", "128", "28", + "FCC", "5G", "20M", "HT", "3T", "132", "26", + "ETSI", "5G", "20M", "HT", "3T", "132", "28", + "MKK", "5G", "20M", "HT", "3T", "132", "28", + "FCC", "5G", "20M", "HT", "3T", "136", "26", + "ETSI", "5G", "20M", "HT", "3T", "136", "28", + "MKK", "5G", "20M", "HT", "3T", "136", "28", + "FCC", "5G", "20M", "HT", "3T", "140", "24", + "ETSI", "5G", "20M", "HT", "3T", "140", "28", + "MKK", "5G", "20M", "HT", "3T", "140", "28", + "FCC", "5G", "20M", "HT", "3T", "149", "32", + "ETSI", "5G", "20M", "HT", "3T", "149", "28", + "MKK", "5G", "20M", "HT", "3T", "149", "63", + "FCC", "5G", "20M", "HT", "3T", "153", "32", + "ETSI", "5G", "20M", "HT", "3T", "153", "28", + "MKK", "5G", "20M", "HT", "3T", "153", "63", + "FCC", "5G", "20M", "HT", "3T", "157", "32", + "ETSI", "5G", "20M", "HT", "3T", "157", "28", + "MKK", "5G", "20M", "HT", "3T", "157", "63", + "FCC", "5G", "20M", "HT", "3T", "161", "32", + "ETSI", "5G", "20M", "HT", "3T", "161", "28", + "MKK", "5G", "20M", "HT", "3T", "161", "63", + "FCC", "5G", "20M", "HT", "3T", "165", "32", + "ETSI", "5G", "20M", "HT", "3T", "165", "28", + "MKK", "5G", "20M", "HT", "3T", "165", "63", + "FCC", "5G", "20M", "HT", "4T", "36", "24", + "ETSI", "5G", "20M", "HT", "4T", "36", "26", + "MKK", "5G", "20M", "HT", "4T", "36", "26", + "FCC", "5G", "20M", "HT", "4T", "40", "24", + "ETSI", "5G", "20M", "HT", "4T", "40", "26", + "MKK", "5G", "20M", "HT", "4T", "40", "26", + "FCC", "5G", "20M", "HT", "4T", "44", "24", + "ETSI", "5G", "20M", "HT", "4T", "44", "26", + "MKK", "5G", "20M", "HT", "4T", "44", "26", + "FCC", "5G", "20M", "HT", "4T", "48", "24", + "ETSI", "5G", "20M", "HT", "4T", "48", "26", + "MKK", "5G", "20M", "HT", "4T", "48", "26", + "FCC", "5G", "20M", "HT", "4T", "52", "30", + "ETSI", "5G", "20M", "HT", "4T", "52", "26", + "MKK", "5G", "20M", "HT", "4T", "52", "26", + "FCC", "5G", "20M", "HT", "4T", "56", "28", + "ETSI", "5G", "20M", "HT", "4T", "56", "26", + "MKK", "5G", "20M", "HT", "4T", "56", "26", + "FCC", "5G", "20M", "HT", "4T", "60", "26", + "ETSI", "5G", "20M", "HT", "4T", "60", "26", + "MKK", "5G", "20M", "HT", "4T", "60", "26", + "FCC", "5G", "20M", "HT", "4T", "64", "22", + "ETSI", "5G", "20M", "HT", "4T", "64", "26", + "MKK", "5G", "20M", "HT", "4T", "64", "26", + "FCC", "5G", "20M", "HT", "4T", "100", "24", + "ETSI", "5G", "20M", "HT", "4T", "100", "26", + "MKK", "5G", "20M", "HT", "4T", "100", "26", + "FCC", "5G", "20M", "HT", "4T", "104", "24", + "ETSI", "5G", "20M", "HT", "4T", "104", "26", + "MKK", "5G", "20M", "HT", "4T", "104", "26", + "FCC", "5G", "20M", "HT", "4T", "108", "26", + "ETSI", "5G", "20M", "HT", "4T", "108", "26", + "MKK", "5G", "20M", "HT", "4T", "108", "26", + "FCC", "5G", "20M", "HT", "4T", "112", "28", + "ETSI", "5G", "20M", "HT", "4T", "112", "26", + "MKK", "5G", "20M", "HT", "4T", "112", "26", + "FCC", "5G", "20M", "HT", "4T", "116", "28", + "ETSI", "5G", "20M", "HT", "4T", "116", "26", + "MKK", "5G", "20M", "HT", "4T", "116", "26", + "FCC", "5G", "20M", "HT", "4T", "120", "30", + "ETSI", "5G", "20M", "HT", "4T", "120", "26", + "MKK", "5G", "20M", "HT", "4T", "120", "26", + "FCC", "5G", "20M", "HT", "4T", "124", "28", + "ETSI", "5G", "20M", "HT", "4T", "124", "26", + "MKK", "5G", "20M", "HT", "4T", "124", "26", + "FCC", "5G", "20M", "HT", "4T", "128", "26", + "ETSI", "5G", "20M", "HT", "4T", "128", "26", + "MKK", "5G", "20M", "HT", "4T", "128", "26", + "FCC", "5G", "20M", "HT", "4T", "132", "24", + "ETSI", "5G", "20M", "HT", "4T", "132", "26", + "MKK", "5G", "20M", "HT", "4T", "132", "26", + "FCC", "5G", "20M", "HT", "4T", "136", "24", + "ETSI", "5G", "20M", "HT", "4T", "136", "26", + "MKK", "5G", "20M", "HT", "4T", "136", "26", + "FCC", "5G", "20M", "HT", "4T", "140", "22", + "ETSI", "5G", "20M", "HT", "4T", "140", "26", + "MKK", "5G", "20M", "HT", "4T", "140", "26", + "FCC", "5G", "20M", "HT", "4T", "149", "30", + "ETSI", "5G", "20M", "HT", "4T", "149", "26", + "MKK", "5G", "20M", "HT", "4T", "149", "63", + "FCC", "5G", "20M", "HT", "4T", "153", "30", + "ETSI", "5G", "20M", "HT", "4T", "153", "26", + "MKK", "5G", "20M", "HT", "4T", "153", "63", + "FCC", "5G", "20M", "HT", "4T", "157", "30", + "ETSI", "5G", "20M", "HT", "4T", "157", "26", + "MKK", "5G", "20M", "HT", "4T", "157", "63", + "FCC", "5G", "20M", "HT", "4T", "161", "30", + "ETSI", "5G", "20M", "HT", "4T", "161", "26", + "MKK", "5G", "20M", "HT", "4T", "161", "63", + "FCC", "5G", "20M", "HT", "4T", "165", "30", + "ETSI", "5G", "20M", "HT", "4T", "165", "26", + "MKK", "5G", "20M", "HT", "4T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "30", + "ETSI", "5G", "40M", "HT", "1T", "38", "32", + "MKK", "5G", "40M", "HT", "1T", "38", "32", + "FCC", "5G", "40M", "HT", "1T", "46", "30", + "ETSI", "5G", "40M", "HT", "1T", "46", "32", + "MKK", "5G", "40M", "HT", "1T", "46", "32", + "FCC", "5G", "40M", "HT", "1T", "54", "32", + "ETSI", "5G", "40M", "HT", "1T", "54", "32", + "MKK", "5G", "40M", "HT", "1T", "54", "32", + "FCC", "5G", "40M", "HT", "1T", "62", "32", + "ETSI", "5G", "40M", "HT", "1T", "62", "32", + "MKK", "5G", "40M", "HT", "1T", "62", "32", + "FCC", "5G", "40M", "HT", "1T", "102", "28", + "ETSI", "5G", "40M", "HT", "1T", "102", "32", + "MKK", "5G", "40M", "HT", "1T", "102", "32", + "FCC", "5G", "40M", "HT", "1T", "110", "32", + "ETSI", "5G", "40M", "HT", "1T", "110", "32", + "MKK", "5G", "40M", "HT", "1T", "110", "32", + "FCC", "5G", "40M", "HT", "1T", "118", "36", + "ETSI", "5G", "40M", "HT", "1T", "118", "32", + "MKK", "5G", "40M", "HT", "1T", "118", "32", + "FCC", "5G", "40M", "HT", "1T", "126", "34", + "ETSI", "5G", "40M", "HT", "1T", "126", "32", + "MKK", "5G", "40M", "HT", "1T", "126", "32", + "FCC", "5G", "40M", "HT", "1T", "134", "32", + "ETSI", "5G", "40M", "HT", "1T", "134", "32", + "MKK", "5G", "40M", "HT", "1T", "134", "32", + "FCC", "5G", "40M", "HT", "1T", "151", "36", + "ETSI", "5G", "40M", "HT", "1T", "151", "32", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "36", + "ETSI", "5G", "40M", "HT", "1T", "159", "32", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "28", + "ETSI", "5G", "40M", "HT", "2T", "38", "30", + "MKK", "5G", "40M", "HT", "2T", "38", "30", + "FCC", "5G", "40M", "HT", "2T", "46", "28", + "ETSI", "5G", "40M", "HT", "2T", "46", "30", + "MKK", "5G", "40M", "HT", "2T", "46", "30", + "FCC", "5G", "40M", "HT", "2T", "54", "30", + "ETSI", "5G", "40M", "HT", "2T", "54", "30", + "MKK", "5G", "40M", "HT", "2T", "54", "30", + "FCC", "5G", "40M", "HT", "2T", "62", "30", + "ETSI", "5G", "40M", "HT", "2T", "62", "30", + "MKK", "5G", "40M", "HT", "2T", "62", "30", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "30", + "MKK", "5G", "40M", "HT", "2T", "102", "30", + "FCC", "5G", "40M", "HT", "2T", "110", "30", + "ETSI", "5G", "40M", "HT", "2T", "110", "30", + "MKK", "5G", "40M", "HT", "2T", "110", "30", + "FCC", "5G", "40M", "HT", "2T", "118", "34", + "ETSI", "5G", "40M", "HT", "2T", "118", "30", + "MKK", "5G", "40M", "HT", "2T", "118", "30", + "FCC", "5G", "40M", "HT", "2T", "126", "32", + "ETSI", "5G", "40M", "HT", "2T", "126", "30", + "MKK", "5G", "40M", "HT", "2T", "126", "30", + "FCC", "5G", "40M", "HT", "2T", "134", "30", + "ETSI", "5G", "40M", "HT", "2T", "134", "30", + "MKK", "5G", "40M", "HT", "2T", "134", "30", + "FCC", "5G", "40M", "HT", "2T", "151", "34", + "ETSI", "5G", "40M", "HT", "2T", "151", "30", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "34", + "ETSI", "5G", "40M", "HT", "2T", "159", "30", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "40M", "HT", "3T", "38", "26", + "ETSI", "5G", "40M", "HT", "3T", "38", "28", + "MKK", "5G", "40M", "HT", "3T", "38", "28", + "FCC", "5G", "40M", "HT", "3T", "46", "26", + "ETSI", "5G", "40M", "HT", "3T", "46", "28", + "MKK", "5G", "40M", "HT", "3T", "46", "28", + "FCC", "5G", "40M", "HT", "3T", "54", "28", + "ETSI", "5G", "40M", "HT", "3T", "54", "28", + "MKK", "5G", "40M", "HT", "3T", "54", "28", + "FCC", "5G", "40M", "HT", "3T", "62", "28", + "ETSI", "5G", "40M", "HT", "3T", "62", "28", + "MKK", "5G", "40M", "HT", "3T", "62", "28", + "FCC", "5G", "40M", "HT", "3T", "102", "24", + "ETSI", "5G", "40M", "HT", "3T", "102", "28", + "MKK", "5G", "40M", "HT", "3T", "102", "28", + "FCC", "5G", "40M", "HT", "3T", "110", "28", + "ETSI", "5G", "40M", "HT", "3T", "110", "28", + "MKK", "5G", "40M", "HT", "3T", "110", "28", + "FCC", "5G", "40M", "HT", "3T", "118", "32", + "ETSI", "5G", "40M", "HT", "3T", "118", "28", + "MKK", "5G", "40M", "HT", "3T", "118", "28", + "FCC", "5G", "40M", "HT", "3T", "126", "30", + "ETSI", "5G", "40M", "HT", "3T", "126", "28", + "MKK", "5G", "40M", "HT", "3T", "126", "28", + "FCC", "5G", "40M", "HT", "3T", "134", "28", + "ETSI", "5G", "40M", "HT", "3T", "134", "28", + "MKK", "5G", "40M", "HT", "3T", "134", "28", + "FCC", "5G", "40M", "HT", "3T", "151", "32", + "ETSI", "5G", "40M", "HT", "3T", "151", "28", + "MKK", "5G", "40M", "HT", "3T", "151", "63", + "FCC", "5G", "40M", "HT", "3T", "159", "32", + "ETSI", "5G", "40M", "HT", "3T", "159", "28", + "MKK", "5G", "40M", "HT", "3T", "159", "63", + "FCC", "5G", "40M", "HT", "4T", "38", "24", + "ETSI", "5G", "40M", "HT", "4T", "38", "26", + "MKK", "5G", "40M", "HT", "4T", "38", "26", + "FCC", "5G", "40M", "HT", "4T", "46", "24", + "ETSI", "5G", "40M", "HT", "4T", "46", "26", + "MKK", "5G", "40M", "HT", "4T", "46", "26", + "FCC", "5G", "40M", "HT", "4T", "54", "26", + "ETSI", "5G", "40M", "HT", "4T", "54", "26", + "MKK", "5G", "40M", "HT", "4T", "54", "26", + "FCC", "5G", "40M", "HT", "4T", "62", "26", + "ETSI", "5G", "40M", "HT", "4T", "62", "26", + "MKK", "5G", "40M", "HT", "4T", "62", "26", + "FCC", "5G", "40M", "HT", "4T", "102", "22", + "ETSI", "5G", "40M", "HT", "4T", "102", "26", + "MKK", "5G", "40M", "HT", "4T", "102", "26", + "FCC", "5G", "40M", "HT", "4T", "110", "26", + "ETSI", "5G", "40M", "HT", "4T", "110", "26", + "MKK", "5G", "40M", "HT", "4T", "110", "26", + "FCC", "5G", "40M", "HT", "4T", "118", "30", + "ETSI", "5G", "40M", "HT", "4T", "118", "26", + "MKK", "5G", "40M", "HT", "4T", "118", "26", + "FCC", "5G", "40M", "HT", "4T", "126", "28", + "ETSI", "5G", "40M", "HT", "4T", "126", "26", + "MKK", "5G", "40M", "HT", "4T", "126", "26", + "FCC", "5G", "40M", "HT", "4T", "134", "26", + "ETSI", "5G", "40M", "HT", "4T", "134", "26", + "MKK", "5G", "40M", "HT", "4T", "134", "26", + "FCC", "5G", "40M", "HT", "4T", "151", "30", + "ETSI", "5G", "40M", "HT", "4T", "151", "26", + "MKK", "5G", "40M", "HT", "4T", "151", "63", + "FCC", "5G", "40M", "HT", "4T", "159", "30", + "ETSI", "5G", "40M", "HT", "4T", "159", "26", + "MKK", "5G", "40M", "HT", "4T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "30", + "ETSI", "5G", "80M", "VHT", "1T", "42", "32", + "MKK", "5G", "80M", "VHT", "1T", "42", "32", + "FCC", "5G", "80M", "VHT", "1T", "58", "28", + "ETSI", "5G", "80M", "VHT", "1T", "58", "32", + "MKK", "5G", "80M", "VHT", "1T", "58", "32", + "FCC", "5G", "80M", "VHT", "1T", "106", "30", + "ETSI", "5G", "80M", "VHT", "1T", "106", "32", + "MKK", "5G", "80M", "VHT", "1T", "106", "32", + "FCC", "5G", "80M", "VHT", "1T", "122", "34", + "ETSI", "5G", "80M", "VHT", "1T", "122", "32", + "MKK", "5G", "80M", "VHT", "1T", "122", "32", + "FCC", "5G", "80M", "VHT", "1T", "155", "36", + "ETSI", "5G", "80M", "VHT", "1T", "155", "32", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "28", + "ETSI", "5G", "80M", "VHT", "2T", "42", "30", + "MKK", "5G", "80M", "VHT", "2T", "42", "30", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "30", + "MKK", "5G", "80M", "VHT", "2T", "58", "30", + "FCC", "5G", "80M", "VHT", "2T", "106", "28", + "ETSI", "5G", "80M", "VHT", "2T", "106", "30", + "MKK", "5G", "80M", "VHT", "2T", "106", "30", + "FCC", "5G", "80M", "VHT", "2T", "122", "32", + "ETSI", "5G", "80M", "VHT", "2T", "122", "30", + "MKK", "5G", "80M", "VHT", "2T", "122", "30", + "FCC", "5G", "80M", "VHT", "2T", "155", "34", + "ETSI", "5G", "80M", "VHT", "2T", "155", "30", + "MKK", "5G", "80M", "VHT", "2T", "155", "63", + "FCC", "5G", "80M", "VHT", "3T", "42", "26", + "ETSI", "5G", "80M", "VHT", "3T", "42", "28", + "MKK", "5G", "80M", "VHT", "3T", "42", "28", + "FCC", "5G", "80M", "VHT", "3T", "58", "24", + "ETSI", "5G", "80M", "VHT", "3T", "58", "28", + "MKK", "5G", "80M", "VHT", "3T", "58", "28", + "FCC", "5G", "80M", "VHT", "3T", "106", "26", + "ETSI", "5G", "80M", "VHT", "3T", "106", "28", + "MKK", "5G", "80M", "VHT", "3T", "106", "28", + "FCC", "5G", "80M", "VHT", "3T", "122", "30", + "ETSI", "5G", "80M", "VHT", "3T", "122", "28", + "MKK", "5G", "80M", "VHT", "3T", "122", "28", + "FCC", "5G", "80M", "VHT", "3T", "155", "32", + "ETSI", "5G", "80M", "VHT", "3T", "155", "28", + "MKK", "5G", "80M", "VHT", "3T", "155", "63", + "FCC", "5G", "80M", "VHT", "4T", "42", "24", + "ETSI", "5G", "80M", "VHT", "4T", "42", "26", + "MKK", "5G", "80M", "VHT", "4T", "42", "26", + "FCC", "5G", "80M", "VHT", "4T", "58", "22", + "ETSI", "5G", "80M", "VHT", "4T", "58", "26", + "MKK", "5G", "80M", "VHT", "4T", "58", "26", + "FCC", "5G", "80M", "VHT", "4T", "106", "24", + "ETSI", "5G", "80M", "VHT", "4T", "106", "26", + "MKK", "5G", "80M", "VHT", "4T", "106", "26", + "FCC", "5G", "80M", "VHT", "4T", "122", "28", + "ETSI", "5G", "80M", "VHT", "4T", "122", "26", + "MKK", "5G", "80M", "VHT", "4T", "122", "26", + "FCC", "5G", "80M", "VHT", "4T", "155", "30", + "ETSI", "5G", "80M", "VHT", "4T", "155", "26", + "MKK", "5G", "80M", "VHT", "4T", "155", "63" +}; + +void +odm_read_and_config_mp_8814a_txpwr_lmt( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8814A_TXPWR_LMT)/sizeof(pu1Byte); + pu1Byte *Array = (pu1Byte *)Array_MP_8814A_TXPWR_LMT; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesReadPwrLmt = ArrayLen/7; +#endif + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_TXPWR_LMT\n"); + + for (i = 0; i < ArrayLen; i += 7) { + pu1Byte regulation = Array[i]; + pu1Byte band = Array[i+1]; + pu1Byte bandwidth = Array[i+2]; + pu1Byte rate = Array[i+3]; + pu1Byte rfPath = Array[i+4]; + pu1Byte chnl = Array[i+5]; + pu1Byte val = Array[i+6]; + + odm_ConfigBB_TXPWR_LMT_8814A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rfPath, chnl, val); +#endif + } + +} + +/****************************************************************************** +* TXPWR_LMT_type2.TXT +******************************************************************************/ + +/* +const char *Array_MP_8814A_TXPWR_LMT_type2[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "36", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "36", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "36", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "36", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "36", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "36", + "MKK", "2.4G", "20M", "HT", "1T", "01", "36", + "FCC", "2.4G", "20M", "HT", "1T", "02", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "36", + "MKK", "2.4G", "20M", "HT", "1T", "02", "36", + "FCC", "2.4G", "20M", "HT", "1T", "03", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "36", + "MKK", "2.4G", "20M", "HT", "1T", "03", "36", + "FCC", "2.4G", "20M", "HT", "1T", "04", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "36", + "MKK", "2.4G", "20M", "HT", "1T", "04", "36", + "FCC", "2.4G", "20M", "HT", "1T", "05", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "36", + "MKK", "2.4G", "20M", "HT", "1T", "05", "36", + "FCC", "2.4G", "20M", "HT", "1T", "06", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "36", + "MKK", "2.4G", "20M", "HT", "1T", "06", "36", + "FCC", "2.4G", "20M", "HT", "1T", "07", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "36", + "MKK", "2.4G", "20M", "HT", "1T", "07", "36", + "FCC", "2.4G", "20M", "HT", "1T", "08", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "36", + "MKK", "2.4G", "20M", "HT", "1T", "08", "36", + "FCC", "2.4G", "20M", "HT", "1T", "09", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "36", + "MKK", "2.4G", "20M", "HT", "1T", "09", "36", + "FCC", "2.4G", "20M", "HT", "1T", "10", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "36", + "MKK", "2.4G", "20M", "HT", "1T", "10", "36", + "FCC", "2.4G", "20M", "HT", "1T", "11", "36", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "36", + "MKK", "2.4G", "20M", "HT", "1T", "11", "36", + "FCC", "2.4G", "20M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "36", + "MKK", "2.4G", "20M", "HT", "1T", "12", "36", + "FCC", "2.4G", "20M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "36", + "MKK", "2.4G", "20M", "HT", "1T", "13", "36", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "36", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "36", + "MKK", "2.4G", "20M", "HT", "2T", "01", "36", + "FCC", "2.4G", "20M", "HT", "2T", "02", "36", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "36", + "MKK", "2.4G", "20M", "HT", "2T", "02", "36", + "FCC", "2.4G", "20M", "HT", "2T", "03", "36", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "36", + "MKK", "2.4G", "20M", "HT", "2T", "03", "36", + "FCC", "2.4G", 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"FCC", "2.4G", "20M", "HT", "2T", "11", "36", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "36", + "MKK", "2.4G", "20M", "HT", "2T", "11", "36", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "36", + "MKK", "2.4G", "20M", "HT", "2T", "12", "36", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "36", + "MKK", "2.4G", "20M", "HT", "2T", "13", "36", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "20M", "HT", "3T", "01", "36", + "ETSI", "2.4G", "20M", "HT", "3T", "01", "36", + "MKK", "2.4G", "20M", "HT", "3T", "01", "36", + "FCC", "2.4G", "20M", "HT", "3T", "02", "36", + "ETSI", "2.4G", "20M", "HT", "3T", "02", "36", + "MKK", "2.4G", "20M", "HT", "3T", "02", "36", + "FCC", "2.4G", "20M", "HT", "3T", "03", "36", + "ETSI", "2.4G", "20M", "HT", "3T", "03", "36", + "MKK", "2.4G", "20M", "HT", "3T", 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"20M", "HT", "3T", "10", "36", + "FCC", "2.4G", "20M", "HT", "3T", "11", "36", + "ETSI", "2.4G", "20M", "HT", "3T", "11", "36", + "MKK", "2.4G", "20M", "HT", "3T", "11", "36", + "FCC", "2.4G", "20M", "HT", "3T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "3T", "12", "36", + "MKK", "2.4G", "20M", "HT", "3T", "12", "36", + "FCC", "2.4G", "20M", "HT", "3T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "3T", "13", "36", + "MKK", "2.4G", "20M", "HT", "3T", "13", "36", + "FCC", "2.4G", "20M", "HT", "3T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "3T", "14", "63", + "MKK", "2.4G", "20M", "HT", "3T", "14", "63", + "FCC", "2.4G", "20M", "HT", "4T", "01", "36", + "ETSI", "2.4G", "20M", "HT", "4T", "01", "36", + "MKK", "2.4G", "20M", "HT", "4T", "01", "36", + "FCC", "2.4G", "20M", "HT", "4T", "02", "36", + "ETSI", "2.4G", "20M", "HT", "4T", "02", "36", + "MKK", "2.4G", "20M", "HT", "4T", "02", "36", + "FCC", "2.4G", "20M", "HT", "4T", "03", "36", + "ETSI", "2.4G", "20M", "HT", "4T", "03", "36", + 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"FCC", "2.4G", "40M", "HT", "3T", "03", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "03", "36", + "MKK", "2.4G", "40M", "HT", "3T", "03", "36", + "FCC", "2.4G", "40M", "HT", "3T", "04", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "04", "36", + "MKK", "2.4G", "40M", "HT", "3T", "04", "36", + "FCC", "2.4G", "40M", "HT", "3T", "05", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "05", "36", + "MKK", "2.4G", "40M", "HT", "3T", "05", "36", + "FCC", "2.4G", "40M", "HT", "3T", "06", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "06", "36", + "MKK", "2.4G", "40M", "HT", "3T", "06", "36", + "FCC", "2.4G", "40M", "HT", "3T", "07", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "07", "36", + "MKK", "2.4G", "40M", "HT", "3T", "07", "36", + "FCC", "2.4G", "40M", "HT", "3T", "08", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "08", "36", + "MKK", "2.4G", "40M", "HT", "3T", "08", "36", + "FCC", "2.4G", "40M", "HT", "3T", "09", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "09", "36", + "MKK", "2.4G", "40M", "HT", "3T", "09", "36", + "FCC", "2.4G", "40M", "HT", "3T", "10", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "10", "36", + "MKK", "2.4G", "40M", "HT", "3T", "10", "36", + "FCC", "2.4G", "40M", "HT", "3T", "11", "36", + "ETSI", "2.4G", "40M", "HT", "3T", "11", "36", + "MKK", "2.4G", "40M", "HT", "3T", "11", "36", + "FCC", "2.4G", "40M", "HT", "3T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "12", "36", + "MKK", "2.4G", "40M", "HT", "3T", "12", "36", + "FCC", "2.4G", "40M", "HT", "3T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "13", "36", + "MKK", "2.4G", "40M", "HT", "3T", "13", "36", + "FCC", "2.4G", "40M", "HT", "3T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "14", "63", + "MKK", "2.4G", "40M", "HT", "3T", "14", "63", + "FCC", "2.4G", "40M", "HT", "4T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "01", "63", + "MKK", "2.4G", "40M", "HT", "4T", "01", "63", + "FCC", "2.4G", "40M", "HT", "4T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "02", "63", + "MKK", "2.4G", "40M", "HT", "4T", "02", "63", + "FCC", "2.4G", "40M", "HT", "4T", "03", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "03", "36", + "MKK", "2.4G", "40M", "HT", "4T", "03", "36", + "FCC", "2.4G", "40M", "HT", "4T", "04", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "04", "36", + "MKK", "2.4G", "40M", "HT", "4T", "04", "36", + "FCC", "2.4G", "40M", "HT", "4T", "05", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "05", "36", + "MKK", "2.4G", "40M", "HT", "4T", "05", "36", + "FCC", "2.4G", "40M", "HT", "4T", "06", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "06", "36", + "MKK", "2.4G", "40M", "HT", "4T", "06", "36", + "FCC", "2.4G", "40M", "HT", "4T", "07", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "07", "36", + "MKK", "2.4G", "40M", "HT", "4T", "07", "36", + "FCC", "2.4G", "40M", "HT", "4T", "08", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "08", "36", + "MKK", "2.4G", "40M", "HT", "4T", "08", "36", + "FCC", "2.4G", "40M", "HT", "4T", "09", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "09", "36", + "MKK", "2.4G", "40M", "HT", "4T", "09", "36", + "FCC", "2.4G", "40M", "HT", "4T", "10", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "10", "36", + "MKK", "2.4G", "40M", "HT", "4T", "10", "36", + "FCC", "2.4G", "40M", "HT", "4T", "11", "36", + "ETSI", "2.4G", "40M", "HT", "4T", "11", "36", + "MKK", "2.4G", "40M", "HT", "4T", "11", "36", + "FCC", "2.4G", "40M", "HT", "4T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "12", "36", + "MKK", "2.4G", "40M", "HT", "4T", "12", "36", + "FCC", "2.4G", "40M", "HT", "4T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "13", "36", + "MKK", "2.4G", "40M", "HT", "4T", "13", "36", + "FCC", "2.4G", "40M", "HT", "4T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "14", "63", + "MKK", "2.4G", "40M", "HT", "4T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "36", + "MKK", "5G", "20M", "OFDM", "1T", "36", "36", + "FCC", "5G", "20M", "OFDM", "1T", "40", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "36", + "MKK", "5G", "20M", "OFDM", "1T", "40", "36", + "FCC", "5G", "20M", "OFDM", "1T", "44", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "36", + "MKK", "5G", "20M", "OFDM", "1T", "44", "36", + "FCC", "5G", "20M", "OFDM", "1T", "48", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "36", + "MKK", "5G", "20M", "OFDM", "1T", "48", "36", + "FCC", "5G", "20M", "OFDM", "1T", "52", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "36", + "MKK", "5G", "20M", "OFDM", "1T", "52", "36", + "FCC", "5G", "20M", "OFDM", "1T", "56", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "36", + "MKK", "5G", "20M", "OFDM", "1T", "56", "36", + "FCC", "5G", "20M", "OFDM", "1T", "60", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "36", + "MKK", "5G", "20M", "OFDM", "1T", "60", "36", + "FCC", "5G", "20M", "OFDM", "1T", "64", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "36", + "MKK", "5G", "20M", "OFDM", "1T", "64", "36", + "FCC", "5G", "20M", "OFDM", "1T", "100", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "36", + "MKK", "5G", "20M", "OFDM", "1T", "100", "36", + "FCC", "5G", "20M", "OFDM", "1T", "104", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "36", + "MKK", "5G", "20M", "OFDM", "1T", "104", "36", + "FCC", "5G", "20M", "OFDM", "1T", "108", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "36", + "MKK", "5G", "20M", "OFDM", "1T", "108", "36", + "FCC", "5G", "20M", "OFDM", "1T", "112", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "36", + "MKK", "5G", "20M", "OFDM", "1T", "112", "36", + "FCC", "5G", "20M", "OFDM", "1T", "116", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "36", + "MKK", "5G", "20M", "OFDM", "1T", "116", "36", + "FCC", "5G", "20M", "OFDM", "1T", "120", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "36", + "MKK", "5G", "20M", "OFDM", "1T", "120", "36", + "FCC", "5G", "20M", "OFDM", "1T", "124", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "36", + "MKK", "5G", "20M", "OFDM", "1T", "124", "36", + "FCC", "5G", "20M", "OFDM", "1T", "128", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "36", + "MKK", "5G", "20M", "OFDM", "1T", "128", "36", + "FCC", "5G", "20M", "OFDM", "1T", "132", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "36", + "MKK", "5G", "20M", "OFDM", "1T", "132", "36", + "FCC", "5G", "20M", "OFDM", "1T", "136", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "36", + "MKK", "5G", "20M", "OFDM", "1T", "136", "36", + "FCC", "5G", "20M", "OFDM", "1T", "140", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "36", + "MKK", "5G", "20M", "OFDM", "1T", "140", "36", + "FCC", "5G", "20M", "OFDM", "1T", "149", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "36", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "36", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "36", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "36", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "36", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "36", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "36", + "ETSI", "5G", "20M", "HT", "1T", "36", "36", + "MKK", "5G", "20M", "HT", "1T", "36", "36", + "FCC", "5G", "20M", "HT", "1T", "40", "36", + "ETSI", "5G", "20M", "HT", "1T", "40", "36", + "MKK", "5G", "20M", "HT", "1T", "40", "36", + "FCC", "5G", "20M", "HT", "1T", "44", "36", + "ETSI", "5G", "20M", "HT", "1T", "44", "36", + "MKK", "5G", "20M", "HT", "1T", "44", "36", + "FCC", "5G", "20M", "HT", "1T", "48", "36", + "ETSI", "5G", "20M", "HT", "1T", "48", "36", + "MKK", "5G", "20M", "HT", "1T", "48", "36", + "FCC", "5G", "20M", "HT", "1T", "52", "36", + "ETSI", "5G", "20M", "HT", "1T", "52", "36", + "MKK", "5G", "20M", "HT", "1T", "52", "36", + "FCC", "5G", "20M", "HT", "1T", "56", "36", + "ETSI", "5G", "20M", "HT", "1T", "56", "36", + "MKK", "5G", "20M", "HT", "1T", "56", "36", + "FCC", "5G", "20M", "HT", "1T", "60", "36", + "ETSI", "5G", "20M", "HT", "1T", "60", "36", + "MKK", "5G", "20M", "HT", "1T", "60", "36", + "FCC", "5G", "20M", "HT", "1T", "64", "36", + "ETSI", "5G", "20M", "HT", "1T", "64", "36", + "MKK", "5G", "20M", "HT", "1T", "64", "36", + "FCC", "5G", "20M", "HT", "1T", "100", "36", + "ETSI", "5G", "20M", "HT", "1T", "100", "36", + "MKK", "5G", "20M", "HT", "1T", "100", "36", + "FCC", "5G", "20M", "HT", "1T", "104", "36", + "ETSI", "5G", "20M", "HT", "1T", "104", "36", + "MKK", "5G", "20M", "HT", "1T", "104", "36", + "FCC", "5G", "20M", "HT", "1T", "108", "36", + "ETSI", "5G", "20M", "HT", "1T", "108", "36", + "MKK", "5G", "20M", "HT", "1T", "108", "36", + "FCC", "5G", "20M", "HT", "1T", "112", "36", + "ETSI", "5G", "20M", "HT", "1T", "112", "36", + "MKK", "5G", "20M", "HT", "1T", "112", "36", + "FCC", "5G", "20M", "HT", "1T", "116", "36", + "ETSI", "5G", "20M", "HT", "1T", "116", "36", + "MKK", "5G", "20M", "HT", "1T", "116", "36", + "FCC", "5G", "20M", "HT", "1T", "120", "36", + "ETSI", "5G", "20M", "HT", "1T", "120", "36", + "MKK", "5G", "20M", "HT", "1T", "120", "36", + "FCC", "5G", "20M", "HT", "1T", "124", "36", + "ETSI", "5G", "20M", "HT", "1T", "124", "36", + "MKK", "5G", "20M", "HT", "1T", "124", "36", + "FCC", "5G", "20M", "HT", "1T", "128", "36", + "ETSI", "5G", "20M", "HT", "1T", "128", "36", + "MKK", "5G", "20M", "HT", "1T", "128", "36", + "FCC", "5G", "20M", "HT", "1T", "132", "36", + "ETSI", "5G", "20M", "HT", "1T", "132", "36", + "MKK", "5G", "20M", "HT", "1T", "132", "36", + "FCC", "5G", "20M", "HT", "1T", "136", "36", + "ETSI", "5G", "20M", "HT", "1T", "136", "36", + "MKK", "5G", "20M", "HT", "1T", "136", "36", + "FCC", "5G", "20M", "HT", "1T", "140", "36", + "ETSI", "5G", "20M", "HT", "1T", "140", "36", + "MKK", "5G", "20M", "HT", "1T", "140", "36", + "FCC", "5G", "20M", "HT", "1T", "149", "36", + "ETSI", "5G", "20M", "HT", "1T", "149", "36", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "36", + "ETSI", "5G", "20M", "HT", "1T", "153", "36", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "36", + "ETSI", "5G", "20M", "HT", "1T", "157", "36", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "36", + "ETSI", "5G", "20M", "HT", "1T", "161", "36", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "36", + "ETSI", "5G", "20M", "HT", "1T", "165", "36", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "36", + "ETSI", "5G", "20M", "HT", "2T", "36", "36", + "MKK", "5G", "20M", "HT", "2T", "36", "36", + "FCC", "5G", "20M", "HT", "2T", "40", "36", + "ETSI", "5G", "20M", "HT", "2T", "40", "36", + "MKK", "5G", "20M", "HT", "2T", "40", "36", + "FCC", "5G", "20M", "HT", "2T", "44", "36", + "ETSI", "5G", "20M", "HT", "2T", "44", "36", + "MKK", "5G", "20M", "HT", "2T", "44", "36", + "FCC", "5G", "20M", "HT", "2T", "48", "36", + "ETSI", "5G", "20M", "HT", "2T", "48", "36", + "MKK", "5G", "20M", "HT", "2T", "48", "36", + "FCC", "5G", "20M", "HT", "2T", "52", "36", + "ETSI", "5G", "20M", "HT", "2T", "52", "36", + "MKK", "5G", "20M", "HT", "2T", "52", "36", + "FCC", "5G", "20M", "HT", "2T", "56", "36", + "ETSI", "5G", "20M", "HT", "2T", "56", "36", + "MKK", "5G", "20M", "HT", "2T", "56", "36", + "FCC", "5G", "20M", "HT", "2T", "60", "36", + "ETSI", "5G", "20M", "HT", "2T", "60", "36", + "MKK", "5G", "20M", "HT", "2T", "60", "36", + "FCC", "5G", "20M", "HT", "2T", "64", "36", + "ETSI", "5G", "20M", "HT", "2T", "64", "36", + "MKK", "5G", "20M", "HT", "2T", "64", "36", + "FCC", "5G", "20M", "HT", "2T", "100", "36", + "ETSI", "5G", "20M", "HT", "2T", "100", "36", + "MKK", "5G", "20M", "HT", "2T", "100", "36", + "FCC", "5G", "20M", "HT", "2T", "104", "36", + "ETSI", "5G", "20M", "HT", "2T", "104", "36", + "MKK", "5G", "20M", "HT", "2T", "104", "36", + "FCC", "5G", "20M", "HT", "2T", "108", "36", + "ETSI", "5G", "20M", "HT", "2T", "108", "36", + "MKK", "5G", "20M", "HT", "2T", "108", "36", + "FCC", "5G", "20M", "HT", "2T", "112", "36", + "ETSI", "5G", "20M", "HT", "2T", "112", "36", + "MKK", "5G", "20M", "HT", "2T", "112", "36", + "FCC", "5G", "20M", "HT", "2T", "116", "36", + "ETSI", "5G", "20M", "HT", "2T", "116", "36", + "MKK", "5G", "20M", "HT", "2T", "116", "36", + "FCC", "5G", "20M", "HT", "2T", "120", "36", + "ETSI", "5G", "20M", "HT", "2T", "120", "36", + "MKK", "5G", "20M", "HT", "2T", "120", "36", + "FCC", "5G", "20M", "HT", "2T", "124", "36", + "ETSI", "5G", "20M", "HT", "2T", "124", "36", + "MKK", "5G", "20M", "HT", "2T", "124", "36", + "FCC", "5G", "20M", "HT", "2T", "128", "36", + "ETSI", "5G", "20M", "HT", "2T", "128", "36", + "MKK", "5G", "20M", "HT", "2T", "128", "36", + "FCC", "5G", "20M", "HT", "2T", "132", "36", + "ETSI", "5G", "20M", "HT", "2T", "132", "36", + "MKK", "5G", "20M", "HT", "2T", "132", "36", + "FCC", "5G", "20M", "HT", "2T", "136", "36", + "ETSI", "5G", "20M", "HT", "2T", "136", "36", + "MKK", "5G", "20M", "HT", "2T", "136", "36", + "FCC", "5G", "20M", "HT", "2T", "140", "36", + "ETSI", "5G", "20M", "HT", "2T", "140", "36", + "MKK", "5G", "20M", "HT", "2T", "140", "36", + "FCC", "5G", "20M", "HT", "2T", "149", "36", + "ETSI", "5G", "20M", "HT", "2T", "149", "36", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "36", + "ETSI", "5G", "20M", "HT", "2T", "153", "36", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "36", + "ETSI", "5G", "20M", "HT", "2T", "157", "36", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "36", + "ETSI", "5G", "20M", "HT", "2T", "161", "36", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "36", + "ETSI", "5G", "20M", "HT", "2T", "165", "36", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "20M", "HT", "3T", "36", "36", + "ETSI", "5G", "20M", "HT", "3T", "36", "36", + "MKK", "5G", "20M", "HT", "3T", "36", "36", + "FCC", "5G", "20M", "HT", "3T", "40", "36", + "ETSI", "5G", "20M", "HT", "3T", "40", "36", + "MKK", "5G", "20M", "HT", "3T", "40", "36", + "FCC", "5G", "20M", "HT", "3T", "44", "36", + "ETSI", "5G", "20M", "HT", "3T", "44", "36", + "MKK", "5G", "20M", "HT", "3T", "44", "36", + "FCC", "5G", "20M", "HT", "3T", "48", "36", + "ETSI", "5G", "20M", "HT", "3T", "48", "36", + "MKK", "5G", "20M", "HT", "3T", "48", "36", + "FCC", "5G", "20M", "HT", "3T", "52", "36", + "ETSI", "5G", "20M", "HT", "3T", "52", "36", + "MKK", "5G", "20M", "HT", "3T", "52", "36", + "FCC", "5G", "20M", "HT", "3T", "56", "36", + "ETSI", "5G", "20M", "HT", "3T", "56", "36", + "MKK", "5G", "20M", "HT", "3T", "56", "36", + "FCC", "5G", "20M", "HT", "3T", "60", "36", + "ETSI", "5G", "20M", "HT", "3T", "60", "36", + "MKK", "5G", "20M", "HT", "3T", "60", "36", + "FCC", "5G", "20M", "HT", "3T", "64", "36", + "ETSI", "5G", "20M", "HT", "3T", "64", "36", + "MKK", "5G", "20M", "HT", "3T", "64", "36", + "FCC", "5G", "20M", "HT", "3T", "100", "36", + "ETSI", "5G", "20M", "HT", "3T", "100", "36", + "MKK", "5G", "20M", "HT", "3T", "100", "36", + "FCC", "5G", "20M", "HT", "3T", "104", "36", + "ETSI", "5G", "20M", "HT", "3T", "104", "36", + "MKK", "5G", "20M", "HT", "3T", "104", "36", + "FCC", "5G", "20M", "HT", "3T", "108", "36", + "ETSI", "5G", "20M", "HT", "3T", "108", "36", + "MKK", "5G", "20M", "HT", "3T", "108", "36", + "FCC", "5G", "20M", "HT", "3T", "112", "36", + "ETSI", "5G", "20M", "HT", "3T", "112", "36", + "MKK", "5G", "20M", "HT", "3T", "112", "36", + "FCC", "5G", "20M", "HT", "3T", "116", "36", + "ETSI", "5G", "20M", "HT", "3T", "116", "36", + "MKK", "5G", "20M", "HT", "3T", "116", "36", + "FCC", "5G", "20M", "HT", "3T", "120", "36", + "ETSI", "5G", "20M", "HT", "3T", "120", "36", + "MKK", "5G", "20M", "HT", "3T", "120", "36", + "FCC", "5G", "20M", "HT", "3T", "124", "36", + "ETSI", "5G", "20M", "HT", "3T", "124", "36", + "MKK", "5G", "20M", "HT", "3T", "124", "36", + "FCC", "5G", "20M", "HT", "3T", "128", "36", + "ETSI", "5G", "20M", "HT", "3T", "128", "36", + "MKK", "5G", "20M", "HT", "3T", "128", "36", + "FCC", "5G", "20M", "HT", "3T", "132", "36", + "ETSI", "5G", "20M", "HT", "3T", "132", "36", + "MKK", "5G", "20M", "HT", "3T", "132", "36", + "FCC", "5G", "20M", "HT", "3T", "136", "36", + "ETSI", "5G", "20M", "HT", "3T", "136", "36", + "MKK", "5G", "20M", "HT", "3T", "136", "36", + "FCC", "5G", "20M", "HT", "3T", "140", "36", + "ETSI", "5G", "20M", "HT", "3T", "140", "36", + "MKK", "5G", "20M", "HT", "3T", "140", "36", + "FCC", "5G", "20M", "HT", "3T", "149", "36", + "ETSI", "5G", "20M", "HT", "3T", "149", "36", + "MKK", "5G", "20M", "HT", "3T", "149", "63", + "FCC", "5G", "20M", "HT", "3T", "153", "36", + "ETSI", "5G", "20M", "HT", "3T", "153", "36", + "MKK", "5G", "20M", "HT", "3T", "153", "63", + "FCC", "5G", "20M", "HT", "3T", "157", "36", + "ETSI", "5G", "20M", "HT", "3T", "157", "36", + "MKK", "5G", "20M", "HT", "3T", "157", "63", + "FCC", "5G", "20M", "HT", "3T", "161", "36", + "ETSI", "5G", "20M", "HT", "3T", "161", "36", + "MKK", "5G", "20M", "HT", "3T", "161", "63", + "FCC", "5G", "20M", "HT", "3T", "165", "36", + "ETSI", "5G", "20M", "HT", "3T", "165", "36", + "MKK", "5G", "20M", "HT", "3T", "165", "63", + "FCC", "5G", "20M", "HT", "4T", "36", "36", + "ETSI", "5G", "20M", "HT", "4T", "36", "36", + "MKK", "5G", "20M", "HT", "4T", "36", "36", + "FCC", "5G", "20M", "HT", "4T", "40", "36", + "ETSI", "5G", "20M", "HT", "4T", "40", "36", + "MKK", "5G", "20M", "HT", "4T", "40", "36", + "FCC", "5G", "20M", "HT", "4T", "44", "36", + "ETSI", "5G", "20M", "HT", "4T", "44", "36", + "MKK", "5G", "20M", "HT", "4T", "44", "36", + "FCC", "5G", "20M", "HT", "4T", "48", "36", + "ETSI", "5G", "20M", "HT", "4T", "48", "36", + "MKK", "5G", "20M", "HT", "4T", "48", "36", + "FCC", "5G", "20M", "HT", "4T", "52", "36", + "ETSI", "5G", "20M", "HT", "4T", "52", "36", + "MKK", "5G", "20M", "HT", "4T", "52", "36", + "FCC", "5G", "20M", "HT", "4T", "56", "36", + "ETSI", "5G", "20M", "HT", "4T", "56", "36", + "MKK", "5G", "20M", "HT", "4T", "56", "36", + "FCC", "5G", "20M", "HT", "4T", "60", "36", + "ETSI", "5G", "20M", "HT", "4T", "60", "36", + "MKK", "5G", "20M", "HT", "4T", "60", "36", + "FCC", "5G", "20M", "HT", "4T", "64", "36", + "ETSI", "5G", "20M", "HT", "4T", "64", "36", + "MKK", "5G", "20M", "HT", "4T", "64", "36", + "FCC", "5G", "20M", "HT", "4T", "100", "36", + "ETSI", "5G", "20M", "HT", "4T", "100", "36", + "MKK", "5G", "20M", "HT", "4T", "100", "36", + "FCC", "5G", "20M", "HT", "4T", "104", "36", + "ETSI", "5G", "20M", "HT", "4T", "104", "36", + "MKK", "5G", "20M", "HT", "4T", "104", "36", + "FCC", "5G", "20M", "HT", "4T", "108", "36", + "ETSI", "5G", "20M", "HT", "4T", "108", "36", + "MKK", "5G", "20M", "HT", "4T", "108", "36", + "FCC", "5G", "20M", "HT", "4T", "112", "36", + "ETSI", "5G", "20M", "HT", "4T", "112", "36", + "MKK", "5G", "20M", "HT", "4T", "112", "36", + "FCC", "5G", "20M", "HT", "4T", "116", "36", + "ETSI", "5G", "20M", "HT", "4T", "116", "36", + "MKK", "5G", "20M", "HT", "4T", "116", "36", + "FCC", "5G", "20M", "HT", "4T", "120", "36", + "ETSI", "5G", "20M", "HT", "4T", "120", "36", + "MKK", "5G", "20M", "HT", "4T", "120", "36", + "FCC", "5G", "20M", "HT", "4T", "124", "36", + "ETSI", "5G", "20M", "HT", "4T", "124", "36", + "MKK", "5G", "20M", "HT", "4T", "124", "36", + "FCC", "5G", "20M", "HT", "4T", "128", "36", + "ETSI", "5G", "20M", "HT", "4T", "128", "36", + "MKK", "5G", "20M", "HT", "4T", "128", "36", + "FCC", "5G", "20M", "HT", "4T", "132", "36", + "ETSI", "5G", "20M", "HT", "4T", "132", "36", + "MKK", "5G", "20M", "HT", "4T", "132", "36", + "FCC", "5G", "20M", "HT", "4T", "136", "36", + "ETSI", "5G", "20M", "HT", "4T", "136", "36", + "MKK", "5G", "20M", "HT", "4T", "136", "36", + "FCC", "5G", "20M", "HT", "4T", "140", "36", + "ETSI", "5G", "20M", "HT", "4T", "140", "36", + "MKK", "5G", "20M", "HT", "4T", "140", "36", + "FCC", "5G", "20M", "HT", "4T", "149", "36", + "ETSI", "5G", "20M", "HT", "4T", "149", "36", + "MKK", "5G", "20M", "HT", "4T", "149", "63", + "FCC", "5G", "20M", "HT", "4T", "153", "36", + "ETSI", "5G", "20M", "HT", "4T", "153", "36", + "MKK", "5G", "20M", "HT", "4T", "153", "63", + "FCC", "5G", "20M", "HT", "4T", "157", "36", + "ETSI", "5G", "20M", "HT", "4T", "157", "36", + "MKK", "5G", "20M", "HT", "4T", "157", "63", + "FCC", "5G", "20M", "HT", "4T", "161", "36", + "ETSI", "5G", "20M", "HT", "4T", "161", "36", + "MKK", "5G", "20M", "HT", "4T", "161", "63", + "FCC", "5G", "20M", "HT", "4T", "165", "36", + "ETSI", "5G", "20M", "HT", "4T", "165", "36", + "MKK", "5G", "20M", "HT", "4T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "36", + "ETSI", "5G", "40M", "HT", "1T", "38", "36", + "MKK", "5G", "40M", "HT", "1T", "38", "36", + "FCC", "5G", "40M", "HT", "1T", "46", "36", + "ETSI", "5G", "40M", "HT", "1T", "46", "36", + "MKK", "5G", "40M", "HT", "1T", "46", "36", + "FCC", "5G", "40M", "HT", "1T", "54", "36", + "ETSI", "5G", "40M", "HT", "1T", "54", "36", + "MKK", "5G", "40M", "HT", "1T", "54", "36", + "FCC", "5G", "40M", "HT", "1T", "62", "36", + "ETSI", "5G", "40M", "HT", "1T", "62", "36", + "MKK", "5G", "40M", "HT", "1T", "62", "36", + "FCC", "5G", "40M", "HT", "1T", "102", "36", + "ETSI", "5G", "40M", "HT", "1T", "102", "36", + "MKK", "5G", "40M", "HT", "1T", "102", "36", + "FCC", "5G", "40M", "HT", "1T", "110", "36", + "ETSI", "5G", "40M", "HT", "1T", "110", "36", + "MKK", "5G", "40M", "HT", "1T", "110", "36", + "FCC", "5G", "40M", "HT", "1T", "118", "36", + "ETSI", "5G", "40M", "HT", "1T", "118", "36", + "MKK", "5G", "40M", "HT", "1T", "118", "36", + "FCC", "5G", "40M", "HT", "1T", "126", "36", + "ETSI", "5G", "40M", "HT", "1T", "126", "36", + "MKK", "5G", "40M", "HT", "1T", "126", "36", + "FCC", "5G", "40M", "HT", "1T", "134", "36", + "ETSI", "5G", "40M", "HT", "1T", "134", "36", + "MKK", "5G", "40M", "HT", "1T", "134", "36", + "FCC", "5G", "40M", "HT", "1T", "151", "36", + "ETSI", "5G", "40M", "HT", "1T", "151", "36", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "36", + "ETSI", "5G", "40M", "HT", "1T", "159", "36", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "36", + "ETSI", "5G", "40M", "HT", "2T", "38", "36", + "MKK", "5G", "40M", "HT", "2T", "38", "36", + "FCC", "5G", "40M", "HT", "2T", "46", "36", + "ETSI", "5G", "40M", "HT", "2T", "46", "36", + "MKK", "5G", "40M", "HT", "2T", "46", "36", + "FCC", "5G", "40M", "HT", "2T", "54", "36", + "ETSI", "5G", "40M", "HT", "2T", "54", "36", + "MKK", "5G", "40M", "HT", "2T", "54", "36", + "FCC", "5G", "40M", "HT", "2T", "62", "36", + "ETSI", "5G", "40M", "HT", "2T", "62", "36", + "MKK", "5G", "40M", "HT", "2T", "62", "36", + "FCC", "5G", "40M", "HT", "2T", "102", "36", + "ETSI", "5G", "40M", "HT", "2T", "102", "36", + "MKK", "5G", "40M", "HT", "2T", "102", "36", + "FCC", "5G", "40M", "HT", "2T", "110", "36", + "ETSI", "5G", "40M", "HT", "2T", "110", "36", + "MKK", "5G", "40M", "HT", "2T", "110", "36", + "FCC", "5G", "40M", "HT", "2T", "118", "36", + "ETSI", "5G", "40M", "HT", "2T", "118", "36", + "MKK", "5G", "40M", "HT", "2T", "118", "36", + "FCC", "5G", "40M", "HT", "2T", "126", "36", + "ETSI", "5G", "40M", "HT", "2T", "126", "36", + "MKK", "5G", "40M", "HT", "2T", "126", "36", + "FCC", "5G", "40M", "HT", "2T", "134", "36", + "ETSI", "5G", "40M", "HT", "2T", "134", "36", + "MKK", "5G", "40M", "HT", "2T", "134", "36", + "FCC", "5G", "40M", "HT", "2T", "151", "36", + "ETSI", "5G", "40M", "HT", "2T", "151", "36", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "36", + "ETSI", "5G", "40M", "HT", "2T", "159", "36", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "40M", "HT", "3T", "38", "36", + "ETSI", "5G", "40M", "HT", "3T", "38", "36", + "MKK", "5G", "40M", "HT", "3T", "38", "36", + "FCC", "5G", "40M", "HT", "3T", "46", "36", + "ETSI", "5G", "40M", "HT", "3T", "46", "36", + "MKK", "5G", "40M", "HT", "3T", "46", "36", + "FCC", "5G", "40M", "HT", "3T", "54", "36", + "ETSI", "5G", "40M", "HT", "3T", "54", "36", + "MKK", "5G", "40M", "HT", "3T", "54", "36", + "FCC", "5G", "40M", "HT", "3T", "62", "36", + "ETSI", "5G", "40M", "HT", "3T", "62", "36", + "MKK", "5G", "40M", "HT", "3T", "62", "36", + "FCC", "5G", "40M", "HT", "3T", "102", "36", + "ETSI", "5G", "40M", "HT", "3T", "102", "36", + "MKK", "5G", "40M", "HT", "3T", "102", "36", + "FCC", "5G", "40M", "HT", "3T", "110", "36", + "ETSI", "5G", "40M", "HT", "3T", "110", "36", + "MKK", "5G", "40M", "HT", "3T", "110", "36", + "FCC", "5G", "40M", "HT", "3T", "118", "36", + "ETSI", "5G", "40M", "HT", "3T", "118", "36", + "MKK", "5G", "40M", "HT", "3T", "118", "36", + "FCC", "5G", "40M", "HT", "3T", "126", "36", + "ETSI", "5G", "40M", "HT", "3T", "126", "36", + "MKK", "5G", "40M", "HT", "3T", "126", "36", + "FCC", "5G", "40M", "HT", "3T", "134", "36", + "ETSI", "5G", "40M", "HT", "3T", "134", "36", + "MKK", "5G", "40M", "HT", "3T", "134", "36", + "FCC", "5G", "40M", "HT", "3T", "151", "36", + "ETSI", "5G", "40M", "HT", "3T", "151", "36", + "MKK", "5G", "40M", "HT", "3T", "151", "63", + "FCC", "5G", "40M", "HT", "3T", "159", "36", + "ETSI", "5G", "40M", "HT", "3T", "159", "36", + "MKK", "5G", "40M", "HT", "3T", "159", "63", + "FCC", "5G", "40M", "HT", "4T", "38", "36", + "ETSI", "5G", "40M", "HT", "4T", "38", "36", + "MKK", "5G", "40M", "HT", "4T", "38", "36", + "FCC", "5G", "40M", "HT", "4T", "46", "36", + "ETSI", "5G", "40M", "HT", "4T", "46", "36", + "MKK", "5G", "40M", "HT", "4T", "46", "36", + "FCC", "5G", "40M", "HT", "4T", "54", "36", + "ETSI", "5G", "40M", "HT", "4T", "54", "36", + "MKK", "5G", "40M", "HT", "4T", "54", "36", + "FCC", "5G", "40M", "HT", "4T", "62", "36", + "ETSI", "5G", "40M", "HT", "4T", "62", "36", + "MKK", "5G", "40M", "HT", "4T", "62", "36", + "FCC", "5G", "40M", "HT", "4T", "102", "36", + "ETSI", "5G", "40M", "HT", "4T", "102", "36", + "MKK", "5G", "40M", "HT", "4T", "102", "36", + "FCC", "5G", "40M", "HT", "4T", "110", "36", + "ETSI", "5G", "40M", "HT", "4T", "110", "36", + "MKK", "5G", "40M", "HT", "4T", "110", "36", + "FCC", "5G", "40M", "HT", "4T", "118", "36", + "ETSI", "5G", "40M", "HT", "4T", "118", "36", + "MKK", "5G", "40M", "HT", "4T", "118", "36", + "FCC", "5G", "40M", "HT", "4T", "126", "36", + "ETSI", "5G", "40M", "HT", "4T", "126", "36", + "MKK", "5G", "40M", "HT", "4T", "126", "36", + "FCC", "5G", "40M", "HT", "4T", "134", "36", + "ETSI", "5G", "40M", "HT", "4T", "134", "36", + "MKK", "5G", "40M", "HT", "4T", "134", "36", + "FCC", "5G", "40M", "HT", "4T", "151", "36", + "ETSI", "5G", "40M", "HT", "4T", "151", "36", + "MKK", "5G", "40M", "HT", "4T", "151", "63", + "FCC", "5G", "40M", "HT", "4T", "159", "36", + "ETSI", "5G", "40M", "HT", "4T", "159", "36", + "MKK", "5G", "40M", "HT", "4T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "36", + "ETSI", "5G", "80M", "VHT", "1T", "42", "36", + "MKK", "5G", "80M", "VHT", "1T", "42", "36", + "FCC", "5G", "80M", "VHT", "1T", "58", "36", + "ETSI", "5G", "80M", "VHT", "1T", "58", "36", + "MKK", "5G", "80M", "VHT", "1T", "58", "36", + "FCC", "5G", "80M", "VHT", "1T", "106", "36", + "ETSI", "5G", "80M", "VHT", "1T", "106", "36", + "MKK", "5G", "80M", "VHT", "1T", "106", "36", + "FCC", "5G", "80M", "VHT", "1T", "122", "36", + "ETSI", "5G", "80M", "VHT", "1T", "122", "36", + "MKK", "5G", "80M", "VHT", "1T", "122", "36", + "FCC", "5G", "80M", "VHT", "1T", "155", "36", + "ETSI", "5G", "80M", "VHT", "1T", "155", "36", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "36", + "ETSI", "5G", "80M", "VHT", "2T", "42", "36", + "MKK", "5G", "80M", "VHT", "2T", "42", "36", + "FCC", "5G", "80M", "VHT", "2T", "58", "36", + "ETSI", "5G", "80M", "VHT", "2T", "58", "36", + "MKK", "5G", "80M", "VHT", "2T", "58", "36", + "FCC", "5G", "80M", "VHT", "2T", "106", "36", + "ETSI", "5G", "80M", "VHT", "2T", "106", "36", + "MKK", "5G", "80M", "VHT", "2T", "106", "36", + "FCC", "5G", "80M", "VHT", "2T", "122", "36", + "ETSI", "5G", "80M", "VHT", "2T", "122", "36", + "MKK", "5G", "80M", "VHT", "2T", "122", "36", + "FCC", "5G", "80M", "VHT", "2T", "155", "36", + "ETSI", "5G", "80M", "VHT", "2T", "155", "36", + "MKK", "5G", "80M", "VHT", "2T", "155", "63", + "FCC", "5G", "80M", "VHT", "3T", "42", "36", + "ETSI", "5G", "80M", "VHT", "3T", "42", "36", + "MKK", "5G", "80M", "VHT", "3T", "42", "36", + "FCC", "5G", "80M", "VHT", "3T", "58", "36", + "ETSI", "5G", "80M", "VHT", "3T", "58", "36", + "MKK", "5G", "80M", "VHT", "3T", "58", "36", + "FCC", "5G", "80M", "VHT", "3T", "106", "36", + "ETSI", "5G", "80M", "VHT", "3T", "106", "36", + "MKK", "5G", "80M", "VHT", "3T", "106", "36", + "FCC", "5G", "80M", "VHT", "3T", "122", "36", + "ETSI", "5G", "80M", "VHT", "3T", "122", "36", + "MKK", "5G", "80M", "VHT", "3T", "122", "36", + "FCC", "5G", "80M", "VHT", "3T", "155", "36", + "ETSI", "5G", "80M", "VHT", "3T", "155", "36", + "MKK", "5G", "80M", "VHT", "3T", "155", "63", + "FCC", "5G", "80M", "VHT", "4T", "42", "36", + "ETSI", "5G", "80M", "VHT", "4T", "42", "36", + "MKK", "5G", "80M", "VHT", "4T", "42", "36", + "FCC", "5G", "80M", "VHT", "4T", "58", "36", + "ETSI", "5G", "80M", "VHT", "4T", "58", "36", + "MKK", "5G", "80M", "VHT", "4T", "58", "36", + "FCC", "5G", "80M", "VHT", "4T", "106", "36", + "ETSI", "5G", "80M", "VHT", "4T", "106", "36", + "MKK", "5G", "80M", "VHT", "4T", "106", "36", + "FCC", "5G", "80M", "VHT", "4T", "122", "36", + "ETSI", "5G", "80M", "VHT", "4T", "122", "36", + "MKK", "5G", "80M", "VHT", "4T", "122", "36", + "FCC", "5G", "80M", "VHT", "4T", "155", "36", + "ETSI", "5G", "80M", "VHT", "4T", "155", "36", + "MKK", "5G", "80M", "VHT", "4T", "155", "63" +}; + +void +_odm_read_and_config_mp_8814a_txpwr_lmt_type2( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8814A_TXPWR_LMT_type2)/sizeof(pu1Byte); + pu1Byte *Array = (pu1Byte *)Array_MP_8814A_TXPWR_LMT_type2; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesReadPwrLmt = ArrayLen/7; +#endif + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_TXPWR_LMT_type2\n"); + + for (i = 0; i < ArrayLen; i += 7) { + pu1Byte regulation = Array[i]; + pu1Byte band = Array[i+1]; + pu1Byte bandwidth = Array[i+2]; + pu1Byte rate = Array[i+3]; + pu1Byte rfPath = Array[i+4]; + pu1Byte chnl = Array[i+5]; + pu1Byte val = Array[i+6]; + + odm_ConfigBB_TXPWR_LMT_8814A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rfPath, chnl, val); +#endif + } + +} + +****************************************************************************** +* TXPWR_LMT_Type3.TXT +****************************************************************************** + +const char *Array_MP_8814A_TXPWR_LMT_Type3[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "40", + "MKK", "2.4G", "20M", "HT", "1T", "01", "40", + "FCC", "2.4G", "20M", "HT", "1T", "02", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "40", + "MKK", "2.4G", "20M", "HT", "1T", "02", "40", + "FCC", "2.4G", "20M", "HT", "1T", "03", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "40", + "MKK", "2.4G", "20M", "HT", "1T", "03", "40", + "FCC", "2.4G", "20M", "HT", "1T", "04", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "40", + "MKK", "2.4G", "20M", "HT", "1T", "04", "40", + "FCC", "2.4G", "20M", "HT", "1T", "05", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "40", + "MKK", "2.4G", "20M", "HT", "1T", "05", "40", + "FCC", "2.4G", "20M", "HT", "1T", "06", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "40", + "MKK", "2.4G", "20M", "HT", "1T", "06", "40", + "FCC", "2.4G", "20M", "HT", "1T", "07", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "40", + "MKK", "2.4G", "20M", "HT", "1T", "07", "40", + "FCC", "2.4G", "20M", "HT", "1T", "08", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "40", + "MKK", "2.4G", "20M", "HT", "1T", "08", "40", + "FCC", "2.4G", "20M", "HT", "1T", "09", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "40", + "MKK", "2.4G", "20M", "HT", "1T", "09", "40", + "FCC", "2.4G", "20M", "HT", "1T", "10", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "40", + "MKK", "2.4G", "20M", "HT", "1T", "10", "40", + "FCC", "2.4G", "20M", "HT", "1T", "11", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "40", + "MKK", "2.4G", "20M", "HT", "1T", "11", "40", + "FCC", "2.4G", "20M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "40", + "MKK", "2.4G", "20M", "HT", "1T", "12", "40", + "FCC", "2.4G", "20M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "40", + "MKK", "2.4G", "20M", "HT", "1T", "13", "40", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "40", + "MKK", "2.4G", "20M", "HT", "2T", "01", "40", + "FCC", "2.4G", "20M", "HT", "2T", "02", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "40", + "MKK", "2.4G", "20M", "HT", "2T", "02", "40", + "FCC", "2.4G", "20M", "HT", "2T", "03", "46", + "ETSI", "2.4G", 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"ETSI", "2.4G", "20M", "HT", "2T", "10", "40", + "MKK", "2.4G", "20M", "HT", "2T", "10", "40", + "FCC", "2.4G", "20M", "HT", "2T", "11", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "40", + "MKK", "2.4G", "20M", "HT", "2T", "11", "40", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "40", + "MKK", "2.4G", "20M", "HT", "2T", "12", "40", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "40", + "MKK", "2.4G", "20M", "HT", "2T", "13", "40", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "20M", "HT", "3T", "01", "46", + "ETSI", "2.4G", "20M", "HT", "3T", "01", "40", + "MKK", "2.4G", "20M", "HT", "3T", "01", "40", + "FCC", "2.4G", "20M", "HT", "3T", "02", "46", + "ETSI", "2.4G", "20M", "HT", "3T", "02", "40", + "MKK", "2.4G", "20M", "HT", "3T", "02", "40", + "FCC", "2.4G", "20M", "HT", "3T", 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"ETSI", "2.4G", "40M", "HT", "3T", "02", "63", + "MKK", "2.4G", "40M", "HT", "3T", "02", "63", + "FCC", "2.4G", "40M", "HT", "3T", "03", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "03", "40", + "MKK", "2.4G", "40M", "HT", "3T", "03", "40", + "FCC", "2.4G", "40M", "HT", "3T", "04", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "04", "40", + "MKK", "2.4G", "40M", "HT", "3T", "04", "40", + "FCC", "2.4G", "40M", "HT", "3T", "05", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "05", "40", + "MKK", "2.4G", "40M", "HT", "3T", "05", "40", + "FCC", "2.4G", "40M", "HT", "3T", "06", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "06", "40", + "MKK", "2.4G", "40M", "HT", "3T", "06", "40", + "FCC", "2.4G", "40M", "HT", "3T", "07", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "07", "40", + "MKK", "2.4G", "40M", "HT", "3T", "07", "40", + "FCC", "2.4G", "40M", "HT", "3T", "08", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "08", "40", + "MKK", "2.4G", "40M", "HT", "3T", "08", "40", + "FCC", "2.4G", "40M", "HT", "3T", "09", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "09", "40", + "MKK", "2.4G", "40M", "HT", "3T", "09", "40", + "FCC", "2.4G", "40M", "HT", "3T", "10", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "10", "40", + "MKK", "2.4G", "40M", "HT", "3T", "10", "40", + "FCC", "2.4G", "40M", "HT", "3T", "11", "46", + "ETSI", "2.4G", "40M", "HT", "3T", "11", "40", + "MKK", "2.4G", "40M", "HT", "3T", "11", "40", + "FCC", "2.4G", "40M", "HT", "3T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "12", "40", + "MKK", "2.4G", "40M", "HT", "3T", "12", "40", + "FCC", "2.4G", "40M", "HT", "3T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "13", "40", + "MKK", "2.4G", "40M", "HT", "3T", "13", "40", + "FCC", "2.4G", "40M", "HT", "3T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "14", "63", + "MKK", "2.4G", "40M", "HT", "3T", "14", "63", + "FCC", "2.4G", "40M", "HT", "4T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "01", "63", + "MKK", "2.4G", "40M", "HT", "4T", "01", "63", + "FCC", "2.4G", "40M", "HT", "4T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "02", "63", + "MKK", "2.4G", "40M", "HT", "4T", "02", "63", + "FCC", "2.4G", "40M", "HT", "4T", "03", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "03", "40", + "MKK", "2.4G", "40M", "HT", "4T", "03", "40", + "FCC", "2.4G", "40M", "HT", "4T", "04", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "04", "40", + "MKK", "2.4G", "40M", "HT", "4T", "04", "40", + "FCC", "2.4G", "40M", "HT", "4T", "05", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "05", "40", + "MKK", "2.4G", "40M", "HT", "4T", "05", "40", + "FCC", "2.4G", "40M", "HT", "4T", "06", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "06", "40", + "MKK", "2.4G", "40M", "HT", "4T", "06", "40", + "FCC", "2.4G", "40M", "HT", "4T", "07", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "07", "40", + "MKK", "2.4G", "40M", "HT", "4T", "07", "40", + "FCC", "2.4G", "40M", "HT", "4T", "08", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "08", "40", + "MKK", "2.4G", "40M", "HT", "4T", "08", "40", + "FCC", "2.4G", "40M", "HT", "4T", "09", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "09", "40", + "MKK", "2.4G", "40M", "HT", "4T", "09", "40", + "FCC", "2.4G", "40M", "HT", "4T", "10", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "10", "40", + "MKK", "2.4G", "40M", "HT", "4T", "10", "40", + "FCC", "2.4G", "40M", "HT", "4T", "11", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "11", "40", + "MKK", "2.4G", "40M", "HT", "4T", "11", "40", + "FCC", "2.4G", "40M", "HT", "4T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "12", "40", + "MKK", "2.4G", "40M", "HT", "4T", "12", "40", + "FCC", "2.4G", "40M", "HT", "4T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "13", "40", + "MKK", "2.4G", "40M", "HT", "4T", "13", "40", + "FCC", "2.4G", "40M", "HT", "4T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "14", "63", + "MKK", "2.4G", "40M", "HT", "4T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "40", + "MKK", "5G", "20M", "OFDM", "1T", "36", "40", + "FCC", "5G", "20M", "OFDM", "1T", "40", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "40", + "MKK", "5G", "20M", "OFDM", "1T", "40", "40", + "FCC", "5G", "20M", "OFDM", "1T", "44", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "40", + "MKK", "5G", "20M", "OFDM", "1T", "44", "40", + "FCC", "5G", "20M", "OFDM", "1T", "48", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "40", + "MKK", "5G", "20M", "OFDM", "1T", "48", "40", + "FCC", "5G", "20M", "OFDM", "1T", "52", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "40", + "MKK", "5G", "20M", "OFDM", "1T", "52", "40", + "FCC", "5G", "20M", "OFDM", "1T", "56", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "40", + "MKK", "5G", "20M", "OFDM", "1T", "56", "40", + "FCC", "5G", "20M", "OFDM", "1T", "60", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "40", + "MKK", "5G", "20M", "OFDM", "1T", "60", "40", + "FCC", "5G", "20M", "OFDM", "1T", "64", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "40", + "MKK", "5G", "20M", "OFDM", "1T", "64", "40", + "FCC", "5G", "20M", "OFDM", "1T", "100", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "40", + "MKK", "5G", "20M", "OFDM", "1T", "100", "40", + "FCC", "5G", "20M", "OFDM", "1T", "104", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "40", + "MKK", "5G", "20M", "OFDM", "1T", "104", "40", + "FCC", "5G", "20M", "OFDM", "1T", "108", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "40", + "MKK", "5G", "20M", "OFDM", "1T", "108", "40", + "FCC", "5G", "20M", "OFDM", "1T", "112", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "40", + "MKK", "5G", "20M", "OFDM", "1T", "112", "40", + "FCC", "5G", "20M", "OFDM", "1T", "116", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "40", + "MKK", "5G", "20M", "OFDM", "1T", "116", "40", + "FCC", "5G", "20M", "OFDM", "1T", "120", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "40", + "MKK", "5G", "20M", "OFDM", "1T", "120", "40", + "FCC", "5G", "20M", "OFDM", "1T", "124", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "40", + "MKK", "5G", "20M", "OFDM", "1T", "124", "40", + "FCC", "5G", "20M", "OFDM", "1T", "128", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "40", + "MKK", "5G", "20M", "OFDM", "1T", "128", "40", + "FCC", "5G", "20M", "OFDM", "1T", "132", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "40", + "MKK", "5G", "20M", "OFDM", "1T", "132", "40", + "FCC", "5G", "20M", "OFDM", "1T", "136", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "40", + "MKK", "5G", "20M", "OFDM", "1T", "136", "40", + "FCC", "5G", "20M", "OFDM", "1T", "140", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "40", + "MKK", "5G", "20M", "OFDM", "1T", "140", "40", + "FCC", "5G", "20M", "OFDM", "1T", "149", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "40", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "40", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "40", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "40", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "40", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "46", + "ETSI", "5G", "20M", "HT", "1T", "36", "40", + "MKK", "5G", "20M", "HT", "1T", "36", "40", + "FCC", "5G", "20M", "HT", "1T", "40", "46", + "ETSI", "5G", "20M", "HT", "1T", "40", "40", + "MKK", "5G", "20M", "HT", "1T", "40", "40", + "FCC", "5G", "20M", "HT", "1T", "44", "46", + "ETSI", "5G", "20M", "HT", "1T", "44", "40", + "MKK", "5G", "20M", "HT", "1T", "44", "40", + "FCC", "5G", "20M", "HT", "1T", "48", "46", + "ETSI", "5G", "20M", "HT", "1T", "48", "40", + "MKK", "5G", "20M", "HT", "1T", "48", "40", + "FCC", "5G", "20M", "HT", "1T", "52", "46", + "ETSI", "5G", "20M", "HT", "1T", "52", "40", + "MKK", "5G", "20M", "HT", "1T", "52", "40", + "FCC", "5G", "20M", "HT", "1T", "56", "46", + "ETSI", "5G", "20M", "HT", "1T", "56", "40", + "MKK", "5G", "20M", "HT", "1T", "56", "40", + "FCC", "5G", "20M", "HT", "1T", "60", "46", + "ETSI", "5G", "20M", "HT", "1T", "60", "40", + "MKK", "5G", "20M", "HT", "1T", "60", "40", + "FCC", "5G", "20M", "HT", "1T", "64", "46", + "ETSI", "5G", "20M", "HT", "1T", "64", "40", + "MKK", "5G", "20M", "HT", "1T", "64", "40", + "FCC", "5G", "20M", "HT", "1T", "100", "46", + "ETSI", "5G", "20M", "HT", "1T", "100", "40", + "MKK", "5G", "20M", "HT", "1T", "100", "40", + "FCC", "5G", "20M", "HT", "1T", "104", "46", + "ETSI", "5G", "20M", "HT", "1T", "104", "40", + "MKK", "5G", "20M", "HT", "1T", "104", "40", + "FCC", "5G", "20M", "HT", "1T", "108", "46", + "ETSI", "5G", "20M", "HT", "1T", "108", "40", + "MKK", "5G", "20M", "HT", "1T", "108", "40", + "FCC", "5G", "20M", "HT", "1T", "112", "46", + "ETSI", "5G", "20M", "HT", "1T", "112", "40", + "MKK", "5G", "20M", "HT", "1T", "112", "40", + "FCC", "5G", "20M", "HT", "1T", "116", "46", + "ETSI", "5G", "20M", "HT", "1T", "116", "40", + "MKK", "5G", "20M", "HT", "1T", "116", "40", + "FCC", "5G", "20M", "HT", "1T", "120", "46", + "ETSI", "5G", "20M", "HT", "1T", "120", "40", + "MKK", "5G", "20M", "HT", "1T", "120", "40", + "FCC", "5G", "20M", "HT", "1T", "124", "46", + "ETSI", "5G", "20M", "HT", "1T", "124", "40", + "MKK", "5G", "20M", "HT", "1T", "124", "40", + "FCC", "5G", "20M", "HT", "1T", "128", "46", + "ETSI", "5G", "20M", "HT", "1T", "128", "40", + "MKK", "5G", "20M", "HT", "1T", "128", "40", + "FCC", "5G", "20M", "HT", "1T", "132", "46", + "ETSI", "5G", "20M", "HT", "1T", "132", "40", + "MKK", "5G", "20M", "HT", "1T", "132", "40", + "FCC", "5G", "20M", "HT", "1T", "136", "46", + "ETSI", "5G", "20M", "HT", "1T", "136", "40", + "MKK", "5G", "20M", "HT", "1T", "136", "40", + "FCC", "5G", "20M", "HT", "1T", "140", "46", + "ETSI", "5G", "20M", "HT", "1T", "140", "40", + "MKK", "5G", "20M", "HT", "1T", "140", "40", + "FCC", "5G", "20M", "HT", "1T", "149", "46", + "ETSI", "5G", "20M", "HT", "1T", "149", "40", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "46", + "ETSI", "5G", "20M", "HT", "1T", "153", "40", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "46", + "ETSI", "5G", "20M", "HT", "1T", "157", "40", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "46", + "ETSI", "5G", "20M", "HT", "1T", "161", "40", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "46", + "ETSI", "5G", "20M", "HT", "1T", "165", "40", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "46", + "ETSI", "5G", "20M", "HT", "2T", "36", "40", + "MKK", "5G", "20M", "HT", "2T", "36", "40", + "FCC", "5G", "20M", "HT", "2T", "40", "46", + "ETSI", "5G", "20M", "HT", "2T", "40", "40", + "MKK", "5G", "20M", "HT", "2T", "40", "40", + "FCC", "5G", "20M", "HT", "2T", "44", "46", + "ETSI", "5G", "20M", "HT", "2T", "44", "40", + "MKK", "5G", "20M", "HT", "2T", "44", "40", + "FCC", "5G", "20M", "HT", "2T", "48", "46", + "ETSI", "5G", "20M", "HT", "2T", "48", "40", + "MKK", "5G", "20M", "HT", "2T", "48", "40", + "FCC", "5G", "20M", "HT", "2T", "52", "46", + "ETSI", "5G", "20M", "HT", "2T", "52", "40", + "MKK", "5G", "20M", "HT", "2T", "52", "40", + "FCC", "5G", "20M", "HT", "2T", "56", "46", + "ETSI", "5G", "20M", "HT", "2T", "56", "40", + "MKK", "5G", "20M", "HT", "2T", "56", "40", + "FCC", "5G", "20M", "HT", "2T", "60", "46", + "ETSI", "5G", "20M", "HT", "2T", "60", "40", + "MKK", "5G", "20M", "HT", "2T", "60", "40", + "FCC", "5G", "20M", "HT", "2T", "64", "46", + "ETSI", "5G", "20M", "HT", "2T", "64", "40", + "MKK", "5G", "20M", "HT", "2T", "64", "40", + "FCC", "5G", "20M", "HT", "2T", "100", "46", + "ETSI", "5G", "20M", "HT", "2T", "100", "40", + "MKK", "5G", "20M", "HT", "2T", "100", "40", + "FCC", "5G", "20M", "HT", "2T", "104", "46", + "ETSI", "5G", "20M", "HT", "2T", "104", "40", + "MKK", "5G", "20M", "HT", "2T", "104", "40", + "FCC", "5G", "20M", "HT", "2T", "108", "46", + "ETSI", "5G", "20M", "HT", "2T", "108", "40", + "MKK", "5G", "20M", "HT", "2T", "108", "40", + "FCC", "5G", "20M", "HT", "2T", "112", "46", + "ETSI", "5G", "20M", "HT", "2T", "112", "40", + "MKK", "5G", "20M", "HT", "2T", "112", "40", + "FCC", "5G", "20M", "HT", "2T", "116", "46", + "ETSI", "5G", "20M", "HT", "2T", "116", "40", + "MKK", "5G", "20M", "HT", "2T", "116", "40", + "FCC", "5G", "20M", "HT", "2T", "120", "46", + "ETSI", "5G", "20M", "HT", "2T", "120", "40", + "MKK", "5G", "20M", "HT", "2T", "120", "40", + "FCC", "5G", "20M", "HT", "2T", "124", "46", + "ETSI", "5G", "20M", "HT", "2T", "124", "40", + "MKK", "5G", "20M", "HT", "2T", "124", "40", + "FCC", "5G", "20M", "HT", "2T", "128", "46", + "ETSI", "5G", "20M", "HT", "2T", "128", "40", + "MKK", "5G", "20M", "HT", "2T", "128", "40", + "FCC", "5G", "20M", "HT", "2T", "132", "46", + "ETSI", "5G", "20M", "HT", "2T", "132", "40", + "MKK", "5G", "20M", "HT", "2T", "132", "40", + "FCC", "5G", "20M", "HT", "2T", "136", "46", + "ETSI", "5G", "20M", "HT", "2T", "136", "40", + "MKK", "5G", "20M", "HT", "2T", "136", "40", + "FCC", "5G", "20M", "HT", "2T", "140", "46", + "ETSI", "5G", "20M", "HT", "2T", "140", "40", + "MKK", "5G", "20M", "HT", "2T", "140", "40", + "FCC", "5G", "20M", "HT", "2T", "149", "46", + "ETSI", "5G", "20M", "HT", "2T", "149", "40", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "46", + "ETSI", "5G", "20M", "HT", "2T", "153", "40", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "46", + "ETSI", "5G", "20M", "HT", "2T", "157", "40", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "46", + "ETSI", "5G", "20M", "HT", "2T", "161", "40", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "46", + "ETSI", "5G", "20M", "HT", "2T", "165", "40", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "20M", "HT", "3T", "36", "46", + "ETSI", "5G", "20M", "HT", "3T", "36", "40", + "MKK", "5G", "20M", "HT", "3T", "36", "40", + "FCC", "5G", "20M", "HT", "3T", "40", "46", + "ETSI", "5G", "20M", "HT", "3T", "40", "40", + "MKK", "5G", "20M", "HT", "3T", "40", "40", + "FCC", "5G", "20M", "HT", "3T", "44", "46", + "ETSI", "5G", "20M", "HT", "3T", "44", "40", + "MKK", "5G", "20M", "HT", "3T", "44", "40", + "FCC", "5G", "20M", "HT", "3T", "48", "46", + "ETSI", "5G", "20M", "HT", "3T", "48", "40", + "MKK", "5G", "20M", "HT", "3T", "48", "40", + "FCC", "5G", "20M", "HT", "3T", "52", "46", + "ETSI", "5G", "20M", "HT", "3T", "52", "40", + "MKK", "5G", "20M", "HT", "3T", "52", "40", + "FCC", "5G", "20M", "HT", "3T", "56", "46", + "ETSI", "5G", "20M", "HT", "3T", "56", "40", + "MKK", "5G", "20M", "HT", "3T", "56", "40", + "FCC", "5G", "20M", "HT", "3T", "60", "46", + "ETSI", "5G", "20M", "HT", "3T", "60", "40", + "MKK", "5G", "20M", "HT", "3T", "60", "40", + "FCC", "5G", "20M", "HT", "3T", "64", "46", + "ETSI", "5G", "20M", "HT", "3T", "64", "40", + "MKK", "5G", "20M", "HT", "3T", "64", "40", + "FCC", "5G", "20M", "HT", "3T", "100", "46", + "ETSI", "5G", "20M", "HT", "3T", "100", "40", + "MKK", "5G", "20M", "HT", "3T", "100", "40", + "FCC", "5G", "20M", "HT", "3T", "104", "46", + "ETSI", "5G", "20M", "HT", "3T", "104", "40", + "MKK", "5G", "20M", "HT", "3T", "104", "40", + "FCC", "5G", "20M", "HT", "3T", "108", "46", + "ETSI", "5G", "20M", "HT", "3T", "108", "40", + "MKK", "5G", "20M", "HT", "3T", "108", "40", + "FCC", "5G", "20M", "HT", "3T", "112", "46", + "ETSI", "5G", "20M", "HT", "3T", "112", "40", + "MKK", "5G", "20M", "HT", "3T", "112", "40", + "FCC", "5G", "20M", "HT", "3T", "116", "46", + "ETSI", "5G", "20M", "HT", "3T", "116", "40", + "MKK", "5G", "20M", "HT", "3T", "116", "40", + "FCC", "5G", "20M", "HT", "3T", "120", "46", + "ETSI", "5G", "20M", "HT", "3T", "120", "40", + "MKK", "5G", "20M", "HT", "3T", "120", "40", + "FCC", "5G", "20M", "HT", "3T", "124", "46", + "ETSI", "5G", "20M", "HT", "3T", "124", "40", + "MKK", "5G", "20M", "HT", "3T", "124", "40", + "FCC", "5G", "20M", "HT", "3T", "128", "46", + "ETSI", "5G", "20M", "HT", "3T", "128", "40", + "MKK", "5G", "20M", "HT", "3T", "128", "40", + "FCC", "5G", "20M", "HT", "3T", "132", "46", + "ETSI", "5G", "20M", "HT", "3T", "132", "40", + "MKK", "5G", "20M", "HT", "3T", "132", "40", + "FCC", "5G", "20M", "HT", "3T", "136", "46", + "ETSI", "5G", "20M", "HT", "3T", "136", "40", + "MKK", "5G", "20M", "HT", "3T", "136", "40", + "FCC", "5G", "20M", "HT", "3T", "140", "46", + "ETSI", "5G", "20M", "HT", "3T", "140", "40", + "MKK", "5G", "20M", "HT", "3T", "140", "40", + "FCC", "5G", "20M", "HT", "3T", "149", "46", + "ETSI", "5G", "20M", "HT", "3T", "149", "40", + "MKK", "5G", "20M", "HT", "3T", "149", "63", + "FCC", "5G", "20M", "HT", "3T", "153", "46", + "ETSI", "5G", "20M", "HT", "3T", "153", "40", + "MKK", "5G", "20M", "HT", "3T", "153", "63", + "FCC", "5G", "20M", "HT", "3T", "157", "46", + "ETSI", "5G", "20M", "HT", "3T", "157", "40", + "MKK", "5G", "20M", "HT", "3T", "157", "63", + "FCC", "5G", "20M", "HT", "3T", "161", "46", + "ETSI", "5G", "20M", "HT", "3T", "161", "40", + "MKK", "5G", "20M", "HT", "3T", "161", "63", + "FCC", "5G", "20M", "HT", "3T", "165", "46", + "ETSI", "5G", "20M", "HT", "3T", "165", "40", + "MKK", "5G", "20M", "HT", "3T", "165", "63", + "FCC", "5G", "20M", "HT", "4T", "36", "46", + "ETSI", "5G", "20M", "HT", "4T", "36", "40", + "MKK", "5G", "20M", "HT", "4T", "36", "40", + "FCC", "5G", "20M", "HT", "4T", "40", "46", + "ETSI", "5G", "20M", "HT", "4T", "40", "40", + "MKK", "5G", "20M", "HT", "4T", "40", "40", + "FCC", "5G", "20M", "HT", "4T", "44", "46", + "ETSI", "5G", "20M", "HT", "4T", "44", "40", + "MKK", "5G", "20M", "HT", "4T", "44", "40", + "FCC", "5G", "20M", "HT", "4T", "48", "46", + "ETSI", "5G", "20M", "HT", "4T", "48", "40", + "MKK", "5G", "20M", "HT", "4T", "48", "40", + "FCC", "5G", "20M", "HT", "4T", "52", "46", + "ETSI", "5G", "20M", "HT", "4T", "52", "40", + "MKK", "5G", "20M", "HT", "4T", "52", "40", + "FCC", "5G", "20M", "HT", "4T", "56", "46", + "ETSI", "5G", "20M", "HT", "4T", "56", "40", + "MKK", "5G", "20M", "HT", "4T", "56", "40", + "FCC", "5G", "20M", "HT", "4T", "60", "46", + "ETSI", "5G", "20M", "HT", "4T", "60", "40", + "MKK", "5G", "20M", "HT", "4T", "60", "40", + "FCC", "5G", "20M", "HT", "4T", "64", "46", + "ETSI", "5G", "20M", "HT", "4T", "64", "40", + "MKK", "5G", "20M", "HT", "4T", "64", "40", + "FCC", "5G", "20M", "HT", "4T", "100", "46", + "ETSI", "5G", "20M", "HT", "4T", "100", "40", + "MKK", "5G", "20M", "HT", "4T", "100", "40", + "FCC", "5G", "20M", "HT", "4T", "104", "46", + "ETSI", "5G", "20M", "HT", "4T", "104", "40", + "MKK", "5G", "20M", "HT", "4T", "104", "40", + "FCC", "5G", "20M", "HT", "4T", "108", "46", + "ETSI", "5G", "20M", "HT", "4T", "108", "40", + "MKK", "5G", "20M", "HT", "4T", "108", "40", + "FCC", "5G", "20M", "HT", "4T", "112", "46", + "ETSI", "5G", "20M", "HT", "4T", "112", "40", + "MKK", "5G", "20M", "HT", "4T", "112", "40", + "FCC", "5G", "20M", "HT", "4T", "116", "46", + "ETSI", "5G", "20M", "HT", "4T", "116", "40", + "MKK", "5G", "20M", "HT", "4T", "116", "40", + "FCC", "5G", "20M", "HT", "4T", "120", "46", + "ETSI", "5G", "20M", "HT", "4T", "120", "40", + "MKK", "5G", "20M", "HT", "4T", "120", "40", + "FCC", "5G", "20M", "HT", "4T", "124", "46", + "ETSI", "5G", "20M", "HT", "4T", "124", "40", + "MKK", "5G", "20M", "HT", "4T", "124", "40", + "FCC", "5G", "20M", "HT", "4T", "128", "46", + "ETSI", "5G", "20M", "HT", "4T", "128", "40", + "MKK", "5G", "20M", "HT", "4T", "128", "40", + "FCC", "5G", "20M", "HT", "4T", "132", "46", + "ETSI", "5G", "20M", "HT", "4T", "132", "40", + "MKK", "5G", "20M", "HT", "4T", "132", "40", + "FCC", "5G", "20M", "HT", "4T", "136", "46", + "ETSI", "5G", "20M", "HT", "4T", "136", "40", + "MKK", "5G", "20M", "HT", "4T", "136", "40", + "FCC", "5G", "20M", "HT", "4T", "140", "46", + "ETSI", "5G", "20M", "HT", "4T", "140", "40", + "MKK", "5G", "20M", "HT", "4T", "140", "40", + "FCC", "5G", "20M", "HT", "4T", "149", "46", + "ETSI", "5G", "20M", "HT", "4T", "149", "40", + "MKK", "5G", "20M", "HT", "4T", "149", "63", + "FCC", "5G", "20M", "HT", "4T", "153", "46", + "ETSI", "5G", "20M", "HT", "4T", "153", "40", + "MKK", "5G", "20M", "HT", "4T", "153", "63", + "FCC", "5G", "20M", "HT", "4T", "157", "46", + "ETSI", "5G", "20M", "HT", "4T", "157", "40", + "MKK", "5G", "20M", "HT", "4T", "157", "63", + "FCC", "5G", "20M", "HT", "4T", "161", "46", + "ETSI", "5G", "20M", "HT", "4T", "161", "40", + "MKK", "5G", "20M", "HT", "4T", "161", "63", + "FCC", "5G", "20M", "HT", "4T", "165", "46", + "ETSI", "5G", "20M", "HT", "4T", "165", "40", + "MKK", "5G", "20M", "HT", "4T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "46", + "ETSI", "5G", "40M", "HT", "1T", "38", "40", + "MKK", "5G", "40M", "HT", "1T", "38", "40", + "FCC", "5G", "40M", "HT", "1T", "46", "46", + "ETSI", "5G", "40M", "HT", "1T", "46", "40", + "MKK", "5G", "40M", "HT", "1T", "46", "40", + "FCC", "5G", "40M", "HT", "1T", "54", "46", + "ETSI", "5G", "40M", "HT", "1T", "54", "40", + "MKK", "5G", "40M", "HT", "1T", "54", "40", + "FCC", "5G", "40M", "HT", "1T", "62", "46", + "ETSI", "5G", "40M", "HT", "1T", "62", "40", + "MKK", "5G", "40M", "HT", "1T", "62", "40", + "FCC", "5G", "40M", "HT", "1T", "102", "46", + "ETSI", "5G", "40M", "HT", "1T", "102", "40", + "MKK", "5G", "40M", "HT", "1T", "102", "40", + "FCC", "5G", "40M", "HT", "1T", "110", "46", + "ETSI", "5G", "40M", "HT", "1T", "110", "40", + "MKK", "5G", "40M", "HT", "1T", "110", "40", + "FCC", "5G", "40M", "HT", "1T", "118", "46", + "ETSI", "5G", "40M", "HT", "1T", "118", "40", + "MKK", "5G", "40M", "HT", "1T", "118", "40", + "FCC", "5G", "40M", "HT", "1T", "126", "46", + "ETSI", "5G", "40M", "HT", "1T", "126", "40", + "MKK", "5G", "40M", "HT", "1T", "126", "40", + "FCC", "5G", "40M", "HT", "1T", "134", "46", + "ETSI", "5G", "40M", "HT", "1T", "134", "40", + "MKK", "5G", "40M", "HT", "1T", "134", "40", + "FCC", "5G", "40M", "HT", "1T", "151", "46", + "ETSI", "5G", "40M", "HT", "1T", "151", "40", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "46", + "ETSI", "5G", "40M", "HT", "1T", "159", "40", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "46", + "ETSI", "5G", "40M", "HT", "2T", "38", "40", + "MKK", "5G", "40M", "HT", "2T", "38", "40", + "FCC", "5G", "40M", "HT", "2T", "46", "46", + "ETSI", "5G", "40M", "HT", "2T", "46", "40", + "MKK", "5G", "40M", "HT", "2T", "46", "40", + "FCC", "5G", "40M", "HT", "2T", "54", "46", + "ETSI", "5G", "40M", "HT", "2T", "54", "40", + "MKK", "5G", "40M", "HT", "2T", "54", "40", + "FCC", "5G", "40M", "HT", "2T", "62", "46", + "ETSI", "5G", "40M", "HT", "2T", "62", "40", + "MKK", "5G", "40M", "HT", "2T", "62", "40", + "FCC", "5G", "40M", "HT", "2T", "102", "46", + "ETSI", "5G", "40M", "HT", "2T", "102", "40", + "MKK", "5G", "40M", "HT", "2T", "102", "40", + "FCC", "5G", "40M", "HT", "2T", "110", "46", + "ETSI", "5G", "40M", "HT", "2T", "110", "40", + "MKK", "5G", "40M", "HT", "2T", "110", "40", + "FCC", "5G", "40M", "HT", "2T", "118", "46", + "ETSI", "5G", "40M", "HT", "2T", "118", "40", + "MKK", "5G", "40M", "HT", "2T", "118", "40", + "FCC", "5G", "40M", "HT", "2T", "126", "46", + "ETSI", "5G", "40M", "HT", "2T", "126", "40", + "MKK", "5G", "40M", "HT", "2T", "126", "40", + "FCC", "5G", "40M", "HT", "2T", "134", "46", + "ETSI", "5G", "40M", "HT", "2T", "134", "40", + "MKK", "5G", "40M", "HT", "2T", "134", "40", + "FCC", "5G", "40M", "HT", "2T", "151", "46", + "ETSI", "5G", "40M", "HT", "2T", "151", "40", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "46", + "ETSI", "5G", "40M", "HT", "2T", "159", "40", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "40M", "HT", "3T", "38", "46", + "ETSI", "5G", "40M", "HT", "3T", "38", "40", + "MKK", "5G", "40M", "HT", "3T", "38", "40", + "FCC", "5G", "40M", "HT", "3T", "46", "46", + "ETSI", "5G", "40M", "HT", "3T", "46", "40", + "MKK", "5G", "40M", "HT", "3T", "46", "40", + "FCC", "5G", "40M", "HT", "3T", "54", "46", + "ETSI", "5G", "40M", "HT", "3T", "54", "40", + "MKK", "5G", "40M", "HT", "3T", "54", "40", + "FCC", "5G", "40M", "HT", "3T", "62", "46", + "ETSI", "5G", "40M", "HT", "3T", "62", "40", + "MKK", "5G", "40M", "HT", "3T", "62", "40", + "FCC", "5G", "40M", "HT", "3T", "102", "46", + "ETSI", "5G", "40M", "HT", "3T", "102", "40", + "MKK", "5G", "40M", "HT", "3T", "102", "40", + "FCC", "5G", "40M", "HT", "3T", "110", "46", + "ETSI", "5G", "40M", "HT", "3T", "110", "40", + "MKK", "5G", "40M", "HT", "3T", "110", "40", + "FCC", "5G", "40M", "HT", "3T", "118", "46", + "ETSI", "5G", "40M", "HT", "3T", "118", "40", + "MKK", "5G", "40M", "HT", "3T", "118", "40", + "FCC", "5G", "40M", "HT", "3T", "126", "46", + "ETSI", "5G", "40M", "HT", "3T", "126", "40", + "MKK", "5G", "40M", "HT", "3T", "126", "40", + "FCC", "5G", "40M", "HT", "3T", "134", "46", + "ETSI", "5G", "40M", "HT", "3T", "134", "40", + "MKK", "5G", "40M", "HT", "3T", "134", "40", + "FCC", "5G", "40M", "HT", "3T", "151", "46", + "ETSI", "5G", "40M", "HT", "3T", "151", "40", + "MKK", "5G", "40M", "HT", "3T", "151", "63", + "FCC", "5G", "40M", "HT", "3T", "159", "46", + "ETSI", "5G", "40M", "HT", "3T", "159", "40", + "MKK", "5G", "40M", "HT", "3T", "159", "63", + "FCC", "5G", "40M", "HT", "4T", "38", "46", + "ETSI", "5G", "40M", "HT", "4T", "38", "40", + "MKK", "5G", "40M", "HT", "4T", "38", "40", + "FCC", "5G", "40M", "HT", "4T", "46", "46", + "ETSI", "5G", "40M", "HT", "4T", "46", "40", + "MKK", "5G", "40M", "HT", "4T", "46", "40", + "FCC", "5G", "40M", "HT", "4T", "54", "46", + "ETSI", "5G", "40M", "HT", "4T", "54", "40", + "MKK", "5G", "40M", "HT", "4T", "54", "40", + "FCC", "5G", "40M", "HT", "4T", "62", "46", + "ETSI", "5G", "40M", "HT", "4T", "62", "40", + "MKK", "5G", "40M", "HT", "4T", "62", "40", + "FCC", "5G", "40M", "HT", "4T", "102", "46", + "ETSI", "5G", "40M", "HT", "4T", "102", "40", + "MKK", "5G", "40M", "HT", "4T", "102", "40", + "FCC", "5G", "40M", "HT", "4T", "110", "46", + "ETSI", "5G", "40M", "HT", "4T", "110", "40", + "MKK", "5G", "40M", "HT", "4T", "110", "40", + "FCC", "5G", "40M", "HT", "4T", "118", "46", + "ETSI", "5G", "40M", "HT", "4T", "118", "40", + "MKK", "5G", "40M", "HT", "4T", "118", "40", + "FCC", "5G", "40M", "HT", "4T", "126", "46", + "ETSI", "5G", "40M", "HT", "4T", "126", "40", + "MKK", "5G", "40M", "HT", "4T", "126", "40", + "FCC", "5G", "40M", "HT", "4T", "134", "46", + "ETSI", "5G", "40M", "HT", "4T", "134", "40", + "MKK", "5G", "40M", "HT", "4T", "134", "40", + "FCC", "5G", "40M", "HT", "4T", "151", "46", + "ETSI", "5G", "40M", "HT", "4T", "151", "40", + "MKK", "5G", "40M", "HT", "4T", "151", "63", + "FCC", "5G", "40M", "HT", "4T", "159", "46", + "ETSI", "5G", "40M", "HT", "4T", "159", "40", + "MKK", "5G", "40M", "HT", "4T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "46", + "ETSI", "5G", "80M", "VHT", "1T", "42", "40", + "MKK", "5G", "80M", "VHT", "1T", "42", "40", + "FCC", "5G", "80M", "VHT", "1T", "58", "46", + "ETSI", "5G", "80M", "VHT", "1T", "58", "40", + "MKK", "5G", "80M", "VHT", "1T", "58", "40", + "FCC", "5G", "80M", "VHT", "1T", "106", "46", + "ETSI", "5G", "80M", "VHT", "1T", "106", "40", + "MKK", "5G", "80M", "VHT", "1T", "106", "40", + "FCC", "5G", "80M", "VHT", "1T", "122", "46", + "ETSI", "5G", "80M", "VHT", "1T", "122", "40", + "MKK", "5G", "80M", "VHT", "1T", "122", "40", + "FCC", "5G", "80M", "VHT", "1T", "155", "46", + "ETSI", "5G", "80M", "VHT", "1T", "155", "40", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "46", + "ETSI", "5G", "80M", "VHT", "2T", "42", "40", + "MKK", "5G", "80M", "VHT", "2T", "42", "40", + "FCC", "5G", "80M", "VHT", "2T", "58", "46", + "ETSI", "5G", "80M", "VHT", "2T", "58", "40", + "MKK", "5G", "80M", "VHT", "2T", "58", "40", + "FCC", "5G", "80M", "VHT", "2T", "106", "46", + "ETSI", "5G", "80M", "VHT", "2T", "106", "40", + "MKK", "5G", "80M", "VHT", "2T", "106", "40", + "FCC", "5G", "80M", "VHT", "2T", "122", "46", + "ETSI", "5G", "80M", "VHT", "2T", "122", "40", + "MKK", "5G", "80M", "VHT", "2T", "122", "40", + "FCC", "5G", "80M", "VHT", "2T", "155", "46", + "ETSI", "5G", "80M", "VHT", "2T", "155", "40", + "MKK", "5G", "80M", "VHT", "2T", "155", "63", + "FCC", "5G", "80M", "VHT", "3T", "42", "46", + "ETSI", "5G", "80M", "VHT", "3T", "42", "40", + "MKK", "5G", "80M", "VHT", "3T", "42", "40", + "FCC", "5G", "80M", "VHT", "3T", "58", "46", + "ETSI", "5G", "80M", "VHT", "3T", "58", "40", + "MKK", "5G", "80M", "VHT", "3T", "58", "40", + "FCC", "5G", "80M", "VHT", "3T", "106", "46", + "ETSI", "5G", "80M", "VHT", "3T", "106", "40", + "MKK", "5G", "80M", "VHT", "3T", "106", "40", + "FCC", "5G", "80M", "VHT", "3T", "122", "46", + "ETSI", "5G", "80M", "VHT", "3T", "122", "40", + "MKK", "5G", "80M", "VHT", "3T", "122", "40", + "FCC", "5G", "80M", "VHT", "3T", "155", "46", + "ETSI", "5G", "80M", "VHT", "3T", "155", "40", + "MKK", "5G", "80M", "VHT", "3T", "155", "63", + "FCC", "5G", "80M", "VHT", "4T", "42", "46", + "ETSI", "5G", "80M", "VHT", "4T", "42", "40", + "MKK", "5G", "80M", "VHT", "4T", "42", "40", + "FCC", "5G", "80M", "VHT", "4T", "58", "46", + "ETSI", "5G", "80M", "VHT", "4T", "58", "40", + "MKK", "5G", "80M", "VHT", "4T", "58", "40", + "FCC", "5G", "80M", "VHT", "4T", "106", "46", + "ETSI", "5G", "80M", "VHT", "4T", "106", "40", + "MKK", "5G", "80M", "VHT", "4T", "106", "40", + "FCC", "5G", "80M", "VHT", "4T", "122", "46", + "ETSI", "5G", "80M", "VHT", "4T", "122", "40", + "MKK", "5G", "80M", "VHT", "4T", "122", "40", + "FCC", "5G", "80M", "VHT", "4T", "155", "46", + "ETSI", "5G", "80M", "VHT", "4T", "155", "40", + "MKK", "5G", "80M", "VHT", "4T", "155", "63" +}; + +void +_odm_read_and_config_mp_8814a_txpwr_lmt_type3( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8814A_TXPWR_LMT_Type3)/sizeof(pu1Byte); + pu1Byte *Array = (pu1Byte *)Array_MP_8814A_TXPWR_LMT_Type3; + + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_TXPWR_LMT_Type3\n"); + + for (i = 0; i < ArrayLen; i += 7) { + pu1Byte regulation = Array[i]; + pu1Byte band = Array[i+1]; + pu1Byte bandwidth = Array[i+2]; + pu1Byte rate = Array[i+3]; + pu1Byte rfPath = Array[i+4]; + pu1Byte chnl = Array[i+5]; + pu1Byte val = Array[i+6]; + + odm_ConfigBB_TXPWR_LMT_8814A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); + } + +} + +****************************************************************************** +* TXPWR_LMT_Type5.TXT +****************************************************************************** + +const char *Array_MP_8814A_TXPWR_LMT_Type5[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "46", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "40", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "40", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "46", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "40", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "40", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "40", + "MKK", "2.4G", "20M", "HT", "1T", "01", "40", + "FCC", "2.4G", "20M", "HT", "1T", "02", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "40", + "MKK", "2.4G", "20M", "HT", "1T", "02", "40", + "FCC", "2.4G", "20M", "HT", "1T", "03", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "40", + "MKK", "2.4G", "20M", "HT", "1T", "03", "40", + "FCC", "2.4G", "20M", "HT", "1T", "04", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "40", + "MKK", "2.4G", "20M", "HT", "1T", "04", "40", + "FCC", "2.4G", "20M", "HT", "1T", "05", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "40", + "MKK", "2.4G", "20M", "HT", "1T", "05", "40", + "FCC", "2.4G", "20M", "HT", "1T", "06", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "40", + "MKK", "2.4G", "20M", "HT", "1T", "06", "40", + "FCC", "2.4G", "20M", "HT", "1T", "07", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "40", + "MKK", "2.4G", "20M", "HT", "1T", "07", "40", + "FCC", "2.4G", "20M", "HT", "1T", "08", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "40", + "MKK", "2.4G", "20M", "HT", "1T", "08", "40", + "FCC", "2.4G", "20M", "HT", "1T", "09", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "40", + "MKK", "2.4G", "20M", "HT", "1T", "09", "40", + "FCC", "2.4G", "20M", "HT", "1T", "10", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "40", + "MKK", "2.4G", "20M", "HT", "1T", "10", "40", + "FCC", "2.4G", "20M", "HT", "1T", "11", "46", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "40", + "MKK", "2.4G", "20M", "HT", "1T", "11", "40", + "FCC", "2.4G", "20M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "40", + "MKK", "2.4G", "20M", "HT", "1T", "12", "40", + "FCC", "2.4G", "20M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "40", + "MKK", "2.4G", "20M", "HT", "1T", "13", "40", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "40", + "MKK", "2.4G", "20M", "HT", "2T", "01", "40", + "FCC", "2.4G", "20M", "HT", "2T", "02", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "40", + "MKK", "2.4G", "20M", "HT", "2T", "02", "40", + "FCC", "2.4G", "20M", "HT", "2T", "03", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "40", + "MKK", "2.4G", "20M", "HT", "2T", "03", "40", + "FCC", "2.4G", "20M", "HT", "2T", "04", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "40", + "MKK", "2.4G", "20M", "HT", "2T", "04", "40", + "FCC", "2.4G", "20M", "HT", "2T", "05", "46", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "40", + "MKK", "2.4G", "20M", "HT", "2T", "05", "40", + "FCC", "2.4G", "20M", "HT", "2T", "06", "46", + "ETSI", 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"HT", "3T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "12", "40", + "MKK", "2.4G", "40M", "HT", "3T", "12", "40", + "FCC", "2.4G", "40M", "HT", "3T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "13", "40", + "MKK", "2.4G", "40M", "HT", "3T", "13", "40", + "FCC", "2.4G", "40M", "HT", "3T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "3T", "14", "63", + "MKK", "2.4G", "40M", "HT", "3T", "14", "63", + "FCC", "2.4G", "40M", "HT", "4T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "01", "63", + "MKK", "2.4G", "40M", "HT", "4T", "01", "63", + "FCC", "2.4G", "40M", "HT", "4T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "02", "63", + "MKK", "2.4G", "40M", "HT", "4T", "02", "63", + "FCC", "2.4G", "40M", "HT", "4T", "03", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "03", "40", + "MKK", "2.4G", "40M", "HT", "4T", "03", "40", + "FCC", "2.4G", "40M", "HT", "4T", "04", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "04", "40", + "MKK", "2.4G", "40M", "HT", "4T", "04", "40", + "FCC", "2.4G", "40M", "HT", "4T", "05", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "05", "40", + "MKK", "2.4G", "40M", "HT", "4T", "05", "40", + "FCC", "2.4G", "40M", "HT", "4T", "06", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "06", "40", + "MKK", "2.4G", "40M", "HT", "4T", "06", "40", + "FCC", "2.4G", "40M", "HT", "4T", "07", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "07", "40", + "MKK", "2.4G", "40M", "HT", "4T", "07", "40", + "FCC", "2.4G", "40M", "HT", "4T", "08", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "08", "40", + "MKK", "2.4G", "40M", "HT", "4T", "08", "40", + "FCC", "2.4G", "40M", "HT", "4T", "09", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "09", "40", + "MKK", "2.4G", "40M", "HT", "4T", "09", "40", + "FCC", "2.4G", "40M", "HT", "4T", "10", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "10", "40", + "MKK", "2.4G", "40M", "HT", "4T", "10", "40", + "FCC", "2.4G", "40M", "HT", "4T", "11", "46", + "ETSI", "2.4G", "40M", "HT", "4T", "11", "40", + "MKK", "2.4G", "40M", "HT", "4T", "11", "40", + "FCC", "2.4G", "40M", "HT", "4T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "12", "40", + "MKK", "2.4G", "40M", "HT", "4T", "12", "40", + "FCC", "2.4G", "40M", "HT", "4T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "13", "40", + "MKK", "2.4G", "40M", "HT", "4T", "13", "40", + "FCC", "2.4G", "40M", "HT", "4T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "4T", "14", "63", + "MKK", "2.4G", "40M", "HT", "4T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "40", + "MKK", "5G", "20M", "OFDM", "1T", "36", "40", + "FCC", "5G", "20M", "OFDM", "1T", "40", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "40", + "MKK", "5G", "20M", "OFDM", "1T", "40", "40", + "FCC", "5G", "20M", "OFDM", "1T", "44", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "40", + "MKK", "5G", "20M", "OFDM", "1T", "44", "40", + "FCC", "5G", "20M", "OFDM", "1T", "48", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "40", + "MKK", "5G", "20M", "OFDM", "1T", "48", "40", + "FCC", "5G", "20M", "OFDM", "1T", "52", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "40", + "MKK", "5G", "20M", "OFDM", "1T", "52", "40", + "FCC", "5G", "20M", "OFDM", "1T", "56", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "40", + "MKK", "5G", "20M", "OFDM", "1T", "56", "40", + "FCC", "5G", "20M", "OFDM", "1T", "60", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "40", + "MKK", "5G", "20M", "OFDM", "1T", "60", "40", + "FCC", "5G", "20M", "OFDM", "1T", "64", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "40", + "MKK", "5G", "20M", "OFDM", "1T", "64", "40", + "FCC", "5G", "20M", "OFDM", "1T", "100", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "40", + "MKK", "5G", "20M", "OFDM", "1T", "100", "40", + "FCC", "5G", "20M", "OFDM", "1T", "104", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "40", + "MKK", "5G", "20M", "OFDM", "1T", "104", "40", + "FCC", "5G", "20M", "OFDM", "1T", "108", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "40", + "MKK", "5G", "20M", "OFDM", "1T", "108", "40", + "FCC", "5G", "20M", "OFDM", "1T", "112", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "40", + "MKK", "5G", "20M", "OFDM", "1T", "112", "40", + "FCC", "5G", "20M", "OFDM", "1T", "116", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "40", + "MKK", "5G", "20M", "OFDM", "1T", "116", "40", + "FCC", "5G", "20M", "OFDM", "1T", "120", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "40", + "MKK", "5G", "20M", "OFDM", "1T", "120", "40", + "FCC", "5G", "20M", "OFDM", "1T", "124", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "40", + "MKK", "5G", "20M", "OFDM", "1T", "124", "40", + "FCC", "5G", "20M", "OFDM", "1T", "128", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "40", + "MKK", "5G", "20M", "OFDM", "1T", "128", "40", + "FCC", "5G", "20M", "OFDM", "1T", "132", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "40", + "MKK", "5G", "20M", "OFDM", "1T", "132", "40", + "FCC", "5G", "20M", "OFDM", "1T", "136", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "40", + "MKK", "5G", "20M", "OFDM", "1T", "136", "40", + "FCC", "5G", "20M", "OFDM", "1T", "140", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "40", + "MKK", "5G", "20M", "OFDM", "1T", "140", "40", + "FCC", "5G", "20M", "OFDM", "1T", "149", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "40", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "40", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "40", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "40", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "46", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "40", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "46", + "ETSI", "5G", "20M", "HT", "1T", "36", "40", + "MKK", "5G", "20M", "HT", "1T", "36", "40", + "FCC", "5G", "20M", "HT", "1T", "40", "46", + "ETSI", "5G", "20M", "HT", "1T", "40", "40", + "MKK", "5G", "20M", "HT", "1T", "40", "40", + "FCC", "5G", "20M", "HT", "1T", "44", "46", + "ETSI", "5G", "20M", "HT", "1T", "44", "40", + "MKK", "5G", "20M", "HT", "1T", "44", "40", + "FCC", "5G", "20M", "HT", "1T", "48", "46", + "ETSI", "5G", "20M", "HT", "1T", "48", "40", + "MKK", "5G", "20M", "HT", "1T", "48", "40", + "FCC", "5G", "20M", "HT", "1T", "52", "46", + "ETSI", "5G", "20M", "HT", "1T", "52", "40", + "MKK", "5G", "20M", "HT", "1T", "52", "40", + "FCC", "5G", "20M", "HT", "1T", "56", "46", + "ETSI", "5G", "20M", "HT", "1T", "56", "40", + "MKK", "5G", "20M", "HT", "1T", "56", "40", + "FCC", "5G", "20M", "HT", "1T", "60", "46", + "ETSI", "5G", "20M", "HT", "1T", "60", "40", + "MKK", "5G", "20M", "HT", "1T", "60", "40", + "FCC", "5G", "20M", "HT", "1T", "64", "46", + "ETSI", "5G", "20M", "HT", "1T", "64", "40", + "MKK", "5G", "20M", "HT", "1T", "64", "40", + "FCC", "5G", "20M", "HT", "1T", "100", "46", + "ETSI", "5G", "20M", "HT", "1T", "100", "40", + "MKK", "5G", "20M", "HT", "1T", "100", "40", + "FCC", "5G", "20M", "HT", "1T", "104", "46", + "ETSI", "5G", "20M", "HT", "1T", "104", "40", + "MKK", "5G", "20M", "HT", "1T", "104", "40", + "FCC", "5G", "20M", "HT", "1T", "108", "46", + "ETSI", "5G", "20M", "HT", "1T", "108", "40", + "MKK", "5G", "20M", "HT", "1T", "108", "40", + "FCC", "5G", "20M", "HT", "1T", "112", "46", + "ETSI", "5G", "20M", "HT", "1T", "112", "40", + "MKK", "5G", "20M", "HT", "1T", "112", "40", + "FCC", "5G", "20M", "HT", "1T", "116", "46", + "ETSI", "5G", "20M", "HT", "1T", "116", "40", + "MKK", "5G", "20M", "HT", "1T", "116", "40", + "FCC", "5G", "20M", "HT", "1T", "120", "46", + "ETSI", "5G", "20M", "HT", "1T", "120", "40", + "MKK", "5G", "20M", "HT", "1T", "120", "40", + "FCC", "5G", "20M", "HT", "1T", "124", "46", + "ETSI", "5G", "20M", "HT", "1T", "124", "40", + "MKK", "5G", "20M", "HT", "1T", "124", "40", + "FCC", "5G", "20M", "HT", "1T", "128", "46", + "ETSI", "5G", "20M", "HT", "1T", "128", "40", + "MKK", "5G", "20M", "HT", "1T", "128", "40", + "FCC", "5G", "20M", "HT", "1T", "132", "46", + "ETSI", "5G", "20M", "HT", "1T", "132", "40", + "MKK", "5G", "20M", "HT", "1T", "132", "40", + "FCC", "5G", "20M", "HT", "1T", "136", "46", + "ETSI", "5G", "20M", "HT", "1T", "136", "40", + "MKK", "5G", "20M", "HT", "1T", "136", "40", + "FCC", "5G", "20M", "HT", "1T", "140", "46", + "ETSI", "5G", "20M", "HT", "1T", "140", "40", + "MKK", "5G", "20M", "HT", "1T", "140", "40", + "FCC", "5G", "20M", "HT", "1T", "149", "46", + "ETSI", "5G", "20M", "HT", "1T", "149", "40", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "46", + "ETSI", "5G", "20M", "HT", "1T", "153", "40", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "46", + "ETSI", "5G", "20M", "HT", "1T", "157", "40", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "46", + "ETSI", "5G", "20M", "HT", "1T", "161", "40", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "46", + "ETSI", "5G", "20M", "HT", "1T", "165", "40", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "46", + "ETSI", "5G", "20M", "HT", "2T", "36", "40", + "MKK", "5G", "20M", "HT", "2T", "36", "40", + "FCC", "5G", "20M", "HT", "2T", "40", "46", + "ETSI", "5G", "20M", "HT", "2T", "40", "40", + "MKK", "5G", "20M", "HT", "2T", "40", "40", + "FCC", "5G", "20M", "HT", "2T", "44", "46", + "ETSI", "5G", "20M", "HT", "2T", "44", "40", + "MKK", "5G", "20M", "HT", "2T", "44", "40", + "FCC", "5G", "20M", "HT", "2T", "48", "46", + "ETSI", "5G", "20M", "HT", "2T", "48", "40", + "MKK", "5G", "20M", "HT", "2T", "48", "40", + "FCC", "5G", "20M", "HT", "2T", "52", "46", + "ETSI", "5G", "20M", "HT", "2T", "52", "40", + "MKK", "5G", "20M", "HT", "2T", "52", "40", + "FCC", "5G", "20M", "HT", "2T", "56", "46", + "ETSI", "5G", "20M", "HT", "2T", "56", "40", + "MKK", "5G", "20M", "HT", "2T", "56", "40", + "FCC", "5G", "20M", "HT", "2T", "60", "46", + "ETSI", "5G", "20M", "HT", "2T", "60", "40", + "MKK", "5G", "20M", "HT", "2T", "60", "40", + "FCC", "5G", "20M", "HT", "2T", "64", "46", + "ETSI", "5G", "20M", "HT", "2T", "64", "40", + "MKK", "5G", "20M", "HT", "2T", "64", "40", + "FCC", "5G", "20M", "HT", "2T", "100", "46", + "ETSI", "5G", "20M", "HT", "2T", "100", "40", + "MKK", "5G", "20M", "HT", "2T", "100", "40", + "FCC", "5G", "20M", "HT", "2T", "104", "46", + "ETSI", "5G", "20M", "HT", "2T", "104", "40", + "MKK", "5G", "20M", "HT", "2T", "104", "40", + "FCC", "5G", "20M", "HT", "2T", "108", "46", + "ETSI", "5G", "20M", "HT", "2T", "108", "40", + "MKK", "5G", "20M", "HT", "2T", "108", "40", + "FCC", "5G", "20M", "HT", "2T", "112", "46", + "ETSI", "5G", "20M", "HT", "2T", "112", "40", + "MKK", "5G", "20M", "HT", "2T", "112", "40", + "FCC", "5G", "20M", "HT", "2T", "116", "46", + "ETSI", "5G", "20M", "HT", "2T", "116", "40", + "MKK", "5G", "20M", "HT", "2T", "116", "40", + "FCC", "5G", "20M", "HT", "2T", "120", "46", + "ETSI", "5G", "20M", "HT", "2T", "120", "40", + "MKK", "5G", "20M", "HT", "2T", "120", "40", + "FCC", "5G", "20M", "HT", "2T", "124", "46", + "ETSI", "5G", "20M", "HT", "2T", "124", "40", + "MKK", "5G", "20M", "HT", "2T", "124", "40", + "FCC", "5G", "20M", "HT", "2T", "128", "46", + "ETSI", "5G", "20M", "HT", "2T", "128", "40", + "MKK", "5G", "20M", "HT", "2T", "128", "40", + "FCC", "5G", "20M", "HT", "2T", "132", "46", + "ETSI", "5G", "20M", "HT", "2T", "132", "40", + "MKK", "5G", "20M", "HT", "2T", "132", "40", + "FCC", "5G", "20M", "HT", "2T", "136", "46", + "ETSI", "5G", "20M", "HT", "2T", "136", "40", + "MKK", "5G", "20M", "HT", "2T", "136", "40", + "FCC", "5G", "20M", "HT", "2T", "140", "46", + "ETSI", "5G", "20M", "HT", "2T", "140", "40", + "MKK", "5G", "20M", "HT", "2T", "140", "40", + "FCC", "5G", "20M", "HT", "2T", "149", "46", + "ETSI", "5G", "20M", "HT", "2T", "149", "40", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "46", + "ETSI", "5G", "20M", "HT", "2T", "153", "40", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "46", + "ETSI", "5G", "20M", "HT", "2T", "157", "40", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "46", + "ETSI", "5G", "20M", "HT", "2T", "161", "40", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "46", + "ETSI", "5G", "20M", "HT", "2T", "165", "40", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "20M", "HT", "3T", "36", "46", + "ETSI", "5G", "20M", "HT", "3T", "36", "40", + "MKK", "5G", "20M", "HT", "3T", "36", "40", + "FCC", "5G", "20M", "HT", "3T", "40", "46", + "ETSI", "5G", "20M", "HT", "3T", "40", "40", + "MKK", "5G", "20M", "HT", "3T", "40", "40", + "FCC", "5G", "20M", "HT", "3T", "44", "46", + "ETSI", "5G", "20M", "HT", "3T", "44", "40", + "MKK", "5G", "20M", "HT", "3T", "44", "40", + "FCC", "5G", "20M", "HT", "3T", "48", "46", + "ETSI", "5G", "20M", "HT", "3T", "48", "40", + "MKK", "5G", "20M", "HT", "3T", "48", "40", + "FCC", "5G", "20M", "HT", "3T", "52", "46", + "ETSI", "5G", "20M", "HT", "3T", "52", "40", + "MKK", "5G", "20M", "HT", "3T", "52", "40", + "FCC", "5G", "20M", "HT", "3T", "56", "46", + "ETSI", "5G", "20M", "HT", "3T", "56", "40", + "MKK", "5G", "20M", "HT", "3T", "56", "40", + "FCC", "5G", "20M", "HT", "3T", "60", "46", + "ETSI", "5G", "20M", "HT", "3T", "60", "40", + "MKK", "5G", "20M", "HT", "3T", "60", "40", + "FCC", "5G", "20M", "HT", "3T", "64", "46", + "ETSI", "5G", "20M", "HT", "3T", "64", "40", + "MKK", "5G", "20M", "HT", "3T", "64", "40", + "FCC", "5G", "20M", "HT", "3T", "100", "46", + "ETSI", "5G", "20M", "HT", "3T", "100", "40", + "MKK", "5G", "20M", "HT", "3T", "100", "40", + "FCC", "5G", "20M", "HT", "3T", "104", "46", + "ETSI", "5G", "20M", "HT", "3T", "104", "40", + "MKK", "5G", "20M", "HT", "3T", "104", "40", + "FCC", "5G", "20M", "HT", "3T", "108", "46", + "ETSI", "5G", "20M", "HT", "3T", "108", "40", + "MKK", "5G", "20M", "HT", "3T", "108", "40", + "FCC", "5G", "20M", "HT", "3T", "112", "46", + "ETSI", "5G", "20M", "HT", "3T", "112", "40", + "MKK", "5G", "20M", "HT", "3T", "112", "40", + "FCC", "5G", "20M", "HT", "3T", "116", "46", + "ETSI", "5G", "20M", "HT", "3T", "116", "40", + "MKK", "5G", "20M", "HT", "3T", "116", "40", + "FCC", "5G", "20M", "HT", "3T", "120", "46", + "ETSI", "5G", "20M", "HT", "3T", "120", "40", + "MKK", "5G", "20M", "HT", "3T", "120", "40", + "FCC", "5G", "20M", "HT", "3T", "124", "46", + "ETSI", "5G", "20M", "HT", "3T", "124", "40", + "MKK", "5G", "20M", "HT", "3T", "124", "40", + "FCC", "5G", "20M", "HT", "3T", "128", "46", + "ETSI", "5G", "20M", "HT", "3T", "128", "40", + "MKK", "5G", "20M", "HT", "3T", "128", "40", + "FCC", "5G", "20M", "HT", "3T", "132", "46", + "ETSI", "5G", "20M", "HT", "3T", "132", "40", + "MKK", "5G", "20M", "HT", "3T", "132", "40", + "FCC", "5G", "20M", "HT", "3T", "136", "46", + "ETSI", "5G", "20M", "HT", "3T", "136", "40", + "MKK", "5G", "20M", "HT", "3T", "136", "40", + "FCC", "5G", "20M", "HT", "3T", "140", "46", + "ETSI", "5G", "20M", "HT", "3T", "140", "40", + "MKK", "5G", "20M", "HT", "3T", "140", "40", + "FCC", "5G", "20M", "HT", "3T", "149", "46", + "ETSI", "5G", "20M", "HT", "3T", "149", "40", + "MKK", "5G", "20M", "HT", "3T", "149", "63", + "FCC", "5G", "20M", "HT", "3T", "153", "46", + "ETSI", "5G", "20M", "HT", "3T", "153", "40", + "MKK", "5G", "20M", "HT", "3T", "153", "63", + "FCC", "5G", "20M", "HT", "3T", "157", "46", + "ETSI", "5G", "20M", "HT", "3T", "157", "40", + "MKK", "5G", "20M", "HT", "3T", "157", "63", + "FCC", "5G", "20M", "HT", "3T", "161", "46", + "ETSI", "5G", "20M", "HT", "3T", "161", "40", + "MKK", "5G", "20M", "HT", "3T", "161", "63", + "FCC", "5G", "20M", "HT", "3T", "165", "46", + "ETSI", "5G", "20M", "HT", "3T", "165", "40", + "MKK", "5G", "20M", "HT", "3T", "165", "63", + "FCC", "5G", "20M", "HT", "4T", "36", "46", + "ETSI", "5G", "20M", "HT", "4T", "36", "40", + "MKK", "5G", "20M", "HT", "4T", "36", "40", + "FCC", "5G", "20M", "HT", "4T", "40", "46", + "ETSI", "5G", "20M", "HT", "4T", "40", "40", + "MKK", "5G", "20M", "HT", "4T", "40", "40", + "FCC", "5G", "20M", "HT", "4T", "44", "46", + "ETSI", "5G", "20M", "HT", "4T", "44", "40", + "MKK", "5G", "20M", "HT", "4T", "44", "40", + "FCC", "5G", "20M", "HT", "4T", "48", "46", + "ETSI", "5G", "20M", "HT", "4T", "48", "40", + "MKK", "5G", "20M", "HT", "4T", "48", "40", + "FCC", "5G", "20M", "HT", "4T", "52", "46", + "ETSI", "5G", "20M", "HT", "4T", "52", "40", + "MKK", "5G", "20M", "HT", "4T", "52", "40", + "FCC", "5G", "20M", "HT", "4T", "56", "46", + "ETSI", "5G", "20M", "HT", "4T", "56", "40", + "MKK", "5G", "20M", "HT", "4T", "56", "40", + "FCC", "5G", "20M", "HT", "4T", "60", "46", + "ETSI", "5G", "20M", "HT", "4T", "60", "40", + "MKK", "5G", "20M", "HT", "4T", "60", "40", + "FCC", "5G", "20M", "HT", "4T", "64", "46", + "ETSI", "5G", "20M", "HT", "4T", "64", "40", + "MKK", "5G", "20M", "HT", "4T", "64", "40", + "FCC", "5G", "20M", "HT", "4T", "100", "46", + "ETSI", "5G", "20M", "HT", "4T", "100", "40", + "MKK", "5G", "20M", "HT", "4T", "100", "40", + "FCC", "5G", "20M", "HT", "4T", "104", "46", + "ETSI", "5G", "20M", "HT", "4T", "104", "40", + "MKK", "5G", "20M", "HT", "4T", "104", "40", + "FCC", "5G", "20M", "HT", "4T", "108", "46", + "ETSI", "5G", "20M", "HT", "4T", "108", "40", + "MKK", "5G", "20M", "HT", "4T", "108", "40", + "FCC", "5G", "20M", "HT", "4T", "112", "46", + "ETSI", "5G", "20M", "HT", "4T", "112", "40", + "MKK", "5G", "20M", "HT", "4T", "112", "40", + "FCC", "5G", "20M", "HT", "4T", "116", "46", + "ETSI", "5G", "20M", "HT", "4T", "116", "40", + "MKK", "5G", "20M", "HT", "4T", "116", "40", + "FCC", "5G", "20M", "HT", "4T", "120", "46", + "ETSI", "5G", "20M", "HT", "4T", "120", "40", + "MKK", "5G", "20M", "HT", "4T", "120", "40", + "FCC", "5G", "20M", "HT", "4T", "124", "46", + "ETSI", "5G", "20M", "HT", "4T", "124", "40", + "MKK", "5G", "20M", "HT", "4T", "124", "40", + "FCC", "5G", "20M", "HT", "4T", "128", "46", + "ETSI", "5G", "20M", "HT", "4T", "128", "40", + "MKK", "5G", "20M", "HT", "4T", "128", "40", + "FCC", "5G", "20M", "HT", "4T", "132", "46", + "ETSI", "5G", "20M", "HT", "4T", "132", "40", + "MKK", "5G", "20M", "HT", "4T", "132", "40", + "FCC", "5G", "20M", "HT", "4T", "136", "46", + "ETSI", "5G", "20M", "HT", "4T", "136", "40", + "MKK", "5G", "20M", "HT", "4T", "136", "40", + "FCC", "5G", "20M", "HT", "4T", "140", "46", + "ETSI", "5G", "20M", "HT", "4T", "140", "40", + "MKK", "5G", "20M", "HT", "4T", "140", "40", + "FCC", "5G", "20M", "HT", "4T", "149", "46", + "ETSI", "5G", "20M", "HT", "4T", "149", "40", + "MKK", "5G", "20M", "HT", "4T", "149", "63", + "FCC", "5G", "20M", "HT", "4T", "153", "46", + "ETSI", "5G", "20M", "HT", "4T", "153", "40", + "MKK", "5G", "20M", "HT", "4T", "153", "63", + "FCC", "5G", "20M", "HT", "4T", "157", "46", + "ETSI", "5G", "20M", "HT", "4T", "157", "40", + "MKK", "5G", "20M", "HT", "4T", "157", "63", + "FCC", "5G", "20M", "HT", "4T", "161", "46", + "ETSI", "5G", "20M", "HT", "4T", "161", "40", + "MKK", "5G", "20M", "HT", "4T", "161", "63", + "FCC", "5G", "20M", "HT", "4T", "165", "46", + "ETSI", "5G", "20M", "HT", "4T", "165", "40", + "MKK", "5G", "20M", "HT", "4T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "46", + "ETSI", "5G", "40M", "HT", "1T", "38", "40", + "MKK", "5G", "40M", "HT", "1T", "38", "40", + "FCC", "5G", "40M", "HT", "1T", "46", "46", + "ETSI", "5G", "40M", "HT", "1T", "46", "40", + "MKK", "5G", "40M", "HT", "1T", "46", "40", + "FCC", "5G", "40M", "HT", "1T", "54", "46", + "ETSI", "5G", "40M", "HT", "1T", "54", "40", + "MKK", "5G", "40M", "HT", "1T", "54", "40", + "FCC", "5G", "40M", "HT", "1T", "62", "46", + "ETSI", "5G", "40M", "HT", "1T", "62", "40", + "MKK", "5G", "40M", "HT", "1T", "62", "40", + "FCC", "5G", "40M", "HT", "1T", "102", "46", + "ETSI", "5G", "40M", "HT", "1T", "102", "40", + "MKK", "5G", "40M", "HT", "1T", "102", "40", + "FCC", "5G", "40M", "HT", "1T", "110", "46", + "ETSI", "5G", "40M", "HT", "1T", "110", "40", + "MKK", "5G", "40M", "HT", "1T", "110", "40", + "FCC", "5G", "40M", "HT", "1T", "118", "46", + "ETSI", "5G", "40M", "HT", "1T", "118", "40", + "MKK", "5G", "40M", "HT", "1T", "118", "40", + "FCC", "5G", "40M", "HT", "1T", "126", "46", + "ETSI", "5G", "40M", "HT", "1T", "126", "40", + "MKK", "5G", "40M", "HT", "1T", "126", "40", + "FCC", "5G", "40M", "HT", "1T", "134", "46", + "ETSI", "5G", "40M", "HT", "1T", "134", "40", + "MKK", "5G", "40M", "HT", "1T", "134", "40", + "FCC", "5G", "40M", "HT", "1T", "151", "46", + "ETSI", "5G", "40M", "HT", "1T", "151", "40", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "46", + "ETSI", "5G", "40M", "HT", "1T", "159", "40", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "46", + "ETSI", "5G", "40M", "HT", "2T", "38", "40", + "MKK", "5G", "40M", "HT", "2T", "38", "40", + "FCC", "5G", "40M", "HT", "2T", "46", "46", + "ETSI", "5G", "40M", "HT", "2T", "46", "40", + "MKK", "5G", "40M", "HT", "2T", "46", "40", + "FCC", "5G", "40M", "HT", "2T", "54", "46", + "ETSI", "5G", "40M", "HT", "2T", "54", "40", + "MKK", "5G", "40M", "HT", "2T", "54", "40", + "FCC", "5G", "40M", "HT", "2T", "62", "46", + "ETSI", "5G", "40M", "HT", "2T", "62", "40", + "MKK", "5G", "40M", "HT", "2T", "62", "40", + "FCC", "5G", "40M", "HT", "2T", "102", "46", + "ETSI", "5G", "40M", "HT", "2T", "102", "40", + "MKK", "5G", "40M", "HT", "2T", "102", "40", + "FCC", "5G", "40M", "HT", "2T", "110", "46", + "ETSI", "5G", "40M", "HT", "2T", "110", "40", + "MKK", "5G", "40M", "HT", "2T", "110", "40", + "FCC", "5G", "40M", "HT", "2T", "118", "46", + "ETSI", "5G", "40M", "HT", "2T", "118", "40", + "MKK", "5G", "40M", "HT", "2T", "118", "40", + "FCC", "5G", "40M", "HT", "2T", "126", "46", + "ETSI", "5G", "40M", "HT", "2T", "126", "40", + "MKK", "5G", "40M", "HT", "2T", "126", "40", + "FCC", "5G", "40M", "HT", "2T", "134", "46", + "ETSI", "5G", "40M", "HT", "2T", "134", "40", + "MKK", "5G", "40M", "HT", "2T", "134", "40", + "FCC", "5G", "40M", "HT", "2T", "151", "46", + "ETSI", "5G", "40M", "HT", "2T", "151", "40", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "46", + "ETSI", "5G", "40M", "HT", "2T", "159", "40", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "40M", "HT", "3T", "38", "46", + "ETSI", "5G", "40M", "HT", "3T", "38", "40", + "MKK", "5G", "40M", "HT", "3T", "38", "40", + "FCC", "5G", "40M", "HT", "3T", "46", "46", + "ETSI", "5G", "40M", "HT", "3T", "46", "40", + "MKK", "5G", "40M", "HT", "3T", "46", "40", + "FCC", "5G", "40M", "HT", "3T", "54", "46", + "ETSI", "5G", "40M", "HT", "3T", "54", "40", + "MKK", "5G", "40M", "HT", "3T", "54", "40", + "FCC", "5G", "40M", "HT", "3T", "62", "46", + "ETSI", "5G", "40M", "HT", "3T", "62", "40", + "MKK", "5G", "40M", "HT", "3T", "62", "40", + "FCC", "5G", "40M", "HT", "3T", "102", "46", + "ETSI", "5G", "40M", "HT", "3T", "102", "40", + "MKK", "5G", "40M", "HT", "3T", "102", "40", + "FCC", "5G", "40M", "HT", "3T", "110", "46", + "ETSI", "5G", "40M", "HT", "3T", "110", "40", + "MKK", "5G", "40M", "HT", "3T", "110", "40", + "FCC", "5G", "40M", "HT", "3T", "118", "46", + "ETSI", "5G", "40M", "HT", "3T", "118", "40", + "MKK", "5G", "40M", "HT", "3T", "118", "40", + "FCC", "5G", "40M", "HT", "3T", "126", "46", + "ETSI", "5G", "40M", "HT", "3T", "126", "40", + "MKK", "5G", "40M", "HT", "3T", "126", "40", + "FCC", "5G", "40M", "HT", "3T", "134", "46", + "ETSI", "5G", "40M", "HT", "3T", "134", "40", + "MKK", "5G", "40M", "HT", "3T", "134", "40", + "FCC", "5G", "40M", "HT", "3T", "151", "46", + "ETSI", "5G", "40M", "HT", "3T", "151", "40", + "MKK", "5G", "40M", "HT", "3T", "151", "63", + "FCC", "5G", "40M", "HT", "3T", "159", "46", + "ETSI", "5G", "40M", "HT", "3T", "159", "40", + "MKK", "5G", "40M", "HT", "3T", "159", "63", + "FCC", "5G", "40M", "HT", "4T", "38", "46", + "ETSI", "5G", "40M", "HT", "4T", "38", "40", + "MKK", "5G", "40M", "HT", "4T", "38", "40", + "FCC", "5G", "40M", "HT", "4T", "46", "46", + "ETSI", "5G", "40M", "HT", "4T", "46", "40", + "MKK", "5G", "40M", "HT", "4T", "46", "40", + "FCC", "5G", "40M", "HT", "4T", "54", "46", + "ETSI", "5G", "40M", "HT", "4T", "54", "40", + "MKK", "5G", "40M", "HT", "4T", "54", "40", + "FCC", "5G", "40M", "HT", "4T", "62", "46", + "ETSI", "5G", "40M", "HT", "4T", "62", "40", + "MKK", "5G", "40M", "HT", "4T", "62", "40", + "FCC", "5G", "40M", "HT", "4T", "102", "46", + "ETSI", "5G", "40M", "HT", "4T", "102", "40", + "MKK", "5G", "40M", "HT", "4T", "102", "40", + "FCC", "5G", "40M", "HT", "4T", "110", "46", + "ETSI", "5G", "40M", "HT", "4T", "110", "40", + "MKK", "5G", "40M", "HT", "4T", "110", "40", + "FCC", "5G", "40M", "HT", "4T", "118", "46", + "ETSI", "5G", "40M", "HT", "4T", "118", "40", + "MKK", "5G", "40M", "HT", "4T", "118", "40", + "FCC", "5G", "40M", "HT", "4T", "126", "46", + "ETSI", "5G", "40M", "HT", "4T", "126", "40", + "MKK", "5G", "40M", "HT", "4T", "126", "40", + "FCC", "5G", "40M", "HT", "4T", "134", "46", + "ETSI", "5G", "40M", "HT", "4T", "134", "40", + "MKK", "5G", "40M", "HT", "4T", "134", "40", + "FCC", "5G", "40M", "HT", "4T", "151", "46", + "ETSI", "5G", "40M", "HT", "4T", "151", "40", + "MKK", "5G", "40M", "HT", "4T", "151", "63", + "FCC", "5G", "40M", "HT", "4T", "159", "46", + "ETSI", "5G", "40M", "HT", "4T", "159", "40", + "MKK", "5G", "40M", "HT", "4T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "46", + "ETSI", "5G", "80M", "VHT", "1T", "42", "40", + "MKK", "5G", "80M", "VHT", "1T", "42", "40", + "FCC", "5G", "80M", "VHT", "1T", "58", "46", + "ETSI", "5G", "80M", "VHT", "1T", "58", "40", + "MKK", "5G", "80M", "VHT", "1T", "58", "40", + "FCC", "5G", "80M", "VHT", "1T", "106", "46", + "ETSI", "5G", "80M", "VHT", "1T", "106", "40", + "MKK", "5G", "80M", "VHT", "1T", "106", "40", + "FCC", "5G", "80M", "VHT", "1T", "122", "46", + "ETSI", "5G", "80M", "VHT", "1T", "122", "40", + "MKK", "5G", "80M", "VHT", "1T", "122", "40", + "FCC", "5G", "80M", "VHT", "1T", "155", "46", + "ETSI", "5G", "80M", "VHT", "1T", "155", "40", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "46", + "ETSI", "5G", "80M", "VHT", "2T", "42", "40", + "MKK", "5G", "80M", "VHT", "2T", "42", "40", + "FCC", "5G", "80M", "VHT", "2T", "58", "46", + "ETSI", "5G", "80M", "VHT", "2T", "58", "40", + "MKK", "5G", "80M", "VHT", "2T", "58", "40", + "FCC", "5G", "80M", "VHT", "2T", "106", "46", + "ETSI", "5G", "80M", "VHT", "2T", "106", "40", + "MKK", "5G", "80M", "VHT", "2T", "106", "40", + "FCC", "5G", "80M", "VHT", "2T", "122", "46", + "ETSI", "5G", "80M", "VHT", "2T", "122", "40", + "MKK", "5G", "80M", "VHT", "2T", "122", "40", + "FCC", "5G", "80M", "VHT", "2T", "155", "46", + "ETSI", "5G", "80M", "VHT", "2T", "155", "40", + "MKK", "5G", "80M", "VHT", "2T", "155", "63", + "FCC", "5G", "80M", "VHT", "3T", "42", "46", + "ETSI", "5G", "80M", "VHT", "3T", "42", "40", + "MKK", "5G", "80M", "VHT", "3T", "42", "40", + "FCC", "5G", "80M", "VHT", "3T", "58", "46", + "ETSI", "5G", "80M", "VHT", "3T", "58", "40", + "MKK", "5G", "80M", "VHT", "3T", "58", "40", + "FCC", "5G", "80M", "VHT", "3T", "106", "46", + "ETSI", "5G", "80M", "VHT", "3T", "106", "40", + "MKK", "5G", "80M", "VHT", "3T", "106", "40", + "FCC", "5G", "80M", "VHT", "3T", "122", "46", + "ETSI", "5G", "80M", "VHT", "3T", "122", "40", + "MKK", "5G", "80M", "VHT", "3T", "122", "40", + "FCC", "5G", "80M", "VHT", "3T", "155", "46", + "ETSI", "5G", "80M", "VHT", "3T", "155", "40", + "MKK", "5G", "80M", "VHT", "3T", "155", "63", + "FCC", "5G", "80M", "VHT", "4T", "42", "46", + "ETSI", "5G", "80M", "VHT", "4T", "42", "40", + "MKK", "5G", "80M", "VHT", "4T", "42", "40", + "FCC", "5G", "80M", "VHT", "4T", "58", "46", + "ETSI", "5G", "80M", "VHT", "4T", "58", "40", + "MKK", "5G", "80M", "VHT", "4T", "58", "40", + "FCC", "5G", "80M", "VHT", "4T", "106", "46", + "ETSI", "5G", "80M", "VHT", "4T", "106", "40", + "MKK", "5G", "80M", "VHT", "4T", "106", "40", + "FCC", "5G", "80M", "VHT", "4T", "122", "46", + "ETSI", "5G", "80M", "VHT", "4T", "122", "40", + "MKK", "5G", "80M", "VHT", "4T", "122", "40", + "FCC", "5G", "80M", "VHT", "4T", "155", "46", + "ETSI", "5G", "80M", "VHT", "4T", "155", "40", + "MKK", "5G", "80M", "VHT", "4T", "155", "63" +}; + + +void +_odm_read_and_config_mp_8814a_txpwr_lmt_type5( + struct dm_struct * pDM_Odm +) +{ + u4Byte i = 0; + u4Byte ArrayLen = sizeof(Array_MP_8814A_TXPWR_LMT_Type5)/sizeof(pu1Byte); + pu1Byte *Array = (pu1Byte *)Array_MP_8814A_TXPWR_LMT_Type5; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PADAPTER Adapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + PlatformZeroMemory(pHalData->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); + pHalData->nLinesReadPwrLmt = ArrayLen/7; +#endif + + PHYDM_DBG(pDM_Odm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_8814A_TXPWR_LMT_Type5\n"); + + for (i = 0; i < ArrayLen; i += 7) { + pu1Byte regulation = Array[i]; + pu1Byte band = Array[i+1]; + pu1Byte bandwidth = Array[i+2]; + pu1Byte rate = Array[i+3]; + pu1Byte rfPath = Array[i+4]; + pu1Byte chnl = Array[i+5]; + pu1Byte val = Array[i+6]; + + odm_ConfigBB_TXPWR_LMT_8814A(pDM_Odm, regulation, band, bandwidth, rate, rfPath, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)pHalData->BufOfLinesPwrLmt[i/7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rfPath, chnl, val); +#endif + } + +} +*/ + +#endif /* end of HWIMG_SUPPORT*/ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h new file mode 100644 index 00000000000000..27707510ed6cfc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halhwimg8814a_rf.h @@ -0,0 +1,149 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +/*Image2HeaderVersion: 2.19*/ +#if (RTL8814A_SUPPORT == 1) +#ifndef __INC_MP_RF_HW_IMG_8814A_H +#define __INC_MP_RF_HW_IMG_8814A_H + + +/****************************************************************************** +* RadioA.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_radioa(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_RadioA(void); + +/****************************************************************************** +* RadioB.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_radiob(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_RadioB(void); + +/****************************************************************************** +* RadioC.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_radioc(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_RadioC(void); + +/****************************************************************************** +* RadioD.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_radiod(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_RadioD(void); + +/****************************************************************************** +* TxPowerTrack.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpowertrack(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack(void); + +/****************************************************************************** +* TxPowerTrack_Type0.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpowertrack_type0(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack_Type0(void); + +/****************************************************************************** +* TxPowerTrack_Type2.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpowertrack_type2(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack_Type2(void); + +/****************************************************************************** +* TxPowerTrack_Type5.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpowertrack_type5(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TxPowerTrack_Type5(void); + +/****************************************************************************** +* TXPWR_LMT.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpwr_lmt(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT(void); + +/****************************************************************************** +* TXPWR_LMT_type2.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpwr_lmt_type2(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT_type2(void); + +/****************************************************************************** +* TXPWR_LMT_Type3.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpwr_lmt_type3(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT_Type3(void); + +/****************************************************************************** +* TXPWR_LMT_Type5.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8814a_txpwr_lmt_type5(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *pDM_Odm +); +u4Byte ODM_GetVersion_MP_8814A_TXPWR_LMT_Type5(void); + +#endif +#endif /* end of HWIMG_SUPPORT*/ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c new file mode 100644 index 00000000000000..948f91963e233f --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.c @@ -0,0 +1,1754 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#if !defined(__ECOS) && !defined(CONFIG_COMPAT_WIRELESS) +#include "mp_precomp.h" +#else +#include "../mp_precomp.h" +#endif +#include "../phydm_precomp.h" + + + +/*---------------------------Define Local Constant---------------------------*/ +// 2010/04/25 MH Define the max tx power tracking tx agc power. +#define ODM_TXPWRTRACK_MAX_IDX8814A 6 + +/*---------------------------Define Local Constant---------------------------*/ + + +//3============================================================ +//3 Tx Power Tracking +//3============================================================ + +u8 +CheckRFGainOffset( + struct dm_struct *pDM_Odm, + PWRTRACK_METHOD Method, + u8 RFPath + ) +{ + s1Byte UpperBound = 10, LowerBound = -5; // 4'b1010 = 10 + s1Byte Final_RF_Index = 0; + BOOLEAN bPositive = FALSE; + u32 bitMask = 0; + u8 Final_OFDM_Swing_Index = 0, TxScalingUpperBound = 28, TxScalingLowerBound = 4;// upper bound +2dB, lower bound -9dB + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + if(Method == MIX_MODE) //normal Tx power tracking + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("is 8814 MP chip\n")); + bitMask = BIT19; + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] + pRFCalibrateInfo->KfreeOffset[RFPath]; + + if( pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0) // check if RF_Index is positive or not + bPositive = TRUE; + else + bPositive = FALSE; + + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, bPositive); + + bitMask = BIT18|BIT17|BIT16|BIT15; + Final_RF_Index = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] / 2; /*TxBB 1 step equal 1dB, BB swing 1step equal 0.5dB*/ + + } + + if(Final_RF_Index > UpperBound) //Upper bound = 10dB, if more htan upper bound, then move to bb swing max = +2dB + { + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, UpperBound); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] - (UpperBound << 1)); + + if(Final_OFDM_Swing_Index > TxScalingUpperBound) // bb swing upper bound = +2dB + Final_OFDM_Swing_Index = TxScalingUpperBound; + + return Final_OFDM_Swing_Index; + } + else if(Final_RF_Index < LowerBound) // lower bound = -5dB + { + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*(LowerBound)); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex - ((LowerBound<<1) - pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]); + + if(Final_OFDM_Swing_Index < TxScalingLowerBound) // bb swing lower bound = -10dB + Final_OFDM_Swing_Index = TxScalingLowerBound; + return Final_OFDM_Swing_Index; + } + else // normal case + { + + if(bPositive == TRUE) + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, Final_RF_Index); //set RF Reg0x55 per path + else + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, bitMask, (-1)*Final_RF_Index); //set RF Reg0x55 per path + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath])%2; + return Final_OFDM_Swing_Index; + } + + return FALSE; +} + + +VOID +ODM_TxPwrTrackSetPwr8814A( + struct dm_struct *pDM_Odm, + PWRTRACK_METHOD Method, + u8 RFPath, + u8 ChannelMappedIndex + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PADAPTER Adapter = pDM_Odm->Adapter; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); +#endif + u8 Final_OFDM_Swing_Index = 0; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + if (Method == MIX_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pDM_Odm->DefaultOfdmIndex=%d, pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", + pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath)); + + Final_OFDM_Swing_Index = CheckRFGainOffset(pDM_Odm, MIX_MODE, RFPath); + } + else if(Method == TSSI_MODE) + { + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0); + } + else if(Method == BBSWING) // use for mp driver clean power tracking status + { + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] + pRFCalibrateInfo->KfreeOffset[RFPath]; + + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]); + + ODM_SetRFReg(pDM_Odm, RFPath, rRF_TxGainOffset, BIT18|BIT17|BIT16|BIT15, 0); + } + + if((Method == MIX_MODE) || (Method == BBSWING)) + { + switch(RFPath) + { + case ODM_RF_PATH_A: + + ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case ODM_RF_PATH_B: + + ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case ODM_RF_PATH_C: + + ODM_SetBBReg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + case ODM_RF_PATH_D: + + ODM_SetBBReg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d \n", Final_OFDM_Swing_Index)); + break; + + default: + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("Wrong Path name!!!! \n")); + + break; + } + } + return; +} // ODM_TxPwrTrackSetPwr8814A + +VOID +GetDeltaSwingTable_8814A( + IN struct dm_struct *pDM_Odm, + OUT pu8 *TemperatureUP_A, + OUT pu8 *TemperatureDOWN_A, + OUT pu8 *TemperatureUP_B, + OUT pu8 *TemperatureDOWN_B + ) +{ + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + u2Byte rate = *(pDM_Odm->pForcedDataRate); + u8 channel = *(pDM_Odm->pChannel); + + if ( 1 <= channel && channel <= 14) { + if (IS_CCK_RATE(rate)) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N; + } else { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N; + } + } else if ( 36 <= channel && channel <= 64) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0]; + } else if ( 100 <= channel && channel <= 140) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1]; + } else if ( 149 <= channel && channel <= 173) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2]; + } else { + *TemperatureUP_A = (pu8)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_A = (pu8)DeltaSwingTableIdx_2GA_N_DEFAULT; + *TemperatureUP_B = (pu8)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_B = (pu8)DeltaSwingTableIdx_2GA_N_DEFAULT; + } + + return; +} + + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN struct dm_struct *pDM_Odm, + OUT pu8 *TemperatureUP_C, + OUT pu8 *TemperatureDOWN_C, + OUT pu8 *TemperatureUP_D, + OUT pu8 *TemperatureDOWN_D + ) +{ + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + u2Byte rate = *(pDM_Odm->pForcedDataRate); + u8 channel = *(pDM_Odm->pChannel); + + if ( 1 <= channel && channel <= 14) { + if (IS_CCK_RATE(rate)) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_N; + } else { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_N; + } + } else if ( 36 <= channel && channel <= 64) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[0]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[0]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[0]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[0]; + } else if ( 100 <= channel && channel <= 140) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[1]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[1]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[1]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[1]; + } else if ( 149 <= channel && channel <= 173) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[2]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[2]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[2]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[2]; + } else { + *TemperatureUP_C = (pu8)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_C = (pu8)DeltaSwingTableIdx_2GA_N_DEFAULT; + *TemperatureUP_D = (pu8)DeltaSwingTableIdx_2GA_P_DEFAULT; + *TemperatureDOWN_D = (pu8)DeltaSwingTableIdx_2GA_N_DEFAULT; + } + + return; +} + + +void ConfigureTxpowerTrack_8814A( + IN PTXPWRTRACK_CFG pConfig + ) +{ + pConfig->SwingTableSize_CCK = ODM_CCK_TABLE_SIZE; + pConfig->SwingTableSize_OFDM = ODM_OFDM_TABLE_SIZE; + pConfig->Threshold_IQK = 8; + pConfig->AverageThermalNum = AVG_THERMAL_NUM_8814A; + pConfig->RfPathCount = MAX_PATH_NUM_8814A; + pConfig->ThermalRegAddr = RF_T_METER_8814A; + + pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr8814A; + pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8814A; + pConfig->DoIQK = DoIQK_8814A; + pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8814A; + pConfig->GetDeltaSwingTable8814only = GetDeltaSwingTable_8814A_PathCD; +} + + + +//1 7. IQK + + + +// +// 2011/07/26 MH Add an API for testing IQK fail case. +// +// MP Already declare in odm.c +#if 0 //!(DM_ODM_SUPPORT_TYPE & ODM_WIN) +BOOLEAN +ODM_CheckPowerStatus( + IN PADAPTER Adapter) +{ + /* + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *pDM_Odm = &pHalData->DM_OutSrc; + RT_RF_POWER_STATE rtState; + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence. + if (pMgntInfo->init_adpt_in_progress == TRUE) + { + ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter")); + return TRUE; + } + + // + // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK. + // + Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu8)(&rtState)); + if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff) + { + ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n", + Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState)); + return FALSE; + } + */ + return TRUE; +} +#endif + +VOID + _PHY_SaveADDARegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu32 ADDAReg, + IN pu32 ADDABackup, + IN u32 RegisterNum + ) +{ + u32 i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif + + if (ODM_CheckPowerStatus(pAdapter) == FALSE) + return; +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); + for( i = 0 ; i < RegisterNum ; i++){ + ADDABackup[i] = ODM_GetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord); + } +} + + +VOID + _PHY_SaveMACRegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu32 MACReg, + IN pu32 MACBackup + ) +{ + u32 i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); + for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + MACBackup[i] = ODM_Read1Byte(pDM_Odm, MACReg[i]); + } + MACBackup[i] = ODM_Read4Byte(pDM_Odm, MACReg[i]); + +} + + +VOID + _PHY_ReloadADDARegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu32 ADDAReg, + IN pu32 ADDABackup, + IN u32 RegiesterNum + ) +{ + u32 i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); + for(i = 0 ; i < RegiesterNum; i++) + { + ODM_SetBBReg(pDM_Odm, ADDAReg[i], bMaskDWord, ADDABackup[i]); + } +} + +VOID + _PHY_ReloadMACRegisters_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu32 MACReg, + IN pu32 MACBackup + ) +{ + u32 i; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload MAC parameters !\n")); + for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ + ODM_Write1Byte(pDM_Odm, MACReg[i], (u8)MACBackup[i]); + } + ODM_Write4Byte(pDM_Odm, MACReg[i], MACBackup[i]); +} + + + +VOID + _PHY_MACSettingCalibration_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu32 MACReg, + IN pu32 MACBackup + ) +{ + u32 i = 0; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); + + ODM_Write1Byte(pDM_Odm, MACReg[i], 0x3F); + + for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ + ODM_Write1Byte(pDM_Odm, MACReg[i], (u8)(MACBackup[i]&(~BIT3))); + } + ODM_Write1Byte(pDM_Odm, MACReg[i], (u8)(MACBackup[i]&(~BIT5))); + +} + +#if 0 +#define BW_20M 0 +#define BW_40M 1 +#define BW_80M 2 +#endif + +VOID + phy_LCCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T + ) +{ + u32 /*RF_Amode=0, RF_Bmode=0,*/ LC_Cal = 0, tmp = 0; + u32 cnt; + + //Check continuous TX and Packet TX + u32 reg0x914 = ODM_Read4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar);; + + // Backup RF reg18. + + if((reg0x914 & 0x70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812, 0xFF); + + //3 3. Read RF reg18 + LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + + //3 4. Set LC calibration begin bit15 + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000, 0x1); + + ODM_delay_ms(100); + + for (cnt = 0; cnt < 100; cnt++) { + if (ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1) + break; + ODM_delay_ms(10); + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt)); + + + //3 Restore original situation + if((reg0x914 & 70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812, 0x00); + + // Recover channel number + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal); +} + +//Analog Pre-distortion calibration +#define APK_BB_REG_NUM 8 +#define APK_CURVE_REG_NUM 4 +#define PATH_NUM 2 + +VOID + phy_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta, + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + u32 regD[PATH_NUM]; + u32 tmpReg, index, offset, apkbound; + u8 path, i, pathbound = PATH_NUM; + u32 BB_backup[APK_BB_REG_NUM]; + u32 BB_REG[APK_BB_REG_NUM] = { + rFPGA1_TxBlock, rOFDM0_TRxPathEnable, + rFPGA0_RFMOD, rOFDM0_TRMuxPar, + rFPGA0_XCD_RFInterfaceSW, rFPGA0_XAB_RFInterfaceSW, + rFPGA0_XA_RFInterfaceOE, rFPGA0_XB_RFInterfaceOE }; + u32 BB_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x00204000 }; + u32 BB_normal_AP_MODE[APK_BB_REG_NUM] = { + 0x00000020, 0x00a05430, 0x02040000, + 0x000800e4, 0x22204000 }; + + u32 AFE_backup[IQK_ADDA_REG_NUM]; + u32 AFE_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + + u32 MAC_backup[IQK_MAC_REG_NUM]; + u32 MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + u32 APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, + {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} + }; + + u32 APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { + {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings + {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} + }; + + u32 APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, + {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} + }; + + u32 APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings + {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} + }; + + u32 AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u32 APK_offset[PATH_NUM] = { + rConfig_AntA, rConfig_AntB}; + + u32 APK_normal_offset[PATH_NUM] = { + rConfig_Pmpd_AntA, rConfig_Pmpd_AntB}; + + u32 APK_value[PATH_NUM] = { + 0x92fc0000, 0x12fc0000}; + + u32 APK_normal_value[PATH_NUM] = { + 0x92680000, 0x12680000}; + + s1Byte APK_delta_mapping[APK_BB_REG_NUM][13] = { + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, + {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} + }; + + u32 APK_normal_setting_value_1[13] = { + 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, + 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, + 0x12680000, 0x00880000, 0x00880000 + }; + + u32 APK_normal_setting_value_2[16] = { + 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, + 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, + 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, + 0x00050006 + }; + + u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a + // u32 AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; + + s4Byte BB_offset, delta_V, delta_offset; + +#if defined(MP_DRIVER) && (MP_DRIVER == 1) +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); +#else + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); +#endif + pMptCtx->APK_bound[0] = 45; + pMptCtx->APK_bound[1] = 52; + +#endif + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_APCalibrate_8814A() delta %d\n", delta)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("AP Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); + if(!is2T) + pathbound = 1; + + //2 FOR NORMAL CHIP SETTINGS + + // Temporarily do not allow normal driver to do the following settings because these offset + // and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal + // will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the + // root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. +#if !defined(MP_DRIVER) || (MP_DRIVER != 1) + return; +#endif + //settings adjust for normal chip + for(index = 0; index < PATH_NUM; index ++) + { + APK_offset[index] = APK_normal_offset[index]; + APK_value[index] = APK_normal_value[index]; + AFE_on_off[index] = 0x6fdb25a4; + } + + for(index = 0; index < APK_BB_REG_NUM; index ++) + { + for(path = 0; path < pathbound; path++) + { + APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; + APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; + } + BB_AP_MODE[index] = BB_normal_AP_MODE[index]; + } + + apkbound = 6; + + //save BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + if(index == 0) //skip + continue; + BB_backup[index] = ODM_GetBBReg(pDM_Odm, BB_REG[index], bMaskDWord); + } + + //save MAC default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_SaveMACRegisters_8814A(pAdapter, MAC_REG, MAC_backup); + + //save AFE default value + _PHY_SaveADDARegisters_8814A(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#else + _PHY_SaveMACRegisters_8814A(pDM_Odm, MAC_REG, MAC_backup); + + //save AFE default value + _PHY_SaveADDARegisters_8814A(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#endif + + for(path = 0; path < pathbound; path++) + { + + + if(path == RF_PATH_A) + { + //path A APK + //load APK setting + //path-A + offset = rPdp_AntA; + for(index = 0; index < 11; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); + + offset = rConfig_AntA; + for(; index < 13; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path A + offset = rPdp_AntA; + for(index = 0; index < 16; index++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + } + else if(path == RF_PATH_B) + { + //path B APK + //load APK setting + //path-B + offset = rPdp_AntB; + for(index = 0; index < 10; index ++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x12680000); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x12680000); + + offset = rConfig_AntA; + index = 11; + for(; index < 13; index ++) //offset 0xb68, 0xb6c + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_1[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + + //page-B1 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + //path B + offset = 0xb60; + for(index = 0; index < 16; index++) + { + ODM_SetBBReg(pDM_Odm, offset, bMaskDWord, APK_normal_setting_value_2[index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", offset, ODM_GetBBReg(pDM_Odm, offset, bMaskDWord))); + + offset += 0x04; + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0); + } + + //save RF default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + regD[path] = PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord); +#else + regD[path] = ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord); +#endif + + //Path A AFE all on, path B AFE All off or vise versa + for(index = 0; index < IQK_ADDA_REG_NUM ; index++) + ODM_SetBBReg(pDM_Odm, AFE_REG[index], bMaskDWord, AFE_on_off[path]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xe70 %x\n", ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord))); + + //BB to AP mode + if(path == 0) + { + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + else if (index < 5) + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); + else if (BB_REG[index] == 0x870) + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); + else + ODM_SetBBReg(pDM_Odm, BB_REG[index], BIT10, 0x0); + } + + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); + } + else //path B + { + ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_B, bMaskDWord, 0x01008c00); + ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_B, bMaskDWord, 0x01008c00); + + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x800 %x\n", ODM_GetBBReg(pDM_Odm, 0x800, bMaskDWord))); + + //MAC settings +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_MACSettingCalibration_8814A(pAdapter, MAC_REG, MAC_backup); +#else + _PHY_MACSettingCalibration_8814A(pDM_Odm, MAC_REG, MAC_backup); +#endif + + if(path == RF_PATH_A) //Path B to standby mode + { + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x10000); + } + else //Path A to standby mode + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20103); + } + + delta_offset = ((delta+14)/2); + if(delta_offset < 0) + delta_offset = 0; + else if (delta_offset > 12) + delta_offset = 12; + + //AP calibration + for(index = 0; index < APK_BB_REG_NUM; index++) + { + if(index != 1) //only DO PA11+PAD01001, AP RF setting + continue; + + tmpReg = APK_RF_init_value[path][index]; +#if 1 + if(!pDM_Odm->RFCalibrateInfo.bAPKThermalMeterIgnore) + { + BB_offset = (tmpReg & 0xF0000) >> 16; + + if(!(tmpReg & BIT15)) //sign bit 0 + { + BB_offset = -BB_offset; + } + + delta_V = APK_delta_mapping[index][delta_offset]; + + BB_offset += delta_V; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() APK index %d tmpReg 0x%x delta_V %d delta_offset %d\n", index, tmpReg, (int)delta_V, (int)delta_offset)); + + if(BB_offset < 0) + { + tmpReg = tmpReg & (~BIT15); + BB_offset = -BB_offset; + } + else + { + tmpReg = tmpReg | BIT15; + } + tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); + } +#endif + + ODM_SetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord, 0x8992e); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, path, RF_IPA_A, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, path, RF_AC, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, path, RF_TXBIAS_A, bMaskDWord))); +#else + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xc %x\n", ODM_GetRFReg(pDM_Odm, path, RF_IPA_A, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_AC, bMaskDWord, APK_RF_value_0[path][index]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x0 %x\n", ODM_GetRFReg(pDM_Odm, path, RF_AC, bMaskDWord))); + ODM_SetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord, tmpReg); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xd %x\n", ODM_GetRFReg(pDM_Odm, path, RF_TXBIAS_A, bMaskDWord))); +#endif + + // PA11+PAD01111, one shot + i = 0; + do + { + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + { + ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[0]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); + ODM_delay_ms(3); + ODM_SetBBReg(pDM_Odm, APK_offset[path], bMaskDWord, APK_value[1]); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0x%x value 0x%x\n", APK_offset[path], ODM_GetBBReg(pDM_Odm, APK_offset[path], bMaskDWord))); + + ODM_delay_ms(20); + } + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + if(path == RF_PATH_A) + tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0x03E00000); + else + tmpReg = ODM_GetBBReg(pDM_Odm, rAPK, 0xF8000000); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_APCalibrate_8814A() offset 0xbd8[25:21] %x\n", tmpReg)); + + + i++; + } + while(tmpReg > apkbound && i < 4); + + APK_result[path][index] = tmpReg; + } + } + + //reload MAC default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_ReloadMACRegisters_8814A(pAdapter, MAC_REG, MAC_backup); +#else + _PHY_ReloadMACRegisters_8814A(pDM_Odm, MAC_REG, MAC_backup); +#endif + + //reload BB default value + for(index = 0; index < APK_BB_REG_NUM ; index++) + { + + if(index == 0) //skip + continue; + ODM_SetBBReg(pDM_Odm, BB_REG[index], bMaskDWord, BB_backup[index]); + } + + //reload AFE default value +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + _PHY_ReloadADDARegisters_8814A(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#else + _PHY_ReloadADDARegisters_8814A(pDM_Odm, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); +#endif + + //reload RF path default value + for(path = 0; path < pathbound; path++) + { + ODM_SetRFReg(pDM_Odm, path, 0xd, bMaskDWord, regD[path]); + if(path == RF_PATH_B) + { + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE1, bMaskDWord, 0x1000f); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_MODE2, bMaskDWord, 0x20101); + } + + //note no index == 0 + if (APK_result[path][1] > 6) + APK_result[path][1] = 6; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); + } + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\n")); + + + for(path = 0; path < pathbound; path++) + { + ODM_SetRFReg(pDM_Odm, path, 0x3, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); + if(path == RF_PATH_A) + ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); + else + ODM_SetRFReg(pDM_Odm, path, 0x4, bMaskDWord, + ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + ODM_SetRFReg(pDM_Odm, path, RF_BS_PA_APSET_G9_G11, bMaskDWord, + ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); +#endif + } + + pDM_Odm->RFCalibrateInfo.bAPKdone = TRUE; + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_APCalibrate_8814A()\n")); +} + + + + + + +VOID +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ) +{ + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n")); + phy_LCCalibrate_8814A(pDM_Odm, TRUE); + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n")); +} + +VOID + PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif +#ifdef DISABLE_BB_RF + return; +#endif + + return; +#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP)) + if(!(pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)) + { + return; + } +#endif + +#if defined(FOR_BRAZIL_PRETEST) && (FOR_BRAZIL_PRETEST != 1) + if(pDM_Odm->RFCalibrateInfo.bAPKdone) +#endif + return; + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if(IS_92C_SERIAL( pHalData->VersionID)){ + phy_APCalibrate_8814A(pAdapter, delta, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_APCalibrate_8814A(pAdapter, delta, FALSE); +#else + phy_APCalibrate_8814A(pDM_Odm, delta, FALSE); +#endif + } +} + VOID phy_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + if(!pAdapter->bHWInitReady) +#elif (DM_ODM_SUPPORT_TYPE == ODM_CE) + if(pAdapter->hw_init_completed == _FALSE) +#endif + { + u8 u1bTmp; + u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; + ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); + //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + +#endif + + if(is2T) //92C + { + if(bMain) + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT + } + else //88C + { + + if(bMain) + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x2); //Main + else + ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, BIT8|BIT9, 0x1); //Aux + } +} + VOID PHY_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain + ) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#ifdef DISABLE_BB_RF + return; +#endif + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + if (IS_92C_SERIAL(pHalData->VersionID)) + { + phy_SetRFPathSwitch_8814A(pAdapter, bMain, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + phy_SetRFPathSwitch_8814A(pAdapter, bMain, FALSE); +#else + phy_SetRFPathSwitch_8814A(pDM_Odm, bMain, FALSE); +#endif + } +} + + +#define DP_BB_REG_NUM 7 +#define DP_RF_REG_NUM 1 +#define DP_RETRY_LIMIT 10 +#define DP_PATH_NUM 2 +#define DP_DPK_NUM 3 +#define DP_DPK_VALUE_NUM 2 + + + + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) +//digital predistortion +VOID + phy_DigitalPredistortion_8814A( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter, +#else + IN PDM_ODM_T pDM_Odm, +#endif + IN BOOLEAN is2T + ) +{ +#if (RT_PLATFORM == PLATFORM_WINDOWS) +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + + u32 tmpReg, tmpReg2, index, i; + u8 path, pathbound = PATH_NUM; + u32 AFE_backup[IQK_ADDA_REG_NUM]; + u32 AFE_REG[IQK_ADDA_REG_NUM] = { + rFPGA0_XCD_SwitchControl, rBlue_Tooth, + rRx_Wait_CCA, rTx_CCK_RFON, + rTx_CCK_BBON, rTx_OFDM_RFON, + rTx_OFDM_BBON, rTx_To_Rx, + rTx_To_Tx, rRx_CCK, + rRx_OFDM, rRx_Wait_RIFS, + rRx_TO_Rx, rStandby, + rSleep, rPMPD_ANAEN }; + + u32 BB_backup[DP_BB_REG_NUM]; + u32 BB_REG[DP_BB_REG_NUM] = { + rOFDM0_TRxPathEnable, rFPGA0_RFMOD, + rOFDM0_TRMuxPar, rFPGA0_XCD_RFInterfaceSW, + rFPGA0_XAB_RFInterfaceSW, rFPGA0_XA_RFInterfaceOE, + rFPGA0_XB_RFInterfaceOE}; + u32 BB_settings[DP_BB_REG_NUM] = { + 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, + 0x0, 0x0, 0x0}; + + u32 RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; + u32 RF_REG[DP_RF_REG_NUM] = { + RF_TXBIAS_A}; + + u32 MAC_backup[IQK_MAC_REG_NUM]; + u32 MAC_REG[IQK_MAC_REG_NUM] = { + REG_TXPAUSE, REG_BCN_CTRL, + REG_BCN_CTRL_1, REG_GPIO_MUXCFG}; + + u32 Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { + {0x1e1e1e1e, 0x03901e1e}, + {0x18181818, 0x03901818}, + {0x0e0e0e0e, 0x03900e0e} + }; + + u32 AFE_on_off[PATH_NUM] = { + 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on + + u8 RetryCount = 0; + + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("==>phy_DigitalPredistortion_8814A()\n")); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_DigitalPredistortion_8814A for %s %s\n", (is2T ? "2T2R" : "1T1R"))); + + //save BB default value + for(index=0; index tx_agc 1f ~11 + // PA gain = 11 & PAD2 => tx_agc 10~0e + // PA gain = 01 => tx_agc 0b~0d + // PA gain = 00 => tx_agc 0a~00 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + //do inner loopback DPK 3 times + for(i = 0; i < 3; i++) + { + //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 + for(index = 0; index < 3; index++) + ODM_SetBBReg(pDM_Odm, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); + ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); + + // PAGE_B for Path-A inner loopback DPK setting + ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02097098); + ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); + + //----send one shot signal----// + // Path A + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x80047788); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x00047788); + ODM_delay_ms(50); + } + + //PA gain = 11 => tx_agc = 1a + for(index = 0; index < 3; index++) + ODM_SetBBReg(pDM_Odm,0xe00+index*4, bMaskDWord, 0x34343434); + ODM_SetBBReg(pDM_Odm,0xe08+index*4, bMaskDWord, 0x03903434); + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm,0xe10+index*4, bMaskDWord, 0x34343434); + + //==================================== + // PAGE_B for Path-A DPK setting + //==================================== + // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 + ODM_SetBBReg(pDM_Odm,rPdp_AntA, bMaskDWord, 0x02017098); + ODM_SetBBReg(pDM_Odm,rPdp_AntA_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm,rConfig_AntA, bMaskDWord, 0x00880000); + + //rf_lpbk_setup + //1.rf 00:5205a, rf 0d:0e52c + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0c, bMaskDWord, 0x8992b); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0d, bMaskDWord, 0x0e52c); + ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bMaskDWord, 0x5205a ); + + //----send one shot signal----// + // Path A + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + + while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathAOK) + { + //----read back measurement results----// + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c297018); + tmpReg = ODM_GetBBReg(pDM_Odm, 0xbe0, bMaskDWord); + ODM_delay_ms(10); + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x0c29701f); + tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbe8, bMaskDWord); + ODM_delay_ms(10); + + tmpReg = (tmpReg & bMaskHWord) >> 16; + tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; + if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) + { + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x02017098); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + RetryCount++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2)); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A DPK Sucess\n")); + pDM_Odm->RFCalibrateInfo.bDPPathAOK = TRUE; + break; + } + } + RetryCount = 0; + + //DPP path A + if(pDM_Odm->RFCalibrateInfo.bDPPathAOK) + { + // DP settings + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x01017098); + ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x776d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntA, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00880000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + + for(i=rPdp_AntA; i<=0xb3c; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path A ofsset = 0x%x\n", i)); + } + + //pwsf + ODM_SetBBReg(pDM_Odm, 0xb40, bMaskDWord, 0x40404040); + ODM_SetBBReg(pDM_Odm, 0xb44, bMaskDWord, 0x28324040); + ODM_SetBBReg(pDM_Odm, 0xb48, bMaskDWord, 0x10141920); + + for(i=0xb4c; i<=0xb5c; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); + } + + //TX_AGC boundary + ODM_SetBBReg(pDM_Odm, 0xbc0, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + } + else + { + ODM_SetBBReg(pDM_Odm, rPdp_AntA, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rPdp_AntA_4, bMaskDWord, 0x00000000); + } + + //DPK path B + if(is2T) + { + //Path A to standby mode + ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_AC, bMaskDWord, 0x10000); + + // LUTs => tx_agc + // PA gain = 11 & PAD1, => tx_agc 1f ~11 + // PA gain = 11 & PAD2, => tx_agc 10 ~0e + // PA gain = 01 => tx_agc 0b ~0d + // PA gain = 00 => tx_agc 0a ~00 + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + //do inner loopback DPK 3 times + for(i = 0; i < 3; i++) + { + //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); + + // PAGE_B for Path-A inner loopback DPK setting + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02097098); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); + + //----send one shot signal----// + // Path B + ODM_SetBBReg(pDM_Odm,rConfig_Pmpd_AntB, bMaskDWord, 0x80047788); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x00047788); + ODM_delay_ms(50); + } + + // PA gain = 11 => tx_agc = 1a + for(index = 0; index < 4; index++) + ODM_SetBBReg(pDM_Odm, 0x830+index*4, bMaskDWord, 0x34343434); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x848+index*4, bMaskDWord, 0x34343434); + for(index = 0; index < 2; index++) + ODM_SetBBReg(pDM_Odm, 0x868+index*4, bMaskDWord, 0x34343434); + + // PAGE_B for Path-B DPK setting + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0xf76d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); + + // RF lpbk switches on + ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x0101000f); + ODM_SetBBReg(pDM_Odm, 0x840, bMaskDWord, 0x01120103); + + //Path-B RF lpbk + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0c, bMaskDWord, 0x8992b); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, 0x0d, bMaskDWord, 0x0e52c); + ODM_SetRFReg(pDM_Odm, RF_PATH_B, RF_AC, bMaskDWord, 0x5205a); + + //----send one shot signal----// + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + + while(RetryCount < DP_RETRY_LIMIT && !pDM_Odm->RFCalibrateInfo.bDPPathBOK) + { + //----read back measurement results----// + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c297018); + tmpReg = ODM_GetBBReg(pDM_Odm, 0xbf0, bMaskDWord); + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x0c29701f); + tmpReg2 = ODM_GetBBReg(pDM_Odm, 0xbf8, bMaskDWord); + + tmpReg = (tmpReg & bMaskHWord) >> 16; + tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; + + if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) + { + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x02017098); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80000000); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x800477c0); + ODM_delay_ms(1); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x000477c0); + ODM_delay_ms(50); + RetryCount++; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2)); + } + else + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B DPK Success\n")); + pDM_Odm->RFCalibrateInfo.bDPPathBOK = TRUE; + break; + } + } + + //DPP path B + if(pDM_Odm->RFCalibrateInfo.bDPPathBOK) + { + // DP setting + // LUT by SRAM + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x01017098); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x776d9f84); + ODM_SetBBReg(pDM_Odm, rConfig_Pmpd_AntB, bMaskDWord, 0x0004ab87); + ODM_SetBBReg(pDM_Odm, rConfig_AntB, bMaskDWord, 0x00880000); + + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x40000000); + for(i=0xb60; i<=0xb9c; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x40004000); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("path B ofsset = 0x%x\n", i)); + } + + // PWSF + ODM_SetBBReg(pDM_Odm, 0xba0, bMaskDWord, 0x40404040); + ODM_SetBBReg(pDM_Odm, 0xba4, bMaskDWord, 0x28324050); + ODM_SetBBReg(pDM_Odm, 0xba8, bMaskDWord, 0x0c141920); + + for(i=0xbac; i<=0xbbc; i+=4) + { + ODM_SetBBReg(pDM_Odm, i, bMaskDWord, 0x0c0c0c0c); + } + + // tx_agc boundary + ODM_SetBBReg(pDM_Odm, 0xbc4, bMaskDWord, 0x0005361f); + ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000); + + } + else + { + ODM_SetBBReg(pDM_Odm, rPdp_AntB, bMaskDWord, 0x00000000); + ODM_SetBBReg(pDM_Odm, rPdp_AntB_4, bMaskDWord, 0x00000000); + } + } + + //reload BB default value + for(index=0; indexRFCalibrateInfo.bDPdone = TRUE; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<==phy_DigitalPredistortion_8814A()\n")); +#endif +} + +VOID + phy_DigitalPredistortion_8814A_8814A( +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PADAPTER pAdapter +#else + IN PDM_ODM_T pDM_Odm +#endif + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif +#if DISABLE_BB_RF + return; +#endif + + return; + + if(pDM_Odm->RFCalibrateInfo.bDPdone) + return; +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + if(IS_92C_SERIAL( pHalData->VersionID)){ + phy_DigitalPredistortion_8814A(pAdapter, TRUE); + } + else +#endif + { + // For 88C 1T1R + phy_DigitalPredistortion_8814A(pAdapter, FALSE); + } +} + + + +//return value TRUE => Main; FALSE => Aux + + BOOLEAN phy_QueryRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T + ) +{ +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#if (DM_ODM_SUPPORT_TYPE == ODM_CE) + PDM_ODM_T pDM_Odm = &pHalData->odmpriv; +#endif +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; +#endif +#endif + if(!pAdapter->bHWInitReady) + { + u8 u1bTmp; + u1bTmp = ODM_Read1Byte(pDM_Odm, REG_LEDCFG2) | BIT7; + ODM_Write1Byte(pDM_Odm, REG_LEDCFG2, u1bTmp); + //ODM_SetBBReg(pDM_Odm, REG_LEDCFG0, BIT23, 0x01); + ODM_SetBBReg(pDM_Odm, rFPGA0_XAB_RFParameter, BIT13, 0x01); + } + + if(is2T) // + { + if(ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) + return TRUE; + else + return FALSE; + } + else + { + if((ODM_GetBBReg(pDM_Odm, rFPGA0_XB_RFInterfaceOE, BIT5|BIT4|BIT3) == 0x0) || + (ODM_GetBBReg(pDM_Odm, rConfig_ram64x16, BIT31) == 0x0)) + return TRUE; + else + return FALSE; + } +} + + + +//return value TRUE => Main; FALSE => Aux + BOOLEAN PHY_QueryRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + +#if DISABLE_BB_RF + return TRUE; +#endif +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + + //if(IS_92C_SERIAL( pHalData->VersionID)){ + if(IS_2T2R( pHalData->VersionID)){ + return phy_QueryRFPathSwitch_8814A(pAdapter, TRUE); + } + else +#endif + { + // For 88C 1T1R +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + return phy_QueryRFPathSwitch_8814A(pAdapter, FALSE); +#else + return phy_QueryRFPathSwitch_8814A(pDM_Odm, FALSE); +#endif + } +} +#endif + + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h new file mode 100644 index 00000000000000..cbb1ced957c99e --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_ap.h @@ -0,0 +1,164 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __HAL_PHY_RF_8814A_H__ +#define __HAL_PHY_RF_8814A_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define IQK_DELAY_TIME_8814A 10 //ms +#define index_mapping_NUM_8814A 15 +#define AVG_THERMAL_NUM_8814A 4 +#define RF_T_METER_8814A 0x42 +#define MAX_PATH_NUM_8814A 4 + +#include "../halphyrf_ap.h" + + +void ConfigureTxpowerTrack_8814A( + PTXPWRTRACK_CFG pConfig + ); + +VOID +GetDeltaSwingTable_8814A( + struct dm_struct *pDM_Odm, + u8* *TemperatureUP_A, + u8* *TemperatureDOWN_A, + u8* *TemperatureUP_B, + u8* *TemperatureDOWN_B + ); + +VOID +GetDeltaSwingTable_8814A_PathCD( + struct dm_struct *pDM_Odm, + u8* *TemperatureUP_C, + u8* *TemperatureDOWN_C, + u8* *TemperatureUP_D, + u8* *TemperatureDOWN_D + ); + +VOID +ConfigureTxpowerTrack_8814A( + IN PTXPWRTRACK_CFG pConfig + ); + + +VOID +ODM_TxPwrTrackSetPwr8814A( + IN PDM_ODM_T pDM_Odm, + IN PWRTRACK_METHOD Method, + IN u1Byte RFPath, + IN u1Byte ChannelMappedIndex + ); + + +u1Byte +CheckRFGainOffset( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath + ); + + +// +// LC calibrate +// +void +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm +); + +void +phy_LCCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN is2T +); + + +// +// AP calibrate +// +void +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta); +void +PHY_DigitalPredistortion_8814A( IN PADAPTER pAdapter); + + +#if 0 //FOR_8814_IQK +VOID +_PHY_SaveADDARegisters( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN pu4Byte ADDABackup, + IN u4Byte RegisterNum + ); + +VOID +_PHY_PathADDAOn( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte ADDAReg, + IN BOOLEAN isPathAOn, + IN BOOLEAN is2T + ); + +VOID +_PHY_MACSettingCalibration( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN pu4Byte MACReg, + IN pu4Byte MACBackup + ); + + + +VOID +_PHY_PathAStandBy( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm +#else + IN PADAPTER pAdapter +#endif + ); + +#endif + + +#endif // #ifndef __HAL_PHY_RF_8814A_H__ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c new file mode 100644 index 00000000000000..eb91c4d8af7aad --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.c @@ -0,0 +1,528 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8814A_SUPPORT == 1) + + +/*---------------------------Define Local Constant---------------------------*/ +// 2010/04/25 MH Define the max tx power tracking tx agc power. +#define ODM_TXPWRTRACK_MAX_IDX_8814A 6 + +/*---------------------------Define Local Constant---------------------------*/ + +//3============================================================ +//3 Tx Power Tracking +//3============================================================ + +// Add CheckRFGainOffset By YuChen to make sure that RF gain offset will not over upperbound 4'b1010 + +u1Byte +CheckRFGainOffset( + PDM_ODM_T pDM_Odm, + u1Byte RFPath + ) +{ + u1Byte UpperBound = 10; // 4'b1010 = 10 + u1Byte Final_RF_Index = 0; + BOOLEAN bPositive = FALSE; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + if( pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0) // check if RF_Index is positive or not + { + Final_RF_Index = pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1; + bPositive = TRUE; + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive); + } + else + { + Final_RF_Index = (-1)*pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >> 1; + bPositive = FALSE; + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, BIT15, bPositive); + } + + if(bPositive == TRUE) + { + if(Final_RF_Index >= UpperBound) + { + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, UpperBound); //set RF Reg0x55 per path + return UpperBound; + } + else + { + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path + return Final_RF_Index; + } + } + else + { + ODM_SetRFReg(pDM_Odm, (ODM_RF_RADIO_PATH_E)RFPath, rRF_TxGainOffset, 0xF0000, Final_RF_Index); //set RF Reg0x55 per path + return Final_RF_Index; + + } + + return FALSE; + +} + + + + +VOID +ODM_TxPwrTrackSetPwr8814A( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath, + u1Byte ChannelMappedIndex + ) +{ + u1Byte Final_OFDM_Swing_Index = 0; + u1Byte Final_CCK_Swing_Index = 0; + u1Byte Final_RF_Index = 0; + u1Byte UpperBound = 10, TxScalingUpperBound = 28; // Upperbound = 4'b1010, TxScalingUpperBound = +2 dB + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + + + if (Method == MIX_MODE) + { + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("pRFCalibrateInfo->DefaultOfdmIndex=%d, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", + pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath)); + + Final_CCK_Swing_Index = pRFCalibrateInfo->DefaultCckIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath])%2; + + Final_RF_Index = CheckRFGainOffset(pDM_Odm, RFPath); // check if Final_RF_Index >= 10 + + if((Final_RF_Index == UpperBound) && (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] >= 0)) // check BBSW is not over +2dB + { + Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + (pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath] - (UpperBound << 1)); + if(Final_OFDM_Swing_Index > TxScalingUpperBound) + Final_OFDM_Swing_Index = TxScalingUpperBound; + } + + switch(RFPath) + { + case ODM_RF_PATH_A: + + ODM_SetBBReg(pDM_Odm, rA_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + case ODM_RF_PATH_B: + + ODM_SetBBReg(pDM_Odm, rB_TxScale_Jaguar, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_B Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + case ODM_RF_PATH_C: + + ODM_SetBBReg(pDM_Odm, rC_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_C Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + case ODM_RF_PATH_D: + + ODM_SetBBReg(pDM_Odm, rD_TxScale_Jaguar2, 0xFFE00000, TxScalingTable_Jaguar[Final_OFDM_Swing_Index]); //set BBswing + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("******Path_D Compensate with BBSwing , Final_OFDM_Swing_Index = %d, Final_RF_Index = %d \n", Final_OFDM_Swing_Index, Final_RF_Index)); + break; + + default: + ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, + ("Wrong Path name!!!! \n")); + + break; + } + + + } + + return; +} // ODM_TxPwrTrackSetPwr8814A + + +VOID +GetDeltaSwingTable_8814A( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_A, + OUT pu1Byte *TemperatureDOWN_A, + OUT pu1Byte *TemperatureUP_B, + OUT pu1Byte *TemperatureDOWN_B + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u1Byte TxRate = 0xFF; + u1Byte channel = pHalData->CurrentChannel; + + + if (pDM_Odm->mp_mode == TRUE) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (MP_DRIVER == 1) + PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #endif + } else { + u2Byte rate = *(pDM_Odm->pForcedDataRate); + + if (!rate) { /*auto rate*/ + if (rate != 0xFF) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + TxRate = HwRateToMRate(pDM_Odm->TxRate); + #endif + } + } else { /*force rate*/ + TxRate = (u1Byte)rate; + } + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); + + if (1 <= channel && channel <= 14) { + if (IS_CCK_RATE(TxRate)) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKB_N; + } else { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_P; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_2GA_N; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_P; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_2GB_N; + } + } else if (36 <= channel && channel <= 64) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[0]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[0]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[0]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[0]; + } else if (100 <= channel && channel <= 144) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[1]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[1]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[1]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[1]; + } else if (149 <= channel && channel <= 173) { + *TemperatureUP_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_P[2]; + *TemperatureDOWN_A = pRFCalibrateInfo->DeltaSwingTableIdx_5GA_N[2]; + *TemperatureUP_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_P[2]; + *TemperatureDOWN_B = pRFCalibrateInfo->DeltaSwingTableIdx_5GB_N[2]; + } else { + *TemperatureUP_A = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_A = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + *TemperatureUP_B = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_B = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + } + + + return; +} + + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_C, + OUT pu1Byte *TemperatureDOWN_C, + OUT pu1Byte *TemperatureUP_D, + OUT pu1Byte *TemperatureDOWN_D + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u1Byte TxRate = 0xFF; + u1Byte channel = pHalData->CurrentChannel; + + if (pDM_Odm->mp_mode == TRUE) { + #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE)) + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + #if (MP_DRIVER == 1) + PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.MptCtx); + + TxRate = MptToMgntRate(pMptCtx->MptRateIndex); + #endif + #endif + } else { + u2Byte rate = *(pDM_Odm->pForcedDataRate); + + if (!rate) { /*auto rate*/ + if (rate != 0xFF) { + #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) + TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); + #elif (DM_ODM_SUPPORT_TYPE & ODM_CE) + TxRate = HwRateToMRate(pDM_Odm->TxRate); + #endif + } + } else { /*force rate*/ + TxRate = (u1Byte)rate; + } + } + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Power Tracking TxRate=0x%X\n", TxRate)); + + + if ( 1 <= channel && channel <= 14) { + if (IS_CCK_RATE(TxRate)) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GCCKD_N; + } else { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_P; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_2GC_N; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_P; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_2GD_N; + } + } else if (36 <= channel && channel <= 64) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[0]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[0]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[0]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[0]; + } else if (100 <= channel && channel <= 144) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[1]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[1]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[1]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[1]; + } else if (149 <= channel && channel <= 173) { + *TemperatureUP_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_P[2]; + *TemperatureDOWN_C = pRFCalibrateInfo->DeltaSwingTableIdx_5GC_N[2]; + *TemperatureUP_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_P[2]; + *TemperatureDOWN_D = pRFCalibrateInfo->DeltaSwingTableIdx_5GD_N[2]; + } else { + *TemperatureUP_C = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_C = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + *TemperatureUP_D = (pu1Byte)DeltaSwingTableIdx_2GA_P_8188E; + *TemperatureDOWN_D = (pu1Byte)DeltaSwingTableIdx_2GA_N_8188E; + } + + + return; +} + +void ConfigureTxpowerTrack_8814A( + PTXPWRTRACK_CFG pConfig + ) +{ + pConfig->SwingTableSize_CCK = CCK_TABLE_SIZE; + pConfig->SwingTableSize_OFDM = OFDM_TABLE_SIZE; + pConfig->Threshold_IQK = 8; + pConfig->AverageThermalNum = AVG_THERMAL_NUM_8814A; + pConfig->RfPathCount = MAX_PATH_NUM_8814A; + pConfig->ThermalRegAddr = RF_T_METER_88E; + + pConfig->ODM_TxPwrTrackSetPwr = ODM_TxPwrTrackSetPwr8814A; + pConfig->DoIQK = DoIQK_8814A; + pConfig->PHY_LCCalibrate = PHY_LCCalibrate_8814A; + pConfig->GetDeltaSwingTable = GetDeltaSwingTable_8814A; + pConfig->GetDeltaSwingTable8814only = GetDeltaSwingTable_8814A_PathCD; +} + +VOID +phy_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm, + IN BOOLEAN is2T + ) +{ + u4Byte LC_Cal = 0, cnt; + + //Check continuous TX and Packet TX + u4Byte reg0x914 = ODM_Read4Byte(pDM_Odm, rSingleTone_ContTx_Jaguar);; + + // Backup RF reg18. + LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + + if((reg0x914 & 0x70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0xFF); + + //3 3. Read RF reg18 + LC_Cal = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask); + + //3 4. Set LC calibration begin bit15 + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal|0x08000); + + ODM_delay_ms(100); + + for (cnt = 0; cnt < 100; cnt++) { + if (ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1) + break; + ODM_delay_ms(10); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("retry cnt = %d\n", cnt)); + + + + //3 Restore original situation + if((reg0x914 & 70000) == 0) + ODM_Write1Byte(pDM_Odm, REG_TXPAUSE_8812A, 0x00); + + // Recover channel number + ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, LC_Cal); + + DbgPrint("Call %s\n", __FUNCTION__); +} + + +VOID +phy_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta, + IN BOOLEAN is2T + ) +{ +} + + +VOID +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ) +{ + +#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) + PADAPTER pAdapter = pDM_Odm->Adapter; + +#if (MP_DRIVER == 1) +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + PMPT_CONTEXT pMptCtx = &(pAdapter->MptCtx); +#else + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); +#endif +#endif +#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("===> PHY_LCCalibrate_8814A\n")); + +//#if (MP_DRIVER == 1) + phy_LCCalibrate_8814A(pDM_Odm, TRUE); +//#endif + + ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("<=== PHY_LCCalibrate_8814A\n")); + +} + +VOID +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ) +{ + +} + + +VOID +PHY_DPCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ) +{ +} + + +BOOLEAN +phy_QueryRFPathSwitch_8814A( + IN PADAPTER pAdapter + ) +{ + return TRUE; +} + + +BOOLEAN PHY_QueryRFPathSwitch_8814A( + IN PADAPTER pAdapter + ) +{ + +#if DISABLE_BB_RF + return TRUE; +#endif + + return phy_QueryRFPathSwitch_8814A(pAdapter); +} + + +VOID phy_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain, + IN BOOLEAN is2T + ) +{ +} +VOID PHY_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain + ) +{ +} + + + + +#else /* (RTL8814A_SUPPORT == 0)*/ +VOID +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ){} + +VOID +PHY_IQCalibrate_8814A( + IN PDM_ODM_T pDM_Odm, + IN BOOLEAN bReCovery + ){} +#endif /* (RTL8814A_SUPPORT == 0)*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h new file mode 100644 index 00000000000000..658d6f063c0fec --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/halphyrf_8814a_win.h @@ -0,0 +1,106 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#ifndef __HAL_PHY_RF_8814A_H__ +#define __HAL_PHY_RF_8814A_H__ + +/*--------------------------Define Parameters-------------------------------*/ +#define AVG_THERMAL_NUM_8814A 4 + +#include "halphyrf_win.h" + +void ConfigureTxpowerTrack_8814A( + PTXPWRTRACK_CFG pConfig + ); + +VOID +GetDeltaSwingTable_8814A( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_A, + OUT pu1Byte *TemperatureDOWN_A, + OUT pu1Byte *TemperatureUP_B, + OUT pu1Byte *TemperatureDOWN_B + ); + +VOID +GetDeltaSwingTable_8814A_PathCD( + IN PDM_ODM_T pDM_Odm, + OUT pu1Byte *TemperatureUP_C, + OUT pu1Byte *TemperatureDOWN_C, + OUT pu1Byte *TemperatureUP_D, + OUT pu1Byte *TemperatureDOWN_D + ); + + +VOID +ODM_TxPwrTrackSetPwr8814A( + PDM_ODM_T pDM_Odm, + PWRTRACK_METHOD Method, + u1Byte RFPath, + u1Byte ChannelMappedIndex + ); + +u1Byte +CheckRFGainOffset( + PDM_ODM_T pDM_Odm, + u1Byte RFPath + ); + + +// +// LC calibrate +// +void +PHY_LCCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ); + +// +// AP calibrate +// +void +PHY_APCalibrate_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN s1Byte delta + ); + + +VOID +PHY_DPCalibrate_8814A( + IN PDM_ODM_T pDM_Odm + ); + + +VOID PHY_SetRFPathSwitch_8814A( +#if (DM_ODM_SUPPORT_TYPE & ODM_AP) + IN PDM_ODM_T pDM_Odm, +#else + IN PADAPTER pAdapter, +#endif + IN BOOLEAN bMain + ); + + +#endif // #ifndef __HAL_PHY_RF_8188E_H__ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c new file mode 100644 index 00000000000000..2e3f20622117cf --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.c @@ -0,0 +1,219 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8814A_SUPPORT == 1) + +void +odm_ConfigRFReg_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data, + enum rf_path RF_PATH, + u32 RegAddr + ) +{ + if(Addr == 0xfe || Addr == 0xffe) + { + #ifdef CONFIG_LONG_DELAY_ISSUE + ODM_sleep_ms(50); + #else + ODM_delay_ms(50); + #endif + } + else + { + odm_set_rf_reg(pDM_Odm, RF_PATH, RegAddr, bRFRegOffsetMask, Data); + // Add 1us delay between BB/RF register setting. + ODM_delay_us(1); + } +} + + +void +odm_ConfigRF_RadioA_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ) +{ + u4Byte content = 0x1000; // RF_Content: radioa_txt + u4Byte maskforPhySet= (u4Byte)(content&0xE000); + + odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_A, Addr|maskforPhySet); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); +} + +void +odm_ConfigRF_RadioB_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ) +{ + u4Byte content = 0x1001; // RF_Content: radiob_txt + u4Byte maskforPhySet= (u4Byte)(content&0xE000); + + odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_B, Addr|maskforPhySet); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); + +} + +void +odm_ConfigRF_RadioC_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ) +{ + u4Byte content = 0x1001; // RF_Content: radiob_txt + u4Byte maskforPhySet= (u4Byte)(content&0xE000); + + odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_C, Addr|maskforPhySet); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioC] %08X %08X\n", Addr, Data)); + +} + +void +odm_ConfigRF_RadioD_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ) +{ + u4Byte content = 0x1001; // RF_Content: radiob_txt + u4Byte maskforPhySet= (u4Byte)(content&0xE000); + + odm_ConfigRFReg_8814A(pDM_Odm, Addr, Data, RF_PATH_D, Addr|maskforPhySet); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioD] %08X %08X\n", Addr, Data)); + +} + +void +odm_ConfigMAC_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + IN u1Byte Data + ) +{ + odm_write_1byte(pDM_Odm, Addr, Data); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); +} + +void +odm_ConfigBB_AGC_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Bitmask, + u32 Data + ) +{ + odm_set_bb_reg(pDM_Odm, Addr, Bitmask, Data); + // Add 1us delay between BB/RF register setting. + ODM_delay_us(1); + + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); +} + +void +odm_ConfigBB_PHY_REG_PG_8814A( + struct dm_struct *pDM_Odm, + u32 Band, + u32 RfPath, + u32 TxNum, + u32 Addr, + u32 Bitmask, + u32 Data + ) +{ + if (Addr == 0xfe || Addr == 0xffe) + #ifdef CONFIG_LONG_DELAY_ISSUE + ODM_sleep_ms(50); + #else + ODM_delay_ms(50); + #endif + else + { +#if !(DM_ODM_SUPPORT_TYPE&ODM_AP) + phy_store_tx_power_by_rate(pDM_Odm->adapter, Band, RfPath, TxNum, Addr, Bitmask, Data); +#endif + } + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_LOUD, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", Addr, Bitmask, Data)); +} + +void +odm_ConfigBB_PHY_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Bitmask, + u32 Data + ) +{ + if (Addr == 0xfe) + #ifdef CONFIG_LONG_DELAY_ISSUE + ODM_sleep_ms(50); + #else + ODM_delay_ms(50); + #endif + else if (Addr == 0xfd) + ODM_delay_ms(5); + else if (Addr == 0xfc) + ODM_delay_ms(1); + else if (Addr == 0xfb) + ODM_delay_us(50); + else if (Addr == 0xfa) + ODM_delay_us(5); + else if (Addr == 0xf9) + ODM_delay_us(1); + else + { + odm_set_bb_reg(pDM_Odm, Addr, Bitmask, Data); + } + + // Add 1us delay between BB/RF register setting. + ODM_delay_us(1); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); +} + +void +odm_ConfigBB_TXPWR_LMT_8814A( + struct dm_struct *pDM_Odm, + u8* Regulation, + u8* Band, + u8* Bandwidth, + u8* RateSection, + u8* RfPath, + u8* Channel, + u8* PowerLimit + ) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE)) + phy_set_tx_power_limit(pDM_Odm, Regulation, Band, + Bandwidth, RateSection, RfPath, Channel, PowerLimit); +#endif +} +#endif + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h new file mode 100644 index 00000000000000..bc3f9434e25b48 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_regconfig8814a.h @@ -0,0 +1,109 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __INC_ODM_REGCONFIG_H_8814A +#define __INC_ODM_REGCONFIG_H_8814A + +#if (RTL8814A_SUPPORT == 1) + +void +odm_ConfigRFReg_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data, + enum rf_path RF_PATH, + u32 RegAddr + ); + +void +odm_ConfigRF_RadioA_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ); + +void +odm_ConfigRF_RadioB_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ); + +void +odm_ConfigRF_RadioC_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ); + +void +odm_ConfigRF_RadioD_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Data + ); + +void +odm_ConfigMAC_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + IN u1Byte Data + ); + +void +odm_ConfigBB_AGC_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Bitmask, + u32 Data + ); + +void +odm_ConfigBB_PHY_REG_PG_8814A( + struct dm_struct *pDM_Odm, + u32 Band, + u32 RfPath, + u32 TxNum, + u32 Addr, + u32 Bitmask, + u32 Data + ); + +void +odm_ConfigBB_PHY_8814A( + struct dm_struct *pDM_Odm, + u32 Addr, + u32 Bitmask, + u32 Data + ); + +void +odm_ConfigBB_TXPWR_LMT_8814A( + struct dm_struct *pDM_Odm, + u8* Regulation, + u8* Band, + u8* Bandwidth, + u8* RateSection, + u8* RfPath, + u8* Channel, + u8* PowerLimit + ); +#endif +#endif // end of SUPPORT + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c new file mode 100644 index 00000000000000..885e063368e24d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.c @@ -0,0 +1,503 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +//============================================================ +// include files +//============================================================ + +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8814A_SUPPORT == 1) +s8 phydm_cck_rssi_8814a(struct dm_struct *dm, u16 lna_idx, u8 vga_idx) +{ + s8 rx_pwr_all = 0; + + switch (lna_idx) { + case 7: + if (vga_idx <= 27) + rx_pwr_all = -94 + 2 * (27 - vga_idx); + else + rx_pwr_all = -94; + break; + case 6: + rx_pwr_all = -42 + 2 * (2 - vga_idx); + break; + case 5: + rx_pwr_all = -36 + 2 * (7 - vga_idx); + break; + case 4: + rx_pwr_all = -30 + 2 * (7 - vga_idx); + break; + case 3: + rx_pwr_all = -18 + 2 * (7 - vga_idx); + break; + case 2: + rx_pwr_all = 2 * (5 - vga_idx); + break; + case 1: + rx_pwr_all = 14 - 2 * vga_idx; + break; + case 0: + rx_pwr_all = 20 - 2 * vga_idx; + break; + default: + break; + } + + return rx_pwr_all; +} +#ifdef PHYDM_PRIMARY_CCA +VOID +odm_Write_Dynamic_CCA_8814A( + struct dm_struct *pDM_Odm, + u8 CurrentMFstate + ) +{ + struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca); + + if (PrimaryCCA->MF_state != CurrentMFstate){ + + ODM_SetBBReg(pDM_Odm, ODM_REG_L1SBD_PD_CH_11N, BIT8|BIT7, CurrentMFstate); + } + + PrimaryCCA->MF_state = CurrentMFstate; + +} + +VOID +odm_PrimaryCCA_Check_Init_8814A( + struct dm_struct *pDM_Odm) +{ +#if ((DM_ODM_SUPPORT_TYPE == ODM_WIN) || (DM_ODM_SUPPORT_TYPE == ODM_AP)) + PADAPTER pAdapter = pDM_Odm->Adapter; + struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + pHalData->RTSEN = 0; + PrimaryCCA->DupRTS_flag = 0; + PrimaryCCA->intf_flag = 0; + PrimaryCCA->intf_type = 0; + PrimaryCCA->Monitor_flag = 0; + PrimaryCCA->PriCCA_flag = 0; + PrimaryCCA->CH_offset = 0; + PrimaryCCA->MF_state = 0; +#endif /*((DM_ODM_SUPPORT_TYPE==ODM_WIN) ||(DM_ODM_SUPPORT_TYPE==ODM_AP)) */ +} + +VOID +odm_DynamicPrimaryCCA_Check_8814A( + struct dm_struct *pDM_Odm + ) +{ + if(pDM_Odm->SupportICType != ODM_RTL8814A) + return; + + switch (pDM_Odm->SupportPlatform) + { + case ODM_WIN: + +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) + odm_DynamicPrimaryCCAMP_8814A(pDM_Odm); +#endif + break; + + case ODM_CE: +#if(DM_ODM_SUPPORT_TYPE==ODM_CE) + +#endif + break; + + case ODM_AP: +#if (DM_ODM_SUPPORT_TYPE == ODM_AP) + odm_DynamicPrimaryCCAAP_8814A(pDM_Odm); +#endif + break; + } + +} + + +#if(DM_ODM_SUPPORT_TYPE==ODM_WIN) + +VOID +odm_DynamicPrimaryCCAMP_8814A( + struct dm_struct *pDM_Odm + ) +{ + PADAPTER pAdapter = pDM_Odm->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); + struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca); + BOOLEAN Is40MHz = FALSE; + u8Byte OFDM_CCA, OFDM_FA, BW_USC_Cnt, BW_LSC_Cnt; + u8 SecCHOffset; + u8 CurMFstate; + static u8 CountDown = Monitor_TIME; + + OFDM_CCA = FalseAlmCnt->Cnt_OFDM_CCA; + OFDM_FA = FalseAlmCnt->Cnt_Ofdm_fail; + BW_USC_Cnt = FalseAlmCnt->Cnt_BW_USC; + BW_LSC_Cnt = FalseAlmCnt->Cnt_BW_LSC; + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: OFDM CCA=%d\n", OFDM_CCA)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: OFDM FA=%d\n", OFDM_FA)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: BW_USC=%d\n", BW_USC_Cnt)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: BW_LSC=%d\n", BW_LSC_Cnt)); + Is40MHz = *(pDM_Odm->pBandWidth); + SecCHOffset = *(pDM_Odm->pSecChOffset); // NIC: 2: sec is below, 1: sec is above + //DbgPrint("8814A: SecCHOffset = %d\n", SecCHOffset); + if(!pDM_Odm->bLinked){ + return; + } + else{ + + if(Is40MHz){ + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Cont Down= %d\n", CountDown)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Primary_CCA_flag=%d\n", PrimaryCCA->PriCCA_flag)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Intf_Type=%d\n", PrimaryCCA->intf_type)); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Intf_flag=%d\n", PrimaryCCA->intf_flag )); + ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_PRICCA, ODM_DBG_LOUD, ("8814A: Duplicate RTS Flag=%d\n", PrimaryCCA->DupRTS_flag)); + //DbgPrint("8814A RTS_EN=%d\n", pHalData->RTSEN); + + if(PrimaryCCA->PriCCA_flag == 0){ + + if(SecCHOffset == 2){ // Primary channel is above NOTE: duplicate CTS can remove this condition + + if((OFDM_CCA > OFDMCCA_TH) && (BW_LSC_Cnt>(BW_USC_Cnt + BW_Ind_Bias)) + && (OFDM_FA>(OFDM_CCA>>1))){ + + PrimaryCCA->intf_type = 1; + PrimaryCCA->intf_flag = 1; + CurMFstate = MF_USC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + PrimaryCCA->PriCCA_flag = 1; + } + else if((OFDM_CCA > OFDMCCA_TH) && (BW_LSC_Cnt>(BW_USC_Cnt + BW_Ind_Bias)) + && (OFDM_FA < (OFDM_CCA>>1))){ + + PrimaryCCA->intf_type = 2; + PrimaryCCA->intf_flag = 1; + CurMFstate = MF_USC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + PrimaryCCA->PriCCA_flag = 1; + PrimaryCCA->DupRTS_flag = 1; + pHalData->RTSEN = 1; + } + else{ + + PrimaryCCA->intf_type = 0; + PrimaryCCA->intf_flag = 0; + CurMFstate = MF_USC_LSC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + pHalData->RTSEN = 0; + PrimaryCCA->DupRTS_flag = 0; + } + + } + else if (SecCHOffset == 1){ + + if((OFDM_CCA > OFDMCCA_TH) && (BW_USC_Cnt > (BW_LSC_Cnt + BW_Ind_Bias)) + && (OFDM_FA > (OFDM_CCA>>1))){ + + PrimaryCCA->intf_type = 1; + PrimaryCCA->intf_flag = 1; + CurMFstate = MF_LSC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + PrimaryCCA->PriCCA_flag = 1; + } + else if((OFDM_CCA > OFDMCCA_TH) && (BW_USC_Cnt>(BW_LSC_Cnt + BW_Ind_Bias)) + && (OFDM_FA < (OFDM_CCA>>1))){ + + PrimaryCCA->intf_type = 2; + PrimaryCCA->intf_flag = 1; + CurMFstate = MF_LSC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + PrimaryCCA->PriCCA_flag = 1; + PrimaryCCA->DupRTS_flag = 1; + pHalData->RTSEN = 1; + } + else{ + + PrimaryCCA->intf_type = 0; + PrimaryCCA->intf_flag = 0; + CurMFstate = MF_USC_LSC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + pHalData->RTSEN = 0; + PrimaryCCA->DupRTS_flag = 0; + } + + } + + } + else{ // PrimaryCCA->PriCCA_flag==1 + + CountDown--; + if(CountDown == 0){ + CountDown = Monitor_TIME; + PrimaryCCA->PriCCA_flag = 0; + CurMFstate = MF_USC_LSC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); /* default*/ + pHalData->RTSEN = 0; + PrimaryCCA->DupRTS_flag = 0; + PrimaryCCA->intf_type = 0; + PrimaryCCA->intf_flag = 0; + } + + } + + } + else{ + + return; + } + } + +} + +#elif(DM_ODM_SUPPORT_TYPE == ODM_AP) + +VOID +odm_DynamicPrimaryCCAAP_8814A( + struct dm_struct *pDM_Odm + ) +{ + PADAPTER Adapter = pDM_Odm->Adapter; + prtl8192cd_priv priv = pDM_Odm->priv; + PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); + struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca); + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 i; + static u4Byte Count_Down = Monitor_TIME; + BOOLEAN STA_BW = FALSE, STA_BW_pre = FALSE, STA_BW_TMP = FALSE; + BOOLEAN bConnected = FALSE; + BOOLEAN Is40MHz = FALSE; + u8 SecCHOffset; + u8 CurMFstate; + PSTA_INFO_T pstat; + + Is40MHz = *(pDM_Odm->pBandWidth); + SecCHOffset = *(pDM_Odm->pSecChOffset); // AP: 1: sec is below, 2: sec is above + + + for(i=0; ipODM_StaInfo[i]; + if(IS_STA_VALID(pstat)){ + + STA_BW_TMP = pstat->tx_bw; + if(STA_BW_TMP > STA_BW){ + STA_BW = STA_BW_TMP; + } + bConnected = TRUE; + } + } + + if(Is40MHz){ + + if(PrimaryCCA->PriCCA_flag == 0){ + + if(bConnected){ + + if(STA_BW == 0){ //2 STA BW=20M + + PrimaryCCA->PriCCA_flag = 1; + if(SecCHOffset==1){ + CurMFstate = MF_USC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + } + else if(SecCHOffset==2){ + CurMFstate = MF_USC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + } + } + else{ //2 STA BW=40M + if(PrimaryCCA->intf_flag == 0){ + + odm_Intf_Detection(pDM_Odm); + } + else{ // intf_flag = 1 + + if(PrimaryCCA->intf_type == 1){ + + if(PrimaryCCA->CH_offset == 1){ + + CurMFstate = MF_USC; + if(SecCHOffset == 1){ // AP, 1: primary is above 2: primary is below + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + } + } + else if(PrimaryCCA->CH_offset == 2){ + + CurMFstate = MF_LSC; + if(SecCHOffset == 2){ + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + } + } + } + else if(PrimaryCCA->intf_type==2){ + + if(PrimaryCCA->CH_offset==1){ + + //ODM_SetBBReg(pDM_Odm, ODM_REG_L1SBD_PD_CH_11N, BIT8|BIT7, MF_USC); + pHalData->RTSEN = 1; + } + else if(PrimaryCCA->CH_offset==2){ + + //ODM_SetBBReg(pDM_Odm, ODM_REG_L1SBD_PD_CH_11N, BIT8|BIT7, MF_LSC); + pHalData->RTSEN = 1; + } + + } + } + } + + } + else{ // disconnected interference detection + + odm_Intf_Detection(pDM_Odm); + }// end of disconnected + + + } + else{ // PrimaryCCA->PriCCA_flag == 1 + + if(STA_BW==0){ + + STA_BW_pre = STA_BW; + return; + } + + Count_Down--; + if((Count_Down == 0) || ((STA_BW & STA_BW_pre) != 1)){ + + Count_Down = Monitor_TIME; + PrimaryCCA->PriCCA_flag = 0; + PrimaryCCA->intf_type = 0; + PrimaryCCA->intf_flag = 0; + CurMFstate = MF_USC_LSC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); /* default*/ + pHalData->RTSEN = 0; + + } + + } + + STA_BW_pre = STA_BW; + + } + else{ + //2 Reset + odm_PrimaryCCA_Check_Init(pDM_Odm); + CurMFstate = MF_USC_LSC; + odm_Write_Dynamic_CCA_8814A(pDM_Odm, CurMFstate); + Count_Down = Monitor_TIME; + } + +} + + +VOID +odm_Intf_Detection_8814A( + struct dm_struct *pDM_Odm + ) +{ + PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm, PHYDM_FALSEALMCNT); + struct phydm_pri_cca_struct* PrimaryCCA = &(pDM_Odm->dm_pri_cca); + + if((FalseAlmCnt->Cnt_OFDM_CCA>OFDMCCA_TH) + &&(FalseAlmCnt->Cnt_BW_LSC>(FalseAlmCnt->Cnt_BW_USC+BW_Ind_Bias))){ + + PrimaryCCA->intf_flag = 1; + PrimaryCCA->CH_offset = 1; // 1:LSC, 2:USC + if(FalseAlmCnt->Cnt_Ofdm_fail>(FalseAlmCnt->Cnt_OFDM_CCA>>1)){ + PrimaryCCA->intf_type = 1; + } + else{ + PrimaryCCA->intf_type = 2; + } + } + else if((FalseAlmCnt->Cnt_OFDM_CCA>OFDMCCA_TH) + &&(FalseAlmCnt->Cnt_BW_USC>(FalseAlmCnt->Cnt_BW_LSC+BW_Ind_Bias))){ + + PrimaryCCA->intf_flag = 1; + PrimaryCCA->CH_offset = 2; // 1:LSC, 2:USC + if(FalseAlmCnt->Cnt_Ofdm_fail>(FalseAlmCnt->Cnt_OFDM_CCA>>1)){ + PrimaryCCA->intf_type = 1; + } + else{ + PrimaryCCA->intf_type = 2; + } + } + else{ + PrimaryCCA->intf_flag = 0; + PrimaryCCA->intf_type = 0; + PrimaryCCA->CH_offset = 0; + } + +} + +#endif +#endif /* #ifdef PHYDM_PRIMARY_CCA */ + +u8 +phydm_spur_nbi_setting_8814a( + struct dm_struct *pDM_Odm + ) +{ + u8 set_result = 0; + + /*pDM_Odm->pChannel means central frequency, so we can use 20M as input*/ + if (pDM_Odm->rfe_type == 0 || pDM_Odm->rfe_type == 1 || pDM_Odm->rfe_type == 6) { + /*channel asked by RF Jeff*/ + if (*pDM_Odm->channel == 14) + set_result = phydm_nbi_setting(pDM_Odm, FUNC_ENABLE, *pDM_Odm->channel, 40, 2480, PHYDM_DONT_CARE); + else if (*pDM_Odm->channel >= 4 || *pDM_Odm->channel <= 8) + set_result = phydm_nbi_setting(pDM_Odm, FUNC_ENABLE, *pDM_Odm->channel, 40, 2440, PHYDM_DONT_CARE); + else + set_result = phydm_nbi_setting(pDM_Odm, FUNC_ENABLE, *pDM_Odm->channel, 40, 2440, PHYDM_DONT_CARE); + } + ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("%s, set_result = 0x%d, pChannel = %d\n", __func__, set_result, *pDM_Odm->channel)); + //printk("%s, set_result = 0x%d, pChannel = %d\n", __func__, set_result, *pDM_Odm->channel); + pDM_Odm->nbi_set_result = set_result; + return set_result; + +} + +void odm_hw_setting_8814a( + struct dm_struct *p_dm_odm + ) +{ +#ifdef PHYDM_PRIMARY_CCA + odm_PrimaryCCA_Check_Init_8814A(p_dm_odm); + odm_DynamicPrimaryCCA_Check_8814A(p_dm_odm); + odm_Intf_Detection_8814A(p_dm_odm); +#endif +} + + +#endif // RTL8814A_SUPPORT == 1 + + + + + + + + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h new file mode 100644 index 00000000000000..a7ff6757dfa12b --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/phydm_rtl8814a.h @@ -0,0 +1,78 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#ifndef __ODM_RTL8814A_H__ +#define __ODM_RTL8814A_H__ + +#define OFDMCCA_TH 500 +#define BW_Ind_Bias 500 +#define MF_USC 2 +#define MF_LSC 1 +#define MF_USC_LSC 0 +#define Monitor_TIME 30 + +s8 phydm_cck_rssi_8814a(struct dm_struct *dm, u16 lna_idx, u8 vga_idx); + +VOID +odm_Write_Dynamic_CCA_8814A( + struct dm_struct *pDM_Odm, + u8 CurrentMFstate + ); + +VOID +odm_PrimaryCCA_Check_Init_8814A( + struct dm_struct *pDM_Odm + ); + +VOID +odm_DynamicPrimaryCCA_Check_8814A( + struct dm_struct *pDM_Odm + ); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + +VOID +odm_DynamicPrimaryCCAMP_8814A( + struct dm_struct *pDM_Odm + ); + +#elif (DM_ODM_SUPPORT_TYPE == ODM_AP) + +VOID +odm_DynamicPrimaryCCAAP_8814A( + struct dm_struct *pDM_Odm + ); + +VOID +odm_Intf_Detection_8814A( + struct dm_struct *pDM_Odm + ); + +#endif + +u1Byte +phydm_spur_nbi_setting_8814a( + struct dm_struct *pDM_Odm +); + +void odm_hw_setting_8814a( + struct dm_struct *p_dm_odm + ); + +#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h new file mode 100644 index 00000000000000..e9c28bfb7560c0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8814a/version_rtl8814a.h @@ -0,0 +1,10 @@ +/*RTL8814A PHY Parameters*/ +/* +[Caution] + Since 01/Aug/2015, the commit rules will be simplified. + You do not need to fill up the version.h anymore, + only the maintenance supervisor fills it before formal release. +*/ +#define RELEASE_DATE_8814A 20150908 +#define COMMIT_BY_8814A "BB_LUKE" +#define RELEASE_VERSION_8814A 81 diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c new file mode 100644 index 00000000000000..0dc7ab6e1fc113 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.c @@ -0,0 +1,923 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.18*/ +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8821A_SUPPORT == 1) +static boolean +check_positive( + struct dm_struct *dm, + const u32 condition1, + const u32 condition2, + const u32 condition3, + const u32 condition4 +) +{ + u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ + ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ + ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ + ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ + ((dm->board_type & BIT(2)) >> 2) << 4; /* _BT*/ + + u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; + u32 driver1 = dm->cut_version << 24 | + (dm->support_interface & 0xF0) << 16 | + dm->support_platform << 16 | + dm->package_type << 12 | + (dm->support_interface & 0x0F) << 8 | + _board_type; + + u32 driver2 = (dm->type_glna & 0xFF) << 0 | + (dm->type_gpa & 0xFF) << 8 | + (dm->type_alna & 0xFF) << 16 | + (dm->type_apa & 0xFF) << 24; + + u32 driver3 = 0; + + u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | + (dm->type_gpa & 0xFF00) | + (dm->type_alna & 0xFF00) << 8 | + (dm->type_apa & 0xFF00) << 16; + + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + + PHYDM_DBG(dm, ODM_COMP_INIT, + " (Platform, Interface) = (0x%X, 0x%X)\n", dm->support_platform, dm->support_interface); + PHYDM_DBG(dm, ODM_COMP_INIT, + " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, dm->package_type); + + + /*============== value Defined Check ===============*/ + /*QFN type [15:12] and cut version [27:24] need to do value check*/ + + if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return false; + if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return false; + + /*=============== Bit Defined Check ================*/ + /* We don't care [31:28] */ + + cond1 &= 0x00FF0FFF; + driver1 &= 0x00FF0FFF; + + if ((cond1 & driver1) == cond1) { + u32 bit_mask = 0; + + if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ + return true; + + if ((cond1 & BIT(0)) != 0) /*GLNA*/ + bit_mask |= 0x000000FF; + if ((cond1 & BIT(1)) != 0) /*GPA*/ + bit_mask |= 0x0000FF00; + if ((cond1 & BIT(2)) != 0) /*ALNA*/ + bit_mask |= 0x00FF0000; + if ((cond1 & BIT(3)) != 0) /*APA*/ + bit_mask |= 0xFF000000; + + if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask))) /* board_type of each RF path is matched*/ + return true; + else + return false; + } else + return false; +} +static boolean +check_negative( + struct dm_struct *dm, + const u32 condition1, + const u32 condition2 +) +{ + return true; +} + +/****************************************************************************** +* AGC_TAB.TXT +******************************************************************************/ + +u32 array_mp_8821a_agc_tab[] = { + 0x81C, 0xBF000001, + 0x81C, 0xBF020001, + 0x81C, 0xBF040001, + 0x81C, 0xBF060001, + 0x81C, 0xBE080001, + 0x81C, 0xBD0A0001, + 0x81C, 0xBC0C0001, + 0x81C, 0xBA0E0001, + 0x81C, 0xB9100001, + 0x81C, 0xB8120001, + 0x81C, 0xB7140001, + 0x81C, 0xB6160001, + 0x81C, 0xB5180001, + 0x81C, 0xB41A0001, + 0x81C, 0xB31C0001, + 0x81C, 0xB21E0001, + 0x81C, 0xB1200001, + 0x81C, 0xB0220001, + 0x81C, 0xAF240001, + 0x81C, 0xAE260001, + 0x81C, 0xAD280001, + 0x81C, 0xAC2A0001, + 0x81C, 0xAB2C0001, + 0x81C, 0xAA2E0001, + 0x81C, 0xA9300001, + 0x81C, 0xA8320001, + 0x81C, 0xA7340001, + 0x81C, 0xA6360001, + 0x81C, 0xA5380001, + 0x81C, 0xA43A0001, + 0x81C, 0x683C0001, + 0x81C, 0x673E0001, + 0x81C, 0x66400001, + 0x81C, 0x65420001, + 0x81C, 0x64440001, + 0x81C, 0x63460001, + 0x81C, 0x62480001, + 0x81C, 0x614A0001, + 0x81C, 0x474C0001, + 0x81C, 0x464E0001, + 0x81C, 0x45500001, + 0x81C, 0x44520001, + 0x81C, 0x43540001, + 0x81C, 0x42560001, + 0x81C, 0x41580001, + 0x81C, 0x285A0001, + 0x81C, 0x275C0001, + 0x81C, 0x265E0001, + 0x81C, 0x25600001, + 0x81C, 0x24620001, + 0x81C, 0x0A640001, + 0x81C, 0x09660001, + 0x81C, 0x08680001, + 0x81C, 0x076A0001, + 0x81C, 0x066C0001, + 0x81C, 0x056E0001, + 0x81C, 0x04700001, + 0x81C, 0x03720001, + 0x81C, 0x02740001, + 0x81C, 0x01760001, + 0x81C, 0x01780001, + 0x81C, 0x017A0001, + 0x81C, 0x017C0001, + 0x81C, 0x017E0001, + 0x8000020c, 0x00000000, 0x40000000, 0x00000000, + 0x81C, 0xFB000101, + 0x81C, 0xFA020101, + 0x81C, 0xF9040101, + 0x81C, 0xF8060101, + 0x81C, 0xF7080101, + 0x81C, 0xF60A0101, + 0x81C, 0xF50C0101, + 0x81C, 0xF40E0101, + 0x81C, 0xF3100101, + 0x81C, 0xF2120101, + 0x81C, 0xF1140101, + 0x81C, 0xF0160101, + 0x81C, 0xEF180101, + 0x81C, 0xEE1A0101, + 0x81C, 0xED1C0101, + 0x81C, 0xEC1E0101, + 0x81C, 0xEB200101, + 0x81C, 0xEA220101, + 0x81C, 0xE9240101, + 0x81C, 0xE8260101, + 0x81C, 0xE7280101, + 0x81C, 0xE62A0101, + 0x81C, 0xE52C0101, + 0x81C, 0xE42E0101, + 0x81C, 0xE3300101, + 0x81C, 0xA5320101, + 0x81C, 0xA4340101, + 0x81C, 0xA3360101, + 0x81C, 0x87380101, + 0x81C, 0x863A0101, + 0x81C, 0x853C0101, + 0x81C, 0x843E0101, + 0x81C, 0x69400101, + 0x81C, 0x68420101, + 0x81C, 0x67440101, + 0x81C, 0x66460101, + 0x81C, 0x49480101, + 0x81C, 0x484A0101, + 0x81C, 0x474C0101, + 0x81C, 0x2A4E0101, + 0x81C, 0x29500101, + 0x81C, 0x28520101, + 0x81C, 0x27540101, + 0x81C, 0x26560101, + 0x81C, 0x25580101, + 0x81C, 0x245A0101, + 0x81C, 0x235C0101, + 0x81C, 0x055E0101, + 0x81C, 0x04600101, + 0x81C, 0x03620101, + 0x81C, 0x02640101, + 0x81C, 0x01660101, + 0x81C, 0x01680101, + 0x81C, 0x016A0101, + 0x81C, 0x016C0101, + 0x81C, 0x016E0101, + 0x81C, 0x01700101, + 0x81C, 0x01720101, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x81C, 0xFB000101, + 0x81C, 0xFA020101, + 0x81C, 0xF9040101, + 0x81C, 0xF8060101, + 0x81C, 0xF7080101, + 0x81C, 0xF60A0101, + 0x81C, 0xF50C0101, + 0x81C, 0xF40E0101, + 0x81C, 0xF3100101, + 0x81C, 0xF2120101, + 0x81C, 0xF1140101, + 0x81C, 0xF0160101, + 0x81C, 0xEF180101, + 0x81C, 0xEE1A0101, + 0x81C, 0xED1C0101, + 0x81C, 0xEC1E0101, + 0x81C, 0xEB200101, + 0x81C, 0xEA220101, + 0x81C, 0xE9240101, + 0x81C, 0xE8260101, + 0x81C, 0xE7280101, + 0x81C, 0xE62A0101, + 0x81C, 0xE52C0101, + 0x81C, 0xE42E0101, + 0x81C, 0xE3300101, + 0x81C, 0xA5320101, + 0x81C, 0xA4340101, + 0x81C, 0xA3360101, + 0x81C, 0x87380101, + 0x81C, 0x863A0101, + 0x81C, 0x853C0101, + 0x81C, 0x843E0101, + 0x81C, 0x69400101, + 0x81C, 0x68420101, + 0x81C, 0x67440101, + 0x81C, 0x66460101, + 0x81C, 0x49480101, + 0x81C, 0x484A0101, + 0x81C, 0x474C0101, + 0x81C, 0x2A4E0101, + 0x81C, 0x29500101, + 0x81C, 0x28520101, + 0x81C, 0x27540101, + 0x81C, 0x26560101, + 0x81C, 0x25580101, + 0x81C, 0x245A0101, + 0x81C, 0x235C0101, + 0x81C, 0x055E0101, + 0x81C, 0x04600101, + 0x81C, 0x03620101, + 0x81C, 0x02640101, + 0x81C, 0x01660101, + 0x81C, 0x01680101, + 0x81C, 0x016A0101, + 0x81C, 0x016C0101, + 0x81C, 0x016E0101, + 0x81C, 0x01700101, + 0x81C, 0x01720101, + 0xA0000000, 0x00000000, + 0x81C, 0xFF000101, + 0x81C, 0xFF020101, + 0x81C, 0xFE040101, + 0x81C, 0xFD060101, + 0x81C, 0xFC080101, + 0x81C, 0xFD0A0101, + 0x81C, 0xFC0C0101, + 0x81C, 0xFB0E0101, + 0x81C, 0xFA100101, + 0x81C, 0xF9120101, + 0x81C, 0xF8140101, + 0x81C, 0xF7160101, + 0x81C, 0xF6180101, + 0x81C, 0xF51A0101, + 0x81C, 0xF41C0101, + 0x81C, 0xF31E0101, + 0x81C, 0xF2200101, + 0x81C, 0xF1220101, + 0x81C, 0xF0240101, + 0x81C, 0xEF260101, + 0x81C, 0xEE280101, + 0x81C, 0xED2A0101, + 0x81C, 0xEC2C0101, + 0x81C, 0xEB2E0101, + 0x81C, 0xEA300101, + 0x81C, 0xE9320101, + 0x81C, 0xE8340101, + 0x81C, 0xE7360101, + 0x81C, 0xE6380101, + 0x81C, 0xE53A0101, + 0x81C, 0xE43C0101, + 0x81C, 0xE33E0101, + 0x81C, 0xA5400101, + 0x81C, 0xA4420101, + 0x81C, 0xA3440101, + 0x81C, 0x87460101, + 0x81C, 0x86480101, + 0x81C, 0x854A0101, + 0x81C, 0x844C0101, + 0x81C, 0x694E0101, + 0x81C, 0x68500101, + 0x81C, 0x67520101, + 0x81C, 0x66540101, + 0x81C, 0x49560101, + 0x81C, 0x48580101, + 0x81C, 0x475A0101, + 0x81C, 0x2A5C0101, + 0x81C, 0x295E0101, + 0x81C, 0x28600101, + 0x81C, 0x27620101, + 0x81C, 0x26640101, + 0x81C, 0x25660101, + 0x81C, 0x24680101, + 0x81C, 0x236A0101, + 0x81C, 0x056C0101, + 0x81C, 0x046E0101, + 0x81C, 0x03700101, + 0x81C, 0x02720101, + 0xB0000000, 0x00000000, + 0x81C, 0x01740101, + 0x81C, 0x01760101, + 0x81C, 0x01780101, + 0x81C, 0x017A0101, + 0x81C, 0x017C0101, + 0x81C, 0x017E0101, + 0xC50, 0x00000022, + 0xC50, 0x00000020, + +}; + +void +odm_read_and_config_mp_8821a_agc_tab( + struct dm_struct *dm +) +{ + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8821a_agc_tab) / sizeof(u32); + u32 *array = array_mp_8821a_agc_tab; + + u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_agc_tab\n"); + + while ((i + 1) < array_len) { + v1 = array[i]; + v2 = array[i + 1]; + + if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT(31)) {/* positive condition*/ + c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); + if (c_cond == COND_ENDIF) {/*end*/ + is_matched = true; + is_skipped = false; + PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); + } else if (c_cond == COND_ELSE) { /*else*/ + is_matched = is_skipped ? false : true; + PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT(30)) { /*negative condition*/ + if (is_skipped == false) { + if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { + is_matched = true; + is_skipped = true; + } else { + is_matched = false; + is_skipped = false; + } + } else + is_matched = false; + } + } else { + if (is_matched) + odm_config_bb_agc_8821a(dm, v1, MASKDWORD, v2); + } + i = i + 2; + } +} + +u32 +odm_get_version_mp_8821a_agc_tab(void) +{ + return 59; +} + +/****************************************************************************** +* PHY_REG.TXT +******************************************************************************/ + +u32 array_mp_8821a_phy_reg[] = { + 0x800, 0x0020D090, + 0x804, 0x080112E0, + 0x808, 0x0E028211, + 0x80C, 0x92131111, + 0x810, 0x20101261, + 0x814, 0x020C3D10, + 0x818, 0x03A00385, + 0x820, 0x00000000, + 0x824, 0x00030FE0, + 0x828, 0x00000000, + 0x82C, 0x002081DD, + 0x830, 0x2AAAEEC8, + 0x834, 0x0037A706, + 0x838, 0x06489B44, + 0x83C, 0x0000095B, + 0x840, 0xC0000001, + 0x844, 0x40003CDE, + 0x848, 0x62103F8B, + 0x84C, 0x6CFDFFB8, + 0x850, 0x28874706, + 0x854, 0x0001520C, + 0x858, 0x8060E000, + 0x85C, 0x74210168, + 0x860, 0x6929C321, + 0x864, 0x79727432, + 0x868, 0x8CA7A314, + 0x86C, 0x888C2878, + 0x870, 0x08888888, + 0x874, 0x31612C2E, + 0x878, 0x00000152, + 0x87C, 0x000FD000, + 0x8A0, 0x00000013, + 0x8A4, 0x7F7F7F7F, + 0x8A8, 0xA2000338, + 0x8AC, 0x0FF0FA0A, + 0x8B4, 0x000FC080, + 0x8B8, 0x6C10D7FF, + 0x8BC, 0x0CA52090, + 0x8C0, 0x1BF00020, + 0x8C4, 0x00000000, + 0x8C8, 0x00013169, + 0x8CC, 0x08248492, + 0x8D4, 0x940008A0, + 0x8D8, 0x290B5612, + 0x8F8, 0x400002C0, + 0x8FC, 0x00000000, + 0x900, 0x00000700, + 0x90C, 0x00000000, + 0x910, 0x0000FC00, + 0x914, 0x00000404, + 0x918, 0x1C1028C0, + 0x91C, 0x64B11A1C, + 0x920, 0xE0767233, + 0x924, 0x055AA500, + 0x928, 0x00000004, + 0x92C, 0xFFFE0000, + 0x930, 0xFFFFFFFE, + 0x934, 0x001FFFFF, + 0x960, 0x00000000, + 0x964, 0x00000000, + 0x968, 0x00000000, + 0x96C, 0x00000000, + 0x970, 0x801FFFFF, + 0x974, 0x000003FF, + 0x978, 0x00000000, + 0x97C, 0x00000000, + 0x980, 0x00000000, + 0x984, 0x00000000, + 0x988, 0x00000000, + 0x990, 0x27100000, + 0x994, 0xFFFF0100, + 0x998, 0xFFFFFF5C, + 0x99C, 0xFFFFFFFF, + 0x9A0, 0x000000FF, + 0x9A4, 0x00480080, + 0x9A8, 0x00000000, + 0x9AC, 0x00000000, + 0x9B0, 0x81081008, + 0x9B4, 0x01081008, + 0x9B8, 0x01081008, + 0x9BC, 0x01081008, + 0x9D0, 0x00000000, + 0x9D4, 0x00000000, + 0x9D8, 0x00000000, + 0x9DC, 0x00000000, + 0x9E0, 0x00005D00, + 0x9E4, 0x00000003, + 0x9E8, 0x00000001, + 0xA00, 0x00D047C8, + 0xA04, 0x01FF800C, + 0xA08, 0x8C8A8300, + 0xA0C, 0x2E68000F, + 0xA10, 0x9500BB78, + 0xA14, 0x11144028, + 0xA18, 0x00881117, + 0xA1C, 0x89140F00, + 0xA20, 0x1A1B0000, + 0xA24, 0x090E1317, + 0xA28, 0x00000204, + 0xA2C, 0x00900000, + 0xA70, 0x101FFF00, + 0xA74, 0x00000008, + 0xA78, 0x00000900, + 0xA7C, 0x225B0606, + 0xA80, 0x21805490, + 0xA84, 0x001F0000, + 0xB00, 0x03100040, + 0xB04, 0x0000B000, + 0xB08, 0xAE0201EB, + 0xB0C, 0x01003207, + 0xB10, 0x00009807, + 0xB14, 0x01000000, + 0xB18, 0x00000002, + 0xB1C, 0x00000002, + 0xB20, 0x0000001F, + 0xB24, 0x03020100, + 0xB28, 0x07060504, + 0xB2C, 0x0B0A0908, + 0xB30, 0x0F0E0D0C, + 0xB34, 0x13121110, + 0xB38, 0x17161514, + 0xB3C, 0x0000003A, + 0xB40, 0x00000000, + 0xB44, 0x00000000, + 0xB48, 0x13000032, + 0xB4C, 0x48080000, + 0xB50, 0x00000000, + 0xB54, 0x00000000, + 0xB58, 0x00000000, + 0xB5C, 0x00000000, + 0xC00, 0x00000007, + 0xC04, 0x00042020, + 0xC08, 0x80410231, + 0xC0C, 0x00000000, + 0xC10, 0x00000100, + 0xC14, 0x01000000, + 0xC1C, 0x40000003, + 0xC20, 0x2C2C2C2C, + 0xC24, 0x30303030, + 0xC28, 0x30303030, + 0xC2C, 0x2C2C2C2C, + 0xC30, 0x2C2C2C2C, + 0xC34, 0x2C2C2C2C, + 0xC38, 0x2C2C2C2C, + 0xC3C, 0x2A2A2A2A, + 0xC40, 0x2A2A2A2A, + 0xC44, 0x2A2A2A2A, + 0xC48, 0x2A2A2A2A, + 0xC4C, 0x2A2A2A2A, + 0xC50, 0x00000020, + 0xC54, 0x001C1208, + 0xC58, 0x30000C1C, + 0xC5C, 0x00000058, + 0xC60, 0x34344443, + 0xC64, 0x07003333, + 0xC68, 0x19791979, + 0xC6C, 0x19791979, + 0xC70, 0x19791979, + 0xC74, 0x19791979, + 0xC78, 0x19791979, + 0xC7C, 0x19791979, + 0xC80, 0x19791979, + 0xC84, 0x19791979, + 0xC94, 0x0100005C, + 0xC98, 0x00000000, + 0xC9C, 0x00000000, + 0xCA0, 0x00000029, + 0xCA4, 0x08040201, + 0xCA8, 0x80402010, + 0xCB0, 0x77775747, + 0xCB4, 0x10000077, + 0xCB8, 0x00508240, + +}; + +void +odm_read_and_config_mp_8821a_phy_reg( + struct dm_struct *dm +) +{ + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8821a_phy_reg) / sizeof(u32); + u32 *array = array_mp_8821a_phy_reg; + + u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_phy_reg\n"); + + while ((i + 1) < array_len) { + v1 = array[i]; + v2 = array[i + 1]; + + if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT(31)) {/* positive condition*/ + c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); + if (c_cond == COND_ENDIF) {/*end*/ + is_matched = true; + is_skipped = false; + PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); + } else if (c_cond == COND_ELSE) { /*else*/ + is_matched = is_skipped ? false : true; + PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT(30)) { /*negative condition*/ + if (is_skipped == false) { + if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { + is_matched = true; + is_skipped = true; + } else { + is_matched = false; + is_skipped = false; + } + } else + is_matched = false; + } + } else { + if (is_matched) + odm_config_bb_phy_8821a(dm, v1, MASKDWORD, v2); + } + i = i + 2; + } +} + +u32 +odm_get_version_mp_8821a_phy_reg(void) +{ + return 59; +} + +/****************************************************************************** +* PHY_REG_PG.TXT +******************************************************************************/ + +u32 array_mp_8821a_phy_reg_pg[] = { + 0, 0, 0, 0x00000c20, 0xffffffff, 0x32343638, + 0, 0, 0, 0x00000c24, 0xffffffff, 0x36363838, + 0, 0, 0, 0x00000c28, 0xffffffff, 0x28303234, + 0, 0, 0, 0x00000c2c, 0xffffffff, 0x34363838, + 0, 0, 0, 0x00000c30, 0xffffffff, 0x26283032, + 0, 0, 0, 0x00000c3c, 0xffffffff, 0x32343636, + 0, 0, 0, 0x00000c40, 0xffffffff, 0x24262830, + 0, 0, 0, 0x00000c44, 0x0000ffff, 0x00002022, + 1, 0, 0, 0x00000c24, 0xffffffff, 0x34343636, + 1, 0, 0, 0x00000c28, 0xffffffff, 0x26283032, + 1, 0, 0, 0x00000c2c, 0xffffffff, 0x32343636, + 1, 0, 0, 0x00000c30, 0xffffffff, 0x24262830, + 1, 0, 0, 0x00000c3c, 0xffffffff, 0x32343636, + 1, 0, 0, 0x00000c40, 0xffffffff, 0x24262830, + 1, 0, 0, 0x00000c44, 0x0000ffff, 0x00002022 +}; + +void +odm_read_and_config_mp_8821a_phy_reg_pg( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_phy_reg_pg) / sizeof(u32); + u32 *array = array_mp_8821a_phy_reg_pg; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrByRate = array_len / 6; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_phy_reg_pg\n"); + + dm->phy_reg_pg_version = 1; + dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; + + for (i = 0; i < array_len; i += 6) { + u32 v1 = array[i]; + u32 v2 = array[i + 1]; + u32 v3 = array[i + 2]; + u32 v4 = array[i + 3]; + u32 v5 = array[i + 4]; + u32 v6 = array[i + 5]; + + odm_config_bb_phy_reg_pg_8821a(dm, v1, v2, v3, v4, v5, v6); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6); +#endif + } +} + + + +/****************************************************************************** +* PHY_REG_PG_DNI_JP.TXT +******************************************************************************/ + +u32 array_mp_8821a_phy_reg_pg_dni_jp[] = { + 0, 0, 0, 0x00000c20, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c24, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c28, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c2c, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c30, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c3c, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c40, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c44, 0x0000ffff, 0x00002424, + 1, 0, 0, 0x00000c24, 0xffffffff, 0x23232323, + 1, 0, 0, 0x00000c28, 0xffffffff, 0x23232323, + 1, 0, 0, 0x00000c2c, 0xffffffff, 0x23232323, + 1, 0, 0, 0x00000c30, 0xffffffff, 0x23232323, + 1, 0, 0, 0x00000c3c, 0xffffffff, 0x23232323, + 1, 0, 0, 0x00000c40, 0xffffffff, 0x23232323, + 1, 0, 0, 0x00000c44, 0x0000ffff, 0x00002020 +}; + +void +odm_read_and_config_mp_8821a_phy_reg_pg_dni_jp( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_phy_reg_pg_dni_jp) / sizeof(u32); + u32 *array = array_mp_8821a_phy_reg_pg_dni_jp; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrByRate = array_len / 6; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_phy_reg_pg_dni_jp\n"); + + dm->phy_reg_pg_version = 1; + dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; + + for (i = 0; i < array_len; i += 6) { + u32 v1 = array[i]; + u32 v2 = array[i + 1]; + u32 v3 = array[i + 2]; + u32 v4 = array[i + 3]; + u32 v5 = array[i + 4]; + u32 v6 = array[i + 5]; + + odm_config_bb_phy_reg_pg_8821a(dm, v1, v2, v3, v4, v5, v6); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6); +#endif + } +} + + + +/****************************************************************************** +* PHY_REG_PG_DNI_US.TXT +******************************************************************************/ + +u32 array_mp_8821a_phy_reg_pg_dni_us[] = { + 0, 0, 0, 0x00000c20, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c24, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c28, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c2c, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c30, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c3c, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c40, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c44, 0x0000ffff, 0x00002424, + 1, 0, 0, 0x00000c24, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c28, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c2c, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c30, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c3c, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c40, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c44, 0x0000ffff, 0x00002020 +}; + +void +odm_read_and_config_mp_8821a_phy_reg_pg_dni_us( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_phy_reg_pg_dni_us) / sizeof(u32); + u32 *array = array_mp_8821a_phy_reg_pg_dni_us; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrByRate = array_len / 6; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_phy_reg_pg_dni_us\n"); + + dm->phy_reg_pg_version = 1; + dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; + + for (i = 0; i < array_len; i += 6) { + u32 v1 = array[i]; + u32 v2 = array[i + 1]; + u32 v3 = array[i + 2]; + u32 v4 = array[i + 3]; + u32 v5 = array[i + 4]; + u32 v6 = array[i + 5]; + + odm_config_bb_phy_reg_pg_8821a(dm, v1, v2, v3, v4, v5, v6); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6); +#endif + } +} + + + +/****************************************************************************** +* PHY_REG_PG_E202SA.TXT +******************************************************************************/ + +u32 array_mp_8821a_phy_reg_pg_e202sa[] = { + 0, 0, 0, 0x00000c20, 0xffffffff, 0x32323232, + 0, 0, 0, 0x00000c24, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c28, 0xffffffff, 0x28282828, + 0, 0, 0, 0x00000c2c, 0xffffffff, 0x22222222, + 0, 0, 0, 0x00000c30, 0xffffffff, 0x22222222, + 0, 0, 0, 0x00000c3c, 0xffffffff, 0x32343636, + 0, 0, 0, 0x00000c40, 0xffffffff, 0x24262830, + 0, 0, 0, 0x00000c44, 0x0000ffff, 0x00002022, + 1, 0, 0, 0x00000c24, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c28, 0xffffffff, 0x26262626, + 1, 0, 0, 0x00000c2c, 0xffffffff, 0x20202020, + 1, 0, 0, 0x00000c30, 0xffffffff, 0x20202020, + 1, 0, 0, 0x00000c3c, 0xffffffff, 0x16161616, + 1, 0, 0, 0x00000c40, 0xffffffff, 0x16161616, + 1, 0, 0, 0x00000c44, 0x0000ffff, 0x00001616 +}; + +void +odm_read_and_config_mp_8821a_phy_reg_pg_e202_sa( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_phy_reg_pg_e202sa) / sizeof(u32); + u32 *array = array_mp_8821a_phy_reg_pg_e202sa; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrByRate, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrByRate = array_len / 6; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_phy_reg_pg_e202_sa\n"); + + dm->phy_reg_pg_version = 1; + dm->phy_reg_pg_value_type = PHY_REG_PG_EXACT_VALUE; + + for (i = 0; i < array_len; i += 6) { + u32 v1 = array[i]; + u32 v2 = array[i + 1]; + u32 v3 = array[i + 2]; + u32 v4 = array[i + 3]; + u32 v5 = array[i + 4]; + u32 v6 = array[i + 5]; + + odm_config_bb_phy_reg_pg_8821a(dm, v1, v2, v3, v4, v5, v6); + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrByRate[i / 6], 100, "%s, %s, %s, 0x%X, 0x%08X, 0x%08X,", + (v1 == 0 ? "2.4G" : " 5G"), (v2 == 0 ? "A" : "B"), (v3 == 0 ? "1Tx" : "2Tx"), v4, v5, v6); +#endif + } +} + + + +#endif /* end of HWIMG_SUPPORT*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h new file mode 100644 index 00000000000000..791b7d19de292a --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_bb.h @@ -0,0 +1,83 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.18*/ +#if (RTL8821A_SUPPORT == 1) +#ifndef __INC_MP_BB_HW_IMG_8821A_H +#define __INC_MP_BB_HW_IMG_8821A_H + + +/****************************************************************************** +* AGC_TAB.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_agc_tab(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_agc_tab(void); + +/****************************************************************************** +* PHY_REG.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_phy_reg(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_phy_reg(void); + +/****************************************************************************** +* PHY_REG_PG.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_phy_reg_pg(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_phy_reg_pg(void); + +/****************************************************************************** +* PHY_REG_PG_DNI_JP.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_phy_reg_pg_dni_jp(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_phy_reg_pg_dni_jp(void); + +/****************************************************************************** +* PHY_REG_PG_DNI_US.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_phy_reg_pg_dni_us(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_phy_reg_pg_dni_us(void); + +/****************************************************************************** +* PHY_REG_PG_E202SA.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_phy_reg_pg_e202_sa(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_phy_reg_pg_e202sa(void); + +#endif +#endif /* end of HWIMG_SUPPORT*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c new file mode 100644 index 00000000000000..b93be49b662b22 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.c @@ -0,0 +1,279 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.18*/ +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8821A_SUPPORT == 1) +static boolean +check_positive( + struct dm_struct *dm, + const u32 condition1, + const u32 condition2, + const u32 condition3, + const u32 condition4 +) +{ + u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ + ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ + ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ + ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ + ((dm->board_type & BIT(2)) >> 2) << 4; /* _BT*/ + + u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; + u32 driver1 = dm->cut_version << 24 | + (dm->support_interface & 0xF0) << 16 | + dm->support_platform << 16 | + dm->package_type << 12 | + (dm->support_interface & 0x0F) << 8 | + _board_type; + + u32 driver2 = (dm->type_glna & 0xFF) << 0 | + (dm->type_gpa & 0xFF) << 8 | + (dm->type_alna & 0xFF) << 16 | + (dm->type_apa & 0xFF) << 24; + + u32 driver3 = 0; + + u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | + (dm->type_gpa & 0xFF00) | + (dm->type_alna & 0xFF00) << 8 | + (dm->type_apa & 0xFF00) << 16; + + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + + PHYDM_DBG(dm, ODM_COMP_INIT, + " (Platform, Interface) = (0x%X, 0x%X)\n", dm->support_platform, dm->support_interface); + PHYDM_DBG(dm, ODM_COMP_INIT, + " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, dm->package_type); + + + /*============== value Defined Check ===============*/ + /*QFN type [15:12] and cut version [27:24] need to do value check*/ + + if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return false; + if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return false; + + /*=============== Bit Defined Check ================*/ + /* We don't care [31:28] */ + + cond1 &= 0x00FF0FFF; + driver1 &= 0x00FF0FFF; + + if ((cond1 & driver1) == cond1) { + u32 bit_mask = 0; + + if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ + return true; + + if ((cond1 & BIT(0)) != 0) /*GLNA*/ + bit_mask |= 0x000000FF; + if ((cond1 & BIT(1)) != 0) /*GPA*/ + bit_mask |= 0x0000FF00; + if ((cond1 & BIT(2)) != 0) /*ALNA*/ + bit_mask |= 0x00FF0000; + if ((cond1 & BIT(3)) != 0) /*APA*/ + bit_mask |= 0xFF000000; + + if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask))) /* board_type of each RF path is matched*/ + return true; + else + return false; + } else + return false; +} +static boolean +check_negative( + struct dm_struct *dm, + const u32 condition1, + const u32 condition2 +) +{ + return true; +} + +/****************************************************************************** +* MAC_REG.TXT +******************************************************************************/ + +u32 array_mp_8821a_mac_reg[] = { + 0x421, 0x0000000F, + 0x428, 0x0000000A, + 0x429, 0x00000010, + 0x430, 0x00000000, + 0x431, 0x00000000, + 0x432, 0x00000000, + 0x433, 0x00000001, + 0x434, 0x00000004, + 0x435, 0x00000005, + 0x436, 0x00000007, + 0x437, 0x00000008, + 0x43C, 0x00000004, + 0x43D, 0x00000005, + 0x43E, 0x00000007, + 0x43F, 0x00000008, + 0x440, 0x0000005D, + 0x441, 0x00000001, + 0x442, 0x00000000, + 0x444, 0x00000010, + 0x445, 0x00000000, + 0x446, 0x00000000, + 0x447, 0x00000000, + 0x448, 0x00000000, + 0x449, 0x000000F0, + 0x44A, 0x0000000F, + 0x44B, 0x0000003E, + 0x44C, 0x00000010, + 0x44D, 0x00000000, + 0x44E, 0x00000000, + 0x44F, 0x00000000, + 0x450, 0x00000000, + 0x451, 0x000000F0, + 0x452, 0x0000000F, + 0x453, 0x00000000, + 0x456, 0x0000005E, + 0x460, 0x00000066, + 0x461, 0x00000066, + 0x4C8, 0x0000003F, + 0x4C9, 0x000000FF, + 0x4CC, 0x000000FF, + 0x4CD, 0x000000FF, + 0x4CE, 0x00000001, + 0x500, 0x00000026, + 0x501, 0x000000A2, + 0x502, 0x0000002F, + 0x503, 0x00000000, + 0x504, 0x00000028, + 0x505, 0x000000A3, + 0x506, 0x0000005E, + 0x507, 0x00000000, + 0x508, 0x0000002B, + 0x509, 0x000000A4, + 0x50A, 0x0000005E, + 0x50B, 0x00000000, + 0x50C, 0x0000004F, + 0x50D, 0x000000A4, + 0x50E, 0x00000000, + 0x50F, 0x00000000, + 0x512, 0x0000001C, + 0x514, 0x0000000A, + 0x516, 0x0000000A, + 0x525, 0x0000004F, + 0x550, 0x00000010, + 0x551, 0x00000010, + 0x559, 0x00000002, + 0x55C, 0x00000050, + 0x55D, 0x000000FF, + 0x605, 0x00000030, + 0x607, 0x00000007, + 0x608, 0x0000000E, + 0x609, 0x0000002A, + 0x620, 0x000000FF, + 0x621, 0x000000FF, + 0x622, 0x000000FF, + 0x623, 0x000000FF, + 0x624, 0x000000FF, + 0x625, 0x000000FF, + 0x626, 0x000000FF, + 0x627, 0x000000FF, + 0x638, 0x00000050, + 0x63C, 0x0000000A, + 0x63D, 0x0000000A, + 0x63E, 0x0000000E, + 0x63F, 0x0000000E, + 0x640, 0x00000040, + 0x642, 0x00000040, + 0x643, 0x00000000, + 0x652, 0x000000C8, + 0x66E, 0x00000005, + 0x700, 0x00000021, + 0x701, 0x00000043, + 0x702, 0x00000065, + 0x703, 0x00000087, + 0x708, 0x00000021, + 0x709, 0x00000043, + 0x70A, 0x00000065, + 0x70B, 0x00000087, + 0x718, 0x00000040, + +}; + +void +odm_read_and_config_mp_8821a_mac_reg( + struct dm_struct *dm +) +{ + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8821a_mac_reg) / sizeof(u32); + u32 *array = array_mp_8821a_mac_reg; + + u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_mac_reg\n"); + + while ((i + 1) < array_len) { + v1 = array[i]; + v2 = array[i + 1]; + + if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT(31)) {/* positive condition*/ + c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); + if (c_cond == COND_ENDIF) {/*end*/ + is_matched = true; + is_skipped = false; + PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); + } else if (c_cond == COND_ELSE) { /*else*/ + is_matched = is_skipped ? false : true; + PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT(30)) { /*negative condition*/ + if (is_skipped == false) { + if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { + is_matched = true; + is_skipped = true; + } else { + is_matched = false; + is_skipped = false; + } + } else + is_matched = false; + } + } else { + if (is_matched) + odm_config_mac_8821a(dm, v1, (u8)v2); + } + i = i + 2; + } +} + +u32 +odm_get_version_mp_8821a_mac_reg(void) +{ + return 59; +} + +#endif /* end of HWIMG_SUPPORT*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_sreset.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h similarity index 56% rename from drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_sreset.h rename to drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h index fe56567e739683..35665a4d1fc380 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_sreset.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_mac.h @@ -12,13 +12,22 @@ * more details. * *****************************************************************************/ -#ifndef _RTL8188F_SRESET_H_ -#define _RTL8188F_SRESET_H_ -#include +/*Image2HeaderVersion: 2.18*/ +#if (RTL8821A_SUPPORT == 1) +#ifndef __INC_MP_MAC_HW_IMG_8821A_H +#define __INC_MP_MAC_HW_IMG_8821A_H + + +/****************************************************************************** +* MAC_REG.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_mac_reg(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_mac_reg(void); -#ifdef DBG_CONFIG_ERROR_DETECT -extern void rtl8188f_sreset_xmit_status_check(_adapter *padapter); -extern void rtl8188f_sreset_linked_status_check(_adapter *padapter); -#endif #endif +#endif /* end of HWIMG_SUPPORT*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c new file mode 100644 index 00000000000000..05b004bd4db593 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.c @@ -0,0 +1,5457 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.18*/ +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8821A_SUPPORT == 1) +static boolean +check_positive( + struct dm_struct *dm, + const u32 condition1, + const u32 condition2, + const u32 condition3, + const u32 condition4 +) +{ + u8 _board_type = ((dm->board_type & BIT(4)) >> 4) << 0 | /* _GLNA*/ + ((dm->board_type & BIT(3)) >> 3) << 1 | /* _GPA*/ + ((dm->board_type & BIT(7)) >> 7) << 2 | /* _ALNA*/ + ((dm->board_type & BIT(6)) >> 6) << 3 | /* _APA */ + ((dm->board_type & BIT(2)) >> 2) << 4; /* _BT*/ + + u32 cond1 = condition1, cond2 = condition2, cond3 = condition3, cond4 = condition4; + u32 driver1 = dm->cut_version << 24 | + (dm->support_interface & 0xF0) << 16 | + dm->support_platform << 16 | + dm->package_type << 12 | + (dm->support_interface & 0x0F) << 8 | + _board_type; + + u32 driver2 = (dm->type_glna & 0xFF) << 0 | + (dm->type_gpa & 0xFF) << 8 | + (dm->type_alna & 0xFF) << 16 | + (dm->type_apa & 0xFF) << 24; + + u32 driver3 = 0; + + u32 driver4 = (dm->type_glna & 0xFF00) >> 8 | + (dm->type_gpa & 0xFF00) | + (dm->type_alna & 0xFF00) << 8 | + (dm->type_apa & 0xFF00) << 16; + + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> check_positive (cond1, cond2, cond3, cond4) = (0x%X 0x%X 0x%X 0x%X)\n", cond1, cond2, cond3, cond4); + PHYDM_DBG(dm, ODM_COMP_INIT, + "===> check_positive (driver1, driver2, driver3, driver4) = (0x%X 0x%X 0x%X 0x%X)\n", driver1, driver2, driver3, driver4); + + PHYDM_DBG(dm, ODM_COMP_INIT, + " (Platform, Interface) = (0x%X, 0x%X)\n", dm->support_platform, dm->support_interface); + PHYDM_DBG(dm, ODM_COMP_INIT, + " (Board, Package) = (0x%X, 0x%X)\n", dm->board_type, dm->package_type); + + + /*============== value Defined Check ===============*/ + /*QFN type [15:12] and cut version [27:24] need to do value check*/ + + if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) + return false; + if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) + return false; + + /*=============== Bit Defined Check ================*/ + /* We don't care [31:28] */ + + cond1 &= 0x00FF0FFF; + driver1 &= 0x00FF0FFF; + + if ((cond1 & driver1) == cond1) { + u32 bit_mask = 0; + + if ((cond1 & 0x0F) == 0) /* board_type is DONTCARE*/ + return true; + + if ((cond1 & BIT(0)) != 0) /*GLNA*/ + bit_mask |= 0x000000FF; + if ((cond1 & BIT(1)) != 0) /*GPA*/ + bit_mask |= 0x0000FF00; + if ((cond1 & BIT(2)) != 0) /*ALNA*/ + bit_mask |= 0x00FF0000; + if ((cond1 & BIT(3)) != 0) /*APA*/ + bit_mask |= 0xFF000000; + + if (((cond2 & bit_mask) == (driver2 & bit_mask)) && ((cond4 & bit_mask) == (driver4 & bit_mask))) /* board_type of each RF path is matched*/ + return true; + else + return false; + } else + return false; +} +static boolean +check_negative( + struct dm_struct *dm, + const u32 condition1, + const u32 condition2 +) +{ + return true; +} + +/****************************************************************************** +* RadioA.TXT +******************************************************************************/ + +u32 array_mp_8821a_radioa[] = { + 0x018, 0x0001712A, + 0x056, 0x00051CF2, + 0x066, 0x00040000, + 0x000, 0x00010000, + 0x01E, 0x00080000, + 0x082, 0x00000830, + 0x083, 0x00021800, + 0x084, 0x00028000, + 0x085, 0x00048000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x086, 0x0009483A, + 0xA0000000, 0x00000000, + 0x086, 0x00094838, + 0xB0000000, 0x00000000, + 0x087, 0x00044980, + 0x088, 0x00048000, + 0x089, 0x0000D480, + 0x08A, 0x00042240, + 0x08B, 0x000F0380, + 0x08C, 0x00090000, + 0x08D, 0x00022852, + 0x08E, 0x00065540, + 0x08F, 0x00088001, + 0x0EF, 0x00020000, + 0x03E, 0x00000380, + 0x03F, 0x00090018, + 0x03E, 0x00020380, + 0x03F, 0x000A0018, + 0x03E, 0x00040308, + 0x03F, 0x000A0018, + 0x03E, 0x00060018, + 0x03F, 0x000A0018, + 0x0EF, 0x00000000, + 0x018, 0x0001712A, + 0x089, 0x00000080, + 0x08B, 0x00080180, + 0x0EF, 0x00001000, + 0x03A, 0x00000244, + 0x03B, 0x00038027, + 0x03C, 0x00082000, + 0x03A, 0x00000244, + 0x03B, 0x00030113, + 0x03C, 0x00082000, + 0x03A, 0x0000014C, + 0x03B, 0x00028027, + 0x03C, 0x00082000, + 0x03A, 0x000000CC, + 0x03B, 0x00027027, + 0x03C, 0x00042000, + 0x03A, 0x0000014C, + 0x03B, 0x0001F913, + 0x03C, 0x00042000, + 0x03A, 0x0000010C, + 0x03B, 0x00017F10, + 0x03C, 0x00012000, + 0x03A, 0x000000D0, + 0x03B, 0x00008027, + 0x03C, 0x000CA000, + 0x03A, 0x00000244, + 0x03B, 0x00078027, + 0x03C, 0x00082000, + 0x03A, 0x00000244, + 0x03B, 0x00070113, + 0x03C, 0x00082000, + 0x03A, 0x0000014C, + 0x03B, 0x00068027, + 0x03C, 0x00082000, + 0x03A, 0x000000CC, + 0x03B, 0x00067027, + 0x03C, 0x00042000, + 0x03A, 0x0000014C, + 0x03B, 0x0005F913, + 0x03C, 0x00042000, + 0x03A, 0x0000010C, + 0x03B, 0x00057F10, + 0x03C, 0x00012000, + 0x03A, 0x000000D0, + 0x03B, 0x00048027, + 0x03C, 0x000CA000, + 0x03A, 0x00000244, + 0x03B, 0x000B8027, + 0x03C, 0x00082000, + 0x03A, 0x00000244, + 0x03B, 0x000B0113, + 0x03C, 0x00082000, + 0x03A, 0x0000014C, + 0x03B, 0x000A8027, + 0x03C, 0x00082000, + 0x03A, 0x000000CC, + 0x03B, 0x000A7027, + 0x03C, 0x00042000, + 0x03A, 0x0000014C, + 0x03B, 0x0009F913, + 0x03C, 0x00042000, + 0x03A, 0x0000010C, + 0x03B, 0x00097F10, + 0x03C, 0x00012000, + 0x03A, 0x000000D0, + 0x03B, 0x00088027, + 0x03C, 0x000CA000, + 0x0EF, 0x00000000, + 0x0EF, 0x00001100, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004ADF3, + 0x034, 0x00049DF0, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004ADF3, + 0x034, 0x00049DF0, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004ADF5, + 0x034, 0x00049DF2, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004A0F3, + 0x034, 0x000490B1, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004A0F3, + 0x034, 0x000490B1, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004ADF5, + 0x034, 0x00049DF2, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0004ADF3, + 0x034, 0x00049DF0, + 0xA0000000, 0x00000000, + 0x034, 0x0004ADF7, + 0x034, 0x00049DF3, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00048DED, + 0x034, 0x00047DEA, + 0x034, 0x00046DE7, + 0x034, 0x00045CE9, + 0x034, 0x00044CE6, + 0x034, 0x000438C6, + 0x034, 0x00042886, + 0x034, 0x00041486, + 0x034, 0x00040447, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00048DED, + 0x034, 0x00047DEA, + 0x034, 0x00046DE7, + 0x034, 0x00045CE9, + 0x034, 0x00044CE6, + 0x034, 0x000438C6, + 0x034, 0x00042886, + 0x034, 0x00041486, + 0x034, 0x00040447, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000480AE, + 0x034, 0x000470AB, + 0x034, 0x0004608B, + 0x034, 0x00045069, + 0x034, 0x00044048, + 0x034, 0x00043045, + 0x034, 0x00042026, + 0x034, 0x00041023, + 0x034, 0x00040002, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000480AE, + 0x034, 0x000470AB, + 0x034, 0x0004608B, + 0x034, 0x00045069, + 0x034, 0x00044048, + 0x034, 0x00043045, + 0x034, 0x00042026, + 0x034, 0x00041023, + 0x034, 0x00040002, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00048DED, + 0x034, 0x00047DEA, + 0x034, 0x00046DE7, + 0x034, 0x00045CE9, + 0x034, 0x00044CE6, + 0x034, 0x000438C6, + 0x034, 0x00042886, + 0x034, 0x00041486, + 0x034, 0x00040447, + 0xA0000000, 0x00000000, + 0x034, 0x00048DEF, + 0x034, 0x00047DEC, + 0x034, 0x00046DE9, + 0x034, 0x00045CCB, + 0x034, 0x0004488D, + 0x034, 0x0004348D, + 0x034, 0x0004248A, + 0x034, 0x0004108D, + 0x034, 0x0004008A, + 0xB0000000, 0x00000000, + 0x80000210, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0002ADF4, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0002A0F3, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0002A0F3, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0002ADF4, + 0xA0000000, 0x00000000, + 0x034, 0x0002ADF7, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00029DF4, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00029DF4, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00029DF1, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000290F0, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000290F0, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00029DF1, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00029DF4, + 0xA0000000, 0x00000000, + 0x034, 0x00029DF2, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00028DF1, + 0x034, 0x00027DEE, + 0x034, 0x00026DEB, + 0x034, 0x00025CEC, + 0x034, 0x00024CE9, + 0x034, 0x000238CA, + 0x034, 0x00022889, + 0x034, 0x00021489, + 0x034, 0x0002044A, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00028DF1, + 0x034, 0x00027DEE, + 0x034, 0x00026DEB, + 0x034, 0x00025CEC, + 0x034, 0x00024CE9, + 0x034, 0x000238CA, + 0x034, 0x00022889, + 0x034, 0x00021489, + 0x034, 0x0002044A, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000280AF, + 0x034, 0x000270AC, + 0x034, 0x0002608B, + 0x034, 0x00025069, + 0x034, 0x00024048, + 0x034, 0x00023045, + 0x034, 0x00022026, + 0x034, 0x00021023, + 0x034, 0x00020002, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x000280AF, + 0x034, 0x000270AC, + 0x034, 0x0002608B, + 0x034, 0x00025069, + 0x034, 0x00024048, + 0x034, 0x00023045, + 0x034, 0x00022026, + 0x034, 0x00021023, + 0x034, 0x00020002, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00028DF1, + 0x034, 0x00027DEE, + 0x034, 0x00026DEB, + 0x034, 0x00025CEC, + 0x034, 0x00024CE9, + 0x034, 0x000238CA, + 0x034, 0x00022889, + 0x034, 0x00021489, + 0x034, 0x0002044A, + 0xA0000000, 0x00000000, + 0x034, 0x00028DEE, + 0x034, 0x00027DEB, + 0x034, 0x00026CCD, + 0x034, 0x00025CCA, + 0x034, 0x0002488C, + 0x034, 0x0002384C, + 0x034, 0x00022849, + 0x034, 0x00021449, + 0x034, 0x0002004D, + 0xB0000000, 0x00000000, + 0x8000020c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0000A0D7, + 0x034, 0x000090D3, + 0x034, 0x000080B1, + 0x034, 0x000070AE, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0000A0D7, + 0x034, 0x000090D3, + 0x034, 0x000080B1, + 0x034, 0x000070AE, + 0xA0000000, 0x00000000, + 0x034, 0x0000ADF7, + 0x034, 0x00009DF4, + 0x034, 0x00008DF1, + 0x034, 0x00007DEE, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00006DEB, + 0x034, 0x00005CEC, + 0x034, 0x00004CE9, + 0x034, 0x000038CA, + 0x034, 0x00002889, + 0x034, 0x00001489, + 0x034, 0x0000044A, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00006DEB, + 0x034, 0x00005CEC, + 0x034, 0x00004CE9, + 0x034, 0x000038CA, + 0x034, 0x00002889, + 0x034, 0x00001489, + 0x034, 0x0000044A, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0000608D, + 0x034, 0x0000506B, + 0x034, 0x0000404A, + 0x034, 0x00003047, + 0x034, 0x00002044, + 0x034, 0x00001025, + 0x034, 0x00000004, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x0000608D, + 0x034, 0x0000506B, + 0x034, 0x0000404A, + 0x034, 0x00003047, + 0x034, 0x00002044, + 0x034, 0x00001025, + 0x034, 0x00000004, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x034, 0x00006DEB, + 0x034, 0x00005CEC, + 0x034, 0x00004CE9, + 0x034, 0x000038CA, + 0x034, 0x00002889, + 0x034, 0x00001489, + 0x034, 0x0000044A, + 0xA0000000, 0x00000000, + 0x034, 0x00006DCD, + 0x034, 0x00005CCD, + 0x034, 0x00004CCA, + 0x034, 0x0000388C, + 0x034, 0x00002888, + 0x034, 0x00001488, + 0x034, 0x00000486, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000040, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x00000187, + 0x035, 0x00008187, + 0x035, 0x00010187, + 0x035, 0x00020188, + 0x035, 0x00028188, + 0x035, 0x00030188, + 0x035, 0x00040188, + 0x035, 0x00048188, + 0x035, 0x00050188, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x00000187, + 0x035, 0x00008187, + 0x035, 0x00010187, + 0x035, 0x00020188, + 0x035, 0x00028188, + 0x035, 0x00030188, + 0x035, 0x00040188, + 0x035, 0x00048188, + 0x035, 0x00050188, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x00000128, + 0x035, 0x00008128, + 0x035, 0x00010128, + 0x035, 0x000201C8, + 0x035, 0x000281C8, + 0x035, 0x000301C8, + 0x035, 0x000401C8, + 0x035, 0x000481C8, + 0x035, 0x000501C8, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x00000145, + 0x035, 0x00008145, + 0x035, 0x00010145, + 0x035, 0x00020196, + 0x035, 0x00028196, + 0x035, 0x00030196, + 0x035, 0x000401C7, + 0x035, 0x000481C7, + 0x035, 0x000501C7, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x00000128, + 0x035, 0x00008128, + 0x035, 0x00010128, + 0x035, 0x000201C8, + 0x035, 0x000281C8, + 0x035, 0x000301C8, + 0x035, 0x000401C8, + 0x035, 0x000481C8, + 0x035, 0x000501C8, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x035, 0x00000187, + 0x035, 0x00008187, + 0x035, 0x00010187, + 0x035, 0x00020188, + 0x035, 0x00028188, + 0x035, 0x00030188, + 0x035, 0x00040188, + 0x035, 0x00048188, + 0x035, 0x00050188, + 0xA0000000, 0x00000000, + 0x035, 0x00000145, + 0x035, 0x00008145, + 0x035, 0x00010145, + 0x035, 0x00020196, + 0x035, 0x00028196, + 0x035, 0x00030196, + 0x035, 0x000401C7, + 0x035, 0x000481C7, + 0x035, 0x000501C7, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000010, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x00085733, + 0x036, 0x0008D733, + 0x036, 0x00095733, + 0x036, 0x0009D733, + 0x036, 0x000A64B4, + 0x036, 0x000AE4B4, + 0x036, 0x000B64B4, + 0x036, 0x000BE4B4, + 0x036, 0x000C64B4, + 0x036, 0x000CE4B4, + 0x036, 0x000D64B4, + 0x036, 0x000DE4B4, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x00085733, + 0x036, 0x0008D733, + 0x036, 0x00095733, + 0x036, 0x0009D733, + 0x036, 0x000A64B4, + 0x036, 0x000AE4B4, + 0x036, 0x000B64B4, + 0x036, 0x000BE4B4, + 0x036, 0x000C64B4, + 0x036, 0x000CE4B4, + 0x036, 0x000D64B4, + 0x036, 0x000DE4B4, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x000063B5, + 0x036, 0x0000E3B5, + 0x036, 0x000163B5, + 0x036, 0x0001E3B5, + 0x036, 0x000263B5, + 0x036, 0x0002E3B5, + 0x036, 0x000363B5, + 0x036, 0x0003E3B5, + 0x036, 0x000463B5, + 0x036, 0x0004E3B5, + 0x036, 0x000563B5, + 0x036, 0x0005E3B5, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x000056B3, + 0x036, 0x0000D6B3, + 0x036, 0x000156B3, + 0x036, 0x0001D6B3, + 0x036, 0x00026634, + 0x036, 0x0002E634, + 0x036, 0x00036634, + 0x036, 0x0003E634, + 0x036, 0x000467B4, + 0x036, 0x0004E7B4, + 0x036, 0x000567B4, + 0x036, 0x0005E7B4, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x000063B5, + 0x036, 0x0000E3B5, + 0x036, 0x000163B5, + 0x036, 0x0001E3B5, + 0x036, 0x000263B5, + 0x036, 0x0002E3B5, + 0x036, 0x000363B5, + 0x036, 0x0003E3B5, + 0x036, 0x000463B5, + 0x036, 0x0004E3B5, + 0x036, 0x000563B5, + 0x036, 0x0005E3B5, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x036, 0x00085733, + 0x036, 0x0008D733, + 0x036, 0x00095733, + 0x036, 0x0009D733, + 0x036, 0x000A64B4, + 0x036, 0x000AE4B4, + 0x036, 0x000B64B4, + 0x036, 0x000BE4B4, + 0x036, 0x000C64B4, + 0x036, 0x000CE4B4, + 0x036, 0x000D64B4, + 0x036, 0x000DE4B4, + 0xA0000000, 0x00000000, + 0x036, 0x000056B3, + 0x036, 0x0000D6B3, + 0x036, 0x000156B3, + 0x036, 0x0001D6B3, + 0x036, 0x00026634, + 0x036, 0x0002E634, + 0x036, 0x00036634, + 0x036, 0x0003E634, + 0x036, 0x000467B4, + 0x036, 0x0004E7B4, + 0x036, 0x000567B4, + 0x036, 0x0005E7B4, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0EF, 0x00000008, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x000001C8, + 0x03C, 0x00000492, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x000001C8, + 0x03C, 0x00000492, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x000001B6, + 0x03C, 0x00000492, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x0000022A, + 0x03C, 0x00000594, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x000001B6, + 0x03C, 0x00000492, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x000001C8, + 0x03C, 0x00000492, + 0xA0000000, 0x00000000, + 0x03C, 0x0000022A, + 0x03C, 0x00000594, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000800, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000800, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000800, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000820, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000820, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000800, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x03C, 0x00000800, + 0xA0000000, 0x00000000, + 0x03C, 0x00000900, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x018, 0x0001712A, + 0x0EF, 0x00000002, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x008, 0x0004E400, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x008, 0x0004E400, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x008, 0x00002000, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x008, 0x00002000, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x008, 0x00002000, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x008, 0x00002000, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x008, 0x0004E400, + 0xA0000000, 0x00000000, + 0x008, 0x00002000, + 0xB0000000, 0x00000000, + 0x0EF, 0x00000000, + 0x0DF, 0x000000C0, + 0x01F, 0x00000064, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x058, 0x000A7284, + 0x059, 0x000600EC, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x058, 0x000A7284, + 0x059, 0x000600EC, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x058, 0x00081184, + 0x059, 0x0006016C, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x058, 0x00081184, + 0x059, 0x0006016C, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x058, 0x00081184, + 0x059, 0x0006016C, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x058, 0x000A7284, + 0x059, 0x000600EC, + 0xA0000000, 0x00000000, + 0x058, 0x00081184, + 0x059, 0x0006016C, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x061, 0x000E8D73, + 0x062, 0x00093FC5, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x061, 0x000E8D73, + 0x062, 0x00093FC5, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x061, 0x000EFD83, + 0x062, 0x00093FCC, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x061, 0x000EAD53, + 0x062, 0x00093BC4, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x061, 0x000EFD83, + 0x062, 0x00093FCC, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x061, 0x000E8D73, + 0x062, 0x00093FC5, + 0xA0000000, 0x00000000, + 0x061, 0x000EAD53, + 0x062, 0x00093BC4, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000110E9, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000110E9, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000110EB, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000110E9, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000110E9, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000110EB, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x063, 0x000110E9, + 0xA0000000, 0x00000000, + 0x063, 0x000714E9, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x064, 0x0001C27C, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x064, 0x0001C27C, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x064, 0x0001C27C, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x064, 0x0001C67C, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x064, 0x0001C27C, + 0x90000410, 0x00000000, 0x40000000, 0x00000000, + 0x064, 0x0001C27C, + 0xA0000000, 0x00000000, + 0x064, 0x0001C67C, + 0xB0000000, 0x00000000, + 0x80000111, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x00091016, + 0x90000110, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x00091016, + 0x90000210, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x00093016, + 0x9000020c, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x00093015, + 0x9000040c, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x00093015, + 0x90000200, 0x00000000, 0x40000000, 0x00000000, + 0x065, 0x00093016, + 0xA0000000, 0x00000000, + 0x065, 0x00091016, + 0xB0000000, 0x00000000, + 0x018, 0x00000006, + 0x0EF, 0x00002000, + 0x03B, 0x0003824B, + 0x03B, 0x0003024B, + 0x03B, 0x0002844B, + 0x03B, 0x00020F4B, + 0x03B, 0x00018F4B, + 0x03B, 0x000104B2, + 0x03B, 0x00008049, + 0x03B, 0x00000148, + 0x03B, 0x0007824B, + 0x03B, 0x0007024B, + 0x03B, 0x0006824B, + 0x03B, 0x00060F4B, + 0x03B, 0x00058F4B, + 0x03B, 0x000504B2, + 0x03B, 0x00048049, + 0x03B, 0x00040148, + 0x0EF, 0x00000000, + 0x0EF, 0x00000100, + 0x034, 0x0000ADF3, + 0x034, 0x00009DF0, + 0x034, 0x00008D70, + 0x034, 0x00007D6D, + 0x034, 0x00006CEE, + 0x034, 0x00005CCC, + 0x034, 0x000044EC, + 0x034, 0x000034AC, + 0x034, 0x0000246D, + 0x034, 0x0000106F, + 0x034, 0x0000006C, + 0x0EF, 0x00000000, + 0x0ED, 0x00000010, + 0x044, 0x0000ADF2, + 0x044, 0x00009DEF, + 0x044, 0x00008DEC, + 0x044, 0x00007DE9, + 0x044, 0x00006CEC, + 0x044, 0x00005CE9, + 0x044, 0x000044EC, + 0x044, 0x000034E9, + 0x044, 0x0000246C, + 0x044, 0x00001469, + 0x044, 0x0000006C, + 0x0ED, 0x00000000, + 0x0ED, 0x00000001, + 0x040, 0x00038DA7, + 0x040, 0x000300C2, + 0x040, 0x000288E2, + 0x040, 0x000200B8, + 0x040, 0x000188A5, + 0x040, 0x00010FBC, + 0x040, 0x00008F71, + 0x040, 0x00000240, + 0x0ED, 0x00000000, + 0x0EF, 0x000020A2, + 0x0DF, 0x00000080, + 0x035, 0x00000120, + 0x035, 0x00008120, + 0x035, 0x00010120, + 0x036, 0x00000085, + 0x036, 0x00008085, + 0x036, 0x00010085, + 0x036, 0x00018085, + 0x0EF, 0x00000000, + 0x051, 0x00000C31, + 0x052, 0x00000622, + 0x053, 0x000FC70B, + 0x054, 0x0000017E, + 0x056, 0x00051DF3, + 0x051, 0x00000C01, + 0x052, 0x000006D6, + 0x053, 0x000FC649, + 0x070, 0x00049661, + 0x071, 0x0007843E, + 0x072, 0x00000382, + 0x074, 0x00051400, + 0x035, 0x00000160, + 0x035, 0x00008160, + 0x035, 0x00010160, + 0x036, 0x00000124, + 0x036, 0x00008124, + 0x036, 0x00010124, + 0x036, 0x00018124, + 0x0ED, 0x0000000C, + 0x045, 0x00000140, + 0x045, 0x00008140, + 0x045, 0x00010140, + 0x046, 0x00000124, + 0x046, 0x00008124, + 0x046, 0x00010124, + 0x046, 0x00018124, + 0x0DF, 0x00000088, + 0x0B3, 0x000F0E18, + 0x0B4, 0x0001214C, + 0x0B7, 0x0003000C, + 0x01C, 0x000539D2, + 0x0C4, 0x000AFE00, + 0x018, 0x0001F12A, + 0xFFE, 0x00000000, + 0xFFE, 0x00000000, + 0x018, 0x0001712A, + +}; + +void +odm_read_and_config_mp_8821a_radioa( + struct dm_struct *dm +) +{ + u32 i = 0; + u8 c_cond; + boolean is_matched = true, is_skipped = false; + u32 array_len = sizeof(array_mp_8821a_radioa) / sizeof(u32); + u32 *array = array_mp_8821a_radioa; + + u32 v1 = 0, v2 = 0, pre_v1 = 0, pre_v2 = 0; + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_radioa\n"); + + while ((i + 1) < array_len) { + v1 = array[i]; + v2 = array[i + 1]; + + if (v1 & (BIT(31) | BIT30)) {/*positive & negative condition*/ + if (v1 & BIT(31)) {/* positive condition*/ + c_cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28); + if (c_cond == COND_ENDIF) {/*end*/ + is_matched = true; + is_skipped = false; + PHYDM_DBG(dm, ODM_COMP_INIT, "ENDIF\n"); + } else if (c_cond == COND_ELSE) { /*else*/ + is_matched = is_skipped ? false : true; + PHYDM_DBG(dm, ODM_COMP_INIT, "ELSE\n"); + } else {/*if , else if*/ + pre_v1 = v1; + pre_v2 = v2; + PHYDM_DBG(dm, ODM_COMP_INIT, "IF or ELSE IF\n"); + } + } else if (v1 & BIT(30)) { /*negative condition*/ + if (is_skipped == false) { + if (check_positive(dm, pre_v1, pre_v2, v1, v2)) { + is_matched = true; + is_skipped = true; + } else { + is_matched = false; + is_skipped = false; + } + } else + is_matched = false; + } + } else { + if (is_matched) + odm_config_rf_radio_a_8821a(dm, v1, v2); + } + i = i + 2; + } +} + +u32 +odm_get_version_mp_8821a_radioa(void) +{ + return 59; +} + +/****************************************************************************** +* TxPowerTrack_AP.TXT +******************************************************************************/ + +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) +u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_ap_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, +}; +u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_ap_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 17, 17, 18, 19, 20, 20, 20}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 19, 20, 20, 20}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, +}; +u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_ap_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 2, 3, 3, 4, 4, 5, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 14, 14, 14, 14, 14}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 6, 7, 7, 8, 8, 9, 10, 11, 11, 12, 13, 13, 14, 15, 16, 16, 16, 16, 16, 16, 16}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_ap_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 1, 1, 2, 2, 3, 4, 5, 5, 6, 7, 8, 8, 9, 10, 11, 11, 12, 13, 14, 14, 15, 15, 16, 16, 17, 18, 19, 19, 19}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, + {0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 17, 18, 18, 19, 20, 21, 21, 21}, +}; +u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_ap_8821a[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; +u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_ap_8821a[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; +u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_ap_8821a[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; +u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_ap_8821a[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_ap_8821a[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 9, 9, 9, 9, 10, 10, 10, 10, 11, 11}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_ap_8821a[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_ap_8821a[] = {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 5, 6, 6, 6, 7, 8, 8, 9, 9, 9, 10, 10, 10, 10, 11, 11}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_ap_8821a[] = {0, 0, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 9, 9, 9}; +#endif + +void +odm_read_and_config_mp_8821a_txpowertrack_ap( + struct dm_struct *dm +) +{ +#if (DM_ODM_SUPPORT_TYPE & (ODM_AP)) + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8821A\n"); + + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_ap_8821a, DELTA_SWINGIDX_SIZE * 3); +#endif +} + +/****************************************************************************** +* TxPowerTrack_PCIE.TXT +******************************************************************************/ + +#if DEV_BUS_TYPE == RT_PCI_INTERFACE +u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +#endif + +void +odm_read_and_config_mp_8821a_txpowertrack_pcie( + struct dm_struct *dm +) +{ +#if DEV_BUS_TYPE == RT_PCI_INTERFACE + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8821A\n"); + + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_pcie_8821a, DELTA_SWINGIDX_SIZE * 3); +#endif +} + +/****************************************************************************** +* TxPowerTrack_SDIO.TXT +******************************************************************************/ + +#if DEV_BUS_TYPE == RT_SDIO_INTERFACE +u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +#endif + +void +odm_read_and_config_mp_8821a_txpowertrack_sdio( + struct dm_struct *dm +) +{ +#if DEV_BUS_TYPE == RT_SDIO_INTERFACE + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8821A\n"); + + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_sdio_8821a, DELTA_SWINGIDX_SIZE * 3); +#endif +} + +/****************************************************************************** +* TxPowerTrack_USB.TXT +******************************************************************************/ + +#if DEV_BUS_TYPE == RT_USB_INTERFACE +u8 g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8821a[][DELTA_SWINGIDX_SIZE] = { + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, + {0, 0, 1, 2, 3, 3, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, 12, 13, 14, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16}, +}; +u8 g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8821a[] = {0, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10, 10}; +u8 g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8821a[] = {0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12, 12, 12}; +#endif + +void +odm_read_and_config_mp_8821a_txpowertrack_usb( + struct dm_struct *dm +) +{ +#if DEV_BUS_TYPE == RT_USB_INTERFACE + struct dm_rf_calibration_struct *cali_info = &(dm->rf_calibrate_info); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> ODM_ReadAndConfig_MP_MP_8821A\n"); + + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_p, g_delta_swing_table_idx_mp_2ga_p_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2ga_n, g_delta_swing_table_idx_mp_2ga_n_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_p, g_delta_swing_table_idx_mp_2gb_p_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2gb_n, g_delta_swing_table_idx_mp_2gb_n_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_p, g_delta_swing_table_idx_mp_2g_cck_a_p_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_a_n, g_delta_swing_table_idx_mp_2g_cck_a_n_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_p, g_delta_swing_table_idx_mp_2g_cck_b_p_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + odm_move_memory(dm, cali_info->delta_swing_table_idx_2g_cck_b_n, g_delta_swing_table_idx_mp_2g_cck_b_n_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE); + + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_p, g_delta_swing_table_idx_mp_5ga_p_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5ga_n, g_delta_swing_table_idx_mp_5ga_n_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_p, g_delta_swing_table_idx_mp_5gb_p_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE * 3); + odm_move_memory(dm, cali_info->delta_swing_table_idx_5gb_n, g_delta_swing_table_idx_mp_5gb_n_txpowertrack_usb_8821a, DELTA_SWINGIDX_SIZE * 3); +#endif +} + +/****************************************************************************** +* TXPWR_LMT_8811AU_FEM.TXT +******************************************************************************/ + +const char *array_mp_8821a_txpwr_lmt_8811au_fem[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "28", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "26", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "26", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "24", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "32", + "MKK", "2.4G", "20M", "HT", "1T", "01", "32", + "FCC", "2.4G", "20M", "HT", "1T", "02", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", + "MKK", "2.4G", "20M", "HT", "1T", "02", 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"MKK", "5G", "20M", "OFDM", "1T", "124", "32", + "FCC", "5G", "20M", "OFDM", "1T", "128", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "32", + "MKK", "5G", "20M", "OFDM", "1T", "128", "32", + "FCC", "5G", "20M", "OFDM", "1T", "132", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "32", + "MKK", "5G", "20M", "OFDM", "1T", "132", "32", + "FCC", "5G", "20M", "OFDM", "1T", "136", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "32", + "MKK", "5G", "20M", "OFDM", "1T", "136", "32", + "FCC", "5G", "20M", "OFDM", "1T", "140", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "32", + "MKK", "5G", "20M", "OFDM", "1T", "140", "32", + "FCC", "5G", "20M", "OFDM", "1T", "149", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "32", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "32", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "32", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "32", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "34", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "32", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "32", + "ETSI", "5G", "20M", "HT", "1T", "36", "32", + "MKK", "5G", "20M", "HT", "1T", "36", "32", + "FCC", "5G", "20M", "HT", "1T", "40", "32", + "ETSI", "5G", "20M", "HT", "1T", "40", "32", + "MKK", "5G", "20M", "HT", "1T", "40", "32", + "FCC", "5G", "20M", "HT", "1T", "44", "32", + "ETSI", "5G", "20M", "HT", "1T", "44", "32", + "MKK", "5G", "20M", "HT", "1T", "44", "32", + "FCC", "5G", "20M", "HT", "1T", "48", "32", + "ETSI", "5G", "20M", "HT", "1T", "48", "32", + "MKK", "5G", "20M", "HT", "1T", "48", "32", + "FCC", "5G", "20M", "HT", "1T", "52", "34", + "ETSI", "5G", "20M", "HT", "1T", "52", "32", + "MKK", "5G", "20M", "HT", "1T", "52", "32", + "FCC", "5G", "20M", "HT", "1T", "56", "34", + "ETSI", "5G", "20M", "HT", "1T", "56", "32", + "MKK", "5G", "20M", "HT", "1T", "56", "32", + "FCC", "5G", "20M", "HT", "1T", "60", "34", + "ETSI", "5G", "20M", "HT", "1T", "60", "32", + "MKK", "5G", "20M", "HT", "1T", "60", "32", + "FCC", "5G", "20M", "HT", "1T", "64", "34", + "ETSI", "5G", "20M", "HT", "1T", "64", "32", + "MKK", "5G", "20M", "HT", "1T", "64", "32", + "FCC", "5G", "20M", "HT", "1T", "100", "34", + "ETSI", "5G", "20M", "HT", "1T", "100", "32", + "MKK", "5G", "20M", "HT", "1T", "100", "32", + "FCC", "5G", "20M", "HT", "1T", "104", "34", + "ETSI", "5G", "20M", "HT", "1T", "104", "32", + "MKK", "5G", "20M", "HT", "1T", "104", "32", + "FCC", "5G", "20M", "HT", "1T", "108", "34", + "ETSI", "5G", "20M", "HT", "1T", "108", "32", + "MKK", "5G", "20M", "HT", "1T", "108", "32", + "FCC", "5G", "20M", "HT", "1T", "112", "34", + "ETSI", "5G", "20M", "HT", "1T", "112", "32", + "MKK", "5G", "20M", "HT", "1T", "112", "32", + "FCC", "5G", "20M", "HT", "1T", "116", "34", + "ETSI", "5G", "20M", "HT", "1T", "116", "32", + "MKK", "5G", "20M", "HT", "1T", "116", "32", + "FCC", "5G", "20M", "HT", "1T", "120", "34", + "ETSI", "5G", "20M", "HT", "1T", "120", "32", + "MKK", "5G", "20M", "HT", "1T", "120", "32", + "FCC", "5G", "20M", "HT", "1T", "124", "34", + "ETSI", "5G", "20M", "HT", "1T", "124", "32", + "MKK", "5G", "20M", "HT", "1T", "124", "32", + "FCC", "5G", "20M", "HT", "1T", "128", "34", + "ETSI", "5G", "20M", "HT", "1T", "128", "32", + "MKK", "5G", "20M", "HT", "1T", "128", "32", + "FCC", "5G", "20M", "HT", "1T", "132", "34", + "ETSI", "5G", "20M", "HT", "1T", "132", "32", + "MKK", "5G", "20M", "HT", "1T", "132", "32", + "FCC", "5G", "20M", "HT", "1T", "136", "34", + "ETSI", "5G", "20M", "HT", "1T", "136", "32", + "MKK", "5G", "20M", "HT", "1T", "136", "32", + "FCC", "5G", "20M", "HT", "1T", "140", "32", + "ETSI", "5G", "20M", "HT", "1T", "140", "32", + "MKK", "5G", "20M", "HT", "1T", "140", "32", + "FCC", "5G", "20M", "HT", "1T", "149", "34", + "ETSI", "5G", "20M", "HT", "1T", "149", "32", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "34", + "ETSI", "5G", "20M", "HT", "1T", "153", "32", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "34", + "ETSI", "5G", "20M", "HT", "1T", "157", "32", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "34", + "ETSI", "5G", "20M", "HT", "1T", "161", "32", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "34", + "ETSI", "5G", "20M", "HT", "1T", "165", "32", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "28", + "ETSI", "5G", "20M", "HT", "2T", "36", "30", + "MKK", "5G", "20M", "HT", "2T", "36", "30", + "FCC", "5G", "20M", "HT", "2T", "40", "28", + "ETSI", "5G", "20M", "HT", "2T", "40", "30", + "MKK", "5G", "20M", "HT", "2T", "40", "30", + "FCC", "5G", "20M", "HT", "2T", "44", "28", + "ETSI", "5G", "20M", "HT", "2T", "44", "30", + "MKK", "5G", "20M", "HT", "2T", "44", "30", + "FCC", "5G", "20M", "HT", "2T", "48", "28", + "ETSI", "5G", "20M", "HT", "2T", "48", "30", + "MKK", "5G", "20M", "HT", "2T", "48", "30", + "FCC", "5G", "20M", "HT", "2T", "52", "34", + "ETSI", "5G", "20M", "HT", "2T", "52", "30", + "MKK", "5G", "20M", "HT", "2T", "52", "30", + "FCC", "5G", "20M", "HT", "2T", "56", "32", + "ETSI", "5G", "20M", "HT", "2T", "56", "30", + "MKK", "5G", "20M", "HT", "2T", "56", "30", + "FCC", "5G", "20M", "HT", "2T", "60", "30", + "ETSI", "5G", "20M", "HT", "2T", "60", "30", + "MKK", "5G", "20M", "HT", "2T", "60", "30", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "30", + "MKK", "5G", "20M", "HT", "2T", "64", "30", + "FCC", "5G", "20M", "HT", "2T", "100", "28", + "ETSI", "5G", "20M", "HT", "2T", "100", "30", + "MKK", "5G", "20M", "HT", "2T", "100", "30", + "FCC", "5G", "20M", "HT", "2T", "104", "28", + "ETSI", "5G", "20M", "HT", "2T", "104", "30", + "MKK", "5G", "20M", "HT", "2T", "104", "30", + "FCC", "5G", "20M", "HT", "2T", "108", "30", + "ETSI", "5G", "20M", "HT", "2T", "108", "30", + "MKK", "5G", "20M", "HT", "2T", "108", "30", + "FCC", "5G", "20M", "HT", "2T", "112", "32", + "ETSI", "5G", "20M", "HT", "2T", "112", "30", + "MKK", "5G", "20M", "HT", "2T", "112", "30", + "FCC", "5G", "20M", "HT", "2T", "116", "32", + "ETSI", "5G", "20M", "HT", "2T", "116", "30", + "MKK", "5G", "20M", "HT", "2T", "116", "30", + "FCC", "5G", "20M", "HT", "2T", "120", "34", + "ETSI", "5G", "20M", "HT", "2T", "120", "30", + "MKK", "5G", "20M", "HT", "2T", "120", "30", + "FCC", "5G", "20M", "HT", "2T", "124", "32", + "ETSI", "5G", "20M", "HT", "2T", "124", "30", + "MKK", "5G", "20M", "HT", "2T", "124", "30", + "FCC", "5G", "20M", "HT", "2T", "128", "30", + "ETSI", "5G", "20M", "HT", "2T", "128", "30", + "MKK", "5G", "20M", "HT", "2T", "128", "30", + "FCC", "5G", "20M", "HT", "2T", "132", "28", + "ETSI", "5G", "20M", "HT", "2T", "132", "30", + "MKK", "5G", "20M", "HT", "2T", "132", "30", + "FCC", "5G", "20M", "HT", "2T", "136", "28", + "ETSI", "5G", "20M", "HT", "2T", "136", "30", + "MKK", "5G", "20M", "HT", "2T", "136", "30", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "30", + "MKK", "5G", "20M", "HT", "2T", "140", "30", + "FCC", "5G", "20M", "HT", "2T", "149", "34", + "ETSI", "5G", "20M", "HT", "2T", "149", "30", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "34", + "ETSI", "5G", "20M", "HT", "2T", "153", "30", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "34", + "ETSI", "5G", "20M", "HT", "2T", "157", "30", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "34", + "ETSI", "5G", "20M", "HT", "2T", "161", "30", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "34", + "ETSI", "5G", "20M", "HT", "2T", "165", "30", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "32", + "ETSI", "5G", "40M", "HT", "1T", "38", "32", + "MKK", "5G", "40M", "HT", "1T", "38", "32", + "FCC", "5G", "40M", "HT", "1T", "46", "32", + "ETSI", "5G", "40M", "HT", "1T", "46", "32", + "MKK", "5G", "40M", "HT", "1T", "46", "32", + "FCC", "5G", "40M", "HT", "1T", "54", "34", + "ETSI", "5G", "40M", "HT", "1T", "54", "32", + "MKK", "5G", "40M", "HT", "1T", "54", "32", + "FCC", "5G", "40M", "HT", "1T", "62", "34", + "ETSI", "5G", "40M", "HT", "1T", "62", "32", + "MKK", "5G", "40M", "HT", "1T", "62", "32", + "FCC", "5G", "40M", "HT", "1T", "102", "34", + "ETSI", "5G", "40M", "HT", "1T", "102", "32", + "MKK", "5G", "40M", "HT", "1T", "102", "32", + "FCC", "5G", "40M", "HT", "1T", "110", "34", + "ETSI", "5G", "40M", "HT", "1T", "110", "32", + "MKK", "5G", "40M", "HT", "1T", "110", "32", + "FCC", "5G", "40M", "HT", "1T", "118", "34", + "ETSI", "5G", "40M", "HT", "1T", "118", "32", + "MKK", "5G", "40M", "HT", "1T", "118", "32", + "FCC", "5G", "40M", "HT", "1T", "126", "34", + "ETSI", "5G", "40M", "HT", "1T", "126", "32", + "MKK", "5G", "40M", "HT", "1T", "126", "32", + "FCC", "5G", "40M", "HT", "1T", "134", "34", + "ETSI", "5G", "40M", "HT", "1T", "134", "32", + "MKK", "5G", "40M", "HT", "1T", "134", "32", + "FCC", "5G", "40M", "HT", "1T", "151", "34", + "ETSI", "5G", "40M", "HT", "1T", "151", "32", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "34", + "ETSI", "5G", "40M", "HT", "1T", "159", "32", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "28", + "ETSI", "5G", "40M", "HT", "2T", "38", "30", + "MKK", "5G", "40M", "HT", "2T", "38", "30", + "FCC", "5G", "40M", "HT", "2T", "46", "28", + "ETSI", "5G", "40M", "HT", "2T", "46", "30", + "MKK", "5G", "40M", "HT", "2T", "46", "30", + "FCC", "5G", "40M", "HT", "2T", "54", "30", + "ETSI", "5G", "40M", "HT", "2T", "54", "30", + "MKK", "5G", "40M", "HT", "2T", "54", "30", + "FCC", "5G", "40M", "HT", "2T", "62", "30", + "ETSI", "5G", "40M", "HT", "2T", "62", "30", + "MKK", "5G", "40M", "HT", "2T", "62", "30", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "30", + "MKK", "5G", "40M", "HT", "2T", "102", "30", + "FCC", "5G", "40M", "HT", "2T", "110", "30", + "ETSI", "5G", "40M", "HT", "2T", "110", "30", + "MKK", "5G", "40M", "HT", "2T", "110", "30", + "FCC", "5G", "40M", "HT", "2T", "118", "34", + "ETSI", "5G", "40M", "HT", "2T", "118", "30", + "MKK", "5G", "40M", "HT", "2T", "118", "30", + "FCC", "5G", "40M", "HT", "2T", "126", "32", + "ETSI", "5G", "40M", "HT", "2T", "126", "30", + "MKK", "5G", "40M", "HT", "2T", "126", "30", + "FCC", "5G", "40M", "HT", "2T", "134", "30", + "ETSI", "5G", "40M", "HT", "2T", "134", "30", + "MKK", "5G", "40M", "HT", "2T", "134", "30", + "FCC", "5G", "40M", "HT", "2T", "151", "34", + "ETSI", "5G", "40M", "HT", "2T", "151", "30", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "34", + "ETSI", "5G", "40M", "HT", "2T", "159", "30", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "32", + "ETSI", "5G", "80M", "VHT", "1T", "42", "32", + "MKK", "5G", "80M", "VHT", "1T", "42", "32", + "FCC", "5G", "80M", "VHT", "1T", "58", "34", + "ETSI", "5G", "80M", "VHT", "1T", "58", "32", + "MKK", "5G", "80M", "VHT", "1T", "58", "32", + "FCC", "5G", "80M", "VHT", "1T", "106", "34", + "ETSI", "5G", "80M", "VHT", "1T", "106", "32", + "MKK", "5G", "80M", "VHT", "1T", "106", "32", + "FCC", "5G", "80M", "VHT", "1T", "122", "34", + "ETSI", "5G", "80M", "VHT", "1T", "122", "32", + "MKK", "5G", "80M", "VHT", "1T", "122", "32", + "FCC", "5G", "80M", "VHT", "1T", "155", "34", + "ETSI", "5G", "80M", "VHT", "1T", "155", "32", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "28", + "ETSI", "5G", "80M", "VHT", "2T", "42", "30", + "MKK", "5G", "80M", "VHT", "2T", "42", "30", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "30", + "MKK", "5G", "80M", "VHT", "2T", "58", "30", + "FCC", "5G", "80M", "VHT", "2T", "106", "28", + "ETSI", "5G", "80M", "VHT", "2T", "106", "30", + "MKK", "5G", "80M", "VHT", "2T", "106", "30", + "FCC", "5G", "80M", "VHT", "2T", "122", "32", + "ETSI", "5G", "80M", "VHT", "2T", "122", "30", + "MKK", "5G", "80M", "VHT", "2T", "122", "30", + "FCC", "5G", "80M", "VHT", "2T", "155", "34", + "ETSI", "5G", "80M", "VHT", "2T", "155", "30", + "MKK", "5G", "80M", "VHT", "2T", "155", "63" +}; + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8811a_u_fem( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_txpwr_lmt_8811au_fem) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8821a_txpwr_lmt_8811au_fem; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrLmt = array_len / 7; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_txpwr_lmt_8811a_u_fem\n"); + + for (i = 0; i < array_len; i += 7) { + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; + + odm_config_bb_txpwr_lmt_8821a(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rf_path, chnl, val); +#endif + } + +} + +/****************************************************************************** +* TXPWR_LMT_8811AU_IPA.TXT +******************************************************************************/ + +const char *array_mp_8821a_txpwr_lmt_8811au_ipa[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "28", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "26", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "34", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "26", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "24", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "32", + "MKK", "2.4G", "20M", "HT", "1T", "01", "32", + "FCC", "2.4G", "20M", "HT", "1T", "02", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", + "MKK", "2.4G", "20M", "HT", "1T", "02", "32", + "FCC", "2.4G", "20M", "HT", "1T", "03", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", + "MKK", "2.4G", "20M", "HT", "1T", "03", "32", + "FCC", "2.4G", "20M", "HT", "1T", "04", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", + "MKK", "2.4G", "20M", "HT", "1T", "04", "32", + "FCC", "2.4G", "20M", "HT", "1T", "05", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", + "MKK", "2.4G", "20M", "HT", "1T", "05", "32", + "FCC", "2.4G", "20M", "HT", "1T", "06", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", + "MKK", "2.4G", "20M", "HT", "1T", "06", "32", + "FCC", "2.4G", "20M", "HT", "1T", "07", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", + "MKK", "2.4G", "20M", "HT", "1T", "07", "32", + "FCC", "2.4G", "20M", "HT", "1T", "08", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", + "MKK", "2.4G", "20M", "HT", "1T", "08", "32", + "FCC", "2.4G", "20M", "HT", "1T", "09", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", + "MKK", "2.4G", "20M", "HT", "1T", "09", "32", + "FCC", "2.4G", "20M", "HT", "1T", "10", "34", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", + "MKK", "2.4G", "20M", "HT", "1T", "10", "32", + "FCC", "2.4G", "20M", "HT", "1T", "11", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", + "MKK", "2.4G", "20M", "HT", "1T", "11", "32", + "FCC", "2.4G", "20M", "HT", "1T", "12", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", + "MKK", "2.4G", "20M", "HT", "1T", "12", "32", + "FCC", "2.4G", "20M", "HT", "1T", "13", "24", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "32", + "MKK", "2.4G", "20M", "HT", "1T", "13", "32", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "32", + "MKK", "2.4G", "20M", "HT", "2T", "01", "32", + "FCC", "2.4G", "20M", "HT", "2T", "02", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "32", + "MKK", "2.4G", "20M", "HT", "2T", "02", "32", + "FCC", "2.4G", "20M", "HT", "2T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "32", + "MKK", "2.4G", "20M", "HT", "2T", "03", "32", + "FCC", "2.4G", "20M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "32", + "MKK", "2.4G", "20M", "HT", "2T", "04", "32", + "FCC", "2.4G", "20M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "32", + "MKK", "2.4G", "20M", "HT", "2T", "05", "32", + "FCC", "2.4G", "20M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "06", "32", + "MKK", "2.4G", "20M", "HT", "2T", "06", "32", + "FCC", "2.4G", "20M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "07", "32", + "MKK", "2.4G", "20M", "HT", "2T", "07", "32", + "FCC", "2.4G", "20M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "08", "32", + "MKK", "2.4G", "20M", "HT", "2T", "08", "32", + "FCC", "2.4G", "20M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "09", "32", + "MKK", "2.4G", "20M", "HT", "2T", "09", "32", + "FCC", "2.4G", "20M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "10", "32", + "MKK", "2.4G", "20M", "HT", "2T", "10", "32", + "FCC", "2.4G", "20M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "32", + "MKK", "2.4G", "20M", "HT", "2T", "11", "32", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "32", + "MKK", "2.4G", "20M", "HT", "2T", "12", "32", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "32", + "MKK", "2.4G", "20M", "HT", "2T", "13", "32", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "40M", "HT", "1T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", + "MKK", "2.4G", "40M", "HT", "1T", "01", "63", + "FCC", "2.4G", "40M", "HT", "1T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", + "MKK", "2.4G", "40M", "HT", "1T", "02", "63", + "FCC", "2.4G", "40M", "HT", "1T", "03", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "03", "32", + "MKK", "2.4G", "40M", "HT", "1T", "03", "32", + "FCC", "2.4G", "40M", "HT", "1T", "04", "34", + "ETSI", "2.4G", "40M", "HT", "1T", "04", "32", + "MKK", "2.4G", "40M", "HT", "1T", "04", "32", + "FCC", "2.4G", "40M", "HT", "1T", "05", "34", + "ETSI", "2.4G", "40M", "HT", "1T", "05", "32", + "MKK", "2.4G", "40M", "HT", "1T", "05", "32", + "FCC", "2.4G", "40M", "HT", "1T", "06", "34", + "ETSI", "2.4G", "40M", "HT", "1T", "06", "32", + "MKK", "2.4G", "40M", "HT", "1T", "06", "32", + "FCC", "2.4G", "40M", "HT", "1T", "07", "34", + "ETSI", "2.4G", "40M", "HT", "1T", "07", "32", + "MKK", "2.4G", "40M", "HT", "1T", "07", "32", + "FCC", "2.4G", "40M", "HT", "1T", "08", "34", + "ETSI", "2.4G", "40M", "HT", "1T", "08", "32", + "MKK", "2.4G", "40M", "HT", "1T", "08", "32", + "FCC", "2.4G", "40M", "HT", "1T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "09", "32", + "MKK", "2.4G", "40M", "HT", "1T", "09", "32", + "FCC", "2.4G", "40M", "HT", "1T", "10", "24", + "ETSI", "2.4G", "40M", "HT", "1T", "10", "32", + "MKK", "2.4G", "40M", "HT", "1T", "10", "32", + "FCC", "2.4G", "40M", "HT", "1T", "11", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "11", "32", + "MKK", "2.4G", "40M", "HT", "1T", "11", "32", + "FCC", "2.4G", "40M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "12", "63", + "MKK", "2.4G", "40M", "HT", "1T", "12", "63", + "FCC", "2.4G", "40M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "13", "63", + "MKK", "2.4G", "40M", "HT", "1T", "13", "63", + "FCC", "2.4G", "40M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", + "MKK", "2.4G", "40M", "HT", "1T", "14", "63", + "FCC", "2.4G", "40M", "HT", "2T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", + "MKK", "2.4G", "40M", "HT", "2T", "01", "63", + "FCC", "2.4G", "40M", "HT", "2T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", + "MKK", "2.4G", "40M", "HT", "2T", "02", "63", + "FCC", "2.4G", "40M", "HT", "2T", "03", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", + "MKK", "2.4G", "40M", "HT", "2T", "03", "30", + "FCC", "2.4G", "40M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", + "MKK", "2.4G", "40M", "HT", "2T", "04", "30", + "FCC", "2.4G", "40M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", + "MKK", "2.4G", "40M", "HT", "2T", "05", "30", + "FCC", "2.4G", "40M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", + "MKK", "2.4G", "40M", "HT", "2T", "06", "30", + "FCC", "2.4G", "40M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", + "MKK", "2.4G", "40M", "HT", "2T", "07", "30", + "FCC", "2.4G", "40M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", + "MKK", "2.4G", "40M", "HT", "2T", "08", "30", + "FCC", "2.4G", "40M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", + "MKK", "2.4G", "40M", "HT", "2T", "09", "30", + "FCC", "2.4G", "40M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", + "MKK", "2.4G", "40M", "HT", "2T", "10", "30", + "FCC", "2.4G", "40M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", + "MKK", "2.4G", "40M", "HT", "2T", "11", "30", + "FCC", "2.4G", "40M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "12", "32", + "MKK", "2.4G", "40M", "HT", "2T", "12", "32", + "FCC", "2.4G", "40M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "13", "32", + "MKK", "2.4G", "40M", "HT", "2T", "13", "32", + "FCC", "2.4G", "40M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", + "MKK", "2.4G", "40M", "HT", "2T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "30", + "MKK", "5G", "20M", "OFDM", "1T", "36", "30", + "FCC", "5G", "20M", "OFDM", "1T", "40", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "30", + "MKK", "5G", "20M", "OFDM", "1T", "40", "30", + "FCC", "5G", "20M", "OFDM", "1T", "44", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "30", + "MKK", "5G", "20M", "OFDM", "1T", "44", "30", + "FCC", "5G", "20M", "OFDM", "1T", "48", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "30", + "MKK", "5G", "20M", "OFDM", "1T", "48", "30", + "FCC", "5G", "20M", "OFDM", "1T", "52", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "30", + "MKK", "5G", "20M", "OFDM", "1T", "52", "30", + "FCC", "5G", "20M", "OFDM", "1T", "56", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "30", + "MKK", "5G", "20M", "OFDM", "1T", "56", "30", + "FCC", "5G", "20M", "OFDM", "1T", "60", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "30", + "MKK", "5G", "20M", "OFDM", "1T", "60", "30", + "FCC", "5G", "20M", "OFDM", "1T", "64", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "30", + "MKK", "5G", "20M", "OFDM", "1T", "64", "30", + "FCC", "5G", "20M", "OFDM", "1T", "100", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "30", + "MKK", "5G", "20M", "OFDM", "1T", "100", "30", + "FCC", "5G", "20M", "OFDM", "1T", "104", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "30", + "MKK", "5G", "20M", "OFDM", "1T", "104", "30", + "FCC", "5G", "20M", "OFDM", "1T", "108", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "30", + "MKK", "5G", "20M", "OFDM", "1T", "108", "30", + "FCC", "5G", "20M", "OFDM", "1T", "112", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "30", + "MKK", "5G", "20M", "OFDM", "1T", "112", "30", + "FCC", "5G", "20M", "OFDM", "1T", "116", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "30", + "MKK", "5G", "20M", "OFDM", "1T", "116", "30", + "FCC", "5G", "20M", "OFDM", "1T", "120", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "30", + "MKK", "5G", "20M", "OFDM", "1T", "120", "30", + "FCC", "5G", "20M", "OFDM", "1T", "124", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "30", + "MKK", "5G", "20M", "OFDM", "1T", "124", "30", + "FCC", "5G", "20M", "OFDM", "1T", "128", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "30", + "MKK", "5G", "20M", "OFDM", "1T", "128", "30", + "FCC", "5G", "20M", "OFDM", "1T", "132", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "30", + "MKK", "5G", "20M", "OFDM", "1T", "132", "30", + "FCC", "5G", "20M", "OFDM", "1T", "136", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "30", + "MKK", "5G", "20M", "OFDM", "1T", "136", "30", + "FCC", "5G", "20M", "OFDM", "1T", "140", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "30", + "MKK", "5G", "20M", "OFDM", "1T", "140", "30", + "FCC", "5G", "20M", "OFDM", "1T", "149", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "30", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "30", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "30", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "30", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "30", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "30", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "30", + "ETSI", "5G", "20M", "HT", "1T", "36", "30", + "MKK", "5G", "20M", "HT", "1T", "36", "30", + "FCC", "5G", "20M", "HT", "1T", "40", "30", + "ETSI", "5G", "20M", "HT", "1T", "40", "30", + "MKK", "5G", "20M", "HT", "1T", "40", "30", + "FCC", "5G", "20M", "HT", "1T", "44", "30", + "ETSI", "5G", "20M", "HT", "1T", "44", "30", + "MKK", "5G", "20M", "HT", "1T", "44", "30", + "FCC", "5G", "20M", "HT", "1T", "48", "30", + "ETSI", "5G", "20M", "HT", "1T", "48", "30", + "MKK", "5G", "20M", "HT", "1T", "48", "30", + "FCC", "5G", "20M", "HT", "1T", "52", "30", + "ETSI", "5G", "20M", "HT", "1T", "52", "30", + "MKK", "5G", "20M", "HT", "1T", "52", "30", + "FCC", "5G", "20M", "HT", "1T", "56", "30", + "ETSI", "5G", "20M", "HT", "1T", "56", "30", + "MKK", "5G", "20M", "HT", "1T", "56", "30", + "FCC", "5G", "20M", "HT", "1T", "60", "30", + "ETSI", "5G", "20M", "HT", "1T", "60", "30", + "MKK", "5G", "20M", "HT", "1T", "60", "30", + "FCC", "5G", "20M", "HT", "1T", "64", "30", + "ETSI", "5G", "20M", "HT", "1T", "64", "30", + "MKK", "5G", "20M", "HT", "1T", "64", "30", + "FCC", "5G", "20M", "HT", "1T", "100", "30", + "ETSI", "5G", "20M", "HT", "1T", "100", "30", + "MKK", "5G", "20M", "HT", "1T", "100", "30", + "FCC", "5G", "20M", "HT", "1T", "104", "30", + "ETSI", "5G", "20M", "HT", "1T", "104", "30", + "MKK", "5G", "20M", "HT", "1T", "104", "30", + "FCC", "5G", "20M", "HT", "1T", "108", "30", + "ETSI", "5G", "20M", "HT", "1T", "108", "30", + "MKK", "5G", "20M", "HT", "1T", "108", "30", + "FCC", "5G", "20M", "HT", "1T", "112", "30", + "ETSI", "5G", "20M", "HT", "1T", "112", "30", + "MKK", "5G", "20M", "HT", "1T", "112", "30", + "FCC", "5G", "20M", "HT", "1T", "116", "30", + "ETSI", "5G", "20M", "HT", "1T", "116", "30", + "MKK", "5G", "20M", "HT", "1T", "116", "30", + "FCC", "5G", "20M", "HT", "1T", "120", "30", + "ETSI", "5G", "20M", "HT", "1T", "120", "30", + "MKK", "5G", "20M", "HT", "1T", "120", "30", + "FCC", "5G", "20M", "HT", "1T", "124", "30", + "ETSI", "5G", "20M", "HT", "1T", "124", "30", + "MKK", "5G", "20M", "HT", "1T", "124", "30", + "FCC", "5G", "20M", "HT", "1T", "128", "30", + "ETSI", "5G", "20M", "HT", "1T", "128", "30", + "MKK", "5G", "20M", "HT", "1T", "128", "30", + "FCC", "5G", "20M", "HT", "1T", "132", "30", + "ETSI", "5G", "20M", "HT", "1T", "132", "30", + "MKK", "5G", "20M", "HT", "1T", "132", "30", + "FCC", "5G", "20M", "HT", "1T", "136", "30", + "ETSI", "5G", "20M", "HT", "1T", "136", "30", + "MKK", "5G", "20M", "HT", "1T", "136", "30", + "FCC", "5G", "20M", "HT", "1T", "140", "30", + "ETSI", "5G", "20M", "HT", "1T", "140", "30", + "MKK", "5G", "20M", "HT", "1T", "140", "30", + "FCC", "5G", "20M", "HT", "1T", "149", "30", + "ETSI", "5G", "20M", "HT", "1T", "149", "30", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "30", + "ETSI", "5G", "20M", "HT", "1T", "153", "30", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "30", + "ETSI", "5G", "20M", "HT", "1T", "157", "30", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "30", + "ETSI", "5G", "20M", "HT", "1T", "161", "30", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "30", + "ETSI", "5G", "20M", "HT", "1T", "165", "30", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "28", + "ETSI", "5G", "20M", "HT", "2T", "36", "30", + "MKK", "5G", "20M", "HT", "2T", "36", "30", + "FCC", "5G", "20M", "HT", "2T", "40", "28", + "ETSI", "5G", "20M", "HT", "2T", "40", "30", + "MKK", "5G", "20M", "HT", "2T", "40", "30", + "FCC", "5G", "20M", "HT", "2T", "44", "28", + "ETSI", "5G", "20M", "HT", "2T", "44", "30", + "MKK", "5G", "20M", "HT", "2T", "44", "30", + "FCC", "5G", "20M", "HT", "2T", "48", "28", + "ETSI", "5G", "20M", "HT", "2T", "48", "30", + "MKK", "5G", "20M", "HT", "2T", "48", "30", + "FCC", "5G", "20M", "HT", "2T", "52", "34", + "ETSI", "5G", "20M", "HT", "2T", "52", "30", + "MKK", "5G", "20M", "HT", "2T", "52", "30", + "FCC", "5G", "20M", "HT", "2T", "56", "32", + "ETSI", "5G", "20M", "HT", "2T", "56", "30", + "MKK", "5G", "20M", "HT", "2T", "56", "30", + "FCC", "5G", "20M", "HT", "2T", "60", "30", + "ETSI", "5G", "20M", "HT", "2T", "60", "30", + "MKK", "5G", "20M", "HT", "2T", "60", "30", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "30", + "MKK", "5G", "20M", "HT", "2T", "64", "30", + "FCC", "5G", "20M", "HT", "2T", "100", "28", + "ETSI", "5G", "20M", "HT", "2T", "100", "30", + "MKK", "5G", "20M", "HT", "2T", "100", "30", + "FCC", "5G", "20M", "HT", "2T", "104", "28", + "ETSI", "5G", "20M", "HT", "2T", "104", "30", + "MKK", "5G", "20M", "HT", "2T", "104", "30", + "FCC", "5G", "20M", "HT", "2T", "108", "30", + "ETSI", "5G", "20M", "HT", "2T", "108", "30", + "MKK", "5G", "20M", "HT", "2T", "108", "30", + "FCC", "5G", "20M", "HT", "2T", "112", "32", + "ETSI", "5G", "20M", "HT", "2T", "112", "30", + "MKK", "5G", "20M", "HT", "2T", "112", "30", + "FCC", "5G", "20M", "HT", "2T", "116", "32", + "ETSI", "5G", "20M", "HT", "2T", "116", "30", + "MKK", "5G", "20M", "HT", "2T", "116", "30", + "FCC", "5G", "20M", "HT", "2T", "120", "34", + "ETSI", "5G", "20M", "HT", "2T", "120", "30", + "MKK", "5G", "20M", "HT", "2T", "120", "30", + "FCC", "5G", "20M", "HT", "2T", "124", "32", + "ETSI", "5G", "20M", "HT", "2T", "124", "30", + "MKK", "5G", "20M", "HT", "2T", "124", "30", + "FCC", "5G", "20M", "HT", "2T", "128", "30", + "ETSI", "5G", "20M", "HT", "2T", "128", "30", + "MKK", "5G", "20M", "HT", "2T", "128", "30", + "FCC", "5G", "20M", "HT", "2T", "132", "28", + "ETSI", "5G", "20M", "HT", "2T", "132", "30", + "MKK", "5G", "20M", "HT", "2T", "132", "30", + "FCC", "5G", "20M", "HT", "2T", "136", "28", + "ETSI", "5G", "20M", "HT", "2T", "136", "30", + "MKK", "5G", "20M", "HT", "2T", "136", "30", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "30", + "MKK", "5G", "20M", "HT", "2T", "140", "30", + "FCC", "5G", "20M", "HT", "2T", "149", "34", + "ETSI", "5G", "20M", "HT", "2T", "149", "30", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "34", + "ETSI", "5G", "20M", "HT", "2T", "153", "30", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "34", + "ETSI", "5G", "20M", "HT", "2T", "157", "30", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "34", + "ETSI", "5G", "20M", "HT", "2T", "161", "30", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "34", + "ETSI", "5G", "20M", "HT", "2T", "165", "30", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "28", + "ETSI", "5G", "40M", "HT", "1T", "38", "30", + "MKK", "5G", "40M", "HT", "1T", "38", "30", + "FCC", "5G", "40M", "HT", "1T", "46", "28", + "ETSI", "5G", "40M", "HT", "1T", "46", "30", + "MKK", "5G", "40M", "HT", "1T", "46", "30", + "FCC", "5G", "40M", "HT", "1T", "54", "28", + "ETSI", "5G", "40M", "HT", "1T", "54", "30", + "MKK", "5G", "40M", "HT", "1T", "54", "30", + "FCC", "5G", "40M", "HT", "1T", "62", "28", + "ETSI", "5G", "40M", "HT", "1T", "62", "30", + "MKK", "5G", "40M", "HT", "1T", "62", "30", + "FCC", "5G", "40M", "HT", "1T", "102", "28", + "ETSI", "5G", "40M", "HT", "1T", "102", "30", + "MKK", "5G", "40M", "HT", "1T", "102", "30", + "FCC", "5G", "40M", "HT", "1T", "110", "28", + "ETSI", "5G", "40M", "HT", "1T", "110", "30", + "MKK", "5G", "40M", "HT", "1T", "110", "30", + "FCC", "5G", "40M", "HT", "1T", "118", "28", + "ETSI", "5G", "40M", "HT", "1T", "118", "30", + "MKK", "5G", "40M", "HT", "1T", "118", "30", + "FCC", "5G", "40M", "HT", "1T", "126", "28", + "ETSI", "5G", "40M", "HT", "1T", "126", "30", + "MKK", "5G", "40M", "HT", "1T", "126", "30", + "FCC", "5G", "40M", "HT", "1T", "134", "28", + "ETSI", "5G", "40M", "HT", "1T", "134", "30", + "MKK", "5G", "40M", "HT", "1T", "134", "30", + "FCC", "5G", "40M", "HT", "1T", "151", "30", + "ETSI", "5G", "40M", "HT", "1T", "151", "30", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "30", + "ETSI", "5G", "40M", "HT", "1T", "159", "30", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "28", + "ETSI", "5G", "40M", "HT", "2T", "38", "30", + "MKK", "5G", "40M", "HT", "2T", "38", "30", + "FCC", "5G", "40M", "HT", "2T", "46", "28", + "ETSI", "5G", "40M", "HT", "2T", "46", "30", + "MKK", "5G", "40M", "HT", "2T", "46", "30", + "FCC", "5G", "40M", "HT", "2T", "54", "30", + "ETSI", "5G", "40M", "HT", "2T", "54", "30", + "MKK", "5G", "40M", "HT", "2T", "54", "30", + "FCC", "5G", "40M", "HT", "2T", "62", "30", + "ETSI", "5G", "40M", "HT", "2T", "62", "30", + "MKK", "5G", "40M", "HT", "2T", "62", "30", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "30", + "MKK", "5G", "40M", "HT", "2T", "102", "30", + "FCC", "5G", "40M", "HT", "2T", "110", "30", + "ETSI", "5G", "40M", "HT", "2T", "110", "30", + "MKK", "5G", "40M", "HT", "2T", "110", "30", + "FCC", "5G", "40M", "HT", "2T", "118", "34", + "ETSI", "5G", "40M", "HT", "2T", "118", "30", + "MKK", "5G", "40M", "HT", "2T", "118", "30", + "FCC", "5G", "40M", "HT", "2T", "126", "32", + "ETSI", "5G", "40M", "HT", "2T", "126", "30", + "MKK", "5G", "40M", "HT", "2T", "126", "30", + "FCC", "5G", "40M", "HT", "2T", "134", "30", + "ETSI", "5G", "40M", "HT", "2T", "134", "30", + "MKK", "5G", "40M", "HT", "2T", "134", "30", + "FCC", "5G", "40M", "HT", "2T", "151", "34", + "ETSI", "5G", "40M", "HT", "2T", "151", "30", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "34", + "ETSI", "5G", "40M", "HT", "2T", "159", "30", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "28", + "ETSI", "5G", "80M", "VHT", "1T", "42", "30", + "MKK", "5G", "80M", "VHT", "1T", "42", "30", + "FCC", "5G", "80M", "VHT", "1T", "58", "26", + "ETSI", "5G", "80M", "VHT", "1T", "58", "30", + "MKK", "5G", "80M", "VHT", "1T", "58", "30", + "FCC", "5G", "80M", "VHT", "1T", "106", "30", + "ETSI", "5G", "80M", "VHT", "1T", "106", "30", + "MKK", "5G", "80M", "VHT", "1T", "106", "30", + "FCC", "5G", "80M", "VHT", "1T", "122", "30", + "ETSI", "5G", "80M", "VHT", "1T", "122", "30", + "MKK", "5G", "80M", "VHT", "1T", "122", "30", + "FCC", "5G", "80M", "VHT", "1T", "155", "30", + "ETSI", "5G", "80M", "VHT", "1T", "155", "30", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "28", + "ETSI", "5G", "80M", "VHT", "2T", "42", "30", + "MKK", "5G", "80M", "VHT", "2T", "42", "30", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "30", + "MKK", "5G", "80M", "VHT", "2T", "58", "30", + "FCC", "5G", "80M", "VHT", "2T", "106", "28", + "ETSI", "5G", "80M", "VHT", "2T", "106", "30", + "MKK", "5G", "80M", "VHT", "2T", "106", "30", + "FCC", "5G", "80M", "VHT", "2T", "122", "32", + "ETSI", "5G", "80M", "VHT", "2T", "122", "30", + "MKK", "5G", "80M", "VHT", "2T", "122", "30", + "FCC", "5G", "80M", "VHT", "2T", "155", "34", + "ETSI", "5G", "80M", "VHT", "2T", "155", "30", + "MKK", "5G", "80M", "VHT", "2T", "155", "63" +}; + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8811a_u_ipa( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_txpwr_lmt_8811au_ipa) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8821a_txpwr_lmt_8811au_ipa; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrLmt = array_len / 7; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_txpwr_lmt_8811a_u_ipa\n"); + + for (i = 0; i < array_len; i += 7) { + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; + + odm_config_bb_txpwr_lmt_8821a(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rf_path, chnl, val); +#endif + } + +} + +/****************************************************************************** +* TXPWR_LMT_8821A.TXT +******************************************************************************/ + +const char *array_mp_8821a_txpwr_lmt_8821a[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "28", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "26", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "30", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "26", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "24", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "30", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "26", + "MKK", "2.4G", "20M", "HT", "1T", "01", "32", + "FCC", "2.4G", "20M", "HT", "1T", "02", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", + "MKK", "2.4G", "20M", "HT", "1T", "02", "32", + "FCC", "2.4G", "20M", "HT", "1T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", + "MKK", "2.4G", "20M", "HT", "1T", "03", "32", + "FCC", "2.4G", "20M", "HT", "1T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", + "MKK", "2.4G", "20M", "HT", "1T", "04", "32", + "FCC", "2.4G", "20M", "HT", "1T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", + "MKK", "2.4G", "20M", "HT", "1T", "05", "32", + "FCC", "2.4G", "20M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", + "MKK", "2.4G", "20M", "HT", "1T", "06", "32", + "FCC", "2.4G", "20M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", + "MKK", "2.4G", "20M", "HT", "1T", "07", "32", + "FCC", "2.4G", "20M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", + "MKK", "2.4G", "20M", "HT", "1T", "08", "32", + "FCC", "2.4G", "20M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", + "MKK", "2.4G", "20M", "HT", "1T", "09", "32", + "FCC", "2.4G", "20M", "HT", "1T", "10", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", + "MKK", "2.4G", "20M", "HT", "1T", "10", "32", + "FCC", "2.4G", "20M", "HT", "1T", "11", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", + "MKK", "2.4G", "20M", "HT", "1T", "11", "32", + "FCC", "2.4G", "20M", "HT", "1T", "12", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", + "MKK", "2.4G", "20M", "HT", "1T", "12", "32", + "FCC", "2.4G", "20M", "HT", "1T", "13", "24", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "26", + "MKK", "2.4G", "20M", "HT", "1T", "13", "32", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "32", + "MKK", "2.4G", "20M", "HT", "2T", "01", "32", + "FCC", "2.4G", "20M", "HT", "2T", "02", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "32", + "MKK", "2.4G", "20M", "HT", "2T", "02", "32", + "FCC", "2.4G", "20M", "HT", "2T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "32", + "MKK", "2.4G", "20M", "HT", "2T", "03", "32", + "FCC", "2.4G", "20M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "32", + "MKK", "2.4G", "20M", "HT", "2T", "04", "32", + "FCC", "2.4G", "20M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "32", + "MKK", "2.4G", "20M", "HT", "2T", "05", "32", + "FCC", "2.4G", "20M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "06", "32", + "MKK", "2.4G", "20M", "HT", "2T", "06", "32", + "FCC", "2.4G", "20M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "07", "32", + "MKK", "2.4G", "20M", "HT", "2T", "07", "32", + "FCC", "2.4G", "20M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "08", "32", + "MKK", "2.4G", "20M", "HT", "2T", "08", "32", + "FCC", "2.4G", "20M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "09", "32", + "MKK", "2.4G", "20M", "HT", "2T", "09", "32", + "FCC", "2.4G", "20M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "10", "32", + "MKK", "2.4G", "20M", "HT", "2T", "10", "32", + "FCC", "2.4G", "20M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "32", + "MKK", "2.4G", "20M", "HT", "2T", "11", "32", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "32", + "MKK", "2.4G", "20M", "HT", "2T", "12", "32", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "32", + "MKK", "2.4G", "20M", "HT", "2T", "13", "32", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "40M", "HT", "1T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", + "MKK", "2.4G", "40M", "HT", "1T", "01", "63", + "FCC", "2.4G", "40M", "HT", "1T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", + "MKK", "2.4G", "40M", "HT", "1T", "02", "63", + "FCC", "2.4G", "40M", "HT", "1T", "03", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "03", "26", + "MKK", "2.4G", "40M", "HT", "1T", "03", "32", + "FCC", "2.4G", "40M", "HT", "1T", "04", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "04", "32", + "MKK", "2.4G", "40M", "HT", "1T", "04", "32", + "FCC", "2.4G", "40M", "HT", "1T", "05", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "05", "32", + "MKK", "2.4G", "40M", "HT", "1T", "05", "32", + "FCC", "2.4G", "40M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "06", "32", + "MKK", "2.4G", "40M", "HT", "1T", "06", "32", + "FCC", "2.4G", "40M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "07", "32", + "MKK", "2.4G", "40M", "HT", "1T", "07", "32", + "FCC", "2.4G", "40M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "08", "32", + "MKK", "2.4G", "40M", "HT", "1T", "08", "32", + "FCC", "2.4G", "40M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "09", "32", + "MKK", "2.4G", "40M", "HT", "1T", "09", "32", + "FCC", "2.4G", "40M", "HT", "1T", "10", "24", + "ETSI", "2.4G", "40M", "HT", "1T", "10", "32", + "MKK", "2.4G", "40M", "HT", "1T", "10", "32", + "FCC", "2.4G", "40M", "HT", "1T", "11", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "11", "26", + "MKK", "2.4G", "40M", "HT", "1T", "11", "32", + "FCC", "2.4G", "40M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "12", "63", + "MKK", "2.4G", "40M", "HT", "1T", "12", "63", + "FCC", "2.4G", "40M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "13", "63", + "MKK", "2.4G", "40M", "HT", "1T", "13", "63", + "FCC", "2.4G", "40M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", + "MKK", "2.4G", "40M", "HT", "1T", "14", "63", + "FCC", "2.4G", "40M", "HT", "2T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", + "MKK", "2.4G", "40M", "HT", "2T", "01", "63", + "FCC", "2.4G", "40M", "HT", "2T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", + "MKK", "2.4G", "40M", "HT", "2T", "02", "63", + "FCC", "2.4G", "40M", "HT", "2T", "03", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", + "MKK", "2.4G", "40M", "HT", "2T", "03", "30", + "FCC", "2.4G", "40M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", + "MKK", "2.4G", "40M", "HT", "2T", "04", "30", + "FCC", "2.4G", "40M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", + "MKK", "2.4G", "40M", "HT", "2T", "05", "30", + "FCC", "2.4G", "40M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", + "MKK", "2.4G", "40M", "HT", "2T", "06", "30", + "FCC", "2.4G", "40M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", + "MKK", "2.4G", "40M", "HT", "2T", "07", "30", + "FCC", "2.4G", "40M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", + "MKK", "2.4G", "40M", "HT", "2T", "08", "30", + "FCC", "2.4G", "40M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", + "MKK", "2.4G", "40M", "HT", "2T", "09", "30", + "FCC", "2.4G", "40M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", + "MKK", "2.4G", "40M", "HT", "2T", "10", "30", + "FCC", "2.4G", "40M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", + "MKK", "2.4G", "40M", "HT", "2T", "11", "30", + "FCC", "2.4G", "40M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "12", "32", + "MKK", "2.4G", "40M", "HT", "2T", "12", "32", + "FCC", "2.4G", "40M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "13", "32", + "MKK", "2.4G", "40M", "HT", "2T", "13", "32", + "FCC", "2.4G", "40M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", + "MKK", "2.4G", "40M", "HT", "2T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "30", + "MKK", "5G", "20M", "OFDM", "1T", "36", "30", + "FCC", "5G", "20M", "OFDM", "1T", "40", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "30", + "MKK", "5G", "20M", "OFDM", "1T", "40", "30", + "FCC", "5G", "20M", "OFDM", "1T", "44", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "30", + "MKK", "5G", "20M", "OFDM", "1T", "44", "30", + "FCC", "5G", "20M", "OFDM", "1T", "48", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "30", + "MKK", "5G", "20M", "OFDM", "1T", "48", "30", + "FCC", "5G", "20M", "OFDM", "1T", "52", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "30", + "MKK", "5G", "20M", "OFDM", "1T", "52", "30", + "FCC", "5G", "20M", "OFDM", "1T", "56", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "30", + "MKK", "5G", "20M", "OFDM", "1T", "56", "30", + "FCC", "5G", "20M", "OFDM", "1T", "60", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "30", + "MKK", "5G", "20M", "OFDM", "1T", "60", "30", + "FCC", "5G", "20M", "OFDM", "1T", "64", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "30", + "MKK", "5G", "20M", "OFDM", "1T", "64", "30", + "FCC", "5G", "20M", "OFDM", "1T", "100", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "30", + "MKK", "5G", "20M", "OFDM", "1T", "100", "30", + "FCC", "5G", "20M", "OFDM", "1T", "104", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "30", + "MKK", "5G", "20M", "OFDM", "1T", "104", "30", + "FCC", "5G", "20M", "OFDM", "1T", "108", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "30", + "MKK", "5G", "20M", "OFDM", "1T", "108", "30", + "FCC", "5G", "20M", "OFDM", "1T", "112", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "30", + "MKK", "5G", "20M", "OFDM", "1T", "112", "30", + "FCC", "5G", "20M", "OFDM", "1T", "116", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "30", + "MKK", "5G", "20M", "OFDM", "1T", "116", "30", + "FCC", "5G", "20M", "OFDM", "1T", "120", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "30", + "MKK", "5G", "20M", "OFDM", "1T", "120", "30", + "FCC", "5G", "20M", "OFDM", "1T", "124", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "30", + "MKK", "5G", "20M", "OFDM", "1T", "124", "30", + "FCC", "5G", "20M", "OFDM", "1T", "128", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "30", + "MKK", "5G", "20M", "OFDM", "1T", "128", "30", + "FCC", "5G", "20M", "OFDM", "1T", "132", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "30", + "MKK", "5G", "20M", "OFDM", "1T", "132", "30", + "FCC", "5G", "20M", "OFDM", "1T", "136", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "30", + "MKK", "5G", "20M", "OFDM", "1T", "136", "30", + "FCC", "5G", "20M", "OFDM", "1T", "140", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "30", + "MKK", "5G", "20M", "OFDM", "1T", "140", "30", + "FCC", "5G", "20M", "OFDM", "1T", "149", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "30", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "30", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "30", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "30", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "30", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "32", + "ETSI", "5G", "20M", "HT", "1T", "36", "30", + "MKK", "5G", "20M", "HT", "1T", "36", "30", + "FCC", "5G", "20M", "HT", "1T", "40", "32", + "ETSI", "5G", "20M", "HT", "1T", "40", "30", + "MKK", "5G", "20M", "HT", "1T", "40", "30", + "FCC", "5G", "20M", "HT", "1T", "44", "32", + "ETSI", "5G", "20M", "HT", "1T", "44", "30", + "MKK", "5G", "20M", "HT", "1T", "44", "30", + "FCC", "5G", "20M", "HT", "1T", "48", "32", + "ETSI", "5G", "20M", "HT", "1T", "48", "30", + "MKK", "5G", "20M", "HT", "1T", "48", "30", + "FCC", "5G", "20M", "HT", "1T", "52", "32", + "ETSI", "5G", "20M", "HT", "1T", "52", "30", + "MKK", "5G", "20M", "HT", "1T", "52", "30", + "FCC", "5G", "20M", "HT", "1T", "56", "32", + "ETSI", "5G", "20M", "HT", "1T", "56", "30", + "MKK", "5G", "20M", "HT", "1T", "56", "30", + "FCC", "5G", "20M", "HT", "1T", "60", "32", + "ETSI", "5G", "20M", "HT", "1T", "60", "30", + "MKK", "5G", "20M", "HT", "1T", "60", "30", + "FCC", "5G", "20M", "HT", "1T", "64", "32", + "ETSI", "5G", "20M", "HT", "1T", "64", "30", + "MKK", "5G", "20M", "HT", "1T", "64", "30", + "FCC", "5G", "20M", "HT", "1T", "100", "32", + "ETSI", "5G", "20M", "HT", "1T", "100", "30", + "MKK", "5G", "20M", "HT", "1T", "100", "30", + "FCC", "5G", "20M", "HT", "1T", "104", "32", + "ETSI", "5G", "20M", "HT", "1T", "104", "30", + "MKK", "5G", "20M", "HT", "1T", "104", "30", + "FCC", "5G", "20M", "HT", "1T", "108", "32", + "ETSI", "5G", "20M", "HT", "1T", "108", "30", + "MKK", "5G", "20M", "HT", "1T", "108", "30", + "FCC", "5G", "20M", "HT", "1T", "112", "32", + "ETSI", "5G", "20M", "HT", "1T", "112", "30", + "MKK", "5G", "20M", "HT", "1T", "112", "30", + "FCC", "5G", "20M", "HT", "1T", "116", "32", + "ETSI", "5G", "20M", "HT", "1T", "116", "30", + "MKK", "5G", "20M", "HT", "1T", "116", "30", + "FCC", "5G", "20M", "HT", "1T", "120", "32", + "ETSI", "5G", "20M", "HT", "1T", "120", "30", + "MKK", "5G", "20M", "HT", "1T", "120", "30", + "FCC", "5G", "20M", "HT", "1T", "124", "32", + "ETSI", "5G", "20M", "HT", "1T", "124", "30", + "MKK", "5G", "20M", "HT", "1T", "124", "30", + "FCC", "5G", "20M", "HT", "1T", "128", "32", + "ETSI", "5G", "20M", "HT", "1T", "128", "30", + "MKK", "5G", "20M", "HT", "1T", "128", "30", + "FCC", "5G", "20M", "HT", "1T", "132", "32", + "ETSI", "5G", "20M", "HT", "1T", "132", "30", + "MKK", "5G", "20M", "HT", "1T", "132", "30", + "FCC", "5G", "20M", "HT", "1T", "136", "32", + "ETSI", "5G", "20M", "HT", "1T", "136", "30", + "MKK", "5G", "20M", "HT", "1T", "136", "30", + "FCC", "5G", "20M", "HT", "1T", "140", "32", + "ETSI", "5G", "20M", "HT", "1T", "140", "30", + "MKK", "5G", "20M", "HT", "1T", "140", "30", + "FCC", "5G", "20M", "HT", "1T", "149", "32", + "ETSI", "5G", "20M", "HT", "1T", "149", "30", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "32", + "ETSI", "5G", "20M", "HT", "1T", "153", "30", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "32", + "ETSI", "5G", "20M", "HT", "1T", "157", "30", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "32", + "ETSI", "5G", "20M", "HT", "1T", "161", "30", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "32", + "ETSI", "5G", "20M", "HT", "1T", "165", "30", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "28", + "ETSI", "5G", "20M", "HT", "2T", "36", "30", + "MKK", "5G", "20M", "HT", "2T", "36", "30", + "FCC", "5G", "20M", "HT", "2T", "40", "28", + "ETSI", "5G", "20M", "HT", "2T", "40", "30", + "MKK", "5G", "20M", "HT", "2T", "40", "30", + "FCC", "5G", "20M", "HT", "2T", "44", "28", + "ETSI", "5G", "20M", "HT", "2T", "44", "30", + "MKK", "5G", "20M", "HT", "2T", "44", "30", + "FCC", "5G", "20M", "HT", "2T", "48", "28", + "ETSI", "5G", "20M", "HT", "2T", "48", "30", + "MKK", "5G", "20M", "HT", "2T", "48", "30", + "FCC", "5G", "20M", "HT", "2T", "52", "34", + "ETSI", "5G", "20M", "HT", "2T", "52", "30", + "MKK", "5G", "20M", "HT", "2T", "52", "30", + "FCC", "5G", "20M", "HT", "2T", "56", "32", + "ETSI", "5G", "20M", "HT", "2T", "56", "30", + "MKK", "5G", "20M", "HT", "2T", "56", "30", + "FCC", "5G", "20M", "HT", "2T", "60", "30", + "ETSI", "5G", "20M", "HT", "2T", "60", "30", + "MKK", "5G", "20M", "HT", "2T", "60", "30", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "30", + "MKK", "5G", "20M", "HT", "2T", "64", "30", + "FCC", "5G", "20M", "HT", "2T", "100", "28", + "ETSI", "5G", "20M", "HT", "2T", "100", "30", + "MKK", "5G", "20M", "HT", "2T", "100", "30", + "FCC", "5G", "20M", "HT", "2T", "104", "28", + "ETSI", "5G", "20M", "HT", "2T", "104", "30", + "MKK", "5G", "20M", "HT", "2T", "104", "30", + "FCC", "5G", "20M", "HT", "2T", "108", "30", + "ETSI", "5G", "20M", "HT", "2T", "108", "30", + "MKK", "5G", "20M", "HT", "2T", "108", "30", + "FCC", "5G", "20M", "HT", "2T", "112", "32", + "ETSI", "5G", "20M", "HT", "2T", "112", "30", + "MKK", "5G", "20M", "HT", "2T", "112", "30", + "FCC", "5G", "20M", "HT", "2T", "116", "32", + "ETSI", "5G", "20M", "HT", "2T", "116", "30", + "MKK", "5G", "20M", "HT", "2T", "116", "30", + "FCC", "5G", "20M", "HT", "2T", "120", "34", + "ETSI", "5G", "20M", "HT", "2T", "120", "30", + "MKK", "5G", "20M", "HT", "2T", "120", "30", + "FCC", "5G", "20M", "HT", "2T", "124", "32", + "ETSI", "5G", "20M", "HT", "2T", "124", "30", + "MKK", "5G", "20M", "HT", "2T", "124", "30", + "FCC", "5G", "20M", "HT", "2T", "128", "30", + "ETSI", "5G", "20M", "HT", "2T", "128", "30", + "MKK", "5G", "20M", "HT", "2T", "128", "30", + "FCC", "5G", "20M", "HT", "2T", "132", "28", + "ETSI", "5G", "20M", "HT", "2T", "132", "30", + "MKK", "5G", "20M", "HT", "2T", "132", "30", + "FCC", "5G", "20M", "HT", "2T", "136", "28", + "ETSI", "5G", "20M", "HT", "2T", "136", "30", + "MKK", "5G", "20M", "HT", "2T", "136", "30", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "30", + "MKK", "5G", "20M", "HT", "2T", "140", "30", + "FCC", "5G", "20M", "HT", "2T", "149", "34", + "ETSI", "5G", "20M", "HT", "2T", "149", "30", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "34", + "ETSI", "5G", "20M", "HT", "2T", "153", "30", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "34", + "ETSI", "5G", "20M", "HT", "2T", "157", "30", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "34", + "ETSI", "5G", "20M", "HT", "2T", "161", "30", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "34", + "ETSI", "5G", "20M", "HT", "2T", "165", "30", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "26", + "ETSI", "5G", "40M", "HT", "1T", "38", "30", + "MKK", "5G", "40M", "HT", "1T", "38", "30", + "FCC", "5G", "40M", "HT", "1T", "46", "32", + "ETSI", "5G", "40M", "HT", "1T", "46", "30", + "MKK", "5G", "40M", "HT", "1T", "46", "30", + "FCC", "5G", "40M", "HT", "1T", "54", "32", + "ETSI", "5G", "40M", "HT", "1T", "54", "30", + "MKK", "5G", "40M", "HT", "1T", "54", "30", + "FCC", "5G", "40M", "HT", "1T", "62", "24", + "ETSI", "5G", "40M", "HT", "1T", "62", "30", + "MKK", "5G", "40M", "HT", "1T", "62", "30", + "FCC", "5G", "40M", "HT", "1T", "102", "24", + "ETSI", "5G", "40M", "HT", "1T", "102", "30", + "MKK", "5G", "40M", "HT", "1T", "102", "30", + "FCC", "5G", "40M", "HT", "1T", "110", "32", + "ETSI", "5G", "40M", "HT", "1T", "110", "30", + "MKK", "5G", "40M", "HT", "1T", "110", "30", + "FCC", "5G", "40M", "HT", "1T", "118", "32", + "ETSI", "5G", "40M", "HT", "1T", "118", "30", + "MKK", "5G", "40M", "HT", "1T", "118", "30", + "FCC", "5G", "40M", "HT", "1T", "126", "32", + "ETSI", "5G", "40M", "HT", "1T", "126", "30", + "MKK", "5G", "40M", "HT", "1T", "126", "30", + "FCC", "5G", "40M", "HT", "1T", "134", "32", + "ETSI", "5G", "40M", "HT", "1T", "134", "30", + "MKK", "5G", "40M", "HT", "1T", "134", "30", + "FCC", "5G", "40M", "HT", "1T", "151", "30", + "ETSI", "5G", "40M", "HT", "1T", "151", "30", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "32", + "ETSI", "5G", "40M", "HT", "1T", "159", "30", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "28", + "ETSI", "5G", "40M", "HT", "2T", "38", "30", + "MKK", "5G", "40M", "HT", "2T", "38", "30", + "FCC", "5G", "40M", "HT", "2T", "46", "28", + "ETSI", "5G", "40M", "HT", "2T", "46", "30", + "MKK", "5G", "40M", "HT", "2T", "46", "30", + "FCC", "5G", "40M", "HT", "2T", "54", "30", + "ETSI", "5G", "40M", "HT", "2T", "54", "30", + "MKK", "5G", "40M", "HT", "2T", "54", "30", + "FCC", "5G", "40M", "HT", "2T", "62", "30", + "ETSI", "5G", "40M", "HT", "2T", "62", "30", + "MKK", "5G", "40M", "HT", "2T", "62", "30", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "30", + "MKK", "5G", "40M", "HT", "2T", "102", "30", + "FCC", "5G", "40M", "HT", "2T", "110", "30", + "ETSI", "5G", "40M", "HT", "2T", "110", "30", + "MKK", "5G", "40M", "HT", "2T", "110", "30", + "FCC", "5G", "40M", "HT", "2T", "118", "34", + "ETSI", "5G", "40M", "HT", "2T", "118", "30", + "MKK", "5G", "40M", "HT", "2T", "118", "30", + "FCC", "5G", "40M", "HT", "2T", "126", "32", + "ETSI", "5G", "40M", "HT", "2T", "126", "30", + "MKK", "5G", "40M", "HT", "2T", "126", "30", + "FCC", "5G", "40M", "HT", "2T", "134", "30", + "ETSI", "5G", "40M", "HT", "2T", "134", "30", + "MKK", "5G", "40M", "HT", "2T", "134", "30", + "FCC", "5G", "40M", "HT", "2T", "151", "34", + "ETSI", "5G", "40M", "HT", "2T", "151", "30", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "34", + "ETSI", "5G", "40M", "HT", "2T", "159", "30", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "22", + "ETSI", "5G", "80M", "VHT", "1T", "42", "30", + "MKK", "5G", "80M", "VHT", "1T", "42", "30", + "FCC", "5G", "80M", "VHT", "1T", "58", "20", + "ETSI", "5G", "80M", "VHT", "1T", "58", "30", + "MKK", "5G", "80M", "VHT", "1T", "58", "30", + "FCC", "5G", "80M", "VHT", "1T", "106", "20", + "ETSI", "5G", "80M", "VHT", "1T", "106", "30", + "MKK", "5G", "80M", "VHT", "1T", "106", "30", + "FCC", "5G", "80M", "VHT", "1T", "122", "20", + "ETSI", "5G", "80M", "VHT", "1T", "122", "30", + "MKK", "5G", "80M", "VHT", "1T", "122", "30", + "FCC", "5G", "80M", "VHT", "1T", "155", "28", + "ETSI", "5G", "80M", "VHT", "1T", "155", "30", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "28", + "ETSI", "5G", "80M", "VHT", "2T", "42", "30", + "MKK", "5G", "80M", "VHT", "2T", "42", "30", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "30", + "MKK", "5G", "80M", "VHT", "2T", "58", "30", + "FCC", "5G", "80M", "VHT", "2T", "106", "28", + "ETSI", "5G", "80M", "VHT", "2T", "106", "30", + "MKK", "5G", "80M", "VHT", "2T", "106", "30", + "FCC", "5G", "80M", "VHT", "2T", "122", "32", + "ETSI", "5G", "80M", "VHT", "2T", "122", "30", + "MKK", "5G", "80M", "VHT", "2T", "122", "30", + "FCC", "5G", "80M", "VHT", "2T", "155", "34", + "ETSI", "5G", "80M", "VHT", "2T", "155", "30", + "MKK", "5G", "80M", "VHT", "2T", "155", "63" +}; + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_txpwr_lmt_8821a) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8821a_txpwr_lmt_8821a; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrLmt = array_len / 7; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_txpwr_lmt_8821a\n"); + + for (i = 0; i < array_len; i += 7) { + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; + + odm_config_bb_txpwr_lmt_8821a(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rf_path, chnl, val); +#endif + } + +} + +/****************************************************************************** +* TXPWR_LMT_8821A_E202SA.TXT +******************************************************************************/ + +const char *array_mp_8821a_txpwr_lmt_8821a_e202sa[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "27", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "27", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "27", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "27", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "22", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "28", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "20", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "20", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "20", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "28", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "28", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "16", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "26", + "MKK", "2.4G", "20M", "HT", "1T", "01", "26", + "FCC", "2.4G", "20M", "HT", "1T", "02", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "26", + "MKK", "2.4G", "20M", "HT", "1T", "02", "26", + "FCC", "2.4G", "20M", "HT", "1T", "03", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "26", + "MKK", "2.4G", "20M", "HT", "1T", "03", "26", + "FCC", "2.4G", "20M", "HT", "1T", "04", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "26", + "MKK", "2.4G", "20M", "HT", "1T", "04", "26", + "FCC", "2.4G", "20M", "HT", "1T", "05", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "26", + "MKK", "2.4G", "20M", "HT", "1T", "05", "26", + "FCC", "2.4G", "20M", "HT", "1T", "06", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "26", + "MKK", "2.4G", "20M", "HT", "1T", "06", "26", + "FCC", "2.4G", "20M", "HT", "1T", "07", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "26", + "MKK", "2.4G", "20M", "HT", "1T", "07", "26", + "FCC", "2.4G", "20M", "HT", "1T", "08", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "26", + "MKK", "2.4G", "20M", "HT", "1T", "08", "26", + "FCC", "2.4G", "20M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "26", + "MKK", "2.4G", "20M", "HT", "1T", "09", "26", + "FCC", "2.4G", "20M", "HT", "1T", "10", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "26", + "MKK", "2.4G", "20M", "HT", "1T", "10", "26", + "FCC", "2.4G", "20M", "HT", "1T", "11", "15", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "26", + "MKK", "2.4G", "20M", "HT", "1T", "11", "26", + "FCC", "2.4G", "20M", "HT", "1T", "12", "15", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "26", + "MKK", "2.4G", "20M", "HT", "1T", "12", "26", + "FCC", "2.4G", "20M", "HT", "1T", "13", "15", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "26", + "MKK", "2.4G", "20M", "HT", "1T", "13", "26", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "32", + "MKK", "2.4G", "20M", "HT", "2T", "01", "32", + "FCC", "2.4G", "20M", "HT", "2T", "02", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "32", + "MKK", "2.4G", "20M", "HT", "2T", "02", "32", + "FCC", "2.4G", "20M", "HT", "2T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "32", + "MKK", "2.4G", "20M", "HT", "2T", "03", "32", + "FCC", "2.4G", "20M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "32", + "MKK", "2.4G", "20M", "HT", "2T", "04", "32", + "FCC", "2.4G", "20M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "32", + "MKK", "2.4G", "20M", "HT", "2T", "05", "32", + "FCC", "2.4G", "20M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "06", "32", + "MKK", "2.4G", "20M", "HT", "2T", "06", "32", + "FCC", "2.4G", "20M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "07", "32", + "MKK", "2.4G", "20M", "HT", "2T", "07", "32", + "FCC", "2.4G", "20M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "08", "32", + "MKK", "2.4G", "20M", "HT", "2T", "08", "32", + "FCC", "2.4G", "20M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "09", "32", + "MKK", "2.4G", "20M", "HT", "2T", "09", "32", + "FCC", "2.4G", "20M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "10", "32", + "MKK", "2.4G", "20M", "HT", "2T", "10", "32", + "FCC", "2.4G", "20M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "32", + "MKK", "2.4G", "20M", "HT", "2T", "11", "32", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "32", + "MKK", "2.4G", "20M", "HT", "2T", "12", "32", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "32", + "MKK", "2.4G", "20M", "HT", "2T", "13", "32", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "40M", "HT", "1T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", + "MKK", "2.4G", "40M", "HT", "1T", "01", "63", + "FCC", "2.4G", "40M", "HT", "1T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", + "MKK", "2.4G", "40M", "HT", "1T", "02", "63", + "FCC", "2.4G", "40M", "HT", "1T", "03", "16", + "ETSI", "2.4G", "40M", "HT", "1T", "03", "22", + "MKK", "2.4G", "40M", "HT", "1T", "03", "22", + "FCC", "2.4G", "40M", "HT", "1T", "04", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "04", "22", + "MKK", "2.4G", "40M", "HT", "1T", "04", "22", + "FCC", "2.4G", "40M", "HT", "1T", "05", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "05", "22", + "MKK", "2.4G", "40M", "HT", "1T", "05", "22", + "FCC", "2.4G", "40M", "HT", "1T", "06", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "06", "22", + "MKK", "2.4G", "40M", "HT", "1T", "06", "22", + "FCC", "2.4G", "40M", "HT", "1T", "07", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "07", "22", + "MKK", "2.4G", "40M", "HT", "1T", "07", "22", + "FCC", "2.4G", "40M", "HT", "1T", "08", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "08", "22", + "MKK", "2.4G", "40M", "HT", "1T", "08", "22", + "FCC", "2.4G", "40M", "HT", "1T", "09", "16", + "ETSI", "2.4G", "40M", "HT", "1T", "09", "22", + "MKK", "2.4G", "40M", "HT", "1T", "09", "22", + "FCC", "2.4G", "40M", "HT", "1T", "10", "16", + "ETSI", "2.4G", "40M", "HT", "1T", "10", "22", + "MKK", "2.4G", "40M", "HT", "1T", "10", "22", + "FCC", "2.4G", "40M", "HT", "1T", "11", "16", + "ETSI", "2.4G", "40M", "HT", "1T", "11", "22", + "MKK", "2.4G", "40M", "HT", "1T", "11", "22", + "FCC", "2.4G", "40M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "12", "63", + "MKK", "2.4G", "40M", "HT", "1T", "12", "63", + "FCC", "2.4G", "40M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "13", "63", + "MKK", "2.4G", "40M", "HT", "1T", "13", "63", + "FCC", "2.4G", "40M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", + "MKK", "2.4G", "40M", "HT", "1T", "14", "63", + "FCC", "2.4G", "40M", "HT", "2T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", + "MKK", "2.4G", "40M", "HT", "2T", "01", "63", + "FCC", "2.4G", "40M", "HT", "2T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", + "MKK", "2.4G", "40M", "HT", "2T", "02", "63", + "FCC", "2.4G", "40M", "HT", "2T", "03", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", + "MKK", "2.4G", "40M", "HT", "2T", "03", "30", + "FCC", "2.4G", "40M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", + "MKK", "2.4G", "40M", "HT", "2T", "04", "30", + "FCC", "2.4G", "40M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", + "MKK", "2.4G", "40M", "HT", "2T", "05", "30", + "FCC", "2.4G", "40M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", + "MKK", "2.4G", "40M", "HT", "2T", "06", "30", + "FCC", "2.4G", "40M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", + "MKK", "2.4G", "40M", "HT", "2T", "07", "30", + "FCC", "2.4G", "40M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", + "MKK", "2.4G", "40M", "HT", "2T", "08", "30", + "FCC", "2.4G", "40M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", + "MKK", "2.4G", "40M", "HT", "2T", "09", "30", + "FCC", "2.4G", "40M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", + "MKK", "2.4G", "40M", "HT", "2T", "10", "30", + "FCC", "2.4G", "40M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", + "MKK", "2.4G", "40M", "HT", "2T", "11", "30", + "FCC", "2.4G", "40M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "12", "32", + "MKK", "2.4G", "40M", "HT", "2T", "12", "32", + "FCC", "2.4G", "40M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "13", "32", + "MKK", "2.4G", "40M", "HT", "2T", "13", "32", + "FCC", "2.4G", "40M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", + "MKK", "2.4G", "40M", "HT", "2T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "26", + "MKK", "5G", "20M", "OFDM", "1T", "36", "26", + "FCC", "5G", "20M", "OFDM", "1T", "40", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "26", + "MKK", "5G", "20M", "OFDM", "1T", "40", "26", + "FCC", "5G", "20M", "OFDM", "1T", "44", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "26", + "MKK", "5G", "20M", "OFDM", "1T", "44", "26", + "FCC", "5G", "20M", "OFDM", "1T", "48", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "26", + "MKK", "5G", "20M", "OFDM", "1T", "48", "26", + "FCC", "5G", "20M", "OFDM", "1T", "52", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "26", + "MKK", "5G", "20M", "OFDM", "1T", "52", "26", + "FCC", "5G", "20M", "OFDM", "1T", "56", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "26", + "MKK", "5G", "20M", "OFDM", "1T", "56", "26", + "FCC", "5G", "20M", "OFDM", "1T", "60", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "26", + "MKK", "5G", "20M", "OFDM", "1T", "60", "26", + "FCC", "5G", "20M", "OFDM", "1T", "64", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "26", + "MKK", "5G", "20M", "OFDM", "1T", "64", "26", + "FCC", "5G", "20M", "OFDM", "1T", "100", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "26", + "MKK", "5G", "20M", "OFDM", "1T", "100", "26", + "FCC", "5G", "20M", "OFDM", "1T", "104", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "26", + "MKK", "5G", "20M", "OFDM", "1T", "104", "26", + "FCC", "5G", "20M", "OFDM", "1T", "108", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "26", + "MKK", "5G", "20M", "OFDM", "1T", "108", "26", + "FCC", "5G", "20M", "OFDM", "1T", "112", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "26", + "MKK", "5G", "20M", "OFDM", "1T", "112", "26", + "FCC", "5G", "20M", "OFDM", "1T", "116", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "26", + "MKK", "5G", "20M", "OFDM", "1T", "116", "26", + "FCC", "5G", "20M", "OFDM", "1T", "120", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "26", + "MKK", "5G", "20M", "OFDM", "1T", "120", "26", + "FCC", "5G", "20M", "OFDM", "1T", "124", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "26", + "MKK", "5G", "20M", "OFDM", "1T", "124", "26", + "FCC", "5G", "20M", "OFDM", "1T", "128", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "26", + "MKK", "5G", "20M", "OFDM", "1T", "128", "26", + "FCC", "5G", "20M", "OFDM", "1T", "132", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "26", + "MKK", "5G", "20M", "OFDM", "1T", "132", "26", + "FCC", "5G", "20M", "OFDM", "1T", "136", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "26", + "MKK", "5G", "20M", "OFDM", "1T", "136", "26", + "FCC", "5G", "20M", "OFDM", "1T", "140", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "26", + "MKK", "5G", "20M", "OFDM", "1T", "140", "26", + "FCC", "5G", "20M", "OFDM", "1T", "149", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "26", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "26", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "26", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "26", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "26", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "24", + "ETSI", "5G", "20M", "HT", "1T", "36", "24", + "MKK", "5G", "20M", "HT", "1T", "36", "24", + "FCC", "5G", "20M", "HT", "1T", "40", "24", + "ETSI", "5G", "20M", "HT", "1T", "40", "24", + "MKK", "5G", "20M", "HT", "1T", "40", "24", + "FCC", "5G", "20M", "HT", "1T", "44", "24", + "ETSI", "5G", "20M", "HT", "1T", "44", "24", + "MKK", "5G", "20M", "HT", "1T", "44", "24", + "FCC", "5G", "20M", "HT", "1T", "48", "24", + "ETSI", "5G", "20M", "HT", "1T", "48", "24", + "MKK", "5G", "20M", "HT", "1T", "48", "24", + "FCC", "5G", "20M", "HT", "1T", "52", "24", + "ETSI", "5G", "20M", "HT", "1T", "52", "24", + "MKK", "5G", "20M", "HT", "1T", "52", "24", + "FCC", "5G", "20M", "HT", "1T", "56", "24", + "ETSI", "5G", "20M", "HT", "1T", "56", "24", + "MKK", "5G", "20M", "HT", "1T", "56", "24", + "FCC", "5G", "20M", "HT", "1T", "60", "24", + "ETSI", "5G", "20M", "HT", "1T", "60", "24", + "MKK", "5G", "20M", "HT", "1T", "60", "24", + "FCC", "5G", "20M", "HT", "1T", "64", "24", + "ETSI", "5G", "20M", "HT", "1T", "64", "24", + "MKK", "5G", "20M", "HT", "1T", "64", "24", + "FCC", "5G", "20M", "HT", "1T", "100", "24", + "ETSI", "5G", "20M", "HT", "1T", "100", "24", + "MKK", "5G", "20M", "HT", "1T", "100", "24", + "FCC", "5G", "20M", "HT", "1T", "104", "24", + "ETSI", "5G", "20M", "HT", "1T", "104", "24", + "MKK", "5G", "20M", "HT", "1T", "104", "24", + "FCC", "5G", "20M", "HT", "1T", "108", "24", + "ETSI", "5G", "20M", "HT", "1T", "108", "24", + "MKK", "5G", "20M", "HT", "1T", "108", "24", + "FCC", "5G", "20M", "HT", "1T", "112", "24", + "ETSI", "5G", "20M", "HT", "1T", "112", "24", + "MKK", "5G", "20M", "HT", "1T", "112", "24", + "FCC", "5G", "20M", "HT", "1T", "116", "24", + "ETSI", "5G", "20M", "HT", "1T", "116", "24", + "MKK", "5G", "20M", "HT", "1T", "116", "24", + "FCC", "5G", "20M", "HT", "1T", "120", "24", + "ETSI", "5G", "20M", "HT", "1T", "120", "24", + "MKK", "5G", "20M", "HT", "1T", "120", "24", + "FCC", "5G", "20M", "HT", "1T", "124", "24", + "ETSI", "5G", "20M", "HT", "1T", "124", "24", + "MKK", "5G", "20M", "HT", "1T", "124", "24", + "FCC", "5G", "20M", "HT", "1T", "128", "24", + "ETSI", "5G", "20M", "HT", "1T", "128", "24", + "MKK", "5G", "20M", "HT", "1T", "128", "24", + "FCC", "5G", "20M", "HT", "1T", "132", "24", + "ETSI", "5G", "20M", "HT", "1T", "132", "24", + "MKK", "5G", "20M", "HT", "1T", "132", "24", + "FCC", "5G", "20M", "HT", "1T", "136", "24", + "ETSI", "5G", "20M", "HT", "1T", "136", "24", + "MKK", "5G", "20M", "HT", "1T", "136", "24", + "FCC", "5G", "20M", "HT", "1T", "140", "24", + "ETSI", "5G", "20M", "HT", "1T", "140", "24", + "MKK", "5G", "20M", "HT", "1T", "140", "24", + "FCC", "5G", "20M", "HT", "1T", "149", "24", + "ETSI", "5G", "20M", "HT", "1T", "149", "24", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "24", + "ETSI", "5G", "20M", "HT", "1T", "153", "24", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "24", + "ETSI", "5G", "20M", "HT", "1T", "157", "24", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "24", + "ETSI", "5G", "20M", "HT", "1T", "161", "24", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "24", + "ETSI", "5G", "20M", "HT", "1T", "165", "24", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "28", + "ETSI", "5G", "20M", "HT", "2T", "36", "30", + "MKK", "5G", "20M", "HT", "2T", "36", "30", + "FCC", "5G", "20M", "HT", "2T", "40", "28", + "ETSI", "5G", "20M", "HT", "2T", "40", "30", + "MKK", "5G", "20M", "HT", "2T", "40", "30", + "FCC", "5G", "20M", "HT", "2T", "44", "28", + "ETSI", "5G", "20M", "HT", "2T", "44", "30", + "MKK", "5G", "20M", "HT", "2T", "44", "30", + "FCC", "5G", "20M", "HT", "2T", "48", "28", + "ETSI", "5G", "20M", "HT", "2T", "48", "30", + "MKK", "5G", "20M", "HT", "2T", "48", "30", + "FCC", "5G", "20M", "HT", "2T", "52", "34", + "ETSI", "5G", "20M", "HT", "2T", "52", "30", + "MKK", "5G", "20M", "HT", "2T", "52", "30", + "FCC", "5G", "20M", "HT", "2T", "56", "32", + "ETSI", "5G", "20M", "HT", "2T", "56", "30", + "MKK", "5G", "20M", "HT", "2T", "56", "30", + "FCC", "5G", "20M", "HT", "2T", "60", "30", + "ETSI", "5G", "20M", "HT", "2T", "60", "30", + "MKK", "5G", "20M", "HT", "2T", "60", "30", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "30", + "MKK", "5G", "20M", "HT", "2T", "64", "30", + "FCC", "5G", "20M", "HT", "2T", "100", "28", + "ETSI", "5G", "20M", "HT", "2T", "100", "30", + "MKK", "5G", "20M", "HT", "2T", "100", "30", + "FCC", "5G", "20M", "HT", "2T", "104", "28", + "ETSI", "5G", "20M", "HT", "2T", "104", "30", + "MKK", "5G", "20M", "HT", "2T", "104", "30", + "FCC", "5G", "20M", "HT", "2T", "108", "30", + "ETSI", "5G", "20M", "HT", "2T", "108", "30", + "MKK", "5G", "20M", "HT", "2T", "108", "30", + "FCC", "5G", "20M", "HT", "2T", "112", "32", + "ETSI", "5G", "20M", "HT", "2T", "112", "30", + "MKK", "5G", "20M", "HT", "2T", "112", "30", + "FCC", "5G", "20M", "HT", "2T", "116", "32", + "ETSI", "5G", "20M", "HT", "2T", "116", "30", + "MKK", "5G", "20M", "HT", "2T", "116", "30", + "FCC", "5G", "20M", "HT", "2T", "120", "34", + "ETSI", "5G", "20M", "HT", "2T", "120", "30", + "MKK", "5G", "20M", "HT", "2T", "120", "30", + "FCC", "5G", "20M", "HT", "2T", "124", "32", + "ETSI", "5G", "20M", "HT", "2T", "124", "30", + "MKK", "5G", "20M", "HT", "2T", "124", "30", + "FCC", "5G", "20M", "HT", "2T", "128", "30", + "ETSI", "5G", "20M", "HT", "2T", "128", "30", + "MKK", "5G", "20M", "HT", "2T", "128", "30", + "FCC", "5G", "20M", "HT", "2T", "132", "28", + "ETSI", "5G", "20M", "HT", "2T", "132", "30", + "MKK", "5G", "20M", "HT", "2T", "132", "30", + "FCC", "5G", "20M", "HT", "2T", "136", "28", + "ETSI", "5G", "20M", "HT", "2T", "136", "30", + "MKK", "5G", "20M", "HT", "2T", "136", "30", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "30", + "MKK", "5G", "20M", "HT", "2T", "140", "30", + "FCC", "5G", "20M", "HT", "2T", "149", "34", + "ETSI", "5G", "20M", "HT", "2T", "149", "30", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "34", + "ETSI", "5G", "20M", "HT", "2T", "153", "30", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "34", + "ETSI", "5G", "20M", "HT", "2T", "157", "30", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "34", + "ETSI", "5G", "20M", "HT", "2T", "161", "30", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "34", + "ETSI", "5G", "20M", "HT", "2T", "165", "30", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "20", + "ETSI", "5G", "40M", "HT", "1T", "38", "20", + "MKK", "5G", "40M", "HT", "1T", "38", "20", + "FCC", "5G", "40M", "HT", "1T", "46", "20", + "ETSI", "5G", "40M", "HT", "1T", "46", "20", + "MKK", "5G", "40M", "HT", "1T", "46", "20", + "FCC", "5G", "40M", "HT", "1T", "54", "20", + "ETSI", "5G", "40M", "HT", "1T", "54", "20", + "MKK", "5G", "40M", "HT", "1T", "54", "20", + "FCC", "5G", "40M", "HT", "1T", "62", "20", + "ETSI", "5G", "40M", "HT", "1T", "62", "20", + "MKK", "5G", "40M", "HT", "1T", "62", "20", + "FCC", "5G", "40M", "HT", "1T", "102", "20", + "ETSI", "5G", "40M", "HT", "1T", "102", "20", + "MKK", "5G", "40M", "HT", "1T", "102", "20", + "FCC", "5G", "40M", "HT", "1T", "110", "20", + "ETSI", "5G", "40M", "HT", "1T", "110", "20", + "MKK", "5G", "40M", "HT", "1T", "110", "20", + "FCC", "5G", "40M", "HT", "1T", "118", "20", + "ETSI", "5G", "40M", "HT", "1T", "118", "20", + "MKK", "5G", "40M", "HT", "1T", "118", "20", + "FCC", "5G", "40M", "HT", "1T", "126", "20", + "ETSI", "5G", "40M", "HT", "1T", "126", "20", + "MKK", "5G", "40M", "HT", "1T", "126", "20", + "FCC", "5G", "40M", "HT", "1T", "134", "20", + "ETSI", "5G", "40M", "HT", "1T", "134", "20", + "MKK", "5G", "40M", "HT", "1T", "134", "20", + "FCC", "5G", "40M", "HT", "1T", "151", "20", + "ETSI", "5G", "40M", "HT", "1T", "151", "20", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "20", + "ETSI", "5G", "40M", "HT", "1T", "159", "20", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "28", + "ETSI", "5G", "40M", "HT", "2T", "38", "30", + "MKK", "5G", "40M", "HT", "2T", "38", "30", + "FCC", "5G", "40M", "HT", "2T", "46", "28", + "ETSI", "5G", "40M", "HT", "2T", "46", "30", + "MKK", "5G", "40M", "HT", "2T", "46", "30", + "FCC", "5G", "40M", "HT", "2T", "54", "30", + "ETSI", "5G", "40M", "HT", "2T", "54", "30", + "MKK", "5G", "40M", "HT", "2T", "54", "30", + "FCC", "5G", "40M", "HT", "2T", "62", "30", + "ETSI", "5G", "40M", "HT", "2T", "62", "30", + "MKK", "5G", "40M", "HT", "2T", "62", "30", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "30", + "MKK", "5G", "40M", "HT", "2T", "102", "30", + "FCC", "5G", "40M", "HT", "2T", "110", "30", + "ETSI", "5G", "40M", "HT", "2T", "110", "30", + "MKK", "5G", "40M", "HT", "2T", "110", "30", + "FCC", "5G", "40M", "HT", "2T", "118", "34", + "ETSI", "5G", "40M", "HT", "2T", "118", "30", + "MKK", "5G", "40M", "HT", "2T", "118", "30", + "FCC", "5G", "40M", "HT", "2T", "126", "32", + "ETSI", "5G", "40M", "HT", "2T", "126", "30", + "MKK", "5G", "40M", "HT", "2T", "126", "30", + "FCC", "5G", "40M", "HT", "2T", "134", "30", + "ETSI", "5G", "40M", "HT", "2T", "134", "30", + "MKK", "5G", "40M", "HT", "2T", "134", "30", + "FCC", "5G", "40M", "HT", "2T", "151", "34", + "ETSI", "5G", "40M", "HT", "2T", "151", "30", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "34", + "ETSI", "5G", "40M", "HT", "2T", "159", "30", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "16", + "ETSI", "5G", "80M", "VHT", "1T", "42", "16", + "MKK", "5G", "80M", "VHT", "1T", "42", "16", + "FCC", "5G", "80M", "VHT", "1T", "58", "16", + "ETSI", "5G", "80M", "VHT", "1T", "58", "16", + "MKK", "5G", "80M", "VHT", "1T", "58", "16", + "FCC", "5G", "80M", "VHT", "1T", "106", "16", + "ETSI", "5G", "80M", "VHT", "1T", "106", "16", + "MKK", "5G", "80M", "VHT", "1T", "106", "16", + "FCC", "5G", "80M", "VHT", "1T", "122", "16", + "ETSI", "5G", "80M", "VHT", "1T", "122", "16", + "MKK", "5G", "80M", "VHT", "1T", "122", "16", + "FCC", "5G", "80M", "VHT", "1T", "155", "16", + "ETSI", "5G", "80M", "VHT", "1T", "155", "16", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "28", + "ETSI", "5G", "80M", "VHT", "2T", "42", "30", + "MKK", "5G", "80M", "VHT", "2T", "42", "30", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "30", + "MKK", "5G", "80M", "VHT", "2T", "58", "30", + "FCC", "5G", "80M", "VHT", "2T", "106", "28", + "ETSI", "5G", "80M", "VHT", "2T", "106", "30", + "MKK", "5G", "80M", "VHT", "2T", "106", "30", + "FCC", "5G", "80M", "VHT", "2T", "122", "32", + "ETSI", "5G", "80M", "VHT", "2T", "122", "30", + "MKK", "5G", "80M", "VHT", "2T", "122", "30", + "FCC", "5G", "80M", "VHT", "2T", "155", "34", + "ETSI", "5G", "80M", "VHT", "2T", "155", "30", + "MKK", "5G", "80M", "VHT", "2T", "155", "63" +}; + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_e202sa( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_txpwr_lmt_8821a_e202sa) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8821a_txpwr_lmt_8821a_e202sa; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrLmt = array_len / 7; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_txpwr_lmt_8821a_e202sa\n"); + + for (i = 0; i < array_len; i += 7) { + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; + + odm_config_bb_txpwr_lmt_8821a(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rf_path, chnl, val); +#endif + } + +} + +/****************************************************************************** +* TXPWR_LMT_8821A_SAR_13dBm.TXT +******************************************************************************/ + +const char *array_mp_8821a_txpwr_lmt_8821a_sar_13dbm[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "28", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "26", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "26", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "24", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "32", + "MKK", "2.4G", "20M", "HT", "1T", "01", "32", + "FCC", "2.4G", "20M", "HT", "1T", "02", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", + "MKK", "2.4G", "20M", "HT", "1T", "02", "32", + "FCC", "2.4G", "20M", "HT", "1T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", + "MKK", "2.4G", "20M", "HT", "1T", "03", "32", + "FCC", "2.4G", "20M", "HT", "1T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", + "MKK", "2.4G", "20M", "HT", "1T", "04", "32", + "FCC", "2.4G", "20M", "HT", "1T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", + "MKK", "2.4G", "20M", "HT", "1T", "05", "32", + "FCC", "2.4G", "20M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", + "MKK", "2.4G", "20M", "HT", "1T", "06", "32", + "FCC", "2.4G", "20M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", + "MKK", "2.4G", "20M", "HT", "1T", "07", "32", + "FCC", "2.4G", "20M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", + "MKK", "2.4G", "20M", "HT", "1T", "08", "32", + "FCC", "2.4G", "20M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", + "MKK", "2.4G", "20M", "HT", "1T", "09", "32", + "FCC", "2.4G", "20M", "HT", "1T", "10", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", + "MKK", "2.4G", "20M", "HT", "1T", "10", "32", + "FCC", "2.4G", "20M", "HT", "1T", "11", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", + "MKK", "2.4G", "20M", "HT", "1T", "11", "32", + "FCC", "2.4G", "20M", "HT", "1T", "12", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", + "MKK", "2.4G", "20M", "HT", "1T", "12", "32", + "FCC", "2.4G", "20M", "HT", "1T", "13", "24", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "32", + "MKK", "2.4G", "20M", "HT", "1T", "13", "32", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "32", + "MKK", "2.4G", "20M", "HT", "2T", "01", "32", + "FCC", "2.4G", "20M", "HT", "2T", "02", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "32", + "MKK", "2.4G", "20M", "HT", "2T", "02", "32", + "FCC", "2.4G", "20M", "HT", "2T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "32", + "MKK", "2.4G", "20M", "HT", "2T", "03", "32", + "FCC", "2.4G", "20M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "32", + "MKK", "2.4G", "20M", "HT", "2T", "04", "32", + "FCC", "2.4G", "20M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "32", + "MKK", "2.4G", "20M", "HT", "2T", "05", "32", + "FCC", "2.4G", "20M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "06", "32", + "MKK", "2.4G", "20M", "HT", "2T", "06", "32", + "FCC", "2.4G", "20M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "07", "32", + "MKK", "2.4G", "20M", "HT", "2T", "07", "32", + "FCC", "2.4G", "20M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "08", "32", + "MKK", "2.4G", "20M", "HT", "2T", "08", "32", + "FCC", "2.4G", "20M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "09", "32", + "MKK", "2.4G", "20M", "HT", "2T", "09", "32", + "FCC", "2.4G", "20M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "10", "32", + "MKK", "2.4G", "20M", "HT", "2T", "10", "32", + "FCC", "2.4G", "20M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "32", + "MKK", "2.4G", "20M", "HT", "2T", "11", "32", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "32", + "MKK", "2.4G", "20M", "HT", "2T", "12", "32", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "32", + "MKK", "2.4G", "20M", "HT", "2T", "13", "32", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "40M", "HT", "1T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", + "MKK", "2.4G", "40M", "HT", "1T", "01", "63", + "FCC", "2.4G", "40M", "HT", "1T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", + "MKK", "2.4G", "40M", "HT", "1T", "02", "63", + "FCC", "2.4G", "40M", "HT", "1T", "03", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "03", "32", + "MKK", "2.4G", "40M", "HT", "1T", "03", "32", + "FCC", "2.4G", "40M", "HT", "1T", "04", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "04", "32", + "MKK", "2.4G", "40M", "HT", "1T", "04", "32", + "FCC", "2.4G", "40M", "HT", "1T", "05", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "05", "32", + "MKK", "2.4G", "40M", "HT", "1T", "05", "32", + "FCC", "2.4G", "40M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "06", "32", + "MKK", "2.4G", "40M", "HT", "1T", "06", "32", + "FCC", "2.4G", "40M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "07", "32", + "MKK", "2.4G", "40M", "HT", "1T", "07", "32", + "FCC", "2.4G", "40M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "08", "32", + "MKK", "2.4G", "40M", "HT", "1T", "08", "32", + "FCC", "2.4G", "40M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "09", "32", + "MKK", "2.4G", "40M", "HT", "1T", "09", "32", + "FCC", "2.4G", "40M", "HT", "1T", "10", "24", + "ETSI", "2.4G", "40M", "HT", "1T", "10", "32", + "MKK", "2.4G", "40M", "HT", "1T", "10", "32", + "FCC", "2.4G", "40M", "HT", "1T", "11", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "11", "32", + "MKK", "2.4G", "40M", "HT", "1T", "11", "32", + "FCC", "2.4G", "40M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "12", "63", + "MKK", "2.4G", "40M", "HT", "1T", "12", "63", + "FCC", "2.4G", "40M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "13", "63", + "MKK", "2.4G", "40M", "HT", "1T", "13", "63", + "FCC", "2.4G", "40M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", + "MKK", "2.4G", "40M", "HT", "1T", "14", "63", + "FCC", "2.4G", "40M", "HT", "2T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", + "MKK", "2.4G", "40M", "HT", "2T", "01", "63", + "FCC", "2.4G", "40M", "HT", "2T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", + "MKK", "2.4G", "40M", "HT", "2T", "02", "63", + "FCC", "2.4G", "40M", "HT", "2T", "03", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", + "MKK", "2.4G", "40M", "HT", "2T", "03", "30", + "FCC", "2.4G", "40M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", + "MKK", "2.4G", "40M", "HT", "2T", "04", "30", + "FCC", "2.4G", "40M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", + "MKK", "2.4G", "40M", "HT", "2T", "05", "30", + "FCC", "2.4G", "40M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", + "MKK", "2.4G", "40M", "HT", "2T", "06", "30", + "FCC", "2.4G", "40M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", + "MKK", "2.4G", "40M", "HT", "2T", "07", "30", + "FCC", "2.4G", "40M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", + "MKK", "2.4G", "40M", "HT", "2T", "08", "30", + "FCC", "2.4G", "40M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", + "MKK", "2.4G", "40M", "HT", "2T", "09", "30", + "FCC", "2.4G", "40M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", + "MKK", "2.4G", "40M", "HT", "2T", "10", "30", + "FCC", "2.4G", "40M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", + "MKK", "2.4G", "40M", "HT", "2T", "11", "30", + "FCC", "2.4G", "40M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "12", "32", + "MKK", "2.4G", "40M", "HT", "2T", "12", "32", + "FCC", "2.4G", "40M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "13", "32", + "MKK", "2.4G", "40M", "HT", "2T", "13", "32", + "FCC", "2.4G", "40M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", + "MKK", "2.4G", "40M", "HT", "2T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "26", + "MKK", "5G", "20M", "OFDM", "1T", "36", "26", + "FCC", "5G", "20M", "OFDM", "1T", "40", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "26", + "MKK", "5G", "20M", "OFDM", "1T", "40", "26", + "FCC", "5G", "20M", "OFDM", "1T", "44", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "26", + "MKK", "5G", "20M", "OFDM", "1T", "44", "26", + "FCC", "5G", "20M", "OFDM", "1T", "48", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "26", + "MKK", "5G", "20M", "OFDM", "1T", "48", "26", + "FCC", "5G", "20M", "OFDM", "1T", "52", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "26", + "MKK", "5G", "20M", "OFDM", "1T", "52", "26", + "FCC", "5G", "20M", "OFDM", "1T", "56", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "26", + "MKK", "5G", "20M", "OFDM", "1T", "56", "26", + "FCC", "5G", "20M", "OFDM", "1T", "60", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "26", + "MKK", "5G", "20M", "OFDM", "1T", "60", "26", + "FCC", "5G", "20M", "OFDM", "1T", "64", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "26", + "MKK", "5G", "20M", "OFDM", "1T", "64", "26", + "FCC", "5G", "20M", "OFDM", "1T", "100", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "26", + "MKK", "5G", "20M", "OFDM", "1T", "100", "26", + "FCC", "5G", "20M", "OFDM", "1T", "104", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "26", + "MKK", "5G", "20M", "OFDM", "1T", "104", "26", + "FCC", "5G", "20M", "OFDM", "1T", "108", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "26", + "MKK", "5G", "20M", "OFDM", "1T", "108", "26", + "FCC", "5G", "20M", "OFDM", "1T", "112", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "26", + "MKK", "5G", "20M", "OFDM", "1T", "112", "26", + "FCC", "5G", "20M", "OFDM", "1T", "116", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "26", + "MKK", "5G", "20M", "OFDM", "1T", "116", "26", + "FCC", "5G", "20M", "OFDM", "1T", "120", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "26", + "MKK", "5G", "20M", "OFDM", "1T", "120", "26", + "FCC", "5G", "20M", "OFDM", "1T", "124", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "26", + "MKK", "5G", "20M", "OFDM", "1T", "124", "26", + "FCC", "5G", "20M", "OFDM", "1T", "128", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "26", + "MKK", "5G", "20M", "OFDM", "1T", "128", "26", + "FCC", "5G", "20M", "OFDM", "1T", "132", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "26", + "MKK", "5G", "20M", "OFDM", "1T", "132", "26", + "FCC", "5G", "20M", "OFDM", "1T", "136", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "26", + "MKK", "5G", "20M", "OFDM", "1T", "136", "26", + "FCC", "5G", "20M", "OFDM", "1T", "140", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "26", + "MKK", "5G", "20M", "OFDM", "1T", "140", "26", + "FCC", "5G", "20M", "OFDM", "1T", "149", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "26", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "26", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "26", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "26", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "26", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "26", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "26", + "ETSI", "5G", "20M", "HT", "1T", "36", "26", + "MKK", "5G", "20M", "HT", "1T", "36", "26", + "FCC", "5G", "20M", "HT", "1T", "40", "26", + "ETSI", "5G", "20M", "HT", "1T", "40", "26", + "MKK", "5G", "20M", "HT", "1T", "40", "26", + "FCC", "5G", "20M", "HT", "1T", "44", "26", + "ETSI", "5G", "20M", "HT", "1T", "44", "26", + "MKK", "5G", "20M", "HT", "1T", "44", "26", + "FCC", "5G", "20M", "HT", "1T", "48", "26", + "ETSI", "5G", "20M", "HT", "1T", "48", "26", + "MKK", "5G", "20M", "HT", "1T", "48", "26", + "FCC", "5G", "20M", "HT", "1T", "52", "26", + "ETSI", "5G", "20M", "HT", "1T", "52", "26", + "MKK", "5G", "20M", "HT", "1T", "52", "26", + "FCC", "5G", "20M", "HT", "1T", "56", "26", + "ETSI", "5G", "20M", "HT", "1T", "56", "26", + "MKK", "5G", "20M", "HT", "1T", "56", "26", + "FCC", "5G", "20M", "HT", "1T", "60", "26", + "ETSI", "5G", "20M", "HT", "1T", "60", "26", + "MKK", "5G", "20M", "HT", "1T", "60", "26", + "FCC", "5G", "20M", "HT", "1T", "64", "26", + "ETSI", "5G", "20M", "HT", "1T", "64", "26", + "MKK", "5G", "20M", "HT", "1T", "64", "26", + "FCC", "5G", "20M", "HT", "1T", "100", "26", + "ETSI", "5G", "20M", "HT", "1T", "100", "26", + "MKK", "5G", "20M", "HT", "1T", "100", "26", + "FCC", "5G", "20M", "HT", "1T", "104", "26", + "ETSI", "5G", "20M", "HT", "1T", "104", "26", + "MKK", "5G", "20M", "HT", "1T", "104", "26", + "FCC", "5G", "20M", "HT", "1T", "108", "26", + "ETSI", "5G", "20M", "HT", "1T", "108", "26", + "MKK", "5G", "20M", "HT", "1T", "108", "26", + "FCC", "5G", "20M", "HT", "1T", "112", "26", + "ETSI", "5G", "20M", "HT", "1T", "112", "26", + "MKK", "5G", "20M", "HT", "1T", "112", "26", + "FCC", "5G", "20M", "HT", "1T", "116", "26", + "ETSI", "5G", "20M", "HT", "1T", "116", "26", + "MKK", "5G", "20M", "HT", "1T", "116", "26", + "FCC", "5G", "20M", "HT", "1T", "120", "26", + "ETSI", "5G", "20M", "HT", "1T", "120", "26", + "MKK", "5G", "20M", "HT", "1T", "120", "26", + "FCC", "5G", "20M", "HT", "1T", "124", "26", + "ETSI", "5G", "20M", "HT", "1T", "124", "26", + "MKK", "5G", "20M", "HT", "1T", "124", "26", + "FCC", "5G", "20M", "HT", "1T", "128", "26", + "ETSI", "5G", "20M", "HT", "1T", "128", "26", + "MKK", "5G", "20M", "HT", "1T", "128", "26", + "FCC", "5G", "20M", "HT", "1T", "132", "26", + "ETSI", "5G", "20M", "HT", "1T", "132", "26", + "MKK", "5G", "20M", "HT", "1T", "132", "26", + "FCC", "5G", "20M", "HT", "1T", "136", "26", + "ETSI", "5G", "20M", "HT", "1T", "136", "26", + "MKK", "5G", "20M", "HT", "1T", "136", "26", + "FCC", "5G", "20M", "HT", "1T", "140", "26", + "ETSI", "5G", "20M", "HT", "1T", "140", "26", + "MKK", "5G", "20M", "HT", "1T", "140", "26", + "FCC", "5G", "20M", "HT", "1T", "149", "26", + "ETSI", "5G", "20M", "HT", "1T", "149", "26", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "26", + "ETSI", "5G", "20M", "HT", "1T", "153", "26", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "26", + "ETSI", "5G", "20M", "HT", "1T", "157", "26", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "26", + "ETSI", "5G", "20M", "HT", "1T", "161", "26", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "26", + "ETSI", "5G", "20M", "HT", "1T", "165", "26", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "26", + "ETSI", "5G", "20M", "HT", "2T", "36", "26", + "MKK", "5G", "20M", "HT", "2T", "36", "26", + "FCC", "5G", "20M", "HT", "2T", "40", "26", + "ETSI", "5G", "20M", "HT", "2T", "40", "26", + "MKK", "5G", "20M", "HT", "2T", "40", "26", + "FCC", "5G", "20M", "HT", "2T", "44", "26", + "ETSI", "5G", "20M", "HT", "2T", "44", "26", + "MKK", "5G", "20M", "HT", "2T", "44", "26", + "FCC", "5G", "20M", "HT", "2T", "48", "26", + "ETSI", "5G", "20M", "HT", "2T", "48", "26", + "MKK", "5G", "20M", "HT", "2T", "48", "26", + "FCC", "5G", "20M", "HT", "2T", "52", "26", + "ETSI", "5G", "20M", "HT", "2T", "52", "26", + "MKK", "5G", "20M", "HT", "2T", "52", "26", + "FCC", "5G", "20M", "HT", "2T", "56", "26", + "ETSI", "5G", "20M", "HT", "2T", "56", "26", + "MKK", "5G", "20M", "HT", "2T", "56", "26", + "FCC", "5G", "20M", "HT", "2T", "60", "26", + "ETSI", "5G", "20M", "HT", "2T", "60", "26", + "MKK", "5G", "20M", "HT", "2T", "60", "26", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "26", + "MKK", "5G", "20M", "HT", "2T", "64", "26", + "FCC", "5G", "20M", "HT", "2T", "100", "26", + "ETSI", "5G", "20M", "HT", "2T", "100", "26", + "MKK", "5G", "20M", "HT", "2T", "100", "26", + "FCC", "5G", "20M", "HT", "2T", "104", "26", + "ETSI", "5G", "20M", "HT", "2T", "104", "26", + "MKK", "5G", "20M", "HT", "2T", "104", "26", + "FCC", "5G", "20M", "HT", "2T", "108", "26", + "ETSI", "5G", "20M", "HT", "2T", "108", "26", + "MKK", "5G", "20M", "HT", "2T", "108", "26", + "FCC", "5G", "20M", "HT", "2T", "112", "26", + "ETSI", "5G", "20M", "HT", "2T", "112", "26", + "MKK", "5G", "20M", "HT", "2T", "112", "26", + "FCC", "5G", "20M", "HT", "2T", "116", "26", + "ETSI", "5G", "20M", "HT", "2T", "116", "26", + "MKK", "5G", "20M", "HT", "2T", "116", "26", + "FCC", "5G", "20M", "HT", "2T", "120", "26", + "ETSI", "5G", "20M", "HT", "2T", "120", "26", + "MKK", "5G", "20M", "HT", "2T", "120", "26", + "FCC", "5G", "20M", "HT", "2T", "124", "26", + "ETSI", "5G", "20M", "HT", "2T", "124", "26", + "MKK", "5G", "20M", "HT", "2T", "124", "26", + "FCC", "5G", "20M", "HT", "2T", "128", "26", + "ETSI", "5G", "20M", "HT", "2T", "128", "26", + "MKK", "5G", "20M", "HT", "2T", "128", "26", + "FCC", "5G", "20M", "HT", "2T", "132", "26", + "ETSI", "5G", "20M", "HT", "2T", "132", "26", + "MKK", "5G", "20M", "HT", "2T", "132", "26", + "FCC", "5G", "20M", "HT", "2T", "136", "26", + "ETSI", "5G", "20M", "HT", "2T", "136", "26", + "MKK", "5G", "20M", "HT", "2T", "136", "26", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "26", + "MKK", "5G", "20M", "HT", "2T", "140", "26", + "FCC", "5G", "20M", "HT", "2T", "149", "26", + "ETSI", "5G", "20M", "HT", "2T", "149", "26", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "26", + "ETSI", "5G", "20M", "HT", "2T", "153", "26", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "26", + "ETSI", "5G", "20M", "HT", "2T", "157", "26", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "26", + "ETSI", "5G", "20M", "HT", "2T", "161", "26", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "26", + "ETSI", "5G", "20M", "HT", "2T", "165", "26", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "26", + "ETSI", "5G", "40M", "HT", "1T", "38", "26", + "MKK", "5G", "40M", "HT", "1T", "38", "26", + "FCC", "5G", "40M", "HT", "1T", "46", "26", + "ETSI", "5G", "40M", "HT", "1T", "46", "26", + "MKK", "5G", "40M", "HT", "1T", "46", "26", + "FCC", "5G", "40M", "HT", "1T", "54", "26", + "ETSI", "5G", "40M", "HT", "1T", "54", "26", + "MKK", "5G", "40M", "HT", "1T", "54", "26", + "FCC", "5G", "40M", "HT", "1T", "62", "24", + "ETSI", "5G", "40M", "HT", "1T", "62", "26", + "MKK", "5G", "40M", "HT", "1T", "62", "26", + "FCC", "5G", "40M", "HT", "1T", "102", "24", + "ETSI", "5G", "40M", "HT", "1T", "102", "26", + "MKK", "5G", "40M", "HT", "1T", "102", "26", + "FCC", "5G", "40M", "HT", "1T", "110", "26", + "ETSI", "5G", "40M", "HT", "1T", "110", "26", + "MKK", "5G", "40M", "HT", "1T", "110", "26", + "FCC", "5G", "40M", "HT", "1T", "118", "26", + "ETSI", "5G", "40M", "HT", "1T", "118", "26", + "MKK", "5G", "40M", "HT", "1T", "118", "26", + "FCC", "5G", "40M", "HT", "1T", "126", "26", + "ETSI", "5G", "40M", "HT", "1T", "126", "26", + "MKK", "5G", "40M", "HT", "1T", "126", "26", + "FCC", "5G", "40M", "HT", "1T", "134", "26", + "ETSI", "5G", "40M", "HT", "1T", "134", "26", + "MKK", "5G", "40M", "HT", "1T", "134", "26", + "FCC", "5G", "40M", "HT", "1T", "151", "26", + "ETSI", "5G", "40M", "HT", "1T", "151", "26", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "26", + "ETSI", "5G", "40M", "HT", "1T", "159", "26", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "26", + "ETSI", "5G", "40M", "HT", "2T", "38", "26", + "MKK", "5G", "40M", "HT", "2T", "38", "26", + "FCC", "5G", "40M", "HT", "2T", "46", "26", + "ETSI", "5G", "40M", "HT", "2T", "46", "26", + "MKK", "5G", "40M", "HT", "2T", "46", "26", + "FCC", "5G", "40M", "HT", "2T", "54", "26", + "ETSI", "5G", "40M", "HT", "2T", "54", "26", + "MKK", "5G", "40M", "HT", "2T", "54", "26", + "FCC", "5G", "40M", "HT", "2T", "62", "26", + "ETSI", "5G", "40M", "HT", "2T", "62", "26", + "MKK", "5G", "40M", "HT", "2T", "62", "26", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "26", + "MKK", "5G", "40M", "HT", "2T", "102", "26", + "FCC", "5G", "40M", "HT", "2T", "110", "26", + "ETSI", "5G", "40M", "HT", "2T", "110", "26", + "MKK", "5G", "40M", "HT", "2T", "110", "26", + "FCC", "5G", "40M", "HT", "2T", "118", "26", + "ETSI", "5G", "40M", "HT", "2T", "118", "26", + "MKK", "5G", "40M", "HT", "2T", "118", "26", + "FCC", "5G", "40M", "HT", "2T", "126", "26", + "ETSI", "5G", "40M", "HT", "2T", "126", "26", + "MKK", "5G", "40M", "HT", "2T", "126", "26", + "FCC", "5G", "40M", "HT", "2T", "134", "26", + "ETSI", "5G", "40M", "HT", "2T", "134", "26", + "MKK", "5G", "40M", "HT", "2T", "134", "26", + "FCC", "5G", "40M", "HT", "2T", "151", "26", + "ETSI", "5G", "40M", "HT", "2T", "151", "26", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "26", + "ETSI", "5G", "40M", "HT", "2T", "159", "26", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "22", + "ETSI", "5G", "80M", "VHT", "1T", "42", "26", + "MKK", "5G", "80M", "VHT", "1T", "42", "26", + "FCC", "5G", "80M", "VHT", "1T", "58", "20", + "ETSI", "5G", "80M", "VHT", "1T", "58", "26", + "MKK", "5G", "80M", "VHT", "1T", "58", "26", + "FCC", "5G", "80M", "VHT", "1T", "106", "20", + "ETSI", "5G", "80M", "VHT", "1T", "106", "26", + "MKK", "5G", "80M", "VHT", "1T", "106", "26", + "FCC", "5G", "80M", "VHT", "1T", "122", "20", + "ETSI", "5G", "80M", "VHT", "1T", "122", "26", + "MKK", "5G", "80M", "VHT", "1T", "122", "26", + "FCC", "5G", "80M", "VHT", "1T", "155", "26", + "ETSI", "5G", "80M", "VHT", "1T", "155", "26", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "26", + "ETSI", "5G", "80M", "VHT", "2T", "42", "26", + "MKK", "5G", "80M", "VHT", "2T", "42", "26", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "26", + "MKK", "5G", "80M", "VHT", "2T", "58", "26", + "FCC", "5G", "80M", "VHT", "2T", "106", "26", + "ETSI", "5G", "80M", "VHT", "2T", "106", "26", + "MKK", "5G", "80M", "VHT", "2T", "106", "26", + "FCC", "5G", "80M", "VHT", "2T", "122", "26", + "ETSI", "5G", "80M", "VHT", "2T", "122", "26", + "MKK", "5G", "80M", "VHT", "2T", "122", "26", + "FCC", "5G", "80M", "VHT", "2T", "155", "26", + "ETSI", "5G", "80M", "VHT", "2T", "155", "26", + "MKK", "5G", "80M", "VHT", "2T", "155", "63" +}; + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_13_dbm( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_txpwr_lmt_8821a_sar_13dbm) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8821a_txpwr_lmt_8821a_sar_13dbm; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrLmt = array_len / 7; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_13_dbm\n"); + + for (i = 0; i < array_len; i += 7) { + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; + + odm_config_bb_txpwr_lmt_8821a(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rf_path, chnl, val); +#endif + } + +} + +/****************************************************************************** +* TXPWR_LMT_8821A_SAR_5mm.TXT +******************************************************************************/ + +const char *array_mp_8821a_txpwr_lmt_8821a_sar_5mm[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "34", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "28", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "26", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "26", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "24", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "32", + "MKK", "2.4G", "20M", "HT", "1T", "01", "32", + "FCC", "2.4G", "20M", "HT", "1T", "02", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", + "MKK", "2.4G", "20M", "HT", "1T", "02", "32", + "FCC", "2.4G", "20M", "HT", "1T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", + "MKK", "2.4G", "20M", "HT", "1T", "03", "32", + "FCC", "2.4G", "20M", "HT", "1T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", + "MKK", "2.4G", "20M", "HT", "1T", "04", "32", + "FCC", "2.4G", "20M", "HT", "1T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", + "MKK", "2.4G", "20M", "HT", "1T", "05", "32", + "FCC", "2.4G", "20M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", + "MKK", "2.4G", "20M", "HT", "1T", "06", "32", + "FCC", "2.4G", "20M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", + "MKK", "2.4G", "20M", "HT", "1T", "07", "32", + "FCC", "2.4G", "20M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", + "MKK", "2.4G", "20M", "HT", "1T", "08", "32", + "FCC", "2.4G", "20M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", + "MKK", "2.4G", "20M", "HT", "1T", "09", "32", + "FCC", "2.4G", "20M", "HT", "1T", "10", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", + "MKK", "2.4G", "20M", "HT", "1T", "10", "32", + "FCC", "2.4G", "20M", "HT", "1T", "11", "24", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", + "MKK", "2.4G", "20M", "HT", "1T", "11", "32", + "FCC", "2.4G", "20M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", + "MKK", "2.4G", "20M", "HT", "1T", "12", "32", + "FCC", "2.4G", "20M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "32", + "MKK", "2.4G", "20M", "HT", "1T", "13", "32", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "32", + "MKK", "2.4G", "20M", "HT", "2T", "01", "32", + "FCC", "2.4G", "20M", "HT", "2T", "02", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "32", + "MKK", "2.4G", "20M", "HT", "2T", "02", "32", + "FCC", "2.4G", "20M", "HT", "2T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "32", + "MKK", "2.4G", "20M", "HT", "2T", "03", "32", + "FCC", "2.4G", "20M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "32", + "MKK", "2.4G", "20M", "HT", "2T", "04", "32", + "FCC", "2.4G", "20M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "32", + "MKK", "2.4G", "20M", "HT", "2T", "05", "32", + "FCC", "2.4G", "20M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "06", "32", + "MKK", "2.4G", "20M", "HT", "2T", "06", "32", + "FCC", "2.4G", "20M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "07", "32", + "MKK", "2.4G", "20M", "HT", "2T", "07", "32", + "FCC", "2.4G", "20M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "08", "32", + "MKK", "2.4G", "20M", "HT", "2T", "08", "32", + "FCC", "2.4G", "20M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "09", "32", + "MKK", "2.4G", "20M", "HT", "2T", "09", "32", + "FCC", "2.4G", "20M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "10", "32", + "MKK", "2.4G", "20M", "HT", "2T", "10", "32", + "FCC", "2.4G", "20M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "32", + "MKK", "2.4G", "20M", "HT", "2T", "11", "32", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "32", + "MKK", "2.4G", "20M", "HT", "2T", "12", "32", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "32", + "MKK", "2.4G", "20M", "HT", "2T", "13", "32", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "40M", "HT", "1T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", + "MKK", "2.4G", "40M", "HT", "1T", "01", "63", + "FCC", "2.4G", "40M", "HT", "1T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", + "MKK", "2.4G", "40M", "HT", "1T", "02", "63", + "FCC", "2.4G", "40M", "HT", "1T", "03", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "03", "32", + "MKK", "2.4G", "40M", "HT", "1T", "03", "32", + "FCC", "2.4G", "40M", "HT", "1T", "04", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "04", "32", + "MKK", "2.4G", "40M", "HT", "1T", "04", "32", + "FCC", "2.4G", "40M", "HT", "1T", "05", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "05", "32", + "MKK", "2.4G", "40M", "HT", "1T", "05", "32", + "FCC", "2.4G", "40M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "06", "32", + "MKK", "2.4G", "40M", "HT", "1T", "06", "32", + "FCC", "2.4G", "40M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "07", "32", + "MKK", "2.4G", "40M", "HT", "1T", "07", "32", + "FCC", "2.4G", "40M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "08", "32", + "MKK", "2.4G", "40M", "HT", "1T", "08", "32", + "FCC", "2.4G", "40M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "09", "32", + "MKK", "2.4G", "40M", "HT", "1T", "09", "32", + "FCC", "2.4G", "40M", "HT", "1T", "10", "24", + "ETSI", "2.4G", "40M", "HT", "1T", "10", "32", + "MKK", "2.4G", "40M", "HT", "1T", "10", "32", + "FCC", "2.4G", "40M", "HT", "1T", "11", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "11", "32", + "MKK", "2.4G", "40M", "HT", "1T", "11", "32", + "FCC", "2.4G", "40M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "12", "63", + "MKK", "2.4G", "40M", "HT", "1T", "12", "63", + "FCC", "2.4G", "40M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "13", "63", + "MKK", "2.4G", "40M", "HT", "1T", "13", "63", + "FCC", "2.4G", "40M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", + "MKK", "2.4G", "40M", "HT", "1T", "14", "63", + "FCC", "2.4G", "40M", "HT", "2T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", + "MKK", "2.4G", "40M", "HT", "2T", "01", "63", + "FCC", "2.4G", "40M", "HT", "2T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", + "MKK", "2.4G", "40M", "HT", "2T", "02", "63", + "FCC", "2.4G", "40M", "HT", "2T", "03", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", + "MKK", "2.4G", "40M", "HT", "2T", "03", "30", + "FCC", "2.4G", "40M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", + "MKK", "2.4G", "40M", "HT", "2T", "04", "30", + "FCC", "2.4G", "40M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", + "MKK", "2.4G", "40M", "HT", "2T", "05", "30", + "FCC", "2.4G", "40M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", + "MKK", "2.4G", "40M", "HT", "2T", "06", "30", + "FCC", "2.4G", "40M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", + "MKK", "2.4G", "40M", "HT", "2T", "07", "30", + "FCC", "2.4G", "40M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", + "MKK", "2.4G", "40M", "HT", "2T", "08", "30", + "FCC", "2.4G", "40M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", + "MKK", "2.4G", "40M", "HT", "2T", "09", "30", + "FCC", "2.4G", "40M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", + "MKK", "2.4G", "40M", "HT", "2T", "10", "30", + "FCC", "2.4G", "40M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", + "MKK", "2.4G", "40M", "HT", "2T", "11", "30", + "FCC", "2.4G", "40M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "12", "32", + "MKK", "2.4G", "40M", "HT", "2T", "12", "32", + "FCC", "2.4G", "40M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "13", "32", + "MKK", "2.4G", "40M", "HT", "2T", "13", "32", + "FCC", "2.4G", "40M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", + "MKK", "2.4G", "40M", "HT", "2T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "30", + "MKK", "5G", "20M", "OFDM", "1T", "36", "30", + "FCC", "5G", "20M", "OFDM", "1T", "40", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "30", + "MKK", "5G", "20M", "OFDM", "1T", "40", "30", + "FCC", "5G", "20M", "OFDM", "1T", "44", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "30", + "MKK", "5G", "20M", "OFDM", "1T", "44", "30", + "FCC", "5G", "20M", "OFDM", "1T", "48", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "30", + "MKK", "5G", "20M", "OFDM", "1T", "48", "30", + "FCC", "5G", "20M", "OFDM", "1T", "52", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "30", + "MKK", "5G", "20M", "OFDM", "1T", "52", "30", + "FCC", "5G", "20M", "OFDM", "1T", "56", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "30", + "MKK", "5G", "20M", "OFDM", "1T", "56", "30", + "FCC", "5G", "20M", "OFDM", "1T", "60", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "30", + "MKK", "5G", "20M", "OFDM", "1T", "60", "30", + "FCC", "5G", "20M", "OFDM", "1T", "64", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "30", + "MKK", "5G", "20M", "OFDM", "1T", "64", "30", + "FCC", "5G", "20M", "OFDM", "1T", "100", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "30", + "MKK", "5G", "20M", "OFDM", "1T", "100", "30", + "FCC", "5G", "20M", "OFDM", "1T", "104", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "30", + "MKK", "5G", "20M", "OFDM", "1T", "104", "30", + "FCC", "5G", "20M", "OFDM", "1T", "108", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "30", + "MKK", "5G", "20M", "OFDM", "1T", "108", "30", + "FCC", "5G", "20M", "OFDM", "1T", "112", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "30", + "MKK", "5G", "20M", "OFDM", "1T", "112", "30", + "FCC", "5G", "20M", "OFDM", "1T", "116", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "30", + "MKK", "5G", "20M", "OFDM", "1T", "116", "30", + "FCC", "5G", "20M", "OFDM", "1T", "120", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "30", + "MKK", "5G", "20M", "OFDM", "1T", "120", "30", + "FCC", "5G", "20M", "OFDM", "1T", "124", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "30", + "MKK", "5G", "20M", "OFDM", "1T", "124", "30", + "FCC", "5G", "20M", "OFDM", "1T", "128", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "30", + "MKK", "5G", "20M", "OFDM", "1T", "128", "30", + "FCC", "5G", "20M", "OFDM", "1T", "132", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "30", + "MKK", "5G", "20M", "OFDM", "1T", "132", "30", + "FCC", "5G", "20M", "OFDM", "1T", "136", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "30", + "MKK", "5G", "20M", "OFDM", "1T", "136", "30", + "FCC", "5G", "20M", "OFDM", "1T", "140", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "30", + "MKK", "5G", "20M", "OFDM", "1T", "140", "30", + "FCC", "5G", "20M", "OFDM", "1T", "149", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "30", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "30", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "30", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "30", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "30", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "32", + "ETSI", "5G", "20M", "HT", "1T", "36", "30", + "MKK", "5G", "20M", "HT", "1T", "36", "30", + "FCC", "5G", "20M", "HT", "1T", "40", "32", + "ETSI", "5G", "20M", "HT", "1T", "40", "30", + "MKK", "5G", "20M", "HT", "1T", "40", "30", + "FCC", "5G", "20M", "HT", "1T", "44", "32", + "ETSI", "5G", "20M", "HT", "1T", "44", "30", + "MKK", "5G", "20M", "HT", "1T", "44", "30", + "FCC", "5G", "20M", "HT", "1T", "48", "32", + "ETSI", "5G", "20M", "HT", "1T", "48", "30", + "MKK", "5G", "20M", "HT", "1T", "48", "30", + "FCC", "5G", "20M", "HT", "1T", "52", "28", + "ETSI", "5G", "20M", "HT", "1T", "52", "30", + "MKK", "5G", "20M", "HT", "1T", "52", "30", + "FCC", "5G", "20M", "HT", "1T", "56", "28", + "ETSI", "5G", "20M", "HT", "1T", "56", "30", + "MKK", "5G", "20M", "HT", "1T", "56", "30", + "FCC", "5G", "20M", "HT", "1T", "60", "28", + "ETSI", "5G", "20M", "HT", "1T", "60", "30", + "MKK", "5G", "20M", "HT", "1T", "60", "30", + "FCC", "5G", "20M", "HT", "1T", "64", "28", + "ETSI", "5G", "20M", "HT", "1T", "64", "30", + "MKK", "5G", "20M", "HT", "1T", "64", "30", + "FCC", "5G", "20M", "HT", "1T", "100", "28", + "ETSI", "5G", "20M", "HT", "1T", "100", "30", + "MKK", "5G", "20M", "HT", "1T", "100", "30", + "FCC", "5G", "20M", "HT", "1T", "104", "28", + "ETSI", "5G", "20M", "HT", "1T", "104", "30", + "MKK", "5G", "20M", "HT", "1T", "104", "30", + "FCC", "5G", "20M", "HT", "1T", "108", "28", + "ETSI", "5G", "20M", "HT", "1T", "108", "30", + "MKK", "5G", "20M", "HT", "1T", "108", "30", + "FCC", "5G", "20M", "HT", "1T", "112", "28", + "ETSI", "5G", "20M", "HT", "1T", "112", "30", + "MKK", "5G", "20M", "HT", "1T", "112", "30", + "FCC", "5G", "20M", "HT", "1T", "116", "28", + "ETSI", "5G", "20M", "HT", "1T", "116", "30", + "MKK", "5G", "20M", "HT", "1T", "116", "30", + "FCC", "5G", "20M", "HT", "1T", "120", "28", + "ETSI", "5G", "20M", "HT", "1T", "120", "30", + "MKK", "5G", "20M", "HT", "1T", "120", "30", + "FCC", "5G", "20M", "HT", "1T", "124", "28", + "ETSI", "5G", "20M", "HT", "1T", "124", "30", + "MKK", "5G", "20M", "HT", "1T", "124", "30", + "FCC", "5G", "20M", "HT", "1T", "128", "28", + "ETSI", "5G", "20M", "HT", "1T", "128", "30", + "MKK", "5G", "20M", "HT", "1T", "128", "30", + "FCC", "5G", "20M", "HT", "1T", "132", "28", + "ETSI", "5G", "20M", "HT", "1T", "132", "30", + "MKK", "5G", "20M", "HT", "1T", "132", "30", + "FCC", "5G", "20M", "HT", "1T", "136", "28", + "ETSI", "5G", "20M", "HT", "1T", "136", "30", + "MKK", "5G", "20M", "HT", "1T", "136", "30", + "FCC", "5G", "20M", "HT", "1T", "140", "28", + "ETSI", "5G", "20M", "HT", "1T", "140", "30", + "MKK", "5G", "20M", "HT", "1T", "140", "30", + "FCC", "5G", "20M", "HT", "1T", "149", "28", + "ETSI", "5G", "20M", "HT", "1T", "149", "30", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "28", + "ETSI", "5G", "20M", "HT", "1T", "153", "30", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "28", + "ETSI", "5G", "20M", "HT", "1T", "157", "30", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "28", + "ETSI", "5G", "20M", "HT", "1T", "161", "30", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "28", + "ETSI", "5G", "20M", "HT", "1T", "165", "30", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "28", + "ETSI", "5G", "20M", "HT", "2T", "36", "30", + "MKK", "5G", "20M", "HT", "2T", "36", "30", + "FCC", "5G", "20M", "HT", "2T", "40", "28", + "ETSI", "5G", "20M", "HT", "2T", "40", "30", + "MKK", "5G", "20M", "HT", "2T", "40", "30", + "FCC", "5G", "20M", "HT", "2T", "44", "28", + "ETSI", "5G", "20M", "HT", "2T", "44", "30", + "MKK", "5G", "20M", "HT", "2T", "44", "30", + "FCC", "5G", "20M", "HT", "2T", "48", "28", + "ETSI", "5G", "20M", "HT", "2T", "48", "30", + "MKK", "5G", "20M", "HT", "2T", "48", "30", + "FCC", "5G", "20M", "HT", "2T", "52", "34", + "ETSI", "5G", "20M", "HT", "2T", "52", "30", + "MKK", "5G", "20M", "HT", "2T", "52", "30", + "FCC", "5G", "20M", "HT", "2T", "56", "32", + "ETSI", "5G", "20M", "HT", "2T", "56", "30", + "MKK", "5G", "20M", "HT", "2T", "56", "30", + "FCC", "5G", "20M", "HT", "2T", "60", "30", + "ETSI", "5G", "20M", "HT", "2T", "60", "30", + "MKK", "5G", "20M", "HT", "2T", "60", "30", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "30", + "MKK", "5G", "20M", "HT", "2T", "64", "30", + "FCC", "5G", "20M", "HT", "2T", "100", "28", + "ETSI", "5G", "20M", "HT", "2T", "100", "30", + "MKK", "5G", "20M", "HT", "2T", "100", "30", + "FCC", "5G", "20M", "HT", "2T", "104", "28", + "ETSI", "5G", "20M", "HT", "2T", "104", "30", + "MKK", "5G", "20M", "HT", "2T", "104", "30", + "FCC", "5G", "20M", "HT", "2T", "108", "30", + "ETSI", "5G", "20M", "HT", "2T", "108", "30", + "MKK", "5G", "20M", "HT", "2T", "108", "30", + "FCC", "5G", "20M", "HT", "2T", "112", "32", + "ETSI", "5G", "20M", "HT", "2T", "112", "30", + "MKK", "5G", "20M", "HT", "2T", "112", "30", + "FCC", "5G", "20M", "HT", "2T", "116", "32", + "ETSI", "5G", "20M", "HT", "2T", "116", "30", + "MKK", "5G", "20M", "HT", "2T", "116", "30", + "FCC", "5G", "20M", "HT", "2T", "120", "34", + "ETSI", "5G", "20M", "HT", "2T", "120", "30", + "MKK", "5G", "20M", "HT", "2T", "120", "30", + "FCC", "5G", "20M", "HT", "2T", "124", "32", + "ETSI", "5G", "20M", "HT", "2T", "124", "30", + "MKK", "5G", "20M", "HT", "2T", "124", "30", + "FCC", "5G", "20M", "HT", "2T", "128", "30", + "ETSI", "5G", "20M", "HT", "2T", "128", "30", + "MKK", "5G", "20M", "HT", "2T", "128", "30", + "FCC", "5G", "20M", "HT", "2T", "132", "28", + "ETSI", "5G", "20M", "HT", "2T", "132", "30", + "MKK", "5G", "20M", "HT", "2T", "132", "30", + "FCC", "5G", "20M", "HT", "2T", "136", "28", + "ETSI", "5G", "20M", "HT", "2T", "136", "30", + "MKK", "5G", "20M", "HT", "2T", "136", "30", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "30", + "MKK", "5G", "20M", "HT", "2T", "140", "30", + "FCC", "5G", "20M", "HT", "2T", "149", "34", + "ETSI", "5G", "20M", "HT", "2T", "149", "30", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "34", + "ETSI", "5G", "20M", "HT", "2T", "153", "30", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "34", + "ETSI", "5G", "20M", "HT", "2T", "157", "30", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "34", + "ETSI", "5G", "20M", "HT", "2T", "161", "30", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "34", + "ETSI", "5G", "20M", "HT", "2T", "165", "30", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "26", + "ETSI", "5G", "40M", "HT", "1T", "38", "30", + "MKK", "5G", "40M", "HT", "1T", "38", "30", + "FCC", "5G", "40M", "HT", "1T", "46", "32", + "ETSI", "5G", "40M", "HT", "1T", "46", "30", + "MKK", "5G", "40M", "HT", "1T", "46", "30", + "FCC", "5G", "40M", "HT", "1T", "54", "28", + "ETSI", "5G", "40M", "HT", "1T", "54", "30", + "MKK", "5G", "40M", "HT", "1T", "54", "30", + "FCC", "5G", "40M", "HT", "1T", "62", "24", + "ETSI", "5G", "40M", "HT", "1T", "62", "30", + "MKK", "5G", "40M", "HT", "1T", "62", "30", + "FCC", "5G", "40M", "HT", "1T", "102", "24", + "ETSI", "5G", "40M", "HT", "1T", "102", "30", + "MKK", "5G", "40M", "HT", "1T", "102", "30", + "FCC", "5G", "40M", "HT", "1T", "110", "28", + "ETSI", "5G", "40M", "HT", "1T", "110", "30", + "MKK", "5G", "40M", "HT", "1T", "110", "30", + "FCC", "5G", "40M", "HT", "1T", "118", "28", + "ETSI", "5G", "40M", "HT", "1T", "118", "30", + "MKK", "5G", "40M", "HT", "1T", "118", "30", + "FCC", "5G", "40M", "HT", "1T", "126", "28", + "ETSI", "5G", "40M", "HT", "1T", "126", "30", + "MKK", "5G", "40M", "HT", "1T", "126", "30", + "FCC", "5G", "40M", "HT", "1T", "134", "28", + "ETSI", "5G", "40M", "HT", "1T", "134", "30", + "MKK", "5G", "40M", "HT", "1T", "134", "30", + "FCC", "5G", "40M", "HT", "1T", "151", "28", + "ETSI", "5G", "40M", "HT", "1T", "151", "30", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "28", + "ETSI", "5G", "40M", "HT", "1T", "159", "30", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "28", + "ETSI", "5G", "40M", "HT", "2T", "38", "30", + "MKK", "5G", "40M", "HT", "2T", "38", "30", + "FCC", "5G", "40M", "HT", "2T", "46", "28", + "ETSI", "5G", "40M", "HT", "2T", "46", "30", + "MKK", "5G", "40M", "HT", "2T", "46", "30", + "FCC", "5G", "40M", "HT", "2T", "54", "30", + "ETSI", "5G", "40M", "HT", "2T", "54", "30", + "MKK", "5G", "40M", "HT", "2T", "54", "30", + "FCC", "5G", "40M", "HT", "2T", "62", "30", + "ETSI", "5G", "40M", "HT", "2T", "62", "30", + "MKK", "5G", "40M", "HT", "2T", "62", "30", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "30", + "MKK", "5G", "40M", "HT", "2T", "102", "30", + "FCC", "5G", "40M", "HT", "2T", "110", "30", + "ETSI", "5G", "40M", "HT", "2T", "110", "30", + "MKK", "5G", "40M", "HT", "2T", "110", "30", + "FCC", "5G", "40M", "HT", "2T", "118", "34", + "ETSI", "5G", "40M", "HT", "2T", "118", "30", + "MKK", "5G", "40M", "HT", "2T", "118", "30", + "FCC", "5G", "40M", "HT", "2T", "126", "32", + "ETSI", "5G", "40M", "HT", "2T", "126", "30", + "MKK", "5G", "40M", "HT", "2T", "126", "30", + "FCC", "5G", "40M", "HT", "2T", "134", "30", + "ETSI", "5G", "40M", "HT", "2T", "134", "30", + "MKK", "5G", "40M", "HT", "2T", "134", "30", + "FCC", "5G", "40M", "HT", "2T", "151", "34", + "ETSI", "5G", "40M", "HT", "2T", "151", "30", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "34", + "ETSI", "5G", "40M", "HT", "2T", "159", "30", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "22", + "ETSI", "5G", "80M", "VHT", "1T", "42", "30", + "MKK", "5G", "80M", "VHT", "1T", "42", "30", + "FCC", "5G", "80M", "VHT", "1T", "58", "20", + "ETSI", "5G", "80M", "VHT", "1T", "58", "30", + "MKK", "5G", "80M", "VHT", "1T", "58", "30", + "FCC", "5G", "80M", "VHT", "1T", "106", "20", + "ETSI", "5G", "80M", "VHT", "1T", "106", "30", + "MKK", "5G", "80M", "VHT", "1T", "106", "30", + "FCC", "5G", "80M", "VHT", "1T", "122", "20", + "ETSI", "5G", "80M", "VHT", "1T", "122", "30", + "MKK", "5G", "80M", "VHT", "1T", "122", "30", + "FCC", "5G", "80M", "VHT", "1T", "155", "26", + "ETSI", "5G", "80M", "VHT", "1T", "155", "30", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "28", + "ETSI", "5G", "80M", "VHT", "2T", "42", "30", + "MKK", "5G", "80M", "VHT", "2T", "42", "30", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "30", + "MKK", "5G", "80M", "VHT", "2T", "58", "30", + "FCC", "5G", "80M", "VHT", "2T", "106", "28", + "ETSI", "5G", "80M", "VHT", "2T", "106", "30", + "MKK", "5G", "80M", "VHT", "2T", "106", "30", + "FCC", "5G", "80M", "VHT", "2T", "122", "32", + "ETSI", "5G", "80M", "VHT", "2T", "122", "30", + "MKK", "5G", "80M", "VHT", "2T", "122", "30", + "FCC", "5G", "80M", "VHT", "2T", "155", "34", + "ETSI", "5G", "80M", "VHT", "2T", "155", "30", + "MKK", "5G", "80M", "VHT", "2T", "155", "63" +}; + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_5mm( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_txpwr_lmt_8821a_sar_5mm) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8821a_txpwr_lmt_8821a_sar_5mm; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrLmt = array_len / 7; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_5mm\n"); + + for (i = 0; i < array_len; i += 7) { + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; + + odm_config_bb_txpwr_lmt_8821a(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rf_path, chnl, val); +#endif + } + +} + +/****************************************************************************** +* TXPWR_LMT_8821A_SAR_8mm.TXT +******************************************************************************/ + +const char *array_mp_8821a_txpwr_lmt_8821a_sar_8mm[] = { + "FCC", "2.4G", "20M", "CCK", "1T", "01", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "01", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "01", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "02", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "02", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "02", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "03", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "03", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "03", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "04", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "04", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "04", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "05", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "05", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "05", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "06", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "06", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "06", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "07", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "07", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "07", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "08", "36", + "ETSI", "2.4G", "20M", "CCK", "1T", "08", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "08", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "09", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "09", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "09", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "10", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "10", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "10", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "11", "32", + "ETSI", "2.4G", "20M", "CCK", "1T", "11", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "11", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "12", "28", + "ETSI", "2.4G", "20M", "CCK", "1T", "12", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "12", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "13", "26", + "ETSI", "2.4G", "20M", "CCK", "1T", "13", "28", + "MKK", "2.4G", "20M", "CCK", "1T", "13", "32", + "FCC", "2.4G", "20M", "CCK", "1T", "14", "63", + "ETSI", "2.4G", "20M", "CCK", "1T", "14", "63", + "MKK", "2.4G", "20M", "CCK", "1T", "14", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "01", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "01", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "01", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "02", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "02", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "02", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "03", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "03", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "03", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "04", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "04", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "04", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "05", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "05", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "05", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "06", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "06", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "06", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "07", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "07", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "07", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "08", "32", + "ETSI", "2.4G", "20M", "OFDM", "1T", "08", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "08", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "09", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "09", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "09", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "10", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "10", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "10", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "11", "30", + "ETSI", "2.4G", "20M", "OFDM", "1T", "11", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "11", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "12", "26", + "ETSI", "2.4G", "20M", "OFDM", "1T", "12", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "12", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "13", "24", + "ETSI", "2.4G", "20M", "OFDM", "1T", "13", "32", + "MKK", "2.4G", "20M", "OFDM", "1T", "13", "32", + "FCC", "2.4G", "20M", "OFDM", "1T", "14", "63", + "ETSI", "2.4G", "20M", "OFDM", "1T", "14", "63", + "MKK", "2.4G", "20M", "OFDM", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "1T", "01", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "01", "32", + "MKK", "2.4G", "20M", "HT", "1T", "01", "32", + "FCC", "2.4G", "20M", "HT", "1T", "02", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "02", "32", + "MKK", "2.4G", "20M", "HT", "1T", "02", "32", + "FCC", "2.4G", "20M", "HT", "1T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "03", "32", + "MKK", "2.4G", "20M", "HT", "1T", "03", "32", + "FCC", "2.4G", "20M", "HT", "1T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "04", "32", + "MKK", "2.4G", "20M", "HT", "1T", "04", "32", + "FCC", "2.4G", "20M", "HT", "1T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "05", "32", + "MKK", "2.4G", "20M", "HT", "1T", "05", "32", + "FCC", "2.4G", "20M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "06", "32", + "MKK", "2.4G", "20M", "HT", "1T", "06", "32", + "FCC", "2.4G", "20M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "07", "32", + "MKK", "2.4G", "20M", "HT", "1T", "07", "32", + "FCC", "2.4G", "20M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "1T", "08", "32", + "MKK", "2.4G", "20M", "HT", "1T", "08", "32", + "FCC", "2.4G", "20M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "09", "32", + "MKK", "2.4G", "20M", "HT", "1T", "09", "32", + "FCC", "2.4G", "20M", "HT", "1T", "10", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "10", "32", + "MKK", "2.4G", "20M", "HT", "1T", "10", "32", + "FCC", "2.4G", "20M", "HT", "1T", "11", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "11", "32", + "MKK", "2.4G", "20M", "HT", "1T", "11", "32", + "FCC", "2.4G", "20M", "HT", "1T", "12", "26", + "ETSI", "2.4G", "20M", "HT", "1T", "12", "32", + "MKK", "2.4G", "20M", "HT", "1T", "12", "32", + "FCC", "2.4G", "20M", "HT", "1T", "13", "24", + "ETSI", "2.4G", "20M", "HT", "1T", "13", "32", + "MKK", "2.4G", "20M", "HT", "1T", "13", "32", + "FCC", "2.4G", "20M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "1T", "14", "63", + "MKK", "2.4G", "20M", "HT", "1T", "14", "63", + "FCC", "2.4G", "20M", "HT", "2T", "01", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "01", "32", + "MKK", "2.4G", "20M", "HT", "2T", "01", "32", + "FCC", "2.4G", "20M", "HT", "2T", "02", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "02", "32", + "MKK", "2.4G", "20M", "HT", "2T", "02", "32", + "FCC", "2.4G", "20M", "HT", "2T", "03", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "03", "32", + "MKK", "2.4G", "20M", "HT", "2T", "03", "32", + "FCC", "2.4G", "20M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "04", "32", + "MKK", "2.4G", "20M", "HT", "2T", "04", "32", + "FCC", "2.4G", "20M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "05", "32", + "MKK", "2.4G", "20M", "HT", "2T", "05", "32", + "FCC", "2.4G", "20M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "06", "32", + "MKK", "2.4G", "20M", "HT", "2T", "06", "32", + "FCC", "2.4G", "20M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "07", "32", + "MKK", "2.4G", "20M", "HT", "2T", "07", "32", + "FCC", "2.4G", "20M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "08", "32", + "MKK", "2.4G", "20M", "HT", "2T", "08", "32", + "FCC", "2.4G", "20M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "09", "32", + "MKK", "2.4G", "20M", "HT", "2T", "09", "32", + "FCC", "2.4G", "20M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "20M", "HT", "2T", "10", "32", + "MKK", "2.4G", "20M", "HT", "2T", "10", "32", + "FCC", "2.4G", "20M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "20M", "HT", "2T", "11", "32", + "MKK", "2.4G", "20M", "HT", "2T", "11", "32", + "FCC", "2.4G", "20M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "12", "32", + "MKK", "2.4G", "20M", "HT", "2T", "12", "32", + "FCC", "2.4G", "20M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "13", "32", + "MKK", "2.4G", "20M", "HT", "2T", "13", "32", + "FCC", "2.4G", "20M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "20M", "HT", "2T", "14", "63", + "MKK", "2.4G", "20M", "HT", "2T", "14", "63", + "FCC", "2.4G", "40M", "HT", "1T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "01", "63", + "MKK", "2.4G", "40M", "HT", "1T", "01", "63", + "FCC", "2.4G", "40M", "HT", "1T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "02", "63", + "MKK", "2.4G", "40M", "HT", "1T", "02", "63", + "FCC", "2.4G", "40M", "HT", "1T", "03", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "03", "32", + "MKK", "2.4G", "40M", "HT", "1T", "03", "32", + "FCC", "2.4G", "40M", "HT", "1T", "04", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "04", "32", + "MKK", "2.4G", "40M", "HT", "1T", "04", "32", + "FCC", "2.4G", "40M", "HT", "1T", "05", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "05", "32", + "MKK", "2.4G", "40M", "HT", "1T", "05", "32", + "FCC", "2.4G", "40M", "HT", "1T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "06", "32", + "MKK", "2.4G", "40M", "HT", "1T", "06", "32", + "FCC", "2.4G", "40M", "HT", "1T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "07", "32", + "MKK", "2.4G", "40M", "HT", "1T", "07", "32", + "FCC", "2.4G", "40M", "HT", "1T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "1T", "08", "32", + "MKK", "2.4G", "40M", "HT", "1T", "08", "32", + "FCC", "2.4G", "40M", "HT", "1T", "09", "26", + "ETSI", "2.4G", "40M", "HT", "1T", "09", "32", + "MKK", "2.4G", "40M", "HT", "1T", "09", "32", + "FCC", "2.4G", "40M", "HT", "1T", "10", "24", + "ETSI", "2.4G", "40M", "HT", "1T", "10", "32", + "MKK", "2.4G", "40M", "HT", "1T", "10", "32", + "FCC", "2.4G", "40M", "HT", "1T", "11", "22", + "ETSI", "2.4G", "40M", "HT", "1T", "11", "32", + "MKK", "2.4G", "40M", "HT", "1T", "11", "32", + "FCC", "2.4G", "40M", "HT", "1T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "12", "63", + "MKK", "2.4G", "40M", "HT", "1T", "12", "63", + "FCC", "2.4G", "40M", "HT", "1T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "13", "63", + "MKK", "2.4G", "40M", "HT", "1T", "13", "63", + "FCC", "2.4G", "40M", "HT", "1T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "1T", "14", "63", + "MKK", "2.4G", "40M", "HT", "1T", "14", "63", + "FCC", "2.4G", "40M", "HT", "2T", "01", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "01", "63", + "MKK", "2.4G", "40M", "HT", "2T", "01", "63", + "FCC", "2.4G", "40M", "HT", "2T", "02", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "02", "63", + "MKK", "2.4G", "40M", "HT", "2T", "02", "63", + "FCC", "2.4G", "40M", "HT", "2T", "03", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "03", "30", + "MKK", "2.4G", "40M", "HT", "2T", "03", "30", + "FCC", "2.4G", "40M", "HT", "2T", "04", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "04", "30", + "MKK", "2.4G", "40M", "HT", "2T", "04", "30", + "FCC", "2.4G", "40M", "HT", "2T", "05", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "05", "30", + "MKK", "2.4G", "40M", "HT", "2T", "05", "30", + "FCC", "2.4G", "40M", "HT", "2T", "06", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "06", "30", + "MKK", "2.4G", "40M", "HT", "2T", "06", "30", + "FCC", "2.4G", "40M", "HT", "2T", "07", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "07", "30", + "MKK", "2.4G", "40M", "HT", "2T", "07", "30", + "FCC", "2.4G", "40M", "HT", "2T", "08", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "08", "30", + "MKK", "2.4G", "40M", "HT", "2T", "08", "30", + "FCC", "2.4G", "40M", "HT", "2T", "09", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "09", "30", + "MKK", "2.4G", "40M", "HT", "2T", "09", "30", + "FCC", "2.4G", "40M", "HT", "2T", "10", "32", + "ETSI", "2.4G", "40M", "HT", "2T", "10", "30", + "MKK", "2.4G", "40M", "HT", "2T", "10", "30", + "FCC", "2.4G", "40M", "HT", "2T", "11", "30", + "ETSI", "2.4G", "40M", "HT", "2T", "11", "30", + "MKK", "2.4G", "40M", "HT", "2T", "11", "30", + "FCC", "2.4G", "40M", "HT", "2T", "12", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "12", "32", + "MKK", "2.4G", "40M", "HT", "2T", "12", "32", + "FCC", "2.4G", "40M", "HT", "2T", "13", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "13", "32", + "MKK", "2.4G", "40M", "HT", "2T", "13", "32", + "FCC", "2.4G", "40M", "HT", "2T", "14", "63", + "ETSI", "2.4G", "40M", "HT", "2T", "14", "63", + "MKK", "2.4G", "40M", "HT", "2T", "14", "63", + "FCC", "5G", "20M", "OFDM", "1T", "36", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "36", "30", + "MKK", "5G", "20M", "OFDM", "1T", "36", "30", + "FCC", "5G", "20M", "OFDM", "1T", "40", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "40", "30", + "MKK", "5G", "20M", "OFDM", "1T", "40", "30", + "FCC", "5G", "20M", "OFDM", "1T", "44", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "44", "30", + "MKK", "5G", "20M", "OFDM", "1T", "44", "30", + "FCC", "5G", "20M", "OFDM", "1T", "48", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "48", "30", + "MKK", "5G", "20M", "OFDM", "1T", "48", "30", + "FCC", "5G", "20M", "OFDM", "1T", "52", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "52", "30", + "MKK", "5G", "20M", "OFDM", "1T", "52", "30", + "FCC", "5G", "20M", "OFDM", "1T", "56", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "56", "30", + "MKK", "5G", "20M", "OFDM", "1T", "56", "30", + "FCC", "5G", "20M", "OFDM", "1T", "60", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "60", "30", + "MKK", "5G", "20M", "OFDM", "1T", "60", "30", + "FCC", "5G", "20M", "OFDM", "1T", "64", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "64", "30", + "MKK", "5G", "20M", "OFDM", "1T", "64", "30", + "FCC", "5G", "20M", "OFDM", "1T", "100", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "100", "30", + "MKK", "5G", "20M", "OFDM", "1T", "100", "30", + "FCC", "5G", "20M", "OFDM", "1T", "104", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "104", "30", + "MKK", "5G", "20M", "OFDM", "1T", "104", "30", + "FCC", "5G", "20M", "OFDM", "1T", "108", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "108", "30", + "MKK", "5G", "20M", "OFDM", "1T", "108", "30", + "FCC", "5G", "20M", "OFDM", "1T", "112", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "112", "30", + "MKK", "5G", "20M", "OFDM", "1T", "112", "30", + "FCC", "5G", "20M", "OFDM", "1T", "116", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "116", "30", + "MKK", "5G", "20M", "OFDM", "1T", "116", "30", + "FCC", "5G", "20M", "OFDM", "1T", "120", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "120", "30", + "MKK", "5G", "20M", "OFDM", "1T", "120", "30", + "FCC", "5G", "20M", "OFDM", "1T", "124", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "124", "30", + "MKK", "5G", "20M", "OFDM", "1T", "124", "30", + "FCC", "5G", "20M", "OFDM", "1T", "128", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "128", "30", + "MKK", "5G", "20M", "OFDM", "1T", "128", "30", + "FCC", "5G", "20M", "OFDM", "1T", "132", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "132", "30", + "MKK", "5G", "20M", "OFDM", "1T", "132", "30", + "FCC", "5G", "20M", "OFDM", "1T", "136", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "136", "30", + "MKK", "5G", "20M", "OFDM", "1T", "136", "30", + "FCC", "5G", "20M", "OFDM", "1T", "140", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "140", "30", + "MKK", "5G", "20M", "OFDM", "1T", "140", "30", + "FCC", "5G", "20M", "OFDM", "1T", "149", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "149", "30", + "MKK", "5G", "20M", "OFDM", "1T", "149", "63", + "FCC", "5G", "20M", "OFDM", "1T", "153", "28", + "ETSI", "5G", "20M", "OFDM", "1T", "153", "30", + "MKK", "5G", "20M", "OFDM", "1T", "153", "63", + "FCC", "5G", "20M", "OFDM", "1T", "157", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "157", "30", + "MKK", "5G", "20M", "OFDM", "1T", "157", "63", + "FCC", "5G", "20M", "OFDM", "1T", "161", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "161", "30", + "MKK", "5G", "20M", "OFDM", "1T", "161", "63", + "FCC", "5G", "20M", "OFDM", "1T", "165", "32", + "ETSI", "5G", "20M", "OFDM", "1T", "165", "30", + "MKK", "5G", "20M", "OFDM", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "1T", "36", "32", + "ETSI", "5G", "20M", "HT", "1T", "36", "30", + "MKK", "5G", "20M", "HT", "1T", "36", "30", + "FCC", "5G", "20M", "HT", "1T", "40", "32", + "ETSI", "5G", "20M", "HT", "1T", "40", "30", + "MKK", "5G", "20M", "HT", "1T", "40", "30", + "FCC", "5G", "20M", "HT", "1T", "44", "32", + "ETSI", "5G", "20M", "HT", "1T", "44", "30", + "MKK", "5G", "20M", "HT", "1T", "44", "30", + "FCC", "5G", "20M", "HT", "1T", "48", "32", + "ETSI", "5G", "20M", "HT", "1T", "48", "30", + "MKK", "5G", "20M", "HT", "1T", "48", "30", + "FCC", "5G", "20M", "HT", "1T", "52", "32", + "ETSI", "5G", "20M", "HT", "1T", "52", "30", + "MKK", "5G", "20M", "HT", "1T", "52", "30", + "FCC", "5G", "20M", "HT", "1T", "56", "32", + "ETSI", "5G", "20M", "HT", "1T", "56", "30", + "MKK", "5G", "20M", "HT", "1T", "56", "30", + "FCC", "5G", "20M", "HT", "1T", "60", "32", + "ETSI", "5G", "20M", "HT", "1T", "60", "30", + "MKK", "5G", "20M", "HT", "1T", "60", "30", + "FCC", "5G", "20M", "HT", "1T", "64", "32", + "ETSI", "5G", "20M", "HT", "1T", "64", "30", + "MKK", "5G", "20M", "HT", "1T", "64", "30", + "FCC", "5G", "20M", "HT", "1T", "100", "28", + "ETSI", "5G", "20M", "HT", "1T", "100", "30", + "MKK", "5G", "20M", "HT", "1T", "100", "30", + "FCC", "5G", "20M", "HT", "1T", "104", "28", + "ETSI", "5G", "20M", "HT", "1T", "104", "30", + "MKK", "5G", "20M", "HT", "1T", "104", "30", + "FCC", "5G", "20M", "HT", "1T", "108", "28", + "ETSI", "5G", "20M", "HT", "1T", "108", "30", + "MKK", "5G", "20M", "HT", "1T", "108", "30", + "FCC", "5G", "20M", "HT", "1T", "112", "32", + "ETSI", "5G", "20M", "HT", "1T", "112", "30", + "MKK", "5G", "20M", "HT", "1T", "112", "30", + "FCC", "5G", "20M", "HT", "1T", "116", "32", + "ETSI", "5G", "20M", "HT", "1T", "116", "30", + "MKK", "5G", "20M", "HT", "1T", "116", "30", + "FCC", "5G", "20M", "HT", "1T", "120", "32", + "ETSI", "5G", "20M", "HT", "1T", "120", "30", + "MKK", "5G", "20M", "HT", "1T", "120", "30", + "FCC", "5G", "20M", "HT", "1T", "124", "32", + "ETSI", "5G", "20M", "HT", "1T", "124", "30", + "MKK", "5G", "20M", "HT", "1T", "124", "30", + "FCC", "5G", "20M", "HT", "1T", "128", "32", + "ETSI", "5G", "20M", "HT", "1T", "128", "30", + "MKK", "5G", "20M", "HT", "1T", "128", "30", + "FCC", "5G", "20M", "HT", "1T", "132", "32", + "ETSI", "5G", "20M", "HT", "1T", "132", "30", + "MKK", "5G", "20M", "HT", "1T", "132", "30", + "FCC", "5G", "20M", "HT", "1T", "136", "32", + "ETSI", "5G", "20M", "HT", "1T", "136", "30", + "MKK", "5G", "20M", "HT", "1T", "136", "30", + "FCC", "5G", "20M", "HT", "1T", "140", "32", + "ETSI", "5G", "20M", "HT", "1T", "140", "30", + "MKK", "5G", "20M", "HT", "1T", "140", "30", + "FCC", "5G", "20M", "HT", "1T", "149", "28", + "ETSI", "5G", "20M", "HT", "1T", "149", "30", + "MKK", "5G", "20M", "HT", "1T", "149", "63", + "FCC", "5G", "20M", "HT", "1T", "153", "28", + "ETSI", "5G", "20M", "HT", "1T", "153", "30", + "MKK", "5G", "20M", "HT", "1T", "153", "63", + "FCC", "5G", "20M", "HT", "1T", "157", "32", + "ETSI", "5G", "20M", "HT", "1T", "157", "30", + "MKK", "5G", "20M", "HT", "1T", "157", "63", + "FCC", "5G", "20M", "HT", "1T", "161", "32", + "ETSI", "5G", "20M", "HT", "1T", "161", "30", + "MKK", "5G", "20M", "HT", "1T", "161", "63", + "FCC", "5G", "20M", "HT", "1T", "165", "32", + "ETSI", "5G", "20M", "HT", "1T", "165", "30", + "MKK", "5G", "20M", "HT", "1T", "165", "63", + "FCC", "5G", "20M", "HT", "2T", "36", "28", + "ETSI", "5G", "20M", "HT", "2T", "36", "30", + "MKK", "5G", "20M", "HT", "2T", "36", "30", + "FCC", "5G", "20M", "HT", "2T", "40", "28", + "ETSI", "5G", "20M", "HT", "2T", "40", "30", + "MKK", "5G", "20M", "HT", "2T", "40", "30", + "FCC", "5G", "20M", "HT", "2T", "44", "28", + "ETSI", "5G", "20M", "HT", "2T", "44", "30", + "MKK", "5G", "20M", "HT", "2T", "44", "30", + "FCC", "5G", "20M", "HT", "2T", "48", "28", + "ETSI", "5G", "20M", "HT", "2T", "48", "30", + "MKK", "5G", "20M", "HT", "2T", "48", "30", + "FCC", "5G", "20M", "HT", "2T", "52", "34", + "ETSI", "5G", "20M", "HT", "2T", "52", "30", + "MKK", "5G", "20M", "HT", "2T", "52", "30", + "FCC", "5G", "20M", "HT", "2T", "56", "32", + "ETSI", "5G", "20M", "HT", "2T", "56", "30", + "MKK", "5G", "20M", "HT", "2T", "56", "30", + "FCC", "5G", "20M", "HT", "2T", "60", "30", + "ETSI", "5G", "20M", "HT", "2T", "60", "30", + "MKK", "5G", "20M", "HT", "2T", "60", "30", + "FCC", "5G", "20M", "HT", "2T", "64", "26", + "ETSI", "5G", "20M", "HT", "2T", "64", "30", + "MKK", "5G", "20M", "HT", "2T", "64", "30", + "FCC", "5G", "20M", "HT", "2T", "100", "28", + "ETSI", "5G", "20M", "HT", "2T", "100", "30", + "MKK", "5G", "20M", "HT", "2T", "100", "30", + "FCC", "5G", "20M", "HT", "2T", "104", "28", + "ETSI", "5G", "20M", "HT", "2T", "104", "30", + "MKK", "5G", "20M", "HT", "2T", "104", "30", + "FCC", "5G", "20M", "HT", "2T", "108", "30", + "ETSI", "5G", "20M", "HT", "2T", "108", "30", + "MKK", "5G", "20M", "HT", "2T", "108", "30", + "FCC", "5G", "20M", "HT", "2T", "112", "32", + "ETSI", "5G", "20M", "HT", "2T", "112", "30", + "MKK", "5G", "20M", "HT", "2T", "112", "30", + "FCC", "5G", "20M", "HT", "2T", "116", "32", + "ETSI", "5G", "20M", "HT", "2T", "116", "30", + "MKK", "5G", "20M", "HT", "2T", "116", "30", + "FCC", "5G", "20M", "HT", "2T", "120", "34", + "ETSI", "5G", "20M", "HT", "2T", "120", "30", + "MKK", "5G", "20M", "HT", "2T", "120", "30", + "FCC", "5G", "20M", "HT", "2T", "124", "32", + "ETSI", "5G", "20M", "HT", "2T", "124", "30", + "MKK", "5G", "20M", "HT", "2T", "124", "30", + "FCC", "5G", "20M", "HT", "2T", "128", "30", + "ETSI", "5G", "20M", "HT", "2T", "128", "30", + "MKK", "5G", "20M", "HT", "2T", "128", "30", + "FCC", "5G", "20M", "HT", "2T", "132", "28", + "ETSI", "5G", "20M", "HT", "2T", "132", "30", + "MKK", "5G", "20M", "HT", "2T", "132", "30", + "FCC", "5G", "20M", "HT", "2T", "136", "28", + "ETSI", "5G", "20M", "HT", "2T", "136", "30", + "MKK", "5G", "20M", "HT", "2T", "136", "30", + "FCC", "5G", "20M", "HT", "2T", "140", "26", + "ETSI", "5G", "20M", "HT", "2T", "140", "30", + "MKK", "5G", "20M", "HT", "2T", "140", "30", + "FCC", "5G", "20M", "HT", "2T", "149", "34", + "ETSI", "5G", "20M", "HT", "2T", "149", "30", + "MKK", "5G", "20M", "HT", "2T", "149", "63", + "FCC", "5G", "20M", "HT", "2T", "153", "34", + "ETSI", "5G", "20M", "HT", "2T", "153", "30", + "MKK", "5G", "20M", "HT", "2T", "153", "63", + "FCC", "5G", "20M", "HT", "2T", "157", "34", + "ETSI", "5G", "20M", "HT", "2T", "157", "30", + "MKK", "5G", "20M", "HT", "2T", "157", "63", + "FCC", "5G", "20M", "HT", "2T", "161", "34", + "ETSI", "5G", "20M", "HT", "2T", "161", "30", + "MKK", "5G", "20M", "HT", "2T", "161", "63", + "FCC", "5G", "20M", "HT", "2T", "165", "34", + "ETSI", "5G", "20M", "HT", "2T", "165", "30", + "MKK", "5G", "20M", "HT", "2T", "165", "63", + "FCC", "5G", "40M", "HT", "1T", "38", "26", + "ETSI", "5G", "40M", "HT", "1T", "38", "30", + "MKK", "5G", "40M", "HT", "1T", "38", "30", + "FCC", "5G", "40M", "HT", "1T", "46", "32", + "ETSI", "5G", "40M", "HT", "1T", "46", "30", + "MKK", "5G", "40M", "HT", "1T", "46", "30", + "FCC", "5G", "40M", "HT", "1T", "54", "32", + "ETSI", "5G", "40M", "HT", "1T", "54", "30", + "MKK", "5G", "40M", "HT", "1T", "54", "30", + "FCC", "5G", "40M", "HT", "1T", "62", "24", + "ETSI", "5G", "40M", "HT", "1T", "62", "30", + "MKK", "5G", "40M", "HT", "1T", "62", "30", + "FCC", "5G", "40M", "HT", "1T", "102", "24", + "ETSI", "5G", "40M", "HT", "1T", "102", "30", + "MKK", "5G", "40M", "HT", "1T", "102", "30", + "FCC", "5G", "40M", "HT", "1T", "110", "28", + "ETSI", "5G", "40M", "HT", "1T", "110", "30", + "MKK", "5G", "40M", "HT", "1T", "110", "30", + "FCC", "5G", "40M", "HT", "1T", "118", "28", + "ETSI", "5G", "40M", "HT", "1T", "118", "30", + "MKK", "5G", "40M", "HT", "1T", "118", "30", + "FCC", "5G", "40M", "HT", "1T", "126", "28", + "ETSI", "5G", "40M", "HT", "1T", "126", "30", + "MKK", "5G", "40M", "HT", "1T", "126", "30", + "FCC", "5G", "40M", "HT", "1T", "134", "32", + "ETSI", "5G", "40M", "HT", "1T", "134", "30", + "MKK", "5G", "40M", "HT", "1T", "134", "30", + "FCC", "5G", "40M", "HT", "1T", "151", "28", + "ETSI", "5G", "40M", "HT", "1T", "151", "30", + "MKK", "5G", "40M", "HT", "1T", "151", "63", + "FCC", "5G", "40M", "HT", "1T", "159", "32", + "ETSI", "5G", "40M", "HT", "1T", "159", "30", + "MKK", "5G", "40M", "HT", "1T", "159", "63", + "FCC", "5G", "40M", "HT", "2T", "38", "28", + "ETSI", "5G", "40M", "HT", "2T", "38", "30", + "MKK", "5G", "40M", "HT", "2T", "38", "30", + "FCC", "5G", "40M", "HT", "2T", "46", "28", + "ETSI", "5G", "40M", "HT", "2T", "46", "30", + "MKK", "5G", "40M", "HT", "2T", "46", "30", + "FCC", "5G", "40M", "HT", "2T", "54", "30", + "ETSI", "5G", "40M", "HT", "2T", "54", "30", + "MKK", "5G", "40M", "HT", "2T", "54", "30", + "FCC", "5G", "40M", "HT", "2T", "62", "30", + "ETSI", "5G", "40M", "HT", "2T", "62", "30", + "MKK", "5G", "40M", "HT", "2T", "62", "30", + "FCC", "5G", "40M", "HT", "2T", "102", "26", + "ETSI", "5G", "40M", "HT", "2T", "102", "30", + "MKK", "5G", "40M", "HT", "2T", "102", "30", + "FCC", "5G", "40M", "HT", "2T", "110", "30", + "ETSI", "5G", "40M", "HT", "2T", "110", "30", + "MKK", "5G", "40M", "HT", "2T", "110", "30", + "FCC", "5G", "40M", "HT", "2T", "118", "34", + "ETSI", "5G", "40M", "HT", "2T", "118", "30", + "MKK", "5G", "40M", "HT", "2T", "118", "30", + "FCC", "5G", "40M", "HT", "2T", "126", "32", + "ETSI", "5G", "40M", "HT", "2T", "126", "30", + "MKK", "5G", "40M", "HT", "2T", "126", "30", + "FCC", "5G", "40M", "HT", "2T", "134", "30", + "ETSI", "5G", "40M", "HT", "2T", "134", "30", + "MKK", "5G", "40M", "HT", "2T", "134", "30", + "FCC", "5G", "40M", "HT", "2T", "151", "34", + "ETSI", "5G", "40M", "HT", "2T", "151", "30", + "MKK", "5G", "40M", "HT", "2T", "151", "63", + "FCC", "5G", "40M", "HT", "2T", "159", "34", + "ETSI", "5G", "40M", "HT", "2T", "159", "30", + "MKK", "5G", "40M", "HT", "2T", "159", "63", + "FCC", "5G", "80M", "VHT", "1T", "42", "22", + "ETSI", "5G", "80M", "VHT", "1T", "42", "30", + "MKK", "5G", "80M", "VHT", "1T", "42", "30", + "FCC", "5G", "80M", "VHT", "1T", "58", "20", + "ETSI", "5G", "80M", "VHT", "1T", "58", "30", + "MKK", "5G", "80M", "VHT", "1T", "58", "30", + "FCC", "5G", "80M", "VHT", "1T", "106", "20", + "ETSI", "5G", "80M", "VHT", "1T", "106", "30", + "MKK", "5G", "80M", "VHT", "1T", "106", "30", + "FCC", "5G", "80M", "VHT", "1T", "122", "20", + "ETSI", "5G", "80M", "VHT", "1T", "122", "30", + "MKK", "5G", "80M", "VHT", "1T", "122", "30", + "FCC", "5G", "80M", "VHT", "1T", "155", "28", + "ETSI", "5G", "80M", "VHT", "1T", "155", "30", + "MKK", "5G", "80M", "VHT", "1T", "155", "63", + "FCC", "5G", "80M", "VHT", "2T", "42", "28", + "ETSI", "5G", "80M", "VHT", "2T", "42", "30", + "MKK", "5G", "80M", "VHT", "2T", "42", "30", + "FCC", "5G", "80M", "VHT", "2T", "58", "26", + "ETSI", "5G", "80M", "VHT", "2T", "58", "30", + "MKK", "5G", "80M", "VHT", "2T", "58", "30", + "FCC", "5G", "80M", "VHT", "2T", "106", "28", + "ETSI", "5G", "80M", "VHT", "2T", "106", "30", + "MKK", "5G", "80M", "VHT", "2T", "106", "30", + "FCC", "5G", "80M", "VHT", "2T", "122", "32", + "ETSI", "5G", "80M", "VHT", "2T", "122", "30", + "MKK", "5G", "80M", "VHT", "2T", "122", "30", + "FCC", "5G", "80M", "VHT", "2T", "155", "34", + "ETSI", "5G", "80M", "VHT", "2T", "155", "30", + "MKK", "5G", "80M", "VHT", "2T", "155", "63" +}; + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_8mm( + struct dm_struct *dm +) +{ + u32 i = 0; + u32 array_len = sizeof(array_mp_8821a_txpwr_lmt_8821a_sar_8mm) / sizeof(u8 *); + u8 **array = (u8 **)array_mp_8821a_txpwr_lmt_8821a_sar_8mm; + +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + void *adapter = dm->adapter; + HAL_DATA_TYPE *hal_data = GET_HAL_DATA(((PADAPTER)adapter)); + + PlatformZeroMemory(hal_data->BufOfLinesPwrLmt, MAX_LINES_HWCONFIG_TXT * MAX_BYTES_LINE_HWCONFIG_TXT); + hal_data->nLinesReadPwrLmt = array_len / 7; +#endif + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_8mm\n"); + + for (i = 0; i < array_len; i += 7) { + u8 *regulation = array[i]; + u8 *band = array[i + 1]; + u8 *bandwidth = array[i + 2]; + u8 *rate = array[i + 3]; + u8 *rf_path = array[i + 4]; + u8 *chnl = array[i + 5]; + u8 *val = array[i + 6]; + + odm_config_bb_txpwr_lmt_8821a(dm, regulation, band, bandwidth, rate, rf_path, chnl, val); +#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) + rsprintf((char *)hal_data->BufOfLinesPwrLmt[i / 7], 100, "\"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\", \"%s\",", + regulation, band, bandwidth, rate, rf_path, chnl, val); +#endif + } + +} + +#endif /* end of HWIMG_SUPPORT*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h new file mode 100644 index 00000000000000..e630f7cb5f043d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/halhwimg8821a_rf.h @@ -0,0 +1,143 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/*Image2HeaderVersion: 2.18*/ +#if (RTL8821A_SUPPORT == 1) +#ifndef __INC_MP_RF_HW_IMG_8821A_H +#define __INC_MP_RF_HW_IMG_8821A_H + + +/****************************************************************************** +* RadioA.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_radioa(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_radioa(void); + +/****************************************************************************** +* TxPowerTrack_AP.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpowertrack_ap(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpowertrack_ap(void); + +/****************************************************************************** +* TxPowerTrack_PCIE.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpowertrack_pcie(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpowertrack_pcie(void); + +/****************************************************************************** +* TxPowerTrack_SDIO.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpowertrack_sdio(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpowertrack_sdio(void); + +/****************************************************************************** +* TxPowerTrack_USB.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpowertrack_usb(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpowertrack_usb(void); + +/****************************************************************************** +* TXPWR_LMT_8811AU_FEM.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8811a_u_fem(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpwr_lmt_8811a_u_fem(void); + +/****************************************************************************** +* TXPWR_LMT_8811AU_IPA.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8811a_u_ipa(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpwr_lmt_8811a_u_ipa(void); + +/****************************************************************************** +* TXPWR_LMT_8821A.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpwr_lmt_8821a(void); + +/****************************************************************************** +* TXPWR_LMT_8821A_E202SA.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_e202sa(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpwr_lmt_8821a_e202sa(void); + +/****************************************************************************** +* TXPWR_LMT_8821A_SAR_13dBm.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_13_dbm(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpwr_lmt_8821a_sar_13_dbm(void); + +/****************************************************************************** +* TXPWR_LMT_8821A_SAR_5mm.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_5mm(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpwr_lmt_8821a_sar_5mm(void); + +/****************************************************************************** +* TXPWR_LMT_8821A_SAR_8mm.TXT +******************************************************************************/ + +void +odm_read_and_config_mp_8821a_txpwr_lmt_8821a_sar_8mm(/* TC: Test Chip, MP: MP Chip*/ + struct dm_struct *dm +); +u32 odm_get_version_mp_8821a_txpwr_lmt_8821a_sar_8mm(void); + +#endif +#endif /* end of HWIMG_SUPPORT*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c new file mode 100644 index 00000000000000..aa96ac7fc5a922 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.c @@ -0,0 +1,206 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +#include "mp_precomp.h" +#include "../phydm_precomp.h" + +#if (RTL8821A_SUPPORT == 1) + +void +odm_config_rf_reg_8821a( + struct dm_struct *dm, + u32 addr, + u32 data, + enum rf_path RF_PATH, + u32 reg_addr +) +{ + if (addr == 0xfe || addr == 0xffe) { +#ifdef CONFIG_LONG_DELAY_ISSUE + ODM_sleep_ms(50); +#else + ODM_delay_ms(50); +#endif + } else if (addr == 0xfd) + ODM_delay_ms(5); + else if (addr == 0xfc) + ODM_delay_ms(1); + else if (addr == 0xfb) + ODM_delay_us(50); + else if (addr == 0xfa) + ODM_delay_us(5); + else if (addr == 0xf9) + ODM_delay_us(1); + else { + odm_set_rf_reg(dm, RF_PATH, reg_addr, RFREGOFFSETMASK, data); + /* Add 1us delay between BB/RF register setting. */ + ODM_delay_us(1); + } +} + + +void +odm_config_rf_radio_a_8821a( + struct dm_struct *dm, + u32 addr, + u32 data +) +{ + u32 content = 0x1000; /* RF_Content: radioa_txt */ + u32 maskfor_phy_set = (u32)(content & 0xE000); + + odm_config_rf_reg_8821a(dm, addr, data, RF_PATH_A, addr | maskfor_phy_set); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_rf_with_header_file: [RadioA] %08X %08X\n", addr, data); +} + +/* 8821 no RF B */ +#if 0 +void +odm_config_rf_radio_b_8821a( + struct dm_struct *dm, + u32 addr, + u32 data +) +{ + u32 content = 0x1001; /* RF_Content: radiob_txt */ + u32 maskfor_phy_set = (u32)(content & 0xE000); + + odm_config_rf_reg_8812a(dm, addr, data, RF_PATH_B, addr | maskfor_phy_set); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_rf_with_header_file: [RadioB] %08X %08X\n", addr, data); + +} +#endif + +void +odm_config_mac_8821a( + struct dm_struct *dm, + u32 addr, + u8 data +) +{ + odm_write_1byte(dm, addr, data); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_mac_with_header_file: [MAC_REG] %08X %08X\n", addr, data); +} + +void +odm_config_bb_agc_8821a( + struct dm_struct *dm, + u32 addr, + u32 bitmask, + u32 data +) +{ + odm_set_bb_reg(dm, addr, bitmask, data); + /* Add 1us delay between BB/RF register setting. */ + ODM_delay_us(1); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_bb_with_header_file: [AGC_TAB] %08X %08X\n", addr, data); +} + +void +odm_config_bb_phy_reg_pg_8821a( + struct dm_struct *dm, + u32 band, + u32 rf_path, + u32 tx_num, + u32 addr, + u32 bitmask, + u32 data +) +{ + if (addr == 0xfe) +#ifdef CONFIG_LONG_DELAY_ISSUE + ODM_sleep_ms(50); +#else + ODM_delay_ms(50); +#endif + else if (addr == 0xfd) + ODM_delay_ms(5); + else if (addr == 0xfc) + ODM_delay_ms(1); + else if (addr == 0xfb) + ODM_delay_us(50); + else if (addr == 0xfa) + ODM_delay_us(5); + else if (addr == 0xf9) + ODM_delay_us(1); + + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X %08X\n", addr, bitmask, data); + +#if (DM_ODM_SUPPORT_TYPE & ODM_CE) + phy_store_tx_power_by_rate(dm->adapter, band, rf_path, tx_num, addr, bitmask, data); +#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) + PHY_StoreTxPowerByRate((PADAPTER)dm->adapter, band, rf_path, tx_num, addr, bitmask, data); +#endif + +} + +void +odm_config_bb_phy_8821a( + struct dm_struct *dm, + u32 addr, + u32 bitmask, + u32 data +) +{ + if (addr == 0xfe) +#ifdef CONFIG_LONG_DELAY_ISSUE + ODM_sleep_ms(50); +#else + ODM_delay_ms(50); +#endif + else if (addr == 0xfd) + ODM_delay_ms(5); + else if (addr == 0xfc) + ODM_delay_ms(1); + else if (addr == 0xfb) + ODM_delay_us(50); + else if (addr == 0xfa) + ODM_delay_us(5); + else if (addr == 0xf9) + ODM_delay_us(1); + else if (addr == 0xa24) + dm->rf_calibrate_info.rega24 = data; + odm_set_bb_reg(dm, addr, bitmask, data); + + /* Add 1us delay between BB/RF register setting. */ + ODM_delay_us(1); + PHYDM_DBG(dm, ODM_COMP_INIT, "===> odm_config_bb_with_header_file: [PHY_REG] %08X %08X\n", addr, data); +} + +void +odm_config_bb_txpwr_lmt_8821a( + struct dm_struct *dm, + u8 *regulation, + u8 *band, + u8 *bandwidth, + u8 *rate_section, + u8 *rf_path, + u8 *channel, + u8 *power_limit +) +{ +#if (DM_ODM_SUPPORT_TYPE & ODM_CE) + phy_set_tx_power_limit(dm, regulation, band, + bandwidth, rate_section, rf_path, channel, power_limit); +#elif (DM_ODM_SUPPORT_TYPE & ODM_WIN) + PHY_SetTxPowerLimit(dm, regulation, band, + bandwidth, rate_section, rf_path, channel, power_limit); +#endif +} + +#endif /* #if (RTL8821A_SUPPORT == 1)*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h new file mode 100644 index 00000000000000..cf5eeeb198134c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_regconfig8821a.h @@ -0,0 +1,90 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#ifndef __INC_ODM_REGCONFIG_H_8821A +#define __INC_ODM_REGCONFIG_H_8821A + +#if (RTL8821A_SUPPORT == 1) + +void +odm_config_rf_reg_8821a( + struct dm_struct *dm, + u32 addr, + u32 data, + enum rf_path RF_PATH, + u32 reg_addr +); + +void +odm_config_rf_radio_a_8821a( + struct dm_struct *dm, + u32 addr, + u32 data +); + +void +odm_config_rf_radio_b_8821a( + struct dm_struct *dm, + u32 addr, + u32 data +); + +void +odm_config_mac_8821a( + struct dm_struct *dm, + u32 addr, + u8 data +); + +void +odm_config_bb_agc_8821a( + struct dm_struct *dm, + u32 addr, + u32 bitmask, + u32 data +); + +void +odm_config_bb_phy_reg_pg_8821a( + struct dm_struct *dm, + u32 band, + u32 rf_path, + u32 tx_num, + u32 addr, + u32 bitmask, + u32 data +); + +void +odm_config_bb_phy_8821a( + struct dm_struct *dm, + u32 addr, + u32 bitmask, + u32 data +); + +void +odm_config_bb_txpwr_lmt_8821a( + struct dm_struct *dm, + u8 *regulation, + u8 *band, + u8 *bandwidth, + u8 *rate_section, + u8 *rf_path, + u8 *channel, + u8 *power_limit +); + +#endif +#endif /* end of SUPPORT */ diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c new file mode 100644 index 00000000000000..5de0754daddaf6 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.c @@ -0,0 +1,129 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ + +/* ************************************************************ + * include files + * ************************************************************ */ + +#include "mp_precomp.h" + +#include "../phydm_precomp.h" + +#if (RTL8821A_SUPPORT == 1) +s8 phydm_cck_rssi_8821a(struct dm_struct *dm, u16 lna_idx, u8 vga_idx) +{ + s8 rx_pwr_all = 0; + + switch (lna_idx) { + case 7: + if (vga_idx <= 27) + rx_pwr_all = -94 + 2 * (27 - vga_idx); + else + rx_pwr_all = -94; + break; + case 6: + rx_pwr_all = -42 + 2 * (2 - vga_idx); + break; + case 5: + rx_pwr_all = -36 + 2 * (7 - vga_idx); + break; + case 4: + rx_pwr_all = -30 + 2 * (7 - vga_idx); + break; + case 3: + rx_pwr_all = -18 + 2 * (7 - vga_idx); + break; + case 2: + rx_pwr_all = 2 * (5 - vga_idx); + break; + case 1: + rx_pwr_all = 14 - 2 * vga_idx; + break; + case 0: + rx_pwr_all = 20 - 2 * vga_idx; + break; + default: + break; + } + + return rx_pwr_all; +} + +void +phydm_set_ext_band_switch_8821A( + void *dm_void, + u32 band +) +{ + struct dm_struct *dm = (struct dm_struct *)dm_void; + + /*Output Pin Settings*/ + odm_set_mac_reg(dm, 0x4C, BIT(23), 0); /*select DPDT_P and DPDT_N as output pin*/ + odm_set_mac_reg(dm, 0x4C, BIT(24), 1); /*by WLAN control*/ + + odm_set_bb_reg(dm, 0xCB4, 0xF, 7); /*DPDT_P = 1b'0*/ + odm_set_bb_reg(dm, 0xCB4, 0xF0, 7); /*DPDT_N = 1b'0*/ + + if (band == ODM_BAND_2_4G) { + odm_set_bb_reg(dm, 0xCB4, (BIT(29) | BIT(28)), 1); + PHYDM_DBG(dm, DBG_ANT_DIV, "***8821A set band switch = 2b'01\n"); + } else { + odm_set_bb_reg(dm, 0xCB4, BIT(29) | BIT(28), 2); + PHYDM_DBG(dm, DBG_ANT_DIV, "***8821A set band switch = 2b'10\n"); + } +} + + +void +odm_dynamic_try_state_agg_8821a( + struct dm_struct *dm +) +{ + if ((dm->support_ic_type & ODM_RTL8821) && (dm->support_interface == ODM_ITRF_USB)) { + if (dm->rssi_min > 25) + odm_write_1byte(dm, 0x4CF, 0x02); + else if (dm->rssi_min < 20) + odm_write_1byte(dm, 0x4CF, 0x00); + } +} + +void +odm_dynamic_packet_detection_th_8821a( + struct dm_struct *dm +) +{ + if (dm->support_ic_type & ODM_RTL8821) { + if (dm->rssi_min <= 25) { + /*odm_set_bb_reg(dm, REG_PWED_TH_JAGUAR, MASKDWORD, 0x2aaaf1a8);*/ + odm_set_bb_reg(dm, REG_PWED_TH_JAGUAR, 0x1ff0, 0x11a); + odm_set_bb_reg(dm, REG_BW_INDICATION_JAGUAR, BIT(26), 1); + } else if (dm->rssi_min >= 30) { + /*odm_set_bb_reg(dm, REG_PWED_TH_JAGUAR, MASKDWORD, 0x2aaaeec8);*/ + odm_set_bb_reg(dm, REG_PWED_TH_JAGUAR, 0x1ff0, 0xec); + odm_set_bb_reg(dm, REG_BW_INDICATION_JAGUAR, BIT(26), 0); + } + } +} + +void +odm_hw_setting_8821a( + struct dm_struct *dm +) +{ + odm_dynamic_try_state_agg_8821a(dm); + odm_dynamic_packet_detection_th_8821a(dm); +} + +#endif /* #if (RTL8821A_SUPPORT == 1) */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_rf.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h similarity index 72% rename from drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_rf.h rename to drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h index bf4f5911751efb..2886fdc5651b50 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_rf.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/phydm_rtl8821a.h @@ -12,14 +12,20 @@ * more details. * *****************************************************************************/ -#ifndef __RTL8188F_RF_H__ -#define __RTL8188F_RF_H__ +#ifndef __ODM_RTL8821A_H__ +#define __ODM_RTL8821A_H__ -int PHY_RF6052_Config8188F(IN PADAPTER Adapter); +s8 phydm_cck_rssi_8821a(struct dm_struct *dm, u16 lna_idx, u8 vga_idx); -VOID -PHY_RF6052SetBandwidth8188F( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); +void +phydm_set_ext_band_switch_8821A( + void *dm_void, + u32 band +); + +void +odm_hw_setting_8821a( + struct dm_struct *dm +); #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_dm.h b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h similarity index 66% rename from drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_dm.h rename to drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h index b1e4fe608b2ac5..63b4ec971c533e 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_dm.h +++ b/drivers/net/wireless/realtek/rtl8812au/hal/phydm/rtl8821a/version_rtl8821a.h @@ -12,12 +12,13 @@ * more details. * *****************************************************************************/ -#ifndef __RTL8812C_DM_H__ -#define __RTL8812C_DM_H__ - -void rtl8821c_phy_init_dm_priv(PADAPTER); -void rtl8821c_phy_deinit_dm_priv(PADAPTER); -void rtl8821c_phy_init_haldm(PADAPTER); -void rtl8821c_phy_haldm_watchdog(PADAPTER); - -#endif +/*RTL8821A PHY Parameters*/ +/* +[Caution] + Since 01/Aug/2015, the commit rules will be simplified. + You do not need to fill up the version.h anymore, + only the maintenance supervisor fills it before formal release. +*/ +#define RELEASE_DATE_8821A 20150920 +#define COMMIT_BY_8821A "BB_LUKE" +#define RELEASE_VERSION_8821A 59 diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_dm.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_dm.c index ba5b6b7473cbac..56c7cc750c269f 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_dm.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_dm.c @@ -31,7 +31,6 @@ * Global var * ************************************************************ */ - static VOID dm_CheckProtection( IN PADAPTER Adapter @@ -141,7 +140,6 @@ dm_InterruptMigration( BOOLEAN IntMtToSet = _FALSE; BOOLEAN ACIntToSet = _FALSE; - /* Retrieve current interrupt migration and Tx four ACs IMR settings first. */ bCurrentIntMt = pHalData->bInterruptMigration; bCurrentACIntDisable = pHalData->bDisableTxInt; @@ -262,7 +260,6 @@ rtl8812_InitHalDm( /* Adapter->fix_rate = 0xFF; */ } - VOID rtl8812_HalDmWatchDog( IN PADAPTER Adapter @@ -350,6 +347,8 @@ void rtl8812_init_dm_priv(IN PADAPTER Adapter) Init_ODM_ComInfo_8812(Adapter); odm_init_all_timers(podmpriv); + + pHalData->CurrentTxPwrIdx = 20; } void rtl8812_deinit_dm_priv(IN PADAPTER Adapter) diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c index 6ef4800296d78a..4a21818b70aaad 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_hal_init.c @@ -18,7 +18,8 @@ #include #ifdef CONFIG_RTL8812A #include "hal8812a_fw.h" -#else +#endif +#ifdef CONFIG_RTL8821A #include "hal8821a_fw.h" #endif /* ------------------------------------------------------------------------- @@ -517,11 +518,16 @@ FirmwareDownload8812( #ifdef CONFIG_WOWLAN if (pwrpriv->wowlan_mode) { #ifdef CONFIG_RTL8812A + if (IS_HARDWARE_TYPE_8812(Adapter)) { pFirmware->szFwBuffer = array_mp_8812a_fw_wowlan; pFirmware->ulFwLength = array_length_mp_8812a_fw_wowlan; -#else + } +#endif +#ifdef CONFIG_RTL8821A + if (IS_HARDWARE_TYPE_8821(Adapter)) { pFirmware->szFwBuffer = array_mp_8821a_fw_wowlan; pFirmware->ulFwLength = array_length_mp_8821a_fw_wowlan; + } #endif RTW_INFO("%s fw:%s, size: %d\n", __func__, "WoWLAN", pFirmware->ulFwLength); @@ -531,11 +537,16 @@ FirmwareDownload8812( #ifdef CONFIG_AP_WOWLAN if (pwrpriv->wowlan_ap_mode) { #ifdef CONFIG_RTL8812A + if (IS_HARDWARE_TYPE_8812(Adapter)) { pFirmware->szFwBuffer = array_mp_8812a_fw_ap; pFirmware->ulFwLength = array_length_mp_8812a_fw_ap; -#else + } +#endif +#ifdef CONFIG_RTL8821A + if (IS_HARDWARE_TYPE_8821(Adapter)) { pFirmware->szFwBuffer = array_mp_8821a_fw_ap; pFirmware->ulFwLength = array_length_mp_8821a_fw_ap; + } #endif RTW_INFO("%s fw: %s, size: %d\n", __func__, "AP_WoWLAN", pFirmware->ulFwLength); @@ -546,11 +557,16 @@ FirmwareDownload8812( if (pHalData->EEPROMBluetoothCoexist == _TRUE) { #ifdef CONFIG_RTL8812A + if (IS_HARDWARE_TYPE_8812(pAdapter)) { pFirmware->szFwBuffer = array_mp_8812a_fw_nic_bt; pFirmware->ulFwLength = array_length_mp_8812a_fw_nic_bt; -#else + } +#endif +#ifdef CONFIG_RTL8821A + if (IS_HARDWARE_TYPE_8821(pAdapter)) { pFirmware->szFwBuffer = array_mp_8821a_fw_nic_bt; pFirmware->ulFwLength = array_length_mp_8821a_fw_nic_bt; + } #endif RTW_INFO("%s fw:%s, size: %d\n", __FUNCTION__, "NIC-BTCOEX", pFirmware->ulFwLength); @@ -559,11 +575,16 @@ FirmwareDownload8812( { #ifdef CONFIG_RTL8812A + if (IS_HARDWARE_TYPE_8812(Adapter)) { pFirmware->szFwBuffer = array_mp_8812a_fw_nic; pFirmware->ulFwLength = array_length_mp_8812a_fw_nic; -#else + } +#endif +#ifdef CONFIG_RTL8821A + if (IS_HARDWARE_TYPE_8821(Adapter)) { pFirmware->szFwBuffer = array_mp_8821a_fw_nic; pFirmware->ulFwLength = array_length_mp_8821a_fw_nic; + } #endif RTW_INFO("%s fw:%s, size: %d\n", __FUNCTION__, "NIC", pFirmware->ulFwLength); @@ -754,7 +775,6 @@ int ReservedPage_Compare(PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware, u32 BTPatc for (i = 0; i < lastBTsz; i++) myBTFwBuffer[(BTPatchSize / 8) * 8 + i] = rtw_read8(Adapter, (0x144 + i)); - for (i = 0; i < BTPatchSize; i++) { if (myBTFwBuffer[i] != pFirmware->szFwBuffer[i]) { RTW_INFO(" In direct myBTFwBuffer[%d]=%x , pFirmware->szFwBuffer=%x\n", i, myBTFwBuffer[i], pFirmware->szFwBuffer[i]); @@ -1343,7 +1363,7 @@ void Hal_EfuseParseKFreeData_8821A( HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); struct kfree_data_t *kfree_data = &pHalData->kfree_data; - u8 pg_pwrtrim = 0xFF, pg_pwrtrim_5g_a = 0xFF, pg_pwrtrim_5g_lb1 = 0xFF, + u8 pg_pwrtrim = 0xFF, pg_pwrtrim_5g_a = 0xFF, pg_pwrtrim_5g_lb1 = 0xFF, pg_pwrtrim_5g_lb2 = 0xFF, pg_pwrtrim_5g_mb1 = 0xFF, pg_pwrtrim_5g_mb2 = 0xFF, pg_pwrtrim_5g_hb = 0xFF, pg_therm = 0xFF; if ((Adapter->registrypriv.RegPwrTrimEnable == 1) || !AutoloadFail) { @@ -5327,7 +5347,7 @@ void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval) *pval = (BIT(0) & val8) ? _TRUE : _FALSE; } break; - + case HW_VAR_AC_PARAM_VO: val32 = rtw_read32(padapter, REG_EDCA_VO_PARAM); pval[0] = val32 & 0xFF; @@ -5367,7 +5387,7 @@ void GetHwReg8812A(PADAPTER padapter, u8 variable, u8 *pval) #ifdef HAL_EFUSE_MEMORY *pval = pHalData->EfuseHal.BTEfuseUsedPercentage; #endif - break; + break; case HW_VAR_EFUSE_BT_BYTES: #ifdef HAL_EFUSE_MEMORY *((u16 *)pval) = pHalData->EfuseHal.BTEfuseUsedBytes; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c index 19c69ad1208113..4fb1b8cef7e1d2 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/rtl8812a_phycfg.c @@ -14,17 +14,34 @@ *****************************************************************************/ #define _RTL8812A_PHYCFG_C_ -/* #include */ - #include -/*---------------------Define local function prototype-----------------------*/ - -/*----------------------------Function Body----------------------------------*/ - -/* - * 1. BB register R/W API - * */ +/* Manual Transmit Power Control + The following options take values from 0 to 63, where: + 0 - disable + 1 - lowest transmit power the device can do + 2 - highest transmit power the device can do + Note that these options may override your country's regulations about transmit power. + Setting the device to work at higher transmit powers most of the time may cause premature + failure or damage by overheating. Make sure the device has enough airflow before you increase this. + It is currently unknown what these values translate to in dBm. +*/ + +// Transmit Power Boost +// This value is added to the device's calculation of transmit power index. +// Useful if you want to keep power usage low while still boosting/decreasing transmit power. +// Can take a negative value as well to reduce power. +// Zero disables it. Default: 2, for a tiny boost. +int transmit_power_boost = 2; +// (ADVANCED) To know what transmit powers this device decides to use dynamically, see: +// https://github.com/lwfinger/rtl8192ee/blob/42ad92dcc71cb15a62f8c39e50debe3a28566b5f/hal/phydm/rtl8192e/halhwimg8192e_rf.c#L1310 + +// Transmit Power Override +// This value completely overrides the driver's calculations and uses only one value for all transmissions. +// Zero disables it. Default: 0 +int transmit_power_override = 0; + +/* Manual Transmit Power Control */ u32 PHY_QueryBBReg8812( @@ -473,6 +490,8 @@ PHY_GetTxPowerLevel8812( OUT s32 *powerlevel ) { + /*HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + *powerlevel = pHalData->CurrentTxPwrIdx;*/ #if 0 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); @@ -571,7 +590,12 @@ PHY_GetTxPowerIndex_8812A( } by_rate_diff = by_rate_diff > limit ? limit : by_rate_diff; - power_idx = base_idx + by_rate_diff + tpt_offset + extra_bias; + power_idx = base_idx + by_rate_diff + tpt_offset + extra_bias + transmit_power_boost; + + if (transmit_power_override != 0) + power_idx = transmit_power_override; + if (power_idx < 1) + power_idx = 1; if (power_idx < 0) power_idx = 0; @@ -1181,7 +1205,7 @@ phy_SetRFEReg8812( u1tmp = rtw_read8(Adapter, rA_RFE_Inv_Jaguar + 3); rtw_write8(Adapter, rA_RFE_Inv_Jaguar + 3, (u1tmp |= BIT0)); phy_set_bb_reg(Adapter, rB_RFE_Inv_Jaguar, bMask_RFEInv_Jaguar, 0x010); - break; + break; case 6: phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x07737717); phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x07737717); @@ -1463,6 +1487,7 @@ phy_SwBand8812( return ret_value; } +#pragma clang optimize off u8 phy_GetSecondaryChnl_8812( IN PADAPTER Adapter @@ -1504,6 +1529,7 @@ phy_GetSecondaryChnl_8812( /*RTW_INFO("SCMapping: SC Value %x\n", ((SCSettingOf40 << 4) | SCSettingOf20));*/ return (SCSettingOf40 << 4) | SCSettingOf20; } +#pragma clang optimize on VOID phy_SetRegBW_8812( diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c index c62a13bc489882..8da4f79ceb6935 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/rtl8812au_xmit.c @@ -60,6 +60,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz , u8 ba #endif/*CONFIG_80211N_HT*/ u8 vht_max_ampdu_size = 0; struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + struct registry_priv *pregpriv = &(padapter->registrypriv); #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX if (padapter->registrypriv.mp_mode == 0) { @@ -115,10 +116,16 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz , u8 ba /* offset 12 */ - if (!pattrib->qos_en) { + if (pattrib->injected == _TRUE && !pregpriv->monitor_overwrite_seqnum) { + /* Prevent sequence number from being overwritten */ + SET_TX_DESC_HWSEQ_EN_8812(ptxdesc, 0); /* Hw do not set sequence number */ + SET_TX_DESC_SEQ_8812(ptxdesc, pattrib->seqnum); /* Copy inject sequence number to TxDesc */ + } + else if (!pattrib->qos_en) { SET_TX_DESC_HWSEQ_EN_8812(ptxdesc, 1); /* Hw set sequence number */ - } else + } else { SET_TX_DESC_SEQ_8812(ptxdesc, pattrib->seqnum); + } if ((pxmitframe->frame_tag & 0x0f) == DATA_FRAMETAG) { /* RTW_INFO("pxmitframe->frame_tag == DATA_FRAMETAG\n"); */ @@ -304,7 +311,7 @@ static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz , u8 ba if (pattrib->retry_ctrl == _TRUE) SET_TX_DESC_DATA_RETRY_LIMIT_8812(ptxdesc, 6); else - SET_TX_DESC_DATA_RETRY_LIMIT_8812(ptxdesc, 12); + SET_TX_DESC_DATA_RETRY_LIMIT_8812(ptxdesc, 0); } #ifdef CONFIG_XMIT_ACK @@ -430,7 +437,7 @@ u32 upload_txpktbuf_8812au(_adapter *adapter, u8 *buf, u32 buflen) } rtw_write32(adapter, REG_PKTBUF_DBG_CTRL, 0xff800000+(beacon_head<<6) + qw_addr); loop_cnt = 0; - while ((rtw_read32(adapter, REG_PKTBUF_DBG_CTRL) & BIT23) != 0) { + while ((rtw_read32(adapter, REG_PKTBUF_DBG_CTRL) & BIT23) == false) { rtw_udelay_os(10); if (loop_cnt++ == 100) return _FALSE; diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/usb_halinit.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/usb_halinit.c index c0c78804d9e303..37d6cec0a98b57 100644 --- a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/usb_halinit.c +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8812a/usb/usb_halinit.c @@ -1055,7 +1055,7 @@ usb_AggSettingRxUpdate_8812A( /* Adjust DMA page and thresh. */ temp = pHalData->rxagg_dma_size | (pHalData->rxagg_dma_timeout << 8); rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH, temp); - rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 3, BIT(7)); /* for dma agg , 0x280[31]�GBIT_RXDMA_AGG_OLD_MOD, set 1 */ + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH + 3, BIT(7)); /* for dma agg , 0x280[31]GBIT_RXDMA_AGG_OLD_MOD, set 1 */ } break; case RX_AGG_USB: diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c new file mode 100644 index 00000000000000..c11a36e96f777d --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/Hal8814PwrSeq.c @@ -0,0 +1,98 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ + +#include "Hal8814PwrSeq.h" +#include + +/* + drivers should parse below arrays and do the corresponding actions +*/ +//3 Power on Array +WLAN_PWR_CFG rtl8814A_power_on_flow[RTL8814A_TRANS_CARDEMU_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + RTL8814A_TRANS_CARDEMU_TO_ACT + RTL8814A_TRANS_END +}; + +//3Radio off GPIO Array +WLAN_PWR_CFG rtl8814A_radio_off_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + RTL8814A_TRANS_ACT_TO_CARDEMU + RTL8814A_TRANS_END +}; + +//3Card Disable Array +WLAN_PWR_CFG rtl8814A_card_disable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + RTL8814A_TRANS_ACT_TO_CARDEMU + RTL8814A_TRANS_CARDEMU_TO_CARDDIS + RTL8814A_TRANS_END +}; + +//3 Card Enable Array +WLAN_PWR_CFG rtl8814A_card_enable_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + RTL8814A_TRANS_CARDDIS_TO_CARDEMU + RTL8814A_TRANS_CARDEMU_TO_ACT + RTL8814A_TRANS_END +}; + +//3Suspend Array +WLAN_PWR_CFG rtl8814A_suspend_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + RTL8814A_TRANS_ACT_TO_CARDEMU + RTL8814A_TRANS_CARDEMU_TO_SUS + RTL8814A_TRANS_END +}; + +//3 Resume Array +WLAN_PWR_CFG rtl8814A_resume_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_SUS_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + RTL8814A_TRANS_SUS_TO_CARDEMU + RTL8814A_TRANS_CARDEMU_TO_ACT + RTL8814A_TRANS_END +}; + + + +//3HWPDN Array +WLAN_PWR_CFG rtl8814A_hwpdn_flow[RTL8814A_TRANS_ACT_TO_CARDEMU_STEPS+RTL8814A_TRANS_CARDEMU_TO_PDN_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + RTL8814A_TRANS_ACT_TO_CARDEMU + RTL8814A_TRANS_CARDEMU_TO_PDN + RTL8814A_TRANS_END +}; + +//3 Enter LPS +WLAN_PWR_CFG rtl8814A_enter_lps_flow[RTL8814A_TRANS_ACT_TO_LPS_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + //FW behavior + RTL8814A_TRANS_ACT_TO_LPS + RTL8814A_TRANS_END +}; + +//3 Leave LPS +WLAN_PWR_CFG rtl8814A_leave_lps_flow[RTL8814A_TRANS_LPS_TO_ACT_STEPS+RTL8814A_TRANS_END_STEPS]= +{ + //FW behavior + RTL8814A_TRANS_LPS_TO_ACT + RTL8814A_TRANS_END +}; + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/hal8814a_fw.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/hal8814a_fw.c new file mode 100644 index 00000000000000..fb01dd8c5aa9af --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/hal8814a_fw.c @@ -0,0 +1,7741 @@ +/****************************************************************************** +* +* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of version 2 of the GNU General Public License as +* published by the Free Software Foundation. +* +* This program is distributed in the hope that it will be useful, but WITHOUT +* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +* more details. +* +* You should have received a copy of the GNU General Public License along with +* this program; if not, write to the Free Software Foundation, Inc., +* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA +* +* +******************************************************************************/ + +#include "drv_types.h" + +#if (RTL8814A_SUPPORT == 1) +#if(DM_ODM_SUPPORT_TYPE & (ODM_AP)) + + +u8 array_mp_8814a_fw_ap[] = { +0x14, 0x88, 0x00, 0x00, 0x19, 0x00, 0x00, 0x00, 0x42, 0x27, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x0A, 0x1C, 0x13, 0x30, 0xDF, 0x07, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, +0x00, 0x00, 0x20, 0x80, 0xE8, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x68, 0xC8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x12, 0x80, 0x00, 0x00, 0x00, 0x80, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE9, 0x02, 0x00, 0x80, 0xF9, 0x02, 0x00, 0x80, +0x09, 0x03, 0x00, 0x80, 0x19, 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a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c new file mode 100644 index 00000000000000..6aa1fda1765efd --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_cmd.c @@ -0,0 +1,1515 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814A_CMD_C_ + +//#include +#include + +#define CONFIG_H2C_EF + +#define RTL8814_MAX_H2C_BOX_NUMS 4 +#define RTL8814_MAX_CMD_LEN 7 +#define RTL8814_MESSAGE_BOX_SIZE 4 +#define RTL8814_EX_MESSAGE_BOX_SIZE 4 + + +static u8 _is_fw_read_cmd_down(_adapter *padapter, u8 msgbox_num) +{ + u8 read_down = _FALSE; + int retry_cnts = 100; + + u8 valid; + + /* RTW_INFO(" _is_fw_read_cmd_down ,reg_1cc(%x),msg_box(%d)...\n",rtw_read8(padapter,REG_HMETFR),msgbox_num); */ + + do { + valid = rtw_read8(padapter, REG_HMETFR) & BIT(msgbox_num); + if (0 == valid) + read_down = _TRUE; + else + rtw_msleep_os(1); + } while ((!read_down) && (retry_cnts--)); + + return read_down; + +} + + +/***************************************** +* H2C Msg format : +* 0x1DF - 0x1D0 +*| 31 - 8 | 7-5 4 - 0 | +*| h2c_msg |Class_ID CMD_ID | +* +* Extend 0x1FF - 0x1F0 +*|31 - 0 | +*|ext_msg| +******************************************/ +s32 FillH2CCmd_8814(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer) +{ + u8 h2c_box_num; + u32 msgbox_addr; + u32 msgbox_ex_addr=0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 cmd_idx,ext_cmd_len; + u32 h2c_cmd = 0; + u32 h2c_cmd_ex = 0; + s32 ret = _FAIL; + + + padapter = GET_PRIMARY_ADAPTER(padapter); + pHalData = GET_HAL_DATA(padapter); + + + if (pHalData->bFWReady == _FALSE) { + /* RTW_INFO("fill_h2c_cmd_8812(): return H2C cmd because fw is not ready\n"); */ + return ret; + } + + _enter_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); + + + if (!pCmdBuffer) + goto exit; + if (CmdLen > RTL8814_MAX_CMD_LEN) + goto exit; + if (rtw_is_surprise_removed(padapter)) + goto exit; + + /* pay attention to if race condition happened in H2C cmd setting. */ + do { + h2c_box_num = pHalData->LastHMEBoxNum; + + if (!_is_fw_read_cmd_down(padapter, h2c_box_num)) { + RTW_INFO(" fw read cmd failed...\n"); + goto exit; + } + + *(u8 *)(&h2c_cmd) = ElementID; + + if(CmdLen<=3) + { + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); + } + else{ + _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer,3); + ext_cmd_len = CmdLen-3; + _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer+3,ext_cmd_len ); + + //Write Ext command + msgbox_ex_addr = REG_HMEBOX_EXT0_8814A + (h2c_box_num *RTL8814_EX_MESSAGE_BOX_SIZE); + #ifdef CONFIG_H2C_EF + for(cmd_idx=0;cmd_idxh2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" + //,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); + + pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL8814_MAX_H2C_BOX_NUMS; + + }while(0); + + ret = _SUCCESS; + +exit: + + _exit_critical_mutex(&(adapter_to_dvobj(padapter)->h2c_fwcmd_mutex), NULL); + + return ret; +} + +u8 rtl8814_set_rssi_cmd(_adapter*padapter, u8 *param) +{ + u8 res=_SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); + + FillH2CCmd_8814(padapter, H2C_RSSI_SETTING, 4, param); + + return res; +} + +void rtl8814_fw_update_beacon_cmd(_adapter *padapter) +{ + u8 param[2] = {0}; + u16 txpktbuf_bndy; + + SET_8814A_H2CCMD_BCNHWSEQ_EN(param, 1); + SET_8814A_H2CCMD_BCNHWSEQ_BCN_NUMBER(param, 0); + SET_8814A_H2CCMD_BCNHWSEQ_HWSEQ(param, 1); + SET_8814A_H2CCMD_BCNHWSEQ_EXHWSEQ(param, 0); + SET_8814A_H2CCMD_BCNHWSEQ_PAGE(param, 0); + if (GET_HAL_DATA(padapter)->firmware_version < 23) + /* FW v21, v22 use H2C_BCNHWSEQ = 0xC2 */ + FillH2CCmd_8814(padapter, 0xC2, 2, param); + else + FillH2CCmd_8814(padapter, H2C_BCNHWSEQ, 2, param); + + /*RTW_INFO("%s, %d, correct beacon HW sequence, FirmwareVersion=%d, H2C_BCNHWSEQ=%d\n", __func__, __LINE__, GET_HAL_DATA(padapter)->firmware_version, H2C_BCNHWSEQ);*/ + +} + +static u8 Get_VHT_ENI( + u32 IOTAction, + u32 WirelessMode, + u32 ratr_bitmap + ) +{ + u8 Ret = 0; + + if(WirelessMode == WIRELESS_11_24AC) + { + if(ratr_bitmap & 0xfff00000) // Mix , 2SS + Ret = 3; + else // Mix, 1SS + Ret = 2; + } + else if(WirelessMode == WIRELESS_11_5AC) + { + Ret = 1; // VHT + } + + return (Ret << 4); +} + +BOOLEAN +Get_RA_ShortGI_8814( + PADAPTER Adapter, + struct sta_info *psta, + u8 shortGIrate, + u32 ratr_bitmap +) +{ + BOOLEAN bShortGI; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + bShortGI = shortGIrate; + +#ifdef CONFIG_80211AC_VHT + if( bShortGI && + is_supported_vht(psta->wireless_mode) && + (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP) && + TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX) + ) + { + if(ratr_bitmap & 0xC0000000) + bShortGI = _FALSE; + } +#endif //CONFIG_80211AC_VHT + + return bShortGI; +} + + +void +Set_RA_LDPC_8814( + struct sta_info *psta, + BOOLEAN bLDPC + ) +{ + if(psta == NULL) + return; +#ifdef CONFIG_80211AC_VHT + if(psta->wireless_mode == WIRELESS_11_5AC) + { + if(bLDPC && TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_CAP_TX)) + SET_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX); + else + CLEAR_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_TX); + } + else if(is_supported_ht(psta->wireless_mode) || is_supported_vht(psta->wireless_mode)) + { + if(bLDPC && TEST_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_CAP_TX)) + SET_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_ENABLE_TX); + else + CLEAR_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_ENABLE_TX); + } + + update_ldpc_stbc_cap(psta); +#endif //CONFIG_80211AC_VHT + + //RTW_INFO("MacId %d bLDPC %d\n", psta->mac_id, bLDPC); +} + + +u8 +Get_RA_LDPC_8814( + struct sta_info *psta +) +{ + u8 bLDPC = 0; + + if (psta != NULL) { + if(psta->cmn.mac_id == 1) { + bLDPC = 0; + } else { +#ifdef CONFIG_80211AC_VHT + if(is_supported_vht(psta->wireless_mode)) + { + if(TEST_FLAG(psta->vhtpriv.ldpc_cap, LDPC_VHT_CAP_TX)) + bLDPC = 1; + else + bLDPC = 0; + } + else if(is_supported_ht(psta->wireless_mode)) + { + if(TEST_FLAG(psta->htpriv.ldpc_cap, LDPC_HT_CAP_TX)) + bLDPC =1; + else + bLDPC =0; + } + else +#endif + bLDPC = 0; + } + } + + return (bLDPC << 2); +} + + +void rtl8814_set_FwPwrMode_cmd(PADAPTER padapter, u8 PSMode) +{ + u8 u1H2CSetPwrMode[H2C_PWRMODE_LEN]={0}; + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + u8 Mode = 0, RLBM = 0, PowerState = 0, LPSAwakeIntvl = 2, pwrModeByte5 = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 allQueueUAPSD = 0; + + + RTW_INFO("%s: Mode=%d SmartPS=%d\n", __FUNCTION__, PSMode, pwrpriv->smart_ps); + + switch (PSMode) { + case PS_MODE_ACTIVE: + Mode = 0; + break; + case PS_MODE_MIN: + Mode = 1; + break; + case PS_MODE_MAX: + RLBM = 1; + Mode = 1; + break; + case PS_MODE_DTIM: + RLBM = 2; + Mode = 1; + break; + case PS_MODE_UAPSD_WMM: + Mode = 2; + break; + default: + Mode = 0; + break; + } + + if (Mode > PS_MODE_ACTIVE) + { +#ifdef CONFIG_BT_COEXIST + if ((rtw_btcoex_IsBtControlLps(padapter) == _TRUE) && (_TRUE == pHalData->EEPROMBluetoothCoexist)) + { + PowerState = rtw_btcoex_RpwmVal(padapter); + pwrModeByte5 = rtw_btcoex_LpsVal(padapter); + } + else +#endif // CONFIG_BT_COEXIST + { + PowerState = 0x00;// AllON(0x0C), RFON(0x04), RFOFF(0x00) + pwrModeByte5 = 0x40; + } + +#ifdef CONFIG_EXT_CLK + Mode |= BIT(7);//supporting 26M XTAL CLK_Request feature. +#endif //CONFIG_EXT_CLK + } + else + { + PowerState = 0x0C;// AllON(0x0C), RFON(0x04), RFOFF(0x00) + pwrModeByte5 = 0x40; + } + + // 0: Active, 1: LPS, 2: WMMPS + SET_8814A_H2CCMD_PWRMODE_PARM_MODE(u1H2CSetPwrMode, Mode); + + // 0:Min, 1:Max , 2:User define + SET_8814A_H2CCMD_PWRMODE_PARM_RLBM(u1H2CSetPwrMode, RLBM); + + /* (LPS) smart_ps: 0: PS_Poll, 1: PS_Poll , 2: NullData */ + /* (WMM)smart_ps: 0:PS_Poll, 1:NullData */ + SET_8814A_H2CCMD_PWRMODE_PARM_SMART_PS(u1H2CSetPwrMode, pwrpriv->smart_ps); + + // AwakeInterval: Unit is beacon interval, this field is only valid in PS_DTIM mode + SET_8814A_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1H2CSetPwrMode, LPSAwakeIntvl); + + /* (WMM only)bAllQueueUAPSD */ + SET_8814A_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1H2CSetPwrMode, allQueueUAPSD); + + /* AllON(0x0C), RFON(0x04), RFOFF(0x00) */ + SET_8814A_H2CCMD_PWRMODE_PARM_PWR_STATE(u1H2CSetPwrMode, PowerState); + + //SET_8814A_H2CCMD_PWRMODE_PARM_BYTE5(u1H2CSetPwrMode, pwrModeByte5); + +#ifdef CONFIG_BT_COEXIST + if (_TRUE == pHalData->EEPROMBluetoothCoexist) + rtw_btcoex_RecordPwrMode(padapter, u1H2CSetPwrMode, sizeof(u1H2CSetPwrMode)); +#endif /* CONFIG_BT_COEXIST */ + //RTW_INFO("u1H2CSetPwrMode="MAC_FMT"\n", MAC_ARG(u1H2CSetPwrMode)); + FillH2CCmd_8814(padapter, H2C_SET_PWR_MODE, sizeof(u1H2CSetPwrMode), u1H2CSetPwrMode); + +} + +static void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 rate_len, pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; + + + //RTW_INFO("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + + _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); + /* pmlmeext->mgnt_seq++; */ + set_frame_sub_type(pframe, WIFI_BEACON); + + pframe += sizeof(struct rtw_ieee80211_hdr_3addr); + pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); + + //timestamp will be inserted by hardware + pframe += 8; + pktlen += 8; + + // beacon interval: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + // capability info: 2 bytes + _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); + + pframe += 2; + pktlen += 2; + + if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + { + //RTW_INFO("ie len=%d\n", cur_network->IELength); + pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); + _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); + + goto _ConstructBeacon; + } + + //below for ad-hoc mode + + // SSID + pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); + + // supported rates... + rate_len = rtw_get_rateset_len(cur_network->SupportedRates); + pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); + + // DS parameter set + pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); + + if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) + { + u32 ATIMWindow; + // IBSS Parameter Set... + //ATIMWindow = cur->Configuration.ATIMWindow; + ATIMWindow = 0; + pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); + } + + + //todo: ERP IE + + + // EXTERNDED SUPPORTED RATE + if (rate_len > 8) + { + pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); + } + + + //todo:HT for adhoc + +_ConstructBeacon: + + if ((pktlen + TXDESC_SIZE) > 512) + { + RTW_INFO("beacon frame too large\n"); + return; + } + + *pLength = pktlen; + + //RTW_INFO("%s bcn_sz=%d\n", __FUNCTION__, pktlen); + +} + +static void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + /* RTW_INFO("%s\n", __FUNCTION__); */ + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + /* Frame control. */ + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + SetPwrMgt(fctrl); + set_frame_sub_type(pframe, WIFI_PSPOLL); + + /* AID. */ + set_duration(pframe, (pmlmeinfo->aid | 0xc000)); + + /* BSSID. */ + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + /* TA. */ + _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + + *pLength = 16; +} + +static void ConstructNullFunctionData( + PADAPTER padapter, + u8 *pframe, + u32 *pLength, + u8 *StaAddr, + u8 bQoS, + u8 AC, + u8 bEosp, + u8 bForcePowerSave) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + + //RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); + + pwlanhdr = (struct rtw_ieee80211_hdr*)pframe; + + fctrl = &pwlanhdr->frame_ctl; + *(fctrl) = 0; + if (bForcePowerSave) + { + SetPwrMgt(fctrl); + } + + switch(cur_network->network.InfrastructureMode) + { + case Ndis802_11Infrastructure: + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); + break; + case Ndis802_11APMode: + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + break; + case Ndis802_11IBSS: + default: + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + break; + } + + SetSeqNum(pwlanhdr, 0); + + if (bQoS == _TRUE) { + struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; + + set_frame_sub_type(pframe, WIFI_QOS_DATA_NULL); + + pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos *)pframe; + SetPriority(&pwlanqoshdr->qc, AC); + SetEOSP(&pwlanqoshdr->qc, bEosp); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); + } else { + set_frame_sub_type(pframe, WIFI_DATA_NULL); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + } + + *pLength = pktlen; +} + +void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u8 *mac, *bssid; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); + + + //RTW_INFO("%s\n", __FUNCTION__); + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + mac = adapter_mac_addr(padapter); + bssid = cur_network->MacAddress; + + fctrl = &(pwlanhdr->frame_ctl); + *(fctrl) = 0; + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); + set_frame_sub_type(fctrl, WIFI_PROBERSP); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + pframe += pktlen; + + if(cur_network->IELength>MAX_IE_SZ) + return; + + _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); + pframe += cur_network->IELength; + pktlen += cur_network->IELength; + + *pLength = pktlen; +} + +#ifdef CONFIG_GTK_OL +static void ConstructGTKResponse( + PADAPTER padapter, + u8 *pframe, + u32 *pLength + ) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct wlan_network *cur_network = &pmlmepriv->cur_network; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct security_priv *psecuritypriv = &padapter->securitypriv; + static u8 LLCHeader[8] = {0xAA, 0xAA, 0x03, 0x00, 0x00, 0x00, 0x88, 0x8E}; + static u8 GTKbody_a[11] = {0x01, 0x03, 0x00, 0x5F, 0x02, 0x03, 0x12, 0x00, 0x10, 0x42, 0x0B}; + u8 *pGTKRspPkt = pframe; + u8 EncryptionHeadOverhead = 0; + /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + fctrl = &pwlanhdr->frame_ctl; + *(fctrl) = 0; + + /* ------------------------------------------------------------------------- */ + /* MAC Header. */ + /* ------------------------------------------------------------------------- */ + SetFrameType(fctrl, WIFI_DATA); + /* set_frame_sub_type(fctrl, 0); */ + SetToDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, adapter_mac_addr(padapter), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + + SetSeqNum(pwlanhdr, 0); + set_duration(pwlanhdr, 0); + +#ifdef CONFIG_WAPI_SUPPORT + *pLength = sMacHdrLng; +#else + *pLength = 24; +#endif /* CONFIG_WAPI_SUPPORT */ + + /* YJ,del,120503 */ +#if 0 + /* ------------------------------------------------------------------------- */ + /* Qos Header: leave space for it if necessary. */ + /* ------------------------------------------------------------------------- */ + if (pStaQos->CurrentQosMode > QOS_DISABLE) { + SET_80211_HDR_QOS_EN(pGTKRspPkt, 1); + PlatformZeroMemory(&(Buffer[*pLength]), sQoSCtlLng); + *pLength += sQoSCtlLng; + } +#endif /* 0 */ + /* ------------------------------------------------------------------------- */ + /* Security Header: leave space for it if necessary. */ + /* ------------------------------------------------------------------------- */ + +#if 1 + switch (psecuritypriv->dot11PrivacyAlgrthm) { + case _WEP40_: + case _WEP104_: + EncryptionHeadOverhead = 4; + break; + case _TKIP_: + EncryptionHeadOverhead = 8; + break; + case _AES_: + EncryptionHeadOverhead = 8; + break; +#ifdef CONFIG_WAPI_SUPPORT + case _SMS4_: + EncryptionHeadOverhead = 18; + break; +#endif /* CONFIG_WAPI_SUPPORT */ + default: + EncryptionHeadOverhead = 0; + } + + if (EncryptionHeadOverhead > 0) { + _rtw_memset(&(pframe[*pLength]), 0, EncryptionHeadOverhead); + *pLength += EncryptionHeadOverhead; + /* SET_80211_HDR_WEP(pGTKRspPkt, 1); */ /* Suggested by CCW. */ + /* GTK's privacy bit is done by FW */ + /* SetPrivacy(fctrl); */ + } +#endif /* 1 */ + /* ------------------------------------------------------------------------- */ + /* Frame Body. */ + /* ------------------------------------------------------------------------- */ + pGTKRspPkt = (u8 *)(pframe + *pLength); + /* LLC header */ + _rtw_memcpy(pGTKRspPkt, LLCHeader, 8); + *pLength += 8; + + /* GTK element */ + pGTKRspPkt += 8; + + /* GTK frame body after LLC, part 1 */ + _rtw_memcpy(pGTKRspPkt, GTKbody_a, 11); + *pLength += 11; + pGTKRspPkt += 11; + /* GTK frame body after LLC, part 2 */ + _rtw_memset(&(pframe[*pLength]), 0, 88); + *pLength += 88; + pGTKRspPkt += 88; + +} +#endif /* CONFIG_GTK_OL */ + +/* + * Description: Get the reserved page number in Tx packet buffer. + * Retrun value: the page number. + * 2012.08.09, by tynli. + * */ +u8 +GetTxBufferRsvdPageNum8814(_adapter *Adapter, bool bWoWLANBoundary) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 RsvdPageNum=0; + u16 TxPageBndy= LAST_ENTRY_OF_TX_PKT_BUFFER_8814A; // default reseved 1 page for the IC type which is undefined. + + if(bWoWLANBoundary) + { + rtw_hal_get_def_var(Adapter, HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN, (u8 *)&TxPageBndy); + } + else + { + rtw_hal_get_def_var(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u8 *)&TxPageBndy); + } + + RsvdPageNum = LAST_ENTRY_OF_TX_PKT_BUFFER_8814A -TxPageBndy + 1; + + return RsvdPageNum; +} + + +void rtl8814_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + BOOLEAN bSendBeacon=_FALSE; + BOOLEAN bcn_valid = _FALSE; + u8 DLBcnCount=0; + u32 poll = 0; + u8 RegFwHwTxQCtrl; + + RTW_INFO("%s mstatus(%x)\n", __FUNCTION__,mstatus); + + if(mstatus == 1) + { + // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. + // Suggested by filen. Added by tynli. + rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); + // Do not set TSF again here or vWiFi beacon DMA INT will not work. + //correct_TSF(padapter, pmlmeext); + // Hw sequende enable by dedault. 2010.06.23. by tynli. + //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); + //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); + + //Set REG_CR bit 8. DMA beacon by SW. + rtw_write8(padapter, REG_CR+1, rtw_read8(padapter, REG_CR + 1) | BIT0); + + /*RTW_INFO("%s-%d: enable SW BCN, REG_CR=0x%x\n", __func__, __LINE__, rtw_read32(padapter, REG_CR));*/ + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. + //SetBcnCtrlReg(padapter, 0, BIT3); + //SetBcnCtrlReg(padapter, BIT4, 0); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); + RegFwHwTxQCtrl = rtw_read8(padapter, REG_FWHW_TXQ_CTRL + 2); + + if(RegFwHwTxQCtrl&BIT6) + { + RTW_INFO("HalDownloadRSVDPage(): There is an Adapter is sending beacon.\n"); + bSendBeacon = _TRUE; + } + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + RegFwHwTxQCtrl &= (~BIT6); + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, RegFwHwTxQCtrl); + + + // Clear beacon valid check bit. + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + DLBcnCount = 0; + poll = 0; + do + { + // download rsvd page. + rtw_hal_set_fw_rsvd_page(padapter, _FALSE); + DLBcnCount++; + do + { + rtw_yield_os(); + //rtw_mdelay_os(10); + // check rsvd page download OK. + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); + poll++; + } while (!bcn_valid && (poll%10) != 0 && !RTW_CANNOT_RUN(padapter)); + + } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter)); + + //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage88ES(): 1 Download RSVD page failed!\n")); + if (RTW_CANNOT_RUN(padapter)) + ; + else if(!bcn_valid) + RTW_INFO(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", + ADPT_ARG(padapter) ,DLBcnCount, poll); + else { + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + pwrctl->fw_psmode_iface_id = padapter->iface_id; + RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", + ADPT_ARG(padapter), DLBcnCount, poll); + } + // + // We just can send the reserved page twice during the time that Tx thread is stopped (e.g. pnpsetpower) + // becuase we need to free the Tx BCN Desc which is used by the first reserved page packet. + // At run time, we cannot get the Tx Desc until it is released in TxHandleInterrupt() so we will return + // the beacon TCB in the following code. 2011.11.23. by tynli. + // + //if(bcn_valid && padapter->bEnterPnpSleep) + if(0) + { + if(bSendBeacon) + { + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + DLBcnCount = 0; + poll = 0; + do + { + //SetFwRsvdPagePkt_8812(padapter, _TRUE); + rtw_hal_set_fw_rsvd_page(padapter, _TRUE); + DLBcnCount++; + + do + { + rtw_yield_os(); + //rtw_mdelay_os(10); + // check rsvd page download OK. + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); + poll++; + } while (!bcn_valid && (poll%10) != 0 && !RTW_CANNOT_RUN(padapter)); + } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter)); + + //RT_ASSERT(bcn_valid, ("HalDownloadRSVDPage(): 2 Download RSVD page failed!\n")); + if (RTW_CANNOT_RUN(padapter)) + ; + else if(!bcn_valid) + RTW_INFO("%s: 2 Download RSVD page failed! DLBcnCount:%u, poll:%u\n", __FUNCTION__ ,DLBcnCount, poll); + else + RTW_INFO("%s: 2 Download RSVD success! DLBcnCount:%u, poll:%u\n", __FUNCTION__, DLBcnCount, poll); + } + } + + // Enable Bcn + //SetBcnCtrlReg(padapter, BIT3, 0); + //SetBcnCtrlReg(padapter, 0, BIT4); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); + + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if(bSendBeacon) + { + RegFwHwTxQCtrl |= BIT6; + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, RegFwHwTxQCtrl); + + } + + // + // Update RSVD page location H2C to Fw. + // + if(bcn_valid) + { + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + RTW_INFO("Set RSVD page location to Fw.\n"); + //FillH2CCmd88E(Adapter, H2C_88E_RSVDPAGE, H2C_RSVDPAGE_LOC_LENGTH, pMgntInfo->u1RsvdPageLoc); + } + + // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. + //if(!padapter->bEnterPnpSleep) + { +#ifndef RTL8814AE_SW_BCN + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. + rtw_write8(padapter, REG_CR+1, rtw_read8(padapter, REG_CR + 1)&~(BIT0)); + /*RTW_INFO("%s-%d: disable SW BCN, REG_CR=0x%x\n", __func__, __LINE__, rtw_read32(padapter, REG_CR));*/ +#endif + } + } +} + +#ifdef CONFIG_P2P_PS +void rtl8814_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); + u8 *p2p_ps_offload = (u8 *)&pHalData->p2p_ps_offload; + u8 i; + +#if 1 + switch(p2p_ps_state) + { + case P2P_PS_DISABLE: + RTW_INFO("P2P_PS_DISABLE \n"); + _rtw_memset(p2p_ps_offload, 0, 1); + break; + case P2P_PS_ENABLE: + RTW_INFO("P2P_PS_ENABLE \n"); + // update CTWindow value. + if( pwdinfo->ctwindow > 0 ) + { + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(p2p_ps_offload, 1); + rtw_write8(padapter, REG_P2P_CTWIN, pwdinfo->ctwindow); + } + + // hw only support 2 set of NoA + for( i=0 ; inoa_num ; i++) + { + // To control the register setting for which NOA + rtw_write8(padapter, REG_NOA_DESC_SEL, (i << 4)); + if(i == 0) { + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(p2p_ps_offload, 1); + } else { + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(p2p_ps_offload, 1); + } + + // config P2P NoA Descriptor Register + //RTW_INFO("%s(): noa_duration = %x\n",__FUNCTION__,pwdinfo->noa_duration[i]); + rtw_write32(padapter, REG_NOA_DESC_DURATION, pwdinfo->noa_duration[i]); + + //RTW_INFO("%s(): noa_interval = %x\n",__FUNCTION__,pwdinfo->noa_interval[i]); + rtw_write32(padapter, REG_NOA_DESC_INTERVAL, pwdinfo->noa_interval[i]); + + //RTW_INFO("%s(): start_time = %x\n",__FUNCTION__,pwdinfo->noa_start_time[i]); + rtw_write32(padapter, REG_NOA_DESC_START, pwdinfo->noa_start_time[i]); + + //RTW_INFO("%s(): noa_count = %x\n",__FUNCTION__,pwdinfo->noa_count[i]); + rtw_write8(padapter, REG_NOA_DESC_COUNT, pwdinfo->noa_count[i]); + } + + if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) + { + // rst p2p circuit: reg 0x5F0 + rtw_write8(padapter, REG_P2P_RST_8814A, BIT(0)); //rst p2p 0 circuit NOA 0 + + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ENABLE(p2p_ps_offload, 1); + + if(pwdinfo->role == P2P_ROLE_GO) + { + // 1: Owner, 0: Client + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ROLE(p2p_ps_offload, 1); + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(p2p_ps_offload, 0); + } + else + { + // 1: Owner, 0: Client + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_ROLE(p2p_ps_offload, 0); + } + + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(p2p_ps_offload, 0); + } + break; + case P2P_PS_SCAN: + RTW_INFO("P2P_PS_SCAN \n"); + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(p2p_ps_offload, 1); + break; + case P2P_PS_SCAN_DONE: + RTW_INFO("P2P_PS_SCAN_DONE \n"); + SET_8814A_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(p2p_ps_offload, 0); + pwdinfo->p2p_ps_state = P2P_PS_ENABLE; + break; + default: + break; + } + + RTW_INFO("P2P_PS_OFFLOAD : %x\n", p2p_ps_offload[0]); + FillH2CCmd_8814(padapter, H2C_P2P_PS_OFFLOAD, 1, p2p_ps_offload); +#endif + +} +#endif //CONFIG_P2P + +#ifdef CONFIG_TSF_RESET_OFFLOAD +/* + ask FW to Reset sync register at Beacon early interrupt +*/ +u8 rtl8814_reset_tsf(_adapter *padapter, u8 reset_port ) +{ + u8 buf[2]; + u8 res=_SUCCESS; + + s32 ret; + + if (IFACE_PORT0==reset_port) { + buf[0] = 0x1; buf[1] = 0; + } else{ + buf[0] = 0x0; buf[1] = 0x1; + } + + ret = FillH2CCmd_8814(padapter, H2C_RESET_TSF, 2, buf); + + return res; +} + +int reset_tsf(PADAPTER Adapter, u8 reset_port ) +{ + u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0; + u32 reg_reset_tsf_cnt = (IFACE_PORT0==reset_port) ? + REG_FW_RESET_TSF_CNT_0:REG_FW_RESET_TSF_CNT_1; + u32 reg_bcncrtl = (IFACE_PORT0==reset_port) ? + REG_BCN_CTRL_1:REG_BCN_CTRL; + + rtw_scan_abort(Adapter->pbuddy_adapter); /* site survey will cause reset_tsf fail */ + reset_cnt_after = reset_cnt_before = rtw_read8(Adapter,reg_reset_tsf_cnt); + rtl8814_reset_tsf(Adapter, reset_port); + + while ((reset_cnt_after == reset_cnt_before ) && (loop_cnt < 10)) { + rtw_msleep_os(100); + loop_cnt++; + reset_cnt_after = rtw_read8(Adapter, reg_reset_tsf_cnt); + } + + return(loop_cnt >= 10) ? _FAIL : _TRUE; +} + + +#endif // CONFIG_TSF_RESET_OFFLOAD + +static void rtl8814_set_FwRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) +{ + u8 u1H2CRsvdPageParm[H2C_RSVDPAGE_LOC_LEN]={0}; + + RTW_INFO("8812au/8821/8811 RsvdPageLoc: ProbeRsp=%d PsPoll=%d Null=%d QoSNull=%d BTNull=%d\n", + rsvdpageloc->LocProbeRsp, rsvdpageloc->LocPsPoll, + rsvdpageloc->LocNullData, rsvdpageloc->LocQosNull, + rsvdpageloc->LocBTQosNull); + + SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1H2CRsvdPageParm, rsvdpageloc->LocProbeRsp); + SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1H2CRsvdPageParm, rsvdpageloc->LocPsPoll); + SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocNullData); + SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocQosNull); + SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1H2CRsvdPageParm, rsvdpageloc->LocBTQosNull); + + RTW_INFO_DUMP("u1H2CRsvdPageParm:", u1H2CRsvdPageParm, H2C_RSVDPAGE_LOC_LEN); + FillH2CCmd_8814(padapter, H2C_RSVD_PAGE, H2C_RSVDPAGE_LOC_LEN, u1H2CRsvdPageParm); +} + +#ifdef CONFIG_WOWLAN +static void rtl8814_set_FwAoacRsvdPage_cmd(PADAPTER padapter, PRSVDPAGE_LOC rsvdpageloc) +{ + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + u8 res = 0, count = 0; +#ifdef CONFIG_WOWLAN + u8 u1H2CAoacRsvdPageParm[H2C_AOAC_RSVDPAGE_LOC_LEN]={0}; + + RTW_INFO("8192EAOACRsvdPageLoc: RWC=%d ArpRsp=%d NbrAdv=%d GtkRsp=%d GtkInfo=%d ProbeReq=%d NetworkList=%d\n", + rsvdpageloc->LocRemoteCtrlInfo, rsvdpageloc->LocArpRsp, + rsvdpageloc->LocNbrAdv, rsvdpageloc->LocGTKRsp, + rsvdpageloc->LocGTKInfo, rsvdpageloc->LocProbeReq, + rsvdpageloc->LocNetList); + +#ifdef CONFIG_PNO_SUPPORT + RTW_INFO("NLO_INFO=%d\n", rsvdpageloc->LocPNOInfo); +#endif + if (check_fwstate(pmlmepriv, _FW_LINKED)) { + SET_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocRemoteCtrlInfo); + SET_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocArpRsp); + //SET_H2CCMD_AOAC_RSVDPAGE_LOC_NEIGHBOR_ADV(u1H2CAoacRsvdPageParm, rsvdpageloc->LocNbrAdv); + SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_RSP(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKRsp); + SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKInfo); +#ifdef CONFIG_GTK_OL + SET_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1H2CAoacRsvdPageParm, rsvdpageloc->LocGTKEXTMEM); +#endif // CONFIG_GTK_OL + } else { +#ifdef CONFIG_PNO_SUPPORT + if(!pwrpriv->pno_in_resume) { + SET_H2CCMD_AOAC_RSVDPAGE_LOC_NLO_INFO(u1H2CAoacRsvdPageParm, rsvdpageloc->LocPNOInfo); + } +#endif + } + + RT_PRINT_DATA(_module_hal_init_c_, _drv_always_, "u1H2CAoacRsvdPageParm:", u1H2CAoacRsvdPageParm, H2C_AOAC_RSVDPAGE_LOC_LEN); + FillH2CCmd_8814(padapter, H2C_AOAC_RSVD_PAGE, H2C_AOAC_RSVDPAGE_LOC_LEN, u1H2CAoacRsvdPageParm); + +#ifdef CONFIG_PNO_SUPPORT + if (!check_fwstate(pmlmepriv, WIFI_AP_STATE) && + !check_fwstate(pmlmepriv, _FW_LINKED) && + pwrpriv->pno_in_resume == _FALSE) { + + res = rtw_read8(padapter, 0x1b8); + while(res == 0 && count < 25) { + RTW_INFO("[%d] FW loc_NLOInfo: %d\n", count, res); + res = rtw_read8(padapter, 0x1b8); + count++; + rtw_msleep_os(2); + } + } +#endif // CONFIG_PNO_SUPPORT +#endif // CONFIG_WOWLAN +} +#endif + + +int rtl8814_iqk_wait(_adapter* padapter, u32 timeout_ms) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct submit_ctx *iqk_sctx = &pHalData->iqk_sctx; + + iqk_sctx->submit_time = rtw_get_current_time(); + iqk_sctx->timeout_ms = timeout_ms; + iqk_sctx->status = RTW_SCTX_SUBMITTED; + + return rtw_sctx_wait(iqk_sctx, __func__); +} + +void rtl8814_iqk_done(_adapter* padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct submit_ctx *iqk_sctx = &pHalData->iqk_sctx; + + rtw_sctx_done(&iqk_sctx); +} + +static VOID +C2HTxBeamformingHandler_8814( + IN PADAPTER Adapter, + IN u8* CmdBuf, + IN u8 CmdLen +) +{ +#ifdef CONFIG_BEAMFORMING +#if (BEAMFORMING_SUPPORT == 1) + u8 status = CmdBuf[0] & BIT0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_struct * pDM_Odm = &pHalData->odmpriv; + /*Beamforming_CheckSoundingSuccess(Adapter, status);*/ + phydm_beamforming_end_sw(pDM_Odm, status); +#endif/*(BEAMFORMING_SUPPORT == 1)*/ +#endif /*CONFIG_BEAMFORMING*/ +} + +static VOID +C2HTxFeedbackHandler_8814( + IN PADAPTER Adapter, + IN u8 *CmdBuf, + IN u8 CmdLen +) +{ +#ifdef CONFIG_XMIT_ACK + if (GET_8814A_C2H_TX_RPT_RETRY_OVER(CmdBuf) | GET_8814A_C2H_TX_RPT_LIFE_TIME_OVER(CmdBuf)) { + rtw_ack_tx_done(&Adapter->xmitpriv, RTW_SCTX_DONE_CCX_PKT_FAIL); + } else { + rtw_ack_tx_done(&Adapter->xmitpriv, RTW_SCTX_DONE_SUCCESS); + } +#endif +} + +s32 c2h_handler_8814a(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload) +{ + //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //struct dm_struct * pDM_Odm = &pHalData->odmpriv; + s32 ret = _SUCCESS; + + switch (id) { + case C2H_DBG: + RTW_INFO("[C2H], C2H_DBG!!\n"); + break; + + case C2H_TXBF: + RTW_INFO("[C2H], C2H_TXBF!!\n"); + C2HTxBeamformingHandler_8814(adapter, payload, plen); + break; + + case C2H_CCX_TX_RPT: + C2HTxFeedbackHandler_8814(adapter, payload, plen); + break; + default: + ret = _FAIL; + break; + } + + return ret; +} + +#ifdef CONFIG_BT_COEXIST + +void ConstructBtNullFunctionData( + PADAPTER padapter, + u8 *pframe, + u32 *pLength, + u8 *StaAddr, + u8 bQoS, + u8 AC, + u8 bEosp, + u8 bForcePowerSave) +{ + struct rtw_ieee80211_hdr *pwlanhdr; + u16 *fctrl; + u32 pktlen; + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u8 bssid[ETH_ALEN]; + + /* RTW_INFO("%s:%d\n", __FUNCTION__, bForcePowerSave); */ + + pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; + + if (NULL == StaAddr) { + _rtw_memcpy(bssid, adapter_mac_addr(padapter), ETH_ALEN); + StaAddr = bssid; + } + + fctrl = &pwlanhdr->frame_ctl; + *(fctrl) = 0; + if (bForcePowerSave) + SetPwrMgt(fctrl); + + SetFrDs(fctrl); + _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); + _rtw_memcpy(pwlanhdr->addr3, adapter_mac_addr(padapter), ETH_ALEN); + + set_duration(pwlanhdr, 0); + SetSeqNum(pwlanhdr, 0); + + if (bQoS == _TRUE) { + struct rtw_ieee80211_hdr_3addr_qos *pwlanqoshdr; + + set_frame_sub_type(pframe, WIFI_QOS_DATA_NULL); + + pwlanqoshdr = (struct rtw_ieee80211_hdr_3addr_qos *)pframe; + SetPriority(&pwlanqoshdr->qc, AC); + SetEOSP(&pwlanqoshdr->qc, bEosp); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); + } else { + set_frame_sub_type(pframe, WIFI_DATA_NULL); + + pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); + } + + *pLength = pktlen; +} + + +static void SetFwRsvdPagePkt_BTCoex(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + struct xmit_frame *pcmdframe; + struct pkt_attrib *pattrib; + struct xmit_priv *pxmitpriv; + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + struct pwrctrl_priv *pwrctl; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + u32 BeaconLength = 0; + u32 NullDataLength = 0, QosNullLength = 0, BTQosNullLength = 0; + u32 ProbeReqLength = 0; + u8 *ReservedPagePacket; + u8 TxDescLen = TXDESC_SIZE, TxDescOffset = TXDESC_OFFSET; + u8 TotalPageNum = 0, CurtPktPageNum = 0, RsvdPageNum = 0; + u16 BufIndex, PageSize = PAGE_SIZE_TX_8814; + u32 TotalPacketLen, MaxRsvdPageBufSize = 0; + RSVDPAGE_LOC RsvdPageLoc; + + pHalData = GET_HAL_DATA(padapter); + + pxmitpriv = &padapter->xmitpriv; + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; + pwrctl = adapter_to_pwrctl(padapter); + + //RsvdPageNum = BCNQ_PAGE_NUM_8723B + WOWLAN_PAGE_NUM_8723B; + + RsvdPageNum = BCNQ_PAGE_NUM_8814; + MaxRsvdPageBufSize = RsvdPageNum*PageSize; + + pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); + if (pcmdframe == NULL) { + RTW_INFO("%s: alloc ReservedPagePacket fail!\n", __FUNCTION__); + return; + } + + ReservedPagePacket = pcmdframe->buf_addr; + _rtw_memset(&RsvdPageLoc, 0, sizeof(RSVDPAGE_LOC)); + + /* 3 (1) beacon */ + BufIndex = TxDescOffset; + ConstructBeacon(padapter, &ReservedPagePacket[BufIndex], &BeaconLength); + + /* When we count the first page size, we need to reserve description size for the RSVD */ + /* packet, it will be filled in front of the packet in TXPKTBUF. */ + CurtPktPageNum = (u8)PageNum(TxDescLen + BeaconLength, PageSize); + + /* If we don't add 1 more page, the WOWLAN function has a problem. Baron thinks it's a bug of firmware */ + if (CurtPktPageNum == 1) + CurtPktPageNum += 1; + TotalPageNum += CurtPktPageNum; + + BufIndex += (CurtPktPageNum * PageSize); + + /* Jump to lastest third page *;RESERV 2 PAGES for TxBF NDPA */ + if (BufIndex < (MaxRsvdPageBufSize - PageSize)) { + BufIndex = TxDescOffset + (MaxRsvdPageBufSize - PageSize); + TotalPageNum = BCNQ_PAGE_NUM_8814-1; + + } + + /* 3 (6) BT Qos null data */ + RsvdPageLoc.LocBTQosNull = TotalPageNum; + ConstructBtNullFunctionData( + padapter, + &ReservedPagePacket[BufIndex], + &BTQosNullLength, + NULL, + _TRUE, 0, 0, _FALSE); + rtl8814a_fill_fake_txdesc(padapter, &ReservedPagePacket[BufIndex-TxDescLen], BTQosNullLength, _FALSE, _TRUE, _FALSE); + + //RTW_INFO("%s(): HW_VAR_SET_TX_CMD: BT QOS NULL DATA %p %d\n", + // __FUNCTION__, &ReservedPagePacket[BufIndex-TxDescLen], (BTQosNullLength+TxDescLen)); + + CurtPktPageNum = (u8)PageNum(TxDescLen + BTQosNullLength,PageSize); + + TotalPageNum += CurtPktPageNum; + + TotalPacketLen = BufIndex + BTQosNullLength; + if(TotalPacketLen > MaxRsvdPageBufSize) + { + RTW_INFO("%s(): ERROR: The rsvd page size is not enough!!TotalPacketLen %d, MaxRsvdPageBufSize %d\n",__FUNCTION__, + TotalPacketLen,MaxRsvdPageBufSize); + goto error; + } + else + { + // update attribute + pattrib = &pcmdframe->attrib; + update_mgntframe_attrib(padapter, pattrib); + pattrib->qsel = QSLT_BEACON; + pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; +#ifdef CONFIG_PCI_HCI + dump_mgntframe(padapter, pcmdframe); +#else + dump_mgntframe_and_wait(padapter, pcmdframe, 100); +#endif + } + + RTW_INFO("%s: Set RSVD page location to Fw ,TotalPacketLen(%d), TotalPageNum(%d)\n", __FUNCTION__,TotalPacketLen,TotalPageNum); + if(check_fwstate(pmlmepriv, _FW_LINKED)) { + rtl8814_set_FwRsvdPage_cmd(padapter, &RsvdPageLoc); + #ifdef CONFIG_WOWLAN + rtl8814_set_FwAoacRsvdPage_cmd(padapter, &RsvdPageLoc); + #endif + } + + return; + +error: + + rtw_free_xmitframe(pxmitpriv, pcmdframe); +} + + +void rtl8812a_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + BOOLEAN bRecover = _FALSE; + BOOLEAN bcn_valid = _FALSE; + u8 DLBcnCount=0; + u32 poll = 0; + u8 val8; + u8 v8; + + RTW_INFO("+" FUNC_ADPT_FMT ": iface_type=%d", + FUNC_ADPT_ARG(padapter), get_iface_type(padapter)); + + // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. + // Suggested by filen. Added by tynli. + rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); + + // set REG_CR bit 8 + v8 = rtw_read8(padapter, REG_CR+1); + v8 |= BIT(0); // ENSWBCN + rtw_write8(padapter, REG_CR+1, v8); + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. + val8 = rtw_read8(padapter, REG_BCN_CTRL); + val8 &= ~BIT(3); + val8 |= BIT(4); + rtw_write8(padapter, REG_BCN_CTRL, val8); + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + if (pHalData->RegFwHwTxQCtrl & BIT(6)) + bRecover = _TRUE; + + // To tell Hw the packet is not a real beacon frame. + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl & ~BIT(6)); + pHalData->RegFwHwTxQCtrl &= ~BIT(6); + + // Clear beacon valid check bit. + rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL); + rtw_hal_set_hwreg(padapter, HW_VAR_DL_BCN_SEL, NULL); + + DLBcnCount = 0; + poll = 0; + do + { + SetFwRsvdPagePkt_BTCoex(padapter); + DLBcnCount++; + do + { + rtw_yield_os(); + //rtw_mdelay_os(10); + // check rsvd page download OK. + rtw_hal_get_hwreg(padapter, HW_VAR_BCN_VALID, (u8*)(&bcn_valid)); + poll++; + } while (!bcn_valid && (poll%10) != 0 && !RTW_CANNOT_RUN(padapter)); + + } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter)); + + if (RTW_CANNOT_RUN(padapter)) + ; + else if(!bcn_valid) + RTW_INFO(ADPT_FMT": 1 DL RSVD page failed! DLBcnCount:%u, poll:%u\n", + ADPT_ARG(padapter) ,DLBcnCount, poll); + else { + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + pwrctl->fw_psmode_iface_id = padapter->iface_id; + RTW_INFO(ADPT_FMT": 1 DL RSVD page success! DLBcnCount:%u, poll:%u\n", + ADPT_ARG(padapter), DLBcnCount, poll); + } + + // 2010.05.11. Added by tynli. + val8 = rtw_read8(padapter, REG_BCN_CTRL); + val8 |= BIT(3); + val8 &= ~BIT(4); + rtw_write8(padapter, REG_BCN_CTRL, val8); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if(bRecover) + { + rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, pHalData->RegFwHwTxQCtrl | BIT(6)); + pHalData->RegFwHwTxQCtrl |= BIT(6); + } + + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. +#ifndef RTL8814AE_SW_BCN + v8 = rtw_read8(padapter, REG_CR+1); + v8 &= ~BIT(0); // ~ENSWBCN + rtw_write8(padapter, REG_CR+1, v8); +#endif + +} + +#endif // CONFIG_BT_COEXIST + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_dm.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_dm.c new file mode 100644 index 00000000000000..10d7c78254735c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_dm.c @@ -0,0 +1,407 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +//============================================================ +// Description: +// +// This file is for 92CE/92CU dynamic mechanism only +// +// +//============================================================ +#define _RTL8814A_DM_C_ + +//============================================================ +// include files +//============================================================ +//#include +#include + +//============================================================ +// Global var +//============================================================ + +static VOID +dm_CheckProtection( + IN PADAPTER Adapter + ) +{ +#if 0 + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u1Byte CurRate, RateThreshold; + + if(pMgntInfo->pHTInfo->bCurBW40MHz) + RateThreshold = MGN_MCS1; + else + RateThreshold = MGN_MCS3; + + if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) { + pMgntInfo->bDmDisableProtect = TRUE; + DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } else { + pMgntInfo->bDmDisableProtect = FALSE; + DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); + } +#endif +} + +#ifdef CONFIG_SUPPORT_HW_WPS_PBC +static void dm_CheckPbcGPIO(_adapter *padapter) +{ + u8 tmp1byte; + u8 bPbcPressed = _FALSE; + + if(!padapter->registrypriv.hw_wps_pbc) + return; + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + + tmp1byte = rtw_read8(padapter, REG_GPIO_EXT_CTRL_8814A); + //DBG_871X("CheckPbcGPIO - %x\n", tmp1byte); + + if (tmp1byte == 0xff) + return ; + else if (tmp1byte & BIT3) { + // Here we only set bPbcPressed to TRUE. After trigger PBC, the variable will be set to FALSE + DBG_871X("CheckPbcGPIO - PBC is pressed\n"); + bPbcPressed = _TRUE; + } + +#endif + + if (_TRUE == bPbcPressed) { + /* Here we only set bPbcPressed to true */ + /* After trigger PBC, the variable will be set to false */ + RTW_INFO("CheckPbcGPIO - PBC is pressed\n"); + + rtw_request_wps_pbc_event(padapter); + } +} +#endif /* #ifdef CONFIG_SUPPORT_HW_WPS_PBC */ + +#ifdef CONFIG_PCI_HCI +/* + * Description: + * Perform interrupt migration dynamically to reduce CPU utilization. + * + * Assumption: + * 1. Do not enable migration under WIFI test. + * + * Created by Roger, 2010.03.05. + * */ +VOID +dm_InterruptMigration( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + BOOLEAN bCurrentIntMt, bCurrentACIntDisable; + BOOLEAN IntMtToSet = _FALSE; + BOOLEAN ACIntToSet = _FALSE; + + /* Retrieve current interrupt migration and Tx four ACs IMR settings first. */ + bCurrentIntMt = pHalData->bInterruptMigration; + bCurrentACIntDisable = pHalData->bDisableTxInt; + + /* */ + /* Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics */ + /* when interrupt migration is set before. 2010.03.05. */ + /* */ + if (!Adapter->registrypriv.wifi_spec && + (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) && + pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) { + IntMtToSet = _TRUE; + + /* To check whether we should disable Tx interrupt or not. */ + if (pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic) + ACIntToSet = _TRUE; + } + + /* Update current settings. */ + if (bCurrentIntMt != IntMtToSet) { + RTW_INFO("%s(): Update interrrupt migration(%d)\n", __FUNCTION__, IntMtToSet); + if (IntMtToSet) { + /* */ + /* Set interrrupt migration timer and corresponging Tx/Rx counter. */ + /* timer 25ns*0xfa0=100us for 0xf packets. */ + /* 2010.03.05. */ + /* */ + rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);/* 0x306:Rx, 0x307:Tx */ + pHalData->bInterruptMigration = IntMtToSet; + } else { + /* Reset all interrupt migration settings. */ + rtw_write32(Adapter, REG_INT_MIG, 0); + pHalData->bInterruptMigration = IntMtToSet; + } + } + +#if 0 + if (bCurrentACIntDisable != ACIntToSet) { + RTW_INFO("%s(): Update AC interrrupt(%d)\n", __FUNCTION__, ACIntToSet); + if (ACIntToSet) { /* Disable four ACs interrupts. */ + /* */ + /* Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. */ + /* When extremely highly Rx OK occurs, we will disable Tx interrupts. */ + /* 2010.03.05. */ + /* */ + UpdateInterruptMask8192CE(Adapter, 0, RT_AC_INT_MASKS); + pHalData->bDisableTxInt = ACIntToSet; + } else { /* Enable four ACs interrupts. */ + UpdateInterruptMask8192CE(Adapter, RT_AC_INT_MASKS, 0); + pHalData->bDisableTxInt = ACIntToSet; + } + } +#endif + +} + +#endif + +/* + * Initialize GPIO setting registers + * */ +static void +dm_InitGPIOSetting( + IN PADAPTER Adapter +) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + u8 tmp1byte; + + tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); + tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); + + rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); +} + +/* ************************************************************ + * functions + * ************************************************************ */ +static void Init_ODM_ComInfo_8814(PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *pDM_Odm = &(pHalData->odmpriv); + u8 cut_ver, fab_ver; + + Init_ODM_ComInfo(Adapter); + + odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8814A); + + fab_ver = ODM_TSMC; + if(IS_A_CUT(pHalData->version_id)) + cut_ver = ODM_CUT_A; + else if(IS_B_CUT(pHalData->version_id)) + cut_ver = ODM_CUT_B; + else if(IS_C_CUT(pHalData->version_id)) + cut_ver = ODM_CUT_C; + else if(IS_D_CUT(pHalData->version_id)) + cut_ver = ODM_CUT_D; + else if(IS_E_CUT(pHalData->version_id)) + cut_ver = ODM_CUT_E; + else + cut_ver = ODM_CUT_A; + + odm_cmn_info_init(pDM_Odm,ODM_CMNINFO_FAB_VER,fab_ver); + odm_cmn_info_init(pDM_Odm,ODM_CMNINFO_CUT_VER,cut_ver); + + odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType); + + //odm_cmn_info_init(pDM_Odm, ODM_CMNINFO_IQKFWOFFLOAD, pHalData->RegIQKFWOffload); + +} + +void +rtl8814_InitHalDm( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct * pDM_Odm = &(pHalData->odmpriv); + u8 i; + +#ifdef CONFIG_USB_HCI + dm_InitGPIOSetting(Adapter); +#endif //CONFIG_USB_HCI + + odm_dm_init(pDM_Odm); + + //Adapter->fix_rate = 0xFF; + +} + +VOID +rtl8814_HalDmWatchDog( + IN PADAPTER Adapter + ) +{ + BOOLEAN bFwCurrentInPSMode = _FALSE; + BOOLEAN bFwPSAwake = _TRUE; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *pDM_Odm = &(pHalData->odmpriv); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); + u8 in_lps = _FALSE; + + if (!rtw_is_hw_init_completed(Adapter)) + goto skip_dm; + +#ifdef CONFIG_LPS + bFwCurrentInPSMode = adapter_to_pwrctl(Adapter)->bFwCurrentInPSMode; + rtw_hal_get_hwreg(Adapter, HW_VAR_FWLPS_RF_ON, &bFwPSAwake); +#endif + +#ifdef CONFIG_P2P_PS + /* Fw is under p2p powersaving mode, driver should stop dynamic mechanism. */ + /* modifed by thomas. 2011.06.11. */ + if (Adapter->wdinfo.p2p_ps_mode) + bFwPSAwake = _FALSE; +#endif /* CONFIG_P2P_PS */ + + if ((rtw_is_hw_init_completed(Adapter)) + && ((!bFwCurrentInPSMode) && bFwPSAwake)) { + + rtw_hal_check_rxfifo_full(Adapter); + /* */ + /* Dynamically switch RTS/CTS protection. */ + /* */ + /* dm_CheckProtection(Adapter); */ + +#ifdef CONFIG_PCI_HCI + /* 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. */ + /* Tx Migration settings. */ + /* dm_InterruptMigration(Adapter); */ + + /* if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) */ + /* PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); */ +#endif + + } + +#ifdef CONFIG_DISABLE_ODM + goto skip_dm; +#endif +#ifdef CONFIG_LPS + if (pwrpriv->bLeisurePs && bFwCurrentInPSMode && pwrpriv->pwr_mode != PS_MODE_ACTIVE) + in_lps = _TRUE; +#endif + rtw_phydm_watchdog(Adapter, in_lps); + +skip_dm: + +#ifdef CONFIG_SUPPORT_HW_WPS_PBC + /* Check GPIO to determine current Pbc status. */ + dm_CheckPbcGPIO(Adapter); +#endif + + return; +} + +void rtl8814_init_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *podmpriv = &pHalData->odmpriv; + + /* _rtw_spinlock_init(&(pHalData->odm_stainfo_lock)); */ + +#ifndef CONFIG_IQK_PA_OFF /* FW has no IQK PA OFF option yet, don't offload */ + #ifdef CONFIG_BT_COEXIST + /* firmware size issue, btcoex fw doesn't support IQK offload */ + if (pHalData->EEPROMBluetoothCoexist == _FALSE) + #endif + { + pHalData->RegIQKFWOffload = 1; + rtw_sctx_init(&pHalData->iqk_sctx, 0); + } +#endif + + Init_ODM_ComInfo_8814(Adapter); + odm_init_all_timers(podmpriv ); + //PHYDM_InitDebugSetting(podmpriv); + + pHalData->CurrentTxPwrIdx = 20; + +} + +void rtl8814_deinit_dm_priv(IN PADAPTER Adapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + struct dm_struct *podmpriv = &pHalData->odmpriv; + /* _rtw_spinlock_free(&pHalData->odm_stainfo_lock); */ + odm_cancel_all_timers(podmpriv); +} + + +#ifdef CONFIG_ANTENNA_DIVERSITY +// Add new function to reset the state of antenna diversity before link. +// +// Compare RSSI for deciding antenna +void AntDivCompare8814(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) +{ + //PADAPTER Adapter = pDM_Odm->Adapter ; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + if (0 != pHalData->AntDivCfg) { + //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), + // src->Rssi,query_rx_pwr_percentage(src->Rssi)); + //select optimum_antenna for before linked =>For antenna diversity + if (dst->Rssi >= src->Rssi )//keep org parameter + { + src->Rssi = dst->Rssi; + src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; + } + } +} + +// Add new function to reset the state of antenna diversity before link. +u8 AntDivBeforeLink8814(PADAPTER Adapter ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_struct * pDM_Odm =&pHalData->odmpriv; + SWAT_T *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + // Condition that does not need to use antenna diversity. + if (pHalData->AntDivCfg==0) { + //DBG_8192C("odm_AntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); + return _FALSE; + } + + if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { + return _FALSE; + } + + + if (pDM_SWAT_Table->SWAS_NoLink_State == 0) { + //switch channel + pDM_SWAT_Table->SWAS_NoLink_State = 1; + pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?AUX_ANT:MAIN_ANT; + + //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); + rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); + //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==MAIN_ANT)?"MAIN":"AUX"); + return _TRUE; + } else { + pDM_SWAT_Table->SWAS_NoLink_State = 0; + return _FALSE; + } + +} +#endif //CONFIG_ANTENNA_DIVERSITY + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c new file mode 100644 index 00000000000000..b93ed3174f02dc --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_hal_init.c @@ -0,0 +1,6769 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814A_HAL_INIT_C_ + +//#include +#include +#include "phydm_antdiv.h" + +#define REG_BCN_INTERVAL 0x0554 + +extern u32 array_length_mp_8814a_fw_ap; +extern u8 array_mp_8814a_fw_ap[]; +extern u32 array_length_mp_8814a_fw_nic; +extern u8 array_mp_8814a_fw_nic[]; + +enum { + VOLTAGE_V25 = 0x03, + LDOE25_SHIFT = 28 , +}; + +//------------------------------------------------------------------------- +// +// LLT R/W/Init function +// +//------------------------------------------------------------------------- +VOID +Hal_InitEfuseVars_8814A( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PEFUSE_HAL pEfuseHal = &(pHalData->EfuseHal); + pu2Byte ptr; + + #define INIT_EFUSE(var,value) ptr = (pu2Byte)&var; *ptr = value + + RTW_INFO("====> %s \n", __func__); + //2 Common + INIT_EFUSE(pEfuseHal->WordUnit , EFUSE_MAX_WORD_UNIT); + RTW_INFO("====>pEfuseHal->WordUnit %d \n", pEfuseHal->WordUnit); + INIT_EFUSE(pEfuseHal->BankSize , 512); + INIT_EFUSE(pEfuseHal->OOBProtectBytes, EFUSE_OOB_PROTECT_BYTES); + RTW_INFO("====>pEfuseHal->OOBProtectBytes %d \n", pEfuseHal->OOBProtectBytes); + INIT_EFUSE(pEfuseHal->ProtectBytes , EFUSE_PROTECT_BYTES_BANK_8814A); + RTW_INFO("====>pEfuseHal->ProtectBytes %d \n", pEfuseHal->ProtectBytes); + INIT_EFUSE(pEfuseHal->BankAvailBytes , (pEfuseHal->BankSize - pEfuseHal->OOBProtectBytes)); + INIT_EFUSE(pEfuseHal->TotalBankNum , EFUSE_MAX_BANK_8814A); + INIT_EFUSE(pEfuseHal->HeaderRetry , 0); + INIT_EFUSE(pEfuseHal->DataRetry , 0); + + //2 Wi-Fi + INIT_EFUSE(pEfuseHal->MaxSecNum_WiFi , EFUSE_MAX_SECTION_8814A); + RTW_INFO("====>pEfuseHal->MaxSecNum_WiFi %d \n", pEfuseHal->MaxSecNum_WiFi); + INIT_EFUSE(pEfuseHal->PhysicalLen_WiFi , EFUSE_REAL_CONTENT_LEN_8814A); + RTW_INFO("====>pEfuseHal->PhysicalLen_WiFi %d \n", pEfuseHal->PhysicalLen_WiFi); + INIT_EFUSE(pEfuseHal->LogicalLen_WiFi , EFUSE_MAP_LEN_8814A); + RTW_INFO("====>pEfuseHal->LogicalLen_WiFi %d \n", pEfuseHal->LogicalLen_WiFi); + INIT_EFUSE(pEfuseHal->BankNum_WiFi , pEfuseHal->PhysicalLen_WiFi/pEfuseHal->BankSize); + INIT_EFUSE(pEfuseHal->TotalAvailBytes_WiFi, (pEfuseHal->PhysicalLen_WiFi - (pEfuseHal->TotalBankNum * pEfuseHal->OOBProtectBytes))); + + //2 BT + INIT_EFUSE(pEfuseHal->MaxSecNum_BT , 0); + INIT_EFUSE(pEfuseHal->PhysicalLen_BT , 0); + INIT_EFUSE(pEfuseHal->LogicalLen_BT , 0); + INIT_EFUSE(pEfuseHal->BankNum_BT , 0); + INIT_EFUSE(pEfuseHal->TotalAvailBytes_BT, 0); + + RTW_INFO("%s <====\n", __func__); +} + + +s32 InitLLTTable8814A( + IN PADAPTER Adapter + ) +{ + // Auto-init LLT table ( Set REG:0x208[BIT0] ) + //Write 1 to enable HW init LLT, driver need polling to 0 meaning init success + u8 tmp1byte=0, testcnt=0; + s32 Status = _SUCCESS; + + tmp1byte = rtw_read8(Adapter, REG_AUTO_LLT_8814A); + rtw_write8(Adapter, REG_AUTO_LLT_8814A, tmp1byte|BIT0); + while(tmp1byte & BIT0) + { + tmp1byte = rtw_read8(Adapter, REG_AUTO_LLT_8814A); + rtw_mdelay_os(100); + testcnt++; + if(testcnt > 100) + { + Status = _FAIL; + break; + } + } + return Status; +} + +#ifdef CONFIG_WOWLAN +void hal_DetectWoWMode(PADAPTER pAdapter) +{ + adapter_to_pwrctl(pAdapter)->bSupportRemoteWakeup = _TRUE; +} +#endif + + +VOID +_FWDownloadEnable_8814A( + IN PADAPTER Adapter, + IN BOOLEAN enable + ) +{ + u8 tmp; + u16 u2Tmp = 0; + + if(enable) + { + // MCU firmware download enable. + u2Tmp = rtw_read16(Adapter, REG_8051FW_CTRL_8814A); + u2Tmp &= 0x3000; + u2Tmp &= (~BIT12); + u2Tmp |= BIT13; + u2Tmp |= BIT0; + rtw_write16(Adapter, REG_8051FW_CTRL_8814A, u2Tmp); + + // Clear Rom DL enable + // tmp = rtw_read8(Adapter, REG_8051FW_CTRL_8814A+2); //modify by gw 20130826(advice by hw) + // rtw_write8(Adapter, REG_8051FW_CTRL_8814A+2, tmp&0xf7);//clear bit3 + } + else + { + // MCU firmware download enable. + tmp = rtw_read8(Adapter, REG_8051FW_CTRL_8814A); + rtw_write8(Adapter, REG_8051FW_CTRL_8814A, tmp&0xfe); + } +} + +#define MAX_REG_BOLCK_SIZE 196 + +VOID +_BlockWrite_8814A( + IN PADAPTER Adapter, + IN PVOID buffer, + IN u32 buffSize + ) +{ + u32 blockSize_p1 = 4; // (Default) Phase #1 : PCI muse use 4-byte write to download FW + u32 blockSize_p2 = 8; // Phase #2 : Use 8-byte, if Phase#1 use big size to write FW. + u32 blockSize_p3 = 1; // Phase #3 : Use 1-byte, the remnant of FW image. + u32 blockCount_p1 = 0, blockCount_p2 = 0, blockCount_p3 = 0; + u32 remainSize_p1 = 0, remainSize_p2 = 0; + u8* bufferPtr = (u8*)buffer; + u32 i=0, offset=0; + +#ifdef CONFIG_USB_HCI + blockSize_p1 = MAX_REG_BOLCK_SIZE; // Use 196-byte write to download FW + // Small block size will increase USB init speed. But prevent FW download fail + // use 4-Byte instead of 196-Byte to write FW. +#endif + + //3 Phase #1 + blockCount_p1 = buffSize / blockSize_p1; + remainSize_p1 = buffSize % blockSize_p1; + + for(i = 0 ; i < blockCount_p1 ; i++){ + #if (DEV_BUS_TYPE == RT_USB_INTERFACE) + rtw_writeN(Adapter, (FW_START_ADDRESS + i * blockSize_p1), blockSize_p1,(bufferPtr + i * blockSize_p1)); + #else + rtw_write32(Adapter, (FW_START_ADDRESS + i * blockSize_p1), *((pu4Byte)(bufferPtr + i * blockSize_p1))); + #endif + } + + //3 Phase #2 + if(remainSize_p1){ + offset = blockCount_p1 * blockSize_p1; + + blockCount_p2=remainSize_p1/blockSize_p2; + remainSize_p2=remainSize_p1%blockSize_p2; + + #if (DEV_BUS_TYPE == RT_USB_INTERFACE) + for(i = 0 ; i < blockCount_p2 ; i++){ + rtw_writeN(Adapter, (FW_START_ADDRESS + offset+i*blockSize_p2), blockSize_p2,(bufferPtr + offset+i*blockSize_p2)); + } + #endif + } + + //3 Phase #3 + if(remainSize_p2) + { + offset=(blockCount_p1 * blockSize_p1)+(blockCount_p2*blockSize_p2); + + blockCount_p3 = remainSize_p2 /blockSize_p3; + + for(i = 0 ; i < blockCount_p3 ; i++){ + rtw_write8(Adapter, (FW_START_ADDRESS + offset + i), *(bufferPtr +offset+ i)); + } + } +} + +VOID +_PageWrite_8814A( + IN PADAPTER Adapter, + IN u32 page, + IN PVOID buffer, + IN u32 size + ) +{ + u8 value8; + u8 u8Page = (u8) (page & 0x07) ; + + value8 = (rtw_read8(Adapter, REG_8051FW_CTRL_8814A+2)& 0xF8 ) | u8Page ; + rtw_write8(Adapter,REG_8051FW_CTRL_8814A+2,value8); + + _BlockWrite_8814A(Adapter,buffer,size); +} + +VOID +_FillDummy_8814A( + u8* pFwBuf, + pu4Byte pFwLen + ) +{ + u32 FwLen = *pFwLen; + u8 remain = (u8)(FwLen%4); + remain = (remain==0)?0:(4-remain); + + while(remain>0) + { + pFwBuf[FwLen] = 0; + FwLen++; + remain--; + } + + *pFwLen = FwLen; +} + +VOID +_WriteFW_8814A( + IN PADAPTER Adapter, + IN PVOID buffer, + IN u32 size + ) +{ + u32 pageNums,remainSize ; + u32 page,offset; + u8* bufferPtr = (u8*)buffer; + +#ifdef CONFIG_PCI_HCI + // 20100120 Joseph: Add for 88CE normal chip. + // Fill in zero to make firmware image to dword alignment. + _FillDummy_8814A(bufferPtr, &size); +#endif //CONFIG_PCI_HCI + + pageNums = size / MAX_PAGE_SIZE ; + + //RT_ASSERT((pageNums <= 8), ("Page numbers should not greater then 8 \n")); + + remainSize = size % MAX_PAGE_SIZE; + + for(page = 0; page < pageNums; page++){ + offset = page *MAX_PAGE_SIZE; + _PageWrite_8814A(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE); + rtw_udelay_os(2); + } + if(remainSize){ + offset = pageNums *MAX_PAGE_SIZE; + page = pageNums; + _PageWrite_8814A(Adapter,page, (bufferPtr+offset),remainSize); + } +} + +VOID +_3081Disable8814A( + IN PADAPTER Adapter + ) +{ + u8 u1bTmp; + u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN_8814A+1); + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A+1, u1bTmp&(~BIT2)); + + +} + +VOID +_3081Enable8814A( + IN PADAPTER Adapter + ) +{ + u8 u1bTmp; + u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN_8814A+1); + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A+1, u1bTmp|BIT2); +} + + +//add by ylb 20130814 for 3081 download FW +static +BOOLEAN +IDDMADownLoadFW_3081( + IN PADAPTER Adapter, + IN u32 source, + IN u32 dest, + IN u32 length, + IN BOOLEAN fs, + IN BOOLEAN ls + ) + { + u32 ch0ctrl = (DDMA_CHKSUM_EN|DDMA_CH_OWN); + u32 cnt; + u1Byte tmp; + //check if ddma ch0 is idle + cnt=20; + while(rtw_read32(Adapter, REG_DDMA_CH0CTRL)&DDMA_CH_OWN) + { + rtw_udelay_os(1000); + cnt--; + if(cnt==0) + { + RTW_INFO("IDDMADownLoadFW_3081, line%d: CNT fail\n", __LINE__); + return _FALSE; + } + } + ch0ctrl |= length & DDMA_LEN_MASK; + + //check if chksum continuous + if(fs == _FALSE){ + ch0ctrl |= DDMA_CH_CHKSUM_CNT; + } + rtw_write32(Adapter,REG_DDMA_CH0SA, source); + rtw_write32(Adapter,REG_DDMA_CH0DA, dest); + rtw_write32(Adapter,REG_DDMA_CH0CTRL, ch0ctrl); + + cnt=20; + while(rtw_read32(Adapter, REG_DDMA_CH0CTRL)&DDMA_CH_OWN) + { + rtw_udelay_os(1000); + cnt--; + if(cnt==0) + { + RTW_INFO("IDDMADownLoadFW_3081, line%d: CNT fail\n", __LINE__); + return _FALSE; + } + } + + //check checksum + if(ls == _TRUE) + { + tmp = rtw_read8(Adapter,REG_8051FW_CTRL_8814A); + if(0==(rtw_read32(Adapter,REG_DDMA_CH0CTRL)&DDMA_CHKSUM_FAIL)) + {//chksum ok + RTW_INFO("Check sum OK\n"); + //imem + if(dest < OCPBASE_DMEM_3081) + { + tmp |= IMEM_DL_RDY; + rtw_write8(Adapter,REG_8051FW_CTRL_8814A, tmp|IMEM_CHKSUM_OK); + RTW_INFO("imem check sum tmp %d\n",tmp); + } + //dmem + else + { + tmp |= DMEM_DL_RDY; + rtw_write8(Adapter,REG_8051FW_CTRL_8814A, tmp|DMEM_CHKSUM_OK); + RTW_INFO("dmem check sum tmp %d\n",tmp); + } + } + else + {//chksum fail + RTW_INFO("Check sum fail\n"); + ch0ctrl=rtw_read32(Adapter,REG_DDMA_CH0CTRL); + rtw_write32(Adapter, REG_DDMA_CH0CTRL,ch0ctrl|DDMA_RST_CHKSUM_STS); + + //imem + if(dest < OCPBASE_DMEM_3081) + { + tmp &= (~IMEM_DL_RDY); + rtw_write8(Adapter,REG_8051FW_CTRL_8814A, tmp&~IMEM_CHKSUM_OK); + } + //dmem + else + { + tmp &= (~DMEM_DL_RDY); + rtw_write8(Adapter,REG_8051FW_CTRL_8814A, tmp&~DMEM_CHKSUM_OK); + } + return _FALSE; + } + } + return _TRUE; +} + + +//add by ylb 20130814 for 3081 download FW +static +BOOLEAN +WaitDownLoadRSVDPageOK_3081( + IN PADAPTER Adapter + ) +{ + u8 BcnValidReg=0,TxBcReg=0; + u8 count=0, DLBcnCount=0; + BOOLEAN bRetValue = _FALSE; + +#if defined(CONFIG_PCI_HCI) + //Polling Beacon Queue to send Beacon + TxBcReg = rtw_read8(Adapter, REG_MGQ_TXBD_NUM_8814A+3); + count=0; + while(( count <20) && (TxBcReg & BIT4)) + { + count++; + rtw_udelay_os(10); + TxBcReg = rtw_read8(Adapter, REG_MGQ_TXBD_NUM_8814A+3); + } + + rtw_write8(Adapter, REG_MGQ_TXBD_NUM_8814A+3, TxBcReg|BIT4); +#endif //#if defined(CONFIG_PCI_HCI) + // check rsvd page download OK. + BcnValidReg = rtw_read8(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1); + count=0; + while(!(BcnValidReg & BIT7) && count <20) + { + count++; + rtw_udelay_os(50); + BcnValidReg = rtw_read8(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1); + } + + //Set 1 to Clear BIT7 by SW + if(BcnValidReg & BIT7) + { + rtw_write8(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1, (BcnValidReg|BIT7)); + bRetValue = _TRUE; + } + else + { + RTW_INFO("WaitDownLoadRSVDPageOK_3081(): Download RSVD page failed!\n"); + bRetValue = _FALSE; + } + + return bRetValue; +} + + +VOID +SetDownLoadFwRsvdPagePkt_8814A( + IN PADAPTER Adapter, + IN PVOID buffer, + IN u32 len + ) +{ + PHAL_DATA_TYPE pHalData; + struct xmit_frame *pcmdframe; + struct xmit_priv *pxmitpriv; + struct pkt_attrib *pattrib; + //The desc lengh in Tx packet buffer of 8814A is 40 bytes. + u16 BufIndex=0, TxDescOffset = TXDESC_OFFSET; + u32 TotalPacketLen = len; + BOOLEAN bDLOK = FALSE; + u8 *ReservedPagePacket; + + pHalData = GET_HAL_DATA(Adapter); + pxmitpriv = &Adapter->xmitpriv; + +#ifdef CONFIG_BCN_ICF + pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv); +#else + pcmdframe = alloc_mgtxmitframe(pxmitpriv); +#endif + if (pcmdframe == NULL) { + return; + } + + ReservedPagePacket = pcmdframe->buf_addr; + + BufIndex = TxDescOffset; + + TotalPacketLen = len + BufIndex; + + _rtw_memcpy(&ReservedPagePacket[BufIndex], buffer, len); + //RTW_INFO("SetFwRsvdPagePkt_8814A(): HW_VAR_SET_TX_CMD: BCN, %p, %d\n", &ReservedPagePacket[BufIndex], len); + + //RTW_INFO("SetFwRsvdPagePkt(): TotalPacketLen=%d \n", TotalPacketLen); + + // update attribute + pattrib = &pcmdframe->attrib; + update_mgntframe_attrib(Adapter, pattrib); + pattrib->qsel = QSLT_BEACON; + pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescOffset; + + dump_mgntframe(Adapter, pcmdframe); + + //ReturnGenTempBuffer(pAdapter, pGenBufReservedPagePacket); +} + +/* ************************************************************************************ + * + * 20100209 Joseph: + * This function is used only for 92C to set REG_BCN_CTRL(0x550) register. + * We just reserve the value of the register in variable pHalData->RegBcnCtrlVal and then operate + * the value of the register via atomic operation. + * This prevents from race condition when setting this register. + * The value of pHalData->RegBcnCtrlVal is initialized in HwConfigureRTL8192CE() function. + * */ +static void SetBcnCtrlReg( + PADAPTER padapter, + u8 SetBits, + u8 ClearBits) +{ + PHAL_DATA_TYPE pHalData; + u8 RegBcnCtrlVal = 0; + + pHalData = GET_HAL_DATA(padapter); + RegBcnCtrlVal = rtw_read8(padapter, REG_BCN_CTRL); + + RegBcnCtrlVal |= SetBits; + RegBcnCtrlVal &= ~ClearBits; + +#if 0 + /* #ifdef CONFIG_SDIO_HCI */ + if (pHalData->sdio_himr & (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK)) + RegBcnCtrlVal |= EN_TXBCN_RPT; +#endif + rtw_write8(padapter, REG_BCN_CTRL, RegBcnCtrlVal); +} + +VOID +HalROMDownloadFWRSVDPage8814A( + IN PADAPTER Adapter, + IN PVOID buffer, + IN u32 Len +) +{ + u8 u1bTmp=0, tmpReg422=0; + u8 BcnValidReg=0,TxBcReg=0; + BOOLEAN bSendBeacon=_FALSE, bDownLoadRSVDPageOK = _FALSE; + u8* pbuffer = buffer; + + BOOLEAN fs = _TRUE, ls = _FALSE; + u8 FWHeaderSize = 64, PageSize = 128 ; + u16 RsvdPageNum = 0; + u32 dmem_pkt_size = 0, iram_pkt_size = 0 ,MaxRsvdPageBufSize = 0; + u32 last_block_size = 0, filesize_ram_block = 0, pkt_offset = 0; + u32 txpktbuf_bndy = 0; + u32 BeaconHeaderInTxPacketBuf = 0, MEMOffsetInTxPacketBuf = 0; + + //Set REG_CR bit 8. DMA beacon by SW. + u1bTmp = rtw_read8(Adapter, REG_CR_8814A+1); + rtw_write8(Adapter, REG_CR_8814A+1, (u1bTmp|BIT0)); + /*RTW_INFO("%s-%d: enable SW BCN, REG_CR=0x%x\n", __func__, __LINE__, rtw_read32(Adapter, REG_CR));*/ + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. + SetBcnCtrlReg(Adapter, 0, BIT3); + SetBcnCtrlReg(Adapter, BIT4, 0); + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + tmpReg422 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL_8814A+2); + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422&(~BIT6)); + + if(tmpReg422&BIT6) + { + RTW_INFO("HalROMDownloadFWRSVDPage8814A(): There is an Adapter is sending beacon.\n"); + bSendBeacon = _TRUE; + } + + //Set The head page of packet of Bcnq + rtw_hal_get_def_var(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u16*)&txpktbuf_bndy); + rtw_write16(Adapter,REG_FIFOPAGE_CTRL_2_8814A, txpktbuf_bndy); + + /* RTW_INFO("HalROMDownloadFWRSVDPage8814A: txpktbuf_bndy=%d\n", txpktbuf_bndy); */ + + // Clear beacon valid check bit. + BcnValidReg = rtw_read8(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1); + rtw_write8(Adapter, REG_FIFOPAGE_CTRL_2_8814A+1, (BcnValidReg|BIT7)); + + // Return Beacon TCB. + //ReturnBeaconQueueTcb_8814A(Adapter); + + dmem_pkt_size = (u32)GET_FIRMWARE_HDR_TOTAL_DMEM_SZ_3081(pbuffer); + iram_pkt_size = (u32)GET_FIRMWARE_HDR_IRAM_SZ_3081(pbuffer); + dmem_pkt_size += (u32)FW_CHKSUM_DUMMY_SZ; + iram_pkt_size += (u32)FW_CHKSUM_DUMMY_SZ; + + if(dmem_pkt_size + iram_pkt_size + FWHeaderSize != Len) + { + RTW_INFO("ERROR: Fw Hdr size do not match the real fw size!!\n"); + RTW_INFO("dmem_pkt_size = %d, iram_pkt_size = %d,FWHeaderSize = %d, Len = %d!!\n",dmem_pkt_size,iram_pkt_size,FWHeaderSize,Len); + return; + } + RTW_INFO("dmem_pkt_size = %d, iram_pkt_size = %d,FWHeaderSize = %d, Len = %d!!\n",dmem_pkt_size,iram_pkt_size,FWHeaderSize,Len); + + // download rsvd page. + //RsvdPageNum = GetTxBufferRsvdPageNum8814A(Adapter, _FALSE); +#ifdef CONFIG_BCN_IC + /* TODO: check tx buffer and DMA size */ + MaxRsvdPageBufSize = MAX_CMDBUF_SZ-TXDESC_OFFSET; +#else + MaxRsvdPageBufSize = MAX_XMIT_EXTBUF_SZ-TXDESC_OFFSET;//RsvdPageNum*PageSize - 40 -16 /*modified for usb*/;//TX_INFO_SIZE_8814AE; +#endif + RTW_INFO("MaxRsvdPageBufSize %d, Total len %d\n",MaxRsvdPageBufSize,Len); + + BeaconHeaderInTxPacketBuf = txpktbuf_bndy * PageSize; + MEMOffsetInTxPacketBuf = OCPBASE_TXBUF_3081 + BeaconHeaderInTxPacketBuf + 40;//TX_INFO_SIZE_8814AE; + //download DMEM + while(dmem_pkt_size > 0) + { + if(dmem_pkt_size > MaxRsvdPageBufSize) + { + filesize_ram_block = MaxRsvdPageBufSize; + ls = _FALSE; + + last_block_size = dmem_pkt_size -MaxRsvdPageBufSize; + if(last_block_size < MaxRsvdPageBufSize) + { + if(((last_block_size + 40) & 0x3F) == 0) // Multiples of 64 + filesize_ram_block -=4; + } + } + else + { + filesize_ram_block = dmem_pkt_size; + ls = _TRUE; + } + fs = (pkt_offset == 0 ? _TRUE: _FALSE); + // Return Beacon TCB. + //ReturnBeaconQueueTcb_8814A(Adapter); + //RTW_INFO("%d packet offset %d dmem_pkt_size %d\n", __LINE__,pkt_offset, dmem_pkt_size); + SetDownLoadFwRsvdPagePkt_8814A(Adapter, pbuffer+FWHeaderSize+pkt_offset, filesize_ram_block); + bDownLoadRSVDPageOK = WaitDownLoadRSVDPageOK_3081(Adapter); + if(!bDownLoadRSVDPageOK) + { + RTW_INFO("ERROR: DMEM bDownLoadRSVDPageOK is false!!\n"); + return; + } + + IDDMADownLoadFW_3081(Adapter,MEMOffsetInTxPacketBuf,OCPBASE_DMEM_3081+pkt_offset,filesize_ram_block,fs,ls); + dmem_pkt_size -= filesize_ram_block; + pkt_offset += filesize_ram_block; + } + + //download IRAM + pkt_offset = 0; + while(iram_pkt_size > 0) + { + if(iram_pkt_size > MaxRsvdPageBufSize) + { + filesize_ram_block = MaxRsvdPageBufSize; + ls = _FALSE; + + last_block_size = iram_pkt_size -MaxRsvdPageBufSize; + if(last_block_size < MaxRsvdPageBufSize) + { + if(((last_block_size + 40) & 0x3F) == 0) // Multiples of 64 + filesize_ram_block -=4; + } + } + else + { + filesize_ram_block = iram_pkt_size; + ls = _TRUE; + } + + fs = (pkt_offset == 0 ? _TRUE: _FALSE); + // Return Beacon TCB. + //ReturnBeaconQueueTcb_8814A(Adapter); + //RTW_INFO("%d packet offset %d iram_pkt_size %d\n", __LINE__,pkt_offset, iram_pkt_size); + SetDownLoadFwRsvdPagePkt_8814A(Adapter, pbuffer+Len-iram_pkt_size, filesize_ram_block); + + bDownLoadRSVDPageOK = WaitDownLoadRSVDPageOK_3081(Adapter); + if(!bDownLoadRSVDPageOK) + { + RTW_INFO("ERROR: IRAM bDownLoadRSVDPageOK is false!!\n"); + return; + } + + IDDMADownLoadFW_3081(Adapter,MEMOffsetInTxPacketBuf,OCPBASE_IMEM_3081+pkt_offset,filesize_ram_block,fs,ls); + + iram_pkt_size -= filesize_ram_block; + pkt_offset += filesize_ram_block; + } + + // Enable Bcn + SetBcnCtrlReg(Adapter, BIT3, 0); + SetBcnCtrlReg(Adapter, 0, BIT4); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if(bSendBeacon) + { + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL_8814A+2, tmpReg422); + } + + // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. + //if(!Adapter->bEnterPnpSleep) + { + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. + u1bTmp = rtw_read8(Adapter, REG_CR_8814A+1); + rtw_write8(Adapter, REG_CR_8814A+1, (u1bTmp&(~BIT0))); + } + + u1bTmp=rtw_read8(Adapter, REG_8051FW_CTRL_8814A); //add by gw for flags to show the fw download ok 20130826 + if( u1bTmp&DMEM_CHKSUM_OK) + { + if(u1bTmp&IMEM_CHKSUM_OK) + { + u1Byte tem; + tem=rtw_read8(Adapter, REG_8051FW_CTRL_8814A+1); + rtw_write8(Adapter, REG_8051FW_CTRL_8814A+1,(tem|BIT6)); + } + } +} + +s32 +_FWFreeToGo8814A( + IN PADAPTER Adapter + ) +{ + u32 counter = 0; + u32 value32; + + // polling CheckSum report + do{ + rtw_mdelay_os(50); + value32 = rtw_read32(Adapter, REG_8051FW_CTRL_8814A); + + } while ((counter++ < 100) && (!(value32 & CPU_DL_READY))); + + if (counter >= 100) { + RTW_ERR("_FWFreeToGo8814A:: FW init fail ! REG_8051FW_CTRL_8814A:0x%08x .\n", value32); + return _FAIL; + } + RTW_INFO("_FWFreeToGo8814A:: FW init ok ! REG_8051FW_CTRL_8814A:0x%08x .\n", value32); + + + return _SUCCESS; +} + + +#ifdef CONFIG_FILE_FWIMG +extern char *rtw_fw_file_path; +u8 FwBuffer8814[FW_SIZE]; +#ifdef CONFIG_MP_INCLUDED +extern char *rtw_fw_mp_bt_file_path; +#endif // CONFIG_MP_INCLUDED +u8 FwBuffer[FW_SIZE]; +#endif //CONFIG_FILE_FWIMG + +s32 +FirmwareDownload8814A( + IN PADAPTER Adapter, + IN BOOLEAN bUsedWoWLANFw +) +{ + s32 rtStatus = _SUCCESS; + u8 write_fw = 0; + u32 fwdl_start_time; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + u8 *pFwImageFileName; + u8 *pucMappedFile = NULL; + PRT_FIRMWARE_8814 pFirmware = NULL; + u8 *pFwHdr = NULL; + u8 *pFirmwareBuf; + u32 FirmwareLen; + + + pFirmware = (PRT_FIRMWARE_8814)rtw_zmalloc(sizeof(RT_FIRMWARE_8814)); + if(!pFirmware) + { + rtStatus = _FAIL; + goto exit; + } + + #ifdef CONFIG_FILE_FWIMG + if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE) + { + RTW_INFO("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path); + pFirmware->eFWSource = FW_SOURCE_IMG_FILE; + } + else + #endif //CONFIG_FILE_FWIMG + { + RTW_INFO("%s fw source from Header\n", __FUNCTION__); + pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; + } + + switch(pFirmware->eFWSource) + { + case FW_SOURCE_IMG_FILE: + #ifdef CONFIG_FILE_FWIMG + rtStatus = rtw_retrieve_from_file(rtw_fw_file_path, FwBuffer8814, FW_SIZE); + pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; + pFirmware->szFwBuffer = FwBuffer8814; + #endif //CONFIG_FILE_FWIMG + break; + case FW_SOURCE_HEADER_FILE: + #ifdef CONFIG_WOWLAN + if (bUsedWoWLANFw) { + pFirmware->szFwBuffer = array_mp_8814a_fw_wowlan; + pFirmware->ulFwLength = array_length_mp_8814a_fw_wowlan; + RTW_INFO("%s fw:%s, size: %d\n", __FUNCTION__, "WoWLAN", pFirmware->ulFwLength); + } else + #endif /* CONFIG_WOWLAN */ + #ifdef CONFIG_BT_COEXIST + if (pHalData->EEPROMBluetoothCoexist == _TRUE) { + pFirmware->szFwBuffer = array_mp_8814a_fw_nic_bt; + pFirmware->ulFwLength = array_length_mp_8814a_fw_nic_bt; + RTW_INFO("%s fw:%s, size: %d\n", __FUNCTION__, "NIC-BTCOEX", pFirmware->ulFwLength); + } else + #endif /* CONFIG_BT_COEXIST */ + { + //ODM_CmnInfoInit(pDM_OutSrc, ODM_CMNINFO_IC_TYPE, ODM_RTL8814A); + pFirmware->szFwBuffer = array_mp_8814a_fw_nic; + pFirmware->ulFwLength = array_length_mp_8814a_fw_nic; + RTW_INFO("%s fw:%s, size: %d\n", __FUNCTION__, "NIC", pFirmware->ulFwLength); + } + break; + } + + if (pFirmware->ulFwLength > FW_SIZE) { + rtStatus = _FAIL; + RTW_ERR("Firmware size:%u exceed %u\n", pFirmware->ulFwLength, FW_SIZE); + goto exit; + } + + pFirmwareBuf = pFirmware->szFwBuffer; + FirmwareLen = pFirmware->ulFwLength; + pFwHdr = (u8 *)pFirmware->szFwBuffer; + + pHalData->firmware_version = (u16)GET_FIRMWARE_HDR_VERSION_3081(pFwHdr); + pHalData->firmware_sub_version = (u16)GET_FIRMWARE_HDR_SUB_VER_3081(pFwHdr); + pHalData->FirmwareSignature = (u16)GET_FIRMWARE_HDR_SIGNATURE_3081(pFwHdr); + + RTW_INFO ("%s: fw_ver=%d fw_subver=%d sig=0x%x\n", + __FUNCTION__, pHalData->firmware_version, pHalData->firmware_sub_version, pHalData->FirmwareSignature); + fwdl_start_time = rtw_get_current_time(); + + _FWDownloadEnable_8814A(Adapter, _TRUE); + + _3081Disable8814A(Adapter);//add by gw 2013026 for disable mcu core + + HalROMDownloadFWRSVDPage8814A(Adapter,pFirmwareBuf,FirmwareLen); + + _3081Enable8814A(Adapter);//add by gw 2013026 for Enable mcu core + + _FWDownloadEnable_8814A(Adapter, _FALSE); + + rtStatus = _FWFreeToGo8814A(Adapter); + if (_SUCCESS != rtStatus) + goto fwdl_stat; + +fwdl_stat: + RTW_INFO("FWDL %s. write_fw:%u, %dms\n" + , (rtStatus == _SUCCESS)?"success":"fail" + , write_fw + , rtw_get_passing_time_ms(fwdl_start_time) + ); + +exit: + if (pFirmware) + rtw_mfree((u8*)pFirmware, sizeof(RT_FIRMWARE_8814)); + +#ifdef CONFIG_WOWLAN + if (adapter_to_pwrctl(Adapter)->wowlan_mode) + InitializeFirmwareVars8814(Adapter); + else + RTW_ERR("%s: wowland_mode:%d wowlan_wake_reason:%d\n", + __func__, adapter_to_pwrctl(Adapter)->wowlan_mode, + adapter_to_pwrctl(Adapter)->wowlan_wake_reason); +#endif + + return rtStatus; +} + + + +void InitializeFirmwareVars8814(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); + + // Init Fw LPS related. + pwrpriv->bFwCurrentInPSMode = _FALSE; + + /* Init H2C cmd.*/ + rtw_write8(padapter, REG_HMETFR_8814A, 0x0f); + + // Init H2C counter. by tynli. 2009.12.09. + pHalData->LastHMEBoxNum = 0; +} + +/* +// +// Description: Determine the contents of H2C BT_FW_PATCH Command sent to FW. +// 2013.01.23 by tynli +// Porting from 8723B. 2013.04.01 +// +VOID +SetFwBTFwPatchCmd( + IN PADAPTER Adapter, + IN u16 FwSize + ) +{ + u8 u1BTFwPatchParm[6]={0}; + + RTW_INFO("SetFwBTFwPatchCmd_8821(): FwSize = %d\n", FwSize); + + //SET_8812_H2CCMD_BT_FW_PATCH_ENABLE(u1BTFwPatchParm, 1); + SET_H2CCMD_BT_FW_PATCH_SIZE(u1BTFwPatchParm, FwSize); + SET_H2CCMD_BT_FW_PATCH_ADDR0(u1BTFwPatchParm, 0); + SET_H2CCMD_BT_FW_PATCH_ADDR1(u1BTFwPatchParm, 0xa0); + SET_H2CCMD_BT_FW_PATCH_ADDR2(u1BTFwPatchParm, 0x10); + SET_H2CCMD_BT_FW_PATCH_ADDR3(u1BTFwPatchParm, 0x80); + + FillH2CCmd_8812(Adapter, H2C_BT_FW_PATCH, 6 , u1BTFwPatchParm); +} + + +int _CheckWLANFwPatchBTFwReady_8821A( PADAPTER Adapter ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 count=0; + u8 u1bTmp; + int ret = _FAIL; + +#if (DEV_BUS_TYPE == RT_SDIO_INTERFACE) + u32 txpktbuf_bndy; +#endif + + //--------------------------------------------------------- + // Check if BT FW patch procedure is ready. + //--------------------------------------------------------- + do{ + u1bTmp = rtw_read8(Adapter, REG_FW_DRV_MSG_8812); + if((u1bTmp&BIT6) || (u1bTmp&BIT7)) + { + ret = _SUCCESS; + break; + } + count++; + RT_TRACE(_module_mp_, _drv_info_,("0x81=%x, wait for 50 ms (%d) times.\n", + u1bTmp, count)); + rtw_msleep_os(50); // 50ms + }while(!((u1bTmp&BIT6) || (u1bTmp&BIT7)) && count < 50); + + RT_TRACE(_module_mp_, _drv_notice_,("_CheckWLANFwPatchBTFwReady():" + " Polling ready bit 0x88[6:7] for %d times.\n", count)); + + if(count >= 50) + { + RTW_INFO("_CheckWLANFwPatchBTFwReady():" + " Polling ready bit 0x88[6:7] FAIL!!\n"); + } + + //--------------------------------------------------------- + // Reset beacon setting to the initial value. + //--------------------------------------------------------- +#if (DEV_BUS_TYPE == RT_SDIO_INTERFACE) +#if 0 + if(!Adapter->MgntInfo.bWiFiConfg) + { + txpktbuf_bndy = TX_PAGE_BOUNDARY_8821; + } + else +#endif + {// for WMM + txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8821; + } + + ret = InitLLTTable8812A(Adapter, txpktbuf_bndy); + if(_SUCCESS != ret){ + RTW_INFO("_CheckWLANFwPatchBTFwReady_8821A(): Failed to init LLT!\n"); + } + + // Init Tx boundary. + rtw_write8(Adapter, REG_TDECTRL+1, (u8)txpktbuf_bndy); +#endif + + SetBcnCtrlReg(Adapter, BIT3, 0); + SetBcnCtrlReg(Adapter, 0, BIT4); + + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); + pHalData->RegFwHwTxQCtrl |= BIT6; + + u1bTmp = rtw_read8(Adapter, REG_CR+1); + rtw_write8(Adapter, REG_CR+1, (u1bTmp&(~BIT0))); + + return ret; +} + + +int _WriteBTFWtoTxPktBuf8812( + PADAPTER Adapter, + PVOID buffer, + u32 FwBufLen, + u8 times + ) +{ + int rtStatus = _SUCCESS; + //u32 value32; + //u8 numHQ, numLQ, numPubQ;//, txpktbuf_bndy; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u8 BcnValidReg; + u8 count=0, DLBcnCount=0; + u8* FwbufferPtr = (u8*)buffer; + //PRT_TCB pTcb, ptempTcb; + //PRT_TX_LOCAL_BUFFER pBuf; + BOOLEAN bRecover=_FALSE; + u8* ReservedPagePacket = NULL; + u8* pGenBufReservedPagePacket = NULL; + u32 TotalPktLen,txpktbuf_bndy; + //u8 tmpReg422; + //u8 u1bTmp; + u8 *pframe; + struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); + struct xmit_frame *pmgntframe; + struct pkt_attrib *pattrib; + u8 txdesc_offset = TXDESC_OFFSET; + u8 val8; + +#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + TotalPktLen = FwBufLen; +#else + TotalPktLen = FwBufLen+pHalData->HWDescHeadLength; +#endif + if((TotalPktLen+TXDESC_OFFSET) > MAX_CMDBUF_SZ) + { + RTW_INFO(" WARNING %s => Total packet len = %d over MAX_CMDBUF_SZ:%d \n" + ,__FUNCTION__,(TotalPktLen+TXDESC_OFFSET),MAX_CMDBUF_SZ); + return _FAIL; + } + pGenBufReservedPagePacket = rtw_zmalloc(TotalPktLen);//GetGenTempBuffer (Adapter, TotalPktLen); + if (!pGenBufReservedPagePacket) + return _FAIL; + + ReservedPagePacket = (u8 *)pGenBufReservedPagePacket; + + _rtw_memset(ReservedPagePacket, 0, TotalPktLen); + +#if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + _rtw_memcpy(ReservedPagePacket, FwbufferPtr, FwBufLen); + +#else + PlatformMoveMemory(ReservedPagePacket+Adapter->HWDescHeadLength , FwbufferPtr, FwBufLen); +#endif + + //--------------------------------------------------------- + // 1. Pause BCN + //--------------------------------------------------------- + //Set REG_CR bit 8. DMA beacon by SW. +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + u1bTmp = rtw_read8(Adapter, REG_CR+1); + rtw_write8(Adapter, REG_CR+1, (u1bTmp|BIT0)); +#else + // Remove for temparaily because of the code on v2002 is not sync to MERGE_TMEP for USB/SDIO. + // De not remove this part on MERGE_TEMP. by tynli. + //pHalData->RegCR_1 |= (BIT0); + //rtw_write8(Adapter, REG_CR+1, pHalData->RegCR_1); +#endif + + // Disable Hw protection for a time which revserd for Hw sending beacon. + // Fix download reserved page packet fail that access collision with the protection time. + // 2010.05.11. Added by tynli. + val8 = rtw_read8(Adapter, REG_BCN_CTRL); + val8 &= ~BIT(3); + val8 |= BIT(4); + rtw_write8(Adapter, REG_BCN_CTRL, val8); + +#if 0//(DEV_BUS_TYPE == RT_PCI_INTERFACE) + tmpReg422 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); + if( tmpReg422&BIT6) + bRecover = _TRUE; + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, tmpReg422&(~BIT6)); +#else + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + if(pHalData->RegFwHwTxQCtrl & BIT(6)) + bRecover=_TRUE; + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT(6)))); + pHalData->RegFwHwTxQCtrl &= (~ BIT(6)); +#endif + + //--------------------------------------------------------- + // 2. Adjust LLT table to an even boundary. + //--------------------------------------------------------- +#if 0//(DEV_BUS_TYPE == RT_SDIO_INTERFACE) + txpktbuf_bndy = 10; // rsvd page start address should be an even value. + rtStatus = InitLLTTable8723BS(Adapter, txpktbuf_bndy); + if(_SUCCESS != rtStatus){ + RTW_INFO("_CheckWLANFwPatchBTFwReady_8723B(): Failed to init LLT!\n"); + return _FAIL; + } + + // Init Tx boundary. + rtw_write8(Adapter, REG_DWBCN0_CTRL_8723B+1, (u8)txpktbuf_bndy); +#endif + + + //--------------------------------------------------------- + // 3. Write Fw to Tx packet buffer by reseverd page. + //--------------------------------------------------------- + do + { + // download rsvd page. + // Clear beacon valid check bit. + BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); + rtw_write8(Adapter, REG_TDECTRL+2, BcnValidReg&(~BIT(0))); + + //BT patch is big, we should set 0x209 < 0x40 suggested from Gimmy + RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n", + rtw_read8(Adapter, REG_TDECTRL+1)));//209 < 0x40 + + rtw_write8(Adapter, REG_TDECTRL+1, (0x90-0x20*(times-1))); + RTW_INFO("0x209:0x%x\n", rtw_read8(Adapter, REG_TDECTRL+1)); + RT_TRACE(_module_mp_, _drv_info_,("0x209:%x\n", + rtw_read8(Adapter, REG_TDECTRL+1))); + +#if 0 + // Acquice TX spin lock before GetFwBuf and send the packet to prevent system deadlock. + // Advertised by Roger. Added by tynli. 2010.02.22. + PlatformAcquireSpinLock(Adapter, RT_TX_SPINLOCK); + if(MgntGetFWBuffer(Adapter, &pTcb, &pBuf)) + { + PlatformMoveMemory(pBuf->Buffer.VirtualAddress, ReservedPagePacket, TotalPktLen); + CmdSendPacket(Adapter, pTcb, pBuf, TotalPktLen, DESC_PACKET_TYPE_NORMAL, _FALSE); + } + else + dbgdump("SetFwRsvdPagePkt(): MgntGetFWBuffer FAIL!!!!!!!!.\n"); + PlatformReleaseSpinLock(Adapter, RT_TX_SPINLOCK); +#else + //--------------------------------------------------------- + //tx reserved_page_packet + //---------------------------------------------------------- + if ((pmgntframe = rtw_alloc_cmdxmitframe(pxmitpriv)) == NULL) { + rtStatus = _FAIL; + goto exit; + } + //update attribute + pattrib = &pmgntframe->attrib; + update_mgntframe_attrib(Adapter, pattrib); + + pattrib->qsel = QSLT_BEACON; + pattrib->pktlen = pattrib->last_txcmdsz = FwBufLen ; + + //_rtw_memset(pmgntframe->buf_addr, 0, TotalPktLen+txdesc_size); + //pmgntframe->buf_addr = ReservedPagePacket ; + + _rtw_memcpy( (u8*) (pmgntframe->buf_addr + txdesc_offset), ReservedPagePacket, FwBufLen); + RTW_INFO("[%d]===>TotalPktLen + TXDESC_OFFSET TotalPacketLen:%d \n", DLBcnCount, (FwBufLen + txdesc_offset)); + +#ifdef CONFIG_PCI_HCI + dump_mgntframe(Adapter, pmgntframe); +#else + dump_mgntframe_and_wait(Adapter, pmgntframe, 100); +#endif + +#endif +#if 1 + // check rsvd page download OK. + BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); + while(!(BcnValidReg & BIT(0)) && count <200) + { + count++; + //PlatformSleepUs(10); + rtw_msleep_os(1); + BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); + RT_TRACE(_module_mp_, _drv_notice_,("Poll 0x20A = %x\n", BcnValidReg)); + } + DLBcnCount++; + //RTW_INFO("##0x208:%08x,0x210=%08x\n",rtw_read32(Adapter, REG_TDECTRL),rtw_read32(Adapter, 0x210)); + + rtw_write8(Adapter, REG_TDECTRL+2,BcnValidReg); + + }while((!(BcnValidReg&BIT(0))) && DLBcnCount<5); + + +#endif + if(DLBcnCount >=5){ + RTW_INFO(" check rsvd page download OK DLBcnCount =%d \n",DLBcnCount); + rtStatus = _FAIL; + goto exit; + } + + if(!(BcnValidReg&BIT(0))) + { + RTW_INFO("_WriteFWtoTxPktBuf(): 1 Download RSVD page failed!\n"); + rtStatus = _FAIL; + goto exit; + } + + //--------------------------------------------------------- + // 4. Set Tx boundary to the initial value + //--------------------------------------------------------- + + + //--------------------------------------------------------- + // 5. Reset beacon setting to the initial value. + // After _CheckWLANFwPatchBTFwReady(). + //--------------------------------------------------------- + +exit: + + if(pGenBufReservedPagePacket) + { + RTW_INFO("_WriteBTFWtoTxPktBuf8723B => rtw_mfree pGenBufReservedPagePacket!\n"); + rtw_mfree((u8*)pGenBufReservedPagePacket, TotalPktLen); + } + return rtStatus; +} + +int ReservedPage_Compare(PADAPTER Adapter,PRT_MP_FIRMWARE pFirmware,u32 BTPatchSize) +{ + u8 temp,ret,lastBTsz; + u32 u1bTmp=0,address_start=0,count=0,i=0; + u8 *myBTFwBuffer = NULL; + + myBTFwBuffer = rtw_zmalloc(BTPatchSize); + if (myBTFwBuffer == NULL) + { + RTW_INFO("%s can't be executed due to the failed malloc.\n", __FUNCTION__); + Adapter->mppriv.bTxBufCkFail=_TRUE; + return _FALSE; + } + + temp=rtw_read8(Adapter,0x209); + + address_start=(temp*128)/8; + + rtw_write32(Adapter,0x140,0x00000000); + rtw_write32(Adapter,0x144,0x00000000); + rtw_write32(Adapter,0x148,0x00000000); + + rtw_write8(Adapter,0x106,0x69); + + + for(i=0;i<(BTPatchSize/8);i++) + { + rtw_write32(Adapter,0x140,address_start+5+i) ; + + //polling until reg 0x140[23]=1; + do{ + u1bTmp = rtw_read32(Adapter, 0x140); + if(u1bTmp&BIT(23)) + { + ret = _SUCCESS; + break; + } + count++; + RTW_INFO("0x140=%x, wait for 10 ms (%d) times.\n",u1bTmp, count); + rtw_msleep_os(10); // 10ms + }while(!(u1bTmp&BIT(23)) && count < 50); + + myBTFwBuffer[i*8+0]=rtw_read8(Adapter, 0x144); + myBTFwBuffer[i*8+1]=rtw_read8(Adapter, 0x145); + myBTFwBuffer[i*8+2]=rtw_read8(Adapter, 0x146); + myBTFwBuffer[i*8+3]=rtw_read8(Adapter, 0x147); + myBTFwBuffer[i*8+4]=rtw_read8(Adapter, 0x148); + myBTFwBuffer[i*8+5]=rtw_read8(Adapter, 0x149); + myBTFwBuffer[i*8+6]=rtw_read8(Adapter, 0x14a); + myBTFwBuffer[i*8+7]=rtw_read8(Adapter, 0x14b); + } + + rtw_write32(Adapter,0x140,address_start+5+BTPatchSize/8) ; + + lastBTsz=BTPatchSize%8; + + //polling until reg 0x140[23]=1; + u1bTmp=0; + count=0; + do{ + u1bTmp = rtw_read32(Adapter, 0x140); + if(u1bTmp&BIT(23)) + { + ret = _SUCCESS; + break; + } + count++; + RTW_INFO("0x140=%x, wait for 10 ms (%d) times.\n",u1bTmp, count); + rtw_msleep_os(10); // 10ms + }while(!(u1bTmp&BIT(23)) && count < 50); + + for(i=0;iszFwBuffer[i]) + { + RTW_INFO(" In direct myBTFwBuffer[%d]=%x , pFirmware->szFwBuffer=%x\n",i, myBTFwBuffer[i],pFirmware->szFwBuffer[i]); + Adapter->mppriv.bTxBufCkFail=_TRUE; + break; + } + } + + if (myBTFwBuffer != NULL) + { + rtw_mfree(myBTFwBuffer, BTPatchSize); + } + + return _TRUE; +} + +#ifdef CONFIG_RTL8821A +s32 FirmwareDownloadBT(PADAPTER padapter, PRT_MP_FIRMWARE pFirmware) +{ + s32 rtStatus; + u8 *pBTFirmwareBuf; + u32 BTFirmwareLen; + u8 download_time; + s8 i; + + + rtStatus = _SUCCESS; + pBTFirmwareBuf = NULL; + BTFirmwareLen = 0; + + // + // Patch BT Fw. Download BT RAM code to Tx packet buffer. + // + if (padapter->bBTFWReady) { + RTW_INFO("%s: BT Firmware is ready!!\n", __FUNCTION__); + return _FAIL; + } + +#ifdef CONFIG_FILE_FWIMG + if (rtw_is_file_readable(rtw_fw_mp_bt_file_path) == _TRUE) + { + RTW_INFO("%s: accquire MP BT FW from file:%s\n", __FUNCTION__, rtw_fw_mp_bt_file_path); + + rtStatus = rtw_retrieve_from_file(rtw_fw_mp_bt_file_path, FwBuffer, 0x8000); + BTFirmwareLen = rtStatus>=0?rtStatus:0; + pBTFirmwareBuf = FwBuffer; + } + else +#endif // CONFIG_FILE_FWIMG + { +#ifdef CONFIG_EMBEDDED_FWIMG + RTW_INFO("%s: Download MP BT FW from header\n", __FUNCTION__); + + pBTFirmwareBuf = (u8*)Rtl8821A_BT_MP_Patch_FW; + BTFirmwareLen = Rtl8812BFwBTImgArrayLength; + pFirmware->szFwBuffer = pBTFirmwareBuf; + pFirmware->ulFwLength = BTFirmwareLen; +#endif // CONFIG_EMBEDDED_FWIMG + } + + RTW_INFO("%s: MP BT Firmware size=%d\n", __FUNCTION__, BTFirmwareLen); + + // for h2c cam here should be set to true + padapter->bFWReady = _TRUE; + + download_time = (BTFirmwareLen + 4095) / 4096; + RTW_INFO("%s: download_time is %d\n", __FUNCTION__, download_time); + + // Download BT patch Fw. + for (i = (download_time-1); i >= 0; i--) + { + if (i == (download_time - 1)) + { + rtStatus = _WriteBTFWtoTxPktBuf8812(padapter, pBTFirmwareBuf+(4096*i), (BTFirmwareLen-(4096*i)), 1); + RTW_INFO("%s: start %d, len %d, time 1\n", __FUNCTION__, 4096*i, BTFirmwareLen-(4096*i)); + } + else + { + rtStatus = _WriteBTFWtoTxPktBuf8812(padapter, pBTFirmwareBuf+(4096*i), 4096, (download_time-i)); + RTW_INFO("%s: start %d, len 4096, time %d\n", __FUNCTION__, 4096*i, download_time-i); + } + + if (rtStatus != _SUCCESS) + { + RTW_INFO("%s: BT Firmware download to Tx packet buffer fail!\n", __FUNCTION__); + padapter->bBTFWReady = _FALSE; + return rtStatus; + } + } + + ReservedPage_Compare(padapter,pFirmware,BTFirmwareLen); + + padapter->bBTFWReady = _TRUE; + SetFwBTFwPatchCmd_8821(padapter, (u16)BTFirmwareLen); + rtStatus = _CheckWLANFwPatchBTFwReady_8821A(padapter); + + RTW_INFO("<===%s: return %s!\n", __FUNCTION__, rtStatus==_SUCCESS?"SUCCESS":"FAIL"); + return rtStatus; +} +#endif //CONFIG_RTL8821A*/ + +#ifdef CONFIG_WOWLAN +//=========================================== +// +// Description: Prepare some information to Fw for WoWLAN. +// (1) Download wowlan Fw. +// (2) Download RSVD page packets. +// (3) Enable AP offload if needed. +// +// 2011.04.12 by tynli. +// +VOID +SetFwRelatedForWoWLAN8812( + IN PADAPTER padapter, + IN u8 bHostIsGoingtoSleep +) +{ + int status=_FAIL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 bRecover = _FALSE; + // + // 1. Before WoWLAN we need to re-download WoWLAN Fw. + // + status = FirmwareDownload8812(padapter, bHostIsGoingtoSleep); + if(status != _SUCCESS) { + RTW_INFO("SetFwRelatedForWoWLAN8812(): Re-Download Firmware failed!!\n"); + return; + } else { + RTW_INFO("SetFwRelatedForWoWLAN8812(): Re-Download Firmware Success !!\n"); + } + // + // 2. Re-Init the variables about Fw related setting. + // + InitializeFirmwareVars8812(padapter); +} +#endif //CONFIG_WOWLAN + +//=========================================================== +// Efuse related code +//=========================================================== +BOOLEAN +hal_GetChnlGroup8814A( + IN u8 Channel, + OUT u8* pGroup + ) +{ + BOOLEAN bIn24G=_TRUE; + + if(Channel <= 14) + { + bIn24G=_TRUE; + + if (1 <= Channel && Channel <= 2 ) *pGroup = 0; + else if (3 <= Channel && Channel <= 5 ) *pGroup = 1; + else if (6 <= Channel && Channel <= 8 ) *pGroup = 2; + else if (9 <= Channel && Channel <= 11) *pGroup = 3; + else if (12 <= Channel && Channel <= 14) *pGroup = 4; + else + { + RT_DISP(FPHY, PHY_TXPWR_EFUSE, ("==>hal_GetChnlGroupJaguar in 2.4 G, but Channel %d in Group not found \n", Channel)); + } + } + else + { + bIn24G=_FALSE; + + if (36 <= Channel && Channel <= 42) *pGroup = 0; // 36 38 40 + else if (44 <= Channel && Channel <= 48) *pGroup = 1; // 44 46 48 + else if (50 <= Channel && Channel <= 58) *pGroup = 2; // 52 54 56 + else if (60 <= Channel && Channel <= 64) *pGroup = 3; // 60 62 64 + else if (100 <= Channel && Channel <= 106) *pGroup = 4; // 100 102 104 + else if (108 <= Channel && Channel <= 114) *pGroup = 5; // 108 110 112 + else if (116 <= Channel && Channel <= 122) *pGroup = 6; // 116 118 120 + else if (124 <= Channel && Channel <= 130) *pGroup = 7; // 124 126 128 + else if (132 <= Channel && Channel <= 138) *pGroup = 8; // 132 134 136 + else if (140 <= Channel && Channel <= 144) *pGroup = 9; // 140 142 144 + else if (149 <= Channel && Channel <= 155) *pGroup = 10; // 149 151 153 + else if (157 <= Channel && Channel <= 161) *pGroup = 11; // 157 159 161 + else if (165 <= Channel && Channel <= 171) *pGroup = 12; // 165 167 169 + else if (173 <= Channel && Channel <= 177) *pGroup = 13; // 173 175 177 + else + { + RT_DISP(FPHY, PHY_TXPWR_EFUSE, ("==>hal_GetChnlGroupJaguar in 5G, but Channel %d in Group not found \n",Channel)); + } + + } + + return bIn24G; +} + +#if 0 +static void +hal_ReadPowerValueFromPROM8814A( + IN PADAPTER Adapter, + IN PTxPowerInfo24G pwrInfo24G, + IN PTxPowerInfo5G pwrInfo5G, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 rfPath, eeAddr=EEPROM_TX_PWR_INX_8814, group,TxCount=0; + + _rtw_memset(pwrInfo24G, 0, sizeof(TxPowerInfo24G)); + _rtw_memset(pwrInfo5G, 0, sizeof(TxPowerInfo5G)); + + /* RTW_INFO("hal_ReadPowerValueFromPROM8814A(): PROMContent[0x%x]=0x%x\n", (eeAddr+1), PROMContent[eeAddr+1]); */ + if(0xFF == PROMContent[eeAddr+1]) //YJ,add,120316 + AutoLoadFail = _TRUE; + + if(AutoLoadFail) + { + RTW_INFO("hal_ReadPowerValueFromPROM8814A(): Use Default value!\n"); + for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) + { + // 2.4G default value + for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) + { + pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; + pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; + } + for(TxCount=0;TxCountBW20_Diff[rfPath][0] = EEPROM_DEFAULT_24G_HT20_DIFF; + pwrInfo24G->OFDM_Diff[rfPath][0] = EEPROM_DEFAULT_24G_OFDM_DIFF; + } + else + { + pwrInfo24G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo24G->BW40_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo24G->CCK_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + } + } + + // 5G default value + for(group = 0 ; group < MAX_CHNL_GROUP_5G; group++) + { + pwrInfo5G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_5G_INDEX; + } + + for(TxCount=0;TxCountOFDM_Diff[rfPath][0] = EEPROM_DEFAULT_5G_OFDM_DIFF; + pwrInfo5G->BW20_Diff[rfPath][0] = EEPROM_DEFAULT_5G_HT20_DIFF; + pwrInfo5G->BW80_Diff[rfPath][0] = EEPROM_DEFAULT_DIFF; + pwrInfo5G->BW160_Diff[rfPath][0] = EEPROM_DEFAULT_DIFF; + } + else + { + pwrInfo5G->OFDM_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo5G->BW20_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + pwrInfo5G->BW40_Diff[rfPath][TxCount]= EEPROM_DEFAULT_DIFF; + pwrInfo5G->BW80_Diff[rfPath][TxCount]= EEPROM_DEFAULT_DIFF; + pwrInfo5G->BW160_Diff[rfPath][TxCount] = EEPROM_DEFAULT_DIFF; + + } + } + + } + + //pHalData->bNOPG = _TRUE; + return; + } + + for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) + { + // 2.4G default value + for(group = 0 ; group < MAX_CHNL_GROUP_24G; group++) + { + pwrInfo24G->IndexCCK_Base[rfPath][group] = PROMContent[eeAddr++]; + if(pwrInfo24G->IndexCCK_Base[rfPath][group] == 0xFF) + { + pwrInfo24G->IndexCCK_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; + } + /* RTW_INFO("8814-2G RF-%d-G-%d CCK-Addr-%x BASE=%x\n", + rfPath, group, eeAddr-1, pwrInfo24G->IndexCCK_Base[rfPath][group]); */ + } + for(group = 0 ; group < MAX_CHNL_GROUP_24G-1; group++) + { + pwrInfo24G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; + if(pwrInfo24G->IndexBW40_Base[rfPath][group] == 0xFF) + pwrInfo24G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_24G_INDEX; + /* RTW_INFO("8814-2G RF-%d-G-%d BW40-Addr-%x BASE=%x\n", + rfPath, group, eeAddr-1, pwrInfo24G->IndexBW40_Base[rfPath][group]); */ + } + for(TxCount=0;TxCountBW40_Diff[rfPath][TxCount] = 0; + + { + pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-2G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo24G->BW20_Diff[rfPath][TxCount]); */ + + { + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-2G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo24G->OFDM_Diff[rfPath][TxCount]); */ + + pwrInfo24G->CCK_Diff[rfPath][TxCount] = 0; + eeAddr++; + } + else + { + + { + pwrInfo24G->BW40_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo24G->BW40_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo24G->BW40_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-2G RF-%d-SS-%d BW40-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo24G->BW40_Diff[rfPath][TxCount]); */ + + + { + pwrInfo24G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo24G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo24G->BW20_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-2G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo24G->BW20_Diff[rfPath][TxCount]); */ + + eeAddr++; + + + { + pwrInfo24G->OFDM_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo24G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo24G->OFDM_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-2G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo24G->BW20_Diff[rfPath][TxCount]); */ + + + { + pwrInfo24G->CCK_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo24G->CCK_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo24G->CCK_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-2G RF-%d-SS-%d CCK-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo24G->CCK_Diff[rfPath][TxCount]); */ + + eeAddr++; + } + } + + //5G default value + for(group = 0 ; group < MAX_CHNL_GROUP_5G; group++) + { + pwrInfo5G->IndexBW40_Base[rfPath][group] = PROMContent[eeAddr++]; + if(pwrInfo5G->IndexBW40_Base[rfPath][group] == 0xFF) + pwrInfo5G->IndexBW40_Base[rfPath][group] = EEPROM_DEFAULT_DIFF; + + /* RTW_INFO("8814-5G RF-%d-G-%d BW40-Addr-%x BASE=%x\n", + rfPath, TxCount, eeAddr-1, pwrInfo5G->IndexBW40_Base[rfPath][group]); */ + } + + for(TxCount=0;TxCountBW40_Diff[rfPath][TxCount]= 0; + + + { + pwrInfo5G->BW20_Diff[rfPath][0] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo5G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo5G->BW20_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-5G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo5G->BW20_Diff[rfPath][TxCount]); */ + + + { + pwrInfo5G->OFDM_Diff[rfPath][0] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo5G->OFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo5G->OFDM_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][TxCount]); */ + + eeAddr++; + } + else + { + + { + pwrInfo5G->BW40_Diff[rfPath][TxCount]= (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo5G->BW40_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo5G->BW40_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-5G RF-%d-SS-%d BW40-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo5G->BW40_Diff[rfPath][TxCount]); */ + + + { + pwrInfo5G->BW20_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0x0f); + if(pwrInfo5G->BW20_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo5G->BW20_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-5G RF-%d-SS-%d BW20-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo5G->BW20_Diff[rfPath][TxCount]); */ + + eeAddr++; + } + } + + + { + pwrInfo5G->OFDM_Diff[rfPath][1] = (PROMContent[eeAddr]&0xf0)>>4; + pwrInfo5G->OFDM_Diff[rfPath][2] = (PROMContent[eeAddr]&0x0f); + } + /* RTW_INFO("8814-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", + rfPath, 2, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][2]); */ + eeAddr++; + + + pwrInfo5G->OFDM_Diff[rfPath][3] = (PROMContent[eeAddr]&0x0f); + + /* RTW_INFO("8814-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", + rfPath, 3, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][3]); */ + eeAddr++; + + for(TxCount=1;TxCountOFDM_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo5G->OFDM_Diff[rfPath][TxCount] |= 0xF0; + + /* RTW_INFO("8814-5G RF-%d-SS-%d LGOD-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo5G->OFDM_Diff[rfPath][TxCount]); */ + } + + for(TxCount=0;TxCountBW80_Diff[rfPath][TxCount] = (PROMContent[eeAddr]&0xf0)>>4; + if(pwrInfo5G->BW80_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo5G->BW80_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-5G RF-%d-SS-%d BW80-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo5G->BW80_Diff[rfPath][TxCount]); */ + + + { + pwrInfo5G->BW160_Diff[rfPath][TxCount]= (PROMContent[eeAddr]&0x0f); + if(pwrInfo5G->BW160_Diff[rfPath][TxCount] & BIT3) //4bit sign number to 8 bit sign number + pwrInfo5G->BW160_Diff[rfPath][TxCount] |= 0xF0; + } + /* RTW_INFO("8814-5G RF-%d-SS-%d BW160-Addr-%x DIFF=%d\n", + rfPath, TxCount, eeAddr, pwrInfo5G->BW160_Diff[rfPath][TxCount]); */ + eeAddr++; + } + } + +} +#endif + +VOID +HALBT_InitHalVars( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); +#ifdef CONFIG_BT_COEXIST +#if (MP_DRIVER == 1) + pHalData->bt_coexist.bBtExist = 0; +#else + pHalData->bt_coexist.bBtExist = pHalData->EEPROMBluetoothCoexist; +#endif + pHalData->bt_coexist.btTotalAntNum = pHalData->EEPROMBluetoothAntNum; + pHalData->bt_coexist.btChipType = pHalData->EEPROMBluetoothType; +#endif //CONFIG_BT_COEXIST +} + + +VOID +BT_InitHalVars( + IN PADAPTER Adapter + ) +{ + u8 antNum=2, chipType; + BOOLEAN bBtExist=_FALSE; + + // HALBT_InitHalVars() must be called first + HALBT_InitHalVars(Adapter); +#if 0 + // called after HALBT_InitHalVars() + bBtExist = HALBT_GetBtExist(Adapter); + EXhalbtcoutsrc_SetBtExist(bBtExist); + chipType = HALBT_GetBtChipType(Adapter); + EXhalbtcoutsrc_SetChipType(chipType); + antNum = HALBT_GetPgAntNum(Adapter); + EXhalbtcoutsrc_SetAntNum(BT_COEX_ANT_TYPE_PG, antNum); +#endif +} + + +VOID +hal_EfuseParseBTCoexistInfo8814A( + IN PADAPTER Adapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 tempval=0x0; + + if(!AutoLoadFail) + { + tempval = hwinfo[EEPROM_RF_BOARD_OPTION_8814]; + if( ((tempval & 0xe0)>>5) == 0x1)// [7:5] + pHalData->EEPROMBluetoothCoexist = 1; + else + pHalData->EEPROMBluetoothCoexist = 0; + pHalData->EEPROMBluetoothType = BT_RTL8814A; + + tempval = hwinfo[EEPROM_RF_BT_SETTING_8814]; + pHalData->EEPROMBluetoothAntNum = Ant_x1; + } + else + { + pHalData->EEPROMBluetoothCoexist = 0; + pHalData->EEPROMBluetoothType = BT_RTL8814A; + pHalData->EEPROMBluetoothAntNum = Ant_x1; + } + + BT_InitHalVars(Adapter); +} + +VOID +hal_ReadPROMVersion8814A( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(AutoloadFail){ + pHalData->EEPROMVersion = EEPROM_Default_Version; + } + else{ + pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION_8814]; + if(pHalData->EEPROMVersion == 0xFF) + pHalData->EEPROMVersion = EEPROM_Default_Version; + } +} +#if 0 +void +hal_ReadTxPowerInfo8814A( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + TxPowerInfo24G pwrInfo24G; + TxPowerInfo5G pwrInfo5G; + u8 rfPath, ch, group, TxCount; + + hal_ReadPowerValueFromPROM8814A(Adapter, &pwrInfo24G,&pwrInfo5G, PROMContent, AutoLoadFail); + + //if(!AutoLoadFail) + // pHalData->bTXPowerDataReadFromEEPORM = _TRUE; + + for(rfPath = 0 ; rfPath < MAX_RF_PATH ; rfPath++) + { + for (ch = 0 ; ch < CENTER_CH_2G_NUM ; ch++) { + hal_GetChnlGroup8814A(ch+1, &group); + + if(ch == 14-1) + { + pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][5]; + pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; + } + else + { + pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group]; + pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group]; + } + //RTW_INFO("======= Path %d, ChannelIndex %d, Group %d=======\n",rfPath,ch, group); + //RTW_INFO("Index24G_CCK_Base[%d][%d] = 0x%x\n",rfPath,ch ,pHalData->Index24G_CCK_Base[rfPath][ch]); + //RTW_INFO("Index24G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch,pHalData->Index24G_BW40_Base[rfPath][ch]); + } + + for (ch = 0 ; ch < CENTER_CH_5G_ALL_NUM; ch++) { + hal_GetChnlGroup8814A(center_ch_5g_all[ch], &group); + + pHalData->Index5G_BW40_Base[rfPath][ch] = pwrInfo5G.IndexBW40_Base[rfPath][group]; + //RTW_INFO("======= Path %d, ChannelIndex %d, Group %d=======\n",rfPath,ch, group); + //RTW_INFO("Index5G_BW40_Base[%d][%d] = 0x%x\n",rfPath,ch,pHalData->Index5G_BW40_Base[rfPath][ch]); + } + for (ch = 0 ; ch < CENTER_CH_5G_80M_NUM; ch++) { + u8 upper, lower; + + hal_GetChnlGroup8814A(center_ch_5g_80m[ch], &group); + upper = pwrInfo5G.IndexBW40_Base[rfPath][group]; + lower = pwrInfo5G.IndexBW40_Base[rfPath][group+1]; + + pHalData->Index5G_BW80_Base[rfPath][ch] = (upper + lower) / 2; + + //RTW_INFO("======= Path %d, ChannelIndex %d, Group %d=======\n",rfPath,ch, group); + //RTW_INFO("Index5G_BW80_Base[%d][%d] = 0x%x\n",rfPath,ch,pHalData->Index5G_BW80_Base[rfPath][ch]); + } + + for(TxCount=0;TxCountCCK_24G_Diff[rfPath][TxCount]=pwrInfo24G.CCK_Diff[rfPath][TxCount]; + pHalData->OFDM_24G_Diff[rfPath][TxCount]=pwrInfo24G.OFDM_Diff[rfPath][TxCount]; + pHalData->BW20_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW20_Diff[rfPath][TxCount]; + pHalData->BW40_24G_Diff[rfPath][TxCount]=pwrInfo24G.BW40_Diff[rfPath][TxCount]; + + pHalData->OFDM_5G_Diff[rfPath][TxCount]=pwrInfo5G.OFDM_Diff[rfPath][TxCount]; + pHalData->BW20_5G_Diff[rfPath][TxCount]=pwrInfo5G.BW20_Diff[rfPath][TxCount]; + pHalData->BW40_5G_Diff[rfPath][TxCount]=pwrInfo5G.BW40_Diff[rfPath][TxCount]; + pHalData->BW80_5G_Diff[rfPath][TxCount]=pwrInfo5G.BW80_Diff[rfPath][TxCount]; +//#if DBG +#if 0 + RTW_INFO("--------------------------------------- 2.4G ---------------------------------------\n"); + RTW_INFO("CCK_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->CCK_24G_Diff[rfPath][TxCount]); + RTW_INFO("OFDM_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_24G_Diff[rfPath][TxCount]); + RTW_INFO("BW20_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_24G_Diff[rfPath][TxCount]); + RTW_INFO("BW40_24G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_24G_Diff[rfPath][TxCount]); + RTW_INFO("---------------------------------------- 5G ----------------------------------------\n"); + RTW_INFO("OFDM_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->OFDM_5G_Diff[rfPath][TxCount]); + RTW_INFO("BW20_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW20_5G_Diff[rfPath][TxCount]); + RTW_INFO("BW40_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW40_5G_Diff[rfPath][TxCount]); + RTW_INFO("BW80_5G_Diff[%d][%d]= %d\n",rfPath,TxCount,pHalData->BW80_5G_Diff[rfPath][TxCount]); +#endif + } + } + + + // 2010/10/19 MH Add Regulator recognize for CU. + if(!AutoLoadFail) + { + struct registry_priv *registry_par = &Adapter->registrypriv; + + pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_8814]&0x7); //bit0~2 + if(PROMContent[EEPROM_RF_BOARD_OPTION_8814] == 0xFF) + pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION&0x7); //bit0~2 + } + else + { + pHalData->EEPROMRegulatory = 0; + + } + RTW_INFO("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); + +} +#else +void +hal_ReadTxPowerInfo8814A( + IN PADAPTER Adapter, + IN u8 *PROMContent, + IN BOOLEAN AutoLoadFail +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + TxPowerInfo24G pwrInfo24G; + TxPowerInfo5G pwrInfo5G; + + hal_load_txpwr_info(Adapter, &pwrInfo24G, &pwrInfo5G, PROMContent); + + /* 2010/10/19 MH Add Regulator recognize for CU. */ + if (!AutoLoadFail) { + struct registry_priv *registry_par = &Adapter->registrypriv; + + + if (PROMContent[EEPROM_RF_BOARD_OPTION_8814] == 0xFF) + pHalData->EEPROMRegulatory = (EEPROM_DEFAULT_BOARD_OPTION & 0x7); /* bit0~2 */ + else + pHalData->EEPROMRegulatory = (PROMContent[EEPROM_RF_BOARD_OPTION_8814] & 0x7); /* bit0~2 */ + + } else + pHalData->EEPROMRegulatory = 0; + RTW_INFO("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); + +} +#endif + +VOID +hal_ReadBoardType8814A( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(!AutoloadFail) + { + pHalData->InterfaceSel = (PROMContent[EEPROM_RF_BOARD_OPTION_8814]&0xE0)>>5; + if(PROMContent[EEPROM_RF_BOARD_OPTION_8814] == 0xFF) + pHalData->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION&0xE0)>>5; + } + else + { + pHalData->InterfaceSel = 0; + } + RTW_INFO("Board Type: 0x%2x\n", pHalData->InterfaceSel); +} + +VOID +hal_Read_TRX_antenna_8814A( + IN PADAPTER Adapter, + IN u8 *PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 trx_antenna = RF_2T4R; + + if (!AutoloadFail) { + u8 trx_antenna_option = PROMContent[EEPROM_TRX_ANTENNA_OPTION_8814]; + + if (trx_antenna_option == 0xff) { + trx_antenna = RF_4T4R; + RTW_INFO("EEPROM RF set 4T4R\n"); + } else if (trx_antenna_option == 0xee) { + trx_antenna = RF_3T3R; + RTW_INFO("EEPROM RF set 3T3R\n"); + } else if (trx_antenna_option == 0x66) { + trx_antenna = RF_2T2R; + RTW_INFO("EEPROM RF set 2T2R\n"); + } else if (trx_antenna_option == 0x6f) { + trx_antenna = RF_2T4R; + RTW_INFO("EEPROM RF set 2T4R\n"); + } else { + trx_antenna = RF_2T4R; + RTW_INFO("unknown EEPROM RF set, default to 2T4R\n"); + } + } else { + trx_antenna = RF_2T4R; + RTW_INFO("AutoloadFail, default to 2T4R\n"); + } + + /* if driver doesn't set rf_config, use the value of EEPROM */ + if (Adapter->registrypriv.rf_config == RF_TYPE_MAX) { + + if (trx_antenna == RF_4T4R +#ifdef CONFIG_USB_HCI + && IS_SUPER_SPEED_USB(Adapter) +#endif /* CONFIG_USB_HCI */ + ) + Adapter->registrypriv.rf_config = RF_3T3R; + else if (trx_antenna == RF_2T4R) + Adapter->registrypriv.rf_config = RF_2T4R; + else { + Adapter->registrypriv.rf_config = RF_2T4R; + RTW_INFO("default rf type: %d\n", Adapter->registrypriv.rf_config); + } + } else { +#ifdef CONFIG_USB_HCI + if (!IS_SUPER_SPEED_USB(Adapter)) + Adapter->registrypriv.rf_config = RF_2T4R; +#endif /* CONFIG_USB_HCI */ + } + + RTW_INFO("Final rf_config: %d\n", Adapter->registrypriv.rf_config); +} + + +VOID +hal_ReadThermalMeter_8814A( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + pHalData->eeprom_thermal_meter = 0xff; + + if(!AutoloadFail) + pHalData->eeprom_thermal_meter = PROMContent[EEPROM_THERMAL_METER_8814]; + +#if 0 /* ToDo: check with RF */ + else + pHalData->eeprom_thermal_meter = EEPROM_Default_ThermalMeter_8814A; + + if ((pHalData->eeprom_thermal_meter == 0xff) || (_TRUE == AutoloadFail)) { + pHalData->odmpriv.rf_calibrate_info.bAPKThermalMeterIgnore = _TRUE; + pHalData->eeprom_thermal_meter = EEPROM_Default_ThermalMeter_8814A; + } +#endif + + //pHalData->ThermalMeter[0] = pHalData->eeprom_thermal_meter; + RTW_INFO("ThermalMeter = 0x%x\n", pHalData->eeprom_thermal_meter); +} + + +void hal_ReadRemoteWakeup_8814A( + PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); + u8 tmpvalue; + + if(AutoLoadFail){ + pwrctl->bHWPowerdown = _FALSE; + pwrctl->bSupportRemoteWakeup = _FALSE; + } + else + { + // decide hw if support remote wakeup function + // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume +/* todo: wowlan should check the efuse again +#ifdef CONFIG_USB_HCI + if(IS_HARDWARE_TYPE_8821U(padapter)) + pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0_8811AU] & BIT1)?_TRUE :_FALSE; + else + pwrctl->bSupportRemoteWakeup = (hwinfo[EEPROM_USB_OPTIONAL_FUNCTION0] & BIT1)?_TRUE :_FALSE; +#endif //CONFIG_USB_HCI +*/ + RTW_INFO("%s...bSupportRemoteWakeup(%x)\n",__FUNCTION__, pwrctl->bSupportRemoteWakeup); + } +} + +VOID +hal_ReadChannelPlan8814A( + IN PADAPTER padapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + struct rf_ctl_t *rfctl = adapter_to_rfctl(padapter); + hal_com_config_channel_plan( + padapter + , hwinfo ? &hwinfo[EEPROM_COUNTRY_CODE_8814] : NULL + , hwinfo ? hwinfo[EEPROM_ChannelPlan_8814] : 0xFF + , padapter->registrypriv.alpha2 + , padapter->registrypriv.channel_plan + , RTW_CHPLAN_REALTEK_DEFINE + , AutoLoadFail + ); +/* + padapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan( + padapter + , hwinfo?hwinfo[EEPROM_ChannelPlan_8814]:0xFF + , padapter->registrypriv.channel_plan + , RTW_CHPLAN_REALTEK_DEFINE + , AutoLoadFail + ); +*/ + RTW_INFO("rfctl->ChannelPlan = 0x%02x\n", rfctl->ChannelPlan); +} + +void hal_GetRxGainOffset_8814A( + PADAPTER Adapter, + pu1Byte PROMContent, + BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + + pHalData->RxGainOffset[0] = 0; + pHalData->RxGainOffset[1] = 0; + pHalData->RxGainOffset[2] = 0; + pHalData->RxGainOffset[3] = 0; + + if ((pregistrypriv->reg_rxgain_offset_2g != 0 && pregistrypriv->reg_rxgain_offset_5gl != 0) && + (pregistrypriv->reg_rxgain_offset_5gm != 0 && pregistrypriv->reg_rxgain_offset_5gh != 0)) { + pHalData->RxGainOffset[0] = pregistrypriv->reg_rxgain_offset_2g; + pHalData->RxGainOffset[1] = pregistrypriv->reg_rxgain_offset_5gl; + pHalData->RxGainOffset[2] = pregistrypriv->reg_rxgain_offset_5gm; + pHalData->RxGainOffset[3] = pregistrypriv->reg_rxgain_offset_5gh; + RTW_INFO("%s():Use registrypriv 0x%x 0x%x 0x%x 0x%x !!\n", __func__, pregistrypriv->reg_rxgain_offset_2g, pregistrypriv->reg_rxgain_offset_5gl, pregistrypriv->reg_rxgain_offset_5gm, pregistrypriv->reg_rxgain_offset_5gh); + + } else { + RTW_INFO("%s(): AutoloadFail = %d!!\n", __func__, AutoloadFail); + pHalData->RxGainOffset[0] = PROMContent[EEPROM_IG_OFFSET_4_CD_2G_8814A]; + pHalData->RxGainOffset[0] |= (PROMContent[EEPROM_IG_OFFSET_4_AB_2G_8814A]) << 8; + pHalData->RxGainOffset[1] = PROMContent[EEPROM_IG_OFFSET_4_CD_5GL_8814A]; + pHalData->RxGainOffset[1] |= (PROMContent[EEPROM_IG_OFFSET_4_AB_5GL_8814A]) << 8; + pHalData->RxGainOffset[2] = PROMContent[EEPROM_IG_OFFSET_4_CD_5GM_8814A]; + pHalData->RxGainOffset[2] |= (PROMContent[EEPROM_IG_OFFSET_4_AB_5GM_8814A]) << 8; + pHalData->RxGainOffset[3] = PROMContent[EEPROM_IG_OFFSET_4_CD_5GH_8814A]; + pHalData->RxGainOffset[3] |= (PROMContent[EEPROM_IG_OFFSET_4_AB_5GH_8814A]) << 8; + } + RTW_INFO("hal_GetRxGainOffset_8814A(): RegRxGainOffset_2G = 0x%x!!\n", pHalData->RxGainOffset[0]); + RTW_INFO("hal_GetRxGainOffset_8814A(): RegRxGainOffset_5GL = 0x%x!!\n", pHalData->RxGainOffset[1]); + RTW_INFO("hal_GetRxGainOffset_8814A(): RegRxGainOffset_5GM = 0x%x!!\n", pHalData->RxGainOffset[2]); + RTW_INFO("hal_GetRxGainOffset_8814A(): RegRxGainOffset_5GH = 0x%x!!\n", pHalData->RxGainOffset[3]); +} + + +void Hal_EfuseParseKFreeData_8814A( + IN PADAPTER Adapter, + IN u8 *PROMContent, + IN BOOLEAN AutoloadFail) +{ +#ifdef CONFIG_RF_GAIN_OFFSET + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct kfree_data_t *kfree_data = &pHalData->kfree_data; + u8 kfreePhydata[KFREE_GAIN_DATA_LENGTH_8814A]; + u32 i = 0, j = 2, chidx = 0, efuseaddr = 0; + u8 rfpath = 0; + + if (GET_PG_KFREE_ON_8814A(PROMContent) && PROMContent[0xc8] != 0xff) + kfree_data->flag |= KFREE_FLAG_ON; + if (GET_PG_KFREE_THERMAL_K_ON_8814A(PROMContent) && PROMContent[0xc8] != 0xff) + kfree_data->flag |= KFREE_FLAG_THERMAL_K_ON; + + if (Adapter->registrypriv.RegRfKFreeEnable == 1) { + kfree_data->flag |= KFREE_FLAG_ON; + kfree_data->flag |= KFREE_FLAG_THERMAL_K_ON; + } + + _rtw_memset(kfree_data->bb_gain, 0xff, BB_GAIN_NUM * RF_PATH_MAX); + + if (kfree_data->flag & KFREE_FLAG_ON) { + + for (i = 0; i < KFREE_GAIN_DATA_LENGTH_8814A; i++) { + efuseaddr = PPG_BB_GAIN_2G_TXBA_OFFSET_8814A - i; + + if (efuseaddr <= PPG_BB_GAIN_2G_TXBA_OFFSET_8814A) { + kfreePhydata[i] = EFUSE_Read1Byte(Adapter, efuseaddr); + RTW_INFO("%s,kfreePhydata[%d] = %x\n", __func__, i, kfreePhydata[i]); + } + } + kfree_data->bb_gain[0][RF_PATH_A] + = (kfreePhydata[0] & PPG_BB_GAIN_2G_TX_OFFSET_MASK); + kfree_data->bb_gain[0][RF_PATH_B] + = (kfreePhydata[0] & PPG_BB_GAIN_2G_TXB_OFFSET_MASK) >> 4; + kfree_data->bb_gain[0][RF_PATH_C] + = (kfreePhydata[1] & PPG_BB_GAIN_2G_TX_OFFSET_MASK); + kfree_data->bb_gain[0][RF_PATH_D] + = (kfreePhydata[1] & PPG_BB_GAIN_2G_TXB_OFFSET_MASK) >> 4; + + for (chidx = 1; chidx <= BB_GAIN_5GHB; chidx++) { + for (rfpath = RF_PATH_A; rfpath < RF_PATH_MAX; rfpath++) + kfree_data->bb_gain[chidx][rfpath] = kfreePhydata[j + rfpath] & PPG_BB_GAIN_5G_TX_OFFSET_MASK; + + j = j + RF_PATH_MAX; + } + } + + if (kfree_data->flag & KFREE_FLAG_THERMAL_K_ON) + pHalData->eeprom_thermal_meter += kfree_data->thermal; + + RTW_INFO("registrypriv.RegRfKFreeEnable = %d\n", Adapter->registrypriv.RegRfKFreeEnable); + + RTW_INFO("kfree flag:%u\n", kfree_data->flag); + if (Adapter->registrypriv.RegRfKFreeEnable == 1 || kfree_data->flag & KFREE_FLAG_ON) { + for (chidx = 0 ; chidx <= BB_GAIN_5GHB; chidx++) { + for (rfpath = RF_PATH_A; rfpath < RF_PATH_MAX; rfpath++) + RTW_INFO("bb_gain[%d][%d]= %x\n", chidx, rfpath, kfree_data->bb_gain[chidx][rfpath]); + } + } + +#endif /*CONFIG_RF_GAIN_OFFSET */ +} + + +VOID +hal_EfuseParseXtal_8814A( + IN PADAPTER pAdapter, + IN u8* hwinfo, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if(!AutoLoadFail) + { + pHalData->crystal_cap = hwinfo[EEPROM_XTAL_8814]; + if(pHalData->crystal_cap == 0xFF) + pHalData->crystal_cap = EEPROM_Default_CrystalCap_8814; /* what value should 8814 set? */ + } + else + { + pHalData->crystal_cap = EEPROM_Default_CrystalCap_8814; + } + RTW_INFO("crystal_cap: 0x%2x\n", pHalData->crystal_cap); +} + +VOID +hal_ReadAntennaDiversity8814A( + IN PADAPTER pAdapter, + IN u8* PROMContent, + IN BOOLEAN AutoLoadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + pHalData->TRxAntDivType = NO_ANTDIV; + pHalData->AntDivCfg = 0; + + RTW_INFO("SWAS: bHwAntDiv = %x, TRxAntDivType = %x\n", + pHalData->AntDivCfg, pHalData->TRxAntDivType); +} + +VOID +hal_ReadPAType_8814A( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail, + OUT u8* pPAType, + OUT u8* pLNAType + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 LNAType_AB, LNAType_CD; + + if( ! AutoloadFail ) + { + u8 rfe_type = PROMContent[EEPROM_RFE_OPTION_8814]; + + if (GetRegAmplifierType2G(Adapter) == 0) // AUTO + { + *pPAType = EF1Byte( *(u8*)&PROMContent[EEPROM_PA_TYPE_8814] ); + + LNAType_AB = EF1Byte( *(u8*)&PROMContent[EEPROM_LNA_TYPE_AB_2G_8814] ); + LNAType_CD = EF1Byte( *(u8*)&PROMContent[EEPROM_LNA_TYPE_CD_2G_8814] ); + + if (*pPAType == 0xFF && rfe_type == 0xFF) + pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; + else + pHalData->ExternalPA_2G = (*pPAType & BIT4) ? 1 : 0; + + if (LNAType_AB == 0xFF) + pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; + else + pHalData->ExternalLNA_2G = (LNAType_AB & BIT3) ? 1 : 0; + + *pLNAType = (LNAType_AB & BIT3) << 1 | (LNAType_AB & BIT7) >> 2 | + (LNAType_CD & BIT3) << 3 | (LNAType_CD & BIT7); + } + else + { + pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; + pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; + } + + if (GetRegAmplifierType5G(Adapter) == 0) // AUTO + { + LNAType_AB = EF1Byte( *(u8*)&PROMContent[EEPROM_LNA_TYPE_AB_5G_8814] ); + LNAType_CD = EF1Byte( *(u8*)&PROMContent[EEPROM_LNA_TYPE_CD_5G_8814] ); + + if (*pPAType == 0xFF && rfe_type == 0xFF) + pHalData->external_pa_5g = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; + else + pHalData->external_pa_5g = (*pPAType & BIT0) ? 1 : 0; + + if (LNAType_AB == 0xFF) + pHalData->external_lna_5g = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; + else + pHalData->external_lna_5g = (LNAType_AB & BIT3) ? 1 : 0; + + (*pLNAType) |= ((LNAType_AB & BIT3) >> 3 | (LNAType_AB & BIT7) >> 6 | + (LNAType_CD & BIT3) >> 1 | (LNAType_CD & BIT7) >> 4); + } + else + { + pHalData->external_pa_5g = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_PA_5G) ? 1 : 0; + pHalData->external_lna_5g = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_LNA_5G) ? 1 : 0; + } + } + else + { + pHalData->ExternalPA_2G = EEPROM_Default_PAType; + pHalData->external_pa_5g = 0xFF; + pHalData->ExternalLNA_2G = EEPROM_Default_LNAType; + pHalData->external_lna_5g = 0xFF; + + if (GetRegAmplifierType2G(Adapter) == 0) + { + pHalData->ExternalPA_2G = 0; + pHalData->ExternalLNA_2G = 0; + } + else + { + pHalData->ExternalPA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_PA) ? 1 : 0; + pHalData->ExternalLNA_2G = (GetRegAmplifierType2G(Adapter)&ODM_BOARD_EXT_LNA) ? 1 : 0; + } + if (GetRegAmplifierType5G(Adapter) == 0) + { + pHalData->external_pa_5g = 0; + pHalData->external_lna_5g = 0; + } + else + { + pHalData->external_pa_5g = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_PA_5G) ? 1 : 0; + pHalData->external_lna_5g = (GetRegAmplifierType5G(Adapter)&ODM_BOARD_EXT_LNA_5G) ? 1 : 0; + } + } + RTW_INFO("PAType is 0x%x, LNAType is 0x%x\n", *pPAType, *pLNAType); + RTW_INFO("pHalData->ExternalPA_2G = %d, pHalData->external_pa_5g = %d\n", pHalData->ExternalPA_2G, pHalData->external_pa_5g); + RTW_INFO("pHalData->ExternalLNA_2G = %d, pHalData->external_lna_5g = %d\n", pHalData->ExternalLNA_2G, pHalData->external_lna_5g); +} + +VOID hal_ReadAmplifierType_8814A( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + switch(pHalData->rfe_type) + { + case 1: /* 8814AU */ + pHalData->external_pa_5g = pHalData->external_lna_5g = _TRUE; + pHalData->TypeAPA = pHalData->TypeALNA = 0;/* APA and ALNA is 0 */ + break; + case 2: /* socket board 8814AR and 8194AR */ + pHalData->ExternalPA_2G = pHalData->external_pa_5g = _TRUE; + pHalData->ExternalLNA_2G = pHalData->external_lna_5g = _TRUE; + pHalData->TypeAPA = pHalData->TypeALNA = 0x55;/* APA and ALNA is 1 */ + pHalData->TypeGPA = pHalData->TypeGLNA = 0x55;/* GPA and GLNA is 1 */ + break; + case 3: /* high power on-board 8814AR and 8194AR */ + pHalData->ExternalPA_2G = pHalData->external_pa_5g = _TRUE; + pHalData->ExternalLNA_2G = pHalData->external_lna_5g = _TRUE; + pHalData->TypeAPA = pHalData->TypeALNA = 0xaa;/* APA and ALNA is 2 */ + pHalData->TypeGPA = pHalData->TypeGLNA = 0xaa;/* GPA and GLNA is 2 */ + break; + case 4: /* on-board 8814AR and 8194AR */ + pHalData->ExternalPA_2G = pHalData->external_pa_5g = _TRUE; + pHalData->ExternalLNA_2G = pHalData->external_lna_5g = _TRUE; + pHalData->TypeAPA = 0x55;/* APA is 1 */ + pHalData->TypeALNA = 0xff; /* ALNA is 3 */ + pHalData->TypeGPA = pHalData->TypeGLNA = 0x55;/* GPA and GLNA is 1 */ + break; + case 5: + pHalData->ExternalPA_2G = pHalData->external_pa_5g = _TRUE; + pHalData->ExternalLNA_2G = pHalData->external_lna_5g = _TRUE; + pHalData->TypeAPA = 0xaa; /* APA2 */ + pHalData->TypeALNA = 0x5500; /* ALNA4 */ + pHalData->TypeGPA = pHalData->TypeGLNA = 0xaa; /* GPA2,GLNA2 */ + break; + case 6: + pHalData->external_lna_5g = _TRUE; + pHalData->TypeALNA = 0; /* ALNA0 */ + break; + case 0: + default: /* 8814AE */ + break; + } + + RTW_INFO("pHalData->ExternalPA_2G = %d, pHalData->external_pa_5g = %d\n", pHalData->ExternalPA_2G, pHalData->external_pa_5g); + RTW_INFO("pHalData->ExternalLNA_2G = %d, pHalData->external_lna_5g = %d\n", pHalData->ExternalLNA_2G, pHalData->external_lna_5g); + RTW_INFO("pHalData->TypeGPA = 0x%X, pHalData->TypeAPA = 0x%X\n", pHalData->TypeGPA, pHalData->TypeAPA); + RTW_INFO("pHalData->TypeGLNA = 0x%X, pHalData->TypeALNA = 0x%X\n", pHalData->TypeGLNA, pHalData->TypeALNA); +} + + +VOID +hal_ReadRFEType_8814A( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(!AutoloadFail) + { + if ((GetRegRFEType(Adapter) != 64) || 0xFF == PROMContent[EEPROM_RFE_OPTION_8814] || PROMContent[EEPROM_RFE_OPTION_8814] & BIT7) { + if(GetRegRFEType(Adapter) != 64) + pHalData->rfe_type = GetRegRFEType(Adapter); + else if(IS_HARDWARE_TYPE_8814AE(Adapter)) + pHalData->rfe_type = 0; + else if(IS_HARDWARE_TYPE_8814AU(Adapter)) + pHalData->rfe_type = 1; + hal_ReadAmplifierType_8814A(Adapter); + + } else { + /* bit7==0 means RFE type defined by 0xCA[6:0] */ + pHalData->rfe_type = PROMContent[EEPROM_RFE_OPTION_8814] & 0x7F; + hal_ReadAmplifierType_8814A(Adapter); + } + } + else + { + if(GetRegRFEType(Adapter) != 64) + pHalData->rfe_type = GetRegRFEType(Adapter); + else if(IS_HARDWARE_TYPE_8814AE(Adapter)) + pHalData->rfe_type = 0; + else if(IS_HARDWARE_TYPE_8814AU(Adapter)) + pHalData->rfe_type = 1; + + hal_ReadAmplifierType_8814A(Adapter); + } + RTW_INFO("RFE Type: 0x%2x\n", pHalData->rfe_type); +} + +static VOID +hal_EfusePowerSwitch8814A( + IN PADAPTER pAdapter, + IN u8 bWrite, + IN u8 PwrState) +{ + u8 tempval; + u16 tmpV16; + u8 EFUSE_ACCESS_ON_8814A = 0x69; + u8 EFUSE_ACCESS_OFF_8814A = 0x00; + + if (PwrState == _TRUE) + { + rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON_8814A); + + // Reset: 0x0000h[28], default valid + tmpV16 = PlatformEFIORead2Byte(pAdapter,REG_SYS_FUNC_EN); + if( !(tmpV16 & FEN_ELDR) ){ + tmpV16 |= FEN_ELDR ; + rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); + } + + // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid + tmpV16 = PlatformEFIORead2Byte(pAdapter,REG_SYS_CLKR); + if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ) + { + tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; + rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); + } + + if(bWrite == _TRUE) + { + // Enable LDO 2.5V before read/write action + tempval = rtw_read8(pAdapter, EFUSE_TEST+3); + tempval &= 0x0F; + tempval |= (VOLTAGE_V25 << 4); + rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); + } + } + else + { + rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF_8814A); + + if(bWrite == _TRUE){ + // Disable LDO 2.5V after read/write action + tempval = rtw_read8(pAdapter, EFUSE_TEST+3); + rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); + } + } +} + +static VOID +rtl8814_EfusePowerSwitch( + IN PADAPTER pAdapter, + IN u8 bWrite, + IN u8 PwrState) +{ + hal_EfusePowerSwitch8814A(pAdapter, bWrite, PwrState); +} + +static VOID +hal_EfuseReadEFuse8814A( + PADAPTER Adapter, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + IN BOOLEAN bPseudoTest + ) +{ + u8 *efuseTbl = NULL; + u16 eFuse_Addr = 0; + u8 offset=0, wden=0; + u16 i, j; + u16 **eFuseWord = NULL; + u16 efuse_utilized = 0; + u8 efuse_usage = 0; + u8 offset_2_0=0; + u8 efuseHeader=0, efuseExtHdr=0, efuseData=0; + + // + // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. + // + if((_offset + _size_byte)>EFUSE_MAP_LEN_8814A) + {// total E-Fuse table is 512bytes + RTW_INFO("Hal_EfuseReadEFuse8814A(): Invalid offset(%#x) with read bytes(%#x)!!\n", _offset, _size_byte); + goto exit; + } + + efuseTbl = (u8*)rtw_zmalloc(EFUSE_MAP_LEN_8814A); + if(efuseTbl == NULL) + { + RTW_INFO("%s: alloc efuseTbl fail!\n", __FUNCTION__); + goto exit; + } + + eFuseWord= (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_8814A, EFUSE_MAX_WORD_UNIT_8814A, 2); + if(eFuseWord == NULL) + { + RTW_INFO("%s: alloc eFuseWord fail!\n", __FUNCTION__); + goto exit; + } + + // 0. Refresh efuse init map as all oxFF. + for (i = 0; i < EFUSE_MAX_SECTION_8814A; i++) + for (j = 0; j < EFUSE_MAX_WORD_UNIT_8814A; j++) + eFuseWord[i][j] = 0xFFFF; + + // + // 1. Read the first byte to check if efuse is empty!!! + // + // + efuse_OneByteRead(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); + + if(efuseHeader != 0xFF) + { + efuse_utilized++; + } + else + { + RTW_INFO("EFUSE is empty\n"); + efuse_utilized = 0; + goto exit; + } + /* RT_DISP(FEEPROM, EFUSE_READ_ALL, ("Hal_EfuseReadEFuse8814A(): efuse_utilized: %d\n", efuse_utilized)); */ + + // + // 2. Read real efuse content. Filter PG header and every section data. + // + while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR_8814A(eFuse_Addr)) + { + //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse_Addr-%d efuse_data=%x\n", eFuse_Addr-1, *rtemp8)); + + // Check PG header for section num. + if(EXT_HEADER(efuseHeader)) //extended header + { + offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader); + //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%X\n", offset_2_0)); + + efuse_OneByteRead(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); + + //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("efuse[%X]=%X\n", eFuse_Addr-1, efuseExtHdr)); + + if(efuseExtHdr != 0xff) + { + efuse_utilized++; + if(ALL_WORDS_DISABLED(efuseExtHdr)) + { + efuse_OneByteRead(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); + if(efuseHeader != 0xff) + { + efuse_utilized++; + } + break; + } + else + { + offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0; + wden = (efuseExtHdr & 0x0F); + } + } + else + { + RTW_INFO("Error condition, extended = 0xff\n"); + // We should handle this condition. + break; + } + } + else + { + offset = ((efuseHeader >> 4) & 0x0f); + wden = (efuseHeader & 0x0f); + } + + if(offset < EFUSE_MAX_SECTION_8814A) + { + // Get word enable value from PG header + //RT_DISP(FEEPROM, EFUSE_READ_ALL, ("Offset-%X Worden=%X\n", offset, wden)); + + for(i=0; i> 8) & 0xff); + } + } + + /* RT_DISP(FEEPROM, EFUSE_READ_ALL, ("Hal_EfuseReadEFuse8814A(): efuse_utilized: %d\n", efuse_utilized)); */ + + // + // 4. Copy from Efuse map to output pointer memory!!! + // + for(i=0; i<_size_byte; i++) + { + pbuf[i] = efuseTbl[_offset+i]; + } + + // + // 5. Calculate Efuse utilization. + // + efuse_usage = (u1Byte)((eFuse_Addr*100)/EFUSE_REAL_CONTENT_LEN_8814A); + rtw_hal_set_hwreg(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&eFuse_Addr); + +exit: + if(efuseTbl) + rtw_mfree(efuseTbl, EFUSE_MAP_LEN_8814A); + + if(eFuseWord) + rtw_mfree2d((void *)eFuseWord, EFUSE_MAX_SECTION_8814A, EFUSE_MAX_WORD_UNIT_8814A, sizeof(u16)); +} + +static VOID +rtl8814_ReadEFuse( + PADAPTER Adapter, + u8 efuseType, + u16 _offset, + u16 _size_byte, + u8 *pbuf, + IN BOOLEAN bPseudoTest + ) +{ + hal_EfuseReadEFuse8814A(Adapter, _offset, _size_byte, pbuf, bPseudoTest); +} + +//Do not support BT +VOID +hal_EFUSEGetEfuseDefinition8814A( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u8 type, + OUT PVOID pOut + ) +{ + switch(type) + { + case TYPE_EFUSE_MAX_SECTION: + { + u8* pMax_section; + pMax_section = (u8*)pOut; + *pMax_section = EFUSE_MAX_SECTION_8814A; + } + break; + case TYPE_EFUSE_REAL_CONTENT_LEN: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8814A; + } + break; + case TYPE_EFUSE_CONTENT_LEN_BANK: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = EFUSE_REAL_CONTENT_LEN_8814A; + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_BANK: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_8814A-EFUSE_OOB_PROTECT_BYTES); + } + break; + case TYPE_AVAILABLE_EFUSE_BYTES_TOTAL: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = (u16)(EFUSE_REAL_CONTENT_LEN_8814A-EFUSE_OOB_PROTECT_BYTES); + } + break; + case TYPE_EFUSE_MAP_LEN: + { + u16* pu2Tmp; + pu2Tmp = (u16*)pOut; + *pu2Tmp = (u16)EFUSE_MAP_LEN_8814A; + } + break; + case TYPE_EFUSE_PROTECT_BYTES_BANK: + { + u8* pu1Tmp; + pu1Tmp = (u8*)pOut; + *pu1Tmp = (u8)(EFUSE_OOB_PROTECT_BYTES); + } + break; + default: + { + u8* pu1Tmp; + pu1Tmp = (u8*)pOut; + *pu1Tmp = 0; + } + break; + } +} + +static VOID +rtl8814_EFUSE_GetEfuseDefinition( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u8 type, + OUT void *pOut, + IN BOOLEAN bPseudoTest + ) +{ + hal_EFUSEGetEfuseDefinition8814A(pAdapter, efuseType, type, pOut); +} + +static u8 +hal_EfuseWordEnableDataWrite8814A( IN PADAPTER pAdapter, + IN u16 efuse_addr, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) +{ + u16 readbackAddr = 0; + u16 start_addr = efuse_addr; + u8 badworden = 0x0F; + u8 readbackData[PGPKT_DATA_SIZE]; + + _rtw_memset((PVOID)readbackData, 0xff, PGPKT_DATA_SIZE); + + RTW_INFO("word_en = %x efuse_addr=%x\n", word_en, efuse_addr); + + if ( ! (word_en&BIT0)) + { + readbackAddr = start_addr; + efuse_OneByteWrite(pAdapter,start_addr++, data[0], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[1], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); // Use 10K Read, Suggested by Morris & Victor + + efuse_OneByteRead(pAdapter,readbackAddr, &readbackData[0], bPseudoTest); + efuse_OneByteRead(pAdapter,readbackAddr+1, &readbackData[1], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); // Restored to 1.5K Read, Suggested by Morris & Victor + + if((data[0]!=readbackData[0])||(data[1]!=readbackData[1])){ + badworden &= (~BIT0); + } + } + if ( ! (word_en&BIT1)) + { + readbackAddr = start_addr; + efuse_OneByteWrite(pAdapter,start_addr++, data[2], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[3], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); // Use 10K Read, Suggested by Morris & Victor + + efuse_OneByteRead(pAdapter,readbackAddr , &readbackData[2], bPseudoTest); + efuse_OneByteRead(pAdapter,readbackAddr+1, &readbackData[3], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); // Restored to 1.5K Read, Suggested by Morris & Victor + + if((data[2]!=readbackData[2])||(data[3]!=readbackData[3])){ + badworden &=( ~BIT1); + } + } + if ( ! (word_en&BIT2)) + { + readbackAddr = start_addr; + efuse_OneByteWrite(pAdapter,start_addr++, data[4], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[5], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); // Use 10K Read, Suggested by Morris & Victor + + efuse_OneByteRead(pAdapter,readbackAddr, &readbackData[4], bPseudoTest); + efuse_OneByteRead(pAdapter,readbackAddr+1, &readbackData[5], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); // Restored to 1.5K Read, Suggested by Morris & Victor + + if((data[4]!=readbackData[4])||(data[5]!=readbackData[5])){ + badworden &=( ~BIT2); + } + } + if ( ! (word_en&BIT3)) + { + readbackAddr = start_addr; + efuse_OneByteWrite(pAdapter,start_addr++, data[6], bPseudoTest); + efuse_OneByteWrite(pAdapter,start_addr++, data[7], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); // Use 10K Read, Suggested by Morris & Victor + + efuse_OneByteRead(pAdapter,readbackAddr, &readbackData[6], bPseudoTest); + efuse_OneByteRead(pAdapter,readbackAddr+1, &readbackData[7], bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); // Restored to 1.5K Read, Suggested by Morris & Victor + + if((data[6]!=readbackData[6])||(data[7]!=readbackData[7])){ + badworden &=( ~BIT3); + } + } + return badworden; +} + +static u8 +rtl8814_Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, + IN u16 efuse_addr, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) +{ + u8 ret=0; + + ret = hal_EfuseWordEnableDataWrite8814A(pAdapter, efuse_addr, word_en, data, bPseudoTest); + + return ret; +} + + +static u16 hal_EfuseGetCurrentSize_8814A( PADAPTER pAdapter, BOOLEAN bPseudoTest) +{ + int bContinual = _TRUE; + + u16 efuse_addr = 0; + u8 hoffset=0, hworden=0; + u8 efuse_data, word_cnts=0; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PEFUSE_HAL pEfuseHal = &(pHalData->EfuseHal); + + RTW_INFO("=======> %s() \n", __func__); + + if(bPseudoTest) + { + efuse_addr = (u16)(fakeEfuseUsedBytes); + } + else + { + rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + } + //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723A(), start_efuse_addr = %d\n", efuse_addr)); + + while ( bContinual && + efuse_OneByteRead(pAdapter, efuse_addr , &efuse_data, bPseudoTest) && + (efuse_addr < EFUSE_REAL_CONTENT_LEN_8814A)) + { + if (efuse_data != 0xFF) + { + if ((efuse_data&0x1F) == 0x0F) //extended header + { + hoffset = efuse_data; + efuse_addr++; + efuse_OneByteRead(pAdapter, efuse_addr, &efuse_data, bPseudoTest); + if((efuse_data & 0x0F) == 0x0F) + { + efuse_addr++; + continue; + } else { + hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); + hworden = efuse_data & 0x0F; + } + } else { + hoffset = (efuse_data>>4) & 0x0F; + hworden = efuse_data & 0x0F; + } + word_cnts = Efuse_CalculateWordCnts(hworden); + //read next header + efuse_addr = efuse_addr + (word_cnts*2)+1; + } + else + { + bContinual = _FALSE ; + } + } + + if(bPseudoTest) + { + fakeEfuseUsedBytes = efuse_addr; + pEfuseHal->fakeEfuseUsedBytes = efuse_addr; + RTW_INFO ("%s(), return %d \n", __func__, pEfuseHal->fakeEfuseUsedBytes ); + } + else + { + pEfuseHal->EfuseUsedBytes = efuse_addr; + pEfuseHal->EfuseUsedPercentage = (u1Byte)((pEfuseHal->EfuseUsedBytes*100)/pEfuseHal->PhysicalLen_WiFi); + rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); + rtw_hal_set_hwreg(pAdapter, HW_VAR_EFUSE_USAGE, (u8 *)&(pEfuseHal->EfuseUsedPercentage)); + RTW_INFO("%s(), return %d\n", __func__, efuse_addr); + } + + return efuse_addr; + +} + +static u16 +rtl8814_EfuseGetCurrentSize( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN BOOLEAN bPseudoTest) +{ + u16 ret=0; + + ret = hal_EfuseGetCurrentSize_8814A(pAdapter, bPseudoTest); + + return ret; +} + + +static int +hal_EfusePgPacketRead_8814A( + IN PADAPTER pAdapter, + IN u8 offset, + IN u8 *data, + IN BOOLEAN bPseudoTest) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PEFUSE_HAL pEfuseHal = &(pHalData->EfuseHal); + u8 ReadState = PG_STATE_HEADER; + + int bContinual = _TRUE; + int bDataEmpty = _TRUE ; + + u8 efuse_data,word_cnts=0; + u16 efuse_addr = 0; + u8 hoffset=0,hworden=0; + u8 tmpidx=0; + u8 tmpdata[8]; + u8 tmp_header = 0; + + if(data==NULL) return _FALSE; + if(offset>=EFUSE_MAX_SECTION_JAGUAR) return _FALSE; + + _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); + _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); + + // + // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. + // Skip dummy parts to prevent unexpected data read from Efuse. + // By pass right now. 2009.02.19. + // + while(bContinual && (efuse_addr < pEfuseHal->PhysicalLen_WiFi) ) + { + //------- Header Read ------------- + if(ReadState & PG_STATE_HEADER) + { + if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)) + { + if(ALL_WORDS_DISABLED(efuse_data)) + { + tmp_header = efuse_data; + efuse_addr++; + efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); + if((efuse_data & 0x0F) != 0x0F) + { + hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); + hworden = efuse_data & 0x0F; + } + else + { + efuse_addr++; + break; + } + + } + else + { + hoffset = (efuse_data>>4) & 0x0F; + hworden = efuse_data & 0x0F; + } + word_cnts = Efuse_CalculateWordCnts(hworden); + bDataEmpty = _TRUE ; + + if(hoffset==offset){ + for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){ + if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ){ + tmpdata[tmpidx] = efuse_data; + if(efuse_data!=0xff){ + bDataEmpty = _FALSE; + } + } + } + if(bDataEmpty==_FALSE){ + ReadState = PG_STATE_DATA; + }else{//read next header + efuse_addr = efuse_addr + (word_cnts*2)+1; + ReadState = PG_STATE_HEADER; + } + } + else{//read next header + efuse_addr = efuse_addr + (word_cnts*2)+1; + ReadState = PG_STATE_HEADER; + } + + } + else{ + bContinual = _FALSE ; + } + } + //------- Data section Read ------------- + else if(ReadState & PG_STATE_DATA) + { + efuse_WordEnableDataRead(hworden,tmpdata,data); + efuse_addr = efuse_addr + (word_cnts*2)+1; + ReadState = PG_STATE_HEADER; + } + + } + + if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && + (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) + return _FALSE; + else + return _TRUE; +} + +static int +rtl8814_Efuse_PgPacketRead( IN PADAPTER pAdapter, + IN u8 offset, + IN u8 *data, + IN BOOLEAN bPseudoTest) +{ + int ret=0; + + ret = hal_EfusePgPacketRead_8814A(pAdapter, offset, data, bPseudoTest); + + return ret; +} + +static BOOLEAN efuse_PgPacketCheck( + PADAPTER pAdapter, + u8 efuseType, + BOOLEAN bPseudoTest +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + if (Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= (EFUSE_REAL_CONTENT_LEN_8814A-EFUSE_PROTECT_BYTES_BANK_8814A)) + { + RTW_INFO("%s()error: %x >= %x\n", __func__, Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest), (EFUSE_REAL_CONTENT_LEN_8814A-EFUSE_PROTECT_BYTES_BANK_8814A)); + return _FALSE; + } + + return _TRUE; +} + +static VOID +efuse_PgPacketConstruct( + IN u8 offset, + IN u8 word_en, + IN u8* pData, + IN OUT PPGPKT_STRUCT pTargetPkt + ) +{ + _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8); + pTargetPkt->offset = offset; + pTargetPkt->word_en= word_en; + efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); + pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); + + RTW_INFO("efuse_PgPacketConstruct(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts); +} + + +u16 +efuse_PgPacketExceptionHandle( + IN PADAPTER pAdapter, + IN u16 ErrOffset + ) +{ + RTW_INFO("===> efuse_PgPacketExceptionHandle(), ErrOffset = 0x%X\n", ErrOffset); + + // ErrOffset is the offset of bad (extension) header. + //if (IS_HARDWARE_TYPE_8812AU(pAdapter)) + //ErrOffset = Hal_EfusePgPacketExceptionHandle_8812A(pAdapter, ErrOffset); + + RTW_INFO("<=== efuse_PgPacketExceptionHandle(), recovered! Jump to Offset = 0x%X\n", ErrOffset); + + return ErrOffset; +} + + +static BOOLEAN +hal_EfuseCheckIfDatafollowed( + IN PADAPTER pAdapter, + IN u8 word_cnts, + IN u16 startAddr, + IN BOOLEAN bPseudoTest + ) +{ + BOOLEAN bRet=FALSE; + u8 i, efuse_data; + + for(i=0; i<(word_cnts*2) ; i++) + { + if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)) + bRet = TRUE; + } + + return bRet; +} + +static BOOLEAN +hal_EfuseWordEnMatched( + IN PPGPKT_STRUCT pTargetPkt, + IN PPGPKT_STRUCT pCurPkt, + IN u8* pWden +) +{ + u8 match_word_en = 0x0F; // default all words are disabled + + // check if the same words are enabled both target and current PG packet + if( ((pTargetPkt->word_en & BIT0) == 0) && + ((pCurPkt->word_en & BIT0) == 0) ) + { + match_word_en &= ~BIT0; // enable word 0 + } + if( ((pTargetPkt->word_en & BIT1) == 0) && + ((pCurPkt->word_en & BIT1) == 0) ) + { + match_word_en &= ~BIT1; // enable word 1 + } + if( ((pTargetPkt->word_en & BIT2) == 0) && + ((pCurPkt->word_en & BIT2) == 0) ) + { + match_word_en &= ~BIT2; // enable word 2 + } + if( ((pTargetPkt->word_en & BIT3) == 0) && + ((pCurPkt->word_en & BIT3) == 0) ) + { + match_word_en &= ~BIT3; // enable word 3 + } + + *pWden = match_word_en; + + if(match_word_en != 0xf) + return TRUE; + else + return FALSE; +} + + +static BOOLEAN +efuse_PgPacketPartialWrite( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN OUT u16* pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PEFUSE_HAL pEfuseHal=&(pHalData->EfuseHal); + BOOLEAN bRet=_FALSE; + u8 i, efuse_data=0, cur_header=0; + u8 matched_wden=0, badworden=0; + u16 startAddr=0; + PGPKT_STRUCT curPkt; + u16 max_sec_num = (efuseType == EFUSE_WIFI) ? pEfuseHal->MaxSecNum_WiFi : pEfuseHal->MaxSecNum_BT; + u16 efuse_max = pEfuseHal->BankSize; + u16 efuse_max_available_len = + (efuseType == EFUSE_WIFI) ? pEfuseHal->TotalAvailBytes_WiFi : pEfuseHal->TotalAvailBytes_BT; + + if (bPseudoTest) { + pEfuseHal->fakeEfuseBank = (efuseType == EFUSE_WIFI) ? 0 : pEfuseHal->fakeEfuseBank; + Efuse_GetCurrentSize(pAdapter, efuseType, _TRUE); + } + + //EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, &efuse_max_available_len, bPseudoTest); + //EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_CONTENT_LEN_BANK, &efuse_max, bPseudoTest); + + if(efuseType == EFUSE_WIFI) + { + if(bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + startAddr = (u16)pEfuseHal->fakeEfuseUsedBytes; +#else + startAddr = (u16)fakeEfuseUsedBytes; +#endif + + } + else + { + rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BYTES, (u8*)&startAddr); + } + } + else + { + if(bPseudoTest) + { +#ifdef HAL_EFUSE_MEMORY + startAddr = (u16)pEfuseHal->fakeBTEfuseUsedBytes; +#else + startAddr = (u16)fakeBTEfuseUsedBytes; +#endif + + } + else + { + rtw_hal_get_hwreg(pAdapter, HW_VAR_EFUSE_BT_BYTES, (u8*)&startAddr); + } + } + + startAddr %= efuse_max; + RTW_INFO("%s: startAddr=%#X\n", __FUNCTION__, startAddr); + RTW_INFO("efuse_PgPacketPartialWrite(), startAddr = 0x%X\n", startAddr); + + while(1) + { + if(startAddr >= efuse_max_available_len) + { + bRet = _FALSE; + RTW_INFO("startAddr(%d) >= efuse_max_available_len(%d)\n", + startAddr, efuse_max_available_len); + break; + } + + if (efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF)) + { + if(EXT_HEADER(efuse_data)) + { + cur_header = efuse_data; + startAddr++; + efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); + if (ALL_WORDS_DISABLED(efuse_data)) + { + u16 recoveredAddr = startAddr; + recoveredAddr = efuse_PgPacketExceptionHandle(pAdapter, startAddr-1); + + if (recoveredAddr == (startAddr-1)) { + RTW_INFO("Error! All words disabled and the recovery failed, (Addr, Data) = (0x%X, 0x%X)\n", + startAddr, efuse_data); + pAdapter->LastError = ERR_INVALID_DATA; + break; + } else { + startAddr = recoveredAddr; + RTW_INFO("Bad extension header but recovered => Keep going.\n"); + continue; + } + } + else + { + curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); + curPkt.word_en = efuse_data & 0x0F; + } + } + else + { + if (ALL_WORDS_DISABLED(efuse_data)) { + u16 recoveredAddr = startAddr; + recoveredAddr = efuse_PgPacketExceptionHandle(pAdapter, startAddr); + if (recoveredAddr != startAddr) { + efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); + RTW_INFO("Bad header but recovered => Read header again.\n"); + } + } + + cur_header = efuse_data; + curPkt.offset = (cur_header>>4) & 0x0F; + curPkt.word_en = cur_header & 0x0F; + } + + if (curPkt.offset > max_sec_num) { + pAdapter->LastError = ERR_OUT_OF_RANGE; + pEfuseHal->Status = ERR_OUT_OF_RANGE; + bRet = _FALSE; + break; + } + + curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); + // if same header is found but no data followed + // write some part of data followed by the header. + if( (curPkt.offset == pTargetPkt->offset) && + (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) && + hal_EfuseWordEnMatched(pTargetPkt, &curPkt, &matched_wden) ) + { + RTW_INFO("Need to partial write data by the previous wrote header\n"); + //RT_ASSERT(_FALSE, ("Error, Need to partial write data by the previous wrote header!!\n")); + // Here to write partial data + badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest); + if(badworden != 0x0F) + { + u32 PgWriteSuccess=0; + // if write fail on some words, write these bad words again + + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + + if(!PgWriteSuccess) + { + bRet = _FALSE; // write fail, return + break; + } + } + // partial write ok, update the target packet for later use + for(i=0; i<4; i++) + { + if((matched_wden & (0x1<word_en |= (0x1<word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); + } + // read from next header + startAddr = startAddr + (curPkt.word_cnts*2) +1; + } + else + { + // not used header, 0xff + *pAddr = startAddr; + RTW_INFO("Started from unused header offset=%d\n", startAddr); + bRet = _TRUE; + break; + } + } + return bRet; +} + + +static BOOLEAN +hal_EfuseFixHeaderProcess( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN PPGPKT_STRUCT pFixPkt, + IN u16* pAddr, + IN BOOLEAN bPseudoTest +) +{ + u8 originaldata[8], badworden=0; + u16 efuse_addr=*pAddr; + u32 PgWriteSuccess=0; + + _rtw_memset((PVOID)originaldata, 0xff, 8); + + if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) + { //check if data exist + badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest); + + if(badworden != 0xf) // write fail + { + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); + if(!PgWriteSuccess) + return _FALSE; + else + efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); + } + else + { + efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; + } + } + else + { + efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; + } + *pAddr = efuse_addr; + return _TRUE; +} + + +BOOLEAN +efuse_PgPacketWrite2ByteHeader( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN OUT u16* pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PEFUSE_HAL pEfuseHal = &(pHalData->EfuseHal); + BOOLEAN bRet=_FALSE; + u16 efuse_addr=*pAddr; + u8 pg_header=0, tmp_header=0, pg_header_temp=0; + u8 repeatcnt=0; + u16 efuse_max_available_len = + (efuseType == EFUSE_WIFI) ? pEfuseHal->TotalAvailBytes_WiFi : pEfuseHal->TotalAvailBytes_BT; + + RTW_INFO("Wirte 2byte header\n"); + + + while(efuse_addr < efuse_max_available_len) + { + pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; + RTW_INFO("pg_header = 0x%x\n", pg_header); + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + + while(tmp_header == 0xFF || pg_header != tmp_header) + { + if(repeatcnt++ > pEfuseHal->DataRetry) + { + RTW_INFO("Repeat over limit for pg_header!!\n"); + return _FALSE; + } + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + } + + //to write ext_header + if(tmp_header == pg_header) + { + efuse_addr++; + pg_header_temp = pg_header; + pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + + while(tmp_header == 0xFF || pg_header != tmp_header) + { + if(repeatcnt++ > pEfuseHal->DataRetry) + { + RTW_INFO("Repeat over limit for ext_header!!\n"); + return _FALSE; + } + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + } + + if((tmp_header & 0x0F) == 0x0F) //word_en PG fail + { + if(repeatcnt++ > pEfuseHal->DataRetry) + { + RTW_INFO("Repeat over limit for word_en!!\n"); + return _FALSE; + } + else + { + efuse_addr++; + continue; + } + } + else if(pg_header != tmp_header) //offset PG fail + { + PGPKT_STRUCT fixPkt; + //RT_ASSERT(_FALSE, ("Error, efuse_PgPacketWrite2ByteHeader(), offset PG fail, need to cover the existed data!!\n")); + RTW_INFO("Error condition for offset PG fail, need to cover the existed data\n"); + fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); + fixPkt.word_en = tmp_header & 0x0F; + fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); + if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) + return _FALSE; + } + else + { + bRet = _TRUE; + break; + } + } + else if ((tmp_header & 0x1F) == 0x0F) //wrong extended header + { + efuse_addr+=2; + continue; + } + } + + *pAddr = efuse_addr; + return bRet; +} + + +BOOLEAN +efuse_PgPacketWrite1ByteHeader( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN OUT u16* pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + PEFUSE_HAL pEfuseHal=&(pHalData->EfuseHal); + BOOLEAN bRet=_FALSE; + u8 pg_header=0, tmp_header=0; + u16 efuse_addr=*pAddr; + u8 repeatcnt=0; + + RTW_INFO("Wirte 1byte header\n"); + pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en; + + if (IS_HARDWARE_TYPE_8723BE(pAdapter)) + efuse_OneByteWrite(pAdapter, 0x1FF, 00, _FALSE); // increase current + + + efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 0); // Use 10K Read, Suggested by Morris & Victor + + efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); + + if (IS_HARDWARE_TYPE_8723B(pAdapter) || IS_HARDWARE_TYPE_8188E(pAdapter) || + IS_HARDWARE_TYPE_8192E(pAdapter) || IS_HARDWARE_TYPE_8703B(pAdapter) || IS_HARDWARE_TYPE_8188F(pAdapter)) + phy_set_mac_reg(pAdapter, EFUSE_TEST, BIT26, 1); // Restored to 1.5K Read, Suggested by Morris & Victor + + + while(tmp_header == 0xFF || pg_header != tmp_header) + { + if(repeatcnt++ > pEfuseHal->HeaderRetry) + { + RTW_INFO("retry %d times fail!!\n", repeatcnt); + return _FALSE; + } + efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); + efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); + RTW_INFO("===> efuse_PgPacketWrite1ByteHeader: Keep %d-th retrying, tmp_header = 0x%X\n", repeatcnt, tmp_header); + } + + if(pg_header == tmp_header) + { + bRet = _TRUE; + } + else + { + PGPKT_STRUCT fixPkt; + //RT_ASSERT(_FALSE, ("Error, efuse_PgPacketWrite1ByteHeader(), offset PG fail, need to cover the existed data!!\n")); + RTW_INFO(" pg_header(0x%X) != tmp_header(0x%X)\n", pg_header, tmp_header); + RTW_INFO("Error condition for fixed PG packet, need to cover the existed data: (Addr, Data) = (0x%X, 0x%X)\n", + efuse_addr, tmp_header); + fixPkt.offset = (tmp_header>>4) & 0x0F; + fixPkt.word_en = tmp_header & 0x0F; + fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); + if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) + return _FALSE; + } + + *pAddr = efuse_addr; + return bRet; +} + + + +static BOOLEAN +efuse_PgPacketWriteHeader( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN OUT u16* pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) +{ + BOOLEAN bRet=_FALSE; + + if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) + { + bRet = efuse_PgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + } + else + { + bRet = efuse_PgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); + } + + return bRet; +} + +BOOLEAN +efuse_PgPacketWriteData( + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u16* pAddr, + IN PPGPKT_STRUCT pTargetPkt, + IN BOOLEAN bPseudoTest) +{ + BOOLEAN bRet=_FALSE; + u16 efuse_addr=*pAddr; + u8 badworden=0; + u32 PgWriteSuccess=0; + + badworden = 0x0f; + badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); + if(badworden == 0x0F) + { + RTW_INFO("efuse_PgPacketWriteData ok!!\n"); + return _TRUE; + } + else + { // Reorganize other pg packet + //RT_ASSERT(_FALSE, ("Error, efuse_PgPacketWriteData(), wirte data fail!!\n")); + RTW_INFO("efuse_PgPacketWriteData Fail!!\n"); + + PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); + if(!PgWriteSuccess) + return _FALSE; + else + return _TRUE; + } + + return bRet; +} + + +int +hal_EfusePgPacketWrite_8814A(IN PADAPTER pAdapter, + IN u8 offset, + IN u8 word_en, + IN u8 *pData, + IN BOOLEAN bPseudoTest) +{ + u8 efuseType = EFUSE_WIFI; + PGPKT_STRUCT targetPkt; + u16 startAddr = 0; + + RTW_INFO("===> efuse_PgPacketWrite[%s], offset: 0x%X\n", (efuseType == EFUSE_WIFI) ? "WIFI" : "BT", offset); + + //4 [1] Check if the remaining space is available to write. + if(!efuse_PgPacketCheck(pAdapter, efuseType, bPseudoTest)) + { + pAdapter->LastError = ERR_WRITE_PROTECT; + RTW_INFO("efuse_PgPacketCheck(), fail!!\n"); + return _FALSE; + } + + //4 [2] Construct a packet to write: (Data, Offset, and WordEnable) + efuse_PgPacketConstruct(offset, word_en, pData, &targetPkt); + + + //4 [3] Fix headers without data or fix bad headers, and then return the address where to get started. + if(!efuse_PgPacketPartialWrite(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + { + pAdapter->LastError = ERR_INVALID_DATA; + RTW_INFO("efuse_PgPacketPartialWrite(), fail!!\n"); + return _FALSE; + } + + //4 [4] Write the (extension) header. + if(!efuse_PgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + { + pAdapter->LastError = ERR_IO_FAILURE; + RTW_INFO("efuse_PgPacketWriteHeader(), fail!!\n"); + return _FALSE; + } + + //4 [5] Write the data. + if(!efuse_PgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) + { + pAdapter->LastError = ERR_IO_FAILURE; + RTW_INFO("efuse_PgPacketWriteData(), fail!!\n"); + return _FALSE; + } + + RTW_INFO("<=== efuse_PgPacketWrite\n"); + return _TRUE; +} + +static int +rtl8814_Efuse_PgPacketWrite(IN PADAPTER pAdapter, + IN u8 offset, + IN u8 word_en, + IN u8 *data, + IN BOOLEAN bPseudoTest) +{ + int ret; + + ret = hal_EfusePgPacketWrite_8814A(pAdapter, offset, word_en, data, bPseudoTest); + + return ret; +} + +void InitRDGSetting8814A(PADAPTER padapter) +{ + rtw_write8(padapter, REG_RD_CTRL, 0xFF); + rtw_write16(padapter, REG_RD_NAV_NXT, 0x200); + rtw_write8(padapter, REG_RD_RESP_PKT_TH, 0x05); +} + +void ReadRFType8814A(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + +#if DISABLE_BB_RF + pHalData->rf_chip = RF_PSEUDO_11N; +#else + pHalData->rf_chip = RF_6052; +#endif + + //if (pHalData->rf_type == RF_1T1R){ + // pHalData->bRFPathRxEnable[0] = _TRUE; + //} + //else { // Default unknow type is 2T2r + // pHalData->bRFPathRxEnable[0] = pHalData->bRFPathRxEnable[1] = _TRUE; + //} + + if (IsSupported24G(padapter->registrypriv.wireless_mode) && + is_supported_5g(padapter->registrypriv.wireless_mode)) + pHalData->BandSet = BAND_ON_BOTH; + else if (is_supported_5g(padapter->registrypriv.wireless_mode)) + pHalData->BandSet = BAND_ON_5G; + else + pHalData->BandSet = BAND_ON_2_4G; + + //if(padapter->bInHctTest) + // pHalData->BandSet = BAND_ON_2_4G; +} + +void rtl8814_start_thread(PADAPTER padapter) +{ +} + +void rtl8814_stop_thread(PADAPTER padapter) +{ +} + +void hal_notch_filter_8814(_adapter *adapter, bool enable) +{ + if (enable) { + RTW_INFO("Enable notch filter\n"); + //rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) | BIT1); + } else { + RTW_INFO("Disable notch filter\n"); + //rtw_write8(adapter, rOFDM0_RxDSP+1, rtw_read8(adapter, rOFDM0_RxDSP+1) & ~BIT1); + } +} + +u8 +GetEEPROMSize8814A( + IN PADAPTER Adapter + ) +{ + u8 size = 0; + u32 curRCR; + + curRCR = rtw_read16(Adapter, REG_SYS_EEPROM_CTRL); + size = (curRCR & EEPROMSEL) ? 6 : 4; // 6: EEPROM used is 93C46, 4: boot from E-Fuse. + + RTW_INFO("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); + //return size; + return 4; // <20120713, Kordan> The default value of HW is 6 ?!! +} + +/* +void CheckAutoloadState8812A(PADAPTER padapter) +{ + + u8 val8; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + + // check system boot selection + val8 = rtw_read8(padapter, REG_9346CR); + pHalData->EepromOrEfuse = (val8 & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; + pHalData->bautoload_fail_flag = (val8 & EEPROM_EN) ? _FALSE : _TRUE; + + RTW_INFO("%s: 9346CR(%#x)=0x%02x, Boot from %s, Autoload %s!\n", + __FUNCTION__, REG_9346CR, val8, + (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"), + (pHalData->bautoload_fail_flag ? "Fail" : "OK")); +} +*/ + +void InitPGData8814A(PADAPTER padapter) +{ + u32 i; + u16 val16; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); + + if (_FALSE == pHalData->bautoload_fail_flag) + { + // autoload OK. + if (is_boot_from_eeprom(padapter)) + { + // Read all Content from EEPROM or EFUSE. + //for (i = 0; i < HWSET_MAX_SIZE_JAGUAR; i += 2) + { + //val16 = EF2Byte(ReadEEprom(pAdapter, (u16) (i>>1))); + //*((u16*)(&PROMContent[i])) = val16; + } + } + else + { + // Read EFUSE real map to shadow. + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + } + } + else + { + // update to default value 0xFF + if (!is_boot_from_eeprom(padapter)) + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + } + +#ifdef CONFIG_EFUSE_CONFIG_FILE + if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) { + if (Hal_readPGDataFromConfigFile(padapter) != _SUCCESS) + RTW_ERR("invalid phy efuse and read from file fail, will use driver default!!\n"); + } +#endif +} + +static void read_chip_version_8814a(PADAPTER Adapter) +{ + u32 value32; + PHAL_DATA_TYPE pHalData; + u8 vdr; + + pHalData = GET_HAL_DATA(Adapter); + + value32 = rtw_read32(Adapter, REG_SYS_CFG); + RTW_INFO("%s SYS_CFG(0x%X)=0x%08x \n", __FUNCTION__, REG_SYS_CFG, value32); + + pHalData->version_id.ICType = CHIP_8814A; + + pHalData->version_id.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP); + + pHalData->version_id.RFType = RF_TYPE_3T3R; + + if(Adapter->registrypriv.special_rf_path == 1) + pHalData->version_id.RFType = RF_TYPE_1T1R; //RF_1T1R; + + vdr = (value32 & EXT_VENDOR_ID) >> EXT_VENDOR_ID_SHIFT; + if(vdr == 0x00) + pHalData->version_id.VendorType = CHIP_VENDOR_TSMC; + else if(vdr == 0x01) + pHalData->version_id.VendorType = CHIP_VENDOR_SMIC; + else if(vdr == 0x02) + pHalData->version_id.VendorType = CHIP_VENDOR_UMC; + + pHalData->version_id.CUTVersion = (value32 & CHIP_VER_RTL_MASK)>>CHIP_VER_RTL_SHIFT; // IC version (CUT) + + pHalData->MultiFunc = RT_MULTI_FUNC_NONE; + + rtw_hal_config_rftype(Adapter); + +#if 1 + dump_chip_info(pHalData->version_id); +#endif + +} + +VOID +hal_PatchwithJaguar_8814( + IN PADAPTER Adapter, + IN RT_MEDIA_STATUS MediaStatus + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + if( (MediaStatus == RT_MEDIA_CONNECT) && + (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP )) + { + rtw_write8(Adapter, rVhtlen_Use_Lsig_Jaguar, 0x1); + rtw_write8(Adapter, REG_TCR+3, BIT2); + } + else + { + rtw_write8(Adapter, rVhtlen_Use_Lsig_Jaguar, 0x3F); + rtw_write8(Adapter, REG_TCR+3, BIT0|BIT1|BIT2); + } + + + /*if( (MediaStatus == RT_MEDIA_CONNECT) && + ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_BCUTAP) || + (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_REALTEK_JAGUAR_CCUTAP))) + { + pHalData->Reg837 |= BIT2; + rtw_write8(Adapter, rBWIndication_Jaguar+3, pHalData->Reg837); + } + else + { + pHalData->Reg837 &= (~BIT2); + rtw_write8(Adapter, rBWIndication_Jaguar+3, pHalData->Reg837); + }*/ +} + +void init_hal_spec_8814a(_adapter *adapter) +{ + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); + + hal_spec->ic_name = "rtl8814a"; + hal_spec->macid_num = MACID_NUM_8814A; + hal_spec->sec_cam_ent_num = SEC_CAM_ENT_NUM_8814A; + hal_spec->sec_cap = SEC_CAP_CHK_BMC; + hal_spec->rfpath_num_2g = 3; + hal_spec->rfpath_num_5g = 3; + hal_spec->max_tx_cnt = 4; + hal_spec->txgi_max = 63; + hal_spec->txgi_pdbm = 2; + hal_spec->tx_nss_num = 4; + hal_spec->rx_nss_num = 4; + hal_spec->band_cap = BAND_CAP_8814A; + hal_spec->bw_cap = BW_CAP_8814A; + hal_spec->port_num = 2; + hal_spec->proto_cap = PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC; + + hal_spec->wl_func = 0 + | WL_FUNC_P2P + | WL_FUNC_MIRACAST + | WL_FUNC_TDLS + ; + + hal_spec->pg_txpwr_saddr = 0x10; + hal_spec->pg_txgi_diff_factor = 1; + rtw_macid_ctl_init_sleep_reg(adapter_to_macidctl(adapter) + , REG_MACID_SLEEP + , REG_MACID_SLEEP_1 + , REG_MACID_SLEEP_2 + , REG_MACID_SLEEP_3); + +} + +void InitDefaultValue8814A(PADAPTER padapter) +{ + PHAL_DATA_TYPE pHalData; + struct pwrctrl_priv *pwrctrlpriv; + u8 i; + + pHalData = GET_HAL_DATA(padapter); + pwrctrlpriv = adapter_to_pwrctl(padapter); + + // init default value + pHalData->fw_ractrl = _FALSE; + if (!pwrctrlpriv->bkeepfwalive) + pHalData->LastHMEBoxNum = 0; + + init_hal_spec_8814a(padapter); + + // init dm default value + pHalData->bChnlBWInitialized = _FALSE; + pHalData->bIQKInitialized = _FALSE; + + pHalData->EfuseHal.fakeEfuseBank = 0; + pHalData->EfuseHal.fakeEfuseUsedBytes = 0; + _rtw_memset(pHalData->EfuseHal.fakeEfuseContent, 0xFF, EFUSE_MAX_HW_SIZE); + _rtw_memset(pHalData->EfuseHal.fakeEfuseInitMap, 0xFF, EFUSE_MAX_MAP_LEN); + _rtw_memset(pHalData->EfuseHal.fakeEfuseModifiedMap, 0xFF, EFUSE_MAX_MAP_LEN); +} + +VOID +_InitBeaconParameters_8814A( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 val16; + u8 val8; + + val8 = DIS_TSF_UDT; + val16 = val8 | (val8 << 8); // port0 and port1 +#ifdef CONFIG_BT_COEXIST + if (pHalData->EEPROMBluetoothCoexist == 1) + { + // Enable prot0 beacon function for PSTDMA + val16 |= EN_BCN_FUNCTION; + } +#endif + rtw_write16(Adapter, REG_BCN_CTRL, val16); + //rtw_write16(Adapter, REG_BCN_CTRL, 0x1010); + + // TODO: Remove these magic number + rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms + rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME_8814);// 5ms + rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME_8814); // 2ms + + // Suggested by designer timchen. Change beacon AIFS to the largest number + // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 + rtw_write16(Adapter, REG_BCNTCFG, 0x660F); + + //pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); + //pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); + //pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); + //pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); + //pHalData->RegCR_1 = rtw_read8(Adapter, REG_CR+1); +} + +static VOID +_BeaconFunctionEnable( + IN PADAPTER Adapter, + IN BOOLEAN Enable, + IN BOOLEAN Linked + ) +{ + rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); + //SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00); + //RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", rtw_read8(Adapter, 0x550))); + + rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F); +} + +void SetBeaconRelatedRegisters8814A(PADAPTER padapter) +{ + u32 value32; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + u32 bcn_ctrl_reg = REG_BCN_CTRL; + //reset TSF, enable update TSF, correcting TSF On Beacon + + //REG_BCN_INTERVAL + //REG_BCNDMATIM + //REG_ATIMWND + //REG_TBTT_PROHIBIT + //REG_DRVERLYINT + //REG_BCN_MAX_ERR + //REG_BCNTCFG //(0x510) + //REG_DUAL_TSF_RST + //REG_BCN_CTRL //(0x550) + + //BCN interval +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1){ + bcn_ctrl_reg = REG_BCN_CTRL_1; + } +#endif + rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); + rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms + + _InitBeaconParameters_8814A(padapter); + + rtw_write8(padapter, REG_SLOT, 0x09); + + value32 =rtw_read32(padapter, REG_TCR); + value32 &= ~TSFRST; + rtw_write32(padapter, REG_TCR, value32); + + value32 |= TSFRST; + rtw_write32(padapter, REG_TCR, value32); + + // NOTE: Fix test chip's bug (about contention windows's randomness) + rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); + rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); + + _BeaconFunctionEnable(padapter, _TRUE, _TRUE); + + ResumeTxBeacon(padapter); + + //rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6)); + + //rtw_write8(padapter, 0x541, 0xff); + + //rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0)); + + rtw_write8(padapter, bcn_ctrl_reg, rtw_read8(padapter, bcn_ctrl_reg)|BIT(1)); + +} + +#ifdef CONFIG_BEAMFORMING +#if (BEAMFORMING_SUPPORT == 0) +VOID +SetBeamformingCLK_8812( + IN PADAPTER Adapter + ) +{ + struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(Adapter); + u16 u2btmp; + u8 Count = 0, u1btmp; + + RTW_INFO(" ==>%s\n", __FUNCTION__); + + if ( (check_fwstate(&Adapter->mlmepriv, _FW_UNDER_SURVEY)==_TRUE) +#ifdef CONFIG_CONCURRENT_MODE + || (check_buddy_fwstate(Adapter, _FW_UNDER_SURVEY) == _TRUE) +#endif + ) + { + RTW_INFO(" <==%s return by Scan\n", __FUNCTION__); + return; + } + + // Stop Usb TxDMA + rtw_write_port_cancel(Adapter); + +#ifdef CONFIG_PCI_HCI + // Stop PCIe TxDMA + rtw_write8(Adapter, REG_PCIE_CTRL_REG+1, 0xFE); +#endif + + // Wait TXFF empty + for(Count = 0; Count < 100; Count++) + { + u2btmp = rtw_read16(Adapter, REG_TXPKT_EMPTY); + u2btmp = u2btmp & 0xfff; + if(u2btmp != 0xfff) + { + rtw_mdelay_os(10); + continue; + } + else + break; + } + + RTW_INFO(" Tx Empty count %d \n", Count); + + // TX pause + rtw_write8(Adapter, REG_TXPAUSE, 0xFF); + + // Wait TX State Machine OK + for(Count = 0; Count < 100; Count++) + { + if (rtw_read32(Adapter, REG_SCH_TXCMD_8812A) != 0) + continue; + else + break; + } + + RTW_INFO(" Tx Status count %d\n", Count); + + // Stop RX DMA path + u1btmp = rtw_read8(Adapter, REG_RXDMA_CONTROL_8812A); + rtw_write8(Adapter, REG_RXDMA_CONTROL_8812A, u1btmp | BIT2); + + for(Count = 0; Count < 100; Count++) + { + u1btmp = rtw_read8(Adapter, REG_RXDMA_CONTROL_8812A); + if(u1btmp & BIT1) + break; + else + rtw_mdelay_os(10); + } + + RTW_INFO(" Rx Empty count %d \n", Count); + + // Disable clock + rtw_write8(Adapter, REG_SYS_CLKR+1, 0xf0); + // Disable 320M + rtw_write8(Adapter, REG_AFE_PLL_CTRL+3, 0x8); + // Enable 320M + rtw_write8(Adapter, REG_AFE_PLL_CTRL+3, 0xa); + // Enable clock + rtw_write8(Adapter, REG_SYS_CLKR+1, 0xfc); + + // Release Tx pause + rtw_write8(Adapter, REG_TXPAUSE, 0); + + // Enable RX DMA path + u1btmp = rtw_read8(Adapter, REG_RXDMA_CONTROL_8812A); + rtw_write8(Adapter, REG_RXDMA_CONTROL_8812A, u1btmp & (~BIT2)); + + // Start Usb TxDMA + RTW_ENABLE_FUNC(Adapter, DF_TX_BIT); + RTW_INFO("%s \n", __FUNCTION__); + + RTW_INFO("<==%s\n", __FUNCTION__); +} + +VOID +SetBeamformRfMode_8812( + IN PADAPTER Adapter, + IN struct beamforming_info *pBeamInfo + ) +{ + BOOLEAN bSelfBeamformer = _FALSE; + BOOLEAN bSelfBeamformee = _FALSE; + BEAMFORMING_CAP BeamformCap = BEAMFORMING_CAP_NONE; + + BeamformCap = beamforming_get_beamform_cap(pBeamInfo); + + if(BeamformCap == pBeamInfo->beamforming_cap) + return; + else + pBeamInfo->beamforming_cap = BeamformCap; + + if(GET_RF_TYPE(Adapter) == RF_1T1R) + return; + + bSelfBeamformer = BeamformCap & BEAMFORMER_CAP; + bSelfBeamformee = BeamformCap & BEAMFORMEE_CAP; + + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000,0x1); // RF Mode table write enable + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000,0x1); // RF Mode table write enable + + if(bSelfBeamformer) + { + // Paath_A + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000,0x3); // Select RX mode + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff,0xE26BF); // Enable TXIQGEN in RX mode + // Path_B + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); // Select RX mode + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff,0xE26BF); // Enable TXIQGEN in RX mode + } + else + { + // Paath_A + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableAddr, 0x78000, 0x3); // Select RX mode + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_ModeTableData1, 0xfffff,0xC26BF); // Disable TXIQGEN in RX mode + // Path_B + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableAddr, 0x78000, 0x3); // Select RX mode + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData0, 0xfffff,0x3F7FF); // Set Table data + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_ModeTableData1, 0xfffff,0xC26BF); // Disable TXIQGEN in RX mode + } + + PHY_SetRFReg(Adapter, ODM_RF_PATH_A, RF_WeLut_Jaguar, 0x80000,0x0); // RF Mode table write disable + PHY_SetRFReg(Adapter, ODM_RF_PATH_B, RF_WeLut_Jaguar, 0x80000,0x0); // RF Mode table write disable + + if(bSelfBeamformer) + PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskByte1, 0x33); + else + PHY_SetBBReg(Adapter, rTxPath_Jaguar, bMaskByte1, 0x11); +} + + + +VOID +SetBeamformEnter_8812( + IN PADAPTER Adapter, + IN u8 Idx + ) +{ + u8 i = 0; + u32 CSI_Param; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); + struct beamforming_entry BeamformEntry = pBeamInfo->beamforming_entry[Idx]; + u16 STAid = 0; + + SetBeamformRfMode_8812(Adapter, pBeamInfo); + + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) + STAid = BeamformEntry.mac_id; + else + STAid = BeamformEntry.p_aid; + + // Sounding protocol control + rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812A, 0xCB); + + // MAC addresss/Partial AID of Beamformer + if(Idx == 0) + { + for(i = 0; i < 6 ; i++) + rtw_write8(Adapter, (REG_BFMER0_INFO_8812A+i), BeamformEntry.mac_addr[i]); + /* CSI report use legacy ofdm so don't need to fill P_AID.*/ + /*rtw_write16(Adapter, REG_BFMER0_INFO_8812A+6, BeamformEntry.P_AID);*/ + } + else + { + for(i = 0; i < 6 ; i++) + rtw_write8(Adapter, (REG_BFMER1_INFO_8812A+i), BeamformEntry.mac_addr[i]); + /* CSI report use legacy ofdm so don't need to fill P_AID.*/ + /*rtw_write16(Adapter, REG_BFMER1_INFO_8812A+6, BeamformEntry.P_AID);*/ + } + + // CSI report parameters of Beamformee + if( (BeamformEntry.beamforming_entry_cap & BEAMFORMEE_CAP_VHT_SU) || + (BeamformEntry.beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) ) + { + if(pHalData->rf_type == RF_2T2R) + CSI_Param = 0x01090109; + else + CSI_Param = 0x01080108; + } + else + { + if(pHalData->rf_type == RF_2T2R) + CSI_Param = 0x03090309; + else + CSI_Param = 0x03080308; + } + + if(pHalData->rf_type == RF_2T2R) + rtw_write32(Adapter, 0x9B4, 0x00000000); // Nc =2 + else + rtw_write32(Adapter, 0x9B4, 0x01081008); // Nc =1 + + rtw_write32(Adapter, REG_CSI_RPT_PARAM_BW20_8812A, CSI_Param); + rtw_write32(Adapter, REG_CSI_RPT_PARAM_BW40_8812A, CSI_Param); + rtw_write32(Adapter, REG_CSI_RPT_PARAM_BW80_8812A, CSI_Param); + + // P_AID of Beamformee & enable NDPA transmission & enable NDPA interrupt + if(Idx == 0) + { + rtw_write16(Adapter, REG_TXBF_CTRL_8812A, STAid); + rtw_write8(Adapter, REG_TXBF_CTRL_8812A+3, rtw_read8(Adapter, REG_TXBF_CTRL_8812A+3)|BIT4|BIT6|BIT7); + } + else + { + rtw_write16(Adapter, REG_TXBF_CTRL_8812A+2, STAid | BIT12 | BIT14 | BIT15); + } + + // CSI report parameters of Beamformee + if(Idx == 0) + { + // Get BIT24 & BIT25 + u8 tmp = rtw_read8(Adapter, REG_BFMEE_SEL_8812A+3) & 0x3; + + rtw_write8(Adapter, REG_BFMEE_SEL_8812A+3, tmp | 0x60); + rtw_write16(Adapter, REG_BFMEE_SEL_8812A, STAid | BIT9); + } + else + { + // Set BIT25 + rtw_write16(Adapter, REG_BFMEE_SEL_8812A+2, STAid | (0xE2 << 8)); + } + + // Timeout value for MAC to leave NDP_RX_standby_state (60 us, Test chip) (80 us, MP chip) + rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812A+3, 0x50); + + beamforming_notify(Adapter); +} + + +VOID +SetBeamformLeave_8812( + IN PADAPTER Adapter, + IN u8 Idx + ) +{ + struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); + + SetBeamformRfMode_8812(Adapter, pBeamInfo); + + /* Clear P_AID of Beamformee + * Clear MAC addresss of Beamformer + * Clear Associated Bfmee Sel + */ + if(pBeamInfo->beamforming_cap == BEAMFORMING_CAP_NONE) + rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812A, 0xC8); + + if(Idx == 0) + { + rtw_write16(Adapter, REG_TXBF_CTRL_8812A, 0); + + rtw_write32(Adapter, REG_BFMER0_INFO_8812A, 0); + rtw_write16(Adapter, REG_BFMER0_INFO_8812A+4, 0); + + rtw_write16(Adapter, REG_BFMEE_SEL_8812A, 0); + } + else + { + rtw_write16(Adapter, REG_TXBF_CTRL_8812A+2, rtw_read16(Adapter, REG_TXBF_CTRL_8812A+2) & 0xF000); + + rtw_write32(Adapter, REG_BFMER1_INFO_8812A, 0); + rtw_write16(Adapter, REG_BFMER1_INFO_8812A+4, 0); + + rtw_write16(Adapter, REG_BFMEE_SEL_8812A+2, rtw_read16(Adapter, REG_BFMEE_SEL_8812A+2) & 0x60); + } +} + + +VOID +SetBeamformStatus_8812( + IN PADAPTER Adapter, + IN u8 Idx + ) +{ + u16 BeamCtrlVal; + u32 BeamCtrlReg; + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); + struct beamforming_entry BeamformEntry = pBeamInfo->beamforming_entry[Idx]; + + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) + BeamCtrlVal = BeamformEntry.mac_id; + else + BeamCtrlVal = BeamformEntry.p_aid; + + if(Idx == 0) + BeamCtrlReg = REG_TXBF_CTRL_8812A; + else + { + BeamCtrlReg = REG_TXBF_CTRL_8812A+2; + BeamCtrlVal |= BIT12 | BIT14|BIT15; + } + + if(BeamformEntry.beamforming_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) + { + if(BeamformEntry.sound_bw == CHANNEL_WIDTH_20) + BeamCtrlVal |= BIT9; + else if(BeamformEntry.sound_bw == CHANNEL_WIDTH_40) + BeamCtrlVal |= BIT10; + else if(BeamformEntry.sound_bw == CHANNEL_WIDTH_80) + BeamCtrlVal |= BIT11; + } + else + { + BeamCtrlVal &= ~(BIT9|BIT10|BIT11); + } + + rtw_write16(Adapter, BeamCtrlReg, BeamCtrlVal); + + RTW_INFO("%s Idx %d BeamCtrlReg %x BeamCtrlVal %x\n", __FUNCTION__, Idx, BeamCtrlReg, BeamCtrlVal); +} + + +VOID +SetBeamformFwTxBFCmd_8812( + IN PADAPTER Adapter + ) +{ + u8 Idx, Period0 = 0, Period1 = 0; + u8 PageNum0 = 0xFF, PageNum1 = 0xFF; + u8 u1TxBFParm[3]={0}; + + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(pmlmepriv); + + for(Idx = 0; Idx < BEAMFORMING_ENTRY_NUM; Idx++) + { + if(pBeamInfo->beamforming_entry[Idx].beamforming_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSED) + { + if(Idx == 0) + { + if(pBeamInfo->beamforming_entry[Idx].bSound) + PageNum0 = 0xFE; + else + PageNum0 = 0xFF; //stop sounding + Period0 = (u8)(pBeamInfo->beamforming_entry[Idx].sound_period); + } + else if(Idx == 1) + { + if(pBeamInfo->beamforming_entry[Idx].bSound) + PageNum1 = 0xFE; + else + PageNum1 = 0xFF; //stop sounding + Period1 = (u8)(pBeamInfo->beamforming_entry[Idx].sound_period); + } + } + } + + u1TxBFParm[0] = PageNum0; + u1TxBFParm[1] = PageNum1; + u1TxBFParm[2] = (Period1 << 4) | Period0; + FillH2CCmd_8812(Adapter, H2C_8812_TxBF, 3, u1TxBFParm); + + RTW_INFO("%s PageNum0 = %d Period0 = %d\n", __FUNCTION__, PageNum0, Period0); + RTW_INFO("PageNum1 = %d Period1 %d\n", PageNum1, Period1); +} + + +VOID +SetBeamformDownloadNDPA_8812( + IN PADAPTER Adapter, + IN u8 Idx + ) +{ + u8 u1bTmp=0, tmpReg422=0, Head_Page; + u8 BcnValidReg=0, count=0, DLBcnCount=0; + BOOLEAN bSendBeacon=_FALSE; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u16 TxPageBndy= LAST_ENTRY_OF_TX_PKT_BUFFER_8812; // default reseved 1 page for the IC type which is undefined. + struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); + struct beamforming_entry *pBeamEntry = pBeamInfo->beamforming_entry+Idx; + + //pHalData->bFwDwRsvdPageInProgress = _TRUE; + + if(Idx == 0) + Head_Page = 0xFE; + else + Head_Page = 0xFE; + + rtw_hal_get_def_var(Adapter, HAL_DEF_TX_PAGE_BOUNDARY, (u16 *)&TxPageBndy); + + //Set REG_CR bit 8. DMA beacon by SW. + u1bTmp = rtw_read8(Adapter, REG_CR+1); + rtw_write8(Adapter, REG_CR+1, (u1bTmp|BIT0)); + + pHalData->RegCR_1 |= BIT0; + rtw_write8(Adapter, REG_CR+1, pHalData->RegCR_1); + + // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. + tmpReg422 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, tmpReg422&(~BIT6)); + + if(tmpReg422&BIT6) + { + RTW_INFO("SetBeamformDownloadNDPA_8812(): There is an Adapter is sending beacon.\n"); + bSendBeacon = _TRUE; + } + + // TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA + rtw_write8(Adapter,REG_TDECTRL+1, Head_Page); + + do + { + // Clear beacon valid check bit. + BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); + rtw_write8(Adapter, REG_TDECTRL+2, (BcnValidReg|BIT0)); + + // download NDPA rsvd page. + if(pBeamEntry->beamforming_entry_cap & BEAMFORMER_CAP_VHT_SU) + beamforming_send_vht_ndpa_packet(Adapter,pBeamEntry->mac_addr,pBeamEntry->aid,pBeamEntry->sound_bw, BCN_QUEUE_INX); + else + beamforming_send_ht_ndpa_packet(Adapter,pBeamEntry->mac_addr,pBeamEntry->sound_bw, BCN_QUEUE_INX); + + // check rsvd page download OK. + BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); + count=0; + while(!(BcnValidReg & BIT0) && count <20) + { + count++; + rtw_udelay_os(10); + BcnValidReg = rtw_read8(Adapter, REG_TDECTRL+2); + } + DLBcnCount++; + }while(!(BcnValidReg&BIT0) && DLBcnCount<5); + + if(!(BcnValidReg&BIT0)) + RTW_INFO("%s Download RSVD page failed!\n", __FUNCTION__); + + // TDECTRL[15:8] 0x209[7:0] = 0xF6 Beacon Head for TXDMA + rtw_write8(Adapter,REG_TDECTRL+1, TxPageBndy); + + // To make sure that if there exists an adapter which would like to send beacon. + // If exists, the origianl value of 0x422[6] will be 1, we should check this to + // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause + // the beacon cannot be sent by HW. + // 2010.06.23. Added by tynli. + if(bSendBeacon) + { + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+2, tmpReg422); + } + + // Do not enable HW DMA BCN or it will cause Pcie interface hang by timing issue. 2011.11.24. by tynli. + // Clear CR[8] or beacon packet will not be send to TxBuf anymore. + u1bTmp = rtw_read8(Adapter, REG_CR+1); + rtw_write8(Adapter, REG_CR+1, (u1bTmp&(~BIT0))); + + pBeamEntry->beamforming_entry_state = BEAMFORMING_ENTRY_STATE_PROGRESSED; + + //pHalData->bFwDwRsvdPageInProgress = _FALSE; +} + +VOID +SetBeamformFwTxBF_8812( + IN PADAPTER Adapter, + IN u8 Idx + ) +{ + struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); + struct beamforming_entry *pBeamEntry = pBeamInfo->beamforming_entry+Idx; + + if(pBeamEntry->beamforming_entry_state == BEAMFORMING_ENTRY_STATE_PROGRESSING) + SetBeamformDownloadNDPA_8812(Adapter, Idx); + + SetBeamformFwTxBFCmd_8812(Adapter); +} + + +VOID +SetBeamformPatch_8812( + IN PADAPTER Adapter, + IN u8 Operation + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct beamforming_info *pBeamInfo = GET_BEAMFORM_INFO(&(Adapter->mlmepriv)); + + if(pBeamInfo->beamforming_cap == BEAMFORMING_CAP_NONE) + return; + + /*if(Operation == SCAN_OPT_BACKUP_BAND0) + { + rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812A, 0xC8); + } + else if(Operation == SCAN_OPT_RESTORE) + { + rtw_write8(Adapter, REG_SND_PTCL_CTRL_8812A, 0xCB); + }*/ +} + +#endif /*#if (BEAMFORMING_SUPPORT == 0) for driver's TxBF*/ +#endif /*CONFIG_BEAMFORMING*/ + +static void hw_var_set_monitor(PADAPTER Adapter, u8 variable, u8 *val) +{ + u32 value_rcr, rcr_bits; + u16 value_rxfltmap2; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); + + if (*((u8 *)val) == _HW_STATE_MONITOR_) { + + /* Leave IPS */ + rtw_pm_set_ips(Adapter, IPS_NONE); + LeaveAllPowerSaveMode(Adapter); + + /* Receive all type */ + rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_ACF | RCR_AMF | RCR_APP_PHYST_RXFF; + + /* Append FCS */ + rcr_bits |= RCR_APPFCS; + + #if 0 + /* + CRC and ICV packet will drop in recvbuf2recvframe() + We no turn on it. + */ + rcr_bits |= (RCR_ACRC32 | RCR_AICV); + #endif + + /* Receive all data frames */ + value_rxfltmap2 = 0xFFFF; + + value_rcr = rcr_bits; + rtw_write32(Adapter, REG_RCR, value_rcr); + + rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2); + + #if 0 + /* tx pause */ + rtw_write8(padapter, REG_TXPAUSE, 0xFF); + #endif + } else { + /* do nothing */ + } + +} + +static void hw_var_set_opmode(PADAPTER Adapter, u8 variable, u8* val) +{ + u8 val8; + u8 mode = *((u8 *)val); + u32 value_rcr; + static u8 isMonitor = _FALSE; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if (isMonitor == _TRUE) { + /* reset RCR */ + rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); + isMonitor = _FALSE; + } + + if (mode == _HW_STATE_MONITOR_) { + isMonitor = _TRUE; + /* set net_type */ + Set_MSR(Adapter, _HW_STATE_NOLINK_); + + hw_var_set_monitor(Adapter, variable, val); + return; + } + +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + // disable Port1 TSF update + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|DIS_TSF_UDT); + + // set net_type + val8 = rtw_read8(Adapter, MSR)&0x03; + val8 |= (mode<<2); + rtw_write8(Adapter, MSR, val8); + + RTW_INFO("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); + + if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) + { + if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) + { + StopTxBeacon(Adapter); +#ifdef CONFIG_PCI_HCI + UpdateInterruptMask8814AE(Adapter, 0, 0, RT_BCN_INT_MASKS, 0); +#else //CONFIG_PCI_HCI + #ifdef CONFIG_INTERRUPT_BASED_TXBCN + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms + UpdateInterruptMask8814AU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_8812); + #endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8814AU(Adapter,_TRUE ,0, (IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812)); + #endif// CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + + #endif //CONFIG_INTERRUPT_BASED_TXBCN +#endif //CONFIG_PCI_HCI + } + + rtw_write8(Adapter,REG_BCN_CTRL_1, 0x11);//disable atim wnd and disable beacon function + //rtw_write8(Adapter,REG_BCN_CTRL_1, 0x18); + } + else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) + { +#ifdef RTL8814AE_SW_BCN + /*Beacon is polled to TXBUF*/ + rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR)|BIT(8)); + RTW_INFO("%s-%d: enable SW BCN, REG_CR=0x%x\n", __func__, __LINE__, rtw_read32(Adapter, REG_CR)); +#endif + ResumeTxBeacon(Adapter); + rtw_write8(Adapter,REG_BCN_CTRL_1, 0x1a); + } + else if(mode == _HW_STATE_AP_) + { +#ifdef CONFIG_PCI_HCI + UpdateInterruptMask8814AE(Adapter, RT_BCN_INT_MASKS, 0, 0, 0); +#else + #ifdef CONFIG_INTERRUPT_BASED_TXBCN + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + UpdateInterruptMask8814AU(Adapter,_TRUE ,IMR_BCNDMAINT0_8812, 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8814AU(Adapter,_TRUE ,(IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812), 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + + #endif //CONFIG_INTERRUPT_BASED_TXBCN +#endif + + ResumeTxBeacon(Adapter); + + rtw_write8(Adapter, REG_BCN_CTRL_1, 0x12); + +#ifdef RTL8814AE_SW_BCN + rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR)|BIT(8)); + RTW_INFO("%s-%d: enable SW BCN, REG_CR=0x%x\n", __func__, __LINE__, rtw_read32(Adapter, REG_CR)); +#endif + //Set RCR + //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 + //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 + //rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet + value_rcr = rtw_read32(Adapter, REG_RCR); + value_rcr &= ~(RCR_CBSSID_DATA);//Clear CBSSID_DATA + rtw_write32(Adapter, REG_RCR, value_rcr); + + //enable to rx data frame + rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); + + //Beacon Control related register for first time + rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms + + //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); + rtw_write8(Adapter, REG_ATIMWND_1, 0x0a); // 10ms for port1 + rtw_write16(Adapter, REG_BCNTCFG, 0x00); + rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); + rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) + + //reset TSF2 + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); + + //enable BCN1 Function for if2 + //don't enable update TSF1 for if2 (due to TSF update when beacon/probe rsp are received) + rtw_write8(Adapter, REG_BCN_CTRL_1, (DIS_TSF_UDT|EN_BCN_FUNCTION | EN_TXBCN_RPT|DIS_BCNQ_SUB)); + +#ifdef CONFIG_CONCURRENT_MODE + if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) + rtw_write8(Adapter, REG_BCN_CTRL, + rtw_read8(Adapter, REG_BCN_CTRL) & ~EN_BCN_FUNCTION); +#endif + //BCN1 TSF will sync to BCN0 TSF with offset(0x518) if if1_sta linked + //rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(5)); + //rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(3)); + + //dis BCN0 ATIM WND if if1 is station + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|DIS_ATIM); + +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Reset TSF for STA+AP concurrent mode + if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { + if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) + RTW_INFO("ERROR! %s()-%d: Reset port1 TSF fail\n", + __FUNCTION__, __LINE__); + } +#endif // CONFIG_TSF_RESET_OFFLOAD + } + } + else //else for port0 +#endif // CONFIG_CONCURRENT_MODE + { + // disable Port0 TSF update + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|DIS_TSF_UDT); + + // set net_type + val8 = rtw_read8(Adapter, MSR)&0x0c; + val8 |= mode; + rtw_write8(Adapter, MSR, val8); + + RTW_INFO("%s()-%d mode = %d\n", __FUNCTION__, __LINE__, mode); + + if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) + { +#ifdef CONFIG_CONCURRENT_MODE + if(!check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) +#endif // CONFIG_CONCURRENT_MODE + { + StopTxBeacon(Adapter); +#ifdef CONFIG_PCI_HCI + UpdateInterruptMask8814AE(Adapter, 0, 0, RT_BCN_INT_MASKS, 0); +#else + #ifdef CONFIG_INTERRUPT_BASED_TXBCN + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + rtw_write8(Adapter, REG_DRVERLYINT, 0x05);//restore early int time to 5ms + UpdateInterruptMask8814AU(Adapter,_TRUE, 0, IMR_BCNDMAINT0_8812); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8814AU(Adapter,_TRUE ,0, (IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812)); + #endif //CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + + #endif //CONFIG_INTERRUPT_BASED_TXBCN +#endif + } + + rtw_write8(Adapter,REG_BCN_CTRL, 0x19);//disable atim wnd + //rtw_write8(Adapter,REG_BCN_CTRL, 0x18); + } + else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) + { +#ifdef RTL8814AE_SW_BCN + rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR)|BIT(8)); + RTW_INFO("%s-%d: enable SW BCN, REG_CR=0x%x\n", __func__, __LINE__, rtw_read32(Adapter, REG_CR)); +#endif + ResumeTxBeacon(Adapter); + rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); + } + else if(mode == _HW_STATE_AP_) + { +#ifdef CONFIG_PCI_HCI + UpdateInterruptMask8814AE(Adapter, RT_BCN_INT_MASKS, 0, 0, 0); +#else + #ifdef CONFIG_INTERRUPT_BASED_TXBCN + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + UpdateInterruptMask8814AU(Adapter,_TRUE ,IMR_BCNDMAINT0_8812, 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + + #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + UpdateInterruptMask8814AU(Adapter,_TRUE ,(IMR_TXBCN0ERR_8812|IMR_TXBCN0OK_8812), 0); + #endif//CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + + #endif //CONFIG_INTERRUPT_BASED_TXBCN +#endif + + ResumeTxBeacon(Adapter); + + rtw_write8(Adapter, REG_BCN_CTRL, 0x12); + /*Beacon is polled to TXBUF*/ +#ifdef RTL8814AE_SW_BCN + rtw_write16(Adapter, REG_CR, rtw_read16(Adapter, REG_CR)|BIT(8)); + RTW_INFO("%s-%d: enable SW BCN, REG_CR=0x%x\n", __func__, __LINE__, rtw_read32(Adapter, REG_CR)); +#endif + + //Set RCR + //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 + //rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 + //rtw_write32(Adapter, REG_RCR, 0x7000208e);//CBSSID_DATA must set to 0,reject ICV_ERR packet + value_rcr = rtw_read32(Adapter, REG_RCR); + value_rcr &= ~(RCR_CBSSID_DATA);//Clear CBSSID_DATA + rtw_write32(Adapter, REG_RCR, value_rcr); + + //enable to rx data frame + rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); + + //Beacon Control related register for first time + rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms + + //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); + rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms + rtw_write16(Adapter, REG_BCNTCFG, 0x00); + rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0xff04); + rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET, 0x7fff);// +32767 (~32ms) + + //reset TSF + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); + + //enable BCN0 Function for if1 + //don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) + rtw_write8(Adapter, REG_BCN_CTRL, (DIS_TSF_UDT|EN_BCN_FUNCTION | EN_TXBCN_RPT|DIS_BCNQ_SUB)); + +#ifdef CONFIG_CONCURRENT_MODE + if(check_buddy_fwstate(Adapter, WIFI_FW_NULL_STATE)) + rtw_write8(Adapter, REG_BCN_CTRL_1, + rtw_read8(Adapter, REG_BCN_CTRL_1) & ~EN_BCN_FUNCTION); +#endif + + //dis BCN1 ATIM WND if if2 is station + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|DIS_ATIM); +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Reset TSF for STA+AP concurrent mode + if ( check_buddy_fwstate(Adapter, (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ) { + if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) + RTW_INFO("ERROR! %s()-%d: Reset port0 TSF fail\n", + __FUNCTION__, __LINE__); + } +#endif // CONFIG_TSF_RESET_OFFLOAD + } + } +} + +static void hw_var_set_macaddr(PADAPTER Adapter, u8 variable, u8* val) +{ + u8 idx = 0; + u32 reg_macid; + +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + reg_macid = REG_MACID1; + } + else +#endif + { + reg_macid = REG_MACID; + } + + for(idx = 0 ; idx < 6; idx++) + { + rtw_write8(GET_PRIMARY_ADAPTER(Adapter), (reg_macid+idx), val[idx]); + } + +} + +static void hw_var_set_bssid(PADAPTER Adapter, u8 variable, u8* val) +{ + u8 idx = 0; + u32 reg_bssid; + +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + reg_bssid = REG_BSSID1; + } + else +#endif //CONFIG_CONCURRENT_MODE + { + reg_bssid = REG_BSSID; + } + + for(idx = 0 ; idx < 6; idx++) + { + rtw_write8(Adapter, (reg_bssid+idx), val[idx]); + } + +} + +static void hw_var_set_bcn_func(PADAPTER Adapter, u8 variable, u8* val) +{ + u32 bcn_ctrl_reg; + u8 val8; +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + { + bcn_ctrl_reg = REG_BCN_CTRL_1; + } + else +#endif + { + bcn_ctrl_reg = REG_BCN_CTRL; + } + + if(*((u8 *)val)) + { + rtw_write8(Adapter, bcn_ctrl_reg, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); + } + else + { + + u8 val8; + val8 = rtw_read8(Adapter, bcn_ctrl_reg); + val8 &= ~(EN_BCN_FUNCTION | EN_TXBCN_RPT); + +#ifdef CONFIG_BT_COEXIST + if (GET_HAL_DATA(Adapter)->EEPROMBluetoothCoexist == 1) + { + // Always enable port0 beacon function for PSTDMA + if (REG_BCN_CTRL == bcn_ctrl_reg) + val8 |= EN_BCN_FUNCTION; + } +#endif //CONFIG_BT_COEXIST + + rtw_write8(Adapter, bcn_ctrl_reg, val8); + } + + +} + +static void hw_var_set_correct_tsf(PADAPTER Adapter, u8 variable, u8* val) +{ +#if 0 //check 8814 still need sw sync tsf?? +#ifdef CONFIG_CONCURRENT_MODE + u64 tsf; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us + tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us + + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) + //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); + StopTxBeacon(Adapter); + } + + if(Adapter->iface_type == IFACE_PORT1) + { + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); + + rtw_write32(Adapter, REG_TSFTR1, tsf); + rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); + + + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); + + // Update buddy port's TSF if it is SoftAP for beacon TX issue! + if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE + && check_buddy_fwstate(Adapter, WIFI_AP_STATE) + ) { + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); + + rtw_write32(Adapter, REG_TSFTR, tsf); + rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); + + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Update buddy port's TSF(TBTT) if it is SoftAP for beacon TX issue! + if (reset_tsf(Adapter, IFACE_PORT0) == _FALSE) + RTW_INFO("ERROR! %s()-%d: Reset port0 TSF fail\n", + __FUNCTION__, __LINE__); + +#endif // CONFIG_TSF_RESET_OFFLOAD + } + + + } + else + { + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); + + rtw_write32(Adapter, REG_TSFTR, tsf); + rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); + + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); + + // Update buddy port's TSF if it is SoftAP for beacon TX issue! + if ( (pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE + && check_buddy_fwstate(Adapter, WIFI_AP_STATE) + ) { + //disable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); + + rtw_write32(Adapter, REG_TSFTR1, tsf); + rtw_write32(Adapter, REG_TSFTR1+4, tsf>>32); + + //enable related TSF function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(3)); +#ifdef CONFIG_TSF_RESET_OFFLOAD + // Update buddy port's TSF if it is SoftAP for beacon TX issue! + if (reset_tsf(Adapter, IFACE_PORT1) == _FALSE) + RTW_INFO("ERROR! %s()-%d: Reset port1 TSF fail\n", + __FUNCTION__, __LINE__); +#endif // CONFIG_TSF_RESET_OFFLOAD + } + + } + + + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause &= (~STOP_BCNQ); + //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); + ResumeTxBeacon(Adapter); + } +#endif //CONFIG_CONCURRENT_MODE +#endif //0 +} + +static void hw_var_set_mlme_disconnect(PADAPTER Adapter, u8 variable, u8* val) +{ +#ifdef CONFIG_CONCURRENT_MODE + + if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) + rtw_write16(Adapter, REG_RXFLTMAP2, 0x00); + + + if(Adapter->iface_type == IFACE_PORT1) + { + //reset TSF1 + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)); + + //disable update TSF1 + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)|BIT(4)); + + // disable Port1's beacon function + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(3))); + } + else + { + //reset TSF + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); + + //disable update TSF + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); + } +#endif //CONFIG_CONCURRENT_MODE +} + +static void hw_var_set_mlme_sitesurvey(PADAPTER Adapter, u8 variable, u8* val) +{ + struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter); + u32 value_rcr, rcr_clear_bit, reg_bcn_ctl; + u16 value_rxfltmap2; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv=&(Adapter->mlmepriv); + u8 ap_num = 0; + +#ifdef DBG_IFACE_STATUS + DBG_IFACE_STATUS_DUMP(Adapter); +#endif + +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + reg_bcn_ctl = REG_BCN_CTRL_1; + else +#endif //CONFIG_CONCURRENT_MODE + reg_bcn_ctl = REG_BCN_CTRL; + +#ifdef CONFIG_FIND_BEST_CHANNEL + + rcr_clear_bit = (RCR_CBSSID_BCN | RCR_CBSSID_DATA); + + /* Receive all data frames */ + value_rxfltmap2 = 0xFFFF; + +#else /* CONFIG_FIND_BEST_CHANNEL */ + + rcr_clear_bit = RCR_CBSSID_BCN; + + //config RCR to receive different BSSID & not to receive data frame + value_rxfltmap2 = 0; + +#endif /* CONFIG_FIND_BEST_CHANNEL */ + + if( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) +#ifdef CONFIG_CONCURRENT_MODE + || (check_buddy_fwstate(Adapter, WIFI_AP_STATE) == _TRUE) +#endif + ) + { + rcr_clear_bit = RCR_CBSSID_BCN; + } +#ifdef CONFIG_TDLS + // TDLS will clear RCR_CBSSID_DATA bit for connection. + else if (Adapter->tdlsinfo.link_established == _TRUE) + { + rcr_clear_bit = RCR_CBSSID_BCN; + } +#endif // CONFIG_TDLS + + value_rcr = rtw_read32(Adapter, REG_RCR); + + if(*((u8 *)val))//under sitesurvey + { + value_rcr &= ~(rcr_clear_bit); + rtw_write32(Adapter, REG_RCR, value_rcr); + + rtw_write16(Adapter, REG_RXFLTMAP2, value_rxfltmap2); + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) { + //disable update TSF + rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)|DIS_TSF_UDT); + } + + // Save orignal RRSR setting. + pHalData->RegRRSR = rtw_read16(Adapter, REG_RRSR); + + if (ap_num) + StopTxBeacon(Adapter); + } + else//sitesurvey done + { + if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) +#ifdef CONFIG_CONCURRENT_MODE + || check_buddy_fwstate(Adapter, (_FW_LINKED|WIFI_AP_STATE)) +#endif + ) + { + //enable to rx data frame + rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); + } + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_ADHOC_STATE |WIFI_ADHOC_MASTER_STATE)) { + //enable update TSF + rtw_write8(Adapter, reg_bcn_ctl, rtw_read8(Adapter, reg_bcn_ctl)&(~(DIS_TSF_UDT))); + } + + value_rcr |= rcr_clear_bit; + rtw_write32(Adapter, REG_RCR, value_rcr); + + // Restore orignal RRSR setting. + rtw_write16(Adapter, REG_RRSR, pHalData->RegRRSR); + + if (ap_num) { + int i; + _adapter *iface; + + ResumeTxBeacon(Adapter); + for (i = 0; i < dvobj->iface_nums; i++) { + iface = dvobj->padapters[i]; + if (!iface) + continue; + + if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE + && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE + ) { + iface->mlmepriv.update_bcn = _TRUE; + #ifndef CONFIG_INTERRUPT_BASED_TXBCN + #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) + tx_beacon_hdl(iface, NULL); + #endif + #endif + } + } + } + } +} + +static void hw_var_set_mlme_join(PADAPTER Adapter, u8 variable, u8* val) +{ +#ifdef CONFIG_CONCURRENT_MODE + u8 RetryLimit = 0x30; + u8 type = *((u8 *)val); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; + + if(type == 0) // prepare to join + { + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) + { + StopTxBeacon(Adapter); + } + + //enable to rx data frame.Accept all data frame + //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); + rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE)) + { + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); + } + else + { + rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); + } + + if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + { + RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + } + else // Ad-hoc Mode + { + RetryLimit = 0x7; + } + } + else if(type == 1) //joinbss_event call back when join res < 0 + { + if(check_buddy_mlmeinfo_state(Adapter, _HW_STATE_NOLINK_)) + rtw_write16(Adapter, REG_RXFLTMAP2,0x00); + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) + { + ResumeTxBeacon(Adapter); + + //reset TSF 1/2 after ResumeTxBeacon + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); + + } + } + else if(type == 2) //sta add event call back + { + + //enable update TSF + if(Adapter->iface_type == IFACE_PORT1) + rtw_write8(Adapter, REG_BCN_CTRL_1, rtw_read8(Adapter, REG_BCN_CTRL_1)&(~BIT(4))); + else + rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); + + + if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) + { + //fixed beacon issue for 8191su........... + rtw_write8(Adapter,0x542 ,0x02); + RetryLimit = 0x7; + } + + + if(check_buddy_mlmeinfo_state(Adapter, WIFI_FW_AP_STATE) && + check_buddy_fwstate(Adapter, _FW_LINKED)) + { + ResumeTxBeacon(Adapter); + + //reset TSF 1/2 after ResumeTxBeacon + rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(1)|BIT(0)); + } + + } + + rtw_write16(Adapter, REG_RETRY_LIMIT, BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit)); + +#endif //CONFIG_CONCURRENT_MODE +} + +static void rtw_store_all_sta_hwseq(_adapter *padapter) +{ + _irqL irqL; + _list *plist, *phead; + u8 index; + u16 hw_seq[NUM_STA]; + u32 shcut_addr = 0; + struct sta_info *psta; + struct sta_priv *pstapriv = &padapter->stapriv; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + + /* save each HW sequence of mac id from report fifo */ + for (index = 0; index < macid_ctl->num && index < NUM_STA; index++) { + if (rtw_macid_is_used(macid_ctl, index)) { + rtw_write16(padapter, 0x140, 0x662 | ((index & BIT5)>>5)); + shcut_addr = 0x8000; + shcut_addr = (shcut_addr | ((index&0x1f)<<7) | (10<<2)) + 1; + hw_seq[index] = rtw_read16(padapter, shcut_addr); + /* RTW_INFO("mac_id:%d is used, hw_seq[index]=%d\n", index, hw_seq[index]); */ + } + } + + _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); + for (index = 0; index < NUM_STA; index++) { + psta = NULL; + + phead = &(pstapriv->sta_hash[index]); + plist = get_next(phead); + + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { + psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); + plist = get_next(plist); + + psta->hwseq = hw_seq[psta->cmn.mac_id]; + /* RTW_INFO(" psta->cmn.mac_id=%d, psta->hwseq=%d\n" , psta->cmn.mac_id, psta->hwseq); */ + } + + } + _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + +} + +static void rtw_restore_all_sta_hwseq(_adapter *padapter) +{ + _irqL irqL; + _list *plist, *phead; + u8 index; + u16 hw_seq[NUM_STA]; + u32 shcut_addr = 0; + struct sta_info *psta; + struct sta_priv *pstapriv = &padapter->stapriv; + struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); + struct macid_ctl_t *macid_ctl = dvobj_to_macidctl(dvobj); + + _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); + for (index = 0; index < NUM_STA; index++) { + psta = NULL; + + phead = &(pstapriv->sta_hash[index]); + plist = get_next(phead); + + while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { + psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); + plist = get_next(plist); + + hw_seq[psta->cmn.mac_id] = psta->hwseq; + /* RTW_INFO(" psta->cmn.mac_id=%d, psta->hwseq=%d\n", psta->cmn.mac_id, psta->hwseq); */ + } + + } + _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); + + /* restore each HW sequence of mac id to report fifo */ + for (index = 0; index < macid_ctl->num && index < NUM_STA; index++) { + if (rtw_macid_is_used(macid_ctl, index)) { + rtw_write16(padapter, 0x140, 0x662 | ((index & BIT5)>>5)); + shcut_addr = 0x8000; + shcut_addr = (shcut_addr | ((index&0x1f)<<7) | (10<<2)) + 1; + rtw_write16(padapter, shcut_addr, hw_seq[index]); + /* RTW_INFO("mac_id:%d is used, hw_seq[index]=%d\n", index, hw_seq[index]); */ + } + } + +} + +u8 SetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval) +{ + PHAL_DATA_TYPE pHalData; + struct dm_struct* podmpriv; + u8 ret = _SUCCESS; + u8 val8; + u16 val16; + u32 val32; + + pHalData = GET_HAL_DATA(padapter); + podmpriv = &pHalData->odmpriv; + + switch (variable) + { + case HW_VAR_MEDIA_STATUS: + val8 = rtw_read8(padapter, MSR) & 0x0c; + val8 |= *pval; + rtw_write8(padapter, MSR, val8); + break; + + case HW_VAR_SET_OPMODE: + hw_var_set_opmode(padapter, variable, pval); + break; + + case HW_VAR_MAC_ADDR: + hw_var_set_macaddr(padapter, variable, pval); + break; + + case HW_VAR_BSSID: + hw_var_set_bssid(padapter, variable, pval); + break; + + case HW_VAR_BASIC_RATE: + { + struct mlme_ext_info *mlmext_info = &padapter->mlmeextpriv.mlmext_info; + u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0; + u16 rrsr_2g_force_mask = RRSR_CCK_RATES; + u16 rrsr_2g_allow_mask = (RRSR_24M|RRSR_12M|RRSR_6M|RRSR_CCK_RATES); + u16 rrsr_5g_force_mask = (RRSR_6M); + u16 rrsr_5g_allow_mask = (RRSR_OFDM_RATES); + + HalSetBrateCfg(padapter, pval, &BrateCfg); + input_b = BrateCfg; + + /* apply force and allow mask */ + if(pHalData->current_band_type == BAND_ON_2_4G) + { + BrateCfg |= rrsr_2g_force_mask; + BrateCfg &= rrsr_2g_allow_mask; + } + else // 5G + { + BrateCfg |= rrsr_5g_force_mask; + BrateCfg &= rrsr_5g_allow_mask; + } + masked = BrateCfg; + + /* IOT consideration */ + if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) { + /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */ + if((BrateCfg & (RRSR_24M|RRSR_12M|RRSR_6M)) == 0) + BrateCfg |= RRSR_6M; + } + ioted = BrateCfg; + + pHalData->BasicRateSet = BrateCfg; + + RTW_INFO("HW_VAR_BASIC_RATE: %#x -> %#x -> %#x\n", input_b, masked, ioted); + + // Set RRSR rate table. + rtw_write16(padapter, REG_RRSR, BrateCfg); + rtw_write8(padapter, REG_RRSR+2, rtw_read8(padapter, REG_RRSR+2)&0xf0); + } + break; + + case HW_VAR_TXPAUSE: + rtw_write8(padapter, REG_TXPAUSE, *pval); + break; + + case HW_VAR_BCN_FUNC: + hw_var_set_bcn_func(padapter, variable, pval); + break; + + case HW_VAR_CORRECT_TSF: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_correct_tsf(padapter, variable, pval); +#else //CONFIG_CONCURRENT_MODE + { + u64 tsf; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us + tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us + + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) + //rtw_write8(padapter, REG_TXPAUSE, (rtw_read8(padapter, REG_TXPAUSE)|BIT(6))); + StopTxBeacon(padapter); + } + + //disable related TSF function + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); + //select port0 tsf + rtw_write8(padapter, REG_BCN_INTERVAL+3, rtw_read8(padapter, REG_BCN_INTERVAL+3)&0x8f); + rtw_write32(padapter, REG_TSFTR, tsf); + rtw_write32(padapter, REG_TSFTR+4, tsf>>32); + + //enable related TSF function + rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); + + + if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) + { + //pHalData->RegTxPause &= (~STOP_BCNQ); + //rtw_write8(padapter, REG_TXPAUSE, (rtw_read8(padapter, REG_TXPAUSE)&(~BIT(6)))); + ResumeTxBeacon(padapter); + } + } +#endif //CONFIG_CONCURRENT_MODE + break; + + case HW_VAR_MLME_DISCONNECT: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_mlme_disconnect(padapter, variable, pval); +#else + { + // Set RCR to not to receive data frame when NO LINK state +// val32 = rtw_read32(padapter, REG_RCR); +// val32 &= ~RCR_ADF; +// rtw_write32(padapter, REG_RCR, val32); + + // reject all data frames + rtw_write16(padapter, REG_RXFLTMAP2, 0x00); + + // reset TSF + val8 = BIT(0) | BIT(1); + rtw_write8(padapter, REG_DUAL_TSF_RST, val8); + + // disable update TSF + val8 = rtw_read8(padapter, REG_BCN_CTRL); + val8 |= BIT(4); + rtw_write8(padapter, REG_BCN_CTRL, val8); + } +#endif + break; + + case HW_VAR_MLME_SITESURVEY: + hw_var_set_mlme_sitesurvey(padapter, variable, pval); + +#ifdef CONFIG_BT_COEXIST + if (_TRUE == pHalData->EEPROMBluetoothCoexist) + rtw_btcoex_ScanNotify(padapter, *pval?_TRUE:_FALSE); +#endif + break; + + case HW_VAR_MLME_JOIN: +#ifdef CONFIG_CONCURRENT_MODE + hw_var_set_mlme_join(padapter, variable, pval); +#else // !CONFIG_CONCURRENT_MODE + { + u8 RetryLimit = RL_VAL_AP; + u8 type = *(u8*)pval; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + + if (type == 0) // prepare to join + { + //enable to rx data frame.Accept all data frame + rtw_write16(padapter, REG_RXFLTMAP2, 0xFFFF); + + if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) + { + RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; + } + else // Ad-hoc Mode + { + RetryLimit = RL_VAL_AP; + } + } + else if (type == 1) //joinbss_event call back when join res < 0 + { + rtw_write16(padapter, REG_RXFLTMAP2, 0x00); + } + else if (type == 2) //sta add event call back + { + //enable update TSF + val8 = rtw_read8(padapter, REG_BCN_CTRL); + val8 &= ~BIT(4); + rtw_write8(padapter, REG_BCN_CTRL, val8); + + if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) + { + RetryLimit = RL_VAL_AP; + } + } + + val16 = BIT_SRL(RetryLimit) | BIT_LRL(RetryLimit); + rtw_write16(padapter, REG_RETRY_LIMIT, val16); + } +#endif // !CONFIG_CONCURRENT_MODE + +#ifdef CONFIG_BT_COEXIST + if (_TRUE == pHalData->EEPROMBluetoothCoexist) + { + switch (*pval) + { + case 0: + // prepare to join + rtw_btcoex_ConnectNotify(padapter, _TRUE); + break; + case 1: + // joinbss_event callback when join res < 0 + rtw_btcoex_ConnectNotify(padapter, _FALSE); + break; + case 2: + // sta add event callback + // rtw_btcoex_MediaStatusNotify(padapter, RT_MEDIA_CONNECT); + break; + } + } +#endif + break; + + + case HW_VAR_BEACON_INTERVAL: + rtw_write16(padapter, REG_BCN_INTERVAL, *(u16*)pval); +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + { + struct mlme_ext_priv *pmlmeext; + struct mlme_ext_info *pmlmeinfo; + u16 bcn_interval; + + pmlmeext = &padapter->mlmeextpriv; + pmlmeinfo = &pmlmeext->mlmext_info; + bcn_interval = *((u16*)pval); + + if ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) + { + RTW_INFO("%s==> bcn_interval:%d, eraly_int:%d\n", __FUNCTION__, bcn_interval, bcn_interval>>1); + rtw_write8(padapter, REG_DRVERLYINT, bcn_interval>>1);// 50ms for sdio + } + } +#endif // CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + break; + + case HW_VAR_SLOT_TIME: + rtw_write8(padapter, REG_SLOT, *pval); + break; + + case HW_VAR_RESP_SIFS: + // SIFS_Timer = 0x0a0a0808; + // RESP_SIFS for CCK + rtw_write8(padapter, REG_RESP_SIFS_CCK, pval[0]); // SIFS_T2T_CCK (0x08) + rtw_write8(padapter, REG_RESP_SIFS_CCK+1, pval[1]); //SIFS_R2T_CCK(0x08) + // RESP_SIFS for OFDM + rtw_write8(padapter, REG_RESP_SIFS_OFDM, pval[2]); //SIFS_T2T_OFDM (0x0a) + rtw_write8(padapter, REG_RESP_SIFS_OFDM+1, pval[3]); //SIFS_R2T_OFDM(0x0a) + break; + + case HW_VAR_ACK_PREAMBLE: + { + u8 bShortPreamble = *pval; + + // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) + val8 = (pHalData->nCur40MhzPrimeSC) << 5; + if (bShortPreamble) + val8 |= 0x80; + rtw_write8(padapter, REG_RRSR+2, val8); + } + break; + + case HW_VAR_CAM_EMPTY_ENTRY: + { + u8 ucIndex = *pval; + u8 i; + u32 ulCommand = 0; + u32 ulContent = 0; + u32 ulEncAlgo = CAM_AES; + + for (i=0; iac_param_be = *(u32*)pval; + rtw_write32(padapter, REG_EDCA_BE_PARAM, *(u32*)pval); + break; + + case HW_VAR_AC_PARAM_BK: + rtw_write32(padapter, REG_EDCA_BK_PARAM, *(u32*)pval); + break; + + case HW_VAR_ACM_CTRL: + { + u8 acm_ctrl; + u8 AcmCtrl; + + acm_ctrl = *(u8*)pval; + AcmCtrl = rtw_read8(padapter, REG_ACMHWCTRL); + + if (acm_ctrl > 1) + AcmCtrl = AcmCtrl | 0x1; + + if (acm_ctrl & BIT(3)) + AcmCtrl |= AcmHw_VoqEn; + else + AcmCtrl &= (~AcmHw_VoqEn); + + if (acm_ctrl & BIT(2)) + AcmCtrl |= AcmHw_ViqEn; + else + AcmCtrl &= (~AcmHw_ViqEn); + + if (acm_ctrl & BIT(1)) + AcmCtrl |= AcmHw_BeqEn; + else + AcmCtrl &= (~AcmHw_BeqEn); + + RTW_INFO("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl); + rtw_write8(padapter, REG_ACMHWCTRL, AcmCtrl ); + } + break; + case HW_VAR_AMPDU_FACTOR: + { + u32 AMPDULen = *(u8*)pval; + + RTW_INFO("SetHwReg8814AU(): HW_VAR_AMPDU_FACTOR %x\n" ,AMPDULen); + + if(AMPDULen < VHT_AGG_SIZE_256K) + AMPDULen = (0x2000 << (*((u8*)pval))) -1; + else + AMPDULen = 0x3ffff; + rtw_write32(padapter, REG_AMPDU_MAX_LENGTH_8814A, AMPDULen); + //RTW_INFO("SetHwReg8814AU(): HW_VAR_AMPDU_FACTOR %x\n" ,AMPDULen); + } + break; + case HW_VAR_H2C_FW_PWRMODE: + { + u8 psmode = *pval; + rtl8814_set_FwPwrMode_cmd(padapter, psmode); + } + break; + + case HW_VAR_H2C_FW_JOINBSSRPT: + rtl8814_set_FwJoinBssReport_cmd(padapter, *pval); + break; + +#ifdef CONFIG_P2P_PS + case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: + rtl8814_set_p2p_ps_offload_cmd(padapter, *pval); + break; +#endif // CONFIG_P2P_PS + +#ifdef CONFIG_SW_ANTENNA_DIVERSITY + case HW_VAR_ANTENNA_DIVERSITY_LINK: + //SwAntDivRestAfterLink8192C(padapter); + ODM_SwAntDivRestAfterLink(podmpriv); + break; + + case HW_VAR_ANTENNA_DIVERSITY_SELECT: + { + u8 Optimum_antenna = *pval; + u8 Ant; + + //switch antenna to Optimum_antenna + //RTW_INFO("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); + if (pHalData->CurAntenna != Optimum_antenna) + { + Ant = (Optimum_antenna==2) ? MAIN_ANT : AUX_ANT; + ODM_UpdateRxIdleAnt(podmpriv, Ant); + + pHalData->CurAntenna = Optimum_antenna; + //RTW_INFO("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); + } + } + break; +#endif //CONFIG_SW_ANTENNA_DIVERSITY + + case HW_VAR_EFUSE_USAGE: + pHalData->EfuseUsedPercentage = *pval; + break; + + case HW_VAR_EFUSE_BYTES: + pHalData->EfuseUsedBytes = *(u16*)pval; + break; +#if 0 + case HW_VAR_EFUSE_BT_USAGE: +#ifdef HAL_EFUSE_MEMORY + pHalData->EfuseHal.BTEfuseUsedPercentage = *pval; +#endif //HAL_EFUSE_MEMORY + break; + + case HW_VAR_EFUSE_BT_BYTES: +#ifdef HAL_EFUSE_MEMORY + pHalData->EfuseHal.BTEfuseUsedBytes = *(u16*)pval; +#else //HAL_EFUSE_MEMORY + BTEfuseUsedBytes = *(u16*)pval; +#endif //HAL_EFUSE_MEMORY + break; +#endif //0 + case HW_VAR_FIFO_CLEARN_UP: + { + struct pwrctrl_priv *pwrpriv; + u8 trycnt = 100; + + pwrpriv = adapter_to_pwrctl(padapter); + + // pause tx + rtw_write8(padapter, REG_TXPAUSE, 0xff); + + // keep sn + rtw_store_all_sta_hwseq(padapter); + + if (pwrpriv->bkeepfwalive != _TRUE) + { + // RX DMA stop + val32 = rtw_read32(padapter, REG_RXPKT_NUM); + val32 |= RW_RELEASE_EN; + rtw_write32(padapter, REG_RXPKT_NUM, val32); + do { + val32 = rtw_read32(padapter, REG_RXPKT_NUM); + val32 &= RXDMA_IDLE; + if (val32) + break; + } while (--trycnt); + if (trycnt == 0) + { + RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] Stop RX DMA failed......\n"); + } + + //RQPN Load 0 + rtw_write16(padapter, REG_RQPN_NPQ, 0x0); + rtw_write32(padapter, REG_RQPN, 0x80000000); + rtw_mdelay_os(10); + } + } + break; + + case HW_VAR_RESTORE_HW_SEQ: + rtw_restore_all_sta_hwseq(padapter); + break; + + case HW_VAR_CHECK_TXBUF: + { + u8 retry_limit; + u32 reg_230 = 0, reg_234 = 0, reg_238 = 0, reg_23c = 0, reg_240 = 0; + u32 init_reg_230 = 0, init_reg_234 = 0, init_reg_238 = 0, init_reg_23c = 0, init_reg_240 = 0; + systime start = rtw_get_current_time(); + u32 pass_ms; + int i = 0; + + retry_limit = 0x01; + + val16 = BIT_SRL(retry_limit) | BIT_LRL(retry_limit); + rtw_write16(padapter, REG_RETRY_LIMIT, val16); + + while (rtw_get_passing_time_ms(start) < 2000 + && !RTW_CANNOT_RUN(padapter) + ) { + reg_230 = rtw_read32(padapter, REG_FIFOPAGE_INFO_1_8814A); + reg_234 = rtw_read32(padapter, REG_FIFOPAGE_INFO_2_8814A); + reg_238 = rtw_read32(padapter, REG_FIFOPAGE_INFO_3_8814A); + reg_23c = rtw_read32(padapter, REG_FIFOPAGE_INFO_4_8814A); + reg_240 = rtw_read32(padapter, REG_FIFOPAGE_INFO_5_8814A); + + if (i == 0) { + init_reg_230 = reg_230; + init_reg_234 = reg_234; + init_reg_238 = reg_238; + init_reg_23c = reg_23c; + init_reg_240 = reg_240; + } + + i++; + if ((((reg_230 & 0x0c) != ((reg_230>>16) & 0x0c)) || ((reg_234 & 0x0c) != ((reg_234>>16) & 0x0c)) + || ((reg_238 & 0x0c) != ((reg_238>>16) & 0x0c)) || ((reg_23c & 0x0c) != ((reg_23c>>16) & 0x0c)) + || ((reg_240 & 0x0c) != ((reg_240>>16) & 0x0c)))) { + /* RTW_INFO("%s: (HW_VAR_CHECK_TXBUF)TXBUF NOT empty - 0x230=0x%08x, 0x234=0x%08x 0x238=0x%08x," + " 0x23c=0x%08x, 0x240=0x%08x (%d)\n" + , __FUNCTION__, reg_230, reg_234, reg_238, reg_23c, reg_240, i); */ + rtw_msleep_os(10); + } else { + break; + } + } + + pass_ms = rtw_get_passing_time_ms(start); + + if (RTW_CANNOT_RUN(padapter)) { + RTW_INFO("bDriverStopped or bSurpriseRemoved\n"); + } else if (pass_ms >= 2000 || (((reg_230 & 0x0c) != ((reg_230>>16) & 0x0c)) || ((reg_234 & 0x0c) != ((reg_234>>16) & 0x0c)) + || ((reg_238 & 0x0c) != ((reg_238>>16) & 0x0c)) || ((reg_23c & 0x0c) != ((reg_23c>>16) & 0x0c)) + || ((reg_240 & 0x0c) != ((reg_240>>16) & 0x0c)))) { + RTW_ERR("%s:(HW_VAR_CHECK_TXBUF)NOT empty(%d) in %d ms\n", __func__, i, pass_ms); + RTW_ERR("%s:(HW_VAR_CHECK_TXBUF) 0x230=0x%08x, 0x234=0x%08x 0x238=0x%08x, 0x23c=0x%08x, 0x240=0x%08x (0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x)\n", __func__, reg_230, reg_234, reg_238, reg_23c, reg_240 + , init_reg_230, init_reg_234, init_reg_238, init_reg_23c, init_reg_240); + //rtw_warn_on(1); + } else { + RTW_INFO("%s:(HW_VAR_CHECK_TXBUF)TXBUF Empty(%d) in %d ms\n", __FUNCTION__, i, pass_ms); + } + + retry_limit = RL_VAL_STA; + val16 = BIT_SRL(retry_limit) | BIT_LRL(retry_limit); + rtw_write16(padapter, REG_RETRY_LIMIT, val16); + } + + break; + + case HW_VAR_APFM_ON_MAC: + pHalData->bMacPwrCtrlOn = *pval; + RTW_INFO("%s: bMacPwrCtrlOn=%d\n", __FUNCTION__, pHalData->bMacPwrCtrlOn); + break; + + case HW_VAR_NAV_UPPER: + { + u32 usNavUpper = *((u32*)pval); + + if (usNavUpper > HAL_NAV_UPPER_UNIT * 0xFF) + { + RTW_INFO("%s: [HW_VAR_NAV_UPPER] set value(0x%08X us) is larger than (%d * 0xFF)!\n", + __FUNCTION__, usNavUpper, HAL_NAV_UPPER_UNIT); + break; + } + + // The value of ((usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT) + // is getting the upper integer. + //usNavUpper = (usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT; + rtw_write8(padapter, REG_NAV_UPPER, (u8)usNavUpper); + } + break; + + case HW_VAR_BCN_VALID: +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + { + /* BCN_VALID, BIT31 of REG_FIFOPAGE_CTRL_2_8814A, write 1 to clear, Clear by sw */ + val8 = rtw_read8(padapter, REG_FIFOPAGE_CTRL_2_8814A+3); + val8 |= BIT(7); + rtw_write8(padapter, REG_FIFOPAGE_CTRL_2_8814A+3, val8); + } + else +#endif + { + /* BCN_VALID, BIT15 of REG_FIFOPAGE_CTRL_2_8814A, write 1 to clear, Clear by sw */ + val8 = rtw_read8(padapter, REG_FIFOPAGE_CTRL_2_8814A+1); + val8 |= BIT(7); + rtw_write8(padapter, REG_FIFOPAGE_CTRL_2_8814A+1, val8); + } + break; + + case HW_VAR_DL_BCN_SEL: +#if 0 /* for MBSSID, so far we don't need this */ +#ifdef CONFIG_CONCURRENT_MODE + if (IS_HARDWARE_TYPE_8821(padapter) && padapter->iface_type == IFACE_PORT1) + { + // SW_BCN_SEL - Port1 + val8 = rtw_read8(padapter, REG_AUTO_LLT_8814A); + val8 |= BIT(2); + rtw_write8(padapter, REG_AUTO_LLT_8814A, val8); + } + else +#endif //CONFIG_CONCURRENT_MODE + { + /* SW_BCN_SEL - Port0 , BIT_r_EN_BCN_SW_HEAD_SEL */ + val8 = rtw_read8(padapter, REG_AUTO_LLT_8814A); + val8 &= ~BIT(2); + rtw_write8(padapter, REG_AUTO_LLT_8814A, val8); + } +#endif /* for MBSSID, so far we don't need this */ + break; + + case HW_VAR_WIRELESS_MODE: + { + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; + u8 R2T_SIFS = 0, SIFS_Timer = 0; + u8 wireless_mode = *pval; + + if ((wireless_mode == WIRELESS_11BG) || (wireless_mode == WIRELESS_11G)) + SIFS_Timer = 0xa; + else + SIFS_Timer = 0xe; + + // SIFS for OFDM Data ACK + rtw_write8(padapter, REG_SIFS_CTX+1, SIFS_Timer); + // SIFS for OFDM consecutive tx like CTS data! + rtw_write8(padapter, REG_SIFS_TRX+1, SIFS_Timer); + + rtw_write8(padapter,REG_SPEC_SIFS+1, SIFS_Timer); + rtw_write8(padapter,REG_MAC_SPEC_SIFS+1, SIFS_Timer); + + // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. + rtw_write8(padapter, REG_RESP_SIFS_OFDM+1, SIFS_Timer); + rtw_write8(padapter, REG_RESP_SIFS_OFDM, SIFS_Timer); + + // + // Adjust R2T SIFS for IOT issue. Add by hpfan 2013.01.25 + // Set R2T SIFS to 0x0a for Atheros IOT. Add by hpfan 2013.02.22 + // + // Mac has 10 us delay so use 0xa value is enough. + R2T_SIFS = 0xa; +#ifdef CONFIG_80211AC_VHT + if (wireless_mode & WIRELESS_11_5AC && + //MgntLinkStatusQuery(Adapter) && + TEST_FLAG(pmlmepriv->vhtpriv.ldpc_cap, LDPC_VHT_ENABLE_RX) && + TEST_FLAG(pmlmepriv->vhtpriv.stbc_cap, STBC_VHT_ENABLE_RX)) + { + if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS) + R2T_SIFS = 0x8; + else + R2T_SIFS = 0xa; + } +#endif //CONFIG_80211AC_VHT + + rtw_write8(padapter, REG_RESP_SIFS_OFDM+1, R2T_SIFS); + } + break; + + case HW_VAR_DO_IQK: + pHalData->bNeedIQK = _TRUE; + break; + case HW_VAR_DL_RSVD_PAGE: +#ifdef CONFIG_BT_COEXIST + if (pHalData->EEPROMBluetoothCoexist == 1) + { + if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) + { + rtl8814a_download_BTCoex_AP_mode_rsvd_page(padapter); + } + } +#endif // CONFIG_BT_COEXIST + break; +#ifdef CONFIG_BEAMFORMING +#if (BEAMFORMING_SUPPORT == 1) /*add by YuChen for PHYDM-TxBF AutoTest HW Timer*/ + case HW_VAR_HW_REG_TIMER_INIT: + { + HAL_HW_TIMER_TYPE TimerType = (*(PHAL_HW_TIMER_TYPE)pval)>>16; + + rtw_write8(padapter, 0x164, 1); + + if (TimerType == HAL_TIMER_TXBF) + rtw_write32(padapter, 0x15C, (*(pu2Byte)pval)); + else if (TimerType == HAL_TIMER_EARLYMODE) + rtw_write32(padapter, 0x160, 0x05000190); + break; + } + case HW_VAR_HW_REG_TIMER_START: + { + HAL_HW_TIMER_TYPE TimerType = *(PHAL_HW_TIMER_TYPE)pval; + + if (TimerType == HAL_TIMER_TXBF) + rtw_write8(padapter, 0x15F, 0x5); + else if (TimerType == HAL_TIMER_EARLYMODE) + rtw_write8(padapter, 0x163, 0x5); + break; + } + case HW_VAR_HW_REG_TIMER_RESTART: + { + HAL_HW_TIMER_TYPE TimerType = *(PHAL_HW_TIMER_TYPE)pval; + + if (TimerType == HAL_TIMER_TXBF) { + rtw_write8(padapter, 0x15F, 0x0); + rtw_write8(padapter, 0x15F, 0x5); + } else if (TimerType == HAL_TIMER_EARLYMODE) { + rtw_write8(padapter, 0x163, 0x0); + rtw_write8(padapter, 0x163, 0x5); + } + break; + } + case HW_VAR_HW_REG_TIMER_STOP: + { + HAL_HW_TIMER_TYPE TimerType = *(PHAL_HW_TIMER_TYPE)pval; + + if (TimerType == HAL_TIMER_TXBF) + rtw_write8(padapter, 0x15F, 0); + else if (TimerType == HAL_TIMER_EARLYMODE) + rtw_write8(padapter, 0x163, 0x0); + break; + } +#endif/*#if (BEAMFORMING_SUPPORT == 1) - for PHYDM TxBF*/ +#endif/*#ifdef CONFIG_BEAMFORMING*/ + + +#ifdef CONFIG_GPIO_WAKEUP + case HW_SET_GPIO_WL_CTRL: + { + u8 enable = *pval; + u8 value = rtw_read8(padapter, 0x4e); + if (enable && (value & BIT(6))) { + value &= ~BIT(6); + rtw_write8(padapter, 0x4e, value); + } else if (enable == _FALSE){ + value |= BIT(6); + rtw_write8(padapter, 0x4e, value); + } + RTW_INFO("%s: set WL control, 0x4E=0x%02X\n", + __func__, rtw_read8(padapter, 0x4e)); + } + break; +#endif + default: + ret = SetHwReg(padapter, variable, pval); + break; + } + return ret; + +} + +struct qinfo_8814a { + u32 head:8; + u32 pkt_num:7; + u32 tail:8; + u32 ac:2; + u32 macid:7; +}; + +struct bcn_qinfo_8814a { + u16 head:8; + u16 pkt_num:8; +}; + +void dump_qinfo_8814a(void *sel, struct qinfo_8814a *info, const char *tag) +{ + //if (info->pkt_num) + RTW_PRINT_SEL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n" + , tag ? tag : "", info->head, info->tail, info->pkt_num, info->macid, info->ac + ); +} + +void dump_bcn_qinfo_8814a(void *sel, struct bcn_qinfo_8814a *info, const char *tag) +{ + //if (info->pkt_num) + RTW_PRINT_SEL(sel, "%shead:0x%02x, pkt_num:%u\n" + , tag ? tag : "", info->head, info->pkt_num + ); +} + +void dump_mac_qinfo_8814a(void *sel, _adapter *adapter) +{ + u32 q0_info; + u32 q1_info; + u32 q2_info; + u32 q3_info; + u32 q4_info; + u32 q5_info; + u32 q6_info; + u32 q7_info; + u32 mg_q_info; + u32 hi_q_info; + u16 bcn_q_info; + + q0_info = rtw_read32(adapter, REG_Q0_INFO); + q1_info = rtw_read32(adapter, REG_Q1_INFO); + q2_info = rtw_read32(adapter, REG_Q2_INFO); + q3_info = rtw_read32(adapter, REG_Q3_INFO); + q4_info = rtw_read32(adapter, REG_Q4_INFO); + q5_info = rtw_read32(adapter, REG_Q5_INFO); + q6_info = rtw_read32(adapter, REG_Q6_INFO); + q7_info = rtw_read32(adapter, REG_Q7_INFO); + mg_q_info = rtw_read32(adapter, REG_MGQ_INFO); + hi_q_info = rtw_read32(adapter, REG_HGQ_INFO); + bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO); + + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q0_info, "Q0 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q1_info, "Q1 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q2_info, "Q2 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q3_info, "Q3 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q4_info, "Q4 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q5_info, "Q5 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q6_info, "Q6 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&q7_info, "Q7 "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&mg_q_info, "MG "); + dump_qinfo_8814a(sel, (struct qinfo_8814a *)&hi_q_info, "HI "); + dump_bcn_qinfo_8814a(sel, (struct bcn_qinfo_8814a *)&bcn_q_info, "BCN "); +} + +void GetHwReg8814A(PADAPTER padapter, u8 variable, u8 *pval) +{ + PHAL_DATA_TYPE pHalData; + struct dm_struct* podmpriv; + u8 val8; + u16 val16; + u32 val32; + + pHalData = GET_HAL_DATA(padapter); + podmpriv = &pHalData->odmpriv; + + switch (variable) + { + case HW_VAR_TXPAUSE: + *pval = rtw_read8(padapter, REG_TXPAUSE); + break; + + case HW_VAR_BCN_VALID: +#ifdef CONFIG_CONCURRENT_MODE + if (padapter->iface_type == IFACE_PORT1) + { + /* BCN_VALID, BIT31 of REG_FIFOPAGE_CTRL_2_8814A, write 1 to clear */ + val8 = rtw_read8(padapter, REG_FIFOPAGE_CTRL_2_8814A+3); + *pval = (BIT(7) & val8) ? _TRUE:_FALSE; + } + else +#endif //CONFIG_CONCURRENT_MODE + { + /* BCN_VALID, BIT15 of REG_FIFOPAGE_CTRL_2_8814A, write 1 to clear */ + val8 = rtw_read8(padapter, REG_FIFOPAGE_CTRL_2_8814A+1); + *pval = (BIT(7) & val8) ? _TRUE:_FALSE; + } + break; + + case HW_VAR_FWLPS_RF_ON: + //When we halt NIC, we should check if FW LPS is leave. + if(adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off) + { + // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, + // because Fw is unload. + *pval = _TRUE; + } + else + { + u32 valRCR; + valRCR = rtw_read32(padapter, REG_RCR); + valRCR &= 0x00070000; + if(valRCR) + *pval = _FALSE; + else + *pval = _TRUE; + } + + break; + +#ifdef CONFIG_ANTENNA_DIVERSITY + case HW_VAR_CURRENT_ANTENNA: + *pval = pHalData->CurAntenna; + break; +#endif //CONFIG_ANTENNA_DIVERSITY + + case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. + *(u16*)pval = pHalData->EfuseUsedBytes; + break; + + case HW_VAR_APFM_ON_MAC: + *pval = pHalData->bMacPwrCtrlOn; + break; + + case HW_VAR_CHK_HI_QUEUE_EMPTY: + val16 = rtw_read16(padapter, REG_TXPKT_EMPTY); + *pval = (val16 & BIT(10)) ? _TRUE:_FALSE; + break; + + case HW_VAR_DUMP_MAC_QUEUE_INFO: + dump_mac_qinfo_8814a(pval, padapter); + break; + + default: + GetHwReg(padapter, variable, pval); + break; + } + +} + +/* + * Description: + * Change default setting of specified variable. + */ +u8 SetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) +{ + PHAL_DATA_TYPE pHalData; + u8 bResult; + + + pHalData = GET_HAL_DATA(padapter); + bResult = _SUCCESS; + + switch (variable) + { + case HAL_DEF_EFUSE_BYTES: + pHalData->EfuseUsedBytes = *((u16*)pval); + break; + case HAL_DEF_EFUSE_USAGE: + pHalData->EfuseUsedPercentage = *((u8*)pval); + break; + default: + bResult = SetHalDefVar(padapter, variable, pval); + break; + } + + return bResult; +} + +/* + * Description: + * Query setting of specified variable. + */ +u8 GetHalDefVar8814A(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval) +{ + PHAL_DATA_TYPE pHalData; + u8 bResult; + + + pHalData = GET_HAL_DATA(padapter); + bResult = _SUCCESS; + + switch (variable) + { + + +#ifdef CONFIG_ANTENNA_DIVERSITY + case HAL_DEF_IS_SUPPORT_ANT_DIV: + *((u8*)pval) = (pHalData->AntDivCfg==0) ? _FALSE : _TRUE; + break; +#endif //CONFIG_ANTENNA_DIVERSITY + +#ifdef CONFIG_ANTENNA_DIVERSITY + case HAL_DEF_CURRENT_ANTENNA: + *((u8*)pval) = pHalData->CurAntenna; + break; +#endif //CONFIG_ANTENNA_DIVERSITY + + case HAL_DEF_DRVINFO_SZ: + *((u32*)pval) = DRVINFO_SZ; + break; + + case HAL_DEF_MAX_RECVBUF_SZ: + *((u32*)pval) = MAX_RECVBUF_SZ; + break; + + case HAL_DEF_RX_PACKET_OFFSET: + *((u32*)pval) = RXDESC_SIZE + DRVINFO_SZ*8; + break; + + case HW_VAR_MAX_RX_AMPDU_FACTOR: + *((u32*)pval) = MAX_AMPDU_FACTOR_64K; + break; + + case HW_VAR_BEST_AMPDU_DENSITY: + *((u32 *)pval) = AMPDU_DENSITY_VALUE_4; + break; + + case HAL_DEF_TX_LDPC: + *(u8*)pval = _TRUE; + break; + + case HAL_DEF_RX_LDPC: + *(u8*)pval = _TRUE; + break; + + case HAL_DEF_TX_STBC: + if (pHalData->rf_type == RF_1T2R || pHalData->rf_type == RF_1T1R) + *(u8 *)pval = 0; + else + *(u8 *)pval = 1; + break; + + case HAL_DEF_RX_STBC: + *(u8*)pval = 4; + break; + + case HAL_DEF_EXPLICIT_BEAMFORMER: + if (pHalData->rf_type != RF_1T2R || pHalData->rf_type != RF_1T1R)/*1T?R not support mer*/ + *((PBOOLEAN)pval) = _TRUE; + else + *((PBOOLEAN)pval) = _FALSE; + break; + case HAL_DEF_EXPLICIT_BEAMFORMEE: + *((PBOOLEAN)pval) = _TRUE; + break; + + case HW_DEF_RA_INFO_DUMP: +#if 0 + { + u8 mac_id = *(u8*)pval; + u32 cmd ; + u32 ra_info1, ra_info2; + u32 rate_mask1, rate_mask2; + u8 curr_tx_rate,curr_tx_sgi,hight_rate,lowest_rate; + + RTW_INFO("============ RA status check Mac_id:%d ===================\n", mac_id); + + cmd = 0x40000100 |mac_id; + rtw_write32(padapter,REG_HMEBOX_E2_E3_8812,cmd); + rtw_msleep_os(10); + ra_info1 = rtw_read32(padapter,REG_RSVD5_8812); + curr_tx_rate = ra_info1&0x7F; + curr_tx_sgi = (ra_info1>>7)&0x01; + RTW_INFO("[ ra_info1:0x%08x ] =>cur_tx_rate= %s,cur_sgi:%d, PWRSTS = 0x%02x \n", + ra_info1, + HDATA_RATE(curr_tx_rate), + curr_tx_sgi, + (ra_info1>>8) & 0x07); + + cmd = 0x40000400 | mac_id; + rtw_write32(padapter, REG_HMEBOX_E2_E3_8812,cmd); + rtw_msleep_os(10); + ra_info1 = rtw_read32(padapter, REG_RSVD5_8812); + ra_info2 = rtw_read32(padapter, REG_RSVD6_8812); + rate_mask1 = rtw_read32(padapter,REG_RSVD7_8812); + rate_mask2 = rtw_read32(padapter,REG_RSVD8_8812); + hight_rate = ra_info2&0xFF; + lowest_rate = (ra_info2>>8) & 0xFF; + RTW_INFO("[ ra_info1:0x%08x ] =>RSSI=%d, BW_setting=0x%02x, DISRA=0x%02x, VHT_EN=0x%02x\n", + ra_info1, + ra_info1&0xFF, + (ra_info1>>8) & 0xFF, + (ra_info1>>16) & 0xFF, + (ra_info1>>24) & 0xFF); + + RTW_INFO("[ ra_info2:0x%08x ] =>hight_rate=%s, lowest_rate=%s, SGI=0x%02x, RateID=%d\n", + ra_info2, + HDATA_RATE(hight_rate), + HDATA_RATE(lowest_rate), + (ra_info2>>16) & 0xFF, + (ra_info2>>24) & 0xFF); + RTW_INFO("rate_mask2=0x%08x, rate_mask1=0x%08x\n", rate_mask2, rate_mask1); + } +#else //0 + RTW_INFO("%s,%d, 8814 need to fix \n", __FUNCTION__,__LINE__); +#endif //0 + break; + + case HAL_DEF_TX_PAGE_SIZE: + *(u32*)pval = PAGE_SIZE_128; + break; + + case HAL_DEF_TX_PAGE_BOUNDARY: + if (!padapter->registrypriv.wifi_spec) + { + *(u16*)pval = TX_PAGE_BOUNDARY_8814A; + } + else + { + *(u16*)pval = WMM_NORMAL_TX_PAGE_BOUNDARY_8814A; + } + break; + + case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN: + *(u16*)pval = TX_PAGE_BOUNDARY_WOWLAN_8814A; + break; + + case HAL_DEF_EFUSE_BYTES: + *((u16*)(pval)) = pHalData->EfuseUsedBytes; + break; + case HAL_DEF_EFUSE_USAGE: + *((u32*)(pval)) = (pHalData->EfuseUsedPercentage<<16)|(pHalData->EfuseUsedBytes); + break; + case HAL_DEF_RX_DMA_SZ_WOW: + *((u32 *)pval) = RX_DMA_BOUNDARY_8814A + 1; + break; + case HAL_DEF_RX_DMA_SZ: + *((u32 *)pval) = RX_DMA_BOUNDARY_8814A + 1; + break; + case HAL_DEF_RX_PAGE_SIZE: + *((u32 *)pval) = 8; + break; + default: + bResult = GetHalDefVar(padapter, variable, pval); + break; + } + + return bResult; +} + + +#ifdef CONFIG_BT_COEXIST +void rtl8812a_combo_card_WifiOnlyHwInit(PADAPTER pdapter) +{ + u8 u1Tmp; + RTW_INFO("%s !\n", __FUNCTION__); + if(IS_HARDWARE_TYPE_8812(pdapter)) + { + //0x790[5:0]=0x5 + u1Tmp = rtw_read8(pdapter,0x790); + u1Tmp = (u1Tmp & 0xb0) | 0x05 ; + rtw_write8(pdapter,0x790,u1Tmp); + // PTA parameter + //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x6cc, 0x0); + //pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c8, 0xffffff); + //pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c4, 0x55555555); + //pBtCoexist->fBtcWrite4Byte(pBtCoexist, 0x6c0, 0x55555555); + rtw_write8(pdapter,0x6cc,0x0); + rtw_write32(pdapter,0x6c8,0xffffff); + rtw_write32(pdapter,0x6c4,0x55555555); + rtw_write32(pdapter,0x6c0,0x55555555); + + // coex parameters + //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x778, 0x3); + rtw_write8(pdapter,0x778,0x3); + + // enable counter statistics + //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x76e, 0xc); + rtw_write8(pdapter,0x76e,0xc); + + // enable PTA + //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x40, 0x20); + rtw_write8(pdapter,0x40, 0x20); + + // bt clock related + //u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x4); + //u1Tmp |= BIT7; + //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x4, u1Tmp); + u1Tmp = rtw_read8(pdapter,0x4); + u1Tmp |= BIT7; + rtw_write8(pdapter,0x4, u1Tmp); + + // bt clock related + //u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x7); + //u1Tmp |= BIT1; + //pBtCoexist->fBtcWrite1Byte(pBtCoexist, 0x7, u1Tmp); + u1Tmp = rtw_read8(pdapter,0x7); + u1Tmp |= BIT1; + rtw_write8(pdapter,0x7, u1Tmp); + } + + +} +#endif //CONFIG_BT_COEXIST + +void rtl8814_set_hal_ops(struct hal_ops *pHalFunc) +{ + pHalFunc->dm_init = &rtl8814_init_dm_priv; + pHalFunc->dm_deinit = &rtl8814_deinit_dm_priv; + + pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8814A; + + pHalFunc->read_chip_version = read_chip_version_8814a; + +// pHalFunc->set_bwmode_handler = &PHY_SetBWMode8814; +// pHalFunc->set_channel_handler = &PHY_SwChnl8814; + pHalFunc->set_chnl_bw_handler = &PHY_SetSwChnlBWMode8814; + + pHalFunc->set_tx_power_level_handler = &PHY_SetTxPowerLevel8814; + pHalFunc->get_tx_power_level_handler = &PHY_GetTxPowerLevel8814; + pHalFunc->set_tx_power_index_handler = &PHY_SetTxPowerIndex_8814A; + pHalFunc->get_tx_power_index_handler = &PHY_GetTxPowerIndex8814A; + + pHalFunc->hal_dm_watchdog = &rtl8814_HalDmWatchDog; + +// pHalFunc->Add_RateATid = &rtl8814_Add_RateATid; + + pHalFunc->run_thread= &rtl8814_start_thread; + pHalFunc->cancel_thread= &rtl8814_stop_thread; + +#ifdef CONFIG_ANTENNA_DIVERSITY + pHalFunc->AntDivBeforeLinkHandler = &AntDivBeforeLink8812; + pHalFunc->AntDivCompareHandler = &AntDivCompare8812; +#endif //CONFIG_ANTENNA_DIVERSITY + + pHalFunc->read_bbreg = &PHY_QueryBBReg8814A; + pHalFunc->write_bbreg = &PHY_SetBBReg8814A; + pHalFunc->read_rfreg = &PHY_QueryRFReg8814A; + pHalFunc->write_rfreg = &PHY_SetRFReg8814A; + + + // Efuse related function + pHalFunc->EfusePowerSwitch = &rtl8814_EfusePowerSwitch; + pHalFunc->ReadEFuse = &rtl8814_ReadEFuse; + pHalFunc->EFUSEGetEfuseDefinition = &rtl8814_EFUSE_GetEfuseDefinition; + pHalFunc->EfuseGetCurrentSize = &rtl8814_EfuseGetCurrentSize; + pHalFunc->Efuse_PgPacketRead = &rtl8814_Efuse_PgPacketRead; + pHalFunc->Efuse_PgPacketWrite = &rtl8814_Efuse_PgPacketWrite; + pHalFunc->Efuse_WordEnableDataWrite = &rtl8814_Efuse_WordEnableDataWrite; + +#ifdef DBG_CONFIG_ERROR_DETECT + pHalFunc->sreset_init_value = &sreset_init_value; + pHalFunc->sreset_reset_value = &sreset_reset_value; + pHalFunc->silentreset = &sreset_reset; + pHalFunc->sreset_xmit_status_check = &rtl8814_sreset_xmit_status_check; + pHalFunc->sreset_linked_status_check = &rtl8814_sreset_linked_status_check; + pHalFunc->sreset_get_wifi_status = &sreset_get_wifi_status; + pHalFunc->sreset_inprogress= &sreset_inprogress; +#endif //DBG_CONFIG_ERROR_DETECT + + pHalFunc->GetHalODMVarHandler = GetHalODMVar; + pHalFunc->SetHalODMVarHandler = SetHalODMVar; + pHalFunc->hal_notch_filter = &hal_notch_filter_8814; + + pHalFunc->c2h_handler = c2h_handler_8814a; + + pHalFunc->fill_h2c_cmd = &FillH2CCmd_8814; + pHalFunc->fill_fake_txdesc = &rtl8814a_fill_fake_txdesc; +#ifdef CONFIG_WOWLAN + pHalFunc->hal_set_wowlan_fw = &SetFwRelatedForWoWLAN8814; +#endif //CONFIG_WOWLAN + pHalFunc->fw_dl = &FirmwareDownload8814A; + pHalFunc->hal_get_tx_buff_rsvd_page_num = &GetTxBufferRsvdPageNum8814; +} + + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c new file mode 100644 index 00000000000000..1c212540c1ef47 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_phycfg.c @@ -0,0 +1,3027 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814A_PHYCFG_C_ + +//#include + +#include +#include "hal_com_h2c.h" + +/*---------------------Define local function prototype-----------------------*/ + +/*----------------------------Function Body----------------------------------*/ +//1 1. BB register R/W API + +u32 +PHY_QueryBBReg8814A( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 ReturnValue = 0, OriginalValue, BitShift; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + +#if(SIC_ENABLE == 1) + return SIC_QueryBBReg(Adapter, RegAddr, BitMask); +#endif + + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = PHY_CalculateBitShift(BitMask); + ReturnValue = (OriginalValue & BitMask) >> BitShift; + + //RTW_INFO("BBR MASK=0x%x Addr[0x%x]=0x%x\n", BitMask, RegAddr, OriginalValue); + + return (ReturnValue); +} + + +VOID +PHY_SetBBReg8814A( + IN PADAPTER Adapter, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + u32 OriginalValue, BitShift; + +#if (DISABLE_BB_RF == 1) + return; +#endif + +#if(SIC_ENABLE == 1) + SIC_SetBBReg(Adapter, RegAddr, BitMask, Data); + return; +#endif + + if(BitMask!= bMaskDWord) + {//if not "double word" write + OriginalValue = rtw_read32(Adapter, RegAddr); + BitShift = PHY_CalculateBitShift(BitMask); + Data = ((OriginalValue) & (~BitMask)) |( ((Data << BitShift)) & BitMask); + } + + rtw_write32(Adapter, RegAddr, Data); + + //RTW_INFO("BBW MASK=0x%x Addr[0x%x]=0x%x\n", BitMask, RegAddr, Data); +} + + + +static u32 +phy_RFRead_8814A( + IN PADAPTER Adapter, + IN u8 eRFPath, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 DataAndAddr = 0; + u32 Readback_Value, Direct_Addr; + + RegAddr &= 0xff; + switch(eRFPath){ + case RF_PATH_A: + Direct_Addr = 0x2800+RegAddr*4; + break; + case RF_PATH_B: + Direct_Addr = 0x2c00+RegAddr*4; + break; + case RF_PATH_C: + Direct_Addr = 0x3800+RegAddr*4; + break; + case RF_PATH_D: + Direct_Addr = 0x3c00+RegAddr*4; + break; + default: //pathA + Direct_Addr = 0x2800+RegAddr*4; + break; + } + + + BitMask &= bRFRegOffsetMask; + + Readback_Value = phy_query_bb_reg(Adapter, Direct_Addr, BitMask); + //RTW_INFO("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, RegAddr, Readback_Value); + + return Readback_Value; +} + + +static VOID +phy_RFWrite_8814A( + IN PADAPTER Adapter, + IN u8 eRFPath, + IN u32 Offset, + IN u32 Data + ) +{ + u32 DataAndAddr = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; + + // 2009/06/17 MH We can not execute IO for power save or other accident mode. + //if(RT_CANNOT_IO(Adapter)) + //{ + //RT_DISP(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); + //return; + //} + + Offset &= 0xff; + + // Shadow Update + //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); + + // Put write addr in [27:20] and write data in [19:00] + DataAndAddr = ((Offset<<20) | (Data&0x000fffff)) & 0x0fffffff; + + // Write Operation + phy_set_bb_reg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); + //RTW_INFO("RFW-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr); +} + + +u32 +PHY_QueryRFReg8814A( + IN PADAPTER Adapter, + IN enum rf_path eRFPath, + IN u32 RegAddr, + IN u32 BitMask + ) +{ + u32 Readback_Value; + +#if (DISABLE_BB_RF == 1) + return 0; +#endif + + Readback_Value = phy_RFRead_8814A(Adapter, eRFPath, RegAddr, BitMask); + + return (Readback_Value); +} + + +VOID +PHY_SetRFReg8814A( + IN PADAPTER Adapter, + IN enum rf_path eRFPath, + IN u32 RegAddr, + IN u32 BitMask, + IN u32 Data + ) +{ + +#if (DISABLE_BB_RF == 1) + return; +#endif + + if(BitMask == 0) + return; + + RegAddr &= 0xff; + // RF data is 20 bits only + if (BitMask != bLSSIWrite_data_Jaguar) { + u32 Original_Value, BitShift; + + Original_Value = phy_RFRead_8814A(Adapter, eRFPath, RegAddr, bLSSIWrite_data_Jaguar); + BitShift = PHY_CalculateBitShift(BitMask); + Data = ((Original_Value) & (~BitMask)) | (Data<< BitShift); + } + + phy_RFWrite_8814A(Adapter, eRFPath, RegAddr, Data); + + +} + +// +// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. +// + +s32 PHY_MACConfig8814(PADAPTER Adapter) +{ + int rtStatus = _FAIL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // + // Config MAC + // +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + rtStatus = phy_ConfigMACWithParaFile(Adapter, PHY_FILE_MAC_REG); + if (rtStatus == _FAIL) +#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE + { +#ifdef CONFIG_EMBEDDED_FWIMG + odm_config_mac_with_header_file(&pHalData->odmpriv); + rtStatus = _SUCCESS; +#endif//CONFIG_EMBEDDED_FWIMG + } + + return rtStatus; +} + + +static VOID +phy_InitBBRFRegisterDefinition( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // RF Interface Sowrtware Control + pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 + pHalData->PHYRegDef[RF_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) + + // RF Interface Output (and Enable) + pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 + pHalData->PHYRegDef[RF_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 + + // RF Interface (Output and) Enable + pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) + pHalData->PHYRegDef[RF_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) + + if(IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) + { + pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rA_LSSIWrite_Jaguar; //LSSI Parameter + pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rB_LSSIWrite_Jaguar; + + pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rHSSIRead_Jaguar; //wire control parameter2 + pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rHSSIRead_Jaguar; //wire control parameter2 + } + else + { + pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter + pHalData->PHYRegDef[RF_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; + + pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 + pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 + } + + if(IS_HARDWARE_TYPE_8814A(Adapter)) + { + pHalData->PHYRegDef[RF_PATH_C].rf3wireOffset = rC_LSSIWrite_Jaguar2; //LSSI Parameter + pHalData->PHYRegDef[RF_PATH_D].rf3wireOffset = rD_LSSIWrite_Jaguar2; + + pHalData->PHYRegDef[RF_PATH_C].rfHSSIPara2 = rHSSIRead_Jaguar; //wire control parameter2 + pHalData->PHYRegDef[RF_PATH_D].rfHSSIPara2 = rHSSIRead_Jaguar; //wire control parameter2 + } + + if(IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(Adapter)) + { + // Tranceiver Readback LSSI/HSPI mode + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rA_SIRead_Jaguar; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rB_SIRead_Jaguar; + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = rA_PIRead_Jaguar; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = rB_PIRead_Jaguar; + } + else + { + // Tranceiver Readback LSSI/HSPI mode + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; + pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; + pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; + } + + if(IS_HARDWARE_TYPE_8814A(Adapter)) + { + // Tranceiver Readback LSSI/HSPI mode + pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBack = rC_SIRead_Jaguar2; + pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBack = rD_SIRead_Jaguar2; + pHalData->PHYRegDef[RF_PATH_C].rfLSSIReadBackPi = rC_PIRead_Jaguar2; + pHalData->PHYRegDef[RF_PATH_D].rfLSSIReadBackPi = rD_PIRead_Jaguar2; + } + + //pHalData->bPhyValueInitReady=TRUE; +} + + +int +PHY_BBConfig8814( + IN PADAPTER Adapter + ) +{ + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 TmpU1B=0; + + phy_InitBBRFRegisterDefinition(Adapter); + + // . APLL_EN,,APLL_320_GATEB,APLL_320BIAS, auto config by hw fsm after pfsm_go (0x4 bit 8) set + TmpU1B = PlatformEFIORead1Byte(Adapter, REG_SYS_FUNC_EN_8814A); + + if(IS_HARDWARE_TYPE_8814AU(Adapter)) + TmpU1B |= FEN_USBA; + else if(IS_HARDWARE_TYPE_8814AE(Adapter)) + TmpU1B |= FEN_PCIEA; + + PlatformEFIOWrite1Byte(Adapter, REG_SYS_FUNC_EN, TmpU1B); + + TmpU1B = PlatformEFIORead1Byte(Adapter, 0x1002); + PlatformEFIOWrite1Byte(Adapter, 0x1002, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB));//same with 8812 + + //6. 0x1f[7:0] = 0x07 PathA RF Power On + PlatformEFIOWrite1Byte(Adapter, REG_RF_CTRL0_8814A , 0x07);//RF_SDMRSTB,RF_RSTB,RF_EN same with 8723a + //7. 0x20[7:0] = 0x07 PathB RF Power On + //8. 0x21[7:0] = 0x07 PathC RF Power On + PlatformEFIOWrite2Byte(Adapter, REG_RF_CTRL1_8814A , 0x0707);//RF_SDMRSTB,RF_RSTB,RF_EN same with 8723a + //9. 0x76[7:0] = 0x07 PathD RF Power On + PlatformEFIOWrite1Byte(Adapter, REG_RF_CTRL3_8814A , 0x7); + + // + // Config BB and AGC + // + rtStatus = phy_BB8814A_Config_ParaFile(Adapter); + + hal_set_crystal_cap(Adapter, pHalData->crystal_cap); + + switch (Adapter->registrypriv.rf_config) { + case RF_1T1R: + case RF_2T4R: + case RF_3T3R: + /*RX CCK disable 2R CCA*/ + phy_set_bb_reg(Adapter, rCCK0_FalseAlarmReport+2, BIT2|BIT6, 0); + /*pathB tx on, path A/C/D tx off*/ + phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); + /*pathB rx*/ + phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0x5); + break; + default: + /*RX CCK disable 2R CCA*/ + phy_set_bb_reg(Adapter, rCCK0_FalseAlarmReport+2, BIT2|BIT6, 0); + /*pathB tx on, path A/C/D tx off*/ + phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0xf0000000, 0x4); + /*pathB rx*/ + phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0x5); + RTW_INFO("%s, unknown rf_config: %d\n", __func__, Adapter->registrypriv.rf_config); + break; + } + + return rtStatus; +} + +int phy_BB8814A_Config_ParaFile( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + /* Read PHY_REG.TXT BB INIT!! */ +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_PHY_REG, CONFIG_BB_PHY_REG) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG)) + rtStatus = _FAIL; +#endif + } + + if (rtStatus != _SUCCESS) { + RTW_INFO("%s(): CONFIG_BB_PHY_REG Fail!!\n", __FUNCTION__); + goto phy_BB_Config_ParaFile_Fail; + } + + /* Read PHY_REG_MP.TXT BB INIT!! */ +#if (MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) { +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (phy_ConfigBBWithMpParaFile(Adapter, PHY_FILE_PHY_REG_MP) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_PHY_REG_MP)) + rtStatus = _FAIL; +#endif + } + + if (rtStatus != _SUCCESS) { + RTW_INFO("phy_BB8814_Config_ParaFile():Write BB Reg MP Fail!!\n"); + goto phy_BB_Config_ParaFile_Fail; + } + } +#endif /* #if (MP_DRIVER == 1) */ + + /* BB AGC table Initialization */ +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (phy_ConfigBBWithParaFile(Adapter, PHY_FILE_AGC_TAB, CONFIG_BB_AGC_TAB) == _FAIL) +#endif + { +#ifdef CONFIG_EMBEDDED_FWIMG + if (HAL_STATUS_SUCCESS != odm_config_bb_with_header_file(&pHalData->odmpriv, CONFIG_BB_AGC_TAB)) + rtStatus = _FAIL; +#endif + } + + if (rtStatus != _SUCCESS) + RTW_INFO("%s(): CONFIG_BB_AGC_TAB Fail!!\n", __FUNCTION__); + +phy_BB_Config_ParaFile_Fail: + + return rtStatus; +} + + +VOID +phy_ADC_CLK_8814A( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 MAC_REG_520, BB_REG_8FC, BB_REG_808, RXIQC[4]; + u32 Search_index = 0, MAC_Active = 1; + u32 RXIQC_REG[2][4] = {{0xc10, 0xe10, 0x1810, 0x1a10}, {0xc14, 0xe14, 0x1814, 0x1a14}} ; + + if (GET_CVID_CUT_VERSION(pHalData->version_id) != A_CUT_VERSION) + return; + +//1 Step1. MAC TX pause + MAC_REG_520 = phy_query_bb_reg( Adapter, 0x520, bMaskDWord); + BB_REG_8FC = phy_query_bb_reg( Adapter, 0x8fc, bMaskDWord); + BB_REG_808 = phy_query_bb_reg( Adapter, 0x808, bMaskDWord); + phy_set_bb_reg(Adapter, 0x520, bMaskByte2, 0x3f); + +//1 Step 2. Backup RXIQC & RXIQC = 0 + for(Search_index = 0; Search_index<4; Search_index++){ + RXIQC[Search_index] = phy_query_bb_reg( Adapter, RXIQC_REG[0][Search_index], bMaskDWord); + phy_set_bb_reg(Adapter, RXIQC_REG[0][Search_index], bMaskDWord, 0x0); + phy_set_bb_reg(Adapter, RXIQC_REG[1][Search_index], bMaskDWord, 0x0); + } + phy_set_bb_reg(Adapter, 0xa14, 0x00000300, 0x3); + Search_index = 0; + +//1 Step 3. Monitor MAC IDLE + phy_set_bb_reg(Adapter, 0x8fc, bMaskDWord, 0x0); + while(MAC_Active){ + MAC_Active = phy_query_bb_reg( Adapter, 0xfa0, bMaskDWord) & (0x803e0008); + Search_index++; + if(Search_index>1000){ + break; + } + } + +//1 Step 4. ADC clk flow + phy_set_bb_reg(Adapter, 0x808, bMaskByte0, 0x11); + phy_set_bb_reg(Adapter, 0x90c, BIT(13), 0x1); + phy_set_bb_reg(Adapter, 0x764, BIT(10)|BIT(9), 0x3); + phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x1); + + // 0xc1c/0xe1c/0x181c/0x1a1c[4] must=1 to ensure table can be written when bbrstb=0 + // 0xc60/0xe60/0x1860/0x1a60[15] always = 1 after this line + // 0xc60/0xe60/0x1860/0x1a60[14] always = 0 bcz its error in A-cut + + // power_off/clk_off @ anapar_state=idle mode + phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x15800002); //0xc60 0x15808002 + phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x01808003); //0xc60 0x01808003 + phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x15800002); //0xe60 0x15808002 + phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x01808003); //0xe60 0x01808003 + phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x15800002); //0x1860 0x15808002 + phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x01808003); //0x1860 0x01808003 + phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x15800002); //0x1a60 0x15808002 + phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x01808003); //0x1a60 0x01808003 + + phy_set_bb_reg(Adapter, 0x764, BIT(10), 0x0); + phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x0); + phy_set_bb_reg(Adapter, 0xc5c, bMaskDWord, 0x0D080058); //0xc5c 0x00080058 // [19] =1 to turn off ADC + phy_set_bb_reg(Adapter, 0xe5c, bMaskDWord, 0x0D080058); //0xe5c 0x00080058 // [19] =1 to turn off ADC + phy_set_bb_reg(Adapter, 0x185c, bMaskDWord, 0x0D080058); //0x185c 0x00080058 // [19] =1 to turn off ADC + phy_set_bb_reg(Adapter, 0x1a5c, bMaskDWord, 0x0D080058); //0x1a5c 0x00080058 // [19] =1 to turn off ADC + + // power_on/clk_off + //phy_set_bb_reg(Adapter, 0x764, BIT(10), 0x1); + phy_set_bb_reg(Adapter, 0xc5c, bMaskDWord, 0x0D000058); //0xc5c 0x0D000058 // [19] =0 to turn on ADC + phy_set_bb_reg(Adapter, 0xe5c, bMaskDWord, 0x0D000058); //0xe5c 0x0D000058 // [19] =0 to turn on ADC + phy_set_bb_reg(Adapter, 0x185c, bMaskDWord, 0x0D000058); //0x185c 0x0D000058 // [19] =0 to turn on ADC + phy_set_bb_reg(Adapter, 0x1a5c, bMaskDWord, 0x0D000058); //0x1a5c 0x0D000058 // [19] =0 to turn on ADC + + // power_on/clk_on @ anapar_state=BT mode + phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x05808032); //0xc60 0x05808002 + phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x05808032); //0xe60 0x05808002 + phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x05808032); //0x1860 0x05808002 + phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x05808032); //0x1a60 0x05808002 + phy_set_bb_reg(Adapter, 0x764, BIT(10), 0x1); + phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x1); + + // recover original setting @ anapar_state=BT mode + phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x05808032); //0xc60 0x05808036 + phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x05808032); //0xe60 0x05808036 + phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x05808032); //0x1860 0x05808036 + phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x05808032); //0x1a60 0x05808036 + + phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x05800002); //0xc60 0x05800002 + phy_set_bb_reg(Adapter, 0xc60, bMaskDWord, 0x07808003); //0xc60 0x07808003 + phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x05800002); //0xe60 0x05800002 + phy_set_bb_reg(Adapter, 0xe60, bMaskDWord, 0x07808003); //0xe60 0x07808003 + phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x05800002); //0x1860 0x05800002 + phy_set_bb_reg(Adapter, 0x1860, bMaskDWord, 0x07808003); //0x1860 0x07808003 + phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x05800002); //0x1a60 0x05800002 + phy_set_bb_reg(Adapter, 0x1a60, bMaskDWord, 0x07808003); //0x1a60 0x07808003 + + phy_set_bb_reg(Adapter, 0x764, BIT(10)|BIT(9), 0x0); + phy_set_bb_reg(Adapter, 0x804, BIT(2), 0x0); + phy_set_bb_reg(Adapter, 0x90c, BIT(13), 0x0); + +//1 Step 5. Recover MAC TX & IQC + phy_set_bb_reg(Adapter, 0x520, bMaskDWord, MAC_REG_520); + phy_set_bb_reg(Adapter, 0x8fc, bMaskDWord, BB_REG_8FC); + phy_set_bb_reg(Adapter, 0x808, bMaskDWord, BB_REG_808); + for(Search_index = 0; Search_index<4; Search_index++){ + phy_set_bb_reg(Adapter, RXIQC_REG[0][Search_index], bMaskDWord, RXIQC[Search_index]); + phy_set_bb_reg(Adapter, RXIQC_REG[1][Search_index], bMaskDWord, 0x01000000); + } + phy_set_bb_reg(Adapter, 0xa14, 0x00000300, 0x0); +} + +VOID +PHY_ConfigBB_8814A( + IN PADAPTER Adapter + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + RTW_DBG(" ===> PHY_ConfigBB_8814A() \n"); + phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x3); +} + + + +//2 3.3 RF Config + +s32 +PHY_RFConfig8814A( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + //vivi added this, 20100610 + if (rtw_is_surprise_removed(Adapter)) + return _FAIL; + + switch(pHalData->rf_chip) + { + case RF_PSEUDO_11N: + RTW_INFO("%s(): RF_PSEUDO_11N\n",__FUNCTION__); + break; + default: + rtStatus = PHY_RF6052_Config_8814A(Adapter); + break; + } + + return rtStatus; +} + +//1 4. RF State setting API + +/* todo +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + +// +// 2009/11/03 MH add for LPS mode power save sequence. +// 2009/11/03 According to document V10. +// 2009/11/24 According to document V11. by tynli. +// +VOID +phy_SetRTL8814ERfOn( + IN PADAPTER Adapter +) +{ + rtw_write8(Adapter, REG_SPS0_CTRL_8814A, 0x2b); + + // c. For PCIE: SYS_FUNC_EN 0x02[7:0] = 0xE3 //enable BB TRX function + // For USB: SYS_FUNC_EN 0x02[7:0] = 0x17 +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A, 0xE3); +#else + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A, 0x17); +#endif + + // RF_ON_EXCEP(d~g): + // d. APSD_CTRL 0x600[7:0] = 0x00 + //rtw_write8(Adapter, REG_APSD_CTRL, 0x00); + + // e. For PCIE: SYS_FUNC_EN 0x02[7:0] = 0xE2 //reset BB TRX function again + //f. For PCIE: SYS_FUNC_EN 0x02[7:0] = 0xE3 //enable BB TRX function +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A, 0xE2); + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A, 0xE3); +#else + // e.For USB: SYS_FUNC_EN 0x02[7:0] = 0x16 + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A, 0x16); + // f. For USB: SYS_FUNC_EN 0x02[7:0] = 0x17 + rtw_write8(Adapter, REG_SYS_FUNC_EN_8814A, 0x17); +#endif + + // g. TXPAUSE 0x522[7:0] = 0x00 //enable MAC TX queue + rtw_write8(Adapter, REG_TXPAUSE_8814A, 0x00); +} // phy_SetRTL8188EERfSleep + + +BOOLEAN +phy_SetRFPowerState_8814E( + IN PADAPTER Adapter, + IN rt_rf_power_state eRFPowerState + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + BOOLEAN bResult = TRUE; + u8 i, QueueID; + PRT_POWER_SAVE_CONTROL pPSC = GET_POWER_SAVE_CONTROL(pMgntInfo); + + pHalData->SetRFPowerStateInProgress = TRUE; + + switch( eRFPowerState ) + { + // + // SW radio on/IPS site survey call will execute all flow + // HW radio on + // + case eRfOn: + { + #if(MUTUAL_AUTHENTICATION == 1) + if(pHalData->MutualAuthenticationFail) + break; + #endif + if((pHalData->eRFPowerState == eRfOff) && RT_IN_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC)) + { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC. + s32 rtstatus; + u32 InitializeCount = 0; + do + { + InitializeCount++; + rtstatus = NicIFEnableNIC( Adapter ); + }while( (rtstatus != _SUCCESS) &&(InitializeCount <10) ); + RT_ASSERT(rtstatus == _SUCCESS,("Nic Initialize Fail\n")); + RT_CLEAR_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC); + } + else + { // This is the normal case, we just turn on the RF. + phy_SetRTL8814ERfOn(Adapter); + } + + // Turn on RF we are still linked, which might happen when + // we quickly turn off and on HW RF. 2006.05.12, by rcnjko. + if( pMgntInfo->bMediaConnect == TRUE ) + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK); + else // Turn off LED if RF is not ON. + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_NO_LINK); + } + break; + + // Card Disable/SW radio off/HW radio off/IPS enter call + case eRfOff: + { + // Make sure BusyQueue is empty befor turn off RFE pwoer. + for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) + { + if(RTIsListEmpty(&Adapter->TcbBusyQueue[QueueID])) + { + QueueID++; + continue; + } + else if(IsLowPowerState(Adapter)) + { + RT_TRACE((COMP_POWER|COMP_RF), DBG_LOUD, + ("eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 but lower power state!\n", (i+1), QueueID)); + break; + } + else + { + RT_TRACE((COMP_POWER|COMP_RF), DBG_LOUD, + ("eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID)); + PlatformStallExecution(10); + i++; + } + + if(i >= MAX_DOZE_WAITING_TIMES_9x) + { + RT_TRACE((COMP_POWER|COMP_RF), DBG_WARNING, ("\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID)); + break; + } + } + + if(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC) + { // Disable all components. + NicIFDisableNIC(Adapter); + + if(IS_HARDWARE_TYPE_8814AE(Adapter)) + NicIFEnableInterrupt(Adapter); + RT_SET_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC); + } + else + { // Normal case. + //If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015 + if(pMgntInfo->RfOffReason==RF_CHANGE_BY_IPS ) + Adapter->HalFunc.LedControlHandler(Adapter,LED_CTL_NO_LINK); + else // Turn off LED if RF is not ON. + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_OFF); + } + } + break; + + default: + case eRfSleep:// Not used LPS is running on FW + bResult = FALSE; + RT_ASSERT(FALSE, ("phy_SetRFPowerState_8814E(): unknow state to set: 0x%X!!!\n", eRFPowerState)); + break; + } + + if(bResult) + { + // Update current RF state variable. + pHalData->eRFPowerState = eRFPowerState; + } + + pHalData->SetRFPowerStateInProgress = FALSE; + + return bResult; +} + +#elif (DEV_BUS_TYPE == RT_USB_INTERFACE) + +BOOLEAN +phy_SetRFPowerState_8814U( + IN PADAPTER Adapter, + IN rt_rf_power_state eRFPowerState + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + BOOLEAN bResult = TRUE; + u8 i, QueueID; + PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(Adapter); + + if(pHalData->SetRFPowerStateInProgress == TRUE) + return FALSE; + + pHalData->SetRFPowerStateInProgress = TRUE; + RTW_DBG("======> phy_SetRFPowerState_8814U .\n"); + + switch( eRFPowerState ) + { + case eRfOn: + if((pHalData->eRFPowerState == eRfOff) && + RT_IN_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC)) + { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC. + RT_TRACE(COMP_RF, DBG_LOUD, ("======> phy_SetRFPowerState_8814U-eRfOn .\n")); + + if(!Adapter->bInHctTest) + { + // 2010/09/01 MH For 92CU, we do not make sure the RF B short initialize sequence + // So disable the different RF on/off sequence for hidden AP. + NicIFEnableNIC(Adapter); + RT_CLEAR_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC); + } + } + break; + + // + // In current solution, RFSleep=RFOff in order to save power under 802.11 power save. + // By Bruce, 2008-01-16. + // + case eRfSleep: + { + // ToDo: + } + break; + + case eRfOff: + // HW setting had been configured. + // Both of these RF configures are the same, configuring twice may cause HW abnormal. + if(pHalData->eRFPowerState == eRfSleep || pHalData->eRFPowerState== eRfOff) + break; + rtw_write8(Adapter, 0xf015, 0x40); //page added for usb3 bus + // Make sure BusyQueue is empty befor turn off RFE pwoer. + for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) + { + if(RTIsListEmpty(&Adapter->TcbBusyQueue[QueueID])) + { + QueueID++; + continue; + } + else + { + RT_TRACE(COMP_POWER, DBG_LOUD, ("eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID)); + PlatformSleepUs(10); + i++; + } + + if(i >= MAX_DOZE_WAITING_TIMES_9x) + { + RT_TRACE(COMP_POWER, DBG_LOUD, ("\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID)); + break; + } + } + + // + //RF Off/Sleep sequence. Designed/tested from SD4 Scott, SD1 Grent and Jonbon. + // Added by + // + //================================================================== + // CU will call card disable flow to set RF off, such that we call halt directly + // and set the PS_LEVEL to HALT_NIC or we might call halt twice in N6usbHalt in some cases. + // 2010.03.05. Added by tynli. + if(pMgntInfo->RfOffReason & RF_CHANGE_BY_IPS || + pMgntInfo->RfOffReason & RF_CHANGE_BY_HW || + pMgntInfo->RfOffReason & RF_CHANGE_BY_SW) + { //for HW/Sw radio off and IPS flow + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> CardDisableWithoutHWSM -eRfOff.\n")); + if(!Adapter->bInHctTest) + { + // 2010/09/01 MH For 92CU, we do not make sure the RF B short initialize sequence + // So disable the different RF on/off sequence for hidden AP. + NicIFDisableNIC(Adapter); + RT_SET_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC); + } + } + break; + + default: + bResult = FALSE; + RT_ASSERT(FALSE, ("phy_SetRFPowerState_8814U(): unknow state to set: 0x%X!!!\n", eRFPowerState)); + break; + } + + if(bResult) + { + // Update current RF state variable. + pHalData->eRFPowerState = eRFPowerState; + + switch(pHalData->rf_chip ) + { + default: + switch(pHalData->eRFPowerState) + { + case eRfOff: + // + //If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015 + // + if(pMgntInfo->RfOffReason==RF_CHANGE_BY_IPS ) + Adapter->HalFunc.LedControlHandler(Adapter,LED_CTL_NO_LINK); + else // Turn off LED if RF is not ON. + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_OFF); + break; + + case eRfOn: + // Turn on RF we are still linked, which might happen when + // we quickly turn off and on HW RF. 2006.05.12, by rcnjko. + if( pMgntInfo->bMediaConnect == TRUE ) + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK); + else // Turn off LED if RF is not ON. + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_NO_LINK); + break; + + default: + // do nothing. + break; + }// Switch RF state + + break; + }// Switch rf_chip + } + + pHalData->SetRFPowerStateInProgress = FALSE; + RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== phy_SetRFPowerState_8814U .\n")); + return bResult; +} + +#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE + +BOOLEAN +phy_SetRFPowerState_8814Sdio( + IN PADAPTER Adapter, + IN rt_rf_power_state eRFPowerState + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + BOOLEAN bResult = TRUE; + u8 i, QueueID; + PRT_SDIO_DEVICE pDevice = GET_RT_SDIO_DEVICE(Adapter); + + if(pHalData->SetRFPowerStateInProgress == TRUE) + return FALSE; + + pHalData->SetRFPowerStateInProgress = TRUE; + RT_TRACE(COMP_INIT, DBG_LOUD, ("======> phy_SetRFPowerState_8814Sdio .\n")) + + switch( eRFPowerState ) + { + case eRfOn: + if((pHalData->eRFPowerState == eRfOff) && + RT_IN_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC)) + { // The current RF state is OFF and the RF OFF level is halting the NIC, re-initialize the NIC. + RT_TRACE(COMP_RF, DBG_LOUD, ("======> phy_SetRFPowerState_8814Sdio-eRfOn .\n")); + + if(!Adapter->bInHctTest) + { + // 2010/09/01 MH For 92CU, we do not make sure the RF B short initialize sequence + // So disable the different RF on/off sequence for hidden AP. + NicIFEnableNIC(Adapter); + RT_CLEAR_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC); + } + } + + // 2010/08/26 MH Prevent IQK to send out packet. + if(pHalData->bIQKInitialized ) + phy_iq_calibrate_8814a(Adapter, TRUE); + else + { + phy_iq_calibrate_8814a(Adapter,FALSE); + pHalData->bIQKInitialized = _TRUE; + } + break; + + // + // In current solution, RFSleep=RFOff in order to save power under 802.11 power save. + // By Bruce, 2008-01-16. + // + case eRfSleep: + { + // ToDo: + } + break; + + case eRfOff: + // HW setting had been configured. + // Both of these RF configures are the same, configuring twice may cause HW abnormal. + if(pHalData->eRFPowerState == eRfSleep || pHalData->eRFPowerState== eRfOff) + break; + + // Make sure BusyQueue is empty befor turn off RFE pwoer. + for(QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) + { + if(RTIsListEmpty(&Adapter->TcbBusyQueue[QueueID])) + { + //DbgPrint("QueueID = %d", QueueID); + QueueID++; + continue; + } + else + { + RT_TRACE(COMP_POWER, DBG_LOUD, ("eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n", (i+1), QueueID)); + PlatformSleepUs(10); + i++; + } + + if(i >= MAX_DOZE_WAITING_TIMES_9x) + { + RT_TRACE(COMP_POWER, DBG_LOUD, ("\n\n\n SetZebraRFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n\n\n", MAX_DOZE_WAITING_TIMES_9x, QueueID)); + break; + } + } + + // + //RF Off/Sleep sequence. Designed/tested from SD4 Scott, SD1 Grent and Jonbon. + // Added by + // + //================================================================== + // CU will call card disable flow to set RF off, such that we call halt directly + // and set the PS_LEVEL to HALT_NIC or we might call halt twice in N6usbHalt in some cases. + // 2010.03.05. Added by tynli. + if(pMgntInfo->RfOffReason & RF_CHANGE_BY_IPS || + pMgntInfo->RfOffReason & RF_CHANGE_BY_HW || + pMgntInfo->RfOffReason & RF_CHANGE_BY_SW) + { //for HW/Sw radio off and IPS flow + //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> CardDisableWithoutHWSM -eRfOff.\n")); + if(!Adapter->bInHctTest) + { + // 2010/09/01 MH For 92CU, we do not make sure the RF B short initialize sequence + // So disable the different RF on/off sequence for hidden AP. + NicIFDisableNIC(Adapter); + + RT_SET_PS_LEVEL(Adapter, RT_RF_OFF_LEVL_HALT_NIC); + } + } + break; + + default: + bResult = FALSE; + RT_ASSERT(FALSE, ("phy_SetRFPowerState_8814Sdio(): unknow state to set: 0x%X!!!\n", eRFPowerState)); + break; + } + + if(bResult) + { + // Update current RF state variable. + pHalData->eRFPowerState = eRFPowerState; + + switch(pHalData->rf_chip ) + { + default: + switch(pHalData->eRFPowerState) + { + case eRfOff: + // + //If Rf off reason is from IPS, Led should blink with no link, by Maddest 071015 + // + if(pMgntInfo->RfOffReason==RF_CHANGE_BY_IPS ) + Adapter->HalFunc.LedControlHandler(Adapter,LED_CTL_NO_LINK); + else // Turn off LED if RF is not ON. + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_POWER_OFF); + break; + + case eRfOn: + // Turn on RF we are still linked, which might happen when + // we quickly turn off and on HW RF. 2006.05.12, by rcnjko. + if( pMgntInfo->bMediaConnect == TRUE ) + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK); + else // Turn off LED if RF is not ON. + Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_NO_LINK); + break; + + default: + // do nothing. + break; + }// Switch RF state + + break; + }// Switch rf_chip + } + + pHalData->SetRFPowerStateInProgress = FALSE; + + return bResult; +} + +#endif + + + +BOOLEAN +PHY_SetRFPowerState8814A( + IN PADAPTER Adapter, + IN rt_rf_power_state eRFPowerState + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + BOOLEAN bResult = FALSE; + + RT_TRACE(COMP_RF, DBG_LOUD, ("---------> PHY_SetRFPowerState8814(): eRFPowerState(%d)\n", eRFPowerState)); + if(eRFPowerState == pHalData->eRFPowerState) + { + RT_TRACE(COMP_RF, DBG_LOUD, ("<--------- PHY_SetRFPowerState8814(): discard the request for eRFPowerState(%d) is the same.\n", eRFPowerState)); + return bResult; + } +#if (DEV_BUS_TYPE == RT_PCI_INTERFACE) + bResult = phy_SetRFPowerState_8814E(Adapter, eRFPowerState); +#elif (DEV_BUS_TYPE == RT_USB_INTERFACE) + bResult = phy_SetRFPowerState_8814U(Adapter, eRFPowerState); +#elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE) + bResult = phy_SetRFPowerState_8814Sdio(Adapter, eRFPowerState); +#endif + + RT_TRACE(COMP_RF, DBG_LOUD, ("<--------- PHY_SetRFPowerState8814(): bResult(%d)\n", bResult)); + + return bResult; +} +todo */ +//1 5. Tx Power setting API + +VOID +phy_TxPwrAdjInPercentage( + IN PADAPTER Adapter, + OUT u8* pTxPwrIdx) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int txPower = *pTxPwrIdx + pHalData->CurrentTxPwrIdx - 18; + + *pTxPwrIdx = txPower > RF6052_MAX_TX_PWR ? RF6052_MAX_TX_PWR : txPower; +} + +VOID +PHY_GetTxPowerLevel8814( + IN PADAPTER Adapter, + OUT s32* powerlevel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + *powerlevel = pHalData->CurrentTxPwrIdx; +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + s4Byte TxPwrDbm = 13; + + if ( pMgntInfo->ClientConfigPwrInDbm != UNSPECIFIED_PWR_DBM ) + *powerlevel = pMgntInfo->ClientConfigPwrInDbm; + else + *powerlevel = TxPwrDbm; +#endif //0 +/* + //PMPT_CONTEXT pMptCtx = &(Adapter->mppriv.mpt_ctx); + //u8 mgn_rate = mpt_to_mgnt_rate(HwRateToMPTRate(Adapter->mppriv.rateidx)); + *powerlevel=PHY_GetTxPowerIndex8814A(Adapter,RF_PATH_A ,MGN_MCS7, pHalData->current_channel_bw, pHalData->current_channel, NULL); + *powerlevel/=2; +*/ +} + +VOID +PHY_SetTxPowerLevel8814( + IN PADAPTER Adapter, + IN u8 Channel + ) +{ + u32 i, j, k = 0; + u32 value[264]={0}; + u32 path = 0, PowerIndex, txagc_table_wd = 0x00801000; + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + u8 jaguar2Rates[][4] = { {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M}, + {MGN_6M, MGN_9M, MGN_12M, MGN_18M}, + {MGN_24M, MGN_36M, MGN_48M, MGN_54M}, + {MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3}, + {MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7}, + {MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11}, + {MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15}, + {MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19}, + {MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23}, + {MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3}, + {MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7}, + {MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1}, + {MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5}, + {MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9}, + {MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3}, + {MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7}, + {MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, 0, 0}}; + + + for( path = RF_PATH_A; path <= RF_PATH_D; ++path ) + { + phy_set_tx_power_level_by_path(Adapter, Channel, (u8)path); + } +#if 0 //todo H2C_TXPOWER_INDEX_OFFLOAD ? + if(Adapter->MgntInfo.bScanInProgress == FALSE && pHalData->RegFWOffload == 2) + { + HalDownloadTxPowerLevel8814(Adapter, value); + } +#endif //0 +} + +/************************************************************************************************************** + * Description: + * The low-level interface to get the FINAL Tx Power Index , called by both MP and Normal Driver. + * + * <20120830, Kordan> + **************************************************************************************************************/ +u8 +PHY_GetTxPowerIndex8814A( + IN PADAPTER pAdapter, + IN enum rf_path RFPath, + IN u8 Rate, + IN u8 BandWidth, + IN u8 Channel, + struct txpwr_idx_comp *tic + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(pAdapter); + s8 powerDiffByRate = 0; + s8 txPower = 0, limit = 0; + u8 ntx_idx = MgntQuery_NssTxRate(Rate ); + BOOLEAN bIn24G = FALSE; + s8 tpt_offset = 0; + + /* RTW_INFO( "===>%s\n", __FUNCTION__ ); */ + if(pAdapter->mppriv.bSetTxPower) + { + PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.mpt_ctx); + txPower = pMptCtx->TxPwrLevel[RFPath]; + } + else + { + txPower = (s8) PHY_GetTxPowerIndexBase( pAdapter, RFPath, Rate, ntx_idx, BandWidth, Channel, &bIn24G ); + + powerDiffByRate = PHY_GetTxPowerByRate( pAdapter, (u8)(!bIn24G), RFPath, Rate ); + + limit = PHY_GetTxPowerLimit( pAdapter, NULL, (u8)(!bIn24G), pHalData->current_channel_bw, RFPath, Rate,ntx_idx, pHalData->current_channel); + tpt_offset = PHY_GetTxPowerTrackingOffset(pAdapter, RFPath, Rate); + + powerDiffByRate = powerDiffByRate > limit ? limit : powerDiffByRate; + /*RTW_INFO("Rate-0x%x: (TxPower, PowerDiffByRate Path-%c) = (0x%X, %d)\n", Rate, ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), txPower, powerDiffByRate);*/ + + txPower += powerDiffByRate; + + //txPower += PHY_GetTxPowerTrackingOffset( pAdapter, RFPath, Rate ); + #if 0 //todo ? + #if CCX_SUPPORT + CCX_CellPowerLimit( pAdapter, Channel, Rate, &txPower ); + #endif + #endif + phy_TxPwrAdjInPercentage(pAdapter, (u8 *)&txPower); + } + if (tic) { + tic->ntx_idx = ntx_idx; + tic->base = txPower; + tic->by_rate = powerDiffByRate; + tic->limit = limit; + tic->tpt = tpt_offset; + tic->ebias = 0; + } + + if(txPower > hal_spec->txgi_max) + txPower = hal_spec->txgi_max; + + //if (Adapter->registrypriv.mp_mode==0 && + //(pHalData->bautoload_fail_flag || pHalData->EfuseMap[EFUSE_INIT_MAP][EEPROM_TX_PWR_INX_JAGUAR] == 0xFF)) + //txPower = 0x12; + + /*RTW_INFO("Final Tx Power(RF-%c, Channel: %d) = %d(0x%X)\n", ((RFPath==0)?'A':(RFPath==1)?'B':(RFPath==2)?'C':'D'), Channel, + txPower, txPower);*/ + + return (u8) txPower; +} + + +VOID +PHY_SetTxPowerIndex_8814A( + IN PADAPTER Adapter, + IN u32 PowerIndex, + IN enum rf_path RFPath, + IN u8 Rate + ) +{ + u32 txagc_table_wd = 0x00801000; + + txagc_table_wd |= (RFPath << 8) | MRateToHwRate(Rate) | (PowerIndex << 24); + phy_set_bb_reg(Adapter, 0x1998, bMaskDWord, txagc_table_wd); + /* RTW_INFO("txagc_table_wd %x\n", txagc_table_wd); */ + if (Rate == MGN_1M) { + phy_set_bb_reg(Adapter, 0x1998, bMaskDWord, txagc_table_wd); /* first time to turn on the txagc table */ + /* second to write the addr0 */ + } +} + + +BOOLEAN +PHY_UpdateTxPowerDbm8814A( + IN PADAPTER Adapter, + IN s4Byte powerInDbm + ) +{ + return TRUE; +} + + +u32 +PHY_GetTxBBSwing_8814A( + IN PADAPTER Adapter, + IN BAND_TYPE Band, + IN enum rf_path RFPath + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(GetDefaultAdapter(Adapter)); + struct dm_struct * pDM_Odm = &pHalData->odmpriv; + struct dm_rf_calibration_struct * pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); + s8 bbSwing_2G = -1 * GetRegTxBBSwing_2G(Adapter); + s8 bbSwing_5G = -1 * GetRegTxBBSwing_5G(Adapter); + u32 out = 0x200; + const s8 AUTO = -1; + + RTW_DBG("===> PHY_GetTxBBSwing_8814A, bbSwing_2G: %d, bbSwing_5G: %d\n", + (s4Byte)bbSwing_2G, (s4Byte)bbSwing_5G); + + if ( pHalData->bautoload_fail_flag ) + { + if ( Band == BAND_ON_2_4G ) + { + pRFCalibrateInfo->bb_swing_diff_2g = bbSwing_2G; + if (bbSwing_2G == 0) out = 0x200; // 0 dB + else if (bbSwing_2G == -3) out = 0x16A; // -3 dB + else if (bbSwing_2G == -6) out = 0x101; // -6 dB + else if (bbSwing_2G == -9) out = 0x0B6; // -9 dB + else + { + if ( pHalData->ExternalPA_2G ) + { + pRFCalibrateInfo->bb_swing_diff_2g = -3; + out = 0x16A; + } + else + { + pRFCalibrateInfo->bb_swing_diff_2g = 0; + out = 0x200; + } + } + } + else if ( Band == BAND_ON_5G ) + { + pRFCalibrateInfo->bb_swing_diff_5g = bbSwing_5G; + if(bbSwing_5G == 0) out = 0x200; // 0 dB + else if (bbSwing_5G == -3) out = 0x16A; // -3 dB + else if (bbSwing_5G == -6) out = 0x101; // -6 dB + else if (bbSwing_5G == -9) out = 0x0B6; // -9 dB + else + { + if (pHalData->external_pa_5g) + { + pRFCalibrateInfo->bb_swing_diff_5g = -3; + out = 0x16A; + } + else + { + pRFCalibrateInfo->bb_swing_diff_5g = 0; + out = 0x200; + } + } + } + else + { + pRFCalibrateInfo->bb_swing_diff_2g = -3; + pRFCalibrateInfo->bb_swing_diff_5g = -3; + out = 0x16A; // -3 dB + } + } + else + { + u32 swing = 0, onePathSwing = 0; + + if (Band == BAND_ON_2_4G) + { + if (GetRegTxBBSwing_2G(Adapter) == AUTO) + { + EFUSE_ShadowRead(Adapter, 1, EEPROM_TX_BBSWING_2G_8814, (u32 *)&swing); + if (swing == 0xFF) + { + if(bbSwing_2G == 0) swing = 0x00; // 0 dB + else if (bbSwing_2G == -3) swing = 0x55; // -3 dB + else if (bbSwing_2G == -6) swing = 0xAA; // -6 dB + else if (bbSwing_2G == -9) swing = 0xFF; // -9 dB + else swing = 0x00; + } + } + else if (bbSwing_2G == 0) swing = 0x00; // 0 dB + else if (bbSwing_2G == -3) swing = 0x55; // -3 dB + else if (bbSwing_2G == -6) swing = 0xAA; // -6 dB + else if (bbSwing_2G == -9) swing = 0xFF; // -9 dB + else swing = 0x00; + } + else + { + if (GetRegTxBBSwing_5G(Adapter) == AUTO) + { + EFUSE_ShadowRead(Adapter, 1, EEPROM_TX_BBSWING_5G_8814, (u32 *)&swing); + if (swing == 0xFF) + { + if(bbSwing_5G == 0) swing = 0x00; // 0 dB + else if (bbSwing_5G == -3) swing = 0x55; // -3 dB + else if (bbSwing_5G == -6) swing = 0xAA; // -6 dB + else if (bbSwing_5G == -9) swing = 0xFF; // -9 dB + else swing = 0x00; + } + } + else if (bbSwing_5G == 0) swing = 0x00; // 0 dB + else if (bbSwing_5G == -3) swing = 0x55; // -3 dB + else if (bbSwing_5G == -6) swing = 0xAA; // -6 dB + else if (bbSwing_5G == -9) swing = 0xFF; // -9 dB + else swing = 0x00; + } + + if (RFPath == RF_PATH_A) + onePathSwing = (swing & 0x3) >> 0; // 0xC6/C7[1:0] + else if(RFPath == RF_PATH_B) + onePathSwing = (swing & 0xC) >> 2; // 0xC6/C7[3:2] + else if(RFPath == RF_PATH_C) + onePathSwing = (swing & 0x30) >> 4; // 0xC6/C7[5:4] + else if(RFPath == RF_PATH_D) + onePathSwing = (swing & 0xC0) >> 6; // 0xC6/C7[7:6] + + if (onePathSwing == 0x0) + { + if (Band == BAND_ON_2_4G) + pRFCalibrateInfo->bb_swing_diff_2g = 0; + else + pRFCalibrateInfo->bb_swing_diff_5g = 0; + out = 0x200; // 0 dB + } + else if (onePathSwing == 0x1) + { + if (Band == BAND_ON_2_4G) + pRFCalibrateInfo->bb_swing_diff_2g = -3; + else + pRFCalibrateInfo->bb_swing_diff_5g = -3; + out = 0x16A; // -3 dB + } + else if (onePathSwing == 0x2) + { + if (Band == BAND_ON_2_4G) + pRFCalibrateInfo->bb_swing_diff_2g = -6; + else + pRFCalibrateInfo->bb_swing_diff_5g = -6; + out = 0x101; // -6 dB + } + else if (onePathSwing == 0x3) + { + if (Band == BAND_ON_2_4G) + pRFCalibrateInfo->bb_swing_diff_2g = -9; + else + pRFCalibrateInfo->bb_swing_diff_5g = -9; + out = 0x0B6; // -9 dB + } + } + RTW_DBG("<=== PHY_GetTxBBSwing_8814A, out = 0x%X\n", out); + return out; +} + + +//1 7. BandWidth setting API + +VOID +phy_SetBwRegAdc_8814A( + IN PADAPTER Adapter, + IN u8 Band, + IN enum channel_width CurrentBW +) +{ + switch(CurrentBW) + { + case CHANNEL_WIDTH_20: + if(Band == BAND_ON_5G) + { + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1)|BIT(0), 0x0); // 0x8ac[28, 21,20,16, 9:6,1,0]=10'b10_0011_0000 + } + else + { + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1)|BIT(0), 0x0); // 0x8ac[28, 21,20,16, 9:6,1,0]=10'b10_0101_0000 + } + break; + + case CHANNEL_WIDTH_40: + if(Band == BAND_ON_5G) + { + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1)|BIT(0), 0x1); // 0x8ac[17, 11, 10, 7:6,1,0]=7'b100_0001 + } + else + { + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1)|BIT(0), 0x1); // 0x8ac[17, 11, 10, 7:6,1,0]=7'b101_0001 + } + break; + + case CHANNEL_WIDTH_80: + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, BIT(1)|BIT(0), 0x02); // 0x8ac[7:6,1,0]=4'b0010 + break; + + default: + RT_DISP(FPHY, PHY_BBW, ("phy_SetBwRegAdc_8814A(): unknown Bandwidth: %#X\n",CurrentBW)); + break; + } +} + + +VOID +phy_SetBwRegAgc_8814A( + IN PADAPTER Adapter, + IN u8 Band, + IN enum channel_width CurrentBW +) +{ + u32 AgcValue = 7; + switch(CurrentBW) + { + case CHANNEL_WIDTH_20: + if(Band == BAND_ON_5G) + AgcValue = 6; + else + AgcValue = 6; + break; + + case CHANNEL_WIDTH_40: + if(Band == BAND_ON_5G) + AgcValue = 8; + else + AgcValue = 7; + break; + + case CHANNEL_WIDTH_80: + AgcValue = 3; + break; + + default: + RT_DISP(FPHY, PHY_BBW, ("phy_SetBwRegAgc_8814A(): unknown Bandwidth: %#X\n",CurrentBW)); + break; + } + + phy_set_bb_reg(Adapter, rAGC_table_Jaguar, 0xf000, AgcValue); // 0x82C[15:12] = AgcValue +} + + +BOOLEAN +phy_SwBand8814A( + IN PADAPTER pAdapter, + IN u8 channelToSW) +{ + u8 u1Btmp; + BOOLEAN ret_value = _TRUE; + u8 Band = BAND_ON_5G, BandToSW; + + u1Btmp = rtw_read8(pAdapter, REG_CCK_CHECK_8814A); + if(u1Btmp & BIT7) + Band = BAND_ON_5G; + else + Band = BAND_ON_2_4G; + + // Use current channel to judge Band Type and switch Band if need. + if(channelToSW > 14) + { + BandToSW = BAND_ON_5G; + } + else + { + BandToSW = BAND_ON_2_4G; + } + + if(BandToSW != Band) + { + PHY_SwitchWirelessBand8814A(pAdapter,BandToSW); + } + + return ret_value; +} + + +VOID +PHY_SetRFEReg8814A( + IN PADAPTER Adapter, + IN BOOLEAN bInit, + IN u8 Band +) +{ + u8 u1tmp = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(bInit) + { + switch(pHalData->rfe_type){ + case 2:case 1: + phy_set_bb_reg(Adapter, 0x1994, 0xf, 0xf); // 0x1994[3:0] = 0xf + u1tmp = PlatformEFIORead1Byte(Adapter, REG_GPIO_IO_SEL_8814A); + rtw_write8(Adapter, REG_GPIO_IO_SEL_8814A, u1tmp | 0xf0); // 0x40[23:20] = 0xf + break; + case 0: + phy_set_bb_reg(Adapter, 0x1994, 0xf, 0xf); // 0x1994[3:0] = 0xf + u1tmp = PlatformEFIORead1Byte(Adapter, REG_GPIO_IO_SEL_8814A); + rtw_write8(Adapter, REG_GPIO_IO_SEL_8814A, u1tmp | 0xc0); // 0x40[23:22] = 2b'11 + break; + } + } + else if(Band == BAND_ON_2_4G) + { + switch(pHalData->rfe_type){ + case 2: + phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x72707270); // 0xCB0 = 0x72707270 + phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x72707270); // 0xEB0 = 0x72707270 + phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x72707270); // 0x18B4 = 0x72707270 + phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77707770); // 0x1AB4 = 0x77707770 + phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x72); // 0x1ABC[27:20] = 0x72 + break; + + case 1: + phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); // 0xCB0 = 0x77777777 + phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); // 0xEB0 = 0x77777777 + phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); // 0x18B4 = 0x77777777 + phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); // 0x1AB4 = 0x77777777 + phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x77); // 0x1ABC[27:20] = 0x77 + break; + + case 0: + default: + phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); // 0xCB0 = 0x77777777 + phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); // 0xEB0 = 0x77777777 + phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x77777777); // 0x18B4 = 0x77777777 + phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x77); // 0x1ABC[27:20] = 0x77 + break; + + } + } + else + { + switch(pHalData->rfe_type){ + case 2: + phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173717); // 0xCB0 = 0x33173717 + phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173717); // 0xEB0 = 0x33173717 + phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173717); // 0x18B4 = 0x33173717 + phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77177717); // 0x1AB4 = 0x77177717 + phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x37); // 0x1ABC[27:20] = 0x37 + break; + + case 1: + phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173317); // 0xCB0 = 0x33173317 + phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173317); // 0xEB0 = 0x33173317 + phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x33173317); // 0x18B4 = 0x33173317 + phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x77177717); // 0x1AB4 = 0x77177717 + phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x33); // 0x1ABC[27:20] = 0x33 + break; + + case 0: + default: + phy_set_bb_reg(Adapter, rA_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477); // 0xCB0 = 0x54775477 + phy_set_bb_reg(Adapter, rB_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477); // 0xEB0 = 0x54775477 + phy_set_bb_reg(Adapter, rC_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477); // 0x18B4 = 0x54775477 + phy_set_bb_reg(Adapter, rD_RFE_Pinmux_Jaguar, bMaskDWord, 0x54775477); // 0x1AB4 = 0x54775477 + phy_set_bb_reg(Adapter, 0x1ABC, 0x0ff00000, 0x54); // 0x1ABC[27:20] = 0x54 + break; + } + } +} + +VOID +phy_SetBBSwingByBand_8814A( + IN PADAPTER Adapter, + IN u8 Band, + IN u8 PreviousBand + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + s8 BBDiffBetweenBand = 0; + struct dm_struct * pDM_Odm = &pHalData->odmpriv; + struct dm_rf_calibration_struct * pRFCalibrateInfo = &(pDM_Odm->rf_calibrate_info); + + phy_set_bb_reg(Adapter, rA_TxScale_Jaguar, 0xFFE00000, + PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_A)); // 0xC1C[31:21] + phy_set_bb_reg(Adapter, rB_TxScale_Jaguar, 0xFFE00000, + PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_B)); // 0xE1C[31:21] + phy_set_bb_reg(Adapter, rC_TxScale_Jaguar2, 0xFFE00000, + PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_C)); // 0x181C[31:21] + phy_set_bb_reg(Adapter, rD_TxScale_Jaguar2, 0xFFE00000, + PHY_GetTxBBSwing_8814A(Adapter, (BAND_TYPE)Band, RF_PATH_D)); // 0x1A1C[31:21] + + // <20121005, Kordan> When TxPowerTrack is ON, we should take care of the change of BB swing. + // That is, reset all info to trigger Tx power tracking. + + if (Band != PreviousBand) + { + BBDiffBetweenBand = (pRFCalibrateInfo->bb_swing_diff_2g - pRFCalibrateInfo->bb_swing_diff_5g); + BBDiffBetweenBand = (Band == BAND_ON_2_4G) ? BBDiffBetweenBand : (-1 * BBDiffBetweenBand); + pRFCalibrateInfo->default_ofdm_index += BBDiffBetweenBand*2; + } + + odm_clear_txpowertracking_state(pDM_Odm); +} + + +s32 +PHY_SwitchWirelessBand8814A( + IN PADAPTER Adapter, + IN u8 Band +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 PreBand = pHalData->current_band_type, tepReg = 0; + + RTW_INFO("==>PHY_SwitchWirelessBand8814() %s\n", ((Band==0)?"2.4G":"5G")); + + pHalData->current_band_type =(BAND_TYPE)Band; + + /*clear 0x1000[16], When this bit is set to 0, CCK and OFDM are disabled, and clock are gated. Otherwise, CCK and OFDM are enabled. */ + tepReg = rtw_read8(Adapter, REG_SYS_CFG3_8814A+2); + rtw_write8(Adapter, REG_SYS_CFG3_8814A+2, tepReg & (~BIT0)); + + // STOP Tx/Rx + //phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x00); + + if(Band == BAND_ON_2_4G) + {// 2.4G band + + // AGC table select + phy_set_bb_reg(Adapter, rAGC_table_Jaguar2, 0x1F, 0); // 0x958[4:0] = 5b'00000 + + PHY_SetRFEReg8814A(Adapter, FALSE, Band); + + // cck_enable + //phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x3); + + if(Adapter->registrypriv.mp_mode == 0) + { + // 0x80C & 0xa04 should use same antenna. + phy_set_bb_reg(Adapter, rTxPath_Jaguar, 0xf0, 0x2); + phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0x5); + } + + phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x3); + + + // CCK_CHECK_en + rtw_write8(Adapter, REG_CCK_CHECK_8814A, 0x0); + /* after 5G swicth 2G , set A82[2] = 0 */ + phy_set_bb_reg(Adapter, 0xa80, BIT18, 0x0); + + } + else //5G band + { + // CCK_CHECK_en + rtw_write8(Adapter, REG_CCK_CHECK_8814A, 0x80); + /* Enable CCK Tx function, even when CCK is off */ + phy_set_bb_reg(Adapter, 0xa80, BIT18, 0x1); + + // AGC table select + // Postpone to channel switch + //phy_set_bb_reg(Adapter, rAGC_table_Jaguar2, 0x1F, 1); // 0x958[4:0] = 5b'00001 + + PHY_SetRFEReg8814A(Adapter, FALSE, Band); + + if(Adapter->registrypriv.mp_mode == 0) + { + phy_set_bb_reg(Adapter, rTxPath_Jaguar, 0xf0, 0x0); + phy_set_bb_reg(Adapter, rCCK_RX_Jaguar, 0x0f000000, 0xF); + } + + phy_set_bb_reg(Adapter, rOFDMCCKEN_Jaguar, bOFDMEN_Jaguar|bCCKEN_Jaguar, 0x02); + //RTW_INFO("==>PHY_SwitchWirelessBand8814() BAND_ON_5G settings OFDM index 0x%x\n", pHalData->OFDM_index[0]); + } + + phy_SetBBSwingByBand_8814A(Adapter, Band, PreBand); + phy_SetBwRegAdc_8814A(Adapter, Band, pHalData->current_channel_bw); + phy_SetBwRegAgc_8814A(Adapter, Band, pHalData->current_channel_bw); + /* set 0x1000[16], When this bit is set to 0, CCK and OFDM are disabled, and clock are gated. Otherwise, CCK and OFDM are enabled.*/ + tepReg = rtw_read8(Adapter, REG_SYS_CFG3_8814A+2); + rtw_write8(Adapter, REG_SYS_CFG3_8814A+2, tepReg | BIT0); + + RTW_INFO("<==PHY_SwitchWirelessBand8814():Switch Band OK.\n"); + return _SUCCESS; +} + + +u8 +phy_GetSecondaryChnl_8814A( + IN PADAPTER Adapter +) +{ + u8 SCSettingOf40 = 0, SCSettingOf20 = 0; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + //RTW_INFO("SCMapping: Case: pHalData->current_channel_bw %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->current_channel_bw,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC); + if(pHalData->current_channel_bw== CHANNEL_WIDTH_80) + { + if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) + SCSettingOf40 = VHT_DATA_SC_40_LOWER_OF_80MHZ; + else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) + SCSettingOf40 = VHT_DATA_SC_40_UPPER_OF_80MHZ; + else + RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); + + if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) + SCSettingOf20 = VHT_DATA_SC_20_LOWEST_OF_80MHZ; + else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) + SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; + else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) + SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; + else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) + SCSettingOf20 = VHT_DATA_SC_20_UPPERST_OF_80MHZ; + else + { + if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) + SCSettingOf20 = VHT_DATA_SC_40_LOWER_OF_80MHZ; + else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) + SCSettingOf20 = VHT_DATA_SC_40_UPPER_OF_80MHZ; + else + RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); + } + } + else if(pHalData->current_channel_bw == CHANNEL_WIDTH_40) + { + RTW_INFO("SCMapping: pHalData->current_channel_bw %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->current_channel_bw,pHalData->nCur40MhzPrimeSC); + + if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) + SCSettingOf20 = VHT_DATA_SC_20_UPPER_OF_80MHZ; + else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) + SCSettingOf20 = VHT_DATA_SC_20_LOWER_OF_80MHZ; + else + RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); + } + + /*RTW_INFO("SCMapping: SC Value %x\n", ((SCSettingOf40 << 4) | SCSettingOf20));*/ + return ( (SCSettingOf40 << 4) | SCSettingOf20); +} + + +VOID +phy_SetBwRegMac_8814A( + IN PADAPTER Adapter, + enum channel_width CurrentBW +) +{ + u16 RegRfMod_BW, u2tmp = 0; + RegRfMod_BW = PlatformEFIORead2Byte(Adapter, REG_TRXPTCL_CTL_8814A); + + switch(CurrentBW) + { + case CHANNEL_WIDTH_20: + PlatformEFIOWrite2Byte(Adapter, REG_TRXPTCL_CTL_8814A, (RegRfMod_BW & 0xFE7F)); // BIT 7 = 0, BIT 8 = 0 + break; + + case CHANNEL_WIDTH_40: + u2tmp = RegRfMod_BW | BIT7; + PlatformEFIOWrite2Byte(Adapter, REG_TRXPTCL_CTL_8814A, (u2tmp & 0xFEFF)); // BIT 7 = 1, BIT 8 = 0 + break; + + case CHANNEL_WIDTH_80: + u2tmp = RegRfMod_BW | BIT8; + PlatformEFIOWrite2Byte(Adapter, REG_TRXPTCL_CTL_8814A, (u2tmp & 0xFF7F)); // BIT 7 = 0, BIT 8 = 1 + break; + + default: + RT_DISP(FPHY, PHY_BBW, ("phy_SetBwRegMac_8814A(): unknown Bandwidth: %#X\n",CurrentBW)); + break; + } +} + +void PHY_Set_SecCCATH_by_RXANT_8814A(PADAPTER pAdapter,u4Byte ulAntennaRx) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pAdapter); + + if ((pHalData->bSWToBW40M == TRUE) && (pHalData->current_channel_bw != CHANNEL_WIDTH_40)) { + phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000,pHalData->BackUp_BB_REG_4_2nd_CCA[0]); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00,pHalData->BackUp_BB_REG_4_2nd_CCA[1]); + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,pHalData->BackUp_BB_REG_4_2nd_CCA[2]); + pHalData->bSWToBW40M = FALSE; + } + + if ((pHalData->bSWToBW80M == TRUE) && (pHalData->current_channel_bw != CHANNEL_WIDTH_80)) { + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000, pHalData->BackUp_BB_REG_4_2nd_CCA[2]); + pHalData->bSWToBW80M = FALSE; + } + + /*1 Setting CCA TH 2nd CCA parameter by Rx Antenna*/ + if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) { + if (pHalData->bSWToBW80M == FALSE) { + pHalData->BackUp_BB_REG_4_2nd_CCA[2] = phy_query_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000); + } + + pHalData->bSWToBW80M = TRUE; + + switch (ulAntennaRx) { + case ANTENNA_A: + case ANTENNA_B: + case ANTENNA_C: + case ANTENNA_D: + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,0x0b);/* 0x844[27:24] = 0xb */ + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /* 0x838 Enable 2ndCCA */ + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x89); /* 0x82C[23:20] = 8, PWDB_TH_QB, 0x82C[19:16] = 9, PWDB_TH_HB*/ + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x887); /* 838[27:24]=8, RF80_secondary40, 838[23:20]=8, RF80_secondary20, 838[19:16]=7, RF80_primary*/ + phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x7); /* 840[15:12]=7, L1_square_Pk_weight_80M*/ + break; + + case ANTENNA_AB: + case ANTENNA_AC: + case ANTENNA_AD: + case ANTENNA_BC: + case ANTENNA_BD: + case ANTENNA_CD: + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,0x0d); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /* Enable 2ndCCA*/ + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x78); /* 0x82C[23:20] = 7, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/ + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x444); /* 838[27:24]=4, RF80_secondary40, 838[23:20]=4, RF80_secondary20, 838[19:16]=4, RF80_primary*/ + phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x6); /* 840[15:12]=6, L1_square_Pk_weight_80M*/ + break; + + case ANTENNA_ABC: + case ANTENNA_ABD: + case ANTENNA_ACD: + case ANTENNA_BCD: + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,0x0d); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /* Enable 2ndCCA*/ + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x98); /* 0x82C[23:20] = 9, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/ + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x666); /* 838[27:24]=6, RF80_secondary40, 838[23:20]=6, RF80_secondary20, 838[19:16]=6, RF80_primary*/ + phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x6); /* 840[15:12]=6, L1_square_Pk_weight_80M*/ + break; + + case ANTENNA_ABCD: + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,0x0d); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); /*Enable 2ndCCA*/ + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x98); /* 0x82C[23:20] = 9, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/ + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x666); /* 838[27:24]=6, RF80_secondary40, 838[23:20]=6, RF80_secondary20, 838[19:16]=6, RF80_primary*/ + phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x7); /*840[15:12]=7, L1_square_Pk_weight_80M*/ + break; + + default: + RTW_INFO("Unknown Rx antenna.\n"); + break; + } + } else if(pHalData->current_channel_bw == CHANNEL_WIDTH_40) { + if (pHalData->bSWToBW40M == FALSE) { + pHalData->BackUp_BB_REG_4_2nd_CCA[0] = phy_query_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000); + pHalData->BackUp_BB_REG_4_2nd_CCA[1] = phy_query_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00); + pHalData->BackUp_BB_REG_4_2nd_CCA[2] = phy_query_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000); + } + + switch (ulAntennaRx) { + case ANTENNA_A: /* xT1R*/ + case ANTENNA_B: + case ANTENNA_C: + case ANTENNA_D: + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,0x0b); + phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000, 0xe); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00, 0x43); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); + break; + case ANTENNA_AB: /* xT2R*/ + case ANTENNA_AC: + case ANTENNA_AD: + case ANTENNA_BC: + case ANTENNA_BD: + case ANTENNA_CD: + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,0x0d); + phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000, 0x8); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00, 0x43); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); + break; + case ANTENNA_ABC: /* xT3R*/ + case ANTENNA_ABD: + case ANTENNA_ACD: + case ANTENNA_BCD: + case ANTENNA_ABCD: /* xT4R*/ + phy_set_bb_reg(pAdapter, r_L1_SBD_start_time, 0x0f000000,0x0d); + phy_set_bb_reg(pAdapter, rPwed_TH_Jaguar, 0x007c0000, 0xa); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0000ff00, 0x43); + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x1); + break; + default: + break; + } + pHalData->bSWToBW40M = TRUE; + } else { + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x00000001, 0x0); /* Enable 2ndCCA*/ + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar, 0x00FF0000, 0x43); /* 0x82C[23:20] = 9, PWDB_TH_QB, 0x82C[19:16] = 8, PWDB_TH_HB*/ + phy_set_bb_reg(pAdapter, rCCAonSec_Jaguar, 0x0FFF0000, 0x7aa); /* 838[27:24]=6, RF80_secondary40, 838[23:20]=6, RF80_secondary20, 838[19:16]=6, RF80_primary*/ + phy_set_bb_reg(pAdapter, rL1_Weight_Jaguar, 0x0000F000, 0x7); /* 840[15:12]=7, L1_square_Pk_weight_80M*/ + } + +} + + +VOID PHY_SetRXSC_by_TXSC_8814A(PADAPTER Adapter, u1Byte SubChnlNum) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + if (pHalData->current_channel_bw == CHANNEL_WIDTH_80) { + if (SubChnlNum == 0) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1); + else if (SubChnlNum == 1) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1); + else if (SubChnlNum == 2) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x2); + else if (SubChnlNum == 4) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x4); + else if (SubChnlNum == 3) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x3); + else if (SubChnlNum == 9) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1); + else if (SubChnlNum == 10) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x2); + } else if (pHalData->current_channel_bw == CHANNEL_WIDTH_40) { + if (SubChnlNum == 1) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x1); + else if (SubChnlNum == 2) + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x2); + } else + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x00000003c, 0x0); +} + + +/* <20141230, James> A workaround to eliminate the 5280MHz & 5600MHz & 5760MHzspur of 8814A. (Asked by BBSD Neil.)*/ +VOID phy_SpurCalibration_8814A(PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + BOOLEAN Reset_NBI_CSI = TRUE; + struct dm_struct * pDM_Odm = &pHalData->odmpriv; + + /*RTW_INFO("%s(),RFE Type =%d, CurrentCh = %d ,ChannelBW =%d\n", __func__, pHalData->rfe_type, pHalData->current_channel, pHalData->current_channel_bw);*/ + /*RTW_INFO("%s(),Before RrNBI_Setting_Jaguar= %x\n", __func__, phy_query_bb_reg(Adapter, rNBI_Setting_Jaguar, bMaskDWord));*/ + + if (pHalData->rfe_type == 0) { + switch (pHalData->current_channel_bw) { + case CHANNEL_WIDTH_40: + if (pHalData->current_channel == 54 || pHalData->current_channel == 118) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x3e >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0); + Reset_NBI_CSI = FALSE; + } else if (pHalData->current_channel == 151) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1e >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, BIT(16), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0); + Reset_NBI_CSI = FALSE; + } + break; + + case CHANNEL_WIDTH_80: + if (pHalData->current_channel == 58 || pHalData->current_channel == 122) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x3a >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, BIT(0), 1); + Reset_NBI_CSI = FALSE; + } else if (pHalData->current_channel == 155) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x5a >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, BIT(16), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0); + Reset_NBI_CSI = FALSE; + } + break; + case CHANNEL_WIDTH_20: + if (pHalData->current_channel == 153) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1e >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, BIT(16), 1); + Reset_NBI_CSI = FALSE; + } + break; + + default: + break; + } + } else if (pHalData->rfe_type == 1 || pHalData->rfe_type == 2) { + switch (pHalData->current_channel_bw) { + case CHANNEL_WIDTH_20: + if (pHalData->current_channel == 153) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1E >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, BIT(16), 1); + Reset_NBI_CSI = FALSE; + } + break; + case CHANNEL_WIDTH_40: + if (pHalData->current_channel == 151) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x1e >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, BIT(16), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0); + Reset_NBI_CSI = FALSE; + } + break; + case CHANNEL_WIDTH_80: + if (pHalData->current_channel == 155) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0x5a >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, BIT(16), 1); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0); + Reset_NBI_CSI = FALSE; + } + break; + + default: + break; + } + } + + if (Reset_NBI_CSI) { + phy_set_bb_reg(Adapter, rNBI_Setting_Jaguar, 0x000fe000, 0xfc >> 1); + phy_set_bb_reg(Adapter, rCSI_Mask_Setting1_Jaguar, BIT(0), 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask0_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask1_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask6_Jaguar, bMaskDWord, 0); + phy_set_bb_reg(Adapter, rCSI_Fix_Mask7_Jaguar, bMaskDWord, 0); + } + + phydm_spur_nbi_setting_8814a(pDM_Odm); + /*RTW_INFO("%s(),After RrNBI_Setting_Jaguar= %x\n", __func__, phy_query_bb_reg(Adapter, rNBI_Setting_Jaguar, bMaskDWord));*/ +} + + +void phy_ModifyInitialGain_8814A( + PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 channel = pHalData->current_channel; + s1Byte offset[4]; /*{A,B,C,D}*/ + u8 i = 0; + u8 chnl_section = 0xff; + + if (channel <= 14 && channel > 0) + chnl_section = 0; /*2G*/ + else if (channel <= 64 && channel >= 36) + chnl_section = 1; /*5GL*/ + else if (channel <= 144 && channel >= 100) + chnl_section = 2; /*5GM*/ + else if (channel <= 177 && channel >= 149) + chnl_section = 3; /*5GH*/ + + if (chnl_section > 3) { + RTW_INFO("%s: worng channel section\n", __func__); + return; + } + + for (i = 0; i < 4; i++) { + u1Byte hex_offset; + + hex_offset = (u1Byte)(pHalData->RxGainOffset[chnl_section] >> (12-4*i))&0x0f; + RTW_INFO("%s: pHalData->RxGainOffset[%d] = %x\n", __func__, chnl_section, pHalData->RxGainOffset[chnl_section]); + RTW_INFO("%s: hex_offset = %x\n", __func__, hex_offset); + + if (hex_offset == 0xf) + offset[i] = 0; + else if (hex_offset >= 0x8) + offset[i] = 0x11 - hex_offset; + else + offset[i] = 0x0 - hex_offset; + offset[i] = (offset[i] / 2) * 2; + RTW_INFO("%s: offset[%d] = %x\n", __func__, i, offset[i]); + RTW_INFO("%s: BackUp_IG_REG_4_Chnl_Section[%d] = %x\n", __func__, i, pHalData->BackUp_IG_REG_4_Chnl_Section[i]); + } + + if (pHalData->BackUp_IG_REG_4_Chnl_Section[0] != 0 && + pHalData->BackUp_IG_REG_4_Chnl_Section[1] != 0 && + pHalData->BackUp_IG_REG_4_Chnl_Section[2] != 0 && + pHalData->BackUp_IG_REG_4_Chnl_Section[3] != 0 + ) { + phy_set_bb_reg(Adapter, rA_IGI_Jaguar, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[0] + offset[0]); + phy_set_bb_reg(Adapter, rB_IGI_Jaguar, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[1] + offset[1]); + phy_set_bb_reg(Adapter, rC_IGI_Jaguar2, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[2] + offset[2]); + phy_set_bb_reg(Adapter, rD_IGI_Jaguar2, 0x000000ff, pHalData->BackUp_IG_REG_4_Chnl_Section[3] + offset[3]); + } +} + + +VOID phy_SetBwMode8814A(PADAPTER Adapter) +{ + u8 SubChnlNum = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //3 Set Reg668 BW + phy_SetBwRegMac_8814A(Adapter, pHalData->current_channel_bw); + + //3 Set Reg483 + SubChnlNum = phy_GetSecondaryChnl_8814A(Adapter); + rtw_write8(Adapter, REG_DATA_SC_8814A, SubChnlNum); + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + RTW_INFO("phy_SetBwMode8814A: return for PSEUDO \n"); + return; + } + + //3 Set Reg8AC Reg8C4 Reg8C8 + phy_SetBwRegAdc_8814A(Adapter, pHalData->current_band_type, pHalData->current_channel_bw); + //3 Set Reg82C + phy_SetBwRegAgc_8814A(Adapter, pHalData->current_band_type, pHalData->current_channel_bw); + + //3 Set Reg848 RegA00 + switch(pHalData->current_channel_bw) + { + case CHANNEL_WIDTH_20: + break; + + case CHANNEL_WIDTH_40: + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x3C, SubChnlNum); // 0x8ac[5:2]=1/2 + + if(SubChnlNum == VHT_DATA_SC_20_UPPER_OF_80MHZ) // 0xa00[4]=1/0 + phy_set_bb_reg(Adapter, rCCK_System_Jaguar, bCCK_System_Jaguar, 1); + else + phy_set_bb_reg(Adapter, rCCK_System_Jaguar, bCCK_System_Jaguar, 0); + break; + + case CHANNEL_WIDTH_80: + phy_set_bb_reg(Adapter, rRFMOD_Jaguar, 0x3C, SubChnlNum); // 0x8ac[5:2]=1/2/3/4/9/10 + break; + + default: + RTW_INFO("%s():unknown Bandwidth:%#X\n", __func__, pHalData->current_channel_bw); + break; + } + +#if (MP_DRIVER == 1) +if (Adapter->registrypriv.mp_mode == 1) { + /* 2 Set Reg 0x8AC */ + PHY_SetRXSC_by_TXSC_8814A(Adapter, (SubChnlNum & 0xf)); + PHY_Set_SecCCATH_by_RXANT_8814A(Adapter, pHalData->AntennaRxPath); +} +#endif + /* 3 Set RF related register */ + PHY_RF6052SetBandwidth8814A(Adapter, pHalData->current_channel_bw); + + phy_ADC_CLK_8814A(Adapter); + phy_SpurCalibration_8814A(Adapter); +} + + + +//1 6. Channel setting API + +// Add for KFree Feature Requested by RF David. +// We need support ABCD four path Kfree +#if 0 /* no equivalent in 5.2.20... maybe not needed */ +VOID +phy_SetKfreeToRF_8814A( + IN PADAPTER Adapter, + IN u8 eRFPath, + IN u8 Data + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(GetDefaultAdapter(Adapter)); + struct dm_struct * pDM_Odm = &pHalData->odmpriv; + BOOLEAN bOdd; + struct dm_rf_calibration_struct * pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo); + if((Data%2) != 0) //odd -> positive + { + Data = Data - 1; + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT19, 1); + bOdd = TRUE; + } + else // even -> negative + { + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT19, 0); + bOdd = FALSE; + } + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", bOdd)); + switch(Data) + { + case 2: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT14, 1); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 0; + break; + case 4: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 1); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 1; + break; + case 6: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT14, 1); + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 1); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 1; + break; + case 8: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 2); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 2; + break; + case 10: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT14, 1); + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 2); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 2; + break; + case 12: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 3); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 3; + break; + case 14: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT14, 1); + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 3); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 3; + break; + case 16: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 4); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 4; + break; + case 18: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT14, 1); + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 4); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 4; + break; + case 20: + phy_set_rf_reg(Adapter, eRFPath, rRF_TxGainOffset, BIT17|BIT16|BIT15, 5); + pRFCalibrateInfo->KfreeOffset[eRFPath] = 5; + break; + + default: + break; + } + + if(bOdd == FALSE) // that means Kfree offset is negative, we need to record it. + { + pRFCalibrateInfo->KfreeOffset[eRFPath] = (-1)*pRFCalibrateInfo->KfreeOffset[eRFPath]; + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): KfreeOffset = %d\n", pRFCalibrateInfo->KfreeOffset[eRFPath])); + } + else + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): KfreeOffset = %d\n", pRFCalibrateInfo->KfreeOffset[eRFPath])); + +} + + +VOID +phy_ConfigKFree8814A( + IN PADAPTER Adapter, + IN u8 channelToSW, + IN BAND_TYPE bandType + ) +{ + u8 targetval_A = 0xFF; + u8 targetval_B = 0xFF; + u8 targetval_C = 0xFF; + u8 targetval_D = 0xFF; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //RTW_INFO("===>phy_ConfigKFree8814A()\n"); + + if (Adapter->registrypriv.RegPwrTrimEnable == 2) + { + //RTW_INFO("phy_ConfigKFree8814A(): RegPwrTrimEnable == 2, Disable \n"); + return; + } + else if (Adapter->registrypriv.RegPwrTrimEnable == 1 || Adapter->registrypriv.RegPwrTrimEnable == 0) + { + RTW_INFO("phy_ConfigKFree8814A(): RegPwrTrimEnable == TRUE \n"); + if (bandType == BAND_ON_2_4G) // 2G + { + RTW_INFO("phy_ConfigKFree8814A(): bandType == BAND_ON_2_4G, channelToSW= %d \n", channelToSW); + if (channelToSW <= 14 && channelToSW >= 1) + { + efuse_OneByteRead(Adapter, 0x3F4, &targetval_A, FALSE); // for Path A and B + efuse_OneByteRead(Adapter, 0x3F5, &targetval_B, FALSE); // for Path C and D + } + + } + else if (bandType == BAND_ON_5G) + { + RTW_INFO("phy_ConfigKFree8814A(): bandType == BAND_ON_5G, channelToSW= %d \n", channelToSW); + if (channelToSW >= 36 && channelToSW < 50) // 5GLB_1 + { + efuse_OneByteRead(Adapter, 0x3E0, &targetval_A, FALSE); + efuse_OneByteRead(Adapter, 0x3E1, &targetval_B, FALSE); + efuse_OneByteRead(Adapter, 0x3E2, &targetval_C, FALSE); + efuse_OneByteRead(Adapter, 0x3E3, &targetval_D, FALSE); + } + else if (channelToSW >= 50 && channelToSW <= 64) // 5GLB_2 + { + efuse_OneByteRead(Adapter, 0x3E4, &targetval_A, FALSE); + efuse_OneByteRead(Adapter, 0x3E5, &targetval_B, FALSE); + efuse_OneByteRead(Adapter, 0x3E6, &targetval_C, FALSE); + efuse_OneByteRead(Adapter, 0x3E7, &targetval_D, FALSE); + } + else if (channelToSW >= 100 && channelToSW <= 118) // 5GMB_1 + { + efuse_OneByteRead(Adapter, 0x3E8, &targetval_A, FALSE); + efuse_OneByteRead(Adapter, 0x3E9, &targetval_B, FALSE); + efuse_OneByteRead(Adapter, 0x3EA, &targetval_C, FALSE); + efuse_OneByteRead(Adapter, 0x3EB, &targetval_D, FALSE); + } + else if (channelToSW >= 120 && channelToSW <= 140) // 5GMB_2 + { + efuse_OneByteRead(Adapter, 0x3EC, &targetval_A, FALSE); + efuse_OneByteRead(Adapter, 0x3ED, &targetval_B, FALSE); + efuse_OneByteRead(Adapter, 0x3EE, &targetval_C, FALSE); + efuse_OneByteRead(Adapter, 0x3EF, &targetval_D, FALSE); + } + else if (channelToSW >= 149 && channelToSW <= 165) // 5GHB + { + efuse_OneByteRead(Adapter, 0x3F0, &targetval_A, FALSE); + efuse_OneByteRead(Adapter, 0x3F1, &targetval_B, FALSE); + efuse_OneByteRead(Adapter, 0x3F2, &targetval_C, FALSE); + efuse_OneByteRead(Adapter, 0x3F3, &targetval_D, FALSE); + } + } + RTW_INFO("phy_ConfigKFree8814A(): targetval_A= %#x \n", targetval_A); + RTW_INFO("phy_ConfigKFree8814A(): targetval_B= %#x \n", targetval_B); + RTW_INFO("phy_ConfigKFree8814A(): targetval_C= %#x \n", targetval_C); + RTW_INFO("phy_ConfigKFree8814A(): targetval_D= %#x \n", targetval_D); + + // Make sure the targetval is defined + if ((Adapter->registrypriv.RegPwrTrimEnable == 1) && ((targetval_A != 0xFF) || (pHalData->RfKFreeEnable == TRUE))) + { + if (bandType == BAND_ON_2_4G) // 2G + { + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_A: %#x \n", targetval_A&0x0F)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_A, targetval_A&0x0F); + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_B: %#x \n", (targetval_A&0xF0)>>4)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_B, (targetval_A&0xF0)>>4); + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_C: %#x \n", targetval_B&0x0F)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_C, targetval_B&0x0F); + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_D: %#x \n", (targetval_B&0xF0)>>4)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_D, (targetval_B&0xF0)>>4); + } + else if(bandType == BAND_ON_5G) + { + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_A: %#x \n", targetval_A&0x1F)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_A, targetval_A&0x1F); + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_B: %#x \n", targetval_B&0x1F)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_B, targetval_B&0x1F); + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_C: %#x \n", targetval_C&0x1F)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_C, targetval_C&0x1F); + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): PATH_D: %#x \n", targetval_D&0x1F)); + phy_SetKfreeToRF_8814A(Adapter, RF_PATH_D, targetval_D&0x1F); + } + } + else + { + RT_TRACE(COMP_MP, DBG_LOUD, ("phy_ConfigKFree8814A(): targetval not defined, Don't execute KFree Process.\n")); + return; + } + } + RT_TRACE(COMP_MP, DBG_LOUD, ("<===phy_ConfigKFree8814A()\n")); +} +#endif +VOID +phy_SwChnl8814A( + IN PADAPTER pAdapter + ) +{ + u8 eRFPath = 0 , channelIdx = 0; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); +#ifdef CONFIG_RF_GAIN_OFFSET + struct kfree_data_t *kfree_data = &pHalData->kfree_data; +#endif + u8 channelToSW = pHalData->current_channel; + u32 RFValToWR , RFTmpVal, BitShift, BitMask; + + //RTW_INFO("[BW:CHNL], phy_SwChnl8814A(), switch to channel %d !!\n", channelToSW); + + if (phy_SwBand8814A(pAdapter, channelToSW) == FALSE) + { + RTW_INFO("error Chnl %d", channelToSW); + } + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + RTW_DBG("phy_SwChnl8814A: return for PSEUDO\n"); + return; + } + +#ifdef CONFIG_RF_GAIN_OFFSET + /* Add for KFree Feature Requested by RF David. */ + if (kfree_data->flag & KFREE_FLAG_ON) { + + channelIdx = rtw_ch_to_bb_gain_sel(channelToSW); + #if 0 + if (pHalData->RfKFree_ch_group != channelIdx) { + /* Todo: wait for new phydm ready */ + phy_ConfigKFree8814A(pAdapter, channelToSW, pHalData->current_band_type); + phydm_ConfigKFree(pDM_Odm, channelToSW, kfree_data->bb_gain); + RTW_INFO("RfKFree_ch_group =%d\n", channelIdx); + } + #endif + + pHalData->RfKFree_ch_group = channelIdx; + + } +#endif + if(pHalData->RegFWOffload == 2) + { + FillH2CCmd_8814(pAdapter, H2C_CHNL_SWITCH_OFFLOAD, 1, &channelToSW); + } + else + { + // fc_area + if (36 <= channelToSW && channelToSW <= 48) + phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x494); + else if (50 <= channelToSW && channelToSW <= 64) + phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x453); + else if (100 <= channelToSW && channelToSW <= 116) + phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x452); + else if (118 <= channelToSW) + phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x412); + else + phy_set_bb_reg(pAdapter, rFc_area_Jaguar, 0x1ffe0000, 0x96a); + + for(eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) + { + // RF_MOD_AG + if (36 <= channelToSW && channelToSW <= 64) + RFValToWR = 0x101; //5'b00101 + else if (100 <= channelToSW && channelToSW <= 140) + RFValToWR = 0x301; //5'b01101 + else if (140 < channelToSW) + RFValToWR = 0x501; //5'b10101 + else + RFValToWR = 0x000; //5'b00000 + + // Channel to switch + BitMask = BIT18|BIT17|BIT16|BIT9|BIT8; + BitShift = PHY_CalculateBitShift(BitMask); + RFTmpVal = channelToSW | (RFValToWR << BitShift); + + BitMask = BIT18|BIT17|BIT16|BIT9|BIT8|bMaskByte0; + + phy_set_rf_reg(pAdapter, eRFPath, RF_CHNLBW_Jaguar, BitMask, RFTmpVal); + } + + if (36 <= channelToSW && channelToSW <= 64) // Band 1 & Band 2 + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar2, 0x1F, 1); // 0x958[4:0] = 0x1 + else if (100 <= channelToSW && channelToSW <= 144) // Band 3 + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar2, 0x1F, 2); // 0x958[4:0] = 0x2 + else if(channelToSW >= 149) // Band 4 + phy_set_bb_reg(pAdapter, rAGC_table_Jaguar2, 0x1F, 3); // 0x958[4:0] = 0x3 + } + + if (pAdapter->registrypriv.mp_mode == 1) { + if (!pHalData->bSetChnlBW) + phy_ADC_CLK_8814A(pAdapter); + phy_SpurCalibration_8814A(pAdapter); + phy_ModifyInitialGain_8814A(pAdapter); + } + + /* 2.4G CCK TX DFIR */ + if (channelToSW >= 1 && channelToSW <= 11) { + phy_set_bb_reg(pAdapter, rCCK0_TxFilter1, bMaskDWord, 0x1a1b0030); + phy_set_bb_reg(pAdapter, rCCK0_TxFilter2, bMaskDWord, 0x090e1317); + phy_set_bb_reg(pAdapter, rCCK0_DebugPort, bMaskDWord, 0x00000204); + } else if (channelToSW >= 12 && channelToSW <= 13) { + phy_set_bb_reg(pAdapter, rCCK0_TxFilter1, bMaskDWord, 0x1a1b0030); + phy_set_bb_reg(pAdapter, rCCK0_TxFilter2, bMaskDWord, 0x090e1217); + phy_set_bb_reg(pAdapter, rCCK0_DebugPort, bMaskDWord, 0x00000305); + } else if (channelToSW == 14) { + phy_set_bb_reg(pAdapter, rCCK0_TxFilter1, bMaskDWord, 0x1a1b0030); + phy_set_bb_reg(pAdapter, rCCK0_TxFilter2, bMaskDWord, 0x00000E17); + phy_set_bb_reg(pAdapter, rCCK0_DebugPort, bMaskDWord, 0x00000000); + } + +} + +/* +VOID +PHY_SwChnlTimerCallback8814A( + IN PRT_TIMER pTimer + ) +{ + PADAPTER pAdapter = (PADAPTER)pTimer->Adapter; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SwChnlTimerCallback8814A(), switch to channel %d\n", pHalData->current_channel)); + + if (rtw_is_drv_stopped(padapter)) + return; + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + pHalData->SwChnlInProgress=FALSE; + return; //return immediately if it is peudo-phy + } + + + PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + pHalData->SwChnlInProgress=TRUE; + PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + + phy_SwChnl8814A(pAdapter); + + PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + pHalData->SwChnlInProgress=FALSE; + PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + + RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SwChnlTimerCallback8814()\n")); +} + + +VOID +PHY_SwChnlWorkItemCallback8814A( + IN PVOID pContext + ) +{ + PADAPTER pAdapter = (PADAPTER)pContext; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SwChnlWorkItemCallback8814A(), switch to channel %d\n", pHalData->current_channel)); + + if(pAdapter->bInSetPower && RT_USB_CANNOT_IO(pAdapter)) + { + RT_TRACE(COMP_SCAN, DBG_LOUD, ("<== PHY_SwChnlWorkItemCallback8814A() SwChnlInProgress FALSE driver sleep or unload\n")); + + pHalData->SwChnlInProgress = FALSE; + return; + } + + if (rtw_is_drv_stopped(padapter)) + return; + + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + pHalData->SwChnlInProgress=FALSE; + return; //return immediately if it is peudo-phy + } + + PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + pHalData->SwChnlInProgress=TRUE; + PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + + phy_SwChnl8814A(pAdapter); + + PlatformAcquireSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + pHalData->SwChnlInProgress=FALSE; + PlatformReleaseSpinLock(pAdapter, RT_CHANNEL_AND_BANDWIDTH_SPINLOCK); + + RT_TRACE(COMP_P2P, DBG_LOUD, ("PHY_SwChnlWorkItemCallback8814A(), switch to channel %d\n", pHalData->current_channel)); + RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SwChnlWorkItemCallback8814A()\n")); +} + + +VOID +HAL_HandleSwChnl8814A( // Call after initialization + IN PADAPTER pAdapter, + IN u8 channel + ) +{ + PADAPTER Adapter = GetDefaultAdapter(pAdapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("HAL_HandleSwChnl8814A()===>\n")); + pHalData->current_channel = channel; + phy_SwChnl8814A(Adapter); + + +#if (MP_DRIVER == 1) + // <20120712, Kordan> IQK on each channel, asked by James. + PHY_IQCalibrate_8814A(pAdapter, FALSE); +#endif + + RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("<==HAL_HandleSwChnl8814A()\n")); +} +*/ + +VOID +phy_SwChnlAndSetBwMode8814A( + IN PADAPTER Adapter +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dm_struct * pDM_Odm = &pHalData->odmpriv; + + //RTW_INFO("phy_SwChnlAndSetBwMode8814A(): bSwChnl %d, bSetChnlBW %d \n", pHalData->bSwChnl, pHalData->bSetChnlBW); + if ( Adapter->bNotifyChannelChange ) + { + RTW_INFO( "[%s] bSwChnl=%d, ch=%d, bSetChnlBW=%d, bw=%d\n", + __FUNCTION__, + pHalData->bSwChnl, + pHalData->current_channel, + pHalData->bSetChnlBW, + pHalData->current_channel_bw); + } + + if (RTW_CANNOT_RUN(Adapter)) { + pHalData->bSwChnlAndSetBWInProgress= FALSE; + return; + } + + if (pHalData->bSwChnl) + { + phy_SwChnl8814A(Adapter); + pHalData->bSwChnl = FALSE; + } + + if (pHalData->bSetChnlBW) + { + phy_SetBwMode8814A(Adapter); + pHalData->bSetChnlBW = FALSE; + } + + if (Adapter->registrypriv.mp_mode == 0) { + odm_clear_txpowertracking_state(pDM_Odm); + PHY_SetTxPowerLevel8814(Adapter, pHalData->current_channel); + if (pHalData->bNeedIQK == _TRUE) { + phy_iq_calibrate_8814a(pDM_Odm, _FALSE); + pHalData->bNeedIQK = _FALSE; + } + } else + phy_iq_calibrate_8814a(pDM_Odm, _FALSE); +#if 0 //todo +#if (AUTO_CHNL_SEL_NHM == 1) + if(IS_AUTO_CHNL_SUPPORT(Adapter) && + P2PIsSocialChannel(pHalData->current_channel)) + { + RT_TRACE(COMP_SCAN, DBG_TRACE, ("[ACS] phy_SwChnlAndSetBwMode8723B(): current_channel %d Reset NHM counter!!\n", pHalData->current_channel)); + RT_TRACE(COMP_SCAN, DBG_TRACE, ("[ACS] phy_SwChnlAndSetBwMode8723B(): AutoChnlSelPeriod(%d)\n", + GetDefaultAdapter(Adapter)->MgntInfo.AutoChnlSel.AutoChnlSelPeriod)); + + // Reset NHM counter + odm_AutoChannelSelectReset(GET_PDM_ODM(Adapter)); + + SET_AUTO_CHNL_STATE(Adapter, ACS_BEFORE_NHM);// Before NHM measurement + } +#endif +#endif //0 + pHalData->bSwChnlAndSetBWInProgress= FALSE; +} + + +VOID +PHY_SwChnlAndSetBWModeCallback8814A( + IN PVOID pContext +) +{ + PADAPTER Adapter = (PADAPTER)pContext; + phy_SwChnlAndSetBwMode8814A(Adapter); +} + +/* +// +// Description: +// Switch channel synchronously. Called by SwChnlByDelayHandler. +// +// Implemented by Bruce, 2008-02-14. +// The following procedure is operted according to SwChanlCallback8190Pci(). +// However, this procedure is performed synchronously which should be running under +// passive level. +// +VOID +PHY_SwChnlSynchronously8814A( // Only called during initialize + IN PADAPTER Adapter, + IN u8 channel + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlSynchronously(), switch from channel %d to channel %d.\n", pHalData->current_channel, channel)); + + // Cannot IO. + if(RT_CANNOT_IO(Adapter)) + return; + + // Channel Switching is in progress. + if(pHalData->bSwChnlAndSetBWInProgress) + return; + + //return immediately if it is peudo-phy + if(pHalData->rf_chip == RF_PSEUDO_11N) + { + pHalData->bSwChnlAndSetBWInProgress=FALSE; + return; + } + + switch(pHalData->CurrentWirelessMode) + { + case WIRELESS_MODE_A: + case WIRELESS_MODE_N_5G: + case WIRELESS_MODE_AC_5G: + //Get first channel error when change between 5G and 2.4G band. + //FIX ME!!! + if(channel <=14) + return; + RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); + break; + + case WIRELESS_MODE_B: + case WIRELESS_MODE_G: + case WIRELESS_MODE_N_24G: + case WIRELESS_MODE_AC_24G: + //Get first channel error when change between 5G and 2.4G band. + //FIX ME!!! + if(channel > 14) + return; + RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); + break; + + default: + RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); + break; + + } + + pHalData->bSwChnlAndSetBWInProgress = TRUE; + if( channel == 0) + channel = 1; + + pHalData->bSwChnl = TRUE; + pHalData->bSetChnlBW = FALSE; + pHalData->current_channel=channel; + + phy_SwChnlAndSetBwMode8814A(Adapter); + + RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("<==PHY_SwChnlSynchronously(), switch from channel %d to channel %d.\n", pHalData->current_channel, channel)); + +} +*/ + +VOID +PHY_HandleSwChnlAndSetBW8814A( + IN PADAPTER Adapter, + IN BOOLEAN bSwitchChannel, + IN BOOLEAN bSetBandWidth, + IN u8 ChannelNum, + enum channel_width ChnlWidth, + IN u8 ChnlOffsetOf40MHz, + IN u8 ChnlOffsetOf80MHz, + IN u8 CenterFrequencyIndex1 +) +{ + PADAPTER pDefAdapter = GetDefaultAdapter(Adapter); + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDefAdapter); + u8 tmpChannel = pHalData->current_channel; + enum channel_width tmpBW= pHalData->current_channel_bw; + u8 tmpnCur40MhzPrimeSC = pHalData->nCur40MhzPrimeSC; + u8 tmpnCur80MhzPrimeSC = pHalData->nCur80MhzPrimeSC; + u8 tmpCenterFrequencyIndex1 =pHalData->CurrentCenterFrequencyIndex1; + struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; + + //check is swchnl or setbw + if(!bSwitchChannel && !bSetBandWidth) + { + RTW_INFO("PHY_HandleSwChnlAndSetBW8812: not switch channel and not set bandwidth \n"); + return; + } + + //skip change for channel or bandwidth is the same + if(bSwitchChannel) + { + if(pHalData->current_channel != ChannelNum) + { + if (HAL_IsLegalChannel(Adapter, ChannelNum)) + pHalData->bSwChnl = _TRUE; + else + return; + } + } + + if(bSetBandWidth) + { + if(pHalData->bChnlBWInitialized == _FALSE) + { + pHalData->bChnlBWInitialized = _TRUE; + pHalData->bSetChnlBW = _TRUE; + } + else if((pHalData->current_channel_bw != ChnlWidth) || + (pHalData->nCur40MhzPrimeSC != ChnlOffsetOf40MHz) || + (pHalData->nCur80MhzPrimeSC != ChnlOffsetOf80MHz) || + (pHalData->CurrentCenterFrequencyIndex1!= CenterFrequencyIndex1)) + { + pHalData->bSetChnlBW = _TRUE; + } + } + + if(!pHalData->bSetChnlBW && !pHalData->bSwChnl) + { + //RTW_INFO("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); + return; + } + + + if(pHalData->bSwChnl) + { + pHalData->current_channel=ChannelNum; + pHalData->CurrentCenterFrequencyIndex1 = ChannelNum; + } + + + if(pHalData->bSetChnlBW) + { + pHalData->current_channel_bw = ChnlWidth; +#if 0 + if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_LOWER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; + else if(ExtChnlOffsetOf40MHz==EXTCHNL_OFFSET_UPPER) + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; + else + pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; + + if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_LOWER) + pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; + else if(ExtChnlOffsetOf80MHz==EXTCHNL_OFFSET_UPPER) + pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; + else + pHalData->nCur80MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; +#else + pHalData->nCur40MhzPrimeSC = ChnlOffsetOf40MHz; + pHalData->nCur80MhzPrimeSC = ChnlOffsetOf80MHz; +#endif + + pHalData->CurrentCenterFrequencyIndex1 = CenterFrequencyIndex1; + } + + //Switch workitem or set timer to do switch channel or setbandwidth operation + if (!RTW_CANNOT_RUN(Adapter)) + phy_SwChnlAndSetBwMode8814A(Adapter); + else { + if(pHalData->bSwChnl) + { + pHalData->current_channel = tmpChannel; + pHalData->CurrentCenterFrequencyIndex1 = tmpChannel; + } + if(pHalData->bSetChnlBW) + { + pHalData->current_channel_bw = tmpBW; + pHalData->nCur40MhzPrimeSC = tmpnCur40MhzPrimeSC; + pHalData->nCur80MhzPrimeSC = tmpnCur80MhzPrimeSC; + pHalData->CurrentCenterFrequencyIndex1 = tmpCenterFrequencyIndex1; + } + } + + //RTW_INFO("Channel %d ChannelBW %d ",pHalData->current_channel, pHalData->current_channel_bw); + //RTW_INFO("40MhzPrimeSC %d 80MhzPrimeSC %d ",pHalData->nCur40MhzPrimeSC, pHalData->nCur80MhzPrimeSC); + //RTW_INFO("CenterFrequencyIndex1 %d \n",pHalData->CurrentCenterFrequencyIndex1); + + //RTW_INFO("<= PHY_HandleSwChnlAndSetBW8812: bSwChnl %d, bSetChnlBW %d \n",pHalData->bSwChnl,pHalData->bSetChnlBW); + +} + + +/* +// +// Description: +// Configure H/W functionality to enable/disable Monitor mode. +// Note, because we possibly need to configure BB and RF in this function, +// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. +// +VOID +PHY_SetMonitorMode8814A( + IN PADAPTER pAdapter, + IN BOOLEAN bEnableMonitorMode + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; + + //2 Note: we may need to stop antenna diversity. + if(bEnableMonitorMode) + { + bFilterOutNonAssociatedBSSID = FALSE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8814A(): enable monitor mode\n")); + + pHalData->bInMonitorMode = TRUE; + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); + rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (u8*)&bFilterOutNonAssociatedBSSID); + } + else + { + bFilterOutNonAssociatedBSSID = TRUE; + RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8814A(): disable monitor mode\n")); + + pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); + pHalData->bInMonitorMode = FALSE; + rtw_hal_set_hwreg(pAdapter, HW_VAR_CHECK_BSSID, (u8*)&bFilterOutNonAssociatedBSSID); + } +} +*/ + +BOOLEAN +SetAntennaConfig8814A( + IN PADAPTER pAdapter, + IN u8 DefaultAnt // 0: Main, 1: Aux. +) +{ + return TRUE; +} + +VOID +PHY_SetBWMode8814( + IN PADAPTER Adapter, + IN enum channel_width Bandwidth, // 20M or 40M + IN u8 Offset // Upper, Lower, or Don't care +) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + //RTW_INFO("%s()===>\n",__FUNCTION__); + + PHY_HandleSwChnlAndSetBW8814A(Adapter, _FALSE, _TRUE, pHalData->current_channel, Bandwidth, Offset, Offset, pHalData->current_channel); + + //RTW_INFO("<==%s()\n",__FUNCTION__); +} + +VOID +PHY_SwChnl8814( + IN PADAPTER Adapter, + IN u8 channel + ) +{ + //RTW_INFO("%s()===>\n",__FUNCTION__); + + PHY_HandleSwChnlAndSetBW8814A(Adapter, _TRUE, _FALSE, channel, 0, 0, 0, channel); + + //RTW_INFO("<==%s()\n",__FUNCTION__); +} + +VOID +PHY_SetSwChnlBWMode8814( + IN PADAPTER Adapter, + IN u8 channel, + IN enum channel_width Bandwidth, + IN u8 Offset40, + IN u8 Offset80 +) +{ + //RTW_INFO("%s()===>\n",__FUNCTION__); + + PHY_HandleSwChnlAndSetBW8814A(Adapter, _TRUE, _TRUE, channel, Bandwidth, Offset40, Offset80, channel); + + //RTW_INFO("<==%s()\n",__FUNCTION__); +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c new file mode 100644 index 00000000000000..f298471ad17234 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rf6052.c @@ -0,0 +1,210 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814A_RF6052_C_ + +//#include +#include + + +/*----------------------------------------------------------------------------- + * Function: PHY_RF6052SetBandwidth() + * + * Overview: This function is called by SetBWModeCallback8190Pci() only + * + * Input: PADAPTER Adapter + * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M + * + * Output: NONE + * + * Return: NONE + * + * Note: For RF type 0222D + *---------------------------------------------------------------------------*/ +VOID +PHY_RF6052SetBandwidth8814A( + IN PADAPTER Adapter, + IN enum channel_width Bandwidth) //20M or 40M +{ + switch(Bandwidth) + { + case CHANNEL_WIDTH_20: + /*RTW_INFO("PHY_RF6052SetBandwidth8814A(), set 20MHz\n");*/ + phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 3); + phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 3); + phy_set_rf_reg(Adapter, RF_PATH_C, RF_CHNLBW_Jaguar, BIT11|BIT10, 3); + phy_set_rf_reg(Adapter, RF_PATH_D, RF_CHNLBW_Jaguar, BIT11|BIT10, 3); + break; + + case CHANNEL_WIDTH_40: + /*RTW_INFO("PHY_RF6052SetBandwidth8814A(), set 40MHz\n");*/ + phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 1); + phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 1); + phy_set_rf_reg(Adapter, RF_PATH_C, RF_CHNLBW_Jaguar, BIT11|BIT10, 1); + phy_set_rf_reg(Adapter, RF_PATH_D, RF_CHNLBW_Jaguar, BIT11|BIT10, 1); + break; + + case CHANNEL_WIDTH_80: + /*RTW_INFO("PHY_RF6052SetBandwidth8814A(), set 80MHz\n");*/ + phy_set_rf_reg(Adapter, RF_PATH_A, RF_CHNLBW_Jaguar, BIT11|BIT10, 0); + phy_set_rf_reg(Adapter, RF_PATH_B, RF_CHNLBW_Jaguar, BIT11|BIT10, 0); + phy_set_rf_reg(Adapter, RF_PATH_C, RF_CHNLBW_Jaguar, BIT11|BIT10, 0); + phy_set_rf_reg(Adapter, RF_PATH_D, RF_CHNLBW_Jaguar, BIT11|BIT10, 0); + break; + + default: + RTW_INFO("PHY_RF6052SetBandwidth8814A(): unknown Bandwidth: %#X\n",Bandwidth ); + break; + } +} + +static int +phy_RF6052_Config_ParaFile_8814A( + IN PADAPTER Adapter + ) +{ + u32 u4RegValue=0; + u8 eRFPath; + int rtStatus = _SUCCESS; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + static char sz8814RadioAFile[] = PHY_FILE_RADIO_A; + static char sz8814RadioBFile[] = PHY_FILE_RADIO_B; + static char sz8814RadioCFile[] = PHY_FILE_RADIO_C; + static char sz8814RadioDFile[] = PHY_FILE_RADIO_D; + static char sz8814TxPwrTrack[] = PHY_FILE_TXPWR_TRACK; + char *pszRadioAFile = NULL, *pszRadioBFile = NULL, *pszRadioCFile = NULL, *pszRadioDFile = NULL, *pszTxPwrTrack = NULL; + + + pszRadioAFile = sz8814RadioAFile; + pszRadioBFile = sz8814RadioBFile; + pszRadioCFile = sz8814RadioCFile; + pszRadioDFile = sz8814RadioDFile; + pszTxPwrTrack = sz8814TxPwrTrack; + + //3//----------------------------------------------------------------- + //3// <2> Initialize RF + //3//----------------------------------------------------------------- + //for(eRFPath = RF_PATH_A; eRFPath NumTotalRFPath; eRFPath++) + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + { + /*----Initialize RF fom connfiguration file----*/ + switch(eRFPath) + { + case RF_PATH_A: +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, eRFPath) == _FAIL) +#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE + { +#ifdef CONFIG_EMBEDDED_FWIMG + if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath)) + rtStatus = _FAIL; +#endif //CONFIG_EMBEDDED_FWIMG + } + break; + case RF_PATH_B: +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, eRFPath) == _FAIL) +#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE + { +#ifdef CONFIG_EMBEDDED_FWIMG + if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath)) + rtStatus = _FAIL; +#endif //CONFIG_EMBEDDED_FWIMG + } + break; + case RF_PATH_C: +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithParaFile(Adapter, pszRadioCFile, eRFPath) == _FAIL) +#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE + { +#ifdef CONFIG_EMBEDDED_FWIMG + if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath)) + rtStatus = _FAIL; +#endif //CONFIG_EMBEDDED_FWIMG + } + break; + case RF_PATH_D: +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithParaFile(Adapter, pszRadioDFile, eRFPath) == _FAIL) +#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE + { +#ifdef CONFIG_EMBEDDED_FWIMG + if(HAL_STATUS_FAILURE ==odm_config_rf_with_header_file(&pHalData->odmpriv,CONFIG_RF_RADIO, (enum rf_path)eRFPath)) + rtStatus = _FAIL; +#endif //CONFIG_EMBEDDED_FWIMG + } + break; + default: + break; + } + + if(rtStatus != _SUCCESS){ + RTW_INFO("%s():Radio[%d] Fail!!", __FUNCTION__, eRFPath); + goto phy_RF6052_Config_ParaFile_Fail; + } + + } + + u4RegValue = phy_query_rf_reg(Adapter, RF_PATH_A, RF_RCK1_Jaguar, bRFRegOffsetMask); + phy_set_rf_reg(Adapter, RF_PATH_B, RF_RCK1_Jaguar, bRFRegOffsetMask, u4RegValue); + phy_set_rf_reg(Adapter, RF_PATH_C, RF_RCK1_Jaguar, bRFRegOffsetMask, u4RegValue); + phy_set_rf_reg(Adapter, RF_PATH_D, RF_RCK1_Jaguar, bRFRegOffsetMask, u4RegValue); + + //3 ----------------------------------------------------------------- + //3 Configuration of Tx Power Tracking + //3 ----------------------------------------------------------------- + +#ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE + if (PHY_ConfigRFWithTxPwrTrackParaFile(Adapter, pszTxPwrTrack) == _FAIL) +#endif //CONFIG_LOAD_PHY_PARA_FROM_FILE + { +#ifdef CONFIG_EMBEDDED_FWIMG + odm_config_rf_with_tx_pwr_track_header_file(&pHalData->odmpriv); +#endif + } + + //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile_8812()\n")); + +phy_RF6052_Config_ParaFile_Fail: + return rtStatus; +} + + +int +PHY_RF6052_Config_8814A( + IN PADAPTER Adapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + int rtStatus = _SUCCESS; + + // Initialize general global value + pHalData->NumTotalRFPath = 4; + + // + // Config BB and RF + // + rtStatus = phy_RF6052_Config_ParaFile_8814A(Adapter); + + return rtStatus; + +} + + +/* End of HalRf6052.c */ + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c new file mode 100644 index 00000000000000..7de802c6cae472 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_rxdesc.c @@ -0,0 +1,68 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814A_RXDESC_C_ + +//#include +#include + +void rtl8814_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc) +{ + struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; + + _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib)); + +#ifdef CONFIG_RADIOTAP_WITH_RXDESC + _rtw_memcpy(pattrib->rxdesc, pdesc, RXDESC_SIZE); +#endif + + //Offset 0 + pattrib->pkt_len = (u16)GET_RX_STATUS_DESC_PKT_LEN_8814A(pdesc);//(le32_to_cpu(pdesc->rxdw0)&0x00003fff) + pattrib->crc_err = (u8)GET_RX_STATUS_DESC_CRC32_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 14) & 0x1); + pattrib->icv_err = (u8)GET_RX_STATUS_DESC_ICV_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 15) & 0x1); + pattrib->drvinfo_sz = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE_8814A(pdesc) * 8;//((le32_to_cpu(pdesc->rxdw0) >> 16) & 0xf) * 8;//uint 2^3 = 8 bytes + pattrib->encrypt = (u8)GET_RX_STATUS_DESC_SECURITY_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 20) & 0x7); + pattrib->qos = (u8)GET_RX_STATUS_DESC_QOS_8814A(pdesc);//(( le32_to_cpu( pdesc->rxdw0 ) >> 23) & 0x1);// Qos data, wireless lan header length is 26 + pattrib->shift_sz = (u8)GET_RX_STATUS_DESC_SHIFT_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 24) & 0x3); + pattrib->physt = (u8)GET_RX_STATUS_DESC_PHY_STATUS_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw0) >> 26) & 0x1); + pattrib->bdecrypted = !GET_RX_STATUS_DESC_SWDEC_8814A(pdesc);//(le32_to_cpu(pdesc->rxdw0) & BIT(27))? 0:1; + + //Offset 4 + pattrib->priority = (u8)GET_RX_STATUS_DESC_TID_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 8) & 0xf); + pattrib->mdata = (u8)GET_RX_STATUS_DESC_MORE_DATA_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 26) & 0x1); + pattrib->mfrag = (u8)GET_RX_STATUS_DESC_MORE_FRAG_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw1) >> 27) & 0x1);//more fragment bit + + //Offset 8 + pattrib->seq_num = (u16)GET_RX_STATUS_DESC_SEQ_8814A(pdesc);//(le32_to_cpu(pdesc->rxdw2) & 0x00000fff); + pattrib->frag_num = (u8)GET_RX_STATUS_DESC_FRAG_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw2) >> 12) & 0xf);//fragmentation number + + + if (GET_RX_STATUS_DESC_RPT_SEL_8814A(pdesc)) + pattrib->pkt_rpt_type = C2H_PACKET; + else + pattrib->pkt_rpt_type = NORMAL_RX; + + //Offset 12 + pattrib->data_rate=(u8)GET_RX_STATUS_DESC_RX_RATE_8814A(pdesc);//((le32_to_cpu(pdesc->rxdw3))&0x7f); + + //Offset 16 + //Offset 20 + +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c new file mode 100644 index 00000000000000..5d7e423ce73317 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_sreset.c @@ -0,0 +1,114 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814A_SRESET_C_ + +//#include +#include + +#ifdef DBG_CONFIG_ERROR_DETECT +void rtl8814_sreset_xmit_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + unsigned long current_time; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + unsigned int diff_time; + u32 txdma_status; + + if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ + RTW_INFO("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); + rtw_hal_sreset_reset(padapter); + } +#ifdef CONFIG_USB_HCI + //total xmit irp = 4 + //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); + //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) + current_time = rtw_get_current_time(); + + if (0 == pxmitpriv->free_xmitbuf_cnt || 0 == pxmitpriv->free_xmit_extbuf_cnt) { + + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_time); + + if (diff_time > 2000) { + if (psrtpriv->last_tx_complete_time == 0) { + psrtpriv->last_tx_complete_time = current_time; + } + else{ + diff_time = rtw_get_passing_time_ms(psrtpriv->last_tx_complete_time); + if (diff_time > 4000) { + u32 ability = 0; + + //padapter->Wifi_Error_Status = WIFI_TX_HANG; + ability = rtw_phydm_ability_get(padapter); + + RTW_INFO("%s tx hang %s\n", __FUNCTION__, + (ability & ODM_BB_ADAPTIVITY)? "ODM_BB_ADAPTIVITY" : ""); + + if (!(ability & ODM_BB_ADAPTIVITY)) + rtw_hal_sreset_reset(padapter); + } + } + } + } +#endif //CONFIG_USB_HCI + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_XMIT_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} + +void rtl8814_sreset_linked_status_check(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct sreset_priv *psrtpriv = &pHalData->srestpriv; + + u32 rx_dma_status = 0; + rx_dma_status = rtw_read32(padapter,REG_RXDMA_STATUS); + if(rx_dma_status!= 0x00){ + RTW_INFO("%s REG_RXDMA_STATUS:0x%08x\n",__FUNCTION__,rx_dma_status); + } +#if 0 + u32 regc50,regc58,reg824,reg800; + regc50 = rtw_read32(padapter,0xc50); + regc58 = rtw_read32(padapter,0xc58); + reg824 = rtw_read32(padapter,0x824); + reg800 = rtw_read32(padapter,0x800); + if( ((regc50&0xFFFFFF00)!= 0x69543400)|| + ((regc58&0xFFFFFF00)!= 0x69543400)|| + (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| + ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) + { + DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, + regc50, regc58, reg824, reg800); + rtw_hal_sreset_reset(padapter); + } +#endif + + if (psrtpriv->dbg_trigger_point == SRESET_TGP_LINK_STATUS) { + psrtpriv->dbg_trigger_point = SRESET_TGP_NULL; + rtw_hal_sreset_reset(padapter); + return; + } +} +#endif + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c new file mode 100644 index 00000000000000..8e9047b821fe4c --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/rtl8814a_xmit.c @@ -0,0 +1,515 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814A_XMIT_C_ + +//#include +#include + +/* + * Description: + * Aggregation packets and send to hardware + * + * Return: + * 0 Success + * -1 Hardware resource(TX FIFO) not ready + * -2 Software resource(xmitbuf) not ready + */ +#ifdef CONFIG_TX_EARLY_MODE + +//#define DBG_EMINFO + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + #define EARLY_MODE_MAX_PKT_NUM 10 +#else + #define EARLY_MODE_MAX_PKT_NUM 5 +#endif + + +struct EMInfo{ + u8 EMPktNum; + u16 EMPktLen[EARLY_MODE_MAX_PKT_NUM]; +}; + + +void +InsertEMContent_8814( + struct EMInfo *pEMInfo, + IN pu1Byte VirtualAddress) +{ + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + u1Byte index=0; + u4Byte dwtmp=0; +#endif + + _rtw_memset(VirtualAddress, 0, EARLY_MODE_INFO_SIZE); + if(pEMInfo->EMPktNum==0) + return; + + #ifdef DBG_EMINFO + { + int i; + RTW_INFO("\n%s ==> pEMInfo->EMPktNum =%d\n",__FUNCTION__,pEMInfo->EMPktNum); + for(i=0;i< EARLY_MODE_MAX_PKT_NUM;i++){ + RTW_INFO("%s ==> pEMInfo->EMPktLen[%d] =%d\n",__FUNCTION__,i,pEMInfo->EMPktLen[i]); + } + + } + #endif + +#if RTL8188E_EARLY_MODE_PKT_NUM_10 == 1 + SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); + + if(pEMInfo->EMPktNum == 1){ + dwtmp = pEMInfo->EMPktLen[0]; + }else{ + dwtmp = pEMInfo->EMPktLen[0]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[1]; + } + SET_EARLYMODE_LEN0(VirtualAddress, dwtmp); + if(pEMInfo->EMPktNum <= 3){ + dwtmp = pEMInfo->EMPktLen[2]; + }else{ + dwtmp = pEMInfo->EMPktLen[2]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[3]; + } + SET_EARLYMODE_LEN1(VirtualAddress, dwtmp); + if(pEMInfo->EMPktNum <= 5){ + dwtmp = pEMInfo->EMPktLen[4]; + }else{ + dwtmp = pEMInfo->EMPktLen[4]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[5]; + } + SET_EARLYMODE_LEN2_1(VirtualAddress, dwtmp&0xF); + SET_EARLYMODE_LEN2_2(VirtualAddress, dwtmp>>4); + if(pEMInfo->EMPktNum <= 7){ + dwtmp = pEMInfo->EMPktLen[6]; + }else{ + dwtmp = pEMInfo->EMPktLen[6]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[7]; + } + SET_EARLYMODE_LEN3(VirtualAddress, dwtmp); + if(pEMInfo->EMPktNum <= 9){ + dwtmp = pEMInfo->EMPktLen[8]; + }else{ + dwtmp = pEMInfo->EMPktLen[8]; + dwtmp += ((dwtmp%4)?(4-dwtmp%4):0)+4; + dwtmp += pEMInfo->EMPktLen[9]; + } + SET_EARLYMODE_LEN4(VirtualAddress, dwtmp); +#else + SET_EARLYMODE_PKTNUM(VirtualAddress, pEMInfo->EMPktNum); + SET_EARLYMODE_LEN0(VirtualAddress, pEMInfo->EMPktLen[0]); + SET_EARLYMODE_LEN1(VirtualAddress, pEMInfo->EMPktLen[1]); + SET_EARLYMODE_LEN2_1(VirtualAddress, pEMInfo->EMPktLen[2]&0xF); + SET_EARLYMODE_LEN2_2(VirtualAddress, pEMInfo->EMPktLen[2]>>4); + SET_EARLYMODE_LEN3(VirtualAddress, pEMInfo->EMPktLen[3]); + SET_EARLYMODE_LEN4(VirtualAddress, pEMInfo->EMPktLen[4]); +#endif + //RT_PRINT_DATA(COMP_SEND, DBG_LOUD, "EMHdr:", VirtualAddress, 8); + +} + + + +void UpdateEarlyModeInfo8814(struct xmit_priv *pxmitpriv,struct xmit_buf *pxmitbuf ) +{ + //_adapter *padapter, struct xmit_frame *pxmitframe,struct tx_servq *ptxservq + int index,j; + u16 offset,pktlen; + PTXDESC_8814 ptxdesc; + + u8 *pmem,*pEMInfo_mem; + s8 node_num_0=0,node_num_1=0; + struct EMInfo eminfo; + struct agg_pkt_info *paggpkt; + struct xmit_frame *pframe = (struct xmit_frame*)pxmitbuf->priv_data; + pmem= pframe->buf_addr; + + #ifdef DBG_EMINFO + RTW_INFO("\n%s ==> agg_num:%d\n",__FUNCTION__, pframe->agg_num); + for(index=0;indexagg_num;index++){ + offset = pxmitpriv->agg_pkt[index].offset; + pktlen = pxmitpriv->agg_pkt[index].pkt_len; + RTW_INFO("%s ==> agg_pkt[%d].offset=%d\n",__FUNCTION__,index,offset); + RTW_INFO("%s ==> agg_pkt[%d].pkt_len=%d\n",__FUNCTION__,index,pktlen); + } + #endif + + if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM) + { + node_num_0 = pframe->agg_num; + node_num_1= EARLY_MODE_MAX_PKT_NUM-1; + } + + for(index=0;indexagg_num;index++){ + + offset = pxmitpriv->agg_pkt[index].offset; + pktlen = pxmitpriv->agg_pkt[index].pkt_len; + + _rtw_memset(&eminfo,0,sizeof(struct EMInfo)); + if( pframe->agg_num > EARLY_MODE_MAX_PKT_NUM){ + if(node_num_0 > EARLY_MODE_MAX_PKT_NUM){ + eminfo.EMPktNum = EARLY_MODE_MAX_PKT_NUM; + node_num_0--; + } + else{ + eminfo.EMPktNum = node_num_1; + node_num_1--; + } + } + else{ + eminfo.EMPktNum = pframe->agg_num-(index+1); + } + for(j=0;j< eminfo.EMPktNum ;j++){ + eminfo.EMPktLen[j] = pxmitpriv->agg_pkt[index+1+j].pkt_len+4;// 4 bytes CRC + } + + if(pmem){ + if(index==0){ + ptxdesc = (PTXDESC_8814)(pmem); + pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; + } + else{ + pmem = pmem + pxmitpriv->agg_pkt[index-1].offset; + ptxdesc = (PTXDESC_8814)(pmem); + pEMInfo_mem = ((u8 *)ptxdesc)+TXDESC_SIZE; + } + + #ifdef DBG_EMINFO + RTW_INFO("%s ==> desc.pkt_len=%d\n",__FUNCTION__,ptxdesc->pktlen); + #endif + InsertEMContent_8814(&eminfo,pEMInfo_mem); + } + + + } + _rtw_memset(pxmitpriv->agg_pkt,0,sizeof(struct agg_pkt_info)*MAX_AGG_PKT_NUM); + +} +#endif + +#if ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE)) +void rtl8814a_cal_txdesc_chksum(u8 *ptxdesc) +{ + u16 *usPtr; + u32 count; + u32 index; + u16 checksum = 0; + + + usPtr = (u16*)ptxdesc; + // checksume is always calculated by first 32 bytes, + // and it doesn't depend on TX DESC length. + // Thomas,Lucas@SD4,20130515 + count = 16; + + // Clear first + SET_TX_DESC_TX_DESC_CHECKSUM_8814A(ptxdesc, 0); + + for(index = 0 ; index < count ; index++){ + checksum = checksum ^ le16_to_cpu(*(usPtr + index)); + } + + SET_TX_DESC_TX_DESC_CHECKSUM_8814A(ptxdesc, checksum); +} +#endif + +// +// Description: In normal chip, we should send some packet to Hw which will be used by Fw +// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then +// Fw can tell Hw to send these packet derectly. +// +void rtl8814a_fill_fake_txdesc( + PADAPTER padapter, + u8* pDesc, + u32 BufferLen, + u8 IsPsPoll, + u8 IsBTQosNull, + u8 bDataFrame) +{ + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + + + // Clear all status + _rtw_memset(pDesc, 0, TXDESC_SIZE); + + SET_TX_DESC_LAST_SEG_8814A(pDesc, 1); + + SET_TX_DESC_OFFSET_8814A(pDesc, TXDESC_SIZE); + + SET_TX_DESC_PKT_SIZE_8814A(pDesc, BufferLen); + + SET_TX_DESC_QUEUE_SEL_8814A(pDesc, QSLT_MGNT); + + if (pmlmeext->cur_wireless_mode & WIRELESS_11B) { + SET_TX_DESC_RATE_ID_8814A(pDesc, RATEID_IDX_B); + } else { + SET_TX_DESC_RATE_ID_8814A(pDesc, RATEID_IDX_G); + } + + //Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by Hw. + if (IsPsPoll) + { + SET_TX_DESC_NAV_USE_HDR_8814A(pDesc, 1); + } + else + { + SET_TX_DESC_HWSEQ_EN_8814A(pDesc, 1); // Hw set sequence number + } +#if 0 //todo + if(IsBTQosNull) + { + SET_TX_DESC_BT_INT_8812(pDesc, 1); + } +#endif //0 + + SET_TX_DESC_USE_RATE_8814A(pDesc, 1); + + //8814 no OWN bit? + //SET_TX_DESC_OWN_8812(pDesc, 1); + + // + // Encrypt the data frame if under security mode excepct null data. Suggested by CCW. + // + if (_TRUE ==bDataFrame) + { + u32 EncAlg; + + EncAlg = padapter->securitypriv.dot11PrivacyAlgrthm; + switch (EncAlg) + { + case _NO_PRIVACY_: + SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x0); + break; + case _WEP40_: + case _WEP104_: + case _TKIP_: + SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x1); + break; + case _SMS4_: + SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x2); + break; + case _AES_: + SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x3); + break; + default: + SET_TX_DESC_SEC_TYPE_8814A(pDesc, 0x0); + break; + } + } + SET_TX_DESC_TX_RATE_8814A(pDesc, MRateToHwRate(pmlmeext->tx_rate)); + +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) + // USB interface drop packet if the checksum of descriptor isn't correct. + // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). + rtl8814a_cal_txdesc_chksum(pDesc); +#endif +} + +void rtl8814a_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc) +{ + if ((pattrib->encrypt > 0) && !pattrib->bswenc) + { + switch (pattrib->encrypt) + { + //SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES + case _WEP40_: + case _WEP104_: + case _TKIP_: + case _TKIP_WTMIC_: + SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x1); + break; +#ifdef CONFIG_WAPI_SUPPORT + case _SMS4_: + SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x2); + break; +#endif + case _AES_: + SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x3); + break; + case _NO_PRIVACY_: + default: + SET_TX_DESC_SEC_TYPE_8814A(ptxdesc, 0x0); + break; + + } + + } + +} + +void rtl8814a_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) +{ + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + + //RTW_INFO("vcs_mode=%d\n", pattrib->vcs_mode); + + if (pattrib->vcs_mode) { + + switch(pattrib->vcs_mode) + { + case RTS_CTS: + SET_TX_DESC_RTS_ENABLE_8814A(ptxdesc, 1); + break; + case CTS_TO_SELF: + SET_TX_DESC_CTS2SELF_8814A(ptxdesc, 1); + break; + case NONE_VCS: + default: + break; + } + + if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) + SET_TX_DESC_RTS_SHORT_8814A(ptxdesc, 1); + + SET_TX_DESC_RTS_RATE_8814A(ptxdesc, 0x8);//RTS Rate=24M + + SET_TX_DESC_RTS_RATE_FB_LIMIT_8814A(ptxdesc, 0xf); + + } +} + + +u8 +BWMapping_8814( + IN PADAPTER Adapter, + IN struct pkt_attrib *pattrib +) +{ + u8 BWSettingOfDesc = 0; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + //RTW_INFO("BWMapping pHalData->current_channel_bw %d, pattrib->bwmode %d \n",pHalData->current_channel_bw,pattrib->bwmode); + + if(pHalData->current_channel_bw== CHANNEL_WIDTH_80) + { + if(pattrib->bwmode == CHANNEL_WIDTH_80) + BWSettingOfDesc= 2; + else if(pattrib->bwmode == CHANNEL_WIDTH_40) + BWSettingOfDesc = 1; + else + BWSettingOfDesc = 0; + } + else if(pHalData->current_channel_bw== CHANNEL_WIDTH_40) + { + if((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80)) + BWSettingOfDesc = 1; + else + BWSettingOfDesc = 0; + } + else + BWSettingOfDesc = 0; + + return BWSettingOfDesc; +} + +u8 +SCMapping_8814( + IN PADAPTER Adapter, + IN struct pkt_attrib *pattrib +) +{ + u8 SCSettingOfDesc = 0; + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + //RTW_INFO("SCMapping: pHalData->current_channel_bw %d, pHalData->nCur80MhzPrimeSC %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->current_channel_bw,pHalData->nCur80MhzPrimeSC,pHalData->nCur40MhzPrimeSC); + + if(pHalData->current_channel_bw == CHANNEL_WIDTH_80) + { + if(pattrib->bwmode == CHANNEL_WIDTH_80) + { + SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; + } + else if(pattrib->bwmode == CHANNEL_WIDTH_40) + { + if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) + SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ; + else if(pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) + SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ; + else + RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); + } + else + { + if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) + SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ; + else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)) + SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ; + else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) + SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ; + else if((pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (pHalData->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)) + SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ; + else + RTW_INFO("SCMapping: DONOT CARE Mode Setting\n"); + } + } + else if(pHalData->current_channel_bw== CHANNEL_WIDTH_40) + { + //RTW_INFO("SCMapping: HT Case: pHalData->current_channel_bw %d, pHalData->nCur40MhzPrimeSC %d \n",pHalData->current_channel_bw,pHalData->nCur40MhzPrimeSC); + + if(pattrib->bwmode == CHANNEL_WIDTH_40) + { + SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; + } + else if(pattrib->bwmode == CHANNEL_WIDTH_20) + { + if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) + { + SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ; + } + else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) + { + SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ; + } + else + { + SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; + } + + } + } + else + { + SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE; + } + + return SCSettingOfDesc; +} + + +void rtl8814a_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc) +{ + //RTW_INFO("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); + + if(pattrib->ht_en) + { + // Set Bandwidth and sub-channel settings. + SET_TX_DESC_DATA_BW_8814A(ptxdesc, BWMapping_8814(padapter,pattrib)); + + SET_TX_DESC_DATA_SC_8814A(ptxdesc, SCMapping_8814(padapter,pattrib)); + } +} + + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c new file mode 100644 index 00000000000000..070f886e602ef3 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_led.c @@ -0,0 +1,147 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814AU_LED_C_ + +//#include +#include +#ifdef CONFIG_RTW_SW_LED +//================================================================================ +// LED object. +//================================================================================ + + +//================================================================================ +// Prototype of protected function. +//================================================================================ + + +//================================================================================ +// LED_819xUsb routines. +//================================================================================ + +// +// Description: +// Turn on LED according to LedPin specified. +// +static void +SwLedOn_8814AU( + PADAPTER padapter, + PLED_USB pLed +) +{ + u32 LedGpioCfg; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (RTW_CANNOT_RUN(padapter)) + return; + + LedGpioCfg = rtw_read32(padapter , REG_GPIO_PIN_CTRL_2); /* 0x60. In 8814AU, the name should be REG_GPIO_EXT_CTRL */ + switch (pLed->LedPin) { + case LED_PIN_LED0: + LedGpioCfg |= (BIT16 | BIT17 | BIT21 | BIT22); /* config as gpo */ + LedGpioCfg &= ~(BIT8 | BIT9 | BIT13 | BIT14); /* set gpo value */ + LedGpioCfg &= ~(BIT0 | BIT1 | BIT5 | BIT6); /* set gpi value. TBD: may not need this */ + rtw_write32(padapter , REG_GPIO_PIN_CTRL_2 , LedGpioCfg); + break; + default: + break; + } + pLed->bLedOn = _TRUE; +} + + +// +// Description: +// Turn off LED according to LedPin specified. +// +static void +SwLedOff_8814AU( + PADAPTER padapter, + PLED_USB pLed +) +{ + u32 LedGpioCfg; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + + if (RTW_CANNOT_RUN(padapter)) + return; + LedGpioCfg = rtw_read32(padapter , REG_GPIO_PIN_CTRL_2); /* 0x60. In 8814AU, the name should be REG_GPIO_EXT_CTRL */ + switch (pLed->LedPin) { + case LED_PIN_LED0: + LedGpioCfg |= (BIT16 | BIT17 | BIT21 | BIT22); /* config as gpo */ + LedGpioCfg |= (BIT8 | BIT9 | BIT13 | BIT14); /* set gpo output value */ + rtw_write32(padapter , REG_GPIO_PIN_CTRL_2 , LedGpioCfg); + break; + default: + break; + } + + pLed->bLedOn = _FALSE; +} + +//================================================================================ +// Interface to manipulate LED objects. +//================================================================================ + + +//================================================================================ +// Default LED behavior. +//================================================================================ + +// +// Description: +// Initialize all LED_871x objects. +// +void +rtl8814au_InitSwLeds( + _adapter *padapter + ) +{ + struct led_priv *pledpriv = adapter_to_led(padapter); + + pledpriv->LedControlHandler = LedControlUSB; + + pledpriv->SwLedOn = SwLedOn_8814AU; + pledpriv->SwLedOff = SwLedOff_8814AU; + + InitLed(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); + + InitLed(padapter, &(pledpriv->SwLed1), LED_PIN_LED1); + + InitLed(padapter, &(pledpriv->SwLed2), LED_PIN_LED2); +} + + +// +// Description: +// DeInitialize all LED_819xUsb objects. +// +void +rtl8814au_DeInitSwLeds( + _adapter *padapter + ) +{ + struct led_priv *ledpriv = adapter_to_led(padapter); + + DeInitLed( &(ledpriv->SwLed0) ); + DeInitLed( &(ledpriv->SwLed1) ); + DeInitLed( &(ledpriv->SwLed2) ); +} +#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c new file mode 100644 index 00000000000000..4d381791b06926 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_recv.c @@ -0,0 +1,34 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * + ******************************************************************************/ +#define _RTL8814AU_RECV_C_ + +//#include +#include + +int rtl8814au_init_recv_priv(_adapter *padapter) +{ + return usb_init_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN); +} + +void rtl8814au_free_recv_priv(_adapter *padapter) +{ + usb_free_recv_priv(padapter, INTERRUPT_MSG_FORMAT_LEN); +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c new file mode 100644 index 00000000000000..482040b577ffd7 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/rtl8814au_xmit.c @@ -0,0 +1,1129 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _RTL8812AU_XMIT_C_ + +/* #include */ +#include + + +s32 rtl8814au_init_xmit_priv(_adapter *padapter) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + +#ifdef PLATFORM_LINUX + tasklet_init(&pxmitpriv->xmit_tasklet, + (void(*)(unsigned long))rtl8814au_xmit_tasklet, + (unsigned long)padapter); +#endif +#ifdef CONFIG_TX_EARLY_MODE + pHalData->bEarlyModeEnable = padapter->registrypriv.early_mode; +#endif + + return _SUCCESS; +} + +void rtl8814au_free_xmit_priv(_adapter *padapter) +{ +} + +static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz ,u8 bagg_pkt) +{ + int pull=0; + uint qsel; + u8 data_rate,pwr_status,offset; + _adapter *padapter = pxmitframe->padapter; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u8 *ptxdesc = pmem; + struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); + sint bmcst = IS_MCAST(pattrib->ra); + u16 SWDefineContent = 0x0; + u8 DriverFixedRate = 0x0; + struct registry_priv *pregpriv = &(padapter->registrypriv); + +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + if (padapter->registrypriv.mp_mode == 0) + { + if((PACKET_OFFSET_SZ != 0) && (!bagg_pkt) &&(rtw_usb_bulk_size_boundary(padapter,TXDESC_SIZE+sz)==_FALSE)) + { + ptxdesc = (pmem+PACKET_OFFSET_SZ); + //RTW_INFO("==> non-agg-pkt,shift pointer...\n"); + pull = 1; + } + } +#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX + + _rtw_memset(ptxdesc, 0, TXDESC_SIZE); + + //4 offset 0 + //SET_TX_DESC_FIRST_SEG_8812(ptxdesc, 1); + SET_TX_DESC_LAST_SEG_8814A(ptxdesc, 1); + //SET_TX_DESC_OWN_8812(ptxdesc, 1); + + //RTW_INFO("%s==> pkt_len=%d,bagg_pkt=%02x\n",__FUNCTION__,sz,bagg_pkt); + SET_TX_DESC_PKT_SIZE_8814A(ptxdesc, sz); + + offset = TXDESC_SIZE + OFFSET_SZ; + +#ifdef CONFIG_TX_EARLY_MODE + if(bagg_pkt){ + offset += EARLY_MODE_INFO_SIZE ;//0x28 + } +#endif + //RTW_INFO("%s==>offset(0x%02x) \n",__FUNCTION__,offset); + SET_TX_DESC_OFFSET_8814A(ptxdesc, offset); + + if (bmcst) { + SET_TX_DESC_BMC_8814A(ptxdesc, 1); + } + +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + if (padapter->registrypriv.mp_mode == 0) + { + if ((PACKET_OFFSET_SZ != 0) && (!bagg_pkt)) { + if ((pull) && (pxmitframe->pkt_offset>0)) { + pxmitframe->pkt_offset = pxmitframe->pkt_offset -1; + } + } + } +#endif + + //RTW_INFO("%s, pkt_offset=0x%02x\n",__FUNCTION__,pxmitframe->pkt_offset); + // pkt_offset, unit:8 bytes padding + if (pxmitframe->pkt_offset > 0) { + SET_TX_DESC_PKT_OFFSET_8814A(ptxdesc, pxmitframe->pkt_offset); + } + + SET_TX_DESC_MACID_8814A(ptxdesc, pattrib->mac_id); + SET_TX_DESC_RATE_ID_8814A(ptxdesc, pattrib->raid); + + SET_TX_DESC_QUEUE_SEL_8814A(ptxdesc, pattrib->qsel); + + //offset 12 + + if (pattrib->injected == _TRUE && !pregpriv->monitor_overwrite_seqnum) { + /* Prevent sequence number from being overwritten */ + SET_TX_DESC_HWSEQ_EN_8814A(ptxdesc, 0); /* Hw do not set sequence number */ + SET_TX_DESC_SEQ_8814A(ptxdesc, pattrib->seqnum); /* Copy inject sequence number to TxDesc */ + } + else if (!pattrib->qos_en) { + /* HW sequence, to fix to use 0 queue. todo: 4AC packets to use auto queue select */ + SET_TX_DESC_HWSEQ_EN_8814A(ptxdesc, 1); // Hw set sequence number + SET_TX_DESC_EN_HWEXSEQ_8814A(ptxdesc, 0); + SET_TX_DESC_DISQSELSEQ_8814A(ptxdesc, 1); + SET_TX_DESC_HW_SSN_SEL_8814A(ptxdesc, 0); + } else { + SET_TX_DESC_SEQ_8814A(ptxdesc, pattrib->seqnum); + } + + + + if ((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) { + //RTW_INFO("pxmitframe->frame_tag == DATA_FRAMETAG\n"); + + rtl8814a_fill_txdesc_sectype(pattrib, ptxdesc); + + //offset 20 + +#ifdef CONFIG_USB_TX_AGGREGATION + if (pxmitframe->agg_num > 1){ + //RTW_INFO("%s agg_num:%d\n",__FUNCTION__,pxmitframe->agg_num ); + SET_TX_DESC_USB_TXAGG_NUM_8814A(ptxdesc, pxmitframe->agg_num); + } +#endif //CONFIG_USB_TX_AGGREGATION + + rtl8814a_fill_txdesc_vcs(padapter, pattrib, ptxdesc); + + if ((pattrib->ether_type != 0x888e) && + (pattrib->ether_type != 0x0806) && + (pattrib->ether_type != 0x88b4) && + (pattrib->dhcp_pkt != 1) +#ifdef CONFIG_AUTO_AP_MODE + && (pattrib->pctrl != _TRUE) +#endif + ) + { + //Non EAP & ARP & DHCP type data packet + + if (pattrib->ampdu_en==_TRUE) { + SET_TX_DESC_AGG_ENABLE_8814A(ptxdesc, 1); + SET_TX_DESC_MAX_AGG_NUM_8814A(ptxdesc, 0x1f); + // Set A-MPDU aggregation. + SET_TX_DESC_AMPDU_DENSITY_8814A(ptxdesc, pattrib->ampdu_spacing); + } + else { + SET_TX_DESC_BK_8814A(ptxdesc, 1); + } + + rtl8814a_fill_txdesc_phy(padapter, pattrib, ptxdesc); + + //DATA Rate FB LMT + //SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(ptxdesc, 0x1f); + if(pHalData->current_band_type == BAND_ON_5G) + { + SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(ptxdesc, 4); + } + else + { + SET_TX_DESC_DATA_RATE_FB_LIMIT_8814A(ptxdesc, 0); + } + + if (pHalData->fw_ractrl == _FALSE) { + SET_TX_DESC_USE_RATE_8814A(ptxdesc, 1); + DriverFixedRate = 0x01; + + if(pHalData->INIDATA_RATE[pattrib->mac_id] & BIT(7)) + SET_TX_DESC_DATA_SHORT_8814A(ptxdesc, 1); + + SET_TX_DESC_TX_RATE_8814A(ptxdesc, (pHalData->INIDATA_RATE[pattrib->mac_id] & 0x7F)); + } + + if (padapter->fix_rate != 0xFF) { // modify data rate by iwpriv + SET_TX_DESC_USE_RATE_8814A(ptxdesc, 1); + DriverFixedRate = 0x01; + if(padapter->fix_rate & BIT(7)) + SET_TX_DESC_DATA_SHORT_8814A(ptxdesc, 1); + + SET_TX_DESC_TX_RATE_8814A(ptxdesc, (padapter->fix_rate & 0x7F)); + if (!padapter->data_fb) + SET_TX_DESC_DISABLE_FB_8814A(ptxdesc,1); + } + + if (pattrib->ldpc) + SET_TX_DESC_DATA_LDPC_8814A(ptxdesc, 1); + if (pattrib->stbc) + SET_TX_DESC_DATA_STBC_8814A(ptxdesc, 1); + + //work arond before fixing RA + //SET_TX_DESC_USE_RATE_8814A(ptxdesc, 1); + //SET_TX_DESC_TX_RATE_8814A(ptxdesc, 0x10); + } + else + { + // EAP data packet and ARP packet and DHCP. + // Use the 1M data rate to send the EAP/ARP packet. + // This will maybe make the handshake smooth. + + SET_TX_DESC_USE_RATE_8814A(ptxdesc, 1); + DriverFixedRate = 0x01; + SET_TX_DESC_BK_8814A(ptxdesc, 1); + + // HW will ignore this setting if the transmission rate is legacy OFDM. + if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT) { + SET_TX_DESC_DATA_SHORT_8814A(ptxdesc, 1); + } + + SET_TX_DESC_TX_RATE_8814A(ptxdesc, MRateToHwRate(pmlmeext->tx_rate)); + } + } + else if ((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) { + //RTW_INFO("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); + + SET_TX_DESC_USE_RATE_8814A(ptxdesc, 1); + DriverFixedRate = 0x01; + +#ifdef CONFIG_INTEL_PROXIM + if ((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ + RTW_INFO("\n %s pattrib->rate=%d\n", __func__,pattrib->rate); + SET_TX_DESC_TX_RATE_8814A(ptxdesc, pattrib->rate); + } + else +#endif + { + SET_TX_DESC_TX_RATE_8814A(ptxdesc, MRateToHwRate(pattrib->rate)); + } + +#ifdef CONFIG_BEAMFORMING + // VHT NDPA or HT NDPA Packet for Beamformer. + if ((pattrib->subtype == WIFI_NDPA) || + ((pattrib->subtype == WIFI_ACTION_NOACK) && (pattrib->order == 1))) + { + SET_TX_DESC_NAV_USE_HDR_8814A(ptxdesc, 1); + + SET_TX_DESC_DATA_BW_8814A(ptxdesc, BWMapping_8814(padapter,pattrib)); + SET_TX_DESC_RTS_SC_8814A(ptxdesc, SCMapping_8814(padapter,pattrib)); + + SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(ptxdesc, 1); + SET_TX_DESC_DATA_RETRY_LIMIT_8814A(ptxdesc, 5); + SET_TX_DESC_DISABLE_FB_8814A(ptxdesc, 1); + + //if(pattrib->rts_cca) + //{ + // SET_TX_DESC_NDPA_8812(ptxdesc, 2); + //} + //else + { + SET_TX_DESC_NDPA_8814A(ptxdesc, 1); + } + } + else +#endif + { + SET_TX_DESC_RETRY_LIMIT_ENABLE_8814A(ptxdesc, 1); + if (pattrib->retry_ctrl == _TRUE) { + SET_TX_DESC_DATA_RETRY_LIMIT_8814A(ptxdesc, 6); + } else { + SET_TX_DESC_DATA_RETRY_LIMIT_8814A(ptxdesc, 0); + } + } + +#ifdef CONFIG_XMIT_ACK + //CCX-TXRPT ack for xmit mgmt frames. + if (pxmitframe->ack_report) { + SET_TX_DESC_SPE_RPT_8814A(ptxdesc, 1); + #ifdef DBG_CCX + RTW_INFO("%s set tx report\n", __func__); + #endif + } +#endif //CONFIG_XMIT_ACK + } + else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) + { + RTW_INFO("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); + } +#ifdef CONFIG_MP_INCLUDED + else if(((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) && + (padapter->registrypriv.mp_mode == 1)) + { + fill_txdesc_for_mp(padapter, ptxdesc); + } +#endif + else + { + RTW_INFO("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); + + SET_TX_DESC_USE_RATE_8814A(ptxdesc, 1); + DriverFixedRate = 0x01; + SET_TX_DESC_TX_RATE_8814A(ptxdesc, MRateToHwRate(pmlmeext->tx_rate)); + } + if (DriverFixedRate) + SWDefineContent |= 0x01; + SET_TX_DESC_SW_DEFINE_8814A(ptxdesc, SWDefineContent); + + SET_TX_DESC_GID_8814A(ptxdesc, pattrib->txbf_g_id); + SET_TX_DESC_PAID_8814A(ptxdesc, pattrib->txbf_p_aid); + + rtl8814a_cal_txdesc_chksum(ptxdesc); + _dbg_dump_tx_info(padapter,pxmitframe->frame_tag,ptxdesc); + return pull; +} + + +#ifdef CONFIG_XMIT_THREAD_MODE +/* + * Description + * Transmit xmitbuf to hardware tx fifo + * + * Return + * _SUCCESS ok + * _FAIL something error + */ +s32 rtl8814au_xmit_buf_handler(PADAPTER padapter) +{ + PHAL_DATA_TYPE phal; + struct xmit_priv *pxmitpriv; + struct xmit_buf *pxmitbuf; + s32 ret; + + + phal = GET_HAL_DATA(padapter); + pxmitpriv = &padapter->xmitpriv; + + ret = _rtw_down_sema(&pxmitpriv->xmit_sema); + if (_FAIL == ret) { + RTW_ERR("%s: down SdioXmitBufSema fail!\n", __FUNCTION__); + return _FAIL; + } + + if (RTW_CANNOT_RUN(padapter)) { + RTW_ERR( + , ("%s: bDriverStopped(%s) bSurpriseRemoved(%s)!\n" + , __func__ + , rtw_is_drv_stopped(padapter)?"True":"False" + , rtw_is_surprise_removed(padapter)?"True":"False"); + return _FAIL; + } + + if(check_pending_xmitbuf(pxmitpriv) == _FALSE) + return _SUCCESS; + +#ifdef CONFIG_LPS_LCLK + ret = rtw_register_tx_alive(padapter); + if (ret != _SUCCESS) { + RTW_ERR("%s: wait to leave LPS_LCLK\n", __FUNCTION__); + return _SUCCESS; + } +#endif //CONFIG_LPS_LCLK + + do { + pxmitbuf = dequeue_pending_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) break; + + rtw_write_port(padapter, pxmitbuf->ff_hwaddr, pxmitbuf->len, (unsigned char*)pxmitbuf); + + } while (1); + +#ifdef CONFIG_LPS_LCLK + rtw_unregister_tx_alive(padapter); +#endif //CONFIG_LPS_LCLK + + return _SUCCESS; +} +#endif //CONFIG_XMIT_THREAD_MODE + + +//for non-agg data frame or management frame +static s32 rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + s32 ret = _SUCCESS; + s32 inner_ret = _SUCCESS; + int t, sz, w_sz, pull=0; + u8 *mem_addr; + u32 ff_hwaddr; + struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct security_priv *psecuritypriv = &padapter->securitypriv; +#ifdef CONFIG_80211N_HT + if ((pxmitframe->frame_tag == DATA_FRAMETAG) && + (pxmitframe->attrib.ether_type != 0x0806) && + (pxmitframe->attrib.ether_type != 0x888e) && + (pxmitframe->attrib.ether_type != 0x88b4) && + (pxmitframe->attrib.dhcp_pkt != 1)) + { + rtw_issue_addbareq_cmd(padapter, pxmitframe); + } +#endif //CONFIG_80211N_HT + mem_addr = pxmitframe->buf_addr; + + //RTW_INFO("rtw_dump_xframe()\n"); + + for (t = 0; t < pattrib->nr_frags; t++) + { + if (inner_ret != _SUCCESS && ret == _SUCCESS) + ret = _FAIL; + + if (t != (pattrib->nr_frags - 1)) + { + RTW_DBG("pattrib->nr_frags=%d\n", pattrib->nr_frags); + + sz = pxmitpriv->frag_len; + sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); + } + else //no frag + { + sz = pattrib->last_txcmdsz; + } + + pull = update_txdesc(pxmitframe, mem_addr, sz, _FALSE); + + if (pull) { + mem_addr += PACKET_OFFSET_SZ; //pull txdesc head + + //pxmitbuf ->pbuf = mem_addr; + pxmitframe->buf_addr = mem_addr; + + w_sz = sz + TXDESC_SIZE; + } + else + { + w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; + } + + ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); + +#ifdef CONFIG_XMIT_THREAD_MODE + pxmitbuf->len = w_sz; + pxmitbuf->ff_hwaddr = ff_hwaddr; + enqueue_pending_xmitbuf(pxmitpriv, pxmitbuf); +#else + inner_ret = rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); +#endif + rtw_count_tx_stats(padapter, pxmitframe, sz); + + //RTW_INFO("rtw_write_port, w_sz=%d\n", w_sz); + //RTW_INFO("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); + + mem_addr += w_sz; + + mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); + + } + + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + if (ret != _SUCCESS) + rtw_sctx_done_err(&pxmitbuf->sctx, RTW_SCTX_DONE_UNKNOWN); + + return ret; +} + +#ifdef CONFIG_USB_TX_AGGREGATION +static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) +{ + struct pkt_attrib *pattrib = &pxmitframe->attrib; + + u32 len = 0; + + // no consider fragement + len = pattrib->hdrlen + pattrib->iv_len + + SNAP_SIZE + sizeof(u16) + + pattrib->pktlen + + ((pattrib->bswenc) ? pattrib->icv_len : 0); + + if(pattrib->encrypt ==_TKIP_) + len += 8; + + return len; +} + +#define IDEA_CONDITION 1 // check all packets before enqueue +s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct xmit_frame *pxmitframe = NULL; + struct xmit_frame *pfirstframe = NULL; + + // aggregate variable + struct hw_xmit *phwxmit; + struct sta_info *psta = NULL; + struct tx_servq *ptxservq = NULL; + + _irqL irqL; + _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; + + u32 pbuf; // next pkt address + u32 pbuf_tail; // last pkt tail + u32 len; // packet length, except TXDESC_SIZE and PKT_OFFSET + + u32 bulkSize = pHalData->UsbBulkOutSize; + u8 descCount; + u32 bulkPtr; + + // dump frame variable + u32 ff_hwaddr; + + _list *sta_plist, *sta_phead; + u8 single_sta_in_queue = _FALSE; + +#ifndef IDEA_CONDITION + int res = _SUCCESS; +#endif + + RTW_INFO("+xmitframe_complete\n"); + + + // check xmitbuffer is ok + if (pxmitbuf == NULL) { + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL){ + //RTW_INFO("%s #1, connot alloc xmitbuf!!!! \n",__FUNCTION__); + return _FALSE; + } + } + +//RTW_INFO("%s ===================================== \n",__FUNCTION__); + //3 1. pick up first frame + do { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); + if (pxmitframe == NULL) { + // no more xmit frame, release xmit buffer + //RTW_INFO("no more xmit frame ,return\n"); + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return _FALSE; + } + +#ifndef IDEA_CONDITION + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + RTW_INFO("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", + pxmitframe->frame_tag, DATA_FRAMETAG); +// rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + // TID 0~15 + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + RTW_INFO("xmitframe_complete: TID(%d) should be 0~15!\n", + pxmitframe->attrib.priority); +// rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } +#endif + //RTW_INFO("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf; + pxmitbuf->priv_data = pxmitframe; + + pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1. + #ifdef CONFIG_TX_EARLY_MODE + pxmitframe->pkt_offset = (PACKET_OFFSET_SZ/8)+1; // 2; // first frame of aggregation, reserve one offset for EM info ,another for usb bulk-out block check + #else + pxmitframe->pkt_offset = (PACKET_OFFSET_SZ/8); // 1; // first frame of aggregation, reserve offset + #endif + + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + RTW_INFO("%s coalesce 1st xmitframe failed \n",__FUNCTION__); + continue; + } + + + // always return ndis_packet after rtw_xmitframe_coalesce + rtw_os_xmit_complete(padapter, pxmitframe); + + break; + } while (1); + + //3 2. aggregate same priority and same DA(AP or STA) frames + pfirstframe = pxmitframe; + len = xmitframe_need_length(pfirstframe) + TXDESC_SIZE+(pfirstframe->pkt_offset*PACKET_OFFSET_SZ); + pbuf_tail = len; + pbuf = _RND8(pbuf_tail); + + // check pkt amount in one bulk + descCount = 0; + bulkPtr = bulkSize; + if (pbuf < bulkPtr) + descCount++; + if (descCount == pHalData->UsbTxAggDescNum) + goto agg_end; + else { + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize + } + + // dequeue same priority packet from station tx queue + psta = pfirstframe->attrib.psta; + switch (pfirstframe->attrib.priority) { + case 1: + case 2: + ptxservq = &(psta->sta_xmitpriv.bk_q); + phwxmit = pxmitpriv->hwxmits + 3; + break; + + case 4: + case 5: + ptxservq = &(psta->sta_xmitpriv.vi_q); + phwxmit = pxmitpriv->hwxmits + 1; + break; + + case 6: + case 7: + ptxservq = &(psta->sta_xmitpriv.vo_q); + phwxmit = pxmitpriv->hwxmits; + break; + + case 0: + case 3: + default: + ptxservq = &(psta->sta_xmitpriv.be_q); + phwxmit = pxmitpriv->hwxmits + 2; + break; + } +//RTW_INFO("==> pkt_no=%d,pkt_len=%d,len=%d,RND8_LEN=%d,pkt_offset=0x%02x\n", + //pxmitframe->agg_num,pxmitframe->attrib.last_txcmdsz,len,pbuf,pxmitframe->pkt_offset ); + + + _enter_critical_bh(&pxmitpriv->lock, &irqL); + + sta_phead = get_list_head(phwxmit->sta_queue); + sta_plist = get_next(sta_phead); + single_sta_in_queue = rtw_end_of_queue_search(sta_phead, get_next(sta_plist)); + + xmitframe_phead = get_list_head(&ptxservq->sta_pending); + xmitframe_plist = get_next(xmitframe_phead); + + while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) { + pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); + xmitframe_plist = get_next(xmitframe_plist); + + if(_FAIL == rtw_hal_busagg_qsel_check(padapter,pfirstframe->attrib.qsel,pxmitframe->attrib.qsel)) + break; + + pxmitframe->agg_num = 0; // not first frame of aggregation + #ifdef CONFIG_TX_EARLY_MODE + pxmitframe->pkt_offset = 1;// not first frame of aggregation,reserve offset for EM Info + #else + pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset + #endif + + len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE +(pxmitframe->pkt_offset*PACKET_OFFSET_SZ); + + if (_RND8(pbuf + len) > MAX_XMITBUF_SZ) + //if (_RND8(pbuf + len) > (MAX_XMITBUF_SZ/2))//to do : for TX TP finial tune , Georgia 2012-0323 + { + //RTW_INFO("%s....len> MAX_XMITBUF_SZ\n",__FUNCTION__); + pxmitframe->agg_num = 1; + pxmitframe->pkt_offset = 1; + break; + } + rtw_list_delete(&pxmitframe->list); + ptxservq->qcnt--; + phwxmit->accnt--; + +#ifndef IDEA_CONDITION + // suppose only data frames would be in queue + if (pxmitframe->frame_tag != DATA_FRAMETAG) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", + pxmitframe->frame_tag, DATA_FRAMETAG)); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + // TID 0~15 + if ((pxmitframe->attrib.priority < 0) || + (pxmitframe->attrib.priority > 15)) { + RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, + ("xmitframe_complete: TID(%d) should be 0~15!\n", + pxmitframe->attrib.priority)); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } +#endif + +// pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; + + if (rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe) == _FALSE) { + RTW_INFO("%s coalesce failed \n",__FUNCTION__); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + continue; + } + + //RTW_INFO("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); + // always return ndis_packet after rtw_xmitframe_coalesce + rtw_os_xmit_complete(padapter, pxmitframe); + + // (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz + update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz,_TRUE); + + // don't need xmitframe any more + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + // handle pointer and stop condition + pbuf_tail = pbuf + len; + pbuf = _RND8(pbuf_tail); + + + pfirstframe->agg_num++; +#ifdef CONFIG_TX_EARLY_MODE + pxmitpriv->agg_pkt[pfirstframe->agg_num-1].offset = _RND8(len); + pxmitpriv->agg_pkt[pfirstframe->agg_num-1].pkt_len = pxmitframe->attrib.last_txcmdsz; +#endif + if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) + break; + + if (pbuf < bulkPtr) { + descCount++; + if (descCount == pHalData->UsbTxAggDescNum) + break; + } else { + descCount = 0; + bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; + } + }//end while( aggregate same priority and same DA(AP or STA) frames) + if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) + rtw_list_delete(&ptxservq->tx_pending); + else if (single_sta_in_queue == _FALSE) { + /* Re-arrange the order of stations in this ac queue to balance the service for these stations */ + rtw_list_delete(&ptxservq->tx_pending); + rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmit->sta_queue)); + } + + _exit_critical_bh(&pxmitpriv->lock, &irqL); +agg_end: +#ifdef CONFIG_80211N_HT + if ((pfirstframe->attrib.ether_type != 0x0806) && + (pfirstframe->attrib.ether_type != 0x888e) && + (pfirstframe->attrib.ether_type != 0x88b4) && + (pfirstframe->attrib.dhcp_pkt != 1)) + { + rtw_issue_addbareq_cmd(padapter, pfirstframe); + } +#endif //CONFIG_80211N_HT +#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX + //3 3. update first frame txdesc + if ((PACKET_OFFSET_SZ != 0) && ((pbuf_tail % bulkSize) == 0)) { + // remove pkt_offset + pbuf_tail -= PACKET_OFFSET_SZ; + pfirstframe->buf_addr += PACKET_OFFSET_SZ; + pfirstframe->pkt_offset--; + //RTW_INFO("$$$$$ buf size equal to USB block size $$$$$$\n"); + } +#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX + + update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz,_TRUE); + + #ifdef CONFIG_TX_EARLY_MODE + //prepare EM info for first frame, agg_num value start from 1 + pxmitpriv->agg_pkt[0].offset = _RND8(pfirstframe->attrib.last_txcmdsz +TXDESC_SIZE +(pfirstframe->pkt_offset*PACKET_OFFSET_SZ)); + pxmitpriv->agg_pkt[0].pkt_len = pfirstframe->attrib.last_txcmdsz;//get from rtw_xmitframe_coalesce + + UpdateEarlyModeInfo8812(pxmitpriv,pxmitbuf ); + #endif + + //3 4. write xmit buffer to USB FIFO + ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); +//RTW_INFO("%s ===================================== write port,buf_size(%d) \n",__FUNCTION__,pbuf_tail); + // xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr + rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); + + + //3 5. update statisitc + pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); + pbuf_tail -= (pfirstframe->pkt_offset * PACKET_OFFSET_SZ); + + + rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); + + rtw_free_xmitframe(pxmitpriv, pfirstframe); + + return _TRUE; +} + +#else //CONFIG_USB_TX_AGGREGATION + +s32 rtl8814au_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) +{ + + struct hw_xmit *phwxmits; + sint hwentry; + struct xmit_frame *pxmitframe=NULL; + int res=_SUCCESS, xcnt = 0; + + phwxmits = pxmitpriv->hwxmits; + hwentry = pxmitpriv->hwxmit_entry; + + RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n")); + + if(pxmitbuf==NULL) + { + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if(!pxmitbuf) + { + return _FALSE; + } + } + + + do + { + pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); + + if(pxmitframe) + { + pxmitframe->pxmitbuf = pxmitbuf; + + pxmitframe->buf_addr = pxmitbuf->pbuf; + + pxmitbuf->priv_data = pxmitframe; + + if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) + { + if(pxmitframe->attrib.priority<=15)//TID0~15 + { + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + } + //RTW_INFO("==> pxmitframe->attrib.priority:%d\n",pxmitframe->attrib.priority); + rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce + } + + + RTW_DBG("xmitframe_complete(): rtw_dump_xframe\n"); + + + if(res == _SUCCESS) + { + rtw_dump_xframe(padapter, pxmitframe); + } + else + { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + } + + xcnt++; + + } + else + { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + return _FALSE; + } + + break; + + }while(0/*xcnt < (NR_XMITFRAME >> 3)*/); + + return _TRUE; + +} +#endif + + + +static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + s32 res = _SUCCESS; +//RTW_INFO("==> %s \n",__FUNCTION__); + + res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); + if (res == _SUCCESS) { + rtw_dump_xframe(padapter, pxmitframe); + } + else{ + RTW_INFO("==> %s xmitframe_coalsece failed\n",__FUNCTION__); + } + + return res; +} + +/* + * Return + * _TRUE dump packet directly + * _FALSE enqueue packet + */ +static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + _irqL irqL; + s32 res; + struct xmit_buf *pxmitbuf = NULL; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct pkt_attrib *pattrib = &pxmitframe->attrib; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + u8 lg_sta_num; + + _enter_critical_bh(&pxmitpriv->lock, &irqL); + + if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) + { + //RTW_INFO("enqueue AC(%d)\n",pattrib->priority); + goto enqueue; + } + + if (rtw_xmit_ac_blocked(padapter) == _TRUE) + goto enqueue; + + if (padapter->dvobj->iface_state.lg_sta_num) + goto enqueue; + + pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); + if (pxmitbuf == NULL) + goto enqueue; + + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + pxmitframe->pxmitbuf = pxmitbuf; + pxmitframe->buf_addr = pxmitbuf->pbuf; + pxmitbuf->priv_data = pxmitframe; + + if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { + rtw_free_xmitbuf(pxmitpriv, pxmitbuf); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + } + + return _TRUE; + +enqueue: + res = rtw_xmitframe_enqueue(padapter, pxmitframe); + _exit_critical_bh(&pxmitpriv->lock, &irqL); + + if (res != _SUCCESS) { + RTW_ERR("pre_xmitframe: enqueue xmitframe fail\n"); + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + pxmitpriv->tx_drop++; + return _TRUE; + } + + return _FALSE; +} + +s32 rtl8814au_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) +{ + return rtw_dump_xframe(padapter, pmgntframe); +} + +/* + * Return + * _TRUE dump packet directly ok + * _FALSE temporary can't transmit packets to hardware + */ +s32 rtl8814au_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + return pre_xmitframe(padapter, pxmitframe); +} + +s32 rtl8814au_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) +{ + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + s32 err; + + if ((err=rtw_xmitframe_enqueue(padapter, pxmitframe)) != _SUCCESS) + { + rtw_free_xmitframe(pxmitpriv, pxmitframe); + + pxmitpriv->tx_drop++; + } + else + { +#ifdef PLATFORM_LINUX + tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); +#endif + } + + return err; + +} + + +#ifdef CONFIG_HOSTAPD_MLME + +static void rtl8814au_hostap_mgnt_xmit_cb(struct urb *urb) +{ +#ifdef PLATFORM_LINUX + struct sk_buff *skb = (struct sk_buff *)urb->context; + + //RTW_INFO("%s\n", __FUNCTION__); + + rtw_skb_free(skb); +#endif +} + +s32 rtl8814au_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) +{ +#ifdef PLATFORM_LINUX + u16 fc; + int rc, len, pipe; + unsigned int bmcst, tid, qsel; + struct sk_buff *skb, *pxmit_skb; + struct urb *urb; + unsigned char *pxmitbuf; + struct tx_desc *ptxdesc; + struct rtw_ieee80211_hdr *tx_hdr; + struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; + struct net_device *pnetdev = padapter->pnetdev; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); + + + //RTW_INFO("%s\n", __FUNCTION__); + + skb = pkt; + + len = skb->len; + tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data); + fc = le16_to_cpu(tx_hdr->frame_ctl); + bmcst = IS_MCAST(tx_hdr->addr1); + + if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT) + goto _exit; + + pxmit_skb = rtw_skb_alloc(len + TXDESC_SIZE); + + if(!pxmit_skb) + goto _exit; + + pxmitbuf = pxmit_skb->data; + + urb = usb_alloc_urb(0, GFP_ATOMIC); + if (!urb) { + goto _exit; + } + + // ----- fill tx desc ----- + ptxdesc = (struct tx_desc *)pxmitbuf; + _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); + + //offset 0 + ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); + ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(OWN | FSG | LSG); + + if(bmcst) + { + ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); + } + + //offset 4 + ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID + + ptxdesc->txdw1 |= cpu_to_le32((0x12<txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode + + //offset 8 + + //offset 12 + ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000); + + //offset 16 + ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate + + //offset 20 + + + //HW append seq + ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number + ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. + + + rtl8188eu_cal_txdesc_chksum(ptxdesc); + // ----- end of fill tx desc ----- + + // + skb_put(pxmit_skb, len + TXDESC_SIZE); + pxmitbuf = pxmitbuf + TXDESC_SIZE; + _rtw_memcpy(pxmitbuf, skb->data, len); + + //RTW_INFO("mgnt_xmit, len=%x\n", pxmit_skb->len); + + + // ----- prepare urb for submit ----- + + //translate DMA FIFO addr to pipehandle + //pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); + pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f); + + usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, + pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); + + urb->transfer_flags |= URB_ZERO_PACKET; + usb_anchor_urb(urb, &phostapdpriv->anchored); + rc = usb_submit_urb(urb, GFP_ATOMIC); + if (rc < 0) { + usb_unanchor_urb(urb); + kfree_skb(skb); + } + usb_free_urb(urb); + + +_exit: + + rtw_skb_free(skb); + +#endif + + return 0; + +} +#endif + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_halinit.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_halinit.c new file mode 100644 index 00000000000000..5c0bf0d03fc2b4 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_halinit.c @@ -0,0 +1,2416 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _HCI_HAL_INIT_C_ + +/* #include */ +#include + +#ifndef CONFIG_USB_HCI + + #error "CONFIG_USB_HCI shall be on!\n" + +#endif + + +static void _dbg_dump_macreg(_adapter *padapter) +{ + u32 offset = 0; + u32 val32 = 0; + u32 index = 0 ; + for (index = 0; index < 64; index++) { + offset = index * 4; + val32 = rtw_read32(padapter, offset); + RTW_INFO("offset : 0x%02x ,val:0x%08x\n", offset, val32); + } +} + +static VOID +_ConfigChipOutEP_8814( + IN PADAPTER pAdapter, + IN u8 NumOutPipe +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + + pHalData->OutEpQueueSel = 0; + pHalData->OutEpNumber = 0; + + switch (NumOutPipe) { + case 4: + pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ | TX_SELE_EQ; + pHalData->OutEpNumber = 4; + break; + case 3: + pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ | TX_SELE_NQ; + pHalData->OutEpNumber = 3; + break; + case 2: + pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_NQ; + pHalData->OutEpNumber = 2; + break; + case 1: + pHalData->OutEpQueueSel = TX_SELE_HQ; + pHalData->OutEpNumber = 1; + break; + default: + break; + + } + RTW_INFO("%s OutEpQueueSel(0x%02x), OutEpNumber(%d)\n", __FUNCTION__, pHalData->OutEpQueueSel, pHalData->OutEpNumber); + +} + +static BOOLEAN HalUsbSetQueuePipeMapping8814AUsb( + IN PADAPTER pAdapter, + IN u8 NumInPipe, + IN u8 NumOutPipe +) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + BOOLEAN result = _FALSE; + + _ConfigChipOutEP_8814(pAdapter, NumOutPipe); + + // Normal chip with one IN and one OUT doesn't have interrupt IN EP. + if(1 == pHalData->OutEpNumber){ + if(1 != NumInPipe){ + return result; + } + } + + // All config other than above support one Bulk IN and one Interrupt IN. + //if(2 != NumInPipe){ + // return result; + //} + + result = Hal_MappingOutPipe(pAdapter, NumOutPipe); + + return result; + +} + +void rtl8814au_interface_configure(_adapter *padapter) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); + + if (IS_SUPER_SPEED_USB(padapter)) + { + pHalData->UsbBulkOutSize = USB_SUPER_SPEED_BULK_SIZE;//1024 bytes + } + else if (IS_HIGH_SPEED_USB(padapter)) + { + pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes + } + else + { + pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes + } + + pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber; + +#ifdef CONFIG_USB_TX_AGGREGATION + pHalData->UsbTxAggMode = 1; + pHalData->UsbTxAggDescNum = 3; /* only 4 bits */ +#endif //CONFIG_USB_TX_AGGREGATION + +#ifdef CONFIG_USB_RX_AGGREGATION + pHalData->rxagg_mode = RX_AGG_DMA; //todo: change to USB_RX_AGG_DMA; + pHalData->rxagg_usb_size = 8; //unit : 512b + pHalData->rxagg_usb_timeout = 0x6; + pHalData->rxagg_dma_size = 16; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize + pHalData->rxagg_dma_timeout = 0x6; //6, absolute time = 34ms/(2^6) + + if (IS_SUPER_SPEED_USB(padapter)) { + pHalData->rxagg_usb_size = 0x7; + pHalData->rxagg_usb_timeout = 0x1a; + } else { +#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER + u32 remainder = 0; + u8 quotient = 0; + + remainder = MAX_RECVBUF_SZ % (4 * 1024); + quotient = (u8)(MAX_RECVBUF_SZ >> 12); + + if (quotient > 5) { + pHalData->rxagg_usb_size = 0x5; + pHalData->rxagg_usb_timeout = 0x20; + } else { + if (remainder >= 2048) { + pHalData->rxagg_usb_size = quotient; + pHalData->rxagg_usb_timeout = 0x10; + } else { + pHalData->rxagg_usb_size = (quotient - 1); + pHalData->rxagg_usb_timeout = 0x10; + } + } +#else /* !CONFIG_PREALLOC_RX_SKB_BUFFER */ + //the setting to reduce RX FIFO overflow on USB2.0 and increase rx throughput + pHalData->rxagg_dma_size = 0x5; + pHalData->rxagg_usb_timeout = 0x20; +#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */ + } +#endif //CONFIG_USB_RX_AGGREGATION + + HalUsbSetQueuePipeMapping8814AUsb(padapter, + pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); + +} + +static VOID +_InitBurstPktLen(IN PADAPTER Adapter) +{ + u8 u1bTmp; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //yx_qi 131128 move to 0x1448, 144c + rtw_write32(Adapter, REG_FAST_EDCA_VOVI_SETTING_8814A, 0x08070807); //yx_qi 131128 + rtw_write32(Adapter, REG_FAST_EDCA_BEBK_SETTING_8814A, 0x08070807); //yx_qi 131128 + + u1bTmp = rtw_read8(Adapter, 0xff); //check device operation speed: SS 0xff bit7 + + if(u1bTmp & BIT7) //USB2/1.1 Mode + { + pHalData->bSupportUSB3 = FALSE; + } + else //USB3 Mode + { + pHalData->bSupportUSB3 = TRUE; + } + + if(pHalData->bSupportUSB3 == _FALSE) //USB2/1.1 Mode + { + if(pHalData->UsbBulkOutSize == 512) + { + //set burst pkt len=512B + rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x1e); + } + else + { + //set burst pkt len=64B + rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x2e); + } + + rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH_8814A,0x2005); //dmc agg th 20K + } + else //USB3 Mode + { + //set burst pkt len=1k + rtw_write8(Adapter, REG_RXDMA_MODE_8814A, 0x0e); + rtw_write16(Adapter, REG_RXDMA_AGG_PG_TH_8814A,0x0a05); //dmc agg th 20K + + // set Reg 0xf008[3:4] to 2'00 to disable U1/U2 Mode to avoid 2.5G spur in USB3.0. added by page, 20120712 + rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008)&0xE7); + //to avoid usb 3.0 H2C fail + rtw_write16(Adapter, 0xf002, 0); + + rtw_write8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A, rtw_read8(Adapter, REG_SW_AMPDU_BURST_MODE_CTRL_8814A) & ~BIT(6)); + RTW_INFO("turn off the LDPC pre-TX\n"); + + } + + if(pHalData->AMPDUBurstMode) + { + rtw_write8(Adapter,REG_SW_AMPDU_BURST_MODE_CTRL_8814A, 0x5F); + } +} + + +VOID +_InitQueueReservedPage_8814AUsb( + IN PADAPTER Adapter + ) +{ + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 txpktbuf_bndy; + + RTW_INFO("===>_InitQueueReservedPage_8814AUsb()\n"); + + //---- Set Fifo page for each Queue under Mac Direct LPBK nonsec mode ------------// + rtw_write32(Adapter, REG_FIFOPAGE_INFO_1_8814A, HPQ_PGNUM_8814A); + rtw_write32(Adapter, REG_FIFOPAGE_INFO_2_8814A, LPQ_PGNUM_8814A); + rtw_write32(Adapter, REG_FIFOPAGE_INFO_3_8814A, NPQ_PGNUM_8814A); + rtw_write32(Adapter, REG_FIFOPAGE_INFO_4_8814A, EPQ_PGNUM_8814A); + + rtw_write32(Adapter, REG_FIFOPAGE_INFO_5_8814A, PUB_PGNUM_8814A); + + rtw_write32(Adapter, REG_RQPN_CTRL_2_8814A, 0x80000000); + + if(!pregistrypriv->wifi_spec) + txpktbuf_bndy = TX_PAGE_BOUNDARY_8814A; + else // for WMM + txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY_8814A; + + //Set page boundary and header + rtw_write16(Adapter,REG_TXPKTBUF_BCNQ_BDNY_8814A, txpktbuf_bndy); + rtw_write16(Adapter,REG_TXPKTBUF_BCNQ1_BDNY_8814A, txpktbuf_bndy); + rtw_write16(Adapter,REG_MGQ_PGBNDY_8814A, txpktbuf_bndy); + + //Set The head page of packet of Bcnq + rtw_write16(Adapter,REG_FIFOPAGE_CTRL_2_8814A, txpktbuf_bndy); + //The head page of packet of Bcnq1 + rtw_write16(Adapter,REG_FIFOPAGE_CTRL_2_8814A+2,txpktbuf_bndy); + + RTW_INFO("<===_InitQueueReservedPage_8814AUsb()\n"); +} + + +static u32 _InitPowerOn_8814AU(_adapter *padapter) +{ + int status = _SUCCESS; + u16 u2btmp=0; + + // YX sugguested 2014.06.03 + u8 u1btmp = rtw_read8(padapter, 0x10C2); + rtw_write8(padapter, 0x10C2, (u1btmp | BIT1)); + + if(!HalPwrSeqCmdParsing(padapter, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, Rtl8814A_NIC_ENABLE_FLOW)) + return _FAIL; + + + // Enable MAC DMA/WMAC/SCHEDULE/SEC block + // Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. Added by tynli. 2011.08.31. + rtw_write16(padapter, REG_CR_8814A, 0x00); //suggseted by zhouzhou, by page, 20111230 + u2btmp = PlatformEFIORead2Byte(padapter, REG_CR_8814A); + u2btmp |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN + | PROTOCOL_EN | SCHEDULE_EN | ENSEC | CALTMR_EN); + rtw_write16(padapter, REG_CR_8814A, u2btmp); + + _InitQueueReservedPage_8814AUsb(padapter); + return status; +} + + + + + +//--------------------------------------------------------------- +// +// MAC init functions +// +//--------------------------------------------------------------- + +// Shall USB interface init this? +static VOID +_InitInterrupt_8814AU( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // HIMR + rtw_write32(Adapter, REG_HIMR0_8814A, pHalData->IntrMask[0]&0xFFFFFFFF); + rtw_write32(Adapter, REG_HIMR1_8814A, pHalData->IntrMask[1]&0xFFFFFFFF); +} + +static void _InitID_8814A(IN PADAPTER Adapter) +{ +// hal_init_macaddr(Adapter);//set mac_address + //rtw_restore_mac_addr(Adapter); +} + +static VOID +_InitPageBoundary_8814AUsb( + IN PADAPTER Adapter + ) +{ + //20130416 KaiYuan modified for 8814 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + rtw_write16(Adapter, REG_RXFF_PTR_8814A, RX_DMA_BOUNDARY_8814A); //yx_qi 20140331 + +} + + +static VOID +_InitNormalChipRegPriority_8814AUsb( + IN PADAPTER Adapter, + IN u16 beQ, + IN u16 bkQ, + IN u16 viQ, + IN u16 voQ, + IN u16 mgtQ, + IN u16 hiQ + ) +{ + u16 value16 = (PlatformEFIORead2Byte(Adapter, REG_TRXDMA_CTRL_8814A) & 0x7); + + value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | + _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | + _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ) | BIT2; + + rtw_write16(Adapter, REG_TRXDMA_CTRL_8814A, value16); +} + +static VOID +_InitNormalChipTwoOutEpPriority_8814AUsb( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; + + + u16 valueHi = 0; + u16 valueLow = 0; + + switch(pHalData->OutEpQueueSel) + { + case (TX_SELE_HQ | TX_SELE_LQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_NQ | TX_SELE_LQ): + valueHi = QUEUE_NORMAL; + valueLow = QUEUE_LOW; + break; + case (TX_SELE_HQ | TX_SELE_NQ): + valueHi = QUEUE_HIGH; + valueLow = QUEUE_NORMAL; + break; + default: + valueHi = QUEUE_HIGH; + valueLow = QUEUE_NORMAL; + break; + } + + if(!pregistrypriv->wifi_spec){ + beQ = valueLow; + bkQ = valueLow; + viQ = valueHi; + voQ = valueHi; + mgtQ = valueHi; + hiQ = valueHi; + } + else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE + beQ = valueLow; + bkQ = valueHi; + viQ = valueHi; + voQ = valueLow; + mgtQ = valueHi; + hiQ = valueHi; + } + + _InitNormalChipRegPriority_8814AUsb(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); +} + +static VOID +_InitNormalChipThreeOutEpPriority_8814AUsb( + IN PADAPTER Adapter + ) +{ + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; + + if(!pregistrypriv->wifi_spec){// typical setting + beQ = QUEUE_LOW; + bkQ = QUEUE_LOW; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + else{// for WMM + beQ = QUEUE_LOW; + bkQ = QUEUE_NORMAL; + viQ = QUEUE_NORMAL; + voQ = QUEUE_HIGH; + mgtQ = QUEUE_HIGH; + hiQ = QUEUE_HIGH; + } + _InitNormalChipRegPriority_8814AUsb(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); +} + +static VOID +_InitQueuePriority_8814AUsb( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(pHalData->OutEpNumber) + { + case 2: + _InitNormalChipTwoOutEpPriority_8814AUsb(Adapter); + break; + case 3: + case 4: + _InitNormalChipThreeOutEpPriority_8814AUsb(Adapter); + break; + default: + RTW_INFO("_InitQueuePriority_8814AUsb(): Shall not reach here!\n"); + break; + } +} + + + +static VOID +_InitHardwareDropIncorrectBulkOut_8814A( + IN PADAPTER Adapter + ) +{ +#ifdef ENABLE_USB_DROP_INCORRECT_OUT + u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); + value32 |= DROP_DATA_EN; + rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); +#endif //ENABLE_USB_DROP_INCORRECT_OUT +} + +static VOID +_InitNetworkType_8814A( + IN PADAPTER Adapter + ) +{ + u32 value32; + + value32 = rtw_read32(Adapter, REG_CR); + // TODO: use the other function to set network type + value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); + + rtw_write32(Adapter, REG_CR, value32); +} + +static VOID +_InitTransferPageSize_8814AUsb( + IN PADAPTER Adapter + ) +{ + //8814 doesn't need this by Alex +} + +static VOID +_InitDriverInfoSize_8814A( + IN PADAPTER Adapter, + IN u8 drvInfoSize + ) +{ + rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize); +} +/* +static VOID +_InitWMACSetting_8814A( + IN PADAPTER Adapter + ) +{ + //u32 value32; + u16 value16; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + //pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; + pHalData->ReceiveConfig = + RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF; + +#if (1 == RTL8812A_RX_PACKET_INCLUDE_CRC) + pHalData->ReceiveConfig |= ACRC32; +#endif //(1 == RTL8812A_RX_PACKET_INCLUDE_CRC) + +#ifdef CONFIG_RX_PACKET_APPEND_FCS + pHalData->ReceiveConfig |= RCR_APPFCS; +#endif //CONFIG_RX_PACKET_APPEND_FCS + + pHalData->ReceiveConfig |= FORCEACK; + + // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() + rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); + + // Accept all multicast address + rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); + rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); + + + // Accept all data frames + //value16 = 0xFFFF; + //rtw_write16(Adapter, REG_RXFLTMAP2, value16); + + // 2010.09.08 hpfan + // Since ADF is removed from RCR, ps-poll will not be indicate to driver, + // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. + value16 = BIT10; +#ifdef CONFIG_BEAMFORMING + // NDPA packet subtype is 0x0101 + value16 |= BIT5; +#endif + rtw_write16(Adapter, REG_RXFLTMAP1, value16); + + // Accept all management frames + //value16 = 0xFFFF; + //rtw_write16(Adapter, REG_RXFLTMAP0, value16); + + //enable RX_SHIFT bits + //rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); + +} +*/ + +//old _InitWMACSetting_8812A + _InitAdaptiveCtrl_8812AUsb = new _InitMacConfigure_8814A +static VOID +_InitMacConfigure_8814A( + IN PADAPTER Adapter + ) +{ + u16 value16; + u32 regRRSR; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch (Adapter->registrypriv.wireless_mode) + { + case WIRELESS_11B: + regRRSR = RATE_ALL_CCK; + break; + + case WIRELESS_11G: + case WIRELESS_11A: + case WIRELESS_11_5N: + case WIRELESS_11A_5N://Todo: no basic rate for ofdm ? + case WIRELESS_11_5AC: + regRRSR = RATE_ALL_OFDM_AG; + break; + + case WIRELESS_11BG: + case WIRELESS_11G_24N: + case WIRELESS_11_24N: + case WIRELESS_11BG_24N: + default: + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + break; + + } + + // Init value for RRSR. + rtw_write32(Adapter, REG_RRSR, regRRSR); + + // Retry Limit + value16 = BIT_LRL(0x30) | BIT_SRL(0x30); + rtw_write16(Adapter, REG_RETRY_LIMIT, value16); + + pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYST_RXFF; + pHalData->ReceiveConfig |= FORCEACK; +#if (1 == RTL8812A_RX_PACKET_INCLUDE_CRC) + pHalData->ReceiveConfig |= ACRC32; +#endif //(1 == RTL8812A_RX_PACKET_INCLUDE_CRC) + +#ifdef CONFIG_RX_PACKET_APPEND_FCS + pHalData->ReceiveConfig |= RCR_APPFCS; +#endif //CONFIG_RX_PACKET_APPEND_FCS + rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); + + // 2010.09.08 hpfan + // Since ADF is removed from RCR, ps-poll will not be indicate to driver, + // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. + value16 = BIT10; +#ifdef CONFIG_BEAMFORMING + // NDPA packet subtype is 0x0101 + value16 |= BIT5; +#endif /*CONFIG_BEAMFORMING*/ + rtw_write16(Adapter, REG_RXFLTMAP1, value16); + + // 201409/25 MH When RA is enabled, we need to reduce the value. + rtw_write8(Adapter, REG_MAX_AGGR_NUM_8814A, 0x36); + rtw_write8(Adapter, REG_RTS_MAX_AGGR_NUM_8814A,0x36); + +} + +/* +static VOID +_InitAdaptiveCtrl_8812AUsb( + IN PADAPTER Adapter + ) +{ + u16 value16; + u32 value32; + + // Response Rate Set + value32 = rtw_read32(Adapter, REG_RRSR); + value32 &= ~RATE_BITMAP_ALL; + + if(Adapter->registrypriv.wireless_mode & WIRELESS_11B) + value32 |= RATE_RRSR_CCK_ONLY_1M; + else + value32 |= RATE_RRSR_WITHOUT_CCK; + + value32 |= RATE_RRSR_CCK_ONLY_1M; + rtw_write32(Adapter, REG_RRSR, value32); + + // CF-END Threshold + //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); + + // SIFS (used in NAV) + value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); + rtw_write16(Adapter, REG_SPEC_SIFS, value16); + + // Retry Limit + value16 = _LRL(0x30) | _SRL(0x30); + rtw_write16(Adapter, REG_RL, value16); + +}*/ + +static VOID +_InitEDCA_8814AUsb( + IN PADAPTER Adapter + ) +{ + // Set Spec SIFS (used in NAV) + rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a); + rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a); + + // Set SIFS for CCK + rtw_write16(Adapter,REG_SIFS_CTX, 0x100a); + + // Set SIFS for OFDM + rtw_write16(Adapter,REG_SIFS_TRX, 0x100a); + + // TXOP + rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); + rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); + rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); + rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); + + // 0x50 for 80MHz clock + //rtw_write8(Adapter, REG_USTIME_TSF, 0x50); + //rtw_write8(Adapter, REG_USTIME_EDCA, 0x50); +} + + +static VOID +_InitBeaconMaxError_8814A( + IN PADAPTER Adapter, + IN BOOLEAN InfraMode + ) +{ +#ifdef CONFIG_ADHOC_WORKAROUND_SETTING + rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); +#else + //rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); +#endif +} + + +#ifdef CONFIG_RTW_LED +static void _InitHWLed(PADAPTER Adapter) +{ + struct led_priv *pledpriv = adapter_to_led(Adapter); + + if( pledpriv->LedStrategy != HW_LED) + return; + +// HW led control +// to do .... +//must consider cases of antenna diversity/ commbo card/solo card/mini card + +} +#endif //CONFIG_LED + +/* +static VOID +_InitRDGSetting_8812A( + IN PADAPTER Adapter + ) +{ + rtw_write8(Adapter,REG_RD_CTRL,0xFF); + rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); + rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05); +}*/ + +static VOID +_InitRetryFunction_8814A( + IN PADAPTER Adapter + ) +{ + u8 value8; + + value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); + value8 |= EN_AMPDU_RTY_NEW; + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); + + // Set ACK timeout + //rtw_write8(Adapter, REG_ACKTO, 0x40); //masked by page for BCM IOT issue temporally + rtw_write8(Adapter, REG_ACKTO, 0x80); +} + +/*----------------------------------------------------------------------------- + * Function: usb_AggSettingTxUpdate() + * + * Overview: Seperate TX/RX parameters update independent for TP detection and + * dynamic TX/RX aggreagtion parameters update. + * + * Input: PADAPTER + * + * Output/Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Seperate to smaller function. + * + *---------------------------------------------------------------------------*/ +static VOID +usb_AggSettingTxUpdate_8814A( + IN PADAPTER Adapter + ) +{ +#ifdef CONFIG_USB_TX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 value32; + + if(Adapter->registrypriv.wifi_spec) + pHalData->UsbTxAggDescNum = 1; + + if(pHalData->UsbTxAggMode){ + value32 = rtw_read32(Adapter, REG_TDECTRL); + value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); + value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); + + rtw_write32(Adapter, REG_TDECTRL, value32); + rtw_write8(Adapter, REG_TDECTRL+3, pHalData->UsbTxAggDescNum<<1); + } + +#endif //CONFIG_USB_TX_AGGREGATION +} // usb_AggSettingTxUpdate + + +/*----------------------------------------------------------------------------- + * Function: usb_AggSettingRxUpdate() + * + * Overview: Seperate TX/RX parameters update independent for TP detection and + * dynamic TX/RX aggreagtion parameters update. + * + * Input: PADAPTER + * + * Output/Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Seperate to smaller function. + * + *---------------------------------------------------------------------------*/ +static VOID +usb_AggSettingRxUpdate_8814A( + IN PADAPTER Adapter + ) +{ +#ifdef CONFIG_USB_RX_AGGREGATION + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 valueDMA; + u8 valueUSB; + + valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL_8814A); + valueUSB = rtw_read8(Adapter, REG_RXDMA_AGG_PG_TH_8814A+3); + switch(pHalData->rxagg_mode) + { + case RX_AGG_DMA: + valueDMA |= RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN_8814A; //yx_qi 131128 + break; + case RX_AGG_USB: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN_8814A; + break; + case RX_AGG_MIX: + valueDMA |= RXDMA_AGG_EN; + valueUSB |= USB_AGG_EN_8814A; + break; + case RX_AGG_DISABLE: + default: + valueDMA &= ~RXDMA_AGG_EN; + valueUSB &= ~USB_AGG_EN_8814A; + break; + } + + rtw_write8(Adapter, REG_TRXDMA_CTRL_8814A, valueDMA); + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH_8814A+3, valueUSB); //yx_qi 131128 +#endif //CONFIG_USB_RX_AGGREGATION +} // usb_AggSettingRxUpdate + +static VOID +init_UsbAggregationSetting_8814A( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + // Tx aggregation setting + usb_AggSettingTxUpdate_8814A(Adapter); + + // Rx aggregation setting + usb_AggSettingRxUpdate_8814A(Adapter); + + // 201/12/10 MH Add for USB agg mode dynamic switch. + pHalData->UsbRxHighSpeedMode = _FALSE; + pHalData->UsbTxVeryHighSpeedMode = _FALSE; +} + +/*----------------------------------------------------------------------------- + * Function: USB_AggModeSwitch() + * + * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase + * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we + * need to monitor the influence of FTP/network share. + * For TX mode, we are still ubder investigation. + * + * Input: PADAPTER + * + * Output: NONE + * + * Return: NONE + * + * Revised History: + * When Who Remark + * 12/10/2010 MHC Create Version 0. + * + *---------------------------------------------------------------------------*/ +static VOID +USB_AggModeSwitch( + IN PADAPTER Adapter + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + //pHalData->UsbRxHighSpeedMode = _FALSE; + // How to measure the RX speed? We assume that when traffic is more than + if (pMgntInfo->bRegAggDMEnable == _FALSE) + { + return; // Inf not support. + } + + + if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == _TRUE && + pHalData->UsbRxHighSpeedMode == _FALSE) + { + pHalData->UsbRxHighSpeedMode = _TRUE; + RT_TRACE(COMP_INIT, DBG_LOUD, ("UsbAggModeSwitchCheck to HIGH\n")); + } + else if (pMgntInfo->LinkDetectInfo.bHigherBusyRxTraffic == _FALSE && + pHalData->UsbRxHighSpeedMode == _TRUE) + { + pHalData->UsbRxHighSpeedMode = _FALSE; + RT_TRACE(COMP_INIT, DBG_LOUD, ("UsbAggModeSwitchCheck to LOW\n")); + } + else + { + return; + } + + +#if USB_RX_AGGREGATION_92C + if (pHalData->UsbRxHighSpeedMode == _TRUE) + { + // 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. + // USB mode +#if (RT_PLATFORM == PLATFORM_LINUX) + if (pMgntInfo->LinkDetectInfo.bTxBusyTraffic) + { + pHalData->RxAggBlockCount = 16; + pHalData->RxAggBlockTimeout = 7; + } + else +#endif + { + pHalData->RxAggBlockCount = 40; + pHalData->RxAggBlockTimeout = 5; + } + // Mix mode + pHalData->RxAggPageCount = 72; + pHalData->RxAggPageTimeout = 6; + } + else + { + // USB mode + pHalData->RxAggBlockCount = pMgntInfo->RegRxAggBlockCount; + pHalData->RxAggBlockTimeout = pMgntInfo->RegRxAggBlockTimeout; + // Mix mode + pHalData->RxAggPageCount = pMgntInfo->RegRxAggPageCount; + pHalData->RxAggPageTimeout = pMgntInfo->RegRxAggPageTimeout; + } + + if (pHalData->RxAggBlockCount > MAX_RX_AGG_BLKCNT) + pHalData->RxAggBlockCount = MAX_RX_AGG_BLKCNT; +#if (OS_WIN_FROM_VISTA(OS_VERSION)) || (RT_PLATFORM == PLATFORM_LINUX) // do not support WINXP to prevent usbehci.sys BSOD + if (IS_WIRELESS_MODE_N_24G(Adapter) || IS_WIRELESS_MODE_N_5G(Adapter)) + { + // + // 2010/12/24 MH According to V1012 QC IOT test, XP BSOD happen when running chariot test + // with the aggregation dynamic change!! We need to disable the function to prevent it is broken + // in usbehci.sys. + // + usb_AggSettingRxUpdate_8188E(Adapter); + + // 2010/12/27 MH According to designer's suggstion, we can only modify Timeout value. Otheriwse + // there might many HW incorrect behavior, the XP BSOD at usbehci.sys may be relative to the + // issue. Base on the newest test, we can not enable block cnt > 30, otherwise XP usbehci.sys may + // BSOD. + } +#endif + +#endif +#endif +} // USB_AggModeSwitch + +static VOID +_InitOperationMode_8814A( + IN PADAPTER Adapter + ) +{ +#if 0//gtest + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + u8 regBwOpMode = 0; + u32 regRATR = 0, regRRSR = 0; + + + //1 This part need to modified according to the rate set we filtered!! + // + // Set RRSR, RATR, and REG_BWOPMODE registers + // + switch(Adapter->RegWirelessMode) + { + case WIRELESS_MODE_B: + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK; + regRRSR = RATE_ALL_CCK; + break; + case WIRELESS_MODE_A: + regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; + regRATR = RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_OFDM_AG; + break; + case WIRELESS_MODE_G: + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + break; + case WIRELESS_MODE_AUTO: + if (Adapter->bInHctTest) + { + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + } + else + { + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + } + break; + case WIRELESS_MODE_N_24G: + // It support CCK rate by default. + // CCK rate will be filtered out only when associated AP does not support it. + regBwOpMode = BW_OPMODE_20MHZ; + regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; + break; + case WIRELESS_MODE_N_5G: + regBwOpMode = BW_OPMODE_5G; + regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; + regRRSR = RATE_ALL_OFDM_AG; + break; + + default: //for MacOSX compiler warning. + break; + } + + // Ziv ???????? + //rtw_write32(Adapter, REG_INIRTS_RATE_SEL, regRRSR); + rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); +#endif +} + +/* +// Set CCK and OFDM Block "ON" +static VOID _BBTurnOnBlock( + IN PADAPTER Adapter + ) +{ +#if (DISABLE_BB_RF) + return; +#endif + + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); + PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); +} + + +static VOID _RfPowerSave( + IN PADAPTER Adapter + ) +{ +#if 0 + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + u8 eRFPath; + +#if (DISABLE_BB_RF) + return; +#endif + + if(pMgntInfo->RegRfOff == _TRUE){ // User disable RF via registry. + RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n")); + MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW); + // Those action will be discard in MgntActSet_RF_State because off the same state + for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) + PHY_SetRFReg(Adapter, eRFPath, 0x4, 0xC00, 0x0); + } + else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep. + RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason)); + MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason); + } + else{ + pHalData->eRFPowerState = eRfOn; + pMgntInfo->RfOffReason = 0; + if(Adapter->bInSetPower || Adapter->bResetInProgress) + PlatformUsbEnableInPipes(Adapter); + RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n")); + } +#endif +} +*/ +enum { + Antenna_Lfet = 1, + Antenna_Right = 2, +}; + +static VOID +_InitAntenna_Selection_8814A(IN PADAPTER Adapter) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if(pHalData->AntDivCfg==0) + return; +/* + RTW_INFO("==> %s ....\n",__FUNCTION__); + + rtw_write8(Adapter, REG_LEDCFG2, 0x82); + + PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); + + if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == MAIN_ANT) + pHalData->CurAntenna = MAIN_ANT; + else + pHalData->CurAntenna = AUX_ANT; + RTW_INFO("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == MAIN_ANT)?"MAIN_ANT":"AUX_ANT"); + +*/ +} + +// +// 2010/08/26 MH Add for selective suspend mode check. +// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and +// slim card. +// +static VOID +HalDetectSelectiveSuspendMode( + IN PADAPTER Adapter + ) +{ +#if 0 + u8 tmpvalue; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter); + + // If support HW radio detect, we need to enable WOL ability, otherwise, we + // can not use FW to notify host the power state switch. + + EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); + + DBG_8192C("HalDetectSelectiveSuspendMode(): SS "); + if(tmpvalue & BIT1) + { + DBG_8192C("Enable\n"); + } + else + { + DBG_8192C("Disable\n"); + pdvobjpriv->RegUsbSS = _FALSE; + } + + // 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. + if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) + { + //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); + + //if (!pMgntInfo->bRegDongleSS) + //{ + // RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n")); + pdvobjpriv->RegUsbSS = _FALSE; + //} + } +#endif +} // HalDetectSelectiveSuspendMode + +static rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ) +{ + rt_rf_power_state rfpowerstate = rf_on; + + return rfpowerstate; +} // HalDetectPwrDownMode + +static void _ps_open_RF(_adapter *padapter) { + //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified + //phy_SsPwrSwitch92CU(padapter, rf_on, 1); +} + +static void _ps_close_RF(_adapter *padapter){ + //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified + //phy_SsPwrSwitch92CU(padapter, rf_off, 1); +} + + +/* A lightweight deinit function */ +static void rtl8814au_hw_reset(_adapter *Adapter) +{ +#if 0 + u8 reg_val=0; + if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) + { + _8051Reset8812(Adapter); + rtw_write8(Adapter, REG_MCUFWDL, 0x00); + //before BB reset should do clock gated + rtw_write32(Adapter, rFPGA0_XCD_RFPara, + rtw_read32(Adapter, rFPGA0_XCD_RFPara)|(BIT6)); + //reset BB + reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN); + reg_val &= ~(BIT(0) | BIT(1)); + rtw_write8(Adapter, REG_SYS_FUNC_EN, reg_val); + //reset RF + rtw_write8(Adapter, REG_RF_CTRL, 0); + //reset TRX path + rtw_write16(Adapter, REG_CR, 0); + //reset MAC + reg_val = rtw_read8(Adapter, REG_APS_FSMCO+1); + reg_val |= BIT(1); + reg_val = rtw_write8(Adapter, REG_APS_FSMCO+1, reg_val); //reg0x5[1] ,auto FSM off + + reg_val = rtw_read8(Adapter, REG_APS_FSMCO+1); + + //check if reg0x5[1] auto cleared + while(reg_val & BIT(1)){ + rtw_udelay_os(1); + reg_val = rtw_read8(Adapter, REG_APS_FSMCO+1); + } + reg_val |= BIT(0); + reg_val = rtw_write8(Adapter, REG_APS_FSMCO+1, reg_val); //reg0x5[0] ,auto FSM on + + reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); + reg_val &= ~(BIT(4) | BIT(7)); + rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); + reg_val = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); + reg_val |= BIT(4) | BIT(7); + rtw_write8(Adapter, REG_SYS_FUNC_EN+1, reg_val); + } +#endif //0 +} + +u32 rtl8814au_hal_init(PADAPTER Adapter) +{ + u8 value8 = 0, u1bRegCR; + u16 value16; + u8 txpktbuf_bndy; + u32 status = _SUCCESS; + u32 NavUpper = WiFiNavUpperUs; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(Adapter); + struct registry_priv *pregistrypriv = &Adapter->registrypriv; + + rt_rf_power_state eRfPowerStateToSet; + + u32 init_start_time = rtw_get_current_time(); + + +#ifdef DBG_HAL_INIT_PROFILING + + enum HAL_INIT_STAGES { + HAL_INIT_STAGES_BEGIN = 0, + HAL_INIT_STAGES_INIT_PW_ON, + HAL_INIT_STAGES_INIT_LLTT, + HAL_INIT_STAGES_DOWNLOAD_FW, + HAL_INIT_STAGES_MAC, + HAL_INIT_STAGES_MISC01, + HAL_INIT_STAGES_MISC02, + HAL_INIT_STAGES_BB, + HAL_INIT_STAGES_RF, + HAL_INIT_STAGES_TURN_ON_BLOCK, + HAL_INIT_STAGES_INIT_SECURITY, + HAL_INIT_STAGES_MISC11, + HAL_INIT_STAGES_INIT_HAL_DM, + //HAL_INIT_STAGES_RF_PS, + HAL_INIT_STAGES_IQK, + HAL_INIT_STAGES_PW_TRACK, + HAL_INIT_STAGES_LCK, + HAL_INIT_STAGES_MISC21, + //HAL_INIT_STAGES_INIT_PABIAS, + #ifdef CONFIG_BT_COEXIST + HAL_INIT_STAGES_BT_COEXIST, + #endif + //HAL_INIT_STAGES_ANTENNA_SEL, + HAL_INIT_STAGES_MISC31, + HAL_INIT_STAGES_END, + HAL_INIT_STAGES_NUM + }; + + char * hal_init_stages_str[] = { + "HAL_INIT_STAGES_BEGIN", + "HAL_INIT_STAGES_INIT_PW_ON", + "HAL_INIT_STAGES_INIT_LLTT", + "HAL_INIT_STAGES_DOWNLOAD_FW", + "HAL_INIT_STAGES_MAC", + "HAL_INIT_STAGES_MISC01", + "HAL_INIT_STAGES_MISC02", + "HAL_INIT_STAGES_BB", + "HAL_INIT_STAGES_RF", + "HAL_INIT_STAGES_TURN_ON_BLOCK", + "HAL_INIT_STAGES_INIT_SECURITY", + "HAL_INIT_STAGES_MISC11", + "HAL_INIT_STAGES_INIT_HAL_DM", + //"HAL_INIT_STAGES_RF_PS", + "HAL_INIT_STAGES_IQK", + "HAL_INIT_STAGES_PW_TRACK", + "HAL_INIT_STAGES_LCK", + "HAL_INIT_STAGES_MISC21", + #ifdef CONFIG_BT_COEXIST + "HAL_INIT_STAGES_BT_COEXIST", + #endif + //"HAL_INIT_STAGES_ANTENNA_SEL", + "HAL_INIT_STAGES_MISC31", + "HAL_INIT_STAGES_END", + }; + + int hal_init_profiling_i; + u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point + + for(hal_init_profiling_i=0;hal_init_profiling_ibkeepfwalive) + { + _ps_open_RF(Adapter); + + if(pHalData->bIQKInitialized){ + //PHY_IQCalibrate_8812A(Adapter,_TRUE); + } + else + { + //PHY_IQCalibrate_8812A(Adapter,_FALSE); + //pHalData->bIQKInitialized = _TRUE; + } + + //ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); + //PHY_LCCalibrate_8812A(Adapter); + + goto exit; + } + + // Check if MAC has already power on. by tynli. 2011.05.27. + value8 = rtw_read8(Adapter, REG_SYS_CLKR+1); + u1bRegCR = rtw_read8(Adapter, REG_CR); + RTW_INFO(" power-on :REG_SYS_CLKR 0x09=0x%02x. REG_CR 0x100=0x%02x.\n", value8, u1bRegCR); + if((value8&BIT3) && (u1bRegCR != 0 && u1bRegCR != 0xEA)) + { + //pHalData->bMACFuncEnable = _TRUE; + RTW_INFO(" MAC has already power on.\n"); + } + else + { + //pHalData->bMACFuncEnable = _FALSE; + // Set FwPSState to ALL_ON mode to prevent from the I/O be return because of 32k + // state which is set before sleep under wowlan mode. 2012.01.04. by tynli. + //pHalData->FwPSState = FW_PS_STATE_ALL_ON_88E; + RTW_INFO(" MAC has not been powered on yet.\n"); + } + + // + // 2012/11/13 MH Revise for U2/U3 switch we can not update RF-A/B reset. + // After discuss with BB team YN, reset after MAC power on to prevent RF + // R/W error. Is it a right method? + // + /*if(!IS_HARDWARE_TYPE_8821(Adapter)) + { + rtw_write8(Adapter, REG_RF_CTRL, 5); + rtw_write8(Adapter, REG_RF_CTRL, 7); + rtw_write8(Adapter, REG_RF_B_CTRL_8812, 5); + rtw_write8(Adapter, REG_RF_B_CTRL_8812, 7); + }*/ + +/* + If HW didn't go through a complete de-initial procedure, + it probably occurs some problem for double initial procedure. + Like "CONFIG_DEINIT_BEFORE_INIT" in 92du chip +*/ + rtl8814au_hw_reset(Adapter); //todo + + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); + status = _InitPowerOn_8814AU(Adapter); + if(status == _FAIL){ + RTW_INFO("Failed to init power on!\n"); + goto exit; + } + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); + + status = InitLLTTable8814A(Adapter); + if(status == _FAIL){ + RTW_INFO("Failed to init LLT table\n"); + goto exit; + } + + _InitHardwareDropIncorrectBulkOut_8814A(Adapter); + + /*if(pHalData->bRDGEnable){ + _InitRDGSetting_8812A(Adapter); + }*/ + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); + if (Adapter->registrypriv.mp_mode == 0) { + status = FirmwareDownload8814A(Adapter, _FALSE); + if (status != _SUCCESS) { + RTW_INFO("%s: Download Firmware failed!!\n", __FUNCTION__); + GET_HAL_DATA(Adapter)->bFWReady = _FALSE; + pHalData->fw_ractrl = _FALSE; + //return status; + } else { + RTW_INFO("%s: Download Firmware Success!!\n",__FUNCTION__); + GET_HAL_DATA(Adapter)->bFWReady = _TRUE; + pHalData->fw_ractrl = _TRUE; + } + } + + InitializeFirmwareVars8814(Adapter); + + if(pwrctrlpriv->reg_rfoff == _TRUE){ + pwrctrlpriv->rf_pwrstate = rf_off; + } + + // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting + // HW GPIO pin. Before PHY_RFConfig8192C. + //HalDetectPwrDownMode(Adapter); + // 2010/08/26 MH If Efuse does not support sective suspend then disable the function. + //HalDetectSelectiveSuspendMode(Adapter); + + // Save target channel + // Current Channel will be updated again later. + pHalData->current_channel = 0;//set 0 to trigger switch correct channel + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); +#if (HAL_MAC_ENABLE == 1) + status = PHY_MACConfig8814(Adapter); + if(status == _FAIL) + { + goto exit; + } +#endif //HAL_MAC_ENABLE + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); + + _InitQueuePriority_8814AUsb(Adapter); + _InitPageBoundary_8814AUsb(Adapter); + + _InitTransferPageSize_8814AUsb(Adapter); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); + // Get Rx PHY status in order to report RSSI and others. + _InitDriverInfoSize_8814A(Adapter, DRVINFO_SZ); + + _InitInterrupt_8814AU(Adapter); + _InitID_8814A(Adapter);//set mac_address + _InitNetworkType_8814A(Adapter);//set msr + _InitMacConfigure_8814A(Adapter); + //_InitWMACSetting_8814A(Adapter); + //_InitAdaptiveCtrl_8814AUsb(Adapter); + _InitEDCA_8814AUsb(Adapter); + + _InitRetryFunction_8814A(Adapter); + init_UsbAggregationSetting_8814A(Adapter); + //_InitOperationMode_8814A(Adapter);//todo + _InitBeaconParameters_8814A(Adapter); + _InitBeaconMaxError_8814A(Adapter, _TRUE); + + _InitBurstPktLen(Adapter); //added by page. 20110919 + + // + // Init CR MACTXEN, MACRXEN after setting RxFF boundary REG_TRXFF_BNDY to patch + // Hw bug which Hw initials RxFF boundry size to a value which is larger than the real Rx buffer size in 88E. + // 2011.08.05. by tynli. + // + value8 = rtw_read8(Adapter, REG_CR); + rtw_write8(Adapter, REG_CR, (value8|MACTXEN|MACRXEN)); + +#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) + +#ifdef CONFIG_CHECK_AC_LIFETIME + // Enable lifetime check for the four ACs + rtw_write8(Adapter, REG_LIFETIME_CTRL, 0x0F); +#endif // CONFIG_CHECK_AC_LIFETIME + +#ifdef CONFIG_TX_MCAST2UNI + rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms + rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms +#else // CONFIG_TX_MCAST2UNI + rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s + rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s +#endif // CONFIG_TX_MCAST2UNI +#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI + + +#ifdef CONFIG_RTW_LED + _InitHWLed(Adapter); +#endif //CONFIG_LED + + // + //d. Initialize BB related configurations. + // + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); +#if (HAL_BB_ENABLE == 1) + status = PHY_BBConfig8814(Adapter); + if(status == _FAIL) + { + goto exit; + } +#endif //HAL_BB_ENABLE + + // 92CU use 3-wire to r/w RF + //pHalData->Rf_Mode = RF_OP_By_SW_3wire; + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); +#if (HAL_RF_ENABLE == 1) + status = PHY_RFConfig8814A(Adapter); + if(status == _FAIL) + { + goto exit; + } + + //todo: + //if(pHalData->rf_type == RF_1T1R && IS_HARDWARE_TYPE_8812AU(Adapter)) + //PHY_BB8812_Config_1T(Adapter); +#endif + + PHY_ConfigBB_8814A(Adapter); + + if(Adapter->registrypriv.channel <= 14) + PHY_SwitchWirelessBand8814A(Adapter, BAND_ON_2_4G); + else + PHY_SwitchWirelessBand8814A(Adapter, BAND_ON_5G); + + rtw_hal_set_chnl_bw(Adapter, Adapter->registrypriv.channel, + CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HAL_PRIME_CHNL_OFFSET_DONT_CARE); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); + invalidate_cam_all(Adapter); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); + _InitAntenna_Selection_8814A(Adapter); + + // HW SEQ CTRL + //set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. + rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); + + // + // Disable BAR, suggested by Scott + // 2010.04.09 add by hpfan + // + rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); + + rtw_write8(Adapter,REG_SECONDARY_CCA_CTRL_8814A,0x03); + + if(pregistrypriv->wifi_spec) + rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0); + //adjust EDCCA to avoid collision + /*if(pregistrypriv->wifi_spec) + { + rtw_write16(Adapter, rEDCCA_Jaguar, 0xfe01); + }*/ + //Nav limit , suggest by scott + rtw_write8(Adapter, 0x652, 0x0); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); + rtl8814_InitHalDm(Adapter); + + // + // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status + // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not + // call init_adapter. May cause some problem?? + // + // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed + // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState + // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. + // Added by tynli. 2010.03.30. + pwrctrlpriv->rf_pwrstate = rf_on; + + PHY_IQCalibrate_8814A_Init(&pHalData->odmpriv); + +#if (HAL_BB_ENABLE == 1) + PHY_SetRFEReg8814A(Adapter, _TRUE, pHalData->current_band_type); +#endif //HAL_BB_ENABLE + + //0x4c6[3] 1: RTS BW = Data BW + //0: RTS BW depends on CCA / secondary CCA result. + rtw_write8(Adapter, REG_QUEUE_CTRL, rtw_read8(Adapter, REG_QUEUE_CTRL)&0xF7); + + rtw_hal_set_hwreg(Adapter, HW_VAR_NAV_UPPER, ((u8 *)&NavUpper)); + + // enable Tx report. + rtw_write8(Adapter, REG_FWHW_TXQ_CTRL+1, 0x0F); + + // Suggested by SD1 pisa. Added by tynli. 2011.10.21. + //rtw_write8(Adapter, REG_EARLY_MODE_CONTROL_8812+3, 0x01);//Pretx_en, for WEP/TKIP SEC + + //tynli_test_tx_report. + //rtw_write16(Adapter, REG_TX_RPT_TIME, 0x3DF0); + + // Reset USB mode switch setting + rtw_write8(Adapter, REG_SDIO_CTRL_8814A, 0x0); + rtw_write8(Adapter, REG_ACLK_MON, 0x0); + + //RT_TRACE(COMP_INIT, DBG_TRACE, ("InitializeAdapter8188EUsb() <====\n")); + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); + // 2010/08/26 MH Merge from 8192CE. + if(pwrctrlpriv->rf_pwrstate == rf_on) + { +/* if(IS_HARDWARE_TYPE_8812AU(Adapter)) + { +#if (RTL8812A_SUPPORT == 1) + pHalData->bNeedIQK = _TRUE; + if(pHalData->bIQKInitialized) + PHY_IQCalibrate_8812A(Adapter, _TRUE); + else + { + PHY_IQCalibrate_8812A(Adapter, _FALSE); + pHalData->bIQKInitialized = _TRUE; + } +#endif + }*/ + //this should be done by rf team using phydm code + //PHY_IQCalibrate_8814A(&pHalData->odmpriv, _FALSE); +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); + + //ODM_TXPowerTrackingCheck(&pHalData->odmpriv ); + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); + //PHY_LCCalibrate_8812A(Adapter); + } + + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21); + + +//HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); +// _InitPABias(Adapter); +#if (MP_DRIVER == 1) + if (Adapter->registrypriv.mp_mode == 1) + { + Adapter->mppriv.channel = pHalData->current_channel; + MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); + } +#endif //#if (MP_DRIVER == 1) + +#ifdef CONFIG_BT_COEXIST +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST); + //_InitBTCoexist(Adapter); + // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter + // suspend mode automatically. + //HwSuspendModeEnable92Cu(Adapter, _FALSE); + + if ( _TRUE == pHalData->EEPROMBluetoothCoexist) + { + // Init BT hw config. + rtw_btcoex_HAL_Initialize(Adapter, _FALSE); + } + else + { + // In combo card run wifi only , must setting some hardware reg. + rtl8812a_combo_card_WifiOnlyHwInit(Adapter); + } +#endif //CONFIG_BT_COEXIST + +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); + + //rtw_write8(Adapter, REG_USB_HRPWM, 0); + +#ifdef CONFIG_XMIT_ACK + //ack for xmit mgmt frames. + rtw_write32(Adapter, REG_FWHW_TXQ_CTRL, rtw_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); +#endif //CONFIG_XMIT_ACK + + //misc + { + int i; + u8 mac_addr[6]; + for(i=0; i<6; i++) + { +#ifdef CONFIG_CONCURRENT_MODE + if(Adapter->iface_type == IFACE_PORT1) + mac_addr[i] = rtw_read8(Adapter, REG_MACID1+i); + else +#endif + mac_addr[i] = rtw_read8(Adapter, REG_MACID+i); + } + + RTW_INFO("MAC Address from REG_MACID = "MAC_FMT"\n", MAC_ARG(mac_addr)); + } + +exit: +HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); + + RTW_INFO("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); + + #ifdef DBG_HAL_INIT_PROFILING + hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); + + for(hal_init_profiling_i=0;hal_init_profiling_ibFWReady = _FALSE; + +} + +static void rtl8814au_hw_power_down(_adapter *padapter) +{ + // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. + // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. + + // Enable register area 0x0-0xc. + rtw_write8(padapter,REG_RSV_CTRL, 0x0); + rtw_write16(padapter, REG_APS_FSMCO, 0x8812); +} + +u32 rtl8814au_hal_deinit(PADAPTER Adapter) + { + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + RTW_INFO("==> %s \n",__FUNCTION__); + +#ifdef CONFIG_BT_COEXIST + if (hal_btcoex_IsBtExist(Adapter)) + { + RTW_INFO("BT module enable SIC\n"); + // Only under WIN7 we can support selective suspend and enter D3 state when system call halt adapter. + + //rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)|BIT12); + // 2010/10/13 MH If we enable SIC in the position and then call _ResetDigitalProcedure1. in XP, + // the system will hang due to 8051 reset fail. + } + else +#endif //CONFIG_BT_COEXIST + { + rtw_write16(Adapter, REG_GPIO_MUXCFG, rtw_read16(Adapter, REG_GPIO_MUXCFG)&(~BIT12)); + } + + if(pHalData->bSupportUSB3 == _TRUE) + { + // set Reg 0xf008[3:4] to 2'11 to eable U1/U2 Mode in USB3.0. added by page, 20120712 + rtw_write8(Adapter, 0xf008, rtw_read8(Adapter, 0xf008)|0x18); + } + + rtw_write32(Adapter, REG_HISR, 0xFFFFFFFF); + rtw_write32(Adapter, REG_HISRE, 0xFFFFFFFF); + rtw_write32(Adapter, REG_HIMR, 0); + rtw_write32(Adapter, REG_HIMRE, 0); + + #ifdef SUPPORT_HW_RFOFF_DETECTED + RTW_INFO("bkeepfwalive(%x)\n", pwrctl->bkeepfwalive); + if(pwrctl->bkeepfwalive) + { + _ps_close_RF(Adapter); + if((pwrctl->bHWPwrPindetect) && (pwrctl->bHWPowerdown)) + rtl8814au_hw_power_down(Adapter); + } + else +#endif + { + if (rtw_is_hw_init_completed(Adapter)) { + hal_carddisable_8814(Adapter); + + if((pwrctl->bHWPwrPindetect ) && (pwrctl->bHWPowerdown)) + rtl8814au_hw_power_down(Adapter); + } + } + return _SUCCESS; + } + + +unsigned int rtl8814au_inirp_init(PADAPTER Adapter) +{ + u8 i; + struct recv_buf *precvbuf; + uint status; + struct dvobj_priv *pdev= adapter_to_dvobj(Adapter); + struct intf_hdl * pintfhdl=&Adapter->iopriv.intf; + struct recv_priv *precvpriv = &(Adapter->recvpriv); + u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); +#endif + + _read_port = pintfhdl->io_ops._read_port; + + status = _SUCCESS; + + RTW_INFO("===> usb_inirp_init \n"); + + precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; + + //issue Rx irp to receive data + precvbuf = (struct recv_buf *)precvpriv->precv_buf; + for(i=0; iff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE ) + { + RTW_ERR("usb_rx_init: usb_read_port error \n"); + status = _FAIL; + goto exit; + } + + precvbuf++; + precvpriv->free_recv_buf_queue_cnt--; + } + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + if (pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX] != 0x05) { + status = _FAIL; + RTW_INFO("%s =>Warning !! Have not USB Int-IN pipe, RtIntInPipe(%d)!!!\n", __func__, pdev->RtInPipe[REALTEK_USB_IN_INT_EP_IDX]); + goto exit; + } + _read_interrupt = pintfhdl->io_ops._read_interrupt; + if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE ) + { + RTW_ERR("usb_rx_init: usb_read_interrupt error \n"); + status = _FAIL; + } +#endif + +exit: + + RTW_INFO("<=== usb_inirp_init \n"); + + return status; + +} + +unsigned int rtl8814au_inirp_deinit(PADAPTER Adapter) +{ + RTW_INFO("\n ===> usb_rx_deinit \n"); + + rtw_read_port_cancel(Adapter); + + RTW_INFO("\n <=== usb_rx_deinit \n"); + + return _SUCCESS; +} + +//------------------------------------------------------------------- +// +// EEPROM/EFUSE Content Parsing +// +//------------------------------------------------------------------- +VOID +hal_ReadIDs_8814AU( + IN PADAPTER Adapter, + IN pu1Byte PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if( !AutoloadFail ) + { + pHalData->EEPROMVID = EF2Byte( *(pu2Byte)&PROMContent[EEPROM_VID_8814AU] ); + pHalData->EEPROMPID = EF2Byte( *(pu2Byte)&PROMContent[EEPROM_PID_8814AU] ); + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = *(pu1Byte)&PROMContent[EEPROM_CustomID_8814]; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + } + else + { + pHalData->EEPROMVID = EEPROM_Default_VID; + pHalData->EEPROMPID = EEPROM_Default_PID; + + // Customer ID, 0x00 and 0xff are reserved for Realtek. + pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; + pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; + } + + RTW_INFO("VID = 0x%04X, PID = 0x%04X\n", pHalData->EEPROMVID, pHalData->EEPROMPID); + RTW_INFO("Customer ID: 0x%02X, SubCustomer ID: 0x%02X\n", pHalData->EEPROMCustomerID, pHalData->EEPROMSubCustomerID); +} + +VOID +hal_InitPGData_8814A( + IN PADAPTER padapter, + IN OUT u8* PROMContent + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + u32 i; + u16 value16; + + if(_FALSE == pHalData->bautoload_fail_flag) + { // autoload OK. + // hal_ReadeFuse_8814A is FW offload read efuse, todo + //#if ((DEV_BUS_TYPE==RT_USB_INTERFACE || DEV_BUS_TYPE==RT_SDIO_INTERFACE)) && (MP_DRIVER != 1) + //if(hal_ReadeFuse_8814A(pAdapter) == _FAIL) + //#endif + + // Read EFUSE real map to shadow. + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + } + else + {//autoload fail + RTW_INFO("AutoLoad Fail reported from CR9346!!\n"); + //update to default value 0xFF + EFUSE_ShadowMapUpdate(padapter, EFUSE_WIFI, _FALSE); + } + +#ifdef CONFIG_EFUSE_CONFIG_FILE + if (check_phy_efuse_tx_power_info_valid(padapter) == _FALSE) { + if (Hal_readPGDataFromConfigFile(padapter) != _SUCCESS) + RTW_ERR("invalid phy efuse and read from file fail, will use driver default!!\n"); + } +#endif +} + +VOID +hal_CustomizedBehavior_8814AU( + IN PADAPTER Adapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct led_priv *pledpriv = adapter_to_led(Adapter); + + + // Led mode + switch(pHalData->CustomerID) + { + case RT_CID_DEFAULT: + pledpriv->LedStrategy = SW_LED_MODE9; +#ifdef CONFIG_RTW_SW_LED + pledpriv->bRegUseLed = _TRUE; +#endif + break; + + default: + pledpriv->LedStrategy = SW_LED_MODE9; + break; + } +} + +static void +hal_CustomizeByCustomerID_8814AU( + IN PADAPTER pAdapter + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); + + RTW_INFO("PID= 0x%x, VID= %x\n",pHalData->EEPROMPID,pHalData->EEPROMVID); + + // Decide CustomerID according to VID/DID or EEPROM + switch(pHalData->EEPROMCustomerID) + { + case EEPROM_CID_DEFAULT: + if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x0BFF) && (pHalData->EEPROMPID == 0x8160)) + { + pHalData->CustomerID = RT_CID_CHINA_MOBILE; + } + else if((pHalData->EEPROMVID == 0x0BDA) && (pHalData->EEPROMPID == 0x5088)) + pHalData->CustomerID = RT_CID_CC_C; + + break; + case EEPROM_CID_WHQL: + //padapter->bInHctTest = _TRUE; + + //pMgntInfo->bSupportTurboMode = _FALSE; + //pMgntInfo->bAutoTurboBy8186 = _FALSE; + + //pMgntInfo->PowerSaveControl.bInactivePs = _FALSE; + //pMgntInfo->PowerSaveControl.bIPSModeBackup = _FALSE; + //pMgntInfo->PowerSaveControl.bLeisurePs = _FALSE; + //pMgntInfo->PowerSaveControl.bLeisurePsModeBackup = _FALSE; + //pMgntInfo->keepAliveLevel = 0; + + //padapter->bUnloadDriverwhenS3S4 = _FALSE; + break; + default: + pHalData->CustomerID = RT_CID_DEFAULT; + break; + + } + RTW_INFO("Customer ID: 0x%2x\n", pHalData->CustomerID); + + hal_CustomizedBehavior_8814AU(pAdapter); +} + +VOID +hal_ReadUsbModeSwitch_8814AU( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + if (AutoloadFail) + pHalData->EEPROMUsbSwitch = _FALSE; + else + /* check efuse 0x0E bit2 */ + pHalData->EEPROMUsbSwitch = (PROMContent[EEPROM_USB_MODE_8814A] & BIT1) >> 1; +} + +static VOID +ReadLEDSetting_8814AU( + IN PADAPTER Adapter, + IN u8* PROMContent, + IN BOOLEAN AutoloadFail + ) +{ + struct led_priv *pledpriv = adapter_to_led(Adapter); + +#ifdef CONFIG_RTW_SW_LED + pledpriv->bRegUseLed = _TRUE; +#else // HW LED + pledpriv->LedStrategy = HW_LED; +#endif //CONFIG_RTW_LED +} + +VOID +InitAdapterVariablesByPROM_8814AU( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + + hal_InitPGData_8814A(Adapter, pHalData->efuse_eeprom_data); + + //Hal_EfuseParseIDCode8812A(Adapter, pHalData->efuse_eeprom_data); + hal_ReadPROMVersion8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadIDs_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_config_macaddr(Adapter, pHalData->bautoload_fail_flag); + hal_ReadTxPowerInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadBoardType8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_Read_TRX_antenna_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + + // + // Read Bluetooth co-exist and initialize + // + hal_EfuseParseBTCoexistInfo8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + + hal_ReadChannelPlan8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_EfuseParseXtal_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadThermalMeter_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadRemoteWakeup_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadAntennaDiversity8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_ReadRFEType_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + + ReadLEDSetting_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + + hal_ReadUsbModeSwitch_8814AU(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + hal_CustomizeByCustomerID_8814AU(Adapter); + + hal_GetRxGainOffset_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); + + Hal_EfuseParseKFreeData_8814A(Adapter, pHalData->efuse_eeprom_data, pHalData->bautoload_fail_flag); +} + +static void hal_ReadPROMContent_8814A( + IN PADAPTER Adapter + ) +{ + PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); + u8 eeValue; + + /* check system boot selection */ + eeValue = rtw_read8(Adapter, REG_9346CR); + pHalData->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; + pHalData->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; + + RTW_INFO("Boot from %s, Autoload %s !\n", (pHalData->EepromOrEfuse ? "EEPROM" : "EFUSE"), + (pHalData->bautoload_fail_flag ? "Fail" : "OK") ); + + //pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; + + InitAdapterVariablesByPROM_8814AU(Adapter); +} + +u8 +ReadAdapterInfo8814AU( + IN PADAPTER Adapter + ) +{ + Hal_InitEfuseVars_8814A(Adapter); + + /* Read all content in Efuse/EEPROM. */ + hal_ReadPROMContent_8814A(Adapter); + + /* We need to define the RF type after all PROM value is recognized. */ + ReadRFType8814A(Adapter); + + return _SUCCESS; +} + +void UpdateInterruptMask8814AU(PADAPTER padapter,u8 bHIMR0 ,u32 AddMSR, u32 RemoveMSR) +{ + HAL_DATA_TYPE *pHalData; + + u32 *himr; + pHalData = GET_HAL_DATA(padapter); + + if(bHIMR0) + himr = &(pHalData->IntrMask[0]); + else + himr = &(pHalData->IntrMask[1]); + + if (AddMSR) + *himr |= AddMSR; + + if (RemoveMSR) + *himr &= (~RemoveMSR); + + if(bHIMR0) + rtw_write32(padapter, REG_HIMR0_8814A, *himr); + else + rtw_write32(padapter, REG_HIMR1_8814A, *himr); + +} + +u8 SetHwReg8814AU(PADAPTER Adapter, u8 variable, u8* val) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(Adapter); + struct registry_priv *registry_par = &Adapter->registrypriv; + u8 ret = _SUCCESS; + + switch (variable) { + case HW_VAR_RXDMA_AGG_PG_TH: +#ifdef CONFIG_USB_RX_AGGREGATION + { + /*u8 threshold = *((u8 *)val); + if( threshold == 0) + { + threshold = pHalData->UsbRxAggPageCount; + } + rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold);*/ + } +#endif + break; + case HW_VAR_SET_RPWM: +#ifdef CONFIG_LPS_LCLK + { + u8 ps_state = *((u8 *)val); + + /*rpwm value only use BIT0(clock bit) ,BIT6(Ack bit), and BIT7(Toggle bit) for 88e. + BIT0 value - 1: 32k, 0:40MHz. + BIT6 value - 1: report cpwm value after success set, 0:do not report. + BIT7 value - Toggle bit change. + modify by Thomas. 2012/4/2.*/ + ps_state = ps_state & 0xC1; + /*RTW_INFO("##### Change RPWM value to = %x for switch clk #####\n", ps_state);*/ + rtw_write8(Adapter, REG_USB_HRPWM, ps_state); + } +#endif +#ifdef CONFIG_AP_WOWLAN + if (pwrctl->wowlan_ap_mode == _TRUE) { + u8 ps_state = *((u8 *)val); + + RTW_INFO("%s, RPWM\n", __func__); + ps_state = ps_state & 0xC1; + rtw_write8(Adapter, REG_USB_HRPWM, ps_state); + } +#endif + break; + + case HW_VAR_USB_MODE: + /* U2 to U3 */ + if (registry_par->switch_usb_mode == 1) { + if (IS_HIGH_SPEED_USB(Adapter)) { + if ((rtw_read8(Adapter, 0x74) & (BIT(2) | BIT(3))) != BIT(3)) { + rtw_write8(Adapter, 0x74, 0x8); + rtw_write8(Adapter, 0x70, 0x2); + rtw_write8(Adapter, 0x3e, 0x1); + rtw_write8(Adapter, 0x3d, 0x3); + /* usb disconnect */ + rtw_write8(Adapter, 0x5, 0x80); + *val = _TRUE; + } + } else if (IS_SUPER_SPEED_USB(Adapter)) { + rtw_write8(Adapter, 0x70, rtw_read8(Adapter, 0x70) & (~BIT(1))); + rtw_write8(Adapter, 0x3e, rtw_read8(Adapter, 0x3e) & (~BIT(0))); + } + } else if (registry_par->switch_usb_mode == 2) { + /* U3 to U2 */ + if (IS_SUPER_SPEED_USB(Adapter)) { + if ((rtw_read8(Adapter, 0x74) & (BIT(2) | BIT(3))) != BIT(2)) { + rtw_write8(Adapter, 0x74, 0x4); + rtw_write8(Adapter, 0x70, 0x2); + rtw_write8(Adapter, 0x3e, 0x1); + rtw_write8(Adapter, 0x3d, 0x3); + /* usb disconnect */ + rtw_write8(Adapter, 0x5, 0x80); + *val = _TRUE; + } + } else if (IS_HIGH_SPEED_USB(Adapter)) { + rtw_write8(Adapter, 0x70, rtw_read8(Adapter, 0x70) & (~BIT(1))); + rtw_write8(Adapter, 0x3e, rtw_read8(Adapter, 0x3e) & (~BIT(0))); + } + } + break; + default: + ret = SetHwReg8814A(Adapter, variable, val); + break; + } + + return ret; +} + +void GetHwReg8814AU(PADAPTER Adapter, u8 variable, u8* val) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + + switch(variable) + { + default: + GetHwReg8814A(Adapter,variable,val); + break; + } + +} + +// +// Description: +// Change default setting of specified variable. +// +u8 +SetHalDefVar8814AUsb( + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch(eVariable) + { + default: + SetHalDefVar8814A(Adapter,eVariable,pValue); + break; + } + + return bResult; +} + +// +// Description: +// Query setting of specified variable. +// +u8 +GetHalDefVar8814AUsb( + IN PADAPTER Adapter, + IN HAL_DEF_VARIABLE eVariable, + IN PVOID pValue + ) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); + u8 bResult = _SUCCESS; + + switch(eVariable) + { + default: + GetHalDefVar8814A(Adapter,eVariable,pValue); + break; + } + + return bResult; +} + +static void rtl8814au_init_default_value(_adapter * padapter) +{ + PHAL_DATA_TYPE pHalData; + + pHalData = GET_HAL_DATA(padapter); + + InitDefaultValue8814A(padapter); + + pHalData->IntrMask[0] = (u32)( \ + //IMR_ROK | + //IMR_RDU | + //IMR_VODOK | + //IMR_VIDOK | + //IMR_BEDOK | + //IMR_BKDOK | + //IMR_MGNTDOK | + //IMR_HIGHDOK | + //IMR_CPWM | + //IMR_CPWM2 | + //IMR_C2HCMD | + //IMR_HISR1_IND_INT | + //IMR_ATIMEND | + //IMR_BCNDMAINT_E | + //IMR_HSISR_IND_ON_INT | + //IMR_BCNDOK0 | + //IMR_BCNDMAINT0 | + //IMR_TSF_BIT32_TOGGLE | + //IMR_TXBCN0OK | + //IMR_TXBCN0ERR | + //IMR_GTINT3 | + //IMR_GTINT4 | + //IMR_TXCCK | + 0); + + pHalData->IntrMask[1] = (u32)(\ + //IMR_RXFOVW | + //IMR_TXFOVW | + //IMR_RXERR | + //IMR_TXERR | + //IMR_ATIMEND_E | + //IMR_BCNDOK1 | + //IMR_BCNDOK2 | + //IMR_BCNDOK3 | + //IMR_BCNDOK4 | + //IMR_BCNDOK5 | + //IMR_BCNDOK6 | + //IMR_BCNDOK7 | + //IMR_BCNDMAINT1 | + //IMR_BCNDMAINT2 | + //IMR_BCNDMAINT3 | + //IMR_BCNDMAINT4 | + //IMR_BCNDMAINT5 | + //IMR_BCNDMAINT6 | + //IMR_BCNDMAINT7 | + 0); +} + +static u8 rtl8814au_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) +{ + u8 bResult = _TRUE; + switch(efunc_id){ + + #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) + case HAL_USB_SELECT_SUSPEND: + { + u8 bfwpoll = *(( u8*)val); + //rtl8188e_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect + } + break; + #endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED + + default: + break; + } + return bResult; +} + +void rtl8814au_set_hal_ops(_adapter * padapter) +{ + struct hal_ops *pHalFunc = &padapter->hal_func; + + pHalFunc->hal_power_on = _InitPowerOn_8814AU; + pHalFunc->hal_power_off = hal_carddisable_8814; + + pHalFunc->hal_init = &rtl8814au_hal_init; + pHalFunc->hal_deinit = &rtl8814au_hal_deinit; + + pHalFunc->inirp_init = &rtl8814au_inirp_init; + pHalFunc->inirp_deinit = &rtl8814au_inirp_deinit; + + pHalFunc->init_xmit_priv = &rtl8814au_init_xmit_priv; + pHalFunc->free_xmit_priv = &rtl8814au_free_xmit_priv; + + pHalFunc->init_recv_priv = &rtl8814au_init_recv_priv; + pHalFunc->free_recv_priv = &rtl8814au_free_recv_priv; +#ifdef CONFIG_RTW_SW_LED + pHalFunc->InitSwLeds = &rtl8814au_InitSwLeds; + pHalFunc->DeInitSwLeds = &rtl8814au_DeInitSwLeds; +//#else //case of hw led or no led +// pHalFunc->InitSwLeds = NULL; +// pHalFunc->DeInitSwLeds = NULL; +#endif//CONFIG_RTW_LED + + pHalFunc->init_default_value = &rtl8814au_init_default_value; + pHalFunc->intf_chip_configure = &rtl8814au_interface_configure; + pHalFunc->read_adapter_info = &ReadAdapterInfo8814AU; + + pHalFunc->set_hw_reg_handler = &SetHwReg8814AU; + pHalFunc->GetHwRegHandler = &GetHwReg8814AU; + pHalFunc->get_hal_def_var_handler = &GetHalDefVar8814AUsb; + pHalFunc->SetHalDefVarHandler = &SetHalDefVar8814AUsb; + + + pHalFunc->hal_xmit = &rtl8814au_hal_xmit; + pHalFunc->mgnt_xmit = &rtl8814au_mgnt_xmit; + pHalFunc->hal_xmitframe_enqueue = &rtl8814au_hal_xmitframe_enqueue; + +#ifdef CONFIG_HOSTAPD_MLME + pHalFunc->hostap_mgnt_xmit_entry = &rtl8812au_hostap_mgnt_xmit_entry; +#endif + pHalFunc->interface_ps_func = &rtl8814au_ps_func; +#ifdef CONFIG_XMIT_THREAD_MODE + pHalFunc->xmit_thread_handler = &rtl8812au_xmit_buf_handler; +#endif +#ifdef CONFIG_SUPPORT_USB_INT + pHalFunc->interrupt_handler = interrupt_handler_8814au; +#endif + pHalFunc->fw_correct_bcn = &rtl8814_fw_update_beacon_cmd; + rtl8814_set_hal_ops(pHalFunc); + +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c new file mode 100644 index 00000000000000..320024cae2b8c0 --- /dev/null +++ b/drivers/net/wireless/realtek/rtl8812au/hal/rtl8814a/usb/usb_ops_linux.c @@ -0,0 +1,312 @@ +/****************************************************************************** + * + * Copyright(c) 2007 - 2017 Realtek Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + *****************************************************************************/ +#define _HCI_OPS_OS_C_ + +/* #include */ +#include + +#ifdef CONFIG_SUPPORT_USB_INT +void interrupt_handler_8814au(_adapter *padapter, u16 pkt_len, u8 *pbuf) +{ + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct reportpwrstate_parm pwr_rpt; + + if (pkt_len != INTERRUPT_MSG_FORMAT_LEN) { + RTW_INFO("%s Invalid interrupt content length (%d)!\n", __FUNCTION__, pkt_len); + return ; + } + + /* HISR */ + _rtw_memcpy(&(pHalData->IntArray[0]), &(pbuf[USB_INTR_CONTENT_HISR_OFFSET]), 4); + _rtw_memcpy(&(pHalData->IntArray[1]), &(pbuf[USB_INTR_CONTENT_HISRE_OFFSET]), 4); + +#if 0 /*DBG*/ + { + u32 hisr = 0 , hisr_ex = 0; + _rtw_memcpy(&hisr, &(pHalData->IntArray[0]), 4); + hisr = le32_to_cpu(hisr); + + _rtw_memcpy(&hisr_ex, &(pHalData->IntArray[1]), 4); + hisr_ex = le32_to_cpu(hisr_ex); + + if ((hisr != 0) || (hisr_ex != 0)) + RTW_INFO("===> %s hisr:0x%08x ,hisr_ex:0x%08x\n", __FUNCTION__, hisr, hisr_ex); + } +#endif + +#ifdef CONFIG_LPS_LCLK + if (pHalData->IntArray[0] & IMR_CPWM_88E) { + _rtw_memcpy(&pwr_rpt.state, &(pbuf[USB_INTR_CONTENT_CPWM1_OFFSET]), 1); + /* _rtw_memcpy(&pwr_rpt.state2, &(pbuf[USB_INTR_CONTENT_CPWM2_OFFSET]), 1); */ + + /* 88e's cpwm value only change BIT0, so driver need to add PS_STATE_S2 for LPS flow. */ + pwr_rpt.state |= PS_STATE_S2; + _set_workitem(&(adapter_to_pwrctl(padapter)->cpwm_event)); + } +#endif/* CONFIG_LPS_LCLK */ + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN + +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT + if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) +#endif +#ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR + if (pHalData->IntArray[0] & (IMR_TBDER_88E | IMR_TBDOK_88E)) +#endif + { + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +#if 0 + if (pHalData->IntArray[0] & IMR_BCNDMAINT0_88E) + RTW_INFO("%s: HISR_BCNERLY_INT\n", __func__); + if (pHalData->IntArray[0] & IMR_TBDOK_88E) + RTW_INFO("%s: HISR_TXBCNOK\n", __func__); + if (pHalData->IntArray[0] & IMR_TBDER_88E) + RTW_INFO("%s: HISR_TXBCNERR\n", __func__); +#endif /* 0 */ + + if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) + { + //send_beacon(padapter); + if(pmlmepriv->update_bcn == _TRUE) + { + //tx_beacon_hdl(padapter, NULL); + set_tx_beacon_cmd(padapter); + } + } +#ifdef CONFIG_CONCURRENT_MODE + if(check_buddy_fwstate(padapter, WIFI_AP_STATE)) + { + //send_beacon(padapter); + if(padapter->pbuddy_adapter->mlmepriv.update_bcn == _TRUE) + { + //tx_beacon_hdl(padapter, NULL); + set_tx_beacon_cmd(padapter->pbuddy_adapter); + } + } +#endif + + } +#endif /* CONFIG_INTERRUPT_BASED_TXBCN */ + + + + +#ifdef DBG_CONFIG_ERROR_DETECT_INT + if (pHalData->IntArray[1] & IMR_TXERR_88E) + RTW_INFO("===> %s Tx Error Flag Interrupt Status\n", __FUNCTION__); + if (pHalData->IntArray[1] & IMR_RXERR_88E) + RTW_INFO("===> %s Rx Error Flag INT Status\n", __FUNCTION__); + if (pHalData->IntArray[1] & IMR_TXFOVW_88E) + RTW_INFO("===> %s Transmit FIFO Overflow\n", __FUNCTION__); + if (pHalData->IntArray[1] & IMR_RXFOVW_88E) + RTW_INFO("===> %s Receive FIFO Overflow\n", __FUNCTION__); +#endif/* DBG_CONFIG_ERROR_DETECT_INT */ + +#ifdef CONFIG_FW_C2H_REG + /* C2H Event */ + if (pbuf[0] != 0) + usb_c2h_hisr_hdl(padapter, pbuf); +#endif +} +#endif /* CONFIG_SUPPORT_USB_INT */ +#if 0 +int recvbuf2recvframe(PADAPTER padapter, void *ptr) +{ + u8 *pbuf; + u8 pkt_cnt = 0; + u32 pkt_offset; + s32 transfer_len; + u8 *pphy_status = NULL; + union recv_frame *precvframe = NULL; + struct rx_pkt_attrib *pattrib = NULL; + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + struct recv_priv *precvpriv = &padapter->recvpriv; + _queue *pfree_recv_queue = &precvpriv->free_recv_queue; + _pkt *pskb; + +#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX + pskb = NULL; + transfer_len = (s32)((struct recv_buf *)ptr)->transfer_len; + pbuf = ((struct recv_buf *)ptr)->pbuf; +#else + pskb = (_pkt *)ptr; + transfer_len = (s32)pskb->len; + pbuf = pskb->data; +#endif/* CONFIG_USE_USB_BUFFER_ALLOC_RX */ + + +#ifdef CONFIG_USB_RX_AGGREGATION + pkt_cnt = GET_RX_STATUS_DESC_DMA_AGG_NUM_8814A(pbuf); +#endif + + do { + precvframe = rtw_alloc_recvframe(pfree_recv_queue); + if (precvframe == NULL) { + RTW_INFO("%s()-%d: rtw_alloc_recvframe() failed! RX Drop!\n", __FUNCTION__, __LINE__); + goto _exit_recvbuf2recvframe; + } + + _rtw_init_listhead(&precvframe->u.hdr.list); + precvframe->u.hdr.precvbuf = NULL; /* can't access the precvbuf for new arch. */ + precvframe->u.hdr.len = 0; + + rtl8814_query_rx_desc_status(precvframe, pbuf); + + pattrib = &precvframe->u.hdr.attrib; + + if ((padapter->registrypriv.mp_mode == 0) && ((pattrib->crc_err) || (pattrib->icv_err))) { + RTW_INFO("%s: RX Warning! crc_err=%d icv_err=%d, skip!\n", __FUNCTION__, pattrib->crc_err, pattrib->icv_err); + + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + + pkt_offset = RXDESC_SIZE + pattrib->drvinfo_sz + pattrib->shift_sz + pattrib->pkt_len; + + if ((pattrib->pkt_len <= 0) || (pkt_offset > transfer_len)) { + RTW_INFO("%s()-%d: RX Warning!,pkt_len<=0 or pkt_offset> transfer_len\n", __FUNCTION__, __LINE__); + rtw_free_recvframe(precvframe, pfree_recv_queue); + goto _exit_recvbuf2recvframe; + } + +#ifdef CONFIG_RX_PACKET_APPEND_FCS + if (check_fwstate(&padapter->mlmepriv, WIFI_MONITOR_STATE) == _FALSE) + if ((pattrib->pkt_rpt_type == NORMAL_RX) && (pHalData->ReceiveConfig & RCR_APPFCS)) + pattrib->pkt_len -= IEEE80211_FCS_LEN; +#endif + if (rtw_os_alloc_recvframe(padapter, precvframe, + (pbuf + pattrib->shift_sz + pattrib->drvinfo_sz + RXDESC_SIZE), pskb) == _FAIL) { + rtw_free_recvframe(precvframe, pfree_recv_queue); + + goto _exit_recvbuf2recvframe; + } + + recvframe_put(precvframe, pattrib->pkt_len); + /* recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); */ + + if(pattrib->pkt_rpt_type == NORMAL_RX)//Normal rx packet + { + if(pattrib->physt) + pphy_status = (pbuf + RXDESC_OFFSET); + +#ifdef CONFIG_CONCURRENT_MODE + if(rtw_buddy_adapter_up(padapter)) + { + if(pre_recv_entry(precvframe, pphy_status) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: recv_entry(precvframe) != _SUCCESS\n")); + } + } +#endif //CONFIG_CONCURRENT_MODE + + if(pattrib->physt && pphy_status) + rx_query_phy_status(precvframe, pphy_status); + + if(rtw_recv_entry(precvframe) != _SUCCESS) + { + RT_TRACE(_module_rtl871x_recv_c_,_drv_err_, + ("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); + } + + } + else{ // pkt_rpt_type == TX_REPORT1-CCX, TX_REPORT2-TX RTP,HIS_REPORT-USB HISR RTP + if (pattrib->pkt_rpt_type == C2H_PACKET) { + //RTW_INFO("rx C2H_PACKET \n"); + rtw_hal_c2h_pkt_pre_hdl(padapter,precvframe->u.hdr.rx_data,pattrib->pkt_len); + } + rtw_free_recvframe(precvframe, pfree_recv_queue); + } + +#ifdef CONFIG_USB_RX_AGGREGATION + /* jaguar 8-byte alignment */ + pkt_offset = (u16)_RND8(pkt_offset); + pkt_cnt--; + pbuf += pkt_offset; +#endif + transfer_len -= pkt_offset; + precvframe = NULL; + + } while (transfer_len > 0); + +_exit_recvbuf2recvframe: + + return _SUCCESS; +} +#endif + +void rtl8814au_xmit_tasklet(void *priv) +{ + int ret = _FALSE; + _adapter *padapter = (_adapter*)priv; + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + + while(1) + { + if (RTW_CANNOT_TX(padapter)) + { + RTW_INFO("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); + break; + } + + if (rtw_xmit_ac_blocked(padapter) == _TRUE) + break; + + ret = rtl8814au_xmitframe_complete(padapter, pxmitpriv, NULL); + + if(ret==_FALSE) + break; + + } + +} + +void rtl8814au_set_intf_ops(struct _io_ops *pops) +{ + _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); + + pops->_read8 = &usb_read8; + pops->_read16 = &usb_read16; + pops->_read32 = &usb_read32; + pops->_read_mem = &usb_read_mem; + pops->_read_port = &usb_read_port; + + pops->_write8 = &usb_write8; + pops->_write16 = &usb_write16; + pops->_write32 = &usb_write32; + pops->_writeN = &usb_writeN; + +#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ + pops->_write8_async= &usb_async_write8; + pops->_write16_async = &usb_async_write16; + pops->_write32_async = &usb_async_write32; +#endif + pops->_write_mem = &usb_write_mem; + pops->_write_port = &usb_write_port; + + pops->_read_port_cancel = &usb_read_port_cancel; + pops->_write_port_cancel = &usb_write_port_cancel; + +#ifdef CONFIG_USB_INTERRUPT_IN_PIPE + pops->_read_interrupt = &usb_read_interrupt; +#endif + +} + +void rtl8814au_set_hw_type(struct dvobj_priv *pdvobj) +{ + pdvobj->HardwareType = HARDWARE_TYPE_RTL8814AU; + RTW_INFO("CHIP TYPE: RTL8814\n"); +} diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyCfg.h deleted file mode 100644 index 3fc0b11079085e..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyCfg.h +++ /dev/null @@ -1,260 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8188EPHYCFG_H__ -#define __INC_HAL8188EPHYCFG_H__ - - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -#define MAX_TX_COUNT_8188E 1 - -/* BB/RF related */ - - -/*------------------------------Define structure----------------------------*/ - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ - - -/*------------------------Export Marco Definition---------------------------*/ -/*------------------------Export Marco Definition---------------------------*/ - - -/*--------------------------Exported Function prototype---------------------*/ -/* - * BB and RF register read/write - * */ -u32 PHY_QueryBBReg8188E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetBBReg8188E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); -u32 PHY_QueryRFReg8188E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetRFReg8188E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); - -/* - * Initialization related function - */ -/* MAC/BB/RF HAL config */ -int PHY_MACConfig8188E(IN PADAPTER Adapter); -int PHY_BBConfig8188E(IN PADAPTER Adapter); -int PHY_RFConfig8188E(IN PADAPTER Adapter); - -/* RF config */ -int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 *pFileName, enum rf_path eRFPath); - -/* - * RF Power setting - */ -/* extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, - * IN RT_RF_POWER_STATE eRFPowerState); */ - -/* - * BB TX Power R/W - * */ -void PHY_GetTxPowerLevel8188E(IN PADAPTER Adapter, - OUT s32 *powerlevel); -void PHY_SetTxPowerLevel8188E(IN PADAPTER Adapter, - IN u8 channel); -BOOLEAN PHY_UpdateTxPowerDbm8188E(IN PADAPTER Adapter, - IN int powerInDbm); - -VOID -PHY_SetTxPowerIndex_8188E( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8188E( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -/* - * Switch bandwidth for 8192S - */ -/* extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); */ -void PHY_SetBWMode8188E(IN PADAPTER pAdapter, - IN enum channel_width ChnlWidth, - IN unsigned char Offset); - -/* - * Set FW CMD IO for 8192S. - */ -/* extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, - * IN IO_TYPE IOType); */ - -/* - * Set A2 entry to fw for 8192S - * */ -extern void FillA2Entry8192C(IN PADAPTER Adapter, - IN u8 index, - IN u8 *val); - - -/* - * channel switch related funciton - */ -/* extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); */ -void PHY_SwChnl8188E(IN PADAPTER pAdapter, - IN u8 channel); - -VOID -PHY_SetSwChnlBWMode8188E( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -VOID -PHY_SetRFEReg_8188E( - IN PADAPTER Adapter -); -/* - * BB/MAC/RF other monitor API - * */ -VOID phy_set_rf_path_switch_8188e(IN struct dm_struct *phydm, IN bool bMain); - -extern VOID -PHY_SwitchEphyParameter( - IN PADAPTER Adapter -); - -extern VOID -PHY_EnableHostClkReq( - IN PADAPTER Adapter -); - -BOOLEAN -SetAntennaConfig92C( - IN PADAPTER Adapter, - IN u8 DefaultAnt -); - -/*--------------------------Exported Function prototype---------------------*/ - -/* - * Initialization related function - * - * MAC/BB/RF HAL config */ -/* extern s32 PHY_MACConfig8723(PADAPTER padapter); - * s32 PHY_BBConfig8723(PADAPTER padapter); - * s32 PHY_RFConfig8723(PADAPTER padapter); */ - - - -/* ****************************************************************** - * Note: If SIC_ENABLE under PCIE, because of the slow operation - * you should - * 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows - * 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. - * */ -#if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) - #define SIC_ENABLE 1 - #define SIC_HW_SUPPORT 1 -#else - #define SIC_ENABLE 0 - #define SIC_HW_SUPPORT 0 -#endif -/* ****************************************************************** */ - - -#define SIC_MAX_POLL_CNT 5 - -#if (SIC_HW_SUPPORT == 1) - #define SIC_CMD_READY 0 - #define SIC_CMD_PREWRITE 0x1 - #if (RTL8188E_SUPPORT == 1) - #define SIC_CMD_WRITE 0x40 - #define SIC_CMD_PREREAD 0x2 - #define SIC_CMD_READ 0x80 - #define SIC_CMD_INIT 0xf0 - #define SIC_INIT_VAL 0xff - - #define SIC_INIT_REG 0x1b7 - #define SIC_CMD_REG 0x1EB /* 1byte */ - #define SIC_ADDR_REG 0x1E8 /* 1b4~1b5, 2 bytes */ - #define SIC_DATA_REG 0x1EC /* 1b0~1b3 */ - #else - #define SIC_CMD_WRITE 0x11 - #define SIC_CMD_PREREAD 0x2 - #define SIC_CMD_READ 0x12 - #define SIC_CMD_INIT 0x1f - #define SIC_INIT_VAL 0xff - - #define SIC_INIT_REG 0x1b7 - #define SIC_CMD_REG 0x1b6 /* 1byte */ - #define SIC_ADDR_REG 0x1b4 /* 1b4~1b5, 2 bytes */ - #define SIC_DATA_REG 0x1b0 /* 1b0~1b3 */ - #endif -#else - #define SIC_CMD_READY 0 - #define SIC_CMD_WRITE 1 - #define SIC_CMD_READ 2 - - #if (RTL8188E_SUPPORT == 1) - #define SIC_CMD_REG 0x1EB /* 1byte */ - #define SIC_ADDR_REG 0x1E8 /* 1b9~1ba, 2 bytes */ - #define SIC_DATA_REG 0x1EC /* 1bc~1bf */ - #else - #define SIC_CMD_REG 0x1b8 /* 1byte */ - #define SIC_ADDR_REG 0x1b9 /* 1b9~1ba, 2 bytes */ - #define SIC_DATA_REG 0x1bc /* 1bc~1bf */ - #endif -#endif - -#if (SIC_ENABLE == 1) - VOID SIC_Init(IN PADAPTER Adapter); -#endif - - -#endif /* __INC_HAL8192CPHYCFG_H */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyReg.h deleted file mode 100644 index 2eab8313aa5d15..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPhyReg.h +++ /dev/null @@ -1,1100 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8188EPHYREG_H__ -#define __INC_HAL8188EPHYREG_H__ -/*--------------------------Define Parameters-------------------------------*/ -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other defintion for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* - * 2. Page2(0x200) - * - * The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 -#define rFPGA0_AdDaClockEn 0x888 /* enable ad/da clock1 for dual-phy */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ - -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rConfig_Pmpd_AntB 0xb98 -#define rAPK 0xbd8 - - - -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_csi_fix_mask1 0xd40 -#define rOFDM1_csi_fix_mask2 0xd44 -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ - -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER_88E 0x42 /* */ -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_WE_LUT 0xEF - - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - - - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -/*--------------------------Define Parameters-------------------------------*/ - - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPwrSeq.h deleted file mode 100644 index 46c61abacb9285..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188EPwrSeq.h +++ /dev/null @@ -1,170 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ - - -#ifndef __HAL8188EPWRSEQ_H__ -#define __HAL8188EPWRSEQ_H__ - -#include "HalPwrSeqCmd.h" - -/* - Check document WM-20110607-Paul-RTL8188E_Power_Architecture-R02.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transision from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END - - PWR SEQ Version: rtl8188E_PwrSeq_V09.h -*/ -#define RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS 10 -#define RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS 10 -#define RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS 10 -#define RTL8188E_TRANS_SUS_TO_CARDEMU_STEPS 10 -#define RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS 10 -#define RTL8188E_TRANS_PDN_TO_CARDEMU_STEPS 10 -#define RTL8188E_TRANS_ACT_TO_LPS_STEPS 15 -#define RTL8188E_TRANS_LPS_TO_ACT_STEPS 15 -#define RTL8188E_TRANS_END_STEPS 1 - - -#define RTL8188E_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 | BIT1, 0}, /* 0x02[1:0] = 0 reset BB*/ \ - {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0}, /* 0x04[15] = 0 disable HWPDN (control by DRV)*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, 0}, /*0x04[12:11] = 2b'00 disable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x04[8] = 1 polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0}, /*wait till 0x04[8] = 0*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*LDO normal mode*/ \ - -#define RTL8188E_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*LDO Sleep mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - -#define RTL8188E_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11enable WL suspend for PCIe*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, BIT7}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ - {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ - {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8188E_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8188E_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0026, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /*0x24[23] = 2b'01 schmit trigger */ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /* 0x04[31:30] = 2b'10 enable enable bandgap mbias in suspend */ \ - {0x0041, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*Clear SIC_EN register 0x40[12] = 1'b0 */ \ - {0xfe10, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*Set USB suspend enable local register 0xfe10[4]=1 */ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8188E_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8188E_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8188E_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - - /* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */ -#define RTL8188E_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x7F},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ - - -#define RTL8188E_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8188E_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, - - - extern WLAN_PWR_CFG rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS]; - -#endif /* __HAL8188EPWRSEQ_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyCfg.h deleted file mode 100644 index 1f03a33ec4510a..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyCfg.h +++ /dev/null @@ -1,134 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8188FPHYCFG_H__ -#define __INC_HAL8188FPHYCFG_H__ - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters End-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure End----------------------------*/ - -/*--------------------------Exported Function prototype---------------------*/ -u32 -PHY_QueryBBReg_8188F( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetBBReg_8188F( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -u32 -PHY_QueryRFReg_8188F( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetRFReg_8188F( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -/* MAC/BB/RF HAL config */ -int PHY_BBConfig8188F(PADAPTER Adapter); - -int PHY_RFConfig8188F(PADAPTER Adapter); - -s32 PHY_MACConfig8188F(PADAPTER padapter); - -int -PHY_ConfigRFWithParaFile_8188F( - IN PADAPTER Adapter, - IN u8 *pFileName, - enum rf_path eRFPath -); - -VOID -PHY_SetTxPowerIndex_8188F( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8188F( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -VOID -PHY_GetTxPowerLevel8188F( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID -PHY_SetTxPowerLevel8188F( - IN PADAPTER Adapter, - IN u8 channel -); - -VOID -PHY_SetSwChnlBWMode8188F( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -VOID phy_set_rf_path_switch_8188f( - IN struct dm_struct *phydm, - IN bool bMain -); - -void BBTurnOnBlock_8188F(_adapter *adapter); - -/*--------------------------Exported Function prototype End---------------------*/ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyReg.h deleted file mode 100644 index a831faade96d52..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPhyReg.h +++ /dev/null @@ -1,1165 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8188FPHYREG_H__ -#define __INC_HAL8188FPHYREG_H__ - -/*--------------------------Define Parameters-------------------------------*/ - -/* ************************************************************ - * Regsiter offset definition - * ************************************************************ */ - -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other defintion for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* - * 2. Page2(0x200) - * - * The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c - -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ - -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -#define rS0S1_PathSwitch 0x948 - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c - * - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rConfig_Pmpd_AntB 0xb98 -#define rAPK 0xbd8 - -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_MODE_AG 0x18 /* */ -#define rRfChannel 0x18 /* RF channel and BW switch */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ - -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_RXG_MIX_SWBW 0x87 -#define RF_DBG_LP_RX2 0xDF -#define RF_WE_LUT 0xEF -#define RF_S0S1 0xB0 - -#define RF_TX_GAIN_OFFSET_8188F(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -/*--------------------------Define Parameters-------------------------------*/ - - -/* BB Register Definition - * - * 4. Page9(0x900) - * */ -#define rDPDT_control 0x92c -#define rfe_ctrl_anta_src 0x930 -#define rS0S1_PathSwitch 0x948 -#define BBrx_DFIR 0x954 -#define AGC_table_select 0xb2c - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPwrSeq.h deleted file mode 100644 index 5cad428fdd0b0a..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8188FPwrSeq.h +++ /dev/null @@ -1,212 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef REALTEK_POWER_SEQUENCE_8188F -#define REALTEK_POWER_SEQUENCE_8188F - -#include "HalPwrSeqCmd.h" - -/* - Check document WM-20130815-JackieLau-RTL8188F_Power_Architecture v08.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transision from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#define RTL8188F_TRANS_CARDEMU_TO_ACT_STEPS 13 -#define RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS 15 -#define RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS 14 -#define RTL8188F_TRANS_SUS_TO_CARDEMU_STEPS 15 -#define RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS 15 -#define RTL8188F_TRANS_PDN_TO_CARDEMU_STEPS 15 -#define RTL8188F_TRANS_ACT_TO_LPS_STEPS 11 -#define RTL8188F_TRANS_LPS_TO_ACT_STEPS 13 -#define RTL8188F_TRANS_ACT_TO_SWLPS_STEPS 21 -#define RTL8188F_TRANS_SWLPS_TO_ACT_STEPS 14 -#define RTL8188F_TRANS_END_STEPS 1 - - -#define RTL8188F_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT3), 0},/* 0x4[11]=1'b0 disable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* 0x4[8]=1 polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ - {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x35}, /*0x27<=35 to reduce RF noise*/ - -#define RTL8188F_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ - {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ - {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x34}, /*0x27 <= 34, xtal_qsel = 0 to xtal bring up*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - -#define RTL8188F_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00}, /*0x07 = 0x00 , SOP option to disable BG/MB*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ \ - {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ - -#define RTL8188F_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ - {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ - -#define RTL8188F_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00}, /*0x07 = 0x00 , SOP option to disable BG/MB*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ \ - {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ - -#define RTL8188F_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ \ - {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/* 0xC4[4] <= 1, turn off USB APHY LDO under suspend mode*/ - - -#define RTL8188F_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8188F_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - -#define RTL8188F_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*set RPWM IMR*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ - - -#define RTL8188F_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x35},/*xtal_qsel = 1 for low noise*/ \ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x002B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x1c, 0x1c}, /*. 0x2b[4:2] = 3b'111 to enable BB, AFE clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - - -#define RTL8188F_TRANS_ACT_TO_SWLPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*set RPWM IMR*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ - {0x002b, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0x1C, 0x00},/*0x2b[4:2]<=0 to gated BB, AFE clock*/ \ - {0x0027, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x34},/*xtal_qsel = 0 for bring up*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x00},/* sdio LPS option*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0x83},/* usb LPS option, open bandgap, xtal*/ \ - {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /* 0xC4[5]<=0, digital LDO no standby mode*/ \ - {0x00C4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7}, /* 0xC4[7]<=1, on domain voltage adjust*/ \ - {0x00a7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0xe0}, /* low power LPS enable for sdio*/ \ - {0x00a7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xff, 0xe4}, /* low power LPS enable for usb*/ \ - {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /* enable WL_LPS_EN*/ - - -#define RTL8188F_TRANS_SWLPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ - {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ - {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ - {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ - {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ - {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8188F_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, - - - extern WLAN_PWR_CFG rtl8188F_power_on_flow[RTL8188F_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_radio_off_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_card_disable_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_card_enable_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_suspend_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_resume_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_hwpdn_flow[RTL8188F_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188F_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_enter_lps_flow[RTL8188F_TRANS_ACT_TO_LPS_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_leave_lps_flow[RTL8188F_TRANS_LPS_TO_ACT_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_enter_swlps_flow[RTL8188F_TRANS_ACT_TO_SWLPS_STEPS + RTL8188F_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8188F_leave_swlps_flow[RTL8188F_TRANS_SWLPS_TO_ACT_STEPS + RTL8188F_TRANS_END_STEPS]; -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyCfg.h deleted file mode 100644 index d6394c6ff03639..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyCfg.h +++ /dev/null @@ -1,148 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8192EPHYCFG_H__ -#define __INC_HAL8192EPHYCFG_H__ - - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters-------------------------------*/ - -/*------------------------------Define structure----------------------------*/ - -/* BB/RF related */ - -/*------------------------------Define structure----------------------------*/ - - -/*------------------------Export global variable----------------------------*/ -/*------------------------Export global variable----------------------------*/ - - -/*------------------------Export Marco Definition---------------------------*/ -/*------------------------Export Marco Definition---------------------------*/ - - -/*--------------------------Exported Function prototype---------------------*/ -/* - * BB and RF register read/write - * */ -u32 PHY_QueryBBReg8192E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetBBReg8192E(IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); -u32 PHY_QueryRFReg8192E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask); -void PHY_SetRFReg8192E(IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data); - -/* - * Initialization related function - * - * MAC/BB/RF HAL config */ -int PHY_MACConfig8192E(IN PADAPTER Adapter); -int PHY_BBConfig8192E(IN PADAPTER Adapter); -int PHY_RFConfig8192E(IN PADAPTER Adapter); - -/* RF config */ - - -/* - * BB TX Power R/W - * */ -void PHY_GetTxPowerLevel8192E(IN PADAPTER Adapter, OUT s32 *powerlevel); -void PHY_SetTxPowerLevel8192E(IN PADAPTER Adapter, IN u8 channel); -BOOLEAN PHY_UpdateTxPowerDbm8192E(IN PADAPTER Adapter, IN int powerInDbm); - -VOID -PHY_SetTxPowerIndex_8192E( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8192E( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -/* - * channel switch related funciton - * */ -VOID -PHY_SetSwChnlBWMode8192E( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -VOID -PHY_SetRFEReg_8192E( - IN PADAPTER Adapter -); - -void -phy_SpurCalibration_8192E( - IN PADAPTER Adapter, - IN enum spur_cal_method method -); -void PHY_SpurCalibration_8192E(IN PADAPTER Adapter); - -#ifdef CONFIG_SPUR_CAL_NBI -void -phy_SpurCalibration_8192E_NBI( - IN PADAPTER Adapter -); -#endif -/* - * BB/MAC/RF other monitor API - * */ - -VOID -phy_set_rf_path_switch_8192e( - IN struct dm_struct *phydm, - IN bool bMain -); - -/*--------------------------Exported Function prototype---------------------*/ -#endif /* __INC_HAL8192CPHYCFG_H */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyReg.h deleted file mode 100644 index 30b7711111649b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPhyReg.h +++ /dev/null @@ -1,1146 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -/***************************************************************************** - * Copyright(c) 2008, RealTEK Technology Inc. All Right Reserved. - * - * Module: __INC_HAL8192SPHYREG_H - * - * - * Note: 1. Define PMAC/BB register map - * 2. Define RF register map - * 3. PMAC/BB register bit mask. - * 4. RF reg bit mask. - * 5. Other BB/RF relative definition. - * - * - * Export: Constants, macro, functions(API), global variables(None). - * - * Abbrev: - * - * History: - * Data Who Remark - * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. - * 2. Reorganize code architecture. - * 09/25/2008 MH 1. Add RL6052 register definition - * - *****************************************************************************/ -#ifndef __INC_HAL8192EPHYREG_H -#define __INC_HAL8192EPHYREG_H - - -/*--------------------------Define Parameters-------------------------------*/ - -/* ************************************************************ - * 8192S Regsiter offset definition - * ************************************************************ */ - -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other defintion for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 -#define rFPGA0_AdDaClockEn 0x888 /* enable ad/da clock1 for dual-phy */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ - -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rConfig_Pmpd_AntB 0xb98 -#define rAPK 0xbd8 - - - -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ - -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER_8192E 0x42 /* */ -#define RF_T_METER_88E 0x42 -#define RF_T_METER 0x24 /* */ - -/* #endif */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_LDO 0xB1 -#define RF_WE_LUT 0xEF - - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -#define RF_TX_GAIN_OFFSET_8192E(_val) ((abs((_val)) << 1) | (((_val) > 0) ? BIT0 : 0)) - - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - -/* for PutRFRegsetting & GetRFRegSetting BitMask - * #define bMask12Bits 0xfffff */ /* RF Reg mask bits - * #define bMask20Bits 0xfffff */ /* RF Reg mask bits T65 RF */ -#define bRFRegOffsetMask 0xfffff - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - - -/* RSSI Dump Message */ -#define rA_RSSIDump_92E 0xcb0 -#define rB_RSSIDump_92E 0xcb1 -#define rS1_RXevmDump_92E 0xcb2 -#define rS2_RXevmDump_92E 0xcb3 -#define rA_RXsnrDump_92E 0xcb4 -#define rB_RXsnrDump_92E 0xcb5 -#define rA_CfoShortDump_92E 0xcb6 -#define rB_CfoShortDump_92E 0xcb8 -#define rA_CfoLongDump_92E 0xcba -#define rB_CfoLongDump_92E 0xcbc - -/*--------------------------Define Parameters-------------------------------*/ - - -#endif /* __INC_HAL8188EPHYREG_H */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPwrSeq.h deleted file mode 100644 index 1f2ba8722572df..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192EPwrSeq.h +++ /dev/null @@ -1,169 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef REALTEK_POWER_SEQUENCE_8192E -#define REALTEK_POWER_SEQUENCE_8192E - -#include "HalPwrSeqCmd.h" -/* - Check document WM-20110607-Paul-RTL8192E_Power_Architecture-R02.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transision from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#define RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS 18 -#define RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS 18 -#define RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS 18 -#define RTL8192E_TRANS_SUS_TO_CARDEMU_STEPS 18 -#define RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS 18 -#define RTL8192E_TRANS_PDN_TO_CARDEMU_STEPS 18 -#define RTL8192E_TRANS_ACT_TO_LPS_STEPS 23 -#define RTL8192E_TRANS_LPS_TO_ACT_STEPS 23 -#define RTL8192E_TRANS_END_STEPS 1 - - -#define RTL8192E_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ - - -#define RTL8192E_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ - {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - - -#define RTL8192E_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8192E_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8192E_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ - {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*Unlock small LDO Register*/ \ - {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*Disable small LDO*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8192E_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0011, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*Enable small LDO*/ \ - {0x00CC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*Lock small LDO Register*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ - - -#define RTL8192E_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8192E_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - -#define RTL8192E_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ - - -#define RTL8192E_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM, For Repeatly In and out, Taggle bit should be changed*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/\ - {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*Clear ISR*/ - -#define RTL8192E_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, - - - extern WLAN_PWR_CFG rtl8192E_power_on_flow[RTL8192E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_radio_off_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_card_disable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_card_enable_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_suspend_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_resume_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_hwpdn_flow[RTL8192E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8192E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_enter_lps_flow[RTL8192E_TRANS_ACT_TO_LPS_STEPS + RTL8192E_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8192E_leave_lps_flow[RTL8192E_TRANS_LPS_TO_ACT_STEPS + RTL8192E_TRANS_END_STEPS]; - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyCfg.h deleted file mode 100644 index a143e01add845a..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyCfg.h +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8192FPHYCFG_H__ -#define __INC_HAL8192FPHYCFG_H__ - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters End-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure End----------------------------*/ - -/*--------------------------Exported Function prototype---------------------*/ -u32 -PHY_QueryBBReg_8192F( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetBBReg_8192F( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -u32 -PHY_QueryRFReg_8192F( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetRFReg_8192F( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -/* MAC/BB/RF HAL config */ -int PHY_BBConfig8192F(PADAPTER Adapter ); - -int PHY_RFConfig8192F(PADAPTER Adapter); - -s32 PHY_MACConfig8192F(PADAPTER padapter); - -int -PHY_ConfigRFWithParaFile_8192F( - IN PADAPTER Adapter, - IN u8 *pFileName, - enum rf_path eRFPath -); - -VOID -PHY_SetTxPowerIndex_8192F( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8192F( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -VOID -PHY_GetTxPowerLevel8192F( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID -PHY_SetTxPowerLevel8192F( - IN PADAPTER Adapter, - IN u8 channel -); - -VOID -PHY_SetSwChnlBWMode8192F( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -VOID phy_set_rf_path_switch_8192f( - IN PADAPTER pAdapter, - IN bool bMain -); -/*--------------------------Exported Function prototype End---------------------*/ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyReg.h deleted file mode 100644 index b82f7f98696dee..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPhyReg.h +++ /dev/null @@ -1,1134 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8192FPHYREG_H__ -#define __INC_HAL8192FPHYREG_H__ - -#define rSYM_WLBT_PAPE_SEL 0x64 -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other definition for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* - * 2. Page2(0x200) - * - * The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c - -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ -#define rDPDT_control 0x92c -#define rfe_ctrl_anta_src 0x930 -#define rS0S1_PathSwitch 0x948 -#define rBBrx_DFIR 0x954 - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_MODE_AG 0x18 /* */ -#define rRfChannel 0x18 /* RF channel and BW switch */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ - -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_T_METER_88E 0x42 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_WE_LUT 0xEF -#define RF_S0S1 0xB0 - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -#define RF_TX_GAIN_OFFSET_8192F(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms // Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPwrSeq.h deleted file mode 100644 index ff565fdde46d45..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8192FPwrSeq.h +++ /dev/null @@ -1,220 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef REALTEK_POWER_SEQUENCE_8192F -#define REALTEK_POWER_SEQUENCE_8192F -#define POWER_SEQUENCE_8192F_VER 04 -/* #include "PwrSeqCmd.h" */ -#include "HalPwrSeqCmd.h" - -/* - Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transition from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#define RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS 38 -#define RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS 8 -#define RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS 7 -#define RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS 5 -#define RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS 8 -#define RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS 8 -#define RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS 4 -#define RTL8192F_TRANS_PDN_TO_CARDEMU_STEPS 1 -#define RTL8192F_TRANS_ACT_TO_LPS_STEPS 13 -#define RTL8192F_TRANS_LPS_TO_ACT_STEPS 11 -#define RTL8192F_TRANS_END_STEPS 1 - - -#define RTL8192F_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ - {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ - {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3|BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, (BIT1|BIT0), 0}, \ - {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2},/* SWR OCP enable 0x10[18]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT4|BIT3), 0},/* disable WL suspend*/ \ - {0x007f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x7c[31]=1,LDO has max output capability*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ \ - {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ - {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 data mode*/\ - {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ - {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ - {0x0068, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3, 0},/*RF HW ON/OFF Enable*/\ - {0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/*Register Lock Disable*/\ - {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ - {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S1*/\ - {0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S0*/\ - {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enable RF path S1*/\ - {0x007B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x07},/*enalbe RF path S0*/\ - {0x0097, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*AFE_Ctrl*/\ - {0x00DC, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xCC},/*AFE_Ctrl*/\ - {0x0024, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0x18, 0x00},/*AFE_Ctrl 0x24[4:3]=00 for xtal gmn*/\ - {0x1050, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[7:0] Pull down software register*/\ - {0x1051, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[15:8] Pull down software register*/\ - {0x1052, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[23:16] Pull down software register*/\ - {0x1053, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_A[31:24] Pull down software register*/\ - {0x105B, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*GPIO_B[7:0] Pull down software register*/\ - {0x001C, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/*Register Lock Enable*/\ - {0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT7|BIT6), 0x3},/*set HCI Power sequence state delay time:0*/ - - -#define RTL8192F_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x2[0]=0 Reset BB,RF enter Power Down mode*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0}, /*0x10[18] = 0 to disable ocp*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ - - -#define RTL8192F_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 USB|SDIO SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8192F_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - - -#define RTL8192F_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07=0x20 , SOP option to disable BG/MB*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend*/ \ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8192F_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ - {0x0012, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x10[18] = 1 to enable ocp*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ - - -#define RTL8192F_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8192F_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - -#define RTL8192F_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ - - -#define RTL8192F_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8192F_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // - - -extern WLAN_PWR_CFG rtl8192F_power_on_flow[RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_radio_off_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_card_disable_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_CARDDIS_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_card_enable_flow[RTL8192F_TRANS_CARDDIS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_suspend_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_SUS_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_resume_flow[RTL8192F_TRANS_SUS_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_hwpdn_flow[RTL8192F_TRANS_ACT_TO_CARDEMU_STEPS+RTL8192F_TRANS_CARDEMU_TO_PDN_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_enter_lps_flow[RTL8192F_TRANS_ACT_TO_LPS_STEPS+RTL8192F_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8192F_leave_lps_flow[RTL8192F_TRANS_LPS_TO_ACT_STEPS+RTL8192F_TRANS_END_STEPS]; - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyCfg.h deleted file mode 100644 index f5b995c536cfb5..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyCfg.h +++ /dev/null @@ -1,132 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8703BPHYCFG_H__ -#define __INC_HAL8703BPHYCFG_H__ - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters End-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure End----------------------------*/ - -/*--------------------------Exported Function prototype---------------------*/ -u32 -PHY_QueryBBReg_8703B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetBBReg_8703B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -u32 -PHY_QueryRFReg_8703B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetRFReg_8703B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -/* MAC/BB/RF HAL config */ -int PHY_BBConfig8703B(PADAPTER Adapter); - -int PHY_RFConfig8703B(PADAPTER Adapter); - -s32 PHY_MACConfig8703B(PADAPTER padapter); - -int -PHY_ConfigRFWithParaFile_8703B( - IN PADAPTER Adapter, - IN u8 *pFileName, - enum rf_path eRFPath -); - -VOID -PHY_SetTxPowerIndex_8703B( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8703B( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -VOID -PHY_GetTxPowerLevel8703B( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID -PHY_SetTxPowerLevel8703B( - IN PADAPTER Adapter, - IN u8 channel -); - -VOID -PHY_SetSwChnlBWMode8703B( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -VOID phy_set_rf_path_switch_8703b( - IN struct dm_struct *phydm, - IN bool bMain -); - -/*--------------------------Exported Function prototype End---------------------*/ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyReg.h deleted file mode 100644 index 881a13cfac8760..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPhyReg.h +++ /dev/null @@ -1,1133 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8703BPHYREG_H__ -#define __INC_HAL8703BPHYREG_H__ - -#define rSYM_WLBT_PAPE_SEL 0x64 -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other defintion for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* - * 2. Page2(0x200) - * - * The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c - -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -#define rDPDT_control 0x92c -#define rfe_ctrl_anta_src 0x930 -#define rS0S1_PathSwitch 0x948 -#define rBBrx_DFIR 0x954 - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_MODE_AG 0x18 /* */ -#define rRfChannel 0x18 /* RF channel and BW switch */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ - -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_WE_LUT 0xEF -#define RF_S0S1 0xB0 - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -#define RF_TX_GAIN_OFFSET_8703B(_val) (abs((_val)) | (((_val) > 0) ? BIT5 : 0)) - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPwrSeq.h deleted file mode 100644 index 0dac13ee34a965..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8703BPwrSeq.h +++ /dev/null @@ -1,198 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef REALTEK_POWER_SEQUENCE_8703B -#define REALTEK_POWER_SEQUENCE_8703B - -#include "HalPwrSeqCmd.h" - -/* - Check document WM-20140402-JackieLau-RTL8703B_Power_Architecture v09.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transision from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#define RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS 23 -#define RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS 15 -#define RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS 15 -#define RTL8703B_TRANS_SUS_TO_CARDEMU_STEPS 15 -#define RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS 15 -#define RTL8703B_TRANS_PDN_TO_CARDEMU_STEPS 15 -#define RTL8703B_TRANS_ACT_TO_LPS_STEPS 15 -#define RTL8703B_TRANS_LPS_TO_ACT_STEPS 15 -#define RTL8703B_TRANS_END_STEPS 1 - - -#define RTL8703B_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ - {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ - {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3 | BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ - {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 , BIT3},/* enabled usb resume */ \ - {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 , 0},/* disable usb resume */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ - {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ - {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ - {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ - {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ - {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ - {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ - {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ - - -#define RTL8703B_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ - - -#define RTL8703B_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8703B_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8703B_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8703B_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ - - -#define RTL8703B_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8703B_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - -#define RTL8703B_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ - - -#define RTL8703B_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8703B_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, - - - extern WLAN_PWR_CFG rtl8703B_power_on_flow[RTL8703B_TRANS_CARDEMU_TO_ACT_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_radio_off_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_card_disable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_card_enable_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_suspend_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_resume_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_hwpdn_flow[RTL8703B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8703B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_enter_lps_flow[RTL8703B_TRANS_ACT_TO_LPS_STEPS + RTL8703B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8703B_leave_lps_flow[RTL8703B_TRANS_LPS_TO_ACT_STEPS + RTL8703B_TRANS_END_STEPS]; - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyCfg.h deleted file mode 100644 index 4d72f7a07b7cb8..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyCfg.h +++ /dev/null @@ -1,127 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8710BPHYCFG_H__ -#define __INC_HAL8710BPHYCFG_H__ - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters End-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure End----------------------------*/ - -/*--------------------------Exported Function prototype---------------------*/ -u32 -PHY_QueryBBReg_8710B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetBBReg_8710B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -u32 -PHY_QueryRFReg_8710B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetRFReg_8710B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -/* MAC/BB/RF HAL config */ -int PHY_BBConfig8710B(PADAPTER Adapter); - -int PHY_RFConfig8710B(PADAPTER Adapter); - -s32 PHY_MACConfig8710B(PADAPTER padapter); - -int -PHY_ConfigRFWithParaFile_8710B( - IN PADAPTER Adapter, - IN u8 *pFileName, - enum rf_path eRFPath -); - -VOID -PHY_SetTxPowerIndex_8710B( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8710B( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -VOID -PHY_GetTxPowerLevel8710B( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID -PHY_SetTxPowerLevel8710B( - IN PADAPTER Adapter, - IN u8 channel -); - -VOID -PHY_SetSwChnlBWMode8710B( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -/*--------------------------Exported Function prototype End---------------------*/ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyReg.h deleted file mode 100644 index 337e03207fed0b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPhyReg.h +++ /dev/null @@ -1,1134 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8710BPHYREG_H__ -#define __INC_HAL8710BPHYREG_H__ - -#define rSYM_WLBT_PAPE_SEL 0x64 -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other definition for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* - * 2. Page2(0x200) - * - * The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c - -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ -#define rDPDT_control 0x92c -#define rfe_ctrl_anta_src 0x930 -#define rS0S1_PathSwitch 0x948 -#define rBBrx_DFIR 0x954 - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_MODE_AG 0x18 /* */ -#define rRfChannel 0x18 /* RF channel and BW switch */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ - -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_T_METER_88E 0x42 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_WE_LUT 0xEF -#define RF_S0S1 0xB0 - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -#define RF_TX_GAIN_OFFSET_8710B(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms // Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPwrSeq.h deleted file mode 100644 index 4c71b77b6ddbee..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8710BPwrSeq.h +++ /dev/null @@ -1,167 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef REALTEK_POWER_SEQUENCE_8710B -#define REALTEK_POWER_SEQUENCE_8710B - -/* #include "PwrSeqCmd.h" */ -#include "HalPwrSeqCmd.h" - -/* - Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transition from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#define RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS 5 -#define RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS 4 -#define RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS 7 -#define RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS 15 -#define RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS 15 -#define RTL8710B_TRANS_PDN_TO_CARDEMU_STEPS 15 -#define RTL8710B_TRANS_ACT_TO_LPS_STEPS 15 -#define RTL8710B_TRANS_LPS_TO_ACT_STEPS 15 -#define RTL8710B_TRANS_ACT_TO_SWLPS_STEPS 22 -#define RTL8710B_TRANS_SWLPS_TO_ACT_STEPS 15 -#define RTL8710B_TRANS_END_STEPS 1 - - -#define RTL8710B_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x005D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*AFE power mode selection:1: LDO mode ,0: Power-cut mode*/\ - {0x0004, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\ - {0x0056, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x0E},\ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 1},\ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT0, 0},/**/ - - -#define RTL8710B_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1|BIT2), 0},/*0x04[24:26] = 0 turn off RF*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, (BIT0|BIT1), 0},/*0x04[16:17] = 0 BB reset*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*0x20[1] = 1 turn off MAC by HW state machine*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x20[1] = 0 polling until return 0 to disable*/ \ - - -#define RTL8710B_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4|BIT3, (BIT4|BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK|PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, BIT3|BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8710B_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT3|BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - - -#define RTL8710B_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - -#define RTL8710B_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - - -#define RTL8710B_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK|PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8710B_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - -#define RTL8710B_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled,and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ - - -#define RTL8710B_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK,PWR_BASEADDR_SDIO,PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT6|BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,PWR_BASEADDR_MAC,PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8710B_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK,0,PWR_CMD_END, 0, 0}, // - - -extern WLAN_PWR_CFG rtl8710B_power_on_flow[RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_radio_off_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_card_disable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_card_enable_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_suspend_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_SUS_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_resume_flow[RTL8710B_TRANS_SUS_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_hwpdn_flow[RTL8710B_TRANS_ACT_TO_CARDEMU_STEPS+RTL8710B_TRANS_CARDEMU_TO_PDN_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_enter_lps_flow[RTL8710B_TRANS_ACT_TO_LPS_STEPS+RTL8710B_TRANS_END_STEPS]; -extern WLAN_PWR_CFG rtl8710B_leave_lps_flow[RTL8710B_TRANS_LPS_TO_ACT_STEPS+RTL8710B_TRANS_END_STEPS]; - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyCfg.h deleted file mode 100644 index 18c0a7895b1801..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyCfg.h +++ /dev/null @@ -1,132 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8723BPHYCFG_H__ -#define __INC_HAL8723BPHYCFG_H__ - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters End-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure End----------------------------*/ - -/*--------------------------Exported Function prototype---------------------*/ -u32 -PHY_QueryBBReg_8723B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetBBReg_8723B( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -u32 -PHY_QueryRFReg_8723B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetRFReg_8723B( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -/* MAC/BB/RF HAL config */ -int PHY_BBConfig8723B(PADAPTER Adapter); - -int PHY_RFConfig8723B(PADAPTER Adapter); - -s32 PHY_MACConfig8723B(PADAPTER padapter); - -int -PHY_ConfigRFWithParaFile_8723B( - IN PADAPTER Adapter, - IN u8 *pFileName, - enum rf_path eRFPath -); - -VOID -PHY_SetTxPowerIndex_8723B( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8723B( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -VOID -PHY_GetTxPowerLevel8723B( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID -PHY_SetTxPowerLevel8723B( - IN PADAPTER Adapter, - IN u8 channel -); - -VOID -PHY_SetSwChnlBWMode8723B( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -VOID phy_set_rf_path_switch_8723b( - IN struct dm_struct *phydm, - IN bool bMain -); - -/*--------------------------Exported Function prototype End---------------------*/ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyReg.h deleted file mode 100644 index ce485c2ab4be2b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPhyReg.h +++ /dev/null @@ -1,1131 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8723BPHYREG_H__ -#define __INC_HAL8723BPHYREG_H__ - -#define rSYM_WLBT_PAPE_SEL 0x64 -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other defintion for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* - * 2. Page2(0x200) - * - * The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC */ /* RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c - -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now */ /* RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC */ /* RF BW Setting?? */ -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now */ /* Status report?? */ -#define rDPDT_control 0x92c -#define rfe_ctrl_anta_src 0x930 -#define rS0S1_PathSwitch 0x948 - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now */ /* Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now */ /* Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level */ /* Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imblance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD */ /* DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_MODE_AG 0x18 /* */ -#define rRfChannel 0x18 /* RF channel and BW switch */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ - -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_WE_LUT 0xEF -#define RF_S0S1 0xB0 - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms */ /* Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPwrSeq.h deleted file mode 100644 index 1aec885cbb1d82..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723BPwrSeq.h +++ /dev/null @@ -1,246 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef REALTEK_POWER_SEQUENCE_8723B -#define REALTEK_POWER_SEQUENCE_8723B - -#include "HalPwrSeqCmd.h" - -/* - Check document WM-20130815-JackieLau-RTL8723B_Power_Architecture v08.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transision from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#define RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS 26 -#define RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS 15 -#define RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS 15 -#define RTL8723B_TRANS_SUS_TO_CARDEMU_STEPS 15 -#define RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS 15 -#define RTL8723B_TRANS_PDN_TO_CARDEMU_STEPS 15 -#define RTL8723B_TRANS_ACT_TO_LPS_STEPS 15 -#define RTL8723B_TRANS_LPS_TO_ACT_STEPS 15 -#define RTL8723B_TRANS_ACT_TO_SWLPS_STEPS 22 -#define RTL8723B_TRANS_SWLPS_TO_ACT_STEPS 15 -#define RTL8723B_TRANS_END_STEPS 1 - - -#define RTL8723B_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ - {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ - {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3 | BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , BIT0},/* Disable USB suspend */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0 , 0},/* Enable USB suspend */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ - {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/* Enable WL control XTAL setting*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable falling edge triggering interrupt*/\ - {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\ - {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\ - {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Enable HSISR GPIO[C:0] interrupt*/\ - {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\ - {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high setting by test chip*/\ - {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high setting*/\ - - -#define RTL8723B_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable rising edge triggering interrupt*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, 0},/* Enable BT control XTAL setting*/\ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ - - -#define RTL8723B_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8723B_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8723B_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8723B_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ - - -#define RTL8723B_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8723B_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - -#define RTL8723B_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ - - -#define RTL8723B_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - - -#define RTL8723B_TRANS_ACT_TO_SWLPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0194, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable 32 K source*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*CCK and OFDM are enable*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x3F},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*disable security engine*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x40},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*reset dual TSF*/ \ - {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/*Reset CPU*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*Reset MCUFWDL register*/ \ - {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ - {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1},/*Reset CPU IO Wrapper*/ \ - {0x0287, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*polling RXFF packet number = 0 */ \ - {0x0286, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/*polling RXDMA idle */ \ - {0x013D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Clear FW RPWM interrupt */\ - {0x0139, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW RPWM interrupt source*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4},/*switch TSF to 32K*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/*polling TSF stable*/\ - {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Set FW LPS*/ \ - {0x0090, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/*polling FW LPS ready */ - - -#define RTL8723B_TRANS_SWLPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0},/*switch TSF to 32K*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*polling TSF stable*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1, enable security engine*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x06B7, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x09}, /*. reset MAC rx state machine*/\ - {0x06B4, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x86}, /*. reset MAC rx state machine*/\ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/* set CPU RAM code ready*/ \ - {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*Reset CPU IO Wrapper*/ \ - {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* Enable CPU*/ \ - {0x001D, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*enable CPU IO Wrapper*/ \ - {0x0003, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2},/* Enable CPU*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, BIT7},/*polling FW init ready */ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT6, BIT6},/*polling FW init ready */ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8723B_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, - - - extern WLAN_PWR_CFG rtl8723B_power_on_flow[RTL8723B_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_radio_off_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_card_disable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_card_enable_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_suspend_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_resume_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_hwpdn_flow[RTL8723B_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723B_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_enter_lps_flow[RTL8723B_TRANS_ACT_TO_LPS_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_leave_lps_flow[RTL8723B_TRANS_LPS_TO_ACT_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_enter_swlps_flow[RTL8723B_TRANS_ACT_TO_SWLPS_STEPS + RTL8723B_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723B_leave_swlps_flow[RTL8723B_TRANS_SWLPS_TO_ACT_STEPS + RTL8723B_TRANS_END_STEPS]; -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyCfg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyCfg.h deleted file mode 100644 index 8dd4819f61db65..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyCfg.h +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8723DPHYCFG_H__ -#define __INC_HAL8723DPHYCFG_H__ - -/*--------------------------Define Parameters-------------------------------*/ -#define LOOP_LIMIT 5 -#define MAX_STALL_TIME 50 /* us */ -#define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ -#define MAX_TXPWR_IDX_NMODE_92S 63 -#define Reset_Cnt_Limit 3 - -#ifdef CONFIG_PCI_HCI - #define MAX_AGGR_NUM 0x0B -#else - #define MAX_AGGR_NUM 0x07 -#endif /* CONFIG_PCI_HCI */ - - -/*--------------------------Define Parameters End-------------------------------*/ - - -/*------------------------------Define structure----------------------------*/ - -/*------------------------------Define structure End----------------------------*/ - -/*--------------------------Exported Function prototype---------------------*/ -u32 -PHY_QueryBBReg_8723D( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetBBReg_8723D( - IN PADAPTER Adapter, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -u32 -PHY_QueryRFReg_8723D( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask -); - -VOID -PHY_SetRFReg_8723D( - IN PADAPTER Adapter, - IN enum rf_path eRFPath, - IN u32 RegAddr, - IN u32 BitMask, - IN u32 Data -); - -/* MAC/BB/RF HAL config */ -int PHY_BBConfig8723D(PADAPTER Adapter); - -int PHY_RFConfig8723D(PADAPTER Adapter); - -s32 PHY_MACConfig8723D(PADAPTER padapter); - -int -PHY_ConfigRFWithParaFile_8723D( - IN PADAPTER Adapter, - IN u8 *pFileName, - enum rf_path eRFPath -); - -VOID -PHY_SetTxPowerIndex_8723D( - IN PADAPTER Adapter, - IN u32 PowerIndex, - IN enum rf_path RFPath, - IN u8 Rate -); - -u8 -PHY_GetTxPowerIndex_8723D( - IN PADAPTER pAdapter, - IN enum rf_path RFPath, - IN u8 Rate, - IN u8 BandWidth, - IN u8 Channel, - struct txpwr_idx_comp *tic -); - -VOID -PHY_GetTxPowerLevel8723D( - IN PADAPTER Adapter, - OUT s32 *powerlevel -); - -VOID -PHY_SetTxPowerLevel8723D( - IN PADAPTER Adapter, - IN u8 channel -); - -VOID -PHY_SetSwChnlBWMode8723D( - IN PADAPTER Adapter, - IN u8 channel, - IN enum channel_width Bandwidth, - IN u8 Offset40, - IN u8 Offset80 -); - -VOID phy_set_rf_path_switch_8723d( - IN struct dm_struct *phydm, - IN bool bMain -); -/*--------------------------Exported Function prototype End---------------------*/ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyReg.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyReg.h deleted file mode 100644 index 036144a388bb6c..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPhyReg.h +++ /dev/null @@ -1,1134 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __INC_HAL8723DPHYREG_H__ -#define __INC_HAL8723DPHYREG_H__ - -#define rSYM_WLBT_PAPE_SEL 0x64 -/* - * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 - * 3. RF register 0x00-2E - * 4. Bit Mask for BB/RF register - * 5. Other definition for BB/RF R/W - * */ - - -/* - * 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF - * 1. Page1(0x100) - * */ -#define rPMAC_Reset 0x100 -#define rPMAC_TxStart 0x104 -#define rPMAC_TxLegacySIG 0x108 -#define rPMAC_TxHTSIG1 0x10c -#define rPMAC_TxHTSIG2 0x110 -#define rPMAC_PHYDebug 0x114 -#define rPMAC_TxPacketNum 0x118 -#define rPMAC_TxIdle 0x11c -#define rPMAC_TxMACHeader0 0x120 -#define rPMAC_TxMACHeader1 0x124 -#define rPMAC_TxMACHeader2 0x128 -#define rPMAC_TxMACHeader3 0x12c -#define rPMAC_TxMACHeader4 0x130 -#define rPMAC_TxMACHeader5 0x134 -#define rPMAC_TxDataType 0x138 -#define rPMAC_TxRandomSeed 0x13c -#define rPMAC_CCKPLCPPreamble 0x140 -#define rPMAC_CCKPLCPHeader 0x144 -#define rPMAC_CCKCRC16 0x148 -#define rPMAC_OFDMRxCRC32OK 0x170 -#define rPMAC_OFDMRxCRC32Er 0x174 -#define rPMAC_OFDMRxParityEr 0x178 -#define rPMAC_OFDMRxCRC8Er 0x17c -#define rPMAC_CCKCRxRC16Er 0x180 -#define rPMAC_CCKCRxRC32Er 0x184 -#define rPMAC_CCKCRxRC32OK 0x188 -#define rPMAC_TxStatus 0x18c - -/* - * 2. Page2(0x200) - * - * The following two definition are only used for USB interface. */ -#define RF_BB_CMD_ADDR 0x02c0 /* RF/BB read/write command address. */ -#define RF_BB_CMD_DATA 0x02c4 /* RF/BB read/write command data. */ - -/* - * 3. Page8(0x800) - * */ -#define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC // RF BW Setting?? */ - -#define rFPGA0_TxInfo 0x804 /* Status report?? */ -#define rFPGA0_PSDFunction 0x808 - -#define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */ - -#define rFPGA0_RFTiming1 0x810 /* Useless now */ -#define rFPGA0_RFTiming2 0x814 - -#define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */ -#define rFPGA0_XA_HSSIParameter2 0x824 -#define rFPGA0_XB_HSSIParameter1 0x828 -#define rFPGA0_XB_HSSIParameter2 0x82c -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rTxAGC_B_Mcs03_Mcs00 0x83c - -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84c - -#define rFPGA0_XA_LSSIParameter 0x840 -#define rFPGA0_XB_LSSIParameter 0x844 - -#define rFPGA0_RFWakeUpParameter 0x850 /* Useless now */ -#define rFPGA0_RFSleepUpParameter 0x854 - -#define rFPGA0_XAB_SwitchControl 0x858 /* RF Channel switch */ -#define rFPGA0_XCD_SwitchControl 0x85c - -#define rFPGA0_XA_RFInterfaceOE 0x860 /* RF Channel switch */ -#define rFPGA0_XB_RFInterfaceOE 0x864 - -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86c - -#define rFPGA0_XAB_RFInterfaceSW 0x870 /* RF Interface Software Control */ -#define rFPGA0_XCD_RFInterfaceSW 0x874 - -#define rFPGA0_XAB_RFParameter 0x878 /* RF Parameter */ -#define rFPGA0_XCD_RFParameter 0x87c - -#define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting RF-R/W protection for parameter4?? */ -#define rFPGA0_AnalogParameter2 0x884 -#define rFPGA0_AnalogParameter3 0x888 /* Useless now */ -#define rFPGA0_AnalogParameter4 0x88c - -#define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ -#define rFPGA0_XB_LSSIReadBack 0x8a4 -#define rFPGA0_XC_LSSIReadBack 0x8a8 -#define rFPGA0_XD_LSSIReadBack 0x8ac - -#define rFPGA0_PSDReport 0x8b4 /* Useless now */ -#define TransceiverA_HSPI_Readback 0x8b8 /* Transceiver A HSPI Readback */ -#define TransceiverB_HSPI_Readback 0x8bc /* Transceiver B HSPI Readback */ -#define rFPGA0_XAB_RFInterfaceRB 0x8e0 /* Useless now // RF Interface Readback Value */ -#define rFPGA0_XCD_RFInterfaceRB 0x8e4 /* Useless now */ - -/* - * 4. Page9(0x900) - * */ -#define rFPGA1_RFMOD 0x900 /* RF mode & OFDM TxSC // RF BW Setting?? */ -#define rFPGA1_TxBlock 0x904 /* Useless now */ -#define rFPGA1_DebugSelect 0x908 /* Useless now */ -#define rFPGA1_TxInfo 0x90c /* Useless now // Status report?? */ -#define rDPDT_control 0x92c -#define rfe_ctrl_anta_src 0x930 -#define rS0S1_PathSwitch 0x948 -#define rBBrx_DFIR 0x954 - -/* - * 5. PageA(0xA00) - * - * Set Control channel to upper or lower. These settings are required only for 40MHz */ -#define rCCK0_System 0xa00 - -#define rCCK0_AFESetting 0xa04 /* Disable init gain now // Select RX path by RSSI */ -#define rCCK0_CCA 0xa08 /* Disable init gain now // Init gain */ - -#define rCCK0_RxAGC1 0xa0c /* AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series */ -#define rCCK0_RxAGC2 0xa10 /* AGC & DAGC */ - -#define rCCK0_RxHP 0xa14 - -#define rCCK0_DSPParameter1 0xa18 /* Timing recovery & Channel estimation threshold */ -#define rCCK0_DSPParameter2 0xa1c /* SQ threshold */ - -#define rCCK0_TxFilter1 0xa20 -#define rCCK0_TxFilter2 0xa24 -#define rCCK0_DebugPort 0xa28 /* debug port and Tx filter3 */ -#define rCCK0_FalseAlarmReport 0xa2c /* 0xa2d useless now 0xa30-a4f channel report */ -#define rCCK0_TRSSIReport 0xa50 -#define rCCK0_RxReport 0xa54 /* 0xa57 */ -#define rCCK0_FACounterLower 0xa5c /* 0xa5b */ -#define rCCK0_FACounterUpper 0xa58 /* 0xa5c */ - -/* - * PageB(0xB00) - * */ -#define rPdp_AntA 0xb00 -#define rPdp_AntA_4 0xb04 -#define rPdp_AntA_8 0xb08 -#define rPdp_AntA_C 0xb0c -#define rPdp_AntA_10 0xb10 -#define rPdp_AntA_14 0xb14 -#define rPdp_AntA_18 0xb18 -#define rPdp_AntA_1C 0xb1c -#define rPdp_AntA_20 0xb20 -#define rPdp_AntA_24 0xb24 - -#define rConfig_Pmpd_AntA 0xb28 -#define rConfig_ram64x16 0xb2c - -#define rBndA 0xb30 -#define rHssiPar 0xb34 - -#define rConfig_AntA 0xb68 -#define rConfig_AntB 0xb6c - -#define rPdp_AntB 0xb70 -#define rPdp_AntB_4 0xb74 -#define rPdp_AntB_8 0xb78 -#define rPdp_AntB_C 0xb7c -#define rPdp_AntB_10 0xb80 -#define rPdp_AntB_14 0xb84 -#define rPdp_AntB_18 0xb88 -#define rPdp_AntB_1C 0xb8c -#define rPdp_AntB_20 0xb90 -#define rPdp_AntB_24 0xb94 - -#define rConfig_Pmpd_AntB 0xb98 - -#define rBndB 0xba0 - -#define rAPK 0xbd8 -#define rPm_Rx0_AntA 0xbdc -#define rPm_Rx1_AntA 0xbe0 -#define rPm_Rx2_AntA 0xbe4 -#define rPm_Rx3_AntA 0xbe8 -#define rPm_Rx0_AntB 0xbec -#define rPm_Rx1_AntB 0xbf0 -#define rPm_Rx2_AntB 0xbf4 -#define rPm_Rx3_AntB 0xbf8 -/* - * 6. PageC(0xC00) - * */ -#define rOFDM0_LSTF 0xc00 - -#define rOFDM0_TRxPathEnable 0xc04 -#define rOFDM0_TRMuxPar 0xc08 -#define rOFDM0_TRSWIsolation 0xc0c - -#define rOFDM0_XARxAFE 0xc10 /* RxIQ DC offset, Rx digital filter, DC notch filter */ -#define rOFDM0_XARxIQImbalance 0xc14 /* RxIQ imbalance matrix */ -#define rOFDM0_XBRxAFE 0xc18 -#define rOFDM0_XBRxIQImbalance 0xc1c -#define rOFDM0_XCRxAFE 0xc20 -#define rOFDM0_XCRxIQImbalance 0xc24 -#define rOFDM0_XDRxAFE 0xc28 -#define rOFDM0_XDRxIQImbalance 0xc2c - -#define rOFDM0_RxDetector1 0xc30 /* PD, BW & SBD // DM tune init gain */ -#define rOFDM0_RxDetector2 0xc34 /* SBD & Fame Sync. */ -#define rOFDM0_RxDetector3 0xc38 /* Frame Sync. */ -#define rOFDM0_RxDetector4 0xc3c /* PD, SBD, Frame Sync & Short-GI */ - -#define rOFDM0_RxDSP 0xc40 /* Rx Sync Path */ -#define rOFDM0_CFOandDAGC 0xc44 /* CFO & DAGC */ -#define rOFDM0_CCADropThreshold 0xc48 /* CCA Drop threshold */ -#define rOFDM0_ECCAThreshold 0xc4c /* energy CCA */ - -#define rOFDM0_XAAGCCore1 0xc50 /* DIG */ -#define rOFDM0_XAAGCCore2 0xc54 -#define rOFDM0_XBAGCCore1 0xc58 -#define rOFDM0_XBAGCCore2 0xc5c -#define rOFDM0_XCAGCCore1 0xc60 -#define rOFDM0_XCAGCCore2 0xc64 -#define rOFDM0_XDAGCCore1 0xc68 -#define rOFDM0_XDAGCCore2 0xc6c - -#define rOFDM0_AGCParameter1 0xc70 -#define rOFDM0_AGCParameter2 0xc74 -#define rOFDM0_AGCRSSITable 0xc78 -#define rOFDM0_HTSTFAGC 0xc7c - -#define rOFDM0_XATxIQImbalance 0xc80 /* TX PWR TRACK and DIG */ -#define rOFDM0_XATxAFE 0xc84 -#define rOFDM0_XBTxIQImbalance 0xc88 -#define rOFDM0_XBTxAFE 0xc8c -#define rOFDM0_XCTxIQImbalance 0xc90 -#define rOFDM0_XCTxAFE 0xc94 -#define rOFDM0_XDTxIQImbalance 0xc98 -#define rOFDM0_XDTxAFE 0xc9c - -#define rOFDM0_RxIQExtAnta 0xca0 -#define rOFDM0_TxCoeff1 0xca4 -#define rOFDM0_TxCoeff2 0xca8 -#define rOFDM0_TxCoeff3 0xcac -#define rOFDM0_TxCoeff4 0xcb0 -#define rOFDM0_TxCoeff5 0xcb4 -#define rOFDM0_TxCoeff6 0xcb8 -#define rOFDM0_RxHPParameter 0xce0 -#define rOFDM0_TxPseudoNoiseWgt 0xce4 -#define rOFDM0_FrameSync 0xcf0 -#define rOFDM0_DFSReport 0xcf4 - -/* - * 7. PageD(0xD00) - * */ -#define rOFDM1_LSTF 0xd00 -#define rOFDM1_TRxPathEnable 0xd04 - -#define rOFDM1_CFO 0xd08 /* No setting now */ -#define rOFDM1_CSI1 0xd10 -#define rOFDM1_SBD 0xd14 -#define rOFDM1_CSI2 0xd18 -#define rOFDM1_CFOTracking 0xd2c -#define rOFDM1_TRxMesaure1 0xd34 -#define rOFDM1_IntfDet 0xd3c -#define rOFDM1_PseudoNoiseStateAB 0xd50 -#define rOFDM1_PseudoNoiseStateCD 0xd54 -#define rOFDM1_RxPseudoNoiseWgt 0xd58 - -#define rOFDM_PHYCounter1 0xda0 /* cca, parity fail */ -#define rOFDM_PHYCounter2 0xda4 /* rate illegal, crc8 fail */ -#define rOFDM_PHYCounter3 0xda8 /* MCS not support */ - -#define rOFDM_ShortCFOAB 0xdac /* No setting now */ -#define rOFDM_ShortCFOCD 0xdb0 -#define rOFDM_LongCFOAB 0xdb4 -#define rOFDM_LongCFOCD 0xdb8 -#define rOFDM_TailCFOAB 0xdbc -#define rOFDM_TailCFOCD 0xdc0 -#define rOFDM_PWMeasure1 0xdc4 -#define rOFDM_PWMeasure2 0xdc8 -#define rOFDM_BWReport 0xdcc -#define rOFDM_AGCReport 0xdd0 -#define rOFDM_RxSNR 0xdd4 -#define rOFDM_RxEVMCSI 0xdd8 -#define rOFDM_SIGReport 0xddc - - -/* - * 8. PageE(0xE00) - * */ -#define rTxAGC_A_Rate18_06 0xe00 -#define rTxAGC_A_Rate54_24 0xe04 -#define rTxAGC_A_CCK1_Mcs32 0xe08 -#define rTxAGC_A_Mcs03_Mcs00 0xe10 -#define rTxAGC_A_Mcs07_Mcs04 0xe14 -#define rTxAGC_A_Mcs11_Mcs08 0xe18 -#define rTxAGC_A_Mcs15_Mcs12 0xe1c - -#define rFPGA0_IQK 0xe28 -#define rTx_IQK_Tone_A 0xe30 -#define rRx_IQK_Tone_A 0xe34 -#define rTx_IQK_PI_A 0xe38 -#define rRx_IQK_PI_A 0xe3c - -#define rTx_IQK 0xe40 -#define rRx_IQK 0xe44 -#define rIQK_AGC_Pts 0xe48 -#define rIQK_AGC_Rsp 0xe4c -#define rTx_IQK_Tone_B 0xe50 -#define rRx_IQK_Tone_B 0xe54 -#define rTx_IQK_PI_B 0xe58 -#define rRx_IQK_PI_B 0xe5c -#define rIQK_AGC_Cont 0xe60 - -#define rBlue_Tooth 0xe6c -#define rRx_Wait_CCA 0xe70 -#define rTx_CCK_RFON 0xe74 -#define rTx_CCK_BBON 0xe78 -#define rTx_OFDM_RFON 0xe7c -#define rTx_OFDM_BBON 0xe80 -#define rTx_To_Rx 0xe84 -#define rTx_To_Tx 0xe88 -#define rRx_CCK 0xe8c - -#define rTx_Power_Before_IQK_A 0xe94 -#define rTx_Power_After_IQK_A 0xe9c - -#define rRx_Power_Before_IQK_A 0xea0 -#define rRx_Power_Before_IQK_A_2 0xea4 -#define rRx_Power_After_IQK_A 0xea8 -#define rRx_Power_After_IQK_A_2 0xeac - -#define rTx_Power_Before_IQK_B 0xeb4 -#define rTx_Power_After_IQK_B 0xebc - -#define rRx_Power_Before_IQK_B 0xec0 -#define rRx_Power_Before_IQK_B_2 0xec4 -#define rRx_Power_After_IQK_B 0xec8 -#define rRx_Power_After_IQK_B_2 0xecc - -#define rRx_OFDM 0xed0 -#define rRx_Wait_RIFS 0xed4 -#define rRx_TO_Rx 0xed8 -#define rStandby 0xedc -#define rSleep 0xee0 -#define rPMPD_ANAEN 0xeec - -/* - * 7. RF Register 0x00-0x2E (RF 8256) - * RF-0222D 0x00-3F - * - * Zebra1 */ -#define rZebra1_HSSIEnable 0x0 /* Useless now */ -#define rZebra1_TRxEnable1 0x1 -#define rZebra1_TRxEnable2 0x2 -#define rZebra1_AGC 0x4 -#define rZebra1_ChargePump 0x5 -#define rZebra1_Channel 0x7 /* RF channel switch */ - -/* #endif */ -#define rZebra1_TxGain 0x8 /* Useless now */ -#define rZebra1_TxLPF 0x9 -#define rZebra1_RxLPF 0xb -#define rZebra1_RxHPFCorner 0xc - -/* Zebra4 */ -#define rGlobalCtrl 0 /* Useless now */ -#define rRTL8256_TxLPF 19 -#define rRTL8256_RxLPF 11 - -/* RTL8258 */ -#define rRTL8258_TxLPF 0x11 /* Useless now */ -#define rRTL8258_RxLPF 0x13 -#define rRTL8258_RSSILPF 0xa - -/* - * RL6052 Register definition - * */ -#define RF_AC 0x00 /* */ - -#define RF_IQADJ_G1 0x01 /* */ -#define RF_IQADJ_G2 0x02 /* */ -#define RF_BS_PA_APSET_G1_G4 0x03 -#define RF_BS_PA_APSET_G5_G8 0x04 -#define RF_POW_TRSW 0x05 /* */ - -#define RF_GAIN_RX 0x06 /* */ -#define RF_GAIN_TX 0x07 /* */ - -#define RF_TXM_IDAC 0x08 /* */ -#define RF_IPA_G 0x09 /* */ -#define RF_TXBIAS_G 0x0A -#define RF_TXPA_AG 0x0B -#define RF_IPA_A 0x0C /* */ -#define RF_TXBIAS_A 0x0D -#define RF_BS_PA_APSET_G9_G11 0x0E -#define RF_BS_IQGEN 0x0F /* */ - -#define RF_MODE1 0x10 /* */ -#define RF_MODE2 0x11 /* */ - -#define RF_RX_AGC_HP 0x12 /* */ -#define RF_TX_AGC 0x13 /* */ -#define RF_BIAS 0x14 /* */ -#define RF_IPA 0x15 /* */ -#define RF_TXBIAS 0x16 -#define RF_POW_ABILITY 0x17 /* */ -#define RF_MODE_AG 0x18 /* */ -#define rRfChannel 0x18 /* RF channel and BW switch */ -#define RF_CHNLBW 0x18 /* RF channel and BW switch */ -#define RF_TOP 0x19 /* */ - -#define RF_RX_G1 0x1A /* */ -#define RF_RX_G2 0x1B /* */ - -#define RF_RX_BB2 0x1C /* */ -#define RF_RX_BB1 0x1D /* */ - -#define RF_RCK1 0x1E /* */ -#define RF_RCK2 0x1F /* */ - -#define RF_TX_G1 0x20 /* */ -#define RF_TX_G2 0x21 /* */ -#define RF_TX_G3 0x22 /* */ - -#define RF_TX_BB1 0x23 /* */ - -#define RF_T_METER 0x24 /* */ - -#define RF_SYN_G1 0x25 /* RF TX Power control */ -#define RF_SYN_G2 0x26 /* RF TX Power control */ -#define RF_SYN_G3 0x27 /* RF TX Power control */ -#define RF_SYN_G4 0x28 /* RF TX Power control */ -#define RF_SYN_G5 0x29 /* RF TX Power control */ -#define RF_SYN_G6 0x2A /* RF TX Power control */ -#define RF_SYN_G7 0x2B /* RF TX Power control */ -#define RF_SYN_G8 0x2C /* RF TX Power control */ - -#define RF_RCK_OS 0x30 /* RF TX PA control */ - -#define RF_TXPA_G1 0x31 /* RF TX PA control */ -#define RF_TXPA_G2 0x32 /* RF TX PA control */ -#define RF_TXPA_G3 0x33 /* RF TX PA control */ -#define RF_TX_BIAS_A 0x35 -#define RF_TX_BIAS_D 0x36 -#define RF_LOBF_9 0x38 -#define RF_RXRF_A3 0x3C /* */ -#define RF_TRSW 0x3F - -#define RF_TXRF_A2 0x41 -#define RF_T_METER_88E 0x42 -#define RF_TXPA_G4 0x46 -#define RF_TXPA_A4 0x4B -#define RF_0x52 0x52 -#define RF_WE_LUT 0xEF -#define RF_S0S1 0xB0 - -/* - * Bit Mask - * - * 1. Page1(0x100) */ -#define bBBResetB 0x100 /* Useless now? */ -#define bGlobalResetB 0x200 -#define bOFDMTxStart 0x4 -#define bCCKTxStart 0x8 -#define bCRC32Debug 0x100 -#define bPMACLoopback 0x10 -#define bTxLSIG 0xffffff -#define bOFDMTxRate 0xf -#define bOFDMTxReserved 0x10 -#define bOFDMTxLength 0x1ffe0 -#define bOFDMTxParity 0x20000 -#define bTxHTSIG1 0xffffff -#define bTxHTMCSRate 0x7f -#define bTxHTBW 0x80 -#define bTxHTLength 0xffff00 -#define bTxHTSIG2 0xffffff -#define bTxHTSmoothing 0x1 -#define bTxHTSounding 0x2 -#define bTxHTReserved 0x4 -#define bTxHTAggreation 0x8 -#define bTxHTSTBC 0x30 -#define bTxHTAdvanceCoding 0x40 -#define bTxHTShortGI 0x80 -#define bTxHTNumberHT_LTF 0x300 -#define bTxHTCRC8 0x3fc00 -#define bCounterReset 0x10000 -#define bNumOfOFDMTx 0xffff -#define bNumOfCCKTx 0xffff0000 -#define bTxIdleInterval 0xffff -#define bOFDMService 0xffff0000 -#define bTxMACHeader 0xffffffff -#define bTxDataInit 0xff -#define bTxHTMode 0x100 -#define bTxDataType 0x30000 -#define bTxRandomSeed 0xffffffff -#define bCCKTxPreamble 0x1 -#define bCCKTxSFD 0xffff0000 -#define bCCKTxSIG 0xff -#define bCCKTxService 0xff00 -#define bCCKLengthExt 0x8000 -#define bCCKTxLength 0xffff0000 -#define bCCKTxCRC16 0xffff -#define bCCKTxStatus 0x1 -#define bOFDMTxStatus 0x2 - -#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) -#define RF_TX_GAIN_OFFSET_8723D(_val) (abs((_val)) | (((_val) > 0) ? BIT(4) : 0)) - -/* 2. Page8(0x800) */ -#define bRFMOD 0x1 /* Reg 0x800 rFPGA0_RFMOD */ -#define bJapanMode 0x2 -#define bCCKTxSC 0x30 -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 - -#define bOFDMRxADCPhase 0x10000 /* Useless now */ -#define bOFDMTxDACPhase 0x40000 -#define bXATxAGC 0x3f - -#define bAntennaSelect 0x0300 - -#define bXBTxAGC 0xf00 /* Reg 80c rFPGA0_TxGainStage */ -#define bXCTxAGC 0xf000 -#define bXDTxAGC 0xf0000 - -#define bPAStart 0xf0000000 /* Useless now */ -#define bTRStart 0x00f00000 -#define bRFStart 0x0000f000 -#define bBBStart 0x000000f0 -#define bBBCCKStart 0x0000000f -#define bPAEnd 0xf /* Reg0x814 */ -#define bTREnd 0x0f000000 -#define bRFEnd 0x000f0000 -#define bCCAMask 0x000000f0 /* T2R */ -#define bR2RCCAMask 0x00000f00 -#define bHSSI_R2TDelay 0xf8000000 -#define bHSSI_T2RDelay 0xf80000 -#define bContTxHSSI 0x400 /* chane gain at continue Tx */ -#define bIGFromCCK 0x200 -#define bAGCAddress 0x3f -#define bRxHPTx 0x7000 -#define bRxHPT2R 0x38000 -#define bRxHPCCKIni 0xc0000 -#define bAGCTxCode 0xc00000 -#define bAGCRxCode 0x300000 - -#define b3WireDataLength 0x800 /* Reg 0x820~84f rFPGA0_XA_HSSIParameter1 */ -#define b3WireAddressLength 0x400 - -#define b3WireRFPowerDown 0x1 /* Useless now - * #define bHWSISelect 0x8 */ -#define b5GPAPEPolarity 0x40000000 -#define b2GPAPEPolarity 0x80000000 -#define bRFSW_TxDefaultAnt 0x3 -#define bRFSW_TxOptionAnt 0x30 -#define bRFSW_RxDefaultAnt 0x300 -#define bRFSW_RxOptionAnt 0x3000 -#define bRFSI_3WireData 0x1 -#define bRFSI_3WireClock 0x2 -#define bRFSI_3WireLoad 0x4 -#define bRFSI_3WireRW 0x8 -#define bRFSI_3Wire 0xf - -#define bRFSI_RFENV 0x10 /* Reg 0x870 rFPGA0_XAB_RFInterfaceSW */ - -#define bRFSI_TRSW 0x20 /* Useless now */ -#define bRFSI_TRSWB 0x40 -#define bRFSI_ANTSW 0x100 -#define bRFSI_ANTSWB 0x200 -#define bRFSI_PAPE 0x400 -#define bRFSI_PAPE5G 0x800 -#define bBandSelect 0x1 -#define bHTSIG2_GI 0x80 -#define bHTSIG2_Smoothing 0x01 -#define bHTSIG2_Sounding 0x02 -#define bHTSIG2_Aggreaton 0x08 -#define bHTSIG2_STBC 0x30 -#define bHTSIG2_AdvCoding 0x40 -#define bHTSIG2_NumOfHTLTF 0x300 -#define bHTSIG2_CRC8 0x3fc -#define bHTSIG1_MCS 0x7f -#define bHTSIG1_BandWidth 0x80 -#define bHTSIG1_HTLength 0xffff -#define bLSIG_Rate 0xf -#define bLSIG_Reserved 0x10 -#define bLSIG_Length 0x1fffe -#define bLSIG_Parity 0x20 -#define bCCKRxPhase 0x4 - -#define bLSSIReadAddress 0x7f800000 /* T65 RF */ - -#define bLSSIReadEdge 0x80000000 /* LSSI "Read" edge signal */ - -#define bLSSIReadBackData 0xfffff /* T65 RF */ - -#define bLSSIReadOKFlag 0x1000 /* Useless now */ -#define bCCKSampleRate 0x8 /* 0: 44MHz, 1:88MHz */ -#define bRegulator0Standby 0x1 -#define bRegulatorPLLStandby 0x2 -#define bRegulator1Standby 0x4 -#define bPLLPowerUp 0x8 -#define bDPLLPowerUp 0x10 -#define bDA10PowerUp 0x20 -#define bAD7PowerUp 0x200 -#define bDA6PowerUp 0x2000 -#define bXtalPowerUp 0x4000 -#define b40MDClkPowerUP 0x8000 -#define bDA6DebugMode 0x20000 -#define bDA6Swing 0x380000 - -#define bADClkPhase 0x4000000 /* Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ */ - -#define b80MClkDelay 0x18000000 /* Useless */ -#define bAFEWatchDogEnable 0x20000000 - -#define bXtalCap01 0xc0000000 /* Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap */ -#define bXtalCap23 0x3 -#define bXtalCap92x 0x0f000000 -#define bXtalCap 0x0f000000 - -#define bIntDifClkEnable 0x400 /* Useless */ -#define bExtSigClkEnable 0x800 -#define bBandgapMbiasPowerUp 0x10000 -#define bAD11SHGain 0xc0000 -#define bAD11InputRange 0x700000 -#define bAD11OPCurrent 0x3800000 -#define bIPathLoopback 0x4000000 -#define bQPathLoopback 0x8000000 -#define bAFELoopback 0x10000000 -#define bDA10Swing 0x7e0 -#define bDA10Reverse 0x800 -#define bDAClkSource 0x1000 -#define bAD7InputRange 0x6000 -#define bAD7Gain 0x38000 -#define bAD7OutputCMMode 0x40000 -#define bAD7InputCMMode 0x380000 -#define bAD7Current 0xc00000 -#define bRegulatorAdjust 0x7000000 -#define bAD11PowerUpAtTx 0x1 -#define bDA10PSAtTx 0x10 -#define bAD11PowerUpAtRx 0x100 -#define bDA10PSAtRx 0x1000 -#define bCCKRxAGCFormat 0x200 -#define bPSDFFTSamplepPoint 0xc000 -#define bPSDAverageNum 0x3000 -#define bIQPathControl 0xc00 -#define bPSDFreq 0x3ff -#define bPSDAntennaPath 0x30 -#define bPSDIQSwitch 0x40 -#define bPSDRxTrigger 0x400000 -#define bPSDTxTrigger 0x80000000 -#define bPSDSineToneScale 0x7f000000 -#define bPSDReport 0xffff - -/* 3. Page9(0x900) */ -#define bOFDMTxSC 0x30000000 /* Useless */ -#define bCCKTxOn 0x1 -#define bOFDMTxOn 0x2 -#define bDebugPage 0xfff /* reset debug page and also HWord, LWord */ -#define bDebugItem 0xff /* reset debug page and LWord */ -#define bAntL 0x10 -#define bAntNonHT 0x100 -#define bAntHT1 0x1000 -#define bAntHT2 0x10000 -#define bAntHT1S1 0x100000 -#define bAntNonHTS1 0x1000000 - -/* 4. PageA(0xA00) */ -#define bCCKBBMode 0x3 /* Useless */ -#define bCCKTxPowerSaving 0x80 -#define bCCKRxPowerSaving 0x40 - -#define bCCKSideBand 0x10 /* Reg 0xa00 rCCK0_System 20/40 switch */ - -#define bCCKScramble 0x8 /* Useless */ -#define bCCKAntDiversity 0x8000 -#define bCCKCarrierRecovery 0x4000 -#define bCCKTxRate 0x3000 -#define bCCKDCCancel 0x0800 -#define bCCKISICancel 0x0400 -#define bCCKMatchFilter 0x0200 -#define bCCKEqualizer 0x0100 -#define bCCKPreambleDetect 0x800000 -#define bCCKFastFalseCCA 0x400000 -#define bCCKChEstStart 0x300000 -#define bCCKCCACount 0x080000 -#define bCCKcs_lim 0x070000 -#define bCCKBistMode 0x80000000 -#define bCCKCCAMask 0x40000000 -#define bCCKTxDACPhase 0x4 -#define bCCKRxADCPhase 0x20000000 /* r_rx_clk */ -#define bCCKr_cp_mode0 0x0100 -#define bCCKTxDCOffset 0xf0 -#define bCCKRxDCOffset 0xf -#define bCCKCCAMode 0xc000 -#define bCCKFalseCS_lim 0x3f00 -#define bCCKCS_ratio 0xc00000 -#define bCCKCorgBit_sel 0x300000 -#define bCCKPD_lim 0x0f0000 -#define bCCKNewCCA 0x80000000 -#define bCCKRxHPofIG 0x8000 -#define bCCKRxIG 0x7f00 -#define bCCKLNAPolarity 0x800000 -#define bCCKRx1stGain 0x7f0000 -#define bCCKRFExtend 0x20000000 /* CCK Rx Iinital gain polarity */ -#define bCCKRxAGCSatLevel 0x1f000000 -#define bCCKRxAGCSatCount 0xe0 -#define bCCKRxRFSettle 0x1f /* AGCsamp_dly */ -#define bCCKFixedRxAGC 0x8000 -/* #define bCCKRxAGCFormat 0x4000 */ /* remove to HSSI register 0x824 */ -#define bCCKAntennaPolarity 0x2000 -#define bCCKTxFilterType 0x0c00 -#define bCCKRxAGCReportType 0x0300 -#define bCCKRxDAGCEn 0x80000000 -#define bCCKRxDAGCPeriod 0x20000000 -#define bCCKRxDAGCSatLevel 0x1f000000 -#define bCCKTimingRecovery 0x800000 -#define bCCKTxC0 0x3f0000 -#define bCCKTxC1 0x3f000000 -#define bCCKTxC2 0x3f -#define bCCKTxC3 0x3f00 -#define bCCKTxC4 0x3f0000 -#define bCCKTxC5 0x3f000000 -#define bCCKTxC6 0x3f -#define bCCKTxC7 0x3f00 -#define bCCKDebugPort 0xff0000 -#define bCCKDACDebug 0x0f000000 -#define bCCKFalseAlarmEnable 0x8000 -#define bCCKFalseAlarmRead 0x4000 -#define bCCKTRSSI 0x7f -#define bCCKRxAGCReport 0xfe -#define bCCKRxReport_AntSel 0x80000000 -#define bCCKRxReport_MFOff 0x40000000 -#define bCCKRxRxReport_SQLoss 0x20000000 -#define bCCKRxReport_Pktloss 0x10000000 -#define bCCKRxReport_Lockedbit 0x08000000 -#define bCCKRxReport_RateError 0x04000000 -#define bCCKRxReport_RxRate 0x03000000 -#define bCCKRxFACounterLower 0xff -#define bCCKRxFACounterUpper 0xff000000 -#define bCCKRxHPAGCStart 0xe000 -#define bCCKRxHPAGCFinal 0x1c00 -#define bCCKRxFalseAlarmEnable 0x8000 -#define bCCKFACounterFreeze 0x4000 -#define bCCKTxPathSel 0x10000000 -#define bCCKDefaultRxPath 0xc000000 -#define bCCKOptionRxPath 0x3000000 - -/* 5. PageC(0xC00) */ -#define bNumOfSTF 0x3 /* Useless */ -#define bShift_L 0xc0 -#define bGI_TH 0xc -#define bRxPathA 0x1 -#define bRxPathB 0x2 -#define bRxPathC 0x4 -#define bRxPathD 0x8 -#define bTxPathA 0x1 -#define bTxPathB 0x2 -#define bTxPathC 0x4 -#define bTxPathD 0x8 -#define bTRSSIFreq 0x200 -#define bADCBackoff 0x3000 -#define bDFIRBackoff 0xc000 -#define bTRSSILatchPhase 0x10000 -#define bRxIDCOffset 0xff -#define bRxQDCOffset 0xff00 -#define bRxDFIRMode 0x1800000 -#define bRxDCNFType 0xe000000 -#define bRXIQImb_A 0x3ff -#define bRXIQImb_B 0xfc00 -#define bRXIQImb_C 0x3f0000 -#define bRXIQImb_D 0xffc00000 -#define bDC_dc_Notch 0x60000 -#define bRxNBINotch 0x1f000000 -#define bPD_TH 0xf -#define bPD_TH_Opt2 0xc000 -#define bPWED_TH 0x700 -#define bIfMF_Win_L 0x800 -#define bPD_Option 0x1000 -#define bMF_Win_L 0xe000 -#define bBW_Search_L 0x30000 -#define bwin_enh_L 0xc0000 -#define bBW_TH 0x700000 -#define bED_TH2 0x3800000 -#define bBW_option 0x4000000 -#define bRatio_TH 0x18000000 -#define bWindow_L 0xe0000000 -#define bSBD_Option 0x1 -#define bFrame_TH 0x1c -#define bFS_Option 0x60 -#define bDC_Slope_check 0x80 -#define bFGuard_Counter_DC_L 0xe00 -#define bFrame_Weight_Short 0x7000 -#define bSub_Tune 0xe00000 -#define bFrame_DC_Length 0xe000000 -#define bSBD_start_offset 0x30000000 -#define bFrame_TH_2 0x7 -#define bFrame_GI2_TH 0x38 -#define bGI2_Sync_en 0x40 -#define bSarch_Short_Early 0x300 -#define bSarch_Short_Late 0xc00 -#define bSarch_GI2_Late 0x70000 -#define bCFOAntSum 0x1 -#define bCFOAcc 0x2 -#define bCFOStartOffset 0xc -#define bCFOLookBack 0x70 -#define bCFOSumWeight 0x80 -#define bDAGCEnable 0x10000 -#define bTXIQImb_A 0x3ff -#define bTXIQImb_B 0xfc00 -#define bTXIQImb_C 0x3f0000 -#define bTXIQImb_D 0xffc00000 -#define bTxIDCOffset 0xff -#define bTxQDCOffset 0xff00 -#define bTxDFIRMode 0x10000 -#define bTxPesudoNoiseOn 0x4000000 -#define bTxPesudoNoise_A 0xff -#define bTxPesudoNoise_B 0xff00 -#define bTxPesudoNoise_C 0xff0000 -#define bTxPesudoNoise_D 0xff000000 -#define bCCADropOption 0x20000 -#define bCCADropThres 0xfff00000 -#define bEDCCA_H 0xf -#define bEDCCA_L 0xf0 -#define bLambda_ED 0x300 -#define bRxInitialGain 0x7f -#define bRxAntDivEn 0x80 -#define bRxAGCAddressForLNA 0x7f00 -#define bRxHighPowerFlow 0x8000 -#define bRxAGCFreezeThres 0xc0000 -#define bRxFreezeStep_AGC1 0x300000 -#define bRxFreezeStep_AGC2 0xc00000 -#define bRxFreezeStep_AGC3 0x3000000 -#define bRxFreezeStep_AGC0 0xc000000 -#define bRxRssi_Cmp_En 0x10000000 -#define bRxQuickAGCEn 0x20000000 -#define bRxAGCFreezeThresMode 0x40000000 -#define bRxOverFlowCheckType 0x80000000 -#define bRxAGCShift 0x7f -#define bTRSW_Tri_Only 0x80 -#define bPowerThres 0x300 -#define bRxAGCEn 0x1 -#define bRxAGCTogetherEn 0x2 -#define bRxAGCMin 0x4 -#define bRxHP_Ini 0x7 -#define bRxHP_TRLNA 0x70 -#define bRxHP_RSSI 0x700 -#define bRxHP_BBP1 0x7000 -#define bRxHP_BBP2 0x70000 -#define bRxHP_BBP3 0x700000 -#define bRSSI_H 0x7f0000 /* the threshold for high power */ -#define bRSSI_Gen 0x7f000000 /* the threshold for ant diversity */ -#define bRxSettle_TRSW 0x7 -#define bRxSettle_LNA 0x38 -#define bRxSettle_RSSI 0x1c0 -#define bRxSettle_BBP 0xe00 -#define bRxSettle_RxHP 0x7000 -#define bRxSettle_AntSW_RSSI 0x38000 -#define bRxSettle_AntSW 0xc0000 -#define bRxProcessTime_DAGC 0x300000 -#define bRxSettle_HSSI 0x400000 -#define bRxProcessTime_BBPPW 0x800000 -#define bRxAntennaPowerShift 0x3000000 -#define bRSSITableSelect 0xc000000 -#define bRxHP_Final 0x7000000 -#define bRxHTSettle_BBP 0x7 -#define bRxHTSettle_HSSI 0x8 -#define bRxHTSettle_RxHP 0x70 -#define bRxHTSettle_BBPPW 0x80 -#define bRxHTSettle_Idle 0x300 -#define bRxHTSettle_Reserved 0x1c00 -#define bRxHTRxHPEn 0x8000 -#define bRxHTAGCFreezeThres 0x30000 -#define bRxHTAGCTogetherEn 0x40000 -#define bRxHTAGCMin 0x80000 -#define bRxHTAGCEn 0x100000 -#define bRxHTDAGCEn 0x200000 -#define bRxHTRxHP_BBP 0x1c00000 -#define bRxHTRxHP_Final 0xe0000000 -#define bRxPWRatioTH 0x3 -#define bRxPWRatioEn 0x4 -#define bRxMFHold 0x3800 -#define bRxPD_Delay_TH1 0x38 -#define bRxPD_Delay_TH2 0x1c0 -#define bRxPD_DC_COUNT_MAX 0x600 -/* #define bRxMF_Hold 0x3800 */ -#define bRxPD_Delay_TH 0x8000 -#define bRxProcess_Delay 0xf0000 -#define bRxSearchrange_GI2_Early 0x700000 -#define bRxFrame_Guard_Counter_L 0x3800000 -#define bRxSGI_Guard_L 0xc000000 -#define bRxSGI_Search_L 0x30000000 -#define bRxSGI_TH 0xc0000000 -#define bDFSCnt0 0xff -#define bDFSCnt1 0xff00 -#define bDFSFlag 0xf0000 -#define bMFWeightSum 0x300000 -#define bMinIdxTH 0x7f000000 -#define bDAFormat 0x40000 -#define bTxChEmuEnable 0x01000000 -#define bTRSWIsolation_A 0x7f -#define bTRSWIsolation_B 0x7f00 -#define bTRSWIsolation_C 0x7f0000 -#define bTRSWIsolation_D 0x7f000000 -#define bExtLNAGain 0x7c00 - -/* 6. PageE(0xE00) */ -#define bSTBCEn 0x4 /* Useless */ -#define bAntennaMapping 0x10 -#define bNss 0x20 -#define bCFOAntSumD 0x200 -#define bPHYCounterReset 0x8000000 -#define bCFOReportGet 0x4000000 -#define bOFDMContinueTx 0x10000000 -#define bOFDMSingleCarrier 0x20000000 -#define bOFDMSingleTone 0x40000000 -/* #define bRxPath1 0x01 */ -/* #define bRxPath2 0x02 */ -/* #define bRxPath3 0x04 */ -/* #define bRxPath4 0x08 */ -/* #define bTxPath1 0x10 */ -/* #define bTxPath2 0x20 */ -#define bHTDetect 0x100 -#define bCFOEn 0x10000 -#define bCFOValue 0xfff00000 -#define bSigTone_Re 0x3f -#define bSigTone_Im 0x7f00 -#define bCounter_CCA 0xffff -#define bCounter_ParityFail 0xffff0000 -#define bCounter_RateIllegal 0xffff -#define bCounter_CRC8Fail 0xffff0000 -#define bCounter_MCSNoSupport 0xffff -#define bCounter_FastSync 0xffff -#define bShortCFO 0xfff -#define bShortCFOTLength 12 /* total */ -#define bShortCFOFLength 11 /* fraction */ -#define bLongCFO 0x7ff -#define bLongCFOTLength 11 -#define bLongCFOFLength 11 -#define bTailCFO 0x1fff -#define bTailCFOTLength 13 -#define bTailCFOFLength 12 -#define bmax_en_pwdB 0xffff -#define bCC_power_dB 0xffff0000 -#define bnoise_pwdB 0xffff -#define bPowerMeasTLength 10 -#define bPowerMeasFLength 3 -#define bRx_HT_BW 0x1 -#define bRxSC 0x6 -#define bRx_HT 0x8 -#define bNB_intf_det_on 0x1 -#define bIntf_win_len_cfg 0x30 -#define bNB_Intf_TH_cfg 0x1c0 -#define bRFGain 0x3f -#define bTableSel 0x40 -#define bTRSW 0x80 -#define bRxSNR_A 0xff -#define bRxSNR_B 0xff00 -#define bRxSNR_C 0xff0000 -#define bRxSNR_D 0xff000000 -#define bSNREVMTLength 8 -#define bSNREVMFLength 1 -#define bCSI1st 0xff -#define bCSI2nd 0xff00 -#define bRxEVM1st 0xff0000 -#define bRxEVM2nd 0xff000000 -#define bSIGEVM 0xff -#define bPWDB 0xff00 -#define bSGIEN 0x10000 - -#define bSFactorQAM1 0xf /* Useless */ -#define bSFactorQAM2 0xf0 -#define bSFactorQAM3 0xf00 -#define bSFactorQAM4 0xf000 -#define bSFactorQAM5 0xf0000 -#define bSFactorQAM6 0xf0000 -#define bSFactorQAM7 0xf00000 -#define bSFactorQAM8 0xf000000 -#define bSFactorQAM9 0xf0000000 -#define bCSIScheme 0x100000 - -#define bNoiseLvlTopSet 0x3 /* Useless */ -#define bChSmooth 0x4 -#define bChSmoothCfg1 0x38 -#define bChSmoothCfg2 0x1c0 -#define bChSmoothCfg3 0xe00 -#define bChSmoothCfg4 0x7000 -#define bMRCMode 0x800000 -#define bTHEVMCfg 0x7000000 - -#define bLoopFitType 0x1 /* Useless */ -#define bUpdCFO 0x40 -#define bUpdCFOOffData 0x80 -#define bAdvUpdCFO 0x100 -#define bAdvTimeCtrl 0x800 -#define bUpdClko 0x1000 -#define bFC 0x6000 -#define bTrackingMode 0x8000 -#define bPhCmpEnable 0x10000 -#define bUpdClkoLTF 0x20000 -#define bComChCFO 0x40000 -#define bCSIEstiMode 0x80000 -#define bAdvUpdEqz 0x100000 -#define bUChCfg 0x7000000 -#define bUpdEqz 0x8000000 - -/* Rx Pseduo noise */ -#define bRxPesudoNoiseOn 0x20000000 /* Useless */ -#define bRxPesudoNoise_A 0xff -#define bRxPesudoNoise_B 0xff00 -#define bRxPesudoNoise_C 0xff0000 -#define bRxPesudoNoise_D 0xff000000 -#define bPesudoNoiseState_A 0xffff -#define bPesudoNoiseState_B 0xffff0000 -#define bPesudoNoiseState_C 0xffff -#define bPesudoNoiseState_D 0xffff0000 - -/* 7. RF Register - * Zebra1 */ -#define bZebra1_HSSIEnable 0x8 /* Useless */ -#define bZebra1_TRxControl 0xc00 -#define bZebra1_TRxGainSetting 0x07f -#define bZebra1_RxCorner 0xc00 -#define bZebra1_TxChargePump 0x38 -#define bZebra1_RxChargePump 0x7 -#define bZebra1_ChannelNum 0xf80 -#define bZebra1_TxLPFBW 0x400 -#define bZebra1_RxLPFBW 0x600 - -/* Zebra4 */ -#define bRTL8256RegModeCtrl1 0x100 /* Useless */ -#define bRTL8256RegModeCtrl0 0x40 -#define bRTL8256_TxLPFBW 0x18 -#define bRTL8256_RxLPFBW 0x600 - -/* RTL8258 */ -#define bRTL8258_TxLPFBW 0xc /* Useless */ -#define bRTL8258_RxLPFBW 0xc00 -#define bRTL8258_RSSILPFBW 0xc0 - - -/* - * Other Definition - * */ - -/* byte endable for sb_write */ -#define bByte0 0x1 /* Useless */ -#define bByte1 0x2 -#define bByte2 0x4 -#define bByte3 0x8 -#define bWord0 0x3 -#define bWord1 0xc -#define bDWord 0xf - -/* for PutRegsetting & GetRegSetting BitMask */ -#define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ -#define bMaskByte1 0xff00 -#define bMaskByte2 0xff0000 -#define bMaskByte3 0xff000000 -#define bMaskHWord 0xffff0000 -#define bMaskLWord 0x0000ffff -#define bMaskDWord 0xffffffff -#define bMaskH3Bytes 0xffffff00 -#define bMask12Bits 0xfff -#define bMaskH4Bits 0xf0000000 -#define bMaskOFDM_D 0xffc00000 -#define bMaskCCK 0x3f3f3f3f - - -#define bEnable 0x1 /* Useless */ -#define bDisable 0x0 - -#define LeftAntenna 0x0 /* Useless */ -#define RightAntenna 0x1 - -#define tCheckTxStatus 500 /* 500ms // Useless */ -#define tUpdateRxCounter 100 /* 100ms */ - -#define rateCCK 0 /* Useless */ -#define rateOFDM 1 -#define rateHT 2 - -/* define Register-End */ -#define bPMAC_End 0x1ff /* Useless */ -#define bFPGAPHY0_End 0x8ff -#define bFPGAPHY1_End 0x9ff -#define bCCKPHY0_End 0xaff -#define bOFDMPHY0_End 0xcff -#define bOFDMPHY1_End 0xdff - -/* define max debug item in each debug page - * #define bMaxItem_FPGA_PHY0 0x9 - * #define bMaxItem_FPGA_PHY1 0x3 - * #define bMaxItem_PHY_11B 0x16 - * #define bMaxItem_OFDM_PHY0 0x29 - * #define bMaxItem_OFDM_PHY1 0x0 */ - -#define bPMACControl 0x0 /* Useless */ -#define bWMACControl 0x1 -#define bWNICControl 0x2 - -#define PathA 0x0 /* Useless */ -#define PathB 0x1 -#define PathC 0x2 -#define PathD 0x3 - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPwrSeq.h deleted file mode 100644 index 60cb53b27bd1d2..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723DPwrSeq.h +++ /dev/null @@ -1,206 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef REALTEK_POWER_SEQUENCE_8723D -#define REALTEK_POWER_SEQUENCE_8723D - -/* #include "PwrSeqCmd.h" */ -#include "HalPwrSeqCmd.h" - -/* - Check document WM-20110607-Paul-RTL8192e_Power_Architecture-R02.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transition from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#define RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS 27 -#define RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS 8 -#define RTL8723D_TRANS_CARDEMU_TO_SUS_STEPS 7 -#define RTL8723D_TRANS_SUS_TO_CARDEMU_STEPS 5 -#define RTL8723D_TRANS_CARDEMU_TO_CARDDIS_STEPS 8 -#define RTL8723D_TRANS_CARDDIS_TO_CARDEMU_STEPS 7 -#define RTL8723D_TRANS_CARDEMU_TO_PDN_STEPS 4 -#define RTL8723D_TRANS_PDN_TO_CARDEMU_STEPS 1 -#define RTL8723D_TRANS_ACT_TO_LPS_STEPS 13 -#define RTL8723D_TRANS_LPS_TO_ACT_STEPS 11 -#define RTL8723D_TRANS_END_STEPS 1 - - -#define RTL8723D_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ - {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT(4) | BIT(3) | BIT2), 0},/* disable SW LPS 0x04[10]=0 and WLSUS_EN 0x04[11]=0*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0) , BIT(0)},/* Disable USB suspend */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), BIT(1)},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0075, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0) , 0},/* Enable USB suspend */ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, (BIT(1) | BIT(0)), 0}, \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0},/* disable HWPDN 0x04[15]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT(4) | BIT(3)), 0},/* disable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(0), 0},/**/ \ - {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), BIT(6)},/* Enable WL control XTAL setting*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable falling edge triggering interrupt*/\ - {0x0063, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable GPIO9 interrupt mode*/\ - {0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Enable GPIO9 input mode*/\ - {0x0058, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/*Enable HSISR GPIO[C:0] interrupt*/\ - {0x005A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)},/*Enable HSISR GPIO9 interrupt*/\ - {0x0068, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3), BIT(3)},/*For GPIO9 internal pull high setting by test chip*/\ - {0x0069, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), BIT(6)},/*For GPIO9 internal pull high setting*/\ - {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S1*/\ - {0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*reset RF path S0*/\ - {0x001f, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07},/*enable RF path S1*/\ - {0x0077, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x07},/*enalbe RF path S0*/\ - - -#define RTL8723D_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - /*{0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, */ /*0x1F[7:0] = 0 turn off RF*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x2[0]=0 Reset BB, RF enter Power Down mode*/ \ - {0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Enable rising edge triggering interrupt*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), BIT(0)},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(1), 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - {0x0010, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6), 0},/* Enable BT control XTAL setting*/\ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/\ - - -#define RTL8723D_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4) | BIT(3), (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/ - -#define RTL8723D_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(7), 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - - -#define RTL8723D_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(2), BIT(2)}, /*0x04[10] = 1, enable SW LPS*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend*/ \ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), BIT(0)}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), 0}, /*wait power state to suspend*/ - -#define RTL8723D_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(7), 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT(0), 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT(1), BIT(1)}, /*wait power state to suspend*/\ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(3) | BIT(4), 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ - - -#define RTL8723D_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), BIT(4)}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), BIT(7)},/* 0x04[15] = 1*/ - -#define RTL8723D_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(7), 0},/* 0x04[15] = 0*/ - -#define RTL8723D_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(0), 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), 0},/*check if removed later*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(5), BIT(5)},/*Respond TxOK to scheduler*/ \ - - -#define RTL8723D_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(4), 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT(7), 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(6) | BIT(7), 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1), BIT(1)}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT(1) | BIT(0), BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8723D_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, / comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, - - - extern WLAN_PWR_CFG rtl8723D_power_on_flow[RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_radio_off_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_card_disable_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_CARDDIS_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_card_enable_flow[RTL8723D_TRANS_CARDDIS_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_suspend_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_resume_flow[RTL8723D_TRANS_SUS_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_hwpdn_flow[RTL8723D_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723D_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_enter_lps_flow[RTL8723D_TRANS_ACT_TO_LPS_STEPS + RTL8723D_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723D_leave_lps_flow[RTL8723D_TRANS_LPS_TO_ACT_STEPS + RTL8723D_TRANS_END_STEPS]; - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723PwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8723PwrSeq.h deleted file mode 100644 index 22de83375e6611..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8723PwrSeq.h +++ /dev/null @@ -1,183 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __HAL8723PWRSEQ_H__ -#define __HAL8723PWRSEQ_H__ -/* - Check document WM-20110607-Paul-RTL8723A_Power_Architecture-R02.vsd - There are 6 HW Power States: - 0: POFF--Power Off - 1: PDN--Power Down - 2: CARDEMU--Card Emulation - 3: ACT--Active Mode - 4: LPS--Low Power State - 5: SUS--Suspend - - The transision from different states are defined below - TRANS_CARDEMU_TO_ACT - TRANS_ACT_TO_CARDEMU - TRANS_CARDEMU_TO_SUS - TRANS_SUS_TO_CARDEMU - TRANS_CARDEMU_TO_PDN - TRANS_ACT_TO_LPS - TRANS_LPS_TO_ACT - - TRANS_END -*/ -#include "HalPwrSeqCmd.h" - -#define RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS 15 -#define RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS 15 -#define RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS 15 -#define RTL8723A_TRANS_SUS_TO_CARDEMU_STEPS 15 -#define RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS 15 -#define RTL8723A_TRANS_PDN_TO_CARDEMU_STEPS 15 -#define RTL8723A_TRANS_ACT_TO_LPS_STEPS 15 -#define RTL8723A_TRANS_LPS_TO_ACT_STEPS 15 -#define RTL8723A_TRANS_END_STEPS 1 - - -#define RTL8723A_TRANS_CARDEMU_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0}, /*0x20[0] = 1b'1 enable LDOA12 MACRO block for all interface*/ \ - {0x0067, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x67[0] = 0 to disable BT_GPS_SEL pins*/ \ - {0x0001, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 1, PWRSEQ_DELAY_MS},/*Delay 1ms*/ \ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, 0}, /*0x00[5] = 1b'0 release analog Ips to digital ,1:isolation*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, 0},/* disable SW LPS 0x04[10]=0*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x04[17] = 1 power ready*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* release WLON reset 0x04[16]=1*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* disable HWPDN 0x04[15]=0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, (BIT4 | BIT3), 0},/* disable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/* polling until return 0*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT0, 0},/**/ \ - {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 1},/*0x4C[23] = 0x4E[7] = 1, switch DPDT_SEL_P output from WL BB */\ - -#define RTL8723A_TRANS_ACT_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*0x1F[7:0] = 0 turn off RF*/ \ - {0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 turn off MAC by HW state machine*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x04[9] = 0 polling until return 0 to disable*/ \ - {0x0000, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5}, /*0x00[5] = 1b'1 analog Ips to digital ,1:isolation*/ \ - {0x0020, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x20[0] = 1b'0 disable LDOA12 MACRO block*/ \ - - -#define RTL8723A_TRANS_CARDEMU_TO_SUS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4 | BIT3, (BIT4 | BIT3)}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SDIO SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3 | BIT4}, /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8723A_TRANS_SUS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/ - -#define RTL8723A_TRANS_CARDEMU_TO_CARDDIS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07 = 0x20 , SOP option to disable BG/MB*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK | PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, BIT3}, /*0x04[12:11] = 2b'01 enable WL suspend*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT2, BIT2}, /*0x04[10] = 1, enable SW LPS*/ \ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, BIT0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power state to suspend*/ - -#define RTL8723A_TRANS_CARDDIS_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT7, 0}, /*clear suspend enable and power down enable*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, BIT0, 0}, /*Set SDIO suspend local register*/ \ - {0x0086, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power state to suspend*/\ - {0x004A, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3 | BIT4, 0}, /*0x04[12:11] = 2b'01enable WL suspend*/\ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*0x23[4] = 1b'0 12H LDO enter normal mode*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0},/*PCIe DMA start*/ - - -#define RTL8723A_TRANS_CARDEMU_TO_PDN \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0023, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, BIT4}, /*0x23[4] = 1b'1 12H LDO enter sleep mode*/ \ - {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK | PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x20}, /*0x07[7:0] = 0x20 SOP option to disable BG/MB/ACK/SWR*/ \ - {0x0006, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/* 0x04[16] = 0*/\ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, BIT7},/* 0x04[15] = 1*/ - -#define RTL8723A_TRANS_PDN_TO_CARDEMU \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0005, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},/* 0x04[15] = 0*/ - -#define RTL8723A_TRANS_ACT_TO_LPS \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0301, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*PCIe DMA stop*/ \ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF},/*Tx Pause*/ \ - {0x05F8, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05F9, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FA, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x05FB, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, 0xFF, 0},/*Should be zero if no packet is transmitting*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Whole BB is reset*/ \ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ - {0x0093, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x00},/*When driver enter Sus/ Disable, enable LOP for BT*/ \ - {0x0553, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT5, BIT5},/*Respond TxOK to scheduler*/ \ - - -#define RTL8723A_TRANS_LPS_TO_ACT \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0x0080, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_WRITE, 0xFF, 0x84}, /*SDIO RPWM*/\ - {0xFE58, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*USB RPWM*/\ - {0x0361, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x84}, /*PCIe RPWM*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_MS}, /*Delay*/\ - {0x0008, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT4, 0}, /*. 0x08[4] = 0 switch TSF to 40M*/\ - {0x0109, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT7, 0}, /*Polling 0x109[7]=0 TSF in 40M*/\ - {0x0029, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6 | BIT7, 0}, /*. 0x29[7:6] = 2b'00 enable BB clock*/\ - {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/\ - {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/\ - {0x0002, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/\ - {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ - -#define RTL8723A_TRANS_END \ - /* format */ \ - /* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/ \ - {0xFFFF, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, 0, PWR_CMD_END, 0, 0}, - - - extern WLAN_PWR_CFG rtl8723A_power_on_flow[RTL8723A_TRANS_CARDEMU_TO_ACT_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_radio_off_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_card_disable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_card_enable_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_suspend_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_resume_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_SUS_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_hwpdn_flow[RTL8723A_TRANS_ACT_TO_CARDEMU_STEPS + RTL8723A_TRANS_CARDEMU_TO_PDN_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_enter_lps_flow[RTL8723A_TRANS_ACT_TO_LPS_STEPS + RTL8723A_TRANS_END_STEPS]; - extern WLAN_PWR_CFG rtl8723A_leave_lps_flow[RTL8723A_TRANS_LPS_TO_ACT_STEPS + RTL8723A_TRANS_END_STEPS]; - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/Hal8814PwrSeq.h b/drivers/net/wireless/realtek/rtl8812au/include/Hal8814PwrSeq.h index 5f4097d0f739ef..020ddbcba018f9 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/Hal8814PwrSeq.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/Hal8814PwrSeq.h @@ -76,9 +76,9 @@ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ - {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ + {0x1002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /* 0x2[0] = 0 RESET BB, CLOSE RF */ \ + {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US}, /*Delay 1us*/ \ + {0x1002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_PCI_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ {0x001F, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*0x1F[7:0] = 0 turn off RF*/ \ /*{0x004E, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT7, 0},*/ /*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \ {0x0007, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x28}, /* 0x07[7:0] = 0x28 sps pwm mode 0x2a for BT coex*/ \ @@ -188,9 +188,9 @@ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ - {0x0002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ + {0x1002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0},/*CCK and OFDM are disabled, and clock are gated, and RF closed*/ \ + {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_DELAY, 0, PWRSEQ_DELAY_US},/*Delay 1us*/ \ + {0x1002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_USB_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0}, /* Whole BB is reset*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0x03},/*Reset MAC TRX*/ \ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*check if removed later*/ \ {0x05F1, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, BIT0},/*Respond TxOK to scheduler*/ @@ -209,7 +209,7 @@ {0x0101, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*. 0x101[1] = 1*/ \ {0x0100, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0xFF}, /*. 0x100[7:0] = 0xFF enable WMAC TRX*/ \ {0x0002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x02[1:0] = 2b'11 enable BB macro*/ \ - {0x1002, ~PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ + {0x1002, PWR_CUT_TESTCHIP_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1 | BIT0, BIT1 | BIT0}, /*. 0x1002[1:0] = 2b'11 enable BB macro*/ \ {0x0522, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, 0xFF, 0}, /*. 0x522 = 0*/ #define RTL8814A_TRANS_END \ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/basic_types.h b/drivers/net/wireless/realtek/rtl8812au/include/basic_types.h index c0737f5bf23545..a324abaf974170 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/basic_types.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/basic_types.h @@ -31,47 +31,12 @@ #define _FALSE FALSE #endif -#ifdef PLATFORM_WINDOWS - - typedef signed char s8; - typedef unsigned char u8; - - typedef signed short s16; - typedef unsigned short u16; - - typedef signed long s32; - typedef unsigned long u32; - - typedef unsigned int uint; - typedef signed int sint; - - - typedef signed long long s64; - typedef unsigned long long u64; - - #ifdef NDIS50_MINIPORT - - #define NDIS_MAJOR_VERSION 5 - #define NDIS_MINOR_VERSION 0 - - #endif - - #ifdef NDIS51_MINIPORT - - #define NDIS_MAJOR_VERSION 5 - #define NDIS_MINOR_VERSION 1 - - #endif - - typedef NDIS_PROC proc_t; - - typedef LONG atomic_t; - -#endif - - #ifdef PLATFORM_LINUX #include + #ifndef RHEL_RELEASE_CODE + #define RHEL_RELEASE_VERSION(a,b) (((a) << 8) + (b)) + #define RHEL_RELEASE_CODE 0 + #endif #include #include #include diff --git a/drivers/net/wireless/realtek/rtl8812au/include/cmn_info/rtw_sta_info.h b/drivers/net/wireless/realtek/rtl8812au/include/cmn_info/rtw_sta_info.h index 73e40958dc850f..6910098af88b83 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/cmn_info/rtw_sta_info.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/cmn_info/rtw_sta_info.h @@ -189,7 +189,7 @@ struct dtp_info { }; struct cmn_sta_info { - u16 dm_ctrl; /*[Driver]*/ + u16 dm_ctrl; /*[Driver]*/ enum channel_width bw_mode; /*[Driver] max support BW*/ u8 mac_id; /*[Driver]*/ u8 mac_addr[6]; /*[Driver]*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/drv_conf.h b/drivers/net/wireless/realtek/rtl8812au/include/drv_conf.h old mode 100755 new mode 100644 index 7c0eadb34b907b..9fac340fdbd63a --- a/drivers/net/wireless/realtek/rtl8812au/include/drv_conf.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/drv_conf.h @@ -14,13 +14,10 @@ *****************************************************************************/ #ifndef __DRV_CONF_H__ #define __DRV_CONF_H__ -#include "autoconf.h" #include "hal_ic_cfg.h" -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) +#include +#include "rtl_autoconf.h" - #error "Shall be Linux or Windows, but not both!\n" - -#endif #define CONFIG_RSSI_PRIORITY #ifdef CONFIG_RTW_REPEATER_SON #ifndef CONFIG_AP @@ -364,7 +361,7 @@ defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) #define CONFIG_HWMPCAP_GEN3 #endif -#if defined(CONFIG_HWMPCAP_GEN1) && (CONFIG_IFACE_NUMBER > 2) +#if defined(CONFIG_HWMPCAP_GEN1) && (CONFIG_IFACE_NUMBER > 2) #ifdef CONFIG_POWER_SAVING /*#warning "Disable PS when CONFIG_IFACE_NUMBER > 2"*/ #undef CONFIG_POWER_SAVING @@ -500,11 +497,11 @@ defined(CONFIG_RTL8723B) || defined(CONFIG_RTL8703B) || defined(CONFIG_RTL8723D) #endif #endif -#define CONFIG_RTW_TPT_MODE +#define CONFIG_RTW_TPT_MODE #ifdef CONFIG_PCI_BCN_POLLING #define CONFIG_BCN_ICF -#endif +#endif #ifndef CONFIG_PCI_MSI #define CONFIG_RTW_PCI_MSI_DISABLE diff --git a/drivers/net/wireless/realtek/rtl8812au/include/drv_types.h b/drivers/net/wireless/realtek/rtl8812au/include/drv_types.h index f207b3f0c60aee..e52608d59883b0 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/drv_types.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/drv_types.h @@ -18,7 +18,6 @@ --------------------------------------------------------------------------------*/ - #ifndef __DRV_TYPES_H__ #define __DRV_TYPES_H__ @@ -34,14 +33,6 @@ #include #endif -#ifdef PLATFORM_OS_XP - #include -#endif - -#ifdef PLATFORM_OS_CE - #include -#endif - #ifdef PLATFORM_LINUX #include #endif @@ -91,7 +82,7 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; #include #include #include -#include +#include #include #include "../hal/hal_dm.h" #include @@ -105,7 +96,7 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; #include #include #include -#include +#include "sta_info.h" #include #include #include @@ -143,10 +134,10 @@ typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER; #include #endif /* CONFIG_IOL */ -#include -#include +#include +#include #include -#include +#include #include @@ -219,6 +210,9 @@ struct registry_priv { u8 software_decrypt; #ifdef CONFIG_TX_EARLY_MODE u8 early_mode; +#endif +#ifdef CONFIG_RTW_SW_LED + u8 led_ctrl; #endif u8 acm_method; /* WMM */ @@ -463,6 +457,10 @@ struct registry_priv { u8 tdmadig_mode; u8 tdmadig_dynamic; #endif/*CONFIG_TDMADIG*/ + + u8 monitor_overwrite_seqnum; + u8 monitor_retransmit; + u8 monitor_disable_1m; }; /* For registry parameters */ @@ -1117,7 +1115,7 @@ struct dvobj_priv { _timer txbcn_timer; #endif _timer dynamic_chk_timer; /* dynamic/periodic check timer */ - + #ifdef CONFIG_RTW_NAPI_DYNAMIC u8 en_napi_dynamic; #endif /* CONFIG_RTW_NAPI_DYNAMIC */ @@ -1263,8 +1261,8 @@ struct dvobj_priv { u8 tpt_mode; /* RTK T/P Testing Mode, 0:default mode */ u32 edca_be_ul; u32 edca_be_dl; -#endif - /* also for RTK T/P Testing Mode */ +#endif + /* also for RTK T/P Testing Mode */ u8 scan_deny; }; diff --git a/drivers/net/wireless/realtek/rtl8812au/include/hal_com_h2c.h b/drivers/net/wireless/realtek/rtl8812au/include/hal_com_h2c.h index dfea704caa4e34..13158bcb636c6c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/hal_com_h2c.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/hal_com_h2c.h @@ -223,8 +223,16 @@ enum h2c_cmd { #endif /* CONFIG_WOWLAN */ /* _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) +static inline void SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u8 *__pH2CCmd, u8 __Value) +{ + *__pH2CCmd = __Value; +} + +static inline void SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u8 *__pH2CCmd, u8 __Value) +{ + *(__pH2CCmd + 1) = __Value; +} + #define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) #define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value)SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) @@ -398,7 +406,7 @@ s32 rtw_hal_customer_str_write(_adapter *adapter, const u8 *cs); #define SET_H2CCMD_MCC_CTRL_V2_PRIMARY_CH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 4, __Value) #define SET_H2CCMD_MCC_CTRL_V2_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 4, 4, __Value) #define SET_H2CCMD_MCC_CTRL_V2_DURATION(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_H2CCMD_MCC_CTRL_V2_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 3, __Value) +#define SET_H2CCMD_MCC_CTRL_V2_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 3, __Value) #define SET_H2CCMD_MCC_CTRL_V2_INCURCH(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 3, 1, __Value) #define SET_H2CCMD_MCC_CTRL_V2_DIS_SW_RETRY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 4, 1, __Value) #define SET_H2CCMD_MCC_CTRL_V2_DISTXNULL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 5, 1, __Value) diff --git a/drivers/net/wireless/realtek/rtl8812au/include/hal_data.h b/drivers/net/wireless/realtek/rtl8812au/include/hal_data.h old mode 100755 new mode 100644 index b2dae5dbb59b46..3f28e15863ce21 --- a/drivers/net/wireless/realtek/rtl8812au/include/hal_data.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/hal_data.h @@ -397,7 +397,7 @@ typedef struct hal_com_data { u16 ForcedDataRate; /* Force Data Rate. 0: Auto, 0x02: 1M ~ 0x6C: 54M. */ u8 bDumpRxPkt; u8 bDumpTxPkt; - u8 dis_turboedca; /* 1: disable turboedca, + u8 dis_turboedca; /* 1: disable turboedca, 2: disable turboedca and setting EDCA parameter based on the input parameter*/ u32 edca_param_mode; @@ -493,6 +493,7 @@ typedef struct hal_com_data { u8 txpwr_limit_loaded:1; u8 txpwr_limit_from_file:1; u8 rf_power_tracking_type; + u8 CurrentTxPwrIdx; /* Read/write are allow for following hardware information variables */ u8 crystal_cap; @@ -1049,18 +1050,56 @@ int rtw_halmac_deinit_adapter(struct dvobj_priv *); #define REG_APK rAPK #define REG_ANTSEL_SW_JAGUAR r_ANTSEL_SW_Jaguar - - #define rf_welut_jaguar RF_WeLut_Jaguar #define rf_mode_table_addr RF_ModeTableAddr #define rf_mode_table_data0 RF_ModeTableData0 #define rf_mode_table_data1 RF_ModeTableData1 +#define RX_SMOOTH_FACTOR Rx_Smooth_Factor +extern unsigned char RTW_WPA_OUI[]; +extern unsigned char WMM_OUI[]; +extern unsigned char WPS_OUI[]; +extern unsigned char P2P_OUI[]; +extern unsigned char WFD_OUI[]; + +int pm_netdev_open(struct net_device *pnetdev,u8 bnormal); +void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, unsigned char *ipAddr); +void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb); +int nat25_handle_frame(_adapter *priv, struct sk_buff *skb); +int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method); +void nat25_db_expire(_adapter *priv); +extern unsigned char REALTEK_96B_IE[]; +int rtw_change_ifname(_adapter *padapter, const char *ifname); +void indicate_wx_scan_complete_event(_adapter *padapter); +u8 rtw_do_join(_adapter *padapter); +int _netdev_open(struct net_device *pnetdev); +int netdev_open (struct net_device *pnetdev); +u8 key_2char2num(u8 hch, u8 lch); +u8 key_2char2num(u8 hch, u8 lch); +void macstr2num(u8 *dst, u8 *src); +#ifdef CONFIG_AUTOSUSPEND +void autosuspend_enter(_adapter* padapter); +#endif - -#define RX_SMOOTH_FACTOR Rx_Smooth_Factor +/* +#ifdef CONFIG_RESUME_IN_WORKQUEUE || CONFIG_HAS_EARLYSUSPEND +int rtw_resume_process(_adapter *padapter); +#endif +#ifdef CONFIG_ANDROID_POWER +#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) +int rtw_resume_process(PADAPTER padapter); +#endif +#ifdef CONFIG_AUTOSUSPEND +void autosuspend_enter(_adapter* padapter); +int autoresume_enter(_adapter* padapter); +#endif +#ifdef SUPPORT_HW_RFOFF_DETECTED +int rtw_hw_suspend(_adapter *padapter ); +int rtw_hw_resume(_adapter *padapter); +#endif +*/ #endif /* __HAL_DATA_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/hal_intf.h b/drivers/net/wireless/realtek/rtl8812au/include/hal_intf.h index c6c54c0fb43e00..f77fa441c6ad20 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/hal_intf.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/hal_intf.h @@ -375,7 +375,7 @@ struct hal_ops { void (*write_syson_reg)(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); #endif void (*read_wmmedca_reg)(_adapter *padapter, u16 *vo_params, u16 *vi_params, u16 *be_params, u16 *bk_params); - + #ifdef CONFIG_HOSTAPD_MLME s32(*hostap_mgnt_xmit_entry)(_adapter *padapter, _pkt *pkt); #endif @@ -585,9 +585,9 @@ typedef enum _HARDWARE_TYPE { #define IS_HARDWARE_TYPE_8192FS(_Adapter)\ (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FS) #define IS_HARDWARE_TYPE_8192FU(_Adapter)\ - (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FU) + (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FU) #define IS_HARDWARE_TYPE_8192FE(_Adapter)\ - (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FE) + (rtw_get_hw_type(_Adapter) == HARDWARE_TYPE_RTL8192FE) #define IS_HARDWARE_TYPE_8192F(_Adapter)\ (IS_HARDWARE_TYPE_8192FS(_Adapter) ||\ IS_HARDWARE_TYPE_8192FU(_Adapter) ||\ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/ieee80211.h b/drivers/net/wireless/realtek/rtl8812au/include/ieee80211.h index 3b5ce8fc07fe5f..92dd31732e1f91 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/ieee80211.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/ieee80211.h @@ -741,7 +741,7 @@ struct ieee80211_snap_hdr { #define WLAN_REASON_MESH_MAX_PEERS 53 #define WLAN_REASON_MESH_CONFIG 54 #define WLAN_REASON_MESH_CLOSE 55 -#define WLAN_REASON_MESH_MAX_RETRIES 56 +#define WLAN_REASON_MESH_MAX_RETRIES 56 #define WLAN_REASON_MESH_CONFIRM_TIMEOUT 57 #define WLAN_REASON_MESH_INVALID_GTK 58 #define WLAN_REASON_MESH_INCONSISTENT_PARAM 59 diff --git a/drivers/net/wireless/realtek/rtl8812au/include/linux/wireless.h b/drivers/net/wireless/realtek/rtl8812au/include/linux/old_unused_rtl_wireless.h similarity index 100% rename from drivers/net/wireless/realtek/rtl8812au/include/linux/wireless.h rename to drivers/net/wireless/realtek/rtl8812au/include/linux/old_unused_rtl_wireless.h diff --git a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service.h b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service.h index 7d13e011450bfb..d7e375329dbcc8 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service.h @@ -15,6 +15,14 @@ #ifndef __OSDEP_SERVICE_H_ #define __OSDEP_SERVICE_H_ +#include +#ifndef RHEL_RELEASE_CODE +#define RHEL_RELEASE_VERSION(a,b) (((a) << 8) + (b)) +#define RHEL_RELEASE_CODE 0 +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) +#include +#endif #define _FAIL 0 #define _SUCCESS 1 diff --git a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_bsd.h b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_bsd.h index 19b365e502d9bd..4773f05fd0b09e 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_bsd.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_bsd.h @@ -12,653 +12,653 @@ * more details. * *****************************************************************************/ -#ifndef __OSDEP_BSD_SERVICE_H_ -#define __OSDEP_BSD_SERVICE_H_ - - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include "usbdevs.h" - -#define USB_DEBUG_VAR rum_debug -#include - -#if 1 //Baron porting from linux, it's all temp solution, needs to check again -#include -#include /* XXX for PCPU_GET */ -// typedef struct semaphore _sema; - typedef struct sema _sema; -// typedef spinlock_t _lock; - typedef struct mtx _lock; - typedef struct mtx _mutex; - typedef struct rtw_timer_list _timer; - struct list_head { - struct list_head *next, *prev; - }; - struct __queue { - struct list_head queue; - _lock lock; - }; - - typedef struct mbuf _pkt; - typedef struct mbuf _buffer; - - typedef struct __queue _queue; - typedef struct list_head _list; - typedef int _OS_STATUS; - //typedef u32 _irqL; - typedef unsigned long _irqL; - typedef struct ifnet * _nic_hdl; - - typedef pid_t _thread_hdl_; -// typedef struct thread _thread_hdl_; - typedef void thread_return; - typedef void* thread_context; - - typedef void timer_hdl_return; - typedef void* timer_hdl_context; - typedef struct work_struct _workitem; - -#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) -/* emulate a modern version */ -#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) - -#define WIRELESS_EXT -1 -#define HZ hz -#define spin_lock_irqsave mtx_lock_irqsave -#define spin_lock_bh mtx_lock_irqsave -#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} -//#define IFT_RTW 0xf9 //ifnet allocate type for RTW -#define free_netdev if_free -#define LIST_CONTAINOR(ptr, type, member) \ - ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) -#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) -/* - * Linux timers are emulated using FreeBSD callout functions - * (and taskqueue functionality). - * - * Currently no timer stats functionality. - * - * See (linux_compat) processes.c - * - */ -struct rtw_timer_list { +#ifndef __OSDEP_BSD_SERVICE_H_ +#define __OSDEP_BSD_SERVICE_H_ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include "usbdevs.h" + +#define USB_DEBUG_VAR rum_debug +#include + +#if 1 //Baron porting from linux, it's all temp solution, needs to check again +#include +#include /* XXX for PCPU_GET */ +// typedef struct semaphore _sema; + typedef struct sema _sema; +// typedef spinlock_t _lock; + typedef struct mtx _lock; + typedef struct mtx _mutex; + typedef struct rtw_timer_list _timer; + struct list_head { + struct list_head *next, *prev; + }; + struct __queue { + struct list_head queue; + _lock lock; + }; + + typedef struct mbuf _pkt; + typedef struct mbuf _buffer; + + typedef struct __queue _queue; + typedef struct list_head _list; + typedef int _OS_STATUS; + //typedef u32 _irqL; + typedef unsigned long _irqL; + typedef struct ifnet * _nic_hdl; + + typedef pid_t _thread_hdl_; +// typedef struct thread _thread_hdl_; + typedef void thread_return; + typedef void* thread_context; + + typedef void timer_hdl_return; + typedef void* timer_hdl_context; + typedef struct work_struct _workitem; + +#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) +/* emulate a modern version */ +#define LINUX_VERSION_CODE KERNEL_VERSION(2, 6, 35) + +#define WIRELESS_EXT -1 +#define HZ hz +#define spin_lock_irqsave mtx_lock_irqsave +#define spin_lock_bh mtx_lock_irqsave +#define mtx_lock_irqsave(lock, x) mtx_lock(lock)//{local_irq_save((x)); mtx_lock_spin((lock));} +//#define IFT_RTW 0xf9 //ifnet allocate type for RTW +#define free_netdev if_free +#define LIST_CONTAINOR(ptr, type, member) \ + ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) +#define container_of(p,t,n) (t*)((p)-&(((t*)0)->n)) +/* + * Linux timers are emulated using FreeBSD callout functions + * (and taskqueue functionality). + * + * Currently no timer stats functionality. + * + * See (linux_compat) processes.c + * + */ +struct rtw_timer_list { struct callout callout; void (*function)(void *); void *arg; }; - -struct workqueue_struct; -struct work_struct; -typedef void (*work_func_t)(struct work_struct *work); -/* Values for the state of an item of work (work_struct) */ -typedef enum work_state { - WORK_STATE_UNSET = 0, - WORK_STATE_CALLOUT_PENDING = 1, - WORK_STATE_TASK_PENDING = 2, - WORK_STATE_WORK_CANCELLED = 3 -} work_state_t; - -struct work_struct { - struct task task; /* FreeBSD task */ - work_state_t state; /* the pending or otherwise state of work. */ - work_func_t func; -}; -#define spin_unlock_irqrestore mtx_unlock_irqrestore -#define spin_unlock_bh mtx_unlock_irqrestore -#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); -extern void _rtw_spinlock_init(_lock *plock); - -//modify private structure to match freebsd -#define BITS_PER_LONG 32 -union ktime { - s64 tv64; -#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) - struct { -#ifdef __BIG_ENDIAN - s32 sec, nsec; -#else - s32 nsec, sec; -#endif - } tv; -#endif -}; -#define kmemcheck_bitfield_begin(name) -#define kmemcheck_bitfield_end(name) -#define CHECKSUM_NONE 0 -typedef unsigned char *sk_buff_data_t; -typedef union ktime ktime_t; /* Kill this */ - -void rtw_mtx_lock(_lock *plock); - -void rtw_mtx_unlock(_lock *plock); - -/** - * struct sk_buff - socket buffer - * @next: Next buffer in list - * @prev: Previous buffer in list - * @sk: Socket we are owned by - * @tstamp: Time we arrived - * @dev: Device we arrived on/are leaving by - * @transport_header: Transport layer header - * @network_header: Network layer header - * @mac_header: Link layer header - * @_skb_refdst: destination entry (with norefcount bit) - * @sp: the security path, used for xfrm - * @cb: Control buffer. Free for use by every layer. Put private vars here - * @len: Length of actual data - * @data_len: Data length - * @mac_len: Length of link layer header - * @hdr_len: writable header length of cloned skb - * @csum: Checksum (must include start/offset pair) - * @csum_start: Offset from skb->head where checksumming should start - * @csum_offset: Offset from csum_start where checksum should be stored - * @local_df: allow local fragmentation - * @cloned: Head may be cloned (check refcnt to be sure) - * @nohdr: Payload reference only, must not modify header - * @pkt_type: Packet class - * @fclone: skbuff clone status - * @ip_summed: Driver fed us an IP checksum - * @priority: Packet queueing priority - * @users: User count - see {datagram,tcp}.c - * @protocol: Packet protocol from driver - * @truesize: Buffer size - * @head: Head of buffer - * @data: Data head pointer - * @tail: Tail pointer - * @end: End pointer - * @destructor: Destruct function - * @mark: Generic packet mark - * @nfct: Associated connection, if any - * @ipvs_property: skbuff is owned by ipvs - * @peeked: this packet has been seen already, so stats have been - * done for it, don't do them again - * @nf_trace: netfilter packet trace flag - * @nfctinfo: Relationship of this skb to the connection - * @nfct_reasm: netfilter conntrack re-assembly pointer - * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c - * @skb_iif: ifindex of device we arrived on - * @rxhash: the packet hash computed on receive - * @queue_mapping: Queue mapping for multiqueue devices - * @tc_index: Traffic control index - * @tc_verd: traffic control verdict - * @ndisc_nodetype: router type (from link layer) - * @dma_cookie: a cookie to one of several possible DMA operations - * done by skb DMA functions - * @secmark: security marking - * @vlan_tci: vlan tag control information - */ - -struct sk_buff { - /* These two members must be first. */ - struct sk_buff *next; - struct sk_buff *prev; - - ktime_t tstamp; - - struct sock *sk; - //struct net_device *dev; - struct ifnet *dev; - - /* - * This is the control buffer. It is free to use for every - * layer. Please put your private variables there. If you - * want to keep them across layers you have to do a skb_clone() - * first. This is owned by whoever has the skb queued ATM. - */ - char cb[48] __aligned(8); - - unsigned long _skb_refdst; -#ifdef CONFIG_XFRM - struct sec_path *sp; -#endif - unsigned int len, - data_len; - u16 mac_len, - hdr_len; - union { - u32 csum; - struct { - u16 csum_start; - u16 csum_offset; - }smbol2; - }smbol1; - u32 priority; - kmemcheck_bitfield_begin(flags1); - u8 local_df:1, - cloned:1, - ip_summed:2, - nohdr:1, - nfctinfo:3; - u8 pkt_type:3, - fclone:2, - ipvs_property:1, - peeked:1, - nf_trace:1; - kmemcheck_bitfield_end(flags1); - u16 protocol; - - void (*destructor)(struct sk_buff *skb); -#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) - struct nf_conntrack *nfct; - struct sk_buff *nfct_reasm; -#endif -#ifdef CONFIG_BRIDGE_NETFILTER - struct nf_bridge_info *nf_bridge; -#endif - - int skb_iif; -#ifdef CONFIG_NET_SCHED - u16 tc_index; /* traffic control index */ -#ifdef CONFIG_NET_CLS_ACT - u16 tc_verd; /* traffic control verdict */ -#endif -#endif - - u32 rxhash; - - kmemcheck_bitfield_begin(flags2); - u16 queue_mapping:16; -#ifdef CONFIG_IPV6_NDISC_NODETYPE - u8 ndisc_nodetype:2, - deliver_no_wcard:1; -#else - u8 deliver_no_wcard:1; -#endif - kmemcheck_bitfield_end(flags2); - - /* 0/14 bit hole */ - -#ifdef CONFIG_NET_DMA - dma_cookie_t dma_cookie; -#endif -#ifdef CONFIG_NETWORK_SECMARK - u32 secmark; -#endif - union { - u32 mark; - u32 dropcount; - }symbol3; - - u16 vlan_tci; - - sk_buff_data_t transport_header; - sk_buff_data_t network_header; - sk_buff_data_t mac_header; - /* These elements must be at the end, see alloc_skb() for details. */ - sk_buff_data_t tail; - sk_buff_data_t end; - unsigned char *head, - *data; - unsigned int truesize; - atomic_t users; -}; -struct sk_buff_head { - /* These two members must be first. */ - struct sk_buff *next; - struct sk_buff *prev; - - u32 qlen; - _lock lock; -}; -#define skb_tail_pointer(skb) skb->tail -static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) -{ - unsigned char *tmp = skb_tail_pointer(skb); - //SKB_LINEAR_ASSERT(skb); - skb->tail += len; - skb->len += len; - return tmp; -} - -static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) -{ - skb->len -= len; - if(skb->len < skb->data_len) - printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); - return skb->data += len; -} -static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) -{ - #ifdef PLATFORM_FREEBSD - return __skb_pull(skb, len); - #else - return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); - #endif //PLATFORM_FREEBSD -} -static inline u32 skb_queue_len(const struct sk_buff_head *list_) -{ - return list_->qlen; -} -static inline void __skb_insert(struct sk_buff *newsk, - struct sk_buff *prev, struct sk_buff *next, - struct sk_buff_head *list) -{ - newsk->next = next; - newsk->prev = prev; - next->prev = prev->next = newsk; - list->qlen++; -} -static inline void __skb_queue_before(struct sk_buff_head *list, - struct sk_buff *next, - struct sk_buff *newsk) -{ - __skb_insert(newsk, next->prev, next, list); -} -static inline void skb_queue_tail(struct sk_buff_head *list, - struct sk_buff *newsk) -{ - mtx_lock(&list->lock); - __skb_queue_before(list, (struct sk_buff *)list, newsk); - mtx_unlock(&list->lock); -} -static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) -{ - struct sk_buff *list = ((struct sk_buff *)list_)->next; - if (list == (struct sk_buff *)list_) - list = NULL; - return list; -} -static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) -{ - struct sk_buff *next, *prev; - - list->qlen--; - next = skb->next; - prev = skb->prev; - skb->next = skb->prev = NULL; - next->prev = prev; - prev->next = next; -} - -static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) -{ - mtx_lock(&list->lock); - - struct sk_buff *skb = skb_peek(list); - if (skb) - __skb_unlink(skb, list); - - mtx_unlock(&list->lock); - - return skb; -} -static inline void skb_reserve(struct sk_buff *skb, int len) -{ - skb->data += len; - skb->tail += len; -} -static inline void __skb_queue_head_init(struct sk_buff_head *list) -{ - list->prev = list->next = (struct sk_buff *)list; - list->qlen = 0; -} -/* - * This function creates a split out lock class for each invocation; - * this is needed for now since a whole lot of users of the skb-queue - * infrastructure in drivers have different locking usage (in hardirq) - * than the networking core (in softirq only). In the long run either the - * network layer or drivers should need annotation to consolidate the - * main types of usage into 3 classes. - */ -static inline void skb_queue_head_init(struct sk_buff_head *list) -{ - _rtw_spinlock_init(&list->lock); - __skb_queue_head_init(list); -} -unsigned long copy_from_user(void *to, const void *from, unsigned long n); -unsigned long copy_to_user(void *to, const void *from, unsigned long n); -struct sk_buff * dev_alloc_skb(unsigned int size); -struct sk_buff *skb_clone(const struct sk_buff *skb); -void dev_kfree_skb_any(struct sk_buff *skb); -#endif //Baron porting from linux, it's all temp solution, needs to check again - - -#if 1 // kenny add Linux compatibility code for Linux USB driver -#include - -#define __init // __attribute ((constructor)) -#define __exit // __attribute ((destructor)) - -/* - * Definitions for module_init and module_exit macros. - * - * These macros will use the SYSINIT framework to call a specified - * function (with no arguments) on module loading or unloading. - * - */ - -void module_init_exit_wrapper(void *arg); - -#define module_init(initfn) \ - SYSINIT(mod_init_ ## initfn, \ - SI_SUB_KLD, SI_ORDER_FIRST, \ - module_init_exit_wrapper, initfn) - -#define module_exit(exitfn) \ - SYSUNINIT(mod_exit_ ## exitfn, \ - SI_SUB_KLD, SI_ORDER_ANY, \ - module_init_exit_wrapper, exitfn) - -/* - * The usb_register and usb_deregister functions are used to register - * usb drivers with the usb subsystem. - */ -int usb_register(struct usb_driver *driver); -int usb_deregister(struct usb_driver *driver); - -/* - * usb_get_dev and usb_put_dev - increment/decrement the reference count - * of the usb device structure. - * - * Original body of usb_get_dev: - * - * if (dev) - * get_device(&dev->dev); - * return dev; - * - * Reference counts are not currently used in this compatibility - * layer. So these functions will do nothing. - */ -static inline struct usb_device * -usb_get_dev(struct usb_device *dev) -{ - return dev; -} - -static inline void -usb_put_dev(struct usb_device *dev) -{ - return; -} - - -// rtw_usb_compat_linux -int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); -int rtw_usb_unlink_urb(struct urb *urb); -int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); -int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, - uint8_t request, uint8_t requesttype, - uint16_t value, uint16_t index, void *data, - uint16_t size, usb_timeout_t timeout); -int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); -int rtw_usb_setup_endpoint(struct usb_device *dev, - struct usb_host_endpoint *uhe, usb_size_t bufsize); -struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); -struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); -struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); -struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); -void *rtw_usbd_get_intfdata(struct usb_interface *intf); -void rtw_usb_linux_register(void *arg); -void rtw_usb_linux_deregister(void *arg); -void rtw_usb_linux_free_device(struct usb_device *dev); -void rtw_usb_free_urb(struct urb *urb); -void rtw_usb_init_urb(struct urb *urb); -void rtw_usb_kill_urb(struct urb *urb); -void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); -void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, - struct usb_host_endpoint *uhe, void *buf, - int length, usb_complete_t callback, void *arg); -int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, - void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); -void *usb_get_intfdata(struct usb_interface *intf); -int usb_linux_init_endpoints(struct usb_device *udev); - - - -typedef struct urb * PURB; - -typedef unsigned gfp_t; -#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ -#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ -#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ -#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ -#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ -#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ -#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ -#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ -#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ -#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ -#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ -#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ -#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ -#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ - -/* This equals 0, but use constants in case they ever change */ -#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) -/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ -#define GFP_ATOMIC (__GFP_HIGH) -#define GFP_NOIO (__GFP_WAIT) -#define GFP_NOFS (__GFP_WAIT | __GFP_IO) -#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) -#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) -#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ - __GFP_HIGHMEM) - - -#endif // kenny add Linux compatibility code for Linux USB - -__inline static _list *get_next(_list *list) -{ - return list->next; -} - -__inline static _list *get_list_head(_queue *queue) -{ - return (&(queue->queue)); -} - - -#define LIST_CONTAINOR(ptr, type, member) \ - ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) - - -__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -{ - spin_lock_irqsave(plock, *pirqL); -} - -__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -{ - spin_unlock_irqrestore(plock, *pirqL); -} - -__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) -{ - spin_lock_irqsave(plock, *pirqL); -} - -__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) -{ - spin_unlock_irqrestore(plock, *pirqL); -} - -__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -{ - spin_lock_bh(plock, *pirqL); -} - -__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -{ - spin_unlock_bh(plock, *pirqL); -} - -__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -{ - - mtx_lock(pmutex); - -} - - -__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -{ - - mtx_unlock(pmutex); - -} -static inline void __list_del(struct list_head * prev, struct list_head * next) -{ - next->prev = prev; - prev->next = next; -} -static inline void INIT_LIST_HEAD(struct list_head *list) -{ - list->next = list; - list->prev = list; -} -__inline static void rtw_list_delete(_list *plist) -{ - __list_del(plist->prev, plist->next); - INIT_LIST_HEAD(plist); -} - + +struct workqueue_struct; +struct work_struct; +typedef void (*work_func_t)(struct work_struct *work); +/* Values for the state of an item of work (work_struct) */ +typedef enum work_state { + WORK_STATE_UNSET = 0, + WORK_STATE_CALLOUT_PENDING = 1, + WORK_STATE_TASK_PENDING = 2, + WORK_STATE_WORK_CANCELLED = 3 +} work_state_t; + +struct work_struct { + struct task task; /* FreeBSD task */ + work_state_t state; /* the pending or otherwise state of work. */ + work_func_t func; +}; +#define spin_unlock_irqrestore mtx_unlock_irqrestore +#define spin_unlock_bh mtx_unlock_irqrestore +#define mtx_unlock_irqrestore(lock,x) mtx_unlock(lock); +extern void _rtw_spinlock_init(_lock *plock); + +//modify private structure to match freebsd +#define BITS_PER_LONG 32 +union ktime { + s64 tv64; +#if BITS_PER_LONG != 64 && !defined(CONFIG_KTIME_SCALAR) + struct { +#ifdef __BIG_ENDIAN + s32 sec, nsec; +#else + s32 nsec, sec; +#endif + } tv; +#endif +}; +#define kmemcheck_bitfield_begin(name) +#define kmemcheck_bitfield_end(name) +#define CHECKSUM_NONE 0 +typedef unsigned char *sk_buff_data_t; +typedef union ktime ktime_t; /* Kill this */ + +void rtw_mtx_lock(_lock *plock); + +void rtw_mtx_unlock(_lock *plock); + +/** + * struct sk_buff - socket buffer + * @next: Next buffer in list + * @prev: Previous buffer in list + * @sk: Socket we are owned by + * @tstamp: Time we arrived + * @dev: Device we arrived on/are leaving by + * @transport_header: Transport layer header + * @network_header: Network layer header + * @mac_header: Link layer header + * @_skb_refdst: destination entry (with norefcount bit) + * @sp: the security path, used for xfrm + * @cb: Control buffer. Free for use by every layer. Put private vars here + * @len: Length of actual data + * @data_len: Data length + * @mac_len: Length of link layer header + * @hdr_len: writable header length of cloned skb + * @csum: Checksum (must include start/offset pair) + * @csum_start: Offset from skb->head where checksumming should start + * @csum_offset: Offset from csum_start where checksum should be stored + * @local_df: allow local fragmentation + * @cloned: Head may be cloned (check refcnt to be sure) + * @nohdr: Payload reference only, must not modify header + * @pkt_type: Packet class + * @fclone: skbuff clone status + * @ip_summed: Driver fed us an IP checksum + * @priority: Packet queueing priority + * @users: User count - see {datagram,tcp}.c + * @protocol: Packet protocol from driver + * @truesize: Buffer size + * @head: Head of buffer + * @data: Data head pointer + * @tail: Tail pointer + * @end: End pointer + * @destructor: Destruct function + * @mark: Generic packet mark + * @nfct: Associated connection, if any + * @ipvs_property: skbuff is owned by ipvs + * @peeked: this packet has been seen already, so stats have been + * done for it, don't do them again + * @nf_trace: netfilter packet trace flag + * @nfctinfo: Relationship of this skb to the connection + * @nfct_reasm: netfilter conntrack re-assembly pointer + * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c + * @skb_iif: ifindex of device we arrived on + * @rxhash: the packet hash computed on receive + * @queue_mapping: Queue mapping for multiqueue devices + * @tc_index: Traffic control index + * @tc_verd: traffic control verdict + * @ndisc_nodetype: router type (from link layer) + * @dma_cookie: a cookie to one of several possible DMA operations + * done by skb DMA functions + * @secmark: security marking + * @vlan_tci: vlan tag control information + */ + +struct sk_buff { + /* These two members must be first. */ + struct sk_buff *next; + struct sk_buff *prev; + + ktime_t tstamp; + + struct sock *sk; + //struct net_device *dev; + struct ifnet *dev; + + /* + * This is the control buffer. It is free to use for every + * layer. Please put your private variables there. If you + * want to keep them across layers you have to do a skb_clone() + * first. This is owned by whoever has the skb queued ATM. + */ + char cb[48] __aligned(8); + + unsigned long _skb_refdst; +#ifdef CONFIG_XFRM + struct sec_path *sp; +#endif + unsigned int len, + data_len; + u16 mac_len, + hdr_len; + union { + u32 csum; + struct { + u16 csum_start; + u16 csum_offset; + }smbol2; + }smbol1; + u32 priority; + kmemcheck_bitfield_begin(flags1); + u8 local_df:1, + cloned:1, + ip_summed:2, + nohdr:1, + nfctinfo:3; + u8 pkt_type:3, + fclone:2, + ipvs_property:1, + peeked:1, + nf_trace:1; + kmemcheck_bitfield_end(flags1); + u16 protocol; + + void (*destructor)(struct sk_buff *skb); +#if defined(CONFIG_NF_CONNTRACK) || defined(CONFIG_NF_CONNTRACK_MODULE) + struct nf_conntrack *nfct; + struct sk_buff *nfct_reasm; +#endif +#ifdef CONFIG_BRIDGE_NETFILTER + struct nf_bridge_info *nf_bridge; +#endif + + int skb_iif; +#ifdef CONFIG_NET_SCHED + u16 tc_index; /* traffic control index */ +#ifdef CONFIG_NET_CLS_ACT + u16 tc_verd; /* traffic control verdict */ +#endif +#endif + + u32 rxhash; + + kmemcheck_bitfield_begin(flags2); + u16 queue_mapping:16; +#ifdef CONFIG_IPV6_NDISC_NODETYPE + u8 ndisc_nodetype:2, + deliver_no_wcard:1; +#else + u8 deliver_no_wcard:1; +#endif + kmemcheck_bitfield_end(flags2); + + /* 0/14 bit hole */ + +#ifdef CONFIG_NET_DMA + dma_cookie_t dma_cookie; +#endif +#ifdef CONFIG_NETWORK_SECMARK + u32 secmark; +#endif + union { + u32 mark; + u32 dropcount; + }symbol3; + + u16 vlan_tci; + + sk_buff_data_t transport_header; + sk_buff_data_t network_header; + sk_buff_data_t mac_header; + /* These elements must be at the end, see alloc_skb() for details. */ + sk_buff_data_t tail; + sk_buff_data_t end; + unsigned char *head, + *data; + unsigned int truesize; + atomic_t users; +}; +struct sk_buff_head { + /* These two members must be first. */ + struct sk_buff *next; + struct sk_buff *prev; + + u32 qlen; + _lock lock; +}; +#define skb_tail_pointer(skb) skb->tail +static inline unsigned char *skb_put(struct sk_buff *skb, unsigned int len) +{ + unsigned char *tmp = skb_tail_pointer(skb); + //SKB_LINEAR_ASSERT(skb); + skb->tail += len; + skb->len += len; + return tmp; +} + +static inline unsigned char *__skb_pull(struct sk_buff *skb, unsigned int len) +{ + skb->len -= len; + if(skb->len < skb->data_len) + printf("%s(),%d,error!\n",__FUNCTION__,__LINE__); + return skb->data += len; +} +static inline unsigned char *skb_pull(struct sk_buff *skb, unsigned int len) +{ + #ifdef PLATFORM_FREEBSD + return __skb_pull(skb, len); + #else + return unlikely(len > skb->len) ? NULL : __skb_pull(skb, len); + #endif //PLATFORM_FREEBSD +} +static inline u32 skb_queue_len(const struct sk_buff_head *list_) +{ + return list_->qlen; +} +static inline void __skb_insert(struct sk_buff *newsk, + struct sk_buff *prev, struct sk_buff *next, + struct sk_buff_head *list) +{ + newsk->next = next; + newsk->prev = prev; + next->prev = prev->next = newsk; + list->qlen++; +} +static inline void __skb_queue_before(struct sk_buff_head *list, + struct sk_buff *next, + struct sk_buff *newsk) +{ + __skb_insert(newsk, next->prev, next, list); +} +static inline void skb_queue_tail(struct sk_buff_head *list, + struct sk_buff *newsk) +{ + mtx_lock(&list->lock); + __skb_queue_before(list, (struct sk_buff *)list, newsk); + mtx_unlock(&list->lock); +} +static inline struct sk_buff *skb_peek(struct sk_buff_head *list_) +{ + struct sk_buff *list = ((struct sk_buff *)list_)->next; + if (list == (struct sk_buff *)list_) + list = NULL; + return list; +} +static inline void __skb_unlink(struct sk_buff *skb, struct sk_buff_head *list) +{ + struct sk_buff *next, *prev; + + list->qlen--; + next = skb->next; + prev = skb->prev; + skb->next = skb->prev = NULL; + next->prev = prev; + prev->next = next; +} + +static inline struct sk_buff *skb_dequeue(struct sk_buff_head *list) +{ + mtx_lock(&list->lock); + + struct sk_buff *skb = skb_peek(list); + if (skb) + __skb_unlink(skb, list); + + mtx_unlock(&list->lock); + + return skb; +} +static inline void skb_reserve(struct sk_buff *skb, int len) +{ + skb->data += len; + skb->tail += len; +} +static inline void __skb_queue_head_init(struct sk_buff_head *list) +{ + list->prev = list->next = (struct sk_buff *)list; + list->qlen = 0; +} +/* + * This function creates a split out lock class for each invocation; + * this is needed for now since a whole lot of users of the skb-queue + * infrastructure in drivers have different locking usage (in hardirq) + * than the networking core (in softirq only). In the long run either the + * network layer or drivers should need annotation to consolidate the + * main types of usage into 3 classes. + */ +static inline void skb_queue_head_init(struct sk_buff_head *list) +{ + _rtw_spinlock_init(&list->lock); + __skb_queue_head_init(list); +} +unsigned long copy_from_user(void *to, const void *from, unsigned long n); +unsigned long copy_to_user(void *to, const void *from, unsigned long n); +struct sk_buff * dev_alloc_skb(unsigned int size); +struct sk_buff *skb_clone(const struct sk_buff *skb); +void dev_kfree_skb_any(struct sk_buff *skb); +#endif //Baron porting from linux, it's all temp solution, needs to check again + + +#if 1 // kenny add Linux compatibility code for Linux USB driver +#include + +#define __init // __attribute ((constructor)) +#define __exit // __attribute ((destructor)) + +/* + * Definitions for module_init and module_exit macros. + * + * These macros will use the SYSINIT framework to call a specified + * function (with no arguments) on module loading or unloading. + * + */ + +void module_init_exit_wrapper(void *arg); + +#define module_init(initfn) \ + SYSINIT(mod_init_ ## initfn, \ + SI_SUB_KLD, SI_ORDER_FIRST, \ + module_init_exit_wrapper, initfn) + +#define module_exit(exitfn) \ + SYSUNINIT(mod_exit_ ## exitfn, \ + SI_SUB_KLD, SI_ORDER_ANY, \ + module_init_exit_wrapper, exitfn) + +/* + * The usb_register and usb_deregister functions are used to register + * usb drivers with the usb subsystem. + */ +int usb_register(struct usb_driver *driver); +int usb_deregister(struct usb_driver *driver); + +/* + * usb_get_dev and usb_put_dev - increment/decrement the reference count + * of the usb device structure. + * + * Original body of usb_get_dev: + * + * if (dev) + * get_device(&dev->dev); + * return dev; + * + * Reference counts are not currently used in this compatibility + * layer. So these functions will do nothing. + */ +static inline struct usb_device * +usb_get_dev(struct usb_device *dev) +{ + return dev; +} + +static inline void +usb_put_dev(struct usb_device *dev) +{ + return; +} + + +// rtw_usb_compat_linux +int rtw_usb_submit_urb(struct urb *urb, uint16_t mem_flags); +int rtw_usb_unlink_urb(struct urb *urb); +int rtw_usb_clear_halt(struct usb_device *dev, struct usb_host_endpoint *uhe); +int rtw_usb_control_msg(struct usb_device *dev, struct usb_host_endpoint *uhe, + uint8_t request, uint8_t requesttype, + uint16_t value, uint16_t index, void *data, + uint16_t size, usb_timeout_t timeout); +int rtw_usb_set_interface(struct usb_device *dev, uint8_t iface_no, uint8_t alt_index); +int rtw_usb_setup_endpoint(struct usb_device *dev, + struct usb_host_endpoint *uhe, usb_size_t bufsize); +struct urb *rtw_usb_alloc_urb(uint16_t iso_packets, uint16_t mem_flags); +struct usb_host_endpoint *rtw_usb_find_host_endpoint(struct usb_device *dev, uint8_t type, uint8_t ep); +struct usb_host_interface *rtw_usb_altnum_to_altsetting(const struct usb_interface *intf, uint8_t alt_index); +struct usb_interface *rtw_usb_ifnum_to_if(struct usb_device *dev, uint8_t iface_no); +void *rtw_usbd_get_intfdata(struct usb_interface *intf); +void rtw_usb_linux_register(void *arg); +void rtw_usb_linux_deregister(void *arg); +void rtw_usb_linux_free_device(struct usb_device *dev); +void rtw_usb_free_urb(struct urb *urb); +void rtw_usb_init_urb(struct urb *urb); +void rtw_usb_kill_urb(struct urb *urb); +void rtw_usb_set_intfdata(struct usb_interface *intf, void *data); +void rtw_usb_fill_bulk_urb(struct urb *urb, struct usb_device *udev, + struct usb_host_endpoint *uhe, void *buf, + int length, usb_complete_t callback, void *arg); +int rtw_usb_bulk_msg(struct usb_device *udev, struct usb_host_endpoint *uhe, + void *data, int len, uint16_t *pactlen, usb_timeout_t timeout); +void *usb_get_intfdata(struct usb_interface *intf); +int usb_linux_init_endpoints(struct usb_device *udev); + + + +typedef struct urb * PURB; + +typedef unsigned gfp_t; +#define __GFP_WAIT ((gfp_t)0x10u) /* Can wait and reschedule? */ +#define __GFP_HIGH ((gfp_t)0x20u) /* Should access emergency pools? */ +#define __GFP_IO ((gfp_t)0x40u) /* Can start physical IO? */ +#define __GFP_FS ((gfp_t)0x80u) /* Can call down to low-level FS? */ +#define __GFP_COLD ((gfp_t)0x100u) /* Cache-cold page required */ +#define __GFP_NOWARN ((gfp_t)0x200u) /* Suppress page allocation failure warning */ +#define __GFP_REPEAT ((gfp_t)0x400u) /* Retry the allocation. Might fail */ +#define __GFP_NOFAIL ((gfp_t)0x800u) /* Retry for ever. Cannot fail */ +#define __GFP_NORETRY ((gfp_t)0x1000u)/* Do not retry. Might fail */ +#define __GFP_NO_GROW ((gfp_t)0x2000u)/* Slab internal usage */ +#define __GFP_COMP ((gfp_t)0x4000u)/* Add compound page metadata */ +#define __GFP_ZERO ((gfp_t)0x8000u)/* Return zeroed page on success */ +#define __GFP_NOMEMALLOC ((gfp_t)0x10000u) /* Don't use emergency reserves */ +#define __GFP_HARDWALL ((gfp_t)0x20000u) /* Enforce hardwall cpuset memory allocs */ + +/* This equals 0, but use constants in case they ever change */ +#define GFP_NOWAIT (GFP_ATOMIC & ~__GFP_HIGH) +/* GFP_ATOMIC means both !wait (__GFP_WAIT not set) and use emergency pool */ +#define GFP_ATOMIC (__GFP_HIGH) +#define GFP_NOIO (__GFP_WAIT) +#define GFP_NOFS (__GFP_WAIT | __GFP_IO) +#define GFP_KERNEL (__GFP_WAIT | __GFP_IO | __GFP_FS) +#define GFP_USER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL) +#define GFP_HIGHUSER (__GFP_WAIT | __GFP_IO | __GFP_FS | __GFP_HARDWALL | \ + __GFP_HIGHMEM) + + +#endif // kenny add Linux compatibility code for Linux USB + +__inline static _list *get_next(_list *list) +{ + return list->next; +} + +__inline static _list *get_list_head(_queue *queue) +{ + return (&(queue->queue)); +} + + +#define LIST_CONTAINOR(ptr, type, member) \ + ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) + + +__inline static void _enter_critical(_lock *plock, _irqL *pirqL) +{ + spin_lock_irqsave(plock, *pirqL); +} + +__inline static void _exit_critical(_lock *plock, _irqL *pirqL) +{ + spin_unlock_irqrestore(plock, *pirqL); +} + +__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) +{ + spin_lock_irqsave(plock, *pirqL); +} + +__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) +{ + spin_unlock_irqrestore(plock, *pirqL); +} + +__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) +{ + spin_lock_bh(plock, *pirqL); +} + +__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) +{ + spin_unlock_bh(plock, *pirqL); +} + +__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) +{ + + mtx_lock(pmutex); + +} + + +__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) +{ + + mtx_unlock(pmutex); + +} +static inline void __list_del(struct list_head * prev, struct list_head * next) +{ + next->prev = prev; + prev->next = next; +} +static inline void INIT_LIST_HEAD(struct list_head *list) +{ + list->next = list; + list->prev = list; +} +__inline static void rtw_list_delete(_list *plist) +{ + __list_del(plist->prev, plist->next); + INIT_LIST_HEAD(plist); +} + static inline void timer_hdl(void *ctx) { _timer *timer = (_timer *)ctx; @@ -690,67 +690,67 @@ static inline void _init_timer(_timer *ptimer, _nic_hdl padapter, void *pfunc, v callout_init(&ptimer->callout, CALLOUT_MPSAFE); } -__inline static void _set_timer(_timer *ptimer,u32 delay_time) -{ +__inline static void _set_timer(_timer *ptimer,u32 delay_time) +{ if (ptimer->function && ptimer->arg) { - rtw_mtx_lock(NULL); + rtw_mtx_lock(NULL); callout_reset(&ptimer->callout, delay_time, timer_hdl, ptimer); - rtw_mtx_unlock(NULL); - } -} - -__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) -{ - rtw_mtx_lock(NULL); - callout_drain(&ptimer->callout); - rtw_mtx_unlock(NULL); + rtw_mtx_unlock(NULL); + } +} + +__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) +{ + rtw_mtx_lock(NULL); + callout_drain(&ptimer->callout); + rtw_mtx_unlock(NULL); *bcancelled = 1; /* assume an pending timer to be canceled */ -} - -__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -{ - printf("%s Not implement yet! \n",__FUNCTION__); -} - -__inline static void _set_workitem(_workitem *pwork) -{ - printf("%s Not implement yet! \n",__FUNCTION__); -// schedule_work(pwork); -} - -// -// Global Mutex: can only be used at PASSIVE level. -// - -#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ -} - -#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ -} - -#define ATOMIC_INIT(i) { (i) } - -static __inline void thread_enter(char *name); - -//Atomic integer operations -typedef uint32_t ATOMIC_T ; - -#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) - -#define rtw_free_netdev(netdev) if_free((netdev)) - -#define NDEV_FMT "%s" -#define NDEV_ARG(ndev) "" -#define ADPT_FMT "%s" -#define ADPT_ARG(adapter) "" -#define FUNC_NDEV_FMT "%s" -#define FUNC_NDEV_ARG(ndev) __func__ -#define FUNC_ADPT_FMT "%s" -#define FUNC_ADPT_ARG(adapter) __func__ - -#define STRUCT_PACKED - -#endif - +} + +__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +{ + printf("%s Not implement yet! \n",__FUNCTION__); +} + +__inline static void _set_workitem(_workitem *pwork) +{ + printf("%s Not implement yet! \n",__FUNCTION__); +// schedule_work(pwork); +} + +// +// Global Mutex: can only be used at PASSIVE level. +// + +#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ +} + +#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ +} + +#define ATOMIC_INIT(i) { (i) } + +static __inline void thread_enter(char *name); + +//Atomic integer operations +typedef uint32_t ATOMIC_T ; + +#define rtw_netdev_priv(netdev) (((struct ifnet *)netdev)->if_softc) + +#define rtw_free_netdev(netdev) if_free((netdev)) + +#define NDEV_FMT "%s" +#define NDEV_ARG(ndev) "" +#define ADPT_FMT "%s" +#define ADPT_ARG(adapter) "" +#define FUNC_NDEV_FMT "%s" +#define FUNC_NDEV_ARG(ndev) __func__ +#define FUNC_ADPT_FMT "%s" +#define FUNC_ADPT_ARG(adapter) __func__ + +#define STRUCT_PACKED + +#endif + diff --git a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_ce.h b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_ce.h index ce4013dbd4ed96..a406d62e75c1a0 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_ce.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_ce.h @@ -12,113 +12,113 @@ * more details. * *****************************************************************************/ - -#ifndef __OSDEP_CE_SERVICE_H_ -#define __OSDEP_CE_SERVICE_H_ - - -#include -#include - -#ifdef CONFIG_SDIO_HCI -#include "SDCardDDK.h" -#endif - -#ifdef CONFIG_USB_HCI -#include -#endif - -typedef HANDLE _sema; -typedef LIST_ENTRY _list; -typedef NDIS_STATUS _OS_STATUS; - -typedef NDIS_SPIN_LOCK _lock; - -typedef HANDLE _rwlock; //Mutex - -typedef u32 _irqL; - -typedef NDIS_HANDLE _nic_hdl; - + +#ifndef __OSDEP_CE_SERVICE_H_ +#define __OSDEP_CE_SERVICE_H_ + + +#include +#include + +#ifdef CONFIG_SDIO_HCI +#include "SDCardDDK.h" +#endif + +#ifdef CONFIG_USB_HCI +#include +#endif + +typedef HANDLE _sema; +typedef LIST_ENTRY _list; +typedef NDIS_STATUS _OS_STATUS; + +typedef NDIS_SPIN_LOCK _lock; + +typedef HANDLE _rwlock; //Mutex + +typedef u32 _irqL; + +typedef NDIS_HANDLE _nic_hdl; + struct rtw_timer_list { NDIS_MINIPORT_TIMER ndis_timer; void (*function)(void *); void *arg; }; - -struct __queue { - LIST_ENTRY queue; - _lock lock; -}; - -typedef NDIS_PACKET _pkt; -typedef NDIS_BUFFER _buffer; -typedef struct __queue _queue; - -typedef HANDLE _thread_hdl_; -typedef DWORD thread_return; -typedef void* thread_context; -typedef NDIS_WORK_ITEM _workitem; - - - -#define SEMA_UPBND (0x7FFFFFFF) //8192 - -__inline static _list *get_prev(_list *list) -{ - return list->Blink; -} - -__inline static _list *get_next(_list *list) -{ - return list->Flink; -} - -__inline static _list *get_list_head(_queue *queue) -{ - return (&(queue->queue)); -} - -#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) - -__inline static void _enter_critical(_lock *plock, _irqL *pirqL) -{ - NdisAcquireSpinLock(plock); -} - -__inline static void _exit_critical(_lock *plock, _irqL *pirqL) -{ - NdisReleaseSpinLock(plock); -} - -__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) -{ - NdisDprAcquireSpinLock(plock); -} - -__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) -{ - NdisDprReleaseSpinLock(plock); -} - - -__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -{ - WaitForSingleObject(*prwlock, INFINITE ); - -} - -__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) -{ - ReleaseMutex(*prwlock); -} - -__inline static void rtw_list_delete(_list *plist) -{ - RemoveEntryList(plist); - InitializeListHead(plist); -} - + +struct __queue { + LIST_ENTRY queue; + _lock lock; +}; + +typedef NDIS_PACKET _pkt; +typedef NDIS_BUFFER _buffer; +typedef struct __queue _queue; + +typedef HANDLE _thread_hdl_; +typedef DWORD thread_return; +typedef void* thread_context; +typedef NDIS_WORK_ITEM _workitem; + + + +#define SEMA_UPBND (0x7FFFFFFF) //8192 + +__inline static _list *get_prev(_list *list) +{ + return list->Blink; +} + +__inline static _list *get_next(_list *list) +{ + return list->Flink; +} + +__inline static _list *get_list_head(_queue *queue) +{ + return (&(queue->queue)); +} + +#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) + +__inline static void _enter_critical(_lock *plock, _irqL *pirqL) +{ + NdisAcquireSpinLock(plock); +} + +__inline static void _exit_critical(_lock *plock, _irqL *pirqL) +{ + NdisReleaseSpinLock(plock); +} + +__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) +{ + NdisDprAcquireSpinLock(plock); +} + +__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) +{ + NdisDprReleaseSpinLock(plock); +} + + +__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) +{ + WaitForSingleObject(*prwlock, INFINITE ); + +} + +__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) +{ + ReleaseMutex(*prwlock); +} + +__inline static void rtw_list_delete(_list *plist) +{ + RemoveEntryList(plist); + InitializeListHead(plist); +} + static inline void timer_hdl( IN PVOID SystemSpecific1, IN PVOID FunctionContext, @@ -146,55 +146,55 @@ static inline void _cancel_timer(_timer *ptimer, u8 *bcancelled) { NdisMCancelTimer(ptimer, bcancelled); } - -__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -{ - - NdisInitializeWorkItem(pwork, pfunc, cntx); -} - -__inline static void _set_workitem(_workitem *pwork) -{ - NdisScheduleWorkItem(pwork); -} - -#define ATOMIC_INIT(i) { (i) } - -// -// Global Mutex: can only be used at PASSIVE level. -// - -#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ - { \ - NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ - NdisMSleep(10000); \ - } \ -} - -#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -} - -// limitation of path length -#define PATH_LENGTH_MAX MAX_PATH - -//Atomic integer operations -#define ATOMIC_T LONG - -#define NDEV_FMT "%s" -#define NDEV_ARG(ndev) "" -#define ADPT_FMT "%s" -#define ADPT_ARG(adapter) "" -#define FUNC_NDEV_FMT "%s" -#define FUNC_NDEV_ARG(ndev) __func__ -#define FUNC_ADPT_FMT "%s" -#define FUNC_ADPT_ARG(adapter) __func__ - -#define STRUCT_PACKED - - -#endif - + +__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +{ + + NdisInitializeWorkItem(pwork, pfunc, cntx); +} + +__inline static void _set_workitem(_workitem *pwork) +{ + NdisScheduleWorkItem(pwork); +} + +#define ATOMIC_INIT(i) { (i) } + +// +// Global Mutex: can only be used at PASSIVE level. +// + +#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ + while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ + { \ + NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ + NdisMSleep(10000); \ + } \ +} + +#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ + NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ +} + +// limitation of path length +#define PATH_LENGTH_MAX MAX_PATH + +//Atomic integer operations +#define ATOMIC_T LONG + +#define NDEV_FMT "%s" +#define NDEV_ARG(ndev) "" +#define ADPT_FMT "%s" +#define ADPT_ARG(adapter) "" +#define FUNC_NDEV_FMT "%s" +#define FUNC_NDEV_ARG(ndev) __func__ +#define FUNC_ADPT_FMT "%s" +#define FUNC_ADPT_ARG(adapter) __func__ + +#define STRUCT_PACKED + + +#endif + diff --git a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_linux.h b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_linux.h index 2f84f972d3150c..684d685d004b83 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_linux.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_linux.h @@ -16,6 +16,10 @@ #define __OSDEP_LINUX_SERVICE_H_ #include +#ifndef RHEL_RELEASE_CODE +#define RHEL_RELEASE_VERSION(a,b) (((a) << 8) + (b)) +#define RHEL_RELEASE_CODE 0 +#endif #include #include #include @@ -123,7 +127,7 @@ typedef struct urb *PURB; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22)) #ifdef CONFIG_USB_SUSPEND - #define CONFIG_AUTOSUSPEND 1 + #define CONFIG_AUTOSUSPEND 0 #endif #endif #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_xp.h b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_xp.h index fc44780da2b673..71dc1cd01ea6e4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_xp.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/osdep_service_xp.h @@ -12,122 +12,122 @@ * more details. * *****************************************************************************/ -#ifndef __OSDEP_LINUX_SERVICE_H_ -#define __OSDEP_LINUX_SERVICE_H_ - - #include - #include - #include - #include - -#ifdef CONFIG_USB_HCI - #include - #include - #include -#endif - - typedef KSEMAPHORE _sema; - typedef LIST_ENTRY _list; - typedef NDIS_STATUS _OS_STATUS; - - - typedef NDIS_SPIN_LOCK _lock; - - typedef KMUTEX _mutex; - - typedef KIRQL _irqL; - - // USB_PIPE for WINCE , but handle can be use just integer under windows - typedef NDIS_HANDLE _nic_hdl; - +#ifndef __OSDEP_LINUX_SERVICE_H_ +#define __OSDEP_LINUX_SERVICE_H_ + + #include + #include + #include + #include + +#ifdef CONFIG_USB_HCI + #include + #include + #include +#endif + + typedef KSEMAPHORE _sema; + typedef LIST_ENTRY _list; + typedef NDIS_STATUS _OS_STATUS; + + + typedef NDIS_SPIN_LOCK _lock; + + typedef KMUTEX _mutex; + + typedef KIRQL _irqL; + + // USB_PIPE for WINCE , but handle can be use just integer under windows + typedef NDIS_HANDLE _nic_hdl; + struct rtw_timer_list { NDIS_MINIPORT_TIMER ndis_timer; void (*function)(void *); void *arg; }; - - struct __queue { - LIST_ENTRY queue; - _lock lock; - }; - - typedef NDIS_PACKET _pkt; - typedef NDIS_BUFFER _buffer; - typedef struct __queue _queue; - - typedef PKTHREAD _thread_hdl_; - typedef void thread_return; - typedef void* thread_context; - - typedef NDIS_WORK_ITEM _workitem; - - - #define HZ 10000000 - #define SEMA_UPBND (0x7FFFFFFF) //8192 - -__inline static _list *get_next(_list *list) -{ - return list->Flink; -} - -__inline static _list *get_list_head(_queue *queue) -{ - return (&(queue->queue)); -} - - -#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) - - -__inline static _enter_critical(_lock *plock, _irqL *pirqL) -{ - NdisAcquireSpinLock(plock); -} - -__inline static _exit_critical(_lock *plock, _irqL *pirqL) -{ - NdisReleaseSpinLock(plock); -} - - -__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) -{ - NdisDprAcquireSpinLock(plock); -} - -__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) -{ - NdisDprReleaseSpinLock(plock); -} - -__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) -{ - NdisDprAcquireSpinLock(plock); -} - -__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) -{ - NdisDprReleaseSpinLock(plock); -} - -__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) -{ - KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); -} - - -__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) -{ - KeReleaseMutex(pmutex, FALSE); -} - - -__inline static void rtw_list_delete(_list *plist) -{ - RemoveEntryList(plist); - InitializeListHead(plist); -} - + + struct __queue { + LIST_ENTRY queue; + _lock lock; + }; + + typedef NDIS_PACKET _pkt; + typedef NDIS_BUFFER _buffer; + typedef struct __queue _queue; + + typedef PKTHREAD _thread_hdl_; + typedef void thread_return; + typedef void* thread_context; + + typedef NDIS_WORK_ITEM _workitem; + + + #define HZ 10000000 + #define SEMA_UPBND (0x7FFFFFFF) //8192 + +__inline static _list *get_next(_list *list) +{ + return list->Flink; +} + +__inline static _list *get_list_head(_queue *queue) +{ + return (&(queue->queue)); +} + + +#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) + + +__inline static _enter_critical(_lock *plock, _irqL *pirqL) +{ + NdisAcquireSpinLock(plock); +} + +__inline static _exit_critical(_lock *plock, _irqL *pirqL) +{ + NdisReleaseSpinLock(plock); +} + + +__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) +{ + NdisDprAcquireSpinLock(plock); +} + +__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) +{ + NdisDprReleaseSpinLock(plock); +} + +__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) +{ + NdisDprAcquireSpinLock(plock); +} + +__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) +{ + NdisDprReleaseSpinLock(plock); +} + +__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) +{ + KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); +} + + +__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) +{ + KeReleaseMutex(pmutex, FALSE); +} + + +__inline static void rtw_list_delete(_list *plist) +{ + RemoveEntryList(plist); + InitializeListHead(plist); +} + static inline void timer_hdl( IN PVOID SystemSpecific1, IN PVOID FunctionContext, @@ -155,56 +155,56 @@ static inline void _cancel_timer(_timer *ptimer, u8 *bcancelled) { NdisMCancelTimer(ptimer, bcancelled); } - -__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) -{ - - NdisInitializeWorkItem(pwork, pfunc, cntx); -} - -__inline static void _set_workitem(_workitem *pwork) -{ - NdisScheduleWorkItem(pwork); -} - - -#define ATOMIC_INIT(i) { (i) } - -// -// Global Mutex: can only be used at PASSIVE level. -// - -#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ - { \ - NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ - NdisMSleep(10000); \ - } \ -} - -#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ -{ \ - NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ -} - -// limitation of path length -#define PATH_LENGTH_MAX MAX_PATH - -//Atomic integer operations -#define ATOMIC_T LONG - - -#define NDEV_FMT "%s" -#define NDEV_ARG(ndev) "" -#define ADPT_FMT "%s" -#define ADPT_ARG(adapter) "" -#define FUNC_NDEV_FMT "%s" -#define FUNC_NDEV_ARG(ndev) __func__ -#define FUNC_ADPT_FMT "%s" -#define FUNC_ADPT_ARG(adapter) __func__ - -#define STRUCT_PACKED - -#endif - + +__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) +{ + + NdisInitializeWorkItem(pwork, pfunc, cntx); +} + +__inline static void _set_workitem(_workitem *pwork) +{ + NdisScheduleWorkItem(pwork); +} + + +#define ATOMIC_INIT(i) { (i) } + +// +// Global Mutex: can only be used at PASSIVE level. +// + +#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ + while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ + { \ + NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ + NdisMSleep(10000); \ + } \ +} + +#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ +{ \ + NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ +} + +// limitation of path length +#define PATH_LENGTH_MAX MAX_PATH + +//Atomic integer operations +#define ATOMIC_T LONG + + +#define NDEV_FMT "%s" +#define NDEV_ARG(ndev) "" +#define ADPT_FMT "%s" +#define ADPT_ARG(adapter) "" +#define FUNC_NDEV_FMT "%s" +#define FUNC_NDEV_ARG(ndev) __func__ +#define FUNC_ADPT_FMT "%s" +#define FUNC_ADPT_ARG(adapter) __func__ + +#define STRUCT_PACKED + +#endif + diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_cmd.h deleted file mode 100644 index aba0bec1476981..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_cmd.h +++ /dev/null @@ -1,165 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188E_CMD_H__ -#define __RTL8188E_CMD_H__ - -#if 0 -enum cmd_msg_element_id { - NONE_CMDMSG_EID, - AP_OFFLOAD_EID = 0, - SET_PWRMODE_EID = 1, - JOINBSS_RPT_EID = 2, - RSVD_PAGE_EID = 3, - RSSI_4_EID = 4, - RSSI_SETTING_EID = 5, - MACID_CONFIG_EID = 6, - MACID_PS_MODE_EID = 7, - P2P_PS_OFFLOAD_EID = 8, - SELECTIVE_SUSPEND_ROF_CMD = 9, - P2P_PS_CTW_CMD_EID = 32, - MAX_CMDMSG_EID -}; -#else -typedef enum _RTL8188E_H2C_CMD_ID { - /* Class Common */ - H2C_COM_RSVD_PAGE = 0x00, - H2C_COM_MEDIA_STATUS_RPT = 0x01, - H2C_COM_SCAN = 0x02, - H2C_COM_KEEP_ALIVE = 0x03, - H2C_COM_DISCNT_DECISION = 0x04, -#ifndef CONFIG_WOWLAN - H2C_COM_WWLAN = 0x05, -#endif - H2C_COM_INIT_OFFLOAD = 0x06, - H2C_COM_REMOTE_WAKE_CTL = 0x07, - H2C_COM_AP_OFFLOAD = 0x08, - H2C_COM_BCN_RSVD_PAGE = 0x09, - H2C_COM_PROB_RSP_RSVD_PAGE = 0x0A, - - /* Class PS */ - H2C_PS_PWR_MODE = 0x20, - H2C_PS_TUNE_PARA = 0x21, - H2C_PS_TUNE_PARA_2 = 0x22, - H2C_PS_LPS_PARA = 0x23, - H2C_PS_P2P_OFFLOAD = 0x24, - - /* Class DM */ - H2C_DM_MACID_CFG = 0x40, - H2C_DM_TXBF = 0x41, - H2C_RSSI_REPORT = 0x42, - /* Class BT */ - H2C_BT_COEX_MASK = 0x60, - H2C_BT_COEX_GPIO_MODE = 0x61, - H2C_BT_DAC_SWING_VAL = 0x62, - H2C_BT_PSD_RST = 0x63, - - /* Class Remote WakeUp */ -#ifdef CONFIG_WOWLAN - H2C_COM_WWLAN = 0x80, - H2C_COM_REMOTE_WAKE_CTRL = 0x81, - H2C_COM_AOAC_GLOBAL_INFO = 0x82, - H2C_COM_AOAC_RSVD_PAGE = 0x83, -#endif - - /* Class */ - /* H2C_RESET_TSF =0xc0, */ -} RTL8188E_H2C_CMD_ID; - -#endif - - -struct cmd_msg_parm { - u8 eid; /* element id */ - u8 sz; /* sz */ - u8 buf[6]; -}; - -enum { - PWRS -}; - -typedef struct _SETPWRMODE_PARM { - u8 Mode;/* 0:Active,1:LPS,2:WMMPS */ - /* u8 RLBM:4; */ /* 0:Min,1:Max,2: User define */ - u8 SmartPS_RLBM;/* LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData */ - u8 AwakeInterval; /* unit: beacon interval */ - u8 bAllQueueUAPSD; - u8 PwrState;/* AllON(0x0c),RFON(0x04),RFOFF(0x00) */ -} SETPWRMODE_PARM, *PSETPWRMODE_PARM; - -struct H2C_SS_RFOFF_PARAM { - u8 ROFOn; /* 1: on, 0:off */ - u16 gpio_period; /* unit: 1024 us */ -} __attribute__((packed)); - - -typedef struct JOINBSSRPT_PARM_88E { - u8 OpMode; /* RT_MEDIA_STATUS */ -#ifdef CONFIG_WOWLAN - u8 MacID; /* MACID */ -#endif /* CONFIG_WOWLAN */ -} JOINBSSRPT_PARM_88E, *PJOINBSSRPT_PARM_88E; - -#if 0 -/* move to hal_com_h2c.h */ -typedef struct _RSVDPAGE_LOC_88E { - u8 LocProbeRsp; - u8 LocPsPoll; - u8 LocNullData; - u8 LocQosNull; - u8 LocBTQosNull; -#ifdef CONFIG_WOWLAN - u8 LocRemoteCtrlInfo; - u8 LocArpRsp; - u8 LocNbrAdv; - u8 LocGTKRsp; - u8 LocGTKInfo; - u8 LocProbeReq; - u8 LocNetList; -#endif /* CONFIG_WOWLAN */ -} RSVDPAGE_LOC_88E, *PRSVDPAGE_LOC_88E; -#endif - -/* host message to firmware cmd */ -void rtl8188e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8188e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -s32 FillH2CCmd_88E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -/* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */ -u8 GetTxBufferRsvdPageNum8188E(_adapter *padapter, bool wowlan); - - -#ifdef CONFIG_P2P - void rtl8188e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -/* #define H2C_8188E_RSVDPAGE_LOC_LEN 5 */ -/* #define H2C_8188E_AOAC_RSVDPAGE_LOC_LEN 7 */ - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- - * */ -#if 0 - /* move to hal_com_h2c.h - * _RSVDPAGE_LOC_CMD_0x00 */ - #define SET_8188E_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - #define SET_8188E_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) - #define SET_8188E_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) - #define SET_8188E_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) - /* AOAC_RSVDPAGE_LOC_0x83 */ - #define SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd), 0, 8, __Value) - #define SET_8188E_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#endif -#endif/* __RTL8188E_CMD_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_hal.h deleted file mode 100644 index a344e491529ed3..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_hal.h +++ /dev/null @@ -1,316 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188E_HAL_H__ -#define __RTL8188E_HAL_H__ - -/* #include "hal_com.h" */ -#include "hal_data.h" - -/* include HAL Related header after HAL Related compiling flags */ -#include "rtl8188e_spec.h" -#include "Hal8188EPhyReg.h" -#include "Hal8188EPhyCfg.h" -#include "rtl8188e_rf.h" -#include "rtl8188e_dm.h" -#include "rtl8188e_recv.h" -#include "rtl8188e_xmit.h" -#include "rtl8188e_cmd.h" -#include "rtl8188e_led.h" -#include "Hal8188EPwrSeq.h" -#ifdef DBG_CONFIG_ERROR_DETECT - #include "rtl8188e_sreset.h" -#endif - -/* --------------------------------------------------------------------- */ -/* RTL8188E Power Configuration CMDs for USB/SDIO/PCIE interfaces */ -/* --------------------------------------------------------------------- */ -#define Rtl8188E_NIC_PWR_ON_FLOW rtl8188E_power_on_flow -#define Rtl8188E_NIC_RF_OFF_FLOW rtl8188E_radio_off_flow -#define Rtl8188E_NIC_DISABLE_FLOW rtl8188E_card_disable_flow -#define Rtl8188E_NIC_ENABLE_FLOW rtl8188E_card_enable_flow -#define Rtl8188E_NIC_SUSPEND_FLOW rtl8188E_suspend_flow -#define Rtl8188E_NIC_RESUME_FLOW rtl8188E_resume_flow -#define Rtl8188E_NIC_PDN_FLOW rtl8188E_hwpdn_flow -#define Rtl8188E_NIC_LPS_ENTER_FLOW rtl8188E_enter_lps_flow -#define Rtl8188E_NIC_LPS_LEAVE_FLOW rtl8188E_leave_lps_flow - - -#if 1 /* download firmware related data structure */ -#define MAX_FW_8188E_SIZE 0x8000 /* 32768, 32k / 16384, 16k */ - -#define FW_8188E_SIZE 0x4000 /* 16384, 16k */ -#define FW_8188E_SIZE_2 0x8000 /* 32768, 32k */ - -#define FW_8188E_START_ADDRESS 0x1000 -#define FW_8188E_END_ADDRESS 0x1FFF /* 0x5FFF */ - - -#define IS_FW_HEADER_EXIST_88E(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x88E0) - -typedef struct _RT_FIRMWARE_8188E { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[MAX_FW_8188E_SIZE]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8188E, *PRT_FIRMWARE_8188E; - -/* - * This structure must be cared byte-ordering - * */ - -typedef struct _RT_8188E_FIRMWARE_HDR { - /* 8-byte alinment required */ - - /* --- LONG WORD 0 ---- */ - u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ - u8 Category; /* AP/NIC and USB/PCI */ - u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ - u16 Version; /* FW Version */ - u8 Subversion; /* FW Subversion, default 0x00 */ - u16 Rsvd1; - - - /* --- LONG WORD 1 ---- */ - u8 Month; /* Release time Month field */ - u8 Date; /* Release time Date field */ - u8 Hour; /* Release time Hour field */ - u8 Minute; /* Release time Minute field */ - u16 RamCodeSize; /* The size of RAM code */ - u8 Foundry; - u8 Rsvd2; - - /* --- LONG WORD 2 ---- */ - u32 SvnIdx; /* The SVN entry index */ - u32 Rsvd3; - - /* --- LONG WORD 3 ---- */ - u32 Rsvd4; - u32 Rsvd5; -} RT_8188E_FIRMWARE_HDR, *PRT_8188E_FIRMWARE_HDR; -#endif /* download firmware related data structure */ - - -#define DRIVER_EARLY_INT_TIME_8188E 0x05 -#define BCN_DMA_ATIME_INT_TIME_8188E 0x02 - - -/* #define MAX_RX_DMA_BUFFER_SIZE_88E 0x2400 */ /* 9k for 88E nornal chip , */ /* MaxRxBuff=10k-max(TxReportSize(64*8), WOLPattern(16*24)) */ -#ifdef CONFIG_USB_HCI - #define RX_DMA_SIZE_88E(__Adapter) 0x2800 -#else - #define RX_DMA_SIZE_88E(__Adapter) ((!IS_VENDOR_8188E_I_CUT_SERIES(__Adapter))?0x2800:0x4000) -#endif - -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#define RX_DMA_RESERVD_FW_FEATURE 0x200 /* for tx report (64*8) */ - -#define MAX_RX_DMA_BUFFER_SIZE_88E(__Adapter) (RX_DMA_SIZE_88E(__Adapter)-RX_DMA_RESERVD_FW_FEATURE) - -#define MAX_TX_REPORT_BUFFER_SIZE 0x0400 /* 1k */ - -#define PAGE_SIZE_TX_88E PAGE_SIZE_128 -/* Note: We will divide number of page equally for each queue other than public queue! - * 22k = 22528 bytes = 176 pages (@page = 128 bytes) - * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_88E - * 1 ps-poll / 1 null-data /1 prob_rsp /1 QOS null-data = 4 pages */ - -#define BCNQ_PAGE_NUM_88E (MAX_BEACON_LEN / PAGE_SIZE_TX_88E + 4) /*0x09*/ - -/* For WoWLan , more reserved page */ -#ifdef CONFIG_WOWLAN - /* 1 ArpRsp + 2 NbrAdv + 2 NDPInfo + 1 RCI + 1 AOAC = 7 pages */ - #define WOWLAN_PAGE_NUM_88E 0x07 -#else - #define WOWLAN_PAGE_NUM_88E 0x00 -#endif - -/* Note: -Tx FIFO Size : previous CUT:22K /I_CUT after:32KB -Tx page Size : 128B -Total page numbers : 176(0xB0) / 256(0x100) -*/ -#ifdef CONFIG_USB_HCI - #define TOTAL_PAGE_NUMBER_88E(_Adapter) (0xB0 - 1) -#else - #define TOTAL_PAGE_NUMBER_88E(_Adapter) ((IS_VENDOR_8188E_I_CUT_SERIES(_Adapter)?0x100:0xB0) - 1)/* must reserved 1 page for dma issue */ -#endif -#define TX_TOTAL_PAGE_NUMBER_88E(_Adapter) (TOTAL_PAGE_NUMBER_88E(_Adapter) - BCNQ_PAGE_NUM_88E - WOWLAN_PAGE_NUM_88E) -#define TX_PAGE_BOUNDARY_88E(_Adapter) (TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) /* beacon header start address */ - -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) TX_TOTAL_PAGE_NUMBER_88E(_Adapter) -#define WMM_NORMAL_TX_PAGE_BOUNDARY_88E(_Adapter) (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_88E(_Adapter) + 1) - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B */ -#define NORMAL_PAGE_NUM_HPQ_88E 0x0 -#define NORMAL_PAGE_NUM_LPQ_88E 0x09 -#define NORMAL_PAGE_NUM_NPQ_88E 0x0 - -/* Note: For Normal Chip Setting, modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_88E 0x29 -#define WMM_NORMAL_PAGE_NUM_LPQ_88E 0x1C -#define WMM_NORMAL_PAGE_NUM_NPQ_88E 0x1C - - -/* ------------------------------------------------------------------------- - * Chip specific - * ------------------------------------------------------------------------- */ -#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22) & 0x3) -#define CHIP_BONDING_92C_1T2R 0x1 -#define CHIP_BONDING_88C_USB_MCARD 0x2 -#define CHIP_BONDING_88C_USB_HP 0x1 - -/* ------------------------------------------------------------------------- - * Channel Plan - * ------------------------------------------------------------------------- */ - - -#define EFUSE_REAL_CONTENT_LEN 512 -#define EFUSE_MAP_LEN 128 -#define EFUSE_MAX_SECTION 16 -#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) -/* - * - * To prevent out of boundary programming case, - * leave 1byte and program full section - * 9bytes + 1byt + 5bytes and pre 1byte. - * For worst case: - * | 1byte|----8bytes----|1byte|--5bytes--| - * | | Reserved(14bytes) | - * */ -#define EFUSE_OOB_PROTECT_BYTES 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */ - -#define EFUSE_REAL_CONTENT_LEN_88E 256 -#define EFUSE_MAP_LEN_88E 512 -#define EFUSE_MAX_SECTION_88E 64 -#define EFUSE_MAX_WORD_UNIT_88E 4 -#define EFUSE_IC_ID_OFFSET_88E 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -#define AVAILABLE_EFUSE_ADDR_88E(addr) (addr < EFUSE_REAL_CONTENT_LEN_88E) -/* To prevent out of boundary programming case, leave 1byte and program full section - * 9bytes + 1byt + 5bytes and pre 1byte. - * For worst case: - * | 2byte|----8bytes----|1byte|--7bytes--| */ /* 92D */ -#define EFUSE_OOB_PROTECT_BYTES_88E 18 /* PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. */ -#define EFUSE_PROTECT_BYTES_BANK_88E 16 - - -/* ******************************************************** - * EFUSE for BT definition - * ******************************************************** */ -#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ -#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ - -#define EFUSE_PROTECT_BYTES_BANK 16 - -#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -/* #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) */ - -/* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ - -#ifdef CONFIG_PCI_HCI - /* according to the define in the rtw_xmit.h, rtw_recv.h */ - #define TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ - #ifdef CONFIG_CONCURRENT_MODE - /*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM<<1)*/ /* 256 */ - #define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+(TXDESC_NUM>>1)) /* 320 */ - /*#define BE_QUEUE_TX_DESC_NUM_8188EE ((TXDESC_NUM<<1)+TXDESC_NUM)*/ /* 384 */ - #else - #define BE_QUEUE_TX_DESC_NUM_8188EE TXDESC_NUM /* 128 */ - /*#define BE_QUEUE_TX_DESC_NUM_8188EE (TXDESC_NUM+(TXDESC_NUM>>1)) */ /* 192 */ - #endif - - void InterruptRecognized8188EE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); - void UpdateInterruptMask8188EE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -#endif /* CONFIG_PCI_HCI */ - -/* rtl8188e_hal_init.c */ - -s32 rtl8188e_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -void _8051Reset88E(PADAPTER padapter); -void rtl8188e_InitializeFirmwareVars(PADAPTER padapter); - - -s32 InitLLTTable(PADAPTER padapter, u8 txpktbuf_bndy); - -/* EFuse */ -u8 GetEEPROMSize8188E(PADAPTER padapter); -void Hal_InitPGData88E(PADAPTER padapter); -void Hal_EfuseParseIDCode88E(PADAPTER padapter, u8 *hwinfo); -void Hal_ReadTxPowerInfo88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); - -void Hal_EfuseParseEEPROMVer88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void rtl8188e_EfuseParseChnlPlan(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseCustomerID88E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadAntennaDiversity88E(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -void Hal_ReadThermalMeter_88E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void Hal_EfuseParseXtal_8188E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseBoardType88E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadPowerSavingMode88E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadPAType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void Hal_ReadAmplifierType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void Hal_ReadRFEType_8188E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); - -BOOLEAN HalDetectPwrDownMode88E(PADAPTER Adapter); - -#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) - void Hal_DetectWoWMode(PADAPTER pAdapter); -#endif /* CONFIG_WOWLAN */ - - -#ifdef CONFIG_RF_POWER_TRIM - void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -#endif /*CONFIG_RF_POWER_TRIM*/ - - -void InitBeaconParameters_8188e(_adapter *adapter); -void SetBeaconRelatedRegisters8188E(PADAPTER padapter); - -void rtl8188e_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8188e(_adapter *adapter); - -void rtl8188e_start_thread(_adapter *padapter); -void rtl8188e_stop_thread(_adapter *padapter); - -void rtw_IOL_cmd_tx_pkt_buf_dump(ADAPTER *Adapter, int data_len); -#ifdef CONFIG_IOL_EFUSE_PATCH - s32 rtl8188e_iol_efuse_patch(PADAPTER padapter); -#endif/* CONFIG_IOL_EFUSE_PATCH */ -void _InitTransferPageSize(PADAPTER padapter); - -u8 SetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); -void GetHwReg8188E(PADAPTER padapter, u8 variable, u8 *val); - -u8 -GetHalDefVar8188E( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue -); -#ifdef CONFIG_GPIO_API -int rtl8188e_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); -#endif -#endif /* __RTL8188E_HAL_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_led.h deleted file mode 100644 index ef054675024a7b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_led.h +++ /dev/null @@ -1,37 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188E_LED_H__ -#define __RTL8188E_LED_H__ - -#ifdef CONFIG_RTW_SW_LED - -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI - void rtl8188eu_InitSwLeds(PADAPTER padapter); - void rtl8188eu_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_PCI_HCI - void rtl8188ee_InitSwLeds(PADAPTER padapter); - void rtl8188ee_DeInitSwLeds(PADAPTER padapter); -#endif -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - void rtl8188es_InitSwLeds(PADAPTER padapter); - void rtl8188es_DeInitSwLeds(PADAPTER padapter); -#endif - -#endif -#endif /*CONFIG_RTW_SW_LED*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_recv.h deleted file mode 100644 index 92425a859f5b4e..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_recv.h +++ /dev/null @@ -1,161 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188E_RECV_H__ -#define __RTL8188E_RECV_H__ - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ - -#elif defined(CONFIG_PCI_HCI) - /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ - /* #define MAX_RECVBUF_SZ (9100) */ - /* #else */ - #define MAX_RECVBUF_SZ (4000) /* about 4K - * #endif */ - - -#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - - #define MAX_RECVBUF_SZ (10240) - -#endif - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -#define TX_RPT1_PKT_LEN 8 - -typedef struct rxreport_8188e { - /* Offset 0 */ - u32 pktlen:14; - u32 crc32:1; - u32 icverr:1; - u32 drvinfosize:4; - u32 security:3; - u32 qos:1; - u32 shift:2; - u32 physt:1; - u32 swdec:1; - u32 ls:1; - u32 fs:1; - u32 eor:1; - u32 own:1; - - /* Offset 4 */ - u32 macid:5; - u32 tid:4; - u32 hwrsvd:4; - u32 amsdu:1; - u32 paggr:1; - u32 faggr:1; - u32 a1fit:4; - u32 a2fit:4; - u32 pam:1; - u32 pwr:1; - u32 md:1; - u32 mf:1; - u32 type:2; - u32 mc:1; - u32 bc:1; - - /* Offset 8 */ - u32 seq:12; - u32 frag:4; - u32 nextpktlen:14; - u32 nextind:1; - u32 rsvd0831:1; - - /* Offset 12 */ - u32 rxmcs:6; - u32 rxht:1; - u32 gf:1; - u32 splcp:1; - u32 bw:1; - u32 htc:1; - u32 eosp:1; - u32 bssidfit:2; - u32 rpt_sel:2; - u32 rsvd1216:13; - u32 pattern_match:1; - u32 unicastwake:1; - u32 magicwake:1; - - /* Offset 16 */ - /* - u32 pattern0match:1; - u32 pattern1match:1; - u32 pattern2match:1; - u32 pattern3match:1; - u32 pattern4match:1; - u32 pattern5match:1; - u32 pattern6match:1; - u32 pattern7match:1; - u32 pattern8match:1; - u32 pattern9match:1; - u32 patternamatch:1; - u32 patternbmatch:1; - u32 patterncmatch:1; - u32 rsvd1613:19; - */ - u32 rsvd16; - - /* Offset 20 */ - u32 tsfl; - - /* Offset 24 */ - u32 bassn:12; - u32 bavld:1; - u32 rsvd2413:19; -} RXREPORT, *PRXREPORT; - - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8188es_init_recv_priv(PADAPTER padapter); - void rtl8188es_free_recv_priv(PADAPTER padapter); -#endif - -#ifdef CONFIG_USB_HCI - void rtl8188eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); - s32 rtl8188eu_init_recv_priv(PADAPTER padapter); - void rtl8188eu_free_recv_priv(PADAPTER padapter); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8188ee_init_recv_priv(PADAPTER padapter); - void rtl8188ee_free_recv_priv(PADAPTER padapter); -#endif - -void rtl8188e_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *prxstat); - -#endif /* __RTL8188E_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_rf.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_rf.h deleted file mode 100644 index f5c5fbdfd19f11..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_rf.h +++ /dev/null @@ -1,27 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188E_RF_H__ -#define __RTL8188E_RF_H__ - - - -int PHY_RF6052_Config8188E(IN PADAPTER Adapter); -void rtl8188e_RF_ChangeTxPath(IN PADAPTER Adapter, - IN u16 DataRate); -void rtl8188e_PHY_RF6052SetBandwidth( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); - -#endif/* __RTL8188E_RF_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_spec.h deleted file mode 100644 index 802659a5fd0712..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_spec.h +++ /dev/null @@ -1,159 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188E_SPEC_H__ -#define __RTL8188E_SPEC_H__ - - -/* ************************************************************ - * 8188E Regsiter offset definition - * ************************************************************ */ - - -/* ************************************************************ - * - * ************************************************************ */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_BB_PAD_CTRL 0x0064 -#define REG_HMEBOX_E0 0x0088 -#define REG_HMEBOX_E1 0x008A -#define REG_HMEBOX_E2 0x008C -#define REG_HMEBOX_E3 0x008E -#define REG_HMEBOX_EXT_0 0x01F0 -#define REG_HMEBOX_EXT_1 0x01F4 -#define REG_HMEBOX_EXT_2 0x01F8 -#define REG_HMEBOX_EXT_3 0x01FC -#define REG_HIMR_88E 0x00B0 /* RTL8188E */ -#define REG_HISR_88E 0x00B4 /* RTL8188E */ -#define REG_HIMRE_88E 0x00B8 /* RTL8188E */ -#define REG_HISRE_88E 0x00BC /* RTL8188E */ - -#define REG_DBI_WDATA_8188E 0x0348 /* DBI Write data */ -#define REG_DBI_RDATA_8188E 0x034C /* DBI Read data */ -#define REG_DBI_ADDR_8188E 0x0350 /* DBI Address */ -#define REG_DBI_FLAG_8188E 0x0352 /* DBI Read/Write Flag */ -#define REG_MDIO_WDATA_8188E 0x0354 /* MDIO for Write PCIE PHY */ -#define REG_MDIO_RDATA_8188E 0x0356 /* MDIO for Reads PCIE PHY */ -#define REG_MDIO_CTL_8188E 0x0358 /* MDIO for Control */ - -#define REG_MACID_NO_LINK_0 0x0484 -#define REG_MACID_NO_LINK_1 0x0488 -#define REG_MACID_PAUSE_0 0x048c -#define REG_MACID_PAUSE_1 0x0490 - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_HRPWM_8188E 0x0361 /* PCIe RPWM */ -#define REG_PCIE_HCPWM_8188E 0x0363 /* PCIe CPWM */ - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#ifdef CONFIG_WOWLAN - #define REG_TXPKTBUF_IV_LOW 0x01a4 - #define REG_TXPKTBUF_IV_HIGH 0x01a8 -#endif - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ -#ifdef CONFIG_RF_POWER_TRIM - #define EEPROM_RF_GAIN_OFFSET 0xC1 - #define EEPROM_RF_GAIN_VAL 0xF6 - #define EEPROM_THERMAL_OFFSET 0xF5 -#endif /*CONFIG_RF_POWER_TRIM*/ -/* ---------------------------------------------------------------------------- - * 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits) - * ---------------------------------------------------------------------------- - * IOL config for REG_FDHM0(Reg0x88) */ -#define CMD_INIT_LLT BIT0 -#define CMD_READ_EFUSE_MAP BIT1 -#define CMD_EFUSE_PATCH BIT2 -#define CMD_IOCONFIG BIT3 -#define CMD_INIT_LLT_ERR BIT4 -#define CMD_READ_EFUSE_MAP_ERR BIT5 -#define CMD_EFUSE_PATCH_ERR BIT6 -#define CMD_IOCONFIG_ERR BIT7 - -/* ----------------------------------------------------- - * - * Redifine register definition for compatibility - * - * ----------------------------------------------------- */ - -/* TODO: use these definition when using REG_xxx naming rule. - * NOTE: DO NOT Remove these definition. Use later. */ -#define ISR_88E REG_HISR_88E - -#ifdef CONFIG_PCI_HCI - /* #define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E) */ - #define IMR_TX_MASK (IMR_VODOK_88E | IMR_VIDOK_88E | IMR_BEDOK_88E | IMR_BKDOK_88E | IMR_MGNTDOK_88E | IMR_HIGHDOK_88E | IMR_BCNDERR0_88E) - - #ifdef CONFIG_CONCURRENT_MODE - #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E) - #else - #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E) - #endif - - #define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E | IMR_BKDOK_88E) -#endif - -/* ---------------------------------------------------------------------------- - * 8192C EEPROM/EFUSE share register definition. - * ---------------------------------------------------------------------------- */ - -#define EFUSE_ACCESS_ON 0x69 /* For RTL8723 only. */ -#define EFUSE_ACCESS_OFF 0x00 /* For RTL8723 only. */ - -#endif /* __RTL8188E_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_sreset.h deleted file mode 100644 index f4ec2d88c32774..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_sreset.h +++ /dev/null @@ -1,24 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8188E_SRESET_H_ -#define _RTL8188E_SRESET_H_ - -#include - -#ifdef DBG_CONFIG_ERROR_DETECT - extern void rtl8188e_sreset_xmit_status_check(_adapter *padapter); - extern void rtl8188e_sreset_linked_status_check(_adapter *padapter); -#endif -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_xmit.h deleted file mode 100644 index f625576608cbc5..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188e_xmit.h +++ /dev/null @@ -1,295 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188E_XMIT_H__ -#define __RTL8188E_XMIT_H__ - - - - -/* For 88e early mode */ -#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) - -/* - * defined for TX DESC Operation - * */ - -#define MAX_TID (15) - -/* OFFSET 0 */ -#define OFFSET_SZ 0 -#define OFFSET_SHT 16 -#define BMC BIT(24) -#define LSG BIT(26) -#define FSG BIT(27) -#define OWN BIT(31) - - -/* OFFSET 4 */ -#define PKT_OFFSET_SZ 0 -#define QSEL_SHT 8 -#define RATE_ID_SHT 16 -#define NAVUSEHDR BIT(20) -#define SEC_TYPE_SHT 22 -#define PKT_OFFSET_SHT 26 - -/* OFFSET 8 */ -#define AGG_EN BIT(12) -#define AGG_BK BIT(16) -#define AMPDU_DENSITY_SHT 20 -#define ANTSEL_A BIT(24) -#define ANTSEL_B BIT(25) -#define TX_ANT_CCK_SHT 26 -#define TX_ANTL_SHT 28 -#define TX_ANT_HT_SHT 30 - -/* OFFSET 12 */ -#define SEQ_SHT 16 -#define EN_HWSEQ BIT(31) - -/* OFFSET 16 */ -#define QOS BIT(6) -#define HW_SSN BIT(7) -#define USERATE BIT(8) -#define DISDATAFB BIT(10) -#define CTS_2_SELF BIT(11) -#define RTS_EN BIT(12) -#define HW_RTS_EN BIT(13) -#define DATA_SHORT BIT(24) -#define PWR_STATUS_SHT 15 -#define DATA_SC_SHT 20 -#define DATA_BW BIT(25) - -/* OFFSET 20 */ -#define RTY_LMT_EN BIT(17) - - -/* OFFSET 20 */ -#define SGI BIT(6) -#define USB_TXAGG_NUM_SHT 24 - -typedef struct txdesc_88e { - /* Offset 0 */ - u32 pktlen:16; - u32 offset:8; - u32 bmc:1; - u32 htc:1; - u32 ls:1; - u32 fs:1; - u32 linip:1; - u32 noacm:1; - u32 gf:1; - u32 own:1; - - /* Offset 4 */ - u32 macid:6; - u32 rsvd0406:2; - u32 qsel:5; - u32 rd_nav_ext:1; - u32 lsig_txop_en:1; - u32 pifs:1; - u32 rate_id:4; - u32 navusehdr:1; - u32 en_desc_id:1; - u32 sectype:2; - u32 rsvd0424:2; - u32 pkt_offset:5; /* unit: 8 bytes */ - u32 rsvd0431:1; - - /* Offset 8 */ - u32 rts_rc:6; - u32 data_rc:6; - u32 agg_en:1; - u32 rd_en:1; - u32 bar_rty_th:2; - u32 bk:1; - u32 morefrag:1; - u32 raw:1; - u32 ccx:1; - u32 ampdu_density:3; - u32 bt_null:1; - u32 ant_sel_a:1; - u32 ant_sel_b:1; - u32 tx_ant_cck:2; - u32 tx_antl:2; - u32 tx_ant_ht:2; - - /* Offset 12 */ - u32 nextheadpage:8; - u32 tailpage:8; - u32 seq:12; - u32 cpu_handle:1; - u32 tag1:1; - u32 trigger_int:1; - u32 hwseq_en:1; - - /* Offset 16 */ - u32 rtsrate:5; - u32 ap_dcfe:1; - u32 hwseq_sel:2; - u32 userate:1; - u32 disrtsfb:1; - u32 disdatafb:1; - u32 cts2self:1; - u32 rtsen:1; - u32 hw_rts_en:1; - u32 port_id:1; - u32 pwr_status:3; - u32 wait_dcts:1; - u32 cts2ap_en:1; - u32 data_sc:2; - u32 data_stbc:2; - u32 data_short:1; - u32 data_bw:1; - u32 rts_short:1; - u32 rts_bw:1; - u32 rts_sc:2; - u32 vcs_stbc:2; - - /* Offset 20 */ - u32 datarate:6; - u32 sgi:1; - u32 try_rate:1; - u32 data_ratefb_lmt:5; - u32 rts_ratefb_lmt:4; - u32 rty_lmt_en:1; - u32 data_rt_lmt:6; - u32 usb_txagg_num:8; - - /* Offset 24 */ - u32 txagg_a:5; - u32 txagg_b:5; - u32 use_max_len:1; - u32 max_agg_num:5; - u32 mcsg1_max_len:4; - u32 mcsg2_max_len:4; - u32 mcsg3_max_len:4; - u32 mcs7_sgi_max_len:4; - - /* Offset 28 */ - u32 checksum:16; /* TxBuffSize(PCIe)/CheckSum(USB) */ - u32 sw0:8; /* offset 30 */ - u32 sw1:4; - u32 mcs15_sgi_max_len:4; -} TXDESC_8188E, *PTXDESC_8188E; - -#define txdesc_set_ccx_sw_88e(txdesc, value) \ - do { \ - ((struct txdesc_88e *)(txdesc))->sw1 = (((value)>>8) & 0x0f); \ - ((struct txdesc_88e *)(txdesc))->sw0 = ((value) & 0xff); \ - } while (0) - -struct txrpt_ccx_88e { - /* offset 0 */ - u8 tag1:1; - u8 pkt_num:3; - u8 txdma_underflow:1; - u8 int_bt:1; - u8 int_tri:1; - u8 int_ccx:1; - - /* offset 1 */ - u8 mac_id:6; - u8 pkt_ok:1; - u8 bmc:1; - - /* offset 2 */ - u8 retry_cnt:6; - u8 lifetime_over:1; - u8 retry_over:1; - - /* offset 3 */ - u8 ccx_qtime0; - u8 ccx_qtime1; - - /* offset 5 */ - u8 final_data_rate; - - /* offset 6 */ - u8 sw1:4; - u8 qsel:4; - - /* offset 7 */ - u8 sw0; -}; - -#define txrpt_ccx_sw_88e(txrpt_ccx) ((txrpt_ccx)->sw0 + ((txrpt_ccx)->sw1<<8)) -#define txrpt_ccx_qtime_88e(txrpt_ccx) ((txrpt_ccx)->ccx_qtime0+((txrpt_ccx)->ccx_qtime1<<8)) - -#define SET_TX_DESC_SEC_TYPE_8188E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) - -void rtl8188e_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, - u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -void rtl8188e_cal_txdesc_chksum(struct tx_desc *ptxdesc); -#if defined(CONFIG_CONCURRENT_MODE) - void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -#endif - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8188es_init_xmit_priv(PADAPTER padapter); - void rtl8188es_free_xmit_priv(PADAPTER padapter); - s32 rtl8188es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8188es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8188es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - thread_return rtl8188es_xmit_thread(thread_context context); - s32 rtl8188es_xmit_buf_handler(PADAPTER padapter); - - #ifdef CONFIG_SDIO_TX_TASKLET - void rtl8188es_xmit_tasklet(void *priv); - #endif -#endif - -#ifdef CONFIG_USB_HCI - s32 rtl8188eu_init_xmit_priv(PADAPTER padapter); - void rtl8188eu_free_xmit_priv(PADAPTER padapter); - s32 rtl8188eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8188eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8188eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8188eu_xmit_buf_handler(PADAPTER padapter); - void rtl8188eu_xmit_tasklet(void *priv); - s32 rtl8188eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8188ee_init_xmit_priv(PADAPTER padapter); - void rtl8188ee_free_xmit_priv(PADAPTER padapter); - void rtl8188ee_xmitframe_resume(_adapter *padapter); - s32 rtl8188ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8188ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8188ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8188ee_xmit_tasklet(void *priv); -#endif - - - -#ifdef CONFIG_TX_EARLY_MODE - void UpdateEarlyModeInfo8188E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -#endif - -#ifdef CONFIG_XMIT_ACK - void dump_txrpt_ccx_88e(void *buf); - void handle_txrpt_ccx_88e(_adapter *adapter, u8 *buf); -#else - #define dump_txrpt_ccx_88e(buf) do {} while (0) - #define handle_txrpt_ccx_88e(adapter, buf) do {} while (0) -#endif /* CONFIG_XMIT_ACK */ - -void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -#endif /* __RTL8188E_XMIT_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_cmd.h deleted file mode 100644 index 5e1bc9adfe6cd0..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_cmd.h +++ /dev/null @@ -1,206 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188F_CMD_H__ -#define __RTL8188F_CMD_H__ - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ - * --------------------------------------------------------------------------------------------------------- */ - -enum h2c_cmd_8188F { - /* Common Class: 000 */ - H2C_8188F_RSVD_PAGE = 0x00, - H2C_8188F_MEDIA_STATUS_RPT = 0x01, - H2C_8188F_SCAN_ENABLE = 0x02, - H2C_8188F_KEEP_ALIVE = 0x03, - H2C_8188F_DISCON_DECISION = 0x04, - H2C_8188F_PSD_OFFLOAD = 0x05, - H2C_8188F_AP_OFFLOAD = 0x08, - H2C_8188F_BCN_RSVDPAGE = 0x09, - H2C_8188F_PROBERSP_RSVDPAGE = 0x0A, - H2C_8188F_FCS_RSVDPAGE = 0x10, - H2C_8188F_FCS_INFO = 0x11, - H2C_8188F_AP_WOW_GPIO_CTRL = 0x13, - - /* PoweSave Class: 001 */ - H2C_8188F_SET_PWR_MODE = 0x20, - H2C_8188F_PS_TUNING_PARA = 0x21, - H2C_8188F_PS_TUNING_PARA2 = 0x22, - H2C_8188F_P2P_LPS_PARAM = 0x23, - H2C_8188F_P2P_PS_OFFLOAD = 0x24, - H2C_8188F_PS_SCAN_ENABLE = 0x25, - H2C_8188F_SAP_PS_ = 0x26, - H2C_8188F_INACTIVE_PS_ = 0x27, /* Inactive_PS */ - H2C_8188F_FWLPS_IN_IPS_ = 0x28, - - /* Dynamic Mechanism Class: 010 */ - H2C_8188F_MACID_CFG = 0x40, - H2C_8188F_TXBF = 0x41, - H2C_8188F_RSSI_SETTING = 0x42, - H2C_8188F_AP_REQ_TXRPT = 0x43, - H2C_8188F_INIT_RATE_COLLECT = 0x44, - H2C_8188F_RA_PARA_ADJUST = 0x46, - - /* BT Class: 011 */ - H2C_8188F_B_TYPE_TDMA = 0x60, - H2C_8188F_BT_INFO = 0x61, - H2C_8188F_FORCE_BT_TXPWR = 0x62, - H2C_8188F_BT_IGNORE_WLANACT = 0x63, - H2C_8188F_DAC_SWING_VALUE = 0x64, - H2C_8188F_ANT_SEL_RSV = 0x65, - H2C_8188F_WL_OPMODE = 0x66, - H2C_8188F_BT_MP_OPER = 0x67, - H2C_8188F_BT_CONTROL = 0x68, - H2C_8188F_BT_WIFI_CTRL = 0x69, - H2C_8188F_BT_FW_PATCH = 0x6A, - H2C_8188F_BT_WLAN_CALIBRATION = 0x6D, - - /* WOWLAN Class: 100 */ - H2C_8188F_WOWLAN = 0x80, - H2C_8188F_REMOTE_WAKE_CTRL = 0x81, - H2C_8188F_AOAC_GLOBAL_INFO = 0x82, - H2C_8188F_AOAC_RSVD_PAGE = 0x83, - H2C_8188F_AOAC_RSVD_PAGE2 = 0x84, - H2C_8188F_D0_SCAN_OFFLOAD_CTRL = 0x85, - H2C_8188F_D0_SCAN_OFFLOAD_INFO = 0x86, - H2C_8188F_CHNL_SWITCH_OFFLOAD = 0x87, - H2C_8188F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, - H2C_8188F_P2P_OFFLOAD = 0x8B, - - H2C_8188F_RESET_TSF = 0xC0, - H2C_8188F_MAXID, -}; - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- - * _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_8188F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8188F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_8188F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8188F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8188F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -/* _KEEP_ALIVE_CMD_0x03 */ -#define SET_8188F_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8188F_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8188F_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_8188F_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _DISCONNECT_DECISION_CMD_0x04 */ -#define SET_8188F_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8188F_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8188F_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8188F_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) - -/* _PWR_MOD_CMD_0x20 */ -#define SET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8188F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -#define SET_8188F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -#define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8188F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8188F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -#define SET_8188F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -#define GET_8188F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) - -/* _PS_TUNE_PARAM_CMD_0x21 */ -#define SET_8188F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8188F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -#define SET_8188F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -#define SET_8188F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _MACID_CFG_CMD_0x40 */ -#define SET_8188F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -#define SET_8188F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) - -/* _RSSI_SETTING_CMD_0x42 */ -#define SET_8188F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8188F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -#define SET_8188F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _AP_REQ_TXRPT_CMD_0x43 */ -#define SET_8188F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8188F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _FORCE_BT_TXPWR_CMD_0x62 */ -#define SET_8188F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - -/* _FORCE_BT_MP_OPER_CMD_0x67 */ -#define SET_8188F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -#define SET_8188F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -#define SET_8188F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8188F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -#define SET_8188F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8188F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) - -/* _BT_FW_PATCH_0x6A */ -#define SET_8188F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) -#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8188F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) - - -/* --------------------------------------------------------------------------------------------------------- - * ------------------------------------------- Structure -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- Function Statement -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - -/* host message to firmware cmd */ -void rtl8188f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8188f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -void rtl8188f_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); -/* s32 rtl8188f_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -void rtl8188f_set_FwPsTuneParam_cmd(PADAPTER padapter); -void rtl8188f_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); -void rtl8188f_download_rsvd_page(PADAPTER padapter, u8 mstatus); -#ifdef CONFIG_BT_COEXIST - void rtl8188f_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -#endif /* CONFIG_BT_COEXIST */ -#ifdef CONFIG_P2P -void rtl8188f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -#ifdef CONFIG_TDLS -#ifdef CONFIG_TDLS_CH_SW -void rtl8188f_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); -#endif -#endif - -#ifdef CONFIG_P2P_WOWLAN -void rtl8188f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -#endif - -void rtl8188f_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); - -s32 FillH2CCmd8188F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -u8 GetTxBufferRsvdPageNum8188F(_adapter *padapter, bool wowlan); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_dm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_dm.h deleted file mode 100644 index 342ade9a515c6a..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_dm.h +++ /dev/null @@ -1,39 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188F_DM_H__ -#define __RTL8188F_DM_H__ -/* ************************************************************ - * Description: - * - * This file is for 8188F dynamic mechanism only - * - * - * ************************************************************ */ - -/* ************************************************************ - * structure and define - * ************************************************************ */ - -/* ************************************************************ - * function prototype - * ************************************************************ */ - -void rtl8188f_init_dm_priv(PADAPTER padapter); -void rtl8188f_deinit_dm_priv(PADAPTER padapter); - -void rtl8188f_InitHalDm(PADAPTER padapter); -void rtl8188f_HalDmWatchDog(PADAPTER padapter); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_hal.h deleted file mode 100644 index 9d5da6a36a9682..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_hal.h +++ /dev/null @@ -1,260 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188F_HAL_H__ -#define __RTL8188F_HAL_H__ - -#include "hal_data.h" - -#include "rtl8188f_spec.h" -#include "rtl8188f_rf.h" -#include "rtl8188f_dm.h" -#include "rtl8188f_recv.h" -#include "rtl8188f_xmit.h" -#include "rtl8188f_cmd.h" -#include "rtl8188f_led.h" -#include "Hal8188FPwrSeq.h" -#include "Hal8188FPhyReg.h" -#include "Hal8188FPhyCfg.h" -#ifdef DBG_CONFIG_ERROR_DETECT -#include "rtl8188f_sreset.h" -#endif - -#define FW_8188F_SIZE 0x8000 -#define FW_8188F_START_ADDRESS 0x1000 -#define FW_8188F_END_ADDRESS 0x1FFF /* 0x5FFF */ - -#define IS_FW_HEADER_EXIST_8188F(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x88F0) - -typedef struct _RT_FIRMWARE { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[FW_8188F_SIZE]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8188F, *PRT_FIRMWARE_8188F; - -/* - * This structure must be cared byte-ordering - * - * Added by tynli. 2009.12.04. */ -typedef struct _RT_8188F_FIRMWARE_HDR { - /* 8-byte alinment required */ - - /* --- LONG WORD 0 ---- */ - u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ - u8 Category; /* AP/NIC and USB/PCI */ - u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ - u16 Version; /* FW Version */ - u16 Subversion; /* FW Subversion, default 0x00 */ - - /* --- LONG WORD 1 ---- */ - u8 Month; /* Release time Month field */ - u8 Date; /* Release time Date field */ - u8 Hour; /* Release time Hour field */ - u8 Minute; /* Release time Minute field */ - u16 RamCodeSize; /* The size of RAM code */ - u16 Rsvd2; - - /* --- LONG WORD 2 ---- */ - u32 SvnIdx; /* The SVN entry index */ - u32 Rsvd3; - - /* --- LONG WORD 3 ---- */ - u32 Rsvd4; - u32 Rsvd5; -} RT_8188F_FIRMWARE_HDR, *PRT_8188F_FIRMWARE_HDR; - -#define DRIVER_EARLY_INT_TIME_8188F 0x05 -#define BCN_DMA_ATIME_INT_TIME_8188F 0x02 - -/* for 8188F - * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -#define PAGE_SIZE_TX_8188F 128 -#define PAGE_SIZE_RX_8188F 8 - -#define RX_DMA_SIZE_8188F 0x4000 /* 16K */ -#ifdef CONFIG_FW_C2H_DEBUG - #define RX_DMA_RESERVED_SIZE_8188F 0x100 /* 256B, reserved for c2h debug message */ -#else - #define RX_DMA_RESERVED_SIZE_8188F 0x80 /* 128B, reserved for tx report */ -#endif - -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#define RX_DMA_BOUNDARY_8188F (RX_DMA_SIZE_8188F - RX_DMA_RESERVED_SIZE_8188F - 1) - -/* Note: We will divide number of page equally for each queue other than public queue! */ - -/* For General Reserved Page Number(Beacon Queue is reserved page) - * BCN rsvd_page_num = MAX_BEACON_LEN / PAGE_SIZE_TX_8188F, - * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1, CTS-2-SELF / LTE QoS Null */ - -#define BCNQ_PAGE_NUM_8188F (MAX_BEACON_LEN / PAGE_SIZE_TX_8188F + 6) /*0x08*/ - -/* For WoWLan , more reserved page - * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt:1 ,PNO: 6 - * NS offload:2 NDP info: 1 - */ -#ifdef CONFIG_WOWLAN - #define WOWLAN_PAGE_NUM_8188F 0x0b -#else - #define WOWLAN_PAGE_NUM_8188F 0x00 -#endif - -#ifdef CONFIG_PNO_SUPPORT -#undef WOWLAN_PAGE_NUM_8188F -#define WOWLAN_PAGE_NUM_8188F 0x15 -#endif - -#ifdef CONFIG_AP_WOWLAN -#define AP_WOWLAN_PAGE_NUM_8188F 0x02 -#endif - -#define TX_TOTAL_PAGE_NUMBER_8188F (0xFF - BCNQ_PAGE_NUM_8188F - WOWLAN_PAGE_NUM_8188F) -#define TX_PAGE_BOUNDARY_8188F (TX_TOTAL_PAGE_NUMBER_8188F + 1) - -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F TX_TOTAL_PAGE_NUMBER_8188F -#define WMM_NORMAL_TX_PAGE_BOUNDARY_8188F (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8188F + 1) - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8188F */ -#define NORMAL_PAGE_NUM_HPQ_8188F 0x0C -#define NORMAL_PAGE_NUM_LPQ_8188F 0x02 -#define NORMAL_PAGE_NUM_NPQ_8188F 0x02 - -/* Note: For Normal Chip Setting, modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_8188F 0x30 -#define WMM_NORMAL_PAGE_NUM_LPQ_8188F 0x20 -#define WMM_NORMAL_PAGE_NUM_NPQ_8188F 0x20 - - -#include "HalVerDef.h" -#include "hal_com.h" - -#define EFUSE_OOB_PROTECT_BYTES (34 + 1) - -#define HAL_EFUSE_MEMORY - -#define HWSET_MAX_SIZE_8188F 512 -#define EFUSE_REAL_CONTENT_LEN_8188F 256 -#define EFUSE_MAP_LEN_8188F 512 -#define EFUSE_MAX_SECTION_8188F (EFUSE_MAP_LEN_8188F / 8) - -#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8188F) - -#define EFUSE_ACCESS_ON 0x69 /* For RTL8188 only. */ -#define EFUSE_ACCESS_OFF 0x00 /* For RTL8188 only. */ - -/* ******************************************************** - * EFUSE for BT definition - * ******************************************************** */ -#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ -#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ - -#define EFUSE_PROTECT_BYTES_BANK 16 - -#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -/* rtl8188a_hal_init.c */ -s32 rtl8188f_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -void rtl8188f_FirmwareSelfReset(PADAPTER padapter); -void rtl8188f_InitializeFirmwareVars(PADAPTER padapter); - -void rtl8188f_InitAntenna_Selection(PADAPTER padapter); -void rtl8188f_DeinitAntenna_Selection(PADAPTER padapter); -void rtl8188f_CheckAntenna_Selection(PADAPTER padapter); -void rtl8188f_init_default_value(PADAPTER padapter); - -s32 rtl8188f_InitLLTTable(PADAPTER padapter); - -s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -s32 CardDisableWithoutHWSM(PADAPTER padapter); - -/* EFuse */ -u8 GetEEPROMSize8188F(PADAPTER padapter); -void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -void Hal_EfuseParseTxPowerInfo_8188F(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -/* void Hal_EfuseParseBTCoexistInfo_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); */ -void Hal_EfuseParseEEPROMVer_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseChnlPlan_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseCustomerID_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParsePowerSavingMode_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseAntennaDiversity_8188F(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseXtal_8188F(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -void Hal_EfuseParseThermalMeter_8188F(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -void Hal_EfuseParseKFreeData_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); - -#if 0 /* Do not need for rtl8188f */ -VOID Hal_EfuseParseVoltage_8188F(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -#endif - -void rtl8188f_set_pll_ref_clk_sel(_adapter *adapter, u8 sel); - -void rtl8188f_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8188f(_adapter *adapter); -u8 SetHwReg8188F(PADAPTER padapter, u8 variable, u8 *val); -void GetHwReg8188F(PADAPTER padapter, u8 variable, u8 *val); -u8 SetHalDefVar8188F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -u8 GetHalDefVar8188F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); - -/* register */ -void rtl8188f_InitBeaconParameters(PADAPTER padapter); -void rtl8188f_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -void _InitBurstPktLen_8188FS(PADAPTER Adapter); -void _8051Reset8188(PADAPTER padapter); -#ifdef CONFIG_WOWLAN -void Hal_DetectWoWMode(PADAPTER pAdapter); -#endif /* CONFIG_WOWLAN */ - -void rtl8188f_start_thread(_adapter *padapter); -void rtl8188f_stop_thread(_adapter *padapter); - -#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) - void rtl8188fs_init_checkbthang_workqueue(_adapter *adapter); - void rtl8188fs_free_checkbthang_workqueue(_adapter *adapter); - void rtl8188fs_cancle_checkbthang_workqueue(_adapter *adapter); - void rtl8188fs_hal_check_bt_hang(_adapter *adapter); -#endif - -#ifdef CONFIG_GPIO_WAKEUP -void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -#endif - -#ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -#endif - -void CCX_FwC2HTxRpt_8188f(PADAPTER padapter, u8 *pdata, u8 len); - -u8 MRateToHwRate8188F(u8 rate); -u8 HwRateToMRate8188F(u8 rate); - -#ifdef CONFIG_PCI_HCI -BOOLEAN InterruptRecognized8188FE(PADAPTER Adapter); -VOID UpdateInterruptMask8188FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -#endif - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_led.h deleted file mode 100644 index ef5d1a7761a850..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_led.h +++ /dev/null @@ -1,45 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188F_LED_H__ -#define __RTL8188F_LED_H__ -#ifdef CONFIG_RTW_SW_LED - -#include -#include -#include - - -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI -void rtl8188fu_InitSwLeds(PADAPTER padapter); -void rtl8188fu_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_SDIO_HCI -void rtl8188fs_InitSwLeds(PADAPTER padapter); -void rtl8188fs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_GSPI_HCI -void rtl8188fs_InitSwLeds(PADAPTER padapter); -void rtl8188fs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_PCI_HCI -void rtl8188fe_InitSwLeds(PADAPTER padapter); -void rtl8188fe_DeInitSwLeds(PADAPTER padapter); -#endif - -#endif -#endif/*CONFIG_RTW_SW_LED*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_recv.h deleted file mode 100644 index 6366b81052745c..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_recv.h +++ /dev/null @@ -1,68 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188F_RECV_H__ -#define __RTL8188F_RECV_H__ - -#if defined(CONFIG_USB_HCI) - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifdef CONFIG_MINIMAL_MEMORY_USAGE - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #else - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #elif defined(CONFIG_PLATFORM_HISILICON) - #define MAX_RECVBUF_SZ (16384) /* 16k */ - #else - #define MAX_RECVBUF_SZ (32768) /* 32k */ - #endif - /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ -#elif defined(CONFIG_PCI_HCI) - #define MAX_RECVBUF_SZ (4000) /* about 4K */ -#elif defined(CONFIG_SDIO_HCI) - #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8188F + 1) -#endif /* CONFIG_SDIO_HCI */ - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -s32 rtl8188fs_init_recv_priv(PADAPTER padapter); -void rtl8188fs_free_recv_priv(PADAPTER padapter); -s32 rtl8188fs_recv_hdl(_adapter *padapter); -#endif - -#ifdef CONFIG_USB_HCI -int rtl8188fu_init_recv_priv(_adapter *padapter); -void rtl8188fu_free_recv_priv(_adapter *padapter); -void rtl8188fu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -#endif - -#ifdef CONFIG_PCI_HCI -s32 rtl8188fe_init_recv_priv(PADAPTER padapter); -void rtl8188fe_free_recv_priv(PADAPTER padapter); -#endif - -void rtl8188f_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); - -#endif /* __RTL8188F_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_spec.h deleted file mode 100644 index d947ba80062737..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_spec.h +++ /dev/null @@ -1,275 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188F_SPEC_H__ -#define __RTL8188F_SPEC_H__ - -#include - - -#define HAL_NAV_UPPER_UNIT_8188F 128 /* micro-second */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_RSV_CTRL_8188F 0x001C /* 3 Byte */ -#define REG_BT_WIFI_ANTENNA_SWITCH_8188F 0x0038 -#define REG_HSISR_8188F 0x005c -#define REG_PAD_CTRL1_8188F 0x0064 -#define REG_AFE_CTRL_4_8188F 0x0078 -#define REG_HMEBOX_DBG_0_8188F 0x0088 -#define REG_HMEBOX_DBG_1_8188F 0x008A -#define REG_HMEBOX_DBG_2_8188F 0x008C -#define REG_HMEBOX_DBG_3_8188F 0x008E -#define REG_HIMR0_8188F 0x00B0 -#define REG_HISR0_8188F 0x00B4 -#define REG_HIMR1_8188F 0x00B8 -#define REG_HISR1_8188F 0x00BC -#define REG_PMC_DBG_CTRL2_8188F 0x00CC - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_C2HEVT_CMD_ID_8188F 0x01A0 -#define REG_C2HEVT_CMD_LEN_8188F 0x01AE -#define REG_WOWLAN_WAKE_REASON 0x01C7 -#define REG_WOWLAN_GTK_DBG1 0x630 -#define REG_WOWLAN_GTK_DBG2 0x634 - -#define REG_HMEBOX_EXT0_8188F 0x01F0 -#define REG_HMEBOX_EXT1_8188F 0x01F4 -#define REG_HMEBOX_EXT2_8188F 0x01F8 -#define REG_HMEBOX_EXT3_8188F 0x01FC - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RXDMA_CONTROL_8188F 0x0286 /* Control the RX DMA. */ -#define REG_RXDMA_MODE_CTRL_8188F 0x0290 - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_CTRL_REG_8188F 0x0300 -#define REG_INT_MIG_8188F 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_DESA_8188F 0x0308 /* TX Beacon Descriptor Address */ -#define REG_HQ_DESA_8188F 0x0310 /* TX High Queue Descriptor Address */ -#define REG_MGQ_DESA_8188F 0x0318 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_DESA_8188F 0x0320 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_DESA_8188F 0x0328 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_DESA_8188F 0x0330 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_DESA_8188F 0x0338 /* TX BK Queue Descriptor Address */ -#define REG_RX_DESA_8188F 0x0340 /* RX Queue Descriptor Address */ -#define REG_DBI_WDATA_8188F 0x0348 /* DBI Write Data */ -#define REG_DBI_RDATA_8188F 0x034C /* DBI Read Data */ -#define REG_DBI_ADDR_8188F 0x0350 /* DBI Address */ -#define REG_DBI_FLAG_8188F 0x0352 /* DBI Read/Write Flag */ -#define REG_MDIO_WDATA_8188F 0x0354 /* MDIO for Write PCIE PHY */ -#define REG_MDIO_RDATA_8188F 0x0356 /* MDIO for Reads PCIE PHY */ -#define REG_MDIO_CTL_8188F 0x0358 /* MDIO for Control */ -#define REG_DBG_SEL_8188F 0x0360 /* Debug Selection Register */ -#define REG_PCIE_HRPWM_8188F 0x0361 /* PCIe RPWM */ -#define REG_PCIE_HCPWM_8188F 0x0363 /* PCIe CPWM */ -#define REG_PCIE_MULTIFET_CTRL_8188F 0x036A /* PCIE Multi-Fethc Control */ - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#define REG_TXPKTBUF_BCNQ_BDNY_8188F 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY_8188F 0x0425 -#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8188F 0x045D -#ifdef CONFIG_WOWLAN -#define REG_TXPKTBUF_IV_LOW 0x0484 -#define REG_TXPKTBUF_IV_HIGH 0x0488 -#endif -#define REG_AMPDU_BURST_MODE_8188F 0x04BC - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ -#define REG_SECONDARY_CCA_CTRL_8188F 0x0577 - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ - - -/* ************************************************************ - * SDIO Bus Specification - * ************************************************************ */ - -/* ----------------------------------------------------- - * SDIO CMD Address Mapping - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * I/O bus domain (Host) - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * SDIO register - * ----------------------------------------------------- */ -#define SDIO_REG_HIQ_FREEPG_8188F 0x0020 -#define SDIO_REG_MID_FREEPG_8188F 0x0022 -#define SDIO_REG_LOW_FREEPG_8188F 0x0024 -#define SDIO_REG_PUB_FREEPG_8188F 0x0026 -#define SDIO_REG_EXQ_FREEPG_8188F 0x0028 -#define SDIO_REG_AC_OQT_FREEPG_8188F 0x002A -#define SDIO_REG_NOAC_OQT_FREEPG_8188F 0x002B - -#define SDIO_REG_HCPWM1_8188F 0x0038 - -/* **************************************************************************** - * 8188 Regsiter Bit and Content definition - * **************************************************************************** */ - -/* 2 HSISR - * interrupt mask which needs to clear */ -#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ - HSISR_SPS_OCP_INT |\ - HSISR_RON_INT |\ - HSISR_PDNINT |\ - HSISR_GPIO9_INT) - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ - - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define BIT_USB_RXDMA_AGG_EN BIT(31) -#define RXDMA_AGG_MODE_EN BIT(1) - -#ifdef CONFIG_WOWLAN -#define RXPKT_RELEASE_POLL BIT(16) -#define RXDMA_IDLE BIT(17) -#define RW_RELEASE_EN BIT(18) -#endif - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ - -/* ---------------------------------------------------------------------------- - * 8188F REG_CCK_CHECK (offset 0x454) - * ---------------------------------------------------------------------------- */ -#define BIT_BCN_PORT_SEL BIT(5) - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ - -/* ---------------------------------------------------------------------------- - * 8195 IMR/ISR bits (offset 0xB0, 8bits) - * ---------------------------------------------------------------------------- */ -#define IMR_DISABLED_8188F 0 -/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -#define IMR_TIMER2_8188F BIT(31) /* Timeout interrupt 2 */ -#define IMR_TIMER1_8188F BIT(30) /* Timeout interrupt 1 */ -#define IMR_PSTIMEOUT_8188F BIT(29) /* Power Save Time Out Interrupt */ -#define IMR_GTINT4_8188F BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -#define IMR_GTINT3_8188F BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -#define IMR_TXBCN0ERR_8188F BIT(26) /* Transmit Beacon0 Error */ -#define IMR_TXBCN0OK_8188F BIT(25) /* Transmit Beacon0 OK */ -#define IMR_TSF_BIT32_TOGGLE_8188F BIT(24) /* TSF Timer BIT(32) toggle indication interrupt */ -#define IMR_BCNDMAINT0_8188F BIT(20) /* Beacon DMA Interrupt 0 */ -#define IMR_BCNDERR0_8188F BIT(16) /* Beacon Queue DMA OK0 */ -#define IMR_HSISR_IND_ON_INT_8188F BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -#define IMR_BCNDMAINT_E_8188F BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -#define IMR_ATIMEND_8188F BIT(12) /* CTWidnow End or ATIM Window End */ -#define IMR_C2HCMD_8188F BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -#define IMR_CPWM2_8188F BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_CPWM_8188F BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_HIGHDOK_8188F BIT(7) /* High Queue DMA OK */ -#define IMR_MGNTDOK_8188F BIT(6) /* Management Queue DMA OK */ -#define IMR_BKDOK_8188F BIT(5) /* AC_BK DMA OK */ -#define IMR_BEDOK_8188F BIT(4) /* AC_BE DMA OK */ -#define IMR_VIDOK_8188F BIT(3) /* AC_VI DMA OK */ -#define IMR_VODOK_8188F BIT(2) /* AC_VO DMA OK */ -#define IMR_RDU_8188F BIT(1) /* Rx Descriptor Unavailable */ -#define IMR_ROK_8188F BIT(0) /* Receive DMA OK */ - -/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -#define IMR_BCNDMAINT7_8188F BIT(27) /* Beacon DMA Interrupt 7 */ -#define IMR_BCNDMAINT6_8188F BIT(26) /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5_8188F BIT(25) /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4_8188F BIT(24) /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3_8188F BIT(23) /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2_8188F BIT(22) /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1_8188F BIT(21) /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDOK7_8188F BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -#define IMR_BCNDOK6_8188F BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -#define IMR_BCNDOK5_8188F BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -#define IMR_BCNDOK4_8188F BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -#define IMR_BCNDOK3_8188F BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -#define IMR_BCNDOK2_8188F BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -#define IMR_BCNDOK1_8188F BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -#define IMR_ATIMEND_E_8188F BIT(13) /* ATIM Window End Extension for Win7 */ -#define IMR_TXERR_8188F BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -#define IMR_RXERR_8188F BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -#define IMR_TXFOVW_8188F BIT(9) /* Transmit FIFO Overflow */ -#define IMR_RXFOVW_8188F BIT(8) /* Receive FIFO Overflow */ - -#ifdef CONFIG_PCI_HCI -/* #define IMR_RX_MASK (IMR_ROK_8188F|IMR_RDU_8188F|IMR_RXFOVW_8188F) */ -#define IMR_TX_MASK (IMR_VODOK_8188F | IMR_VIDOK_8188F | IMR_BEDOK_8188F | IMR_BKDOK_8188F | IMR_MGNTDOK_8188F | IMR_HIGHDOK_8188F) - -#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8188F | IMR_TXBCN0OK_8188F | IMR_TXBCN0ERR_8188F | IMR_BCNDERR0_8188F) - -#define RT_AC_INT_MASKS (IMR_VIDOK_8188F | IMR_VODOK_8188F | IMR_BEDOK_8188F | IMR_BKDOK_8188F) -#endif - -#endif /* __RTL8188F_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_xmit.h deleted file mode 100644 index 40493ce9775baa..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8188f_xmit.h +++ /dev/null @@ -1,336 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8188F_XMIT_H__ -#define __RTL8188F_XMIT_H__ - - -#define MAX_TID (15) - - -#ifndef __INC_HAL8188FDESC_H -#define __INC_HAL8188FDESC_H - -#define RX_STATUS_DESC_SIZE_8188F 24 -#define RX_DRV_INFO_SIZE_UNIT_8188F 8 - - -/* DWORD 0 */ -#define SET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -#define SET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) - -#define GET_RX_STATUS_DESC_PKT_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -#define GET_RX_STATUS_DESC_CRC32_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -#define GET_RX_STATUS_DESC_ICV_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -#define GET_RX_STATUS_DESC_SECURITY_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -#define GET_RX_STATUS_DESC_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -#define GET_RX_STATUS_DESC_SHIFT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -#define GET_RX_STATUS_DESC_PHY_STATUS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -#define GET_RX_STATUS_DESC_SWDEC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -#define GET_RX_STATUS_DESC_LAST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) -#define GET_RX_STATUS_DESC_FIRST_SEG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) -#define GET_RX_STATUS_DESC_EOR_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -#define GET_RX_STATUS_DESC_OWN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) - -/* DWORD 1 */ -#define GET_RX_STATUS_DESC_MACID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -#define GET_RX_STATUS_DESC_TID_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -#define GET_RX_STATUS_DESC_AMSDU_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -#define GET_RX_STATUS_DESC_RXID_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -#define GET_RX_STATUS_DESC_PAGGR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -#define GET_RX_STATUS_DESC_A1_FIT_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -#define GET_RX_STATUS_DESC_CHKERR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -#define GET_RX_STATUS_DESC_IPVER_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -#define GET_RX_STATUS_DESC_IS_TCPUDP__8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -#define GET_RX_STATUS_DESC_CHK_VLD_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -#define GET_RX_STATUS_DESC_PAM_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -#define GET_RX_STATUS_DESC_PWR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -#define GET_RX_STATUS_DESC_MORE_DATA_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -#define GET_RX_STATUS_DESC_MORE_FRAG_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -#define GET_RX_STATUS_DESC_TYPE_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -#define GET_RX_STATUS_DESC_MC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -#define GET_RX_STATUS_DESC_BC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) - -/* DWORD 2 */ -#define GET_RX_STATUS_DESC_SEQ_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -#define GET_RX_STATUS_DESC_FRAG_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -#define GET_RX_STATUS_DESC_RX_IS_QOS_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -#define GET_RX_STATUS_DESC_RPT_SEL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) - -/* DWORD 3 */ -#define GET_RX_STATUS_DESC_RX_RATE_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -#define GET_RX_STATUS_DESC_HTC_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -#define GET_RX_STATUS_DESC_EOSP_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -#define GET_RX_STATUS_DESC_BSSID_FIT_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -#ifdef CONFIG_USB_RX_AGGREGATION -#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -#endif -#define GET_RX_STATUS_DESC_PATTERN_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -#define GET_RX_STATUS_DESC_UNICAST_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -#define GET_RX_STATUS_DESC_MAGIC_MATCH_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) - -/* DWORD 6 */ -#define GET_RX_STATUS_DESC_SPLCP_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) -#define GET_RX_STATUS_DESC_LDPC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) -#define GET_RX_STATUS_DESC_STBC_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) -#define GET_RX_STATUS_DESC_BW_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) - -/* DWORD 5 */ -#define GET_RX_STATUS_DESC_TSFL_8188F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) - -#define GET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -#define GET_RX_STATUS_DESC_BUFF_ADDR64_8188F(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) - -#define SET_RX_STATUS_DESC_BUFF_ADDR_8188F(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) - - -/* Dword 0 */ -#define GET_TX_DESC_OWN_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) - -#define SET_TX_DESC_PKT_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -#define SET_TX_DESC_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -#define SET_TX_DESC_BMC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -#define SET_TX_DESC_HTC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -#define SET_TX_DESC_LAST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -#define SET_TX_DESC_FIRST_SEG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -#define SET_TX_DESC_LINIP_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -#define SET_TX_DESC_NO_ACM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -#define SET_TX_DESC_GF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -#define SET_TX_DESC_OWN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) - -/* Dword 1 */ -#define SET_TX_DESC_MACID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -#define SET_TX_DESC_QUEUE_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -#define SET_TX_DESC_RDG_NAV_EXT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -#define SET_TX_DESC_LSIG_TXOP_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -#define SET_TX_DESC_PIFS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -#define SET_TX_DESC_RATE_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -#define SET_TX_DESC_EN_DESC_ID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -#define SET_TX_DESC_SEC_TYPE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -#define SET_TX_DESC_PKT_OFFSET_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) - - -/* Dword 2 */ -#define SET_TX_DESC_PAID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -#define SET_TX_DESC_CCA_RTS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -#define SET_TX_DESC_AGG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -#define SET_TX_DESC_RDG_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -#define SET_TX_DESC_AGG_BREAK_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -#define SET_TX_DESC_MORE_FRAG_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -#define SET_TX_DESC_RAW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -#define SET_TX_DESC_SPE_RPT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -#define SET_TX_DESC_AMPDU_DENSITY_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -#define SET_TX_DESC_BT_INT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -#define SET_TX_DESC_GID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) - - -/* Dword 3 */ -#define SET_TX_DESC_WHEADER_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -#define SET_TX_DESC_CHK_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -#define SET_TX_DESC_EARLY_MODE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -#define SET_TX_DESC_HWSEQ_SEL_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -#define SET_TX_DESC_USE_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -#define SET_TX_DESC_DISABLE_RTS_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -#define SET_TX_DESC_DISABLE_FB_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -#define SET_TX_DESC_CTS2SELF_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -#define SET_TX_DESC_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -#define SET_TX_DESC_HW_RTS_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -#define SET_TX_DESC_NAV_USE_HDR_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -#define SET_TX_DESC_USE_MAX_LEN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -#define SET_TX_DESC_MAX_AGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -#define SET_TX_DESC_NDPA_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -#define SET_TX_DESC_AMPDU_MAX_TIME_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) - -/* Dword 4 */ -#define SET_TX_DESC_TX_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -#define SET_TX_DESC_DATA_RETRY_LIMIT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -#define SET_TX_DESC_RTS_RATE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) - - -/* Dword 5 */ -#define SET_TX_DESC_DATA_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -#define SET_TX_DESC_DATA_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -#define SET_TX_DESC_DATA_BW_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -#define SET_TX_DESC_DATA_LDPC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -#define SET_TX_DESC_DATA_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -#define SET_TX_DESC_CTROL_STBC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -#define SET_TX_DESC_RTS_SHORT_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -#define SET_TX_DESC_RTS_SC_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) - - -/* Dword 6 */ -#define SET_TX_DESC_SW_DEFINE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -#define SET_TX_DESC_MBSSID_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -#define SET_TX_DESC_ANTSEL_A_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -#define SET_TX_DESC_ANTSEL_B_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -#define SET_TX_DESC_ANTSEL_C_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -#define SET_TX_DESC_ANTSEL_D_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) - -/* Dword 7 */ -#ifdef CONFIG_PCI_HCI -#define SET_TX_DESC_TX_BUFFER_SIZE_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) -#define SET_TX_DESC_TX_DESC_CHECKSUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif -#define SET_TX_DESC_USB_TXAGG_NUM_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) -#ifdef CONFIG_SDIO_HCI -#define SET_TX_DESC_SDIO_TXSEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) -#endif - -/* Dword 8 */ -#define SET_TX_DESC_HWSEQ_EN_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) - -/* Dword 9 */ -#define SET_TX_DESC_SEQ_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) - -/* Dword 10 */ -#define SET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) -#define GET_TX_DESC_TX_BUFFER_ADDRESS_8188F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) - -/* Dword 11 */ -#define SET_TX_DESC_NEXT_DESC_ADDRESS_8188F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) - - -#define SET_EARLYMODE_PKTNUM_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -#define SET_EARLYMODE_LEN0_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -#define SET_EARLYMODE_LEN1_1_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -#define SET_EARLYMODE_LEN1_2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -#define SET_EARLYMODE_LEN2_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -#define SET_EARLYMODE_LEN3_8188F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) - -#endif -/* ----------------------------------------------------------- - * - * Rate - * - * ----------------------------------------------------------- - * CCK Rates, TxHT = 0 */ -#define DESC8188F_RATE1M 0x00 -#define DESC8188F_RATE2M 0x01 -#define DESC8188F_RATE5_5M 0x02 -#define DESC8188F_RATE11M 0x03 - -/* OFDM Rates, TxHT = 0 */ -#define DESC8188F_RATE6M 0x04 -#define DESC8188F_RATE9M 0x05 -#define DESC8188F_RATE12M 0x06 -#define DESC8188F_RATE18M 0x07 -#define DESC8188F_RATE24M 0x08 -#define DESC8188F_RATE36M 0x09 -#define DESC8188F_RATE48M 0x0a -#define DESC8188F_RATE54M 0x0b - -/* MCS Rates, TxHT = 1 */ -#define DESC8188F_RATEMCS0 0x0c -#define DESC8188F_RATEMCS1 0x0d -#define DESC8188F_RATEMCS2 0x0e -#define DESC8188F_RATEMCS3 0x0f -#define DESC8188F_RATEMCS4 0x10 -#define DESC8188F_RATEMCS5 0x11 -#define DESC8188F_RATEMCS6 0x12 -#define DESC8188F_RATEMCS7 0x13 -#define DESC8188F_RATEMCS8 0x14 -#define DESC8188F_RATEMCS9 0x15 -#define DESC8188F_RATEMCS10 0x16 -#define DESC8188F_RATEMCS11 0x17 -#define DESC8188F_RATEMCS12 0x18 -#define DESC8188F_RATEMCS13 0x19 -#define DESC8188F_RATEMCS14 0x1a -#define DESC8188F_RATEMCS15 0x1b -#define DESC8188F_RATEVHTSS1MCS0 0x2c -#define DESC8188F_RATEVHTSS1MCS1 0x2d -#define DESC8188F_RATEVHTSS1MCS2 0x2e -#define DESC8188F_RATEVHTSS1MCS3 0x2f -#define DESC8188F_RATEVHTSS1MCS4 0x30 -#define DESC8188F_RATEVHTSS1MCS5 0x31 -#define DESC8188F_RATEVHTSS1MCS6 0x32 -#define DESC8188F_RATEVHTSS1MCS7 0x33 -#define DESC8188F_RATEVHTSS1MCS8 0x34 -#define DESC8188F_RATEVHTSS1MCS9 0x35 -#define DESC8188F_RATEVHTSS2MCS0 0x36 -#define DESC8188F_RATEVHTSS2MCS1 0x37 -#define DESC8188F_RATEVHTSS2MCS2 0x38 -#define DESC8188F_RATEVHTSS2MCS3 0x39 -#define DESC8188F_RATEVHTSS2MCS4 0x3a -#define DESC8188F_RATEVHTSS2MCS5 0x3b -#define DESC8188F_RATEVHTSS2MCS6 0x3c -#define DESC8188F_RATEVHTSS2MCS7 0x3d -#define DESC8188F_RATEVHTSS2MCS8 0x3e -#define DESC8188F_RATEVHTSS2MCS9 0x3f - - -#define RX_HAL_IS_CCK_RATE_8188F(pDesc)\ - (GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE1M || \ - GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE2M || \ - GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE5_5M || \ - GET_RX_STATUS_DESC_RX_RATE_8188F(pDesc) == DESC8188F_RATE11M) - - -void rtl8188f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -void rtl8188f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -#if defined(CONFIG_CONCURRENT_MODE) -void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -#endif - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) -s32 rtl8188fs_init_xmit_priv(PADAPTER padapter); -void rtl8188fs_free_xmit_priv(PADAPTER padapter); -s32 rtl8188fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -s32 rtl8188fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -s32 rtl8188fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -s32 rtl8188fs_xmit_buf_handler(PADAPTER padapter); -thread_return rtl8188fs_xmit_thread(thread_context context); -#define hal_xmit_handler rtl8188fs_xmit_buf_handler -#endif - -#ifdef CONFIG_USB_HCI -#ifdef CONFIG_XMIT_THREAD_MODE -s32 rtl8188fu_xmit_buf_handler(PADAPTER padapter); -#define hal_xmit_handler rtl8188fu_xmit_buf_handler -#endif - -s32 rtl8188fu_init_xmit_priv(PADAPTER padapter); -void rtl8188fu_free_xmit_priv(PADAPTER padapter); -s32 rtl8188fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -s32 rtl8188fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -s32 rtl8188fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -/* s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); */ -void rtl8188fu_xmit_tasklet(void *priv); -s32 rtl8188fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -#endif - -#ifdef CONFIG_PCI_HCI -s32 rtl8188fe_init_xmit_priv(PADAPTER padapter); -void rtl8188fe_free_xmit_priv(PADAPTER padapter); -struct xmit_buf *rtl8188fe_dequeue_xmitbuf(struct rtw_tx_ring *ring); -void rtl8188fe_xmitframe_resume(_adapter *padapter); -s32 rtl8188fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); -s32 rtl8188fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); -s32 rtl8188fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); -void rtl8188fe_xmit_tasklet(void *priv); -#endif - -u8 BWMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); -u8 SCMapping_8188F(PADAPTER Adapter, struct pkt_attrib *pattrib); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_cmd.h deleted file mode 100644 index 5efdf997ae634b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_cmd.h +++ /dev/null @@ -1,147 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_CMD_H__ -#define __RTL8192E_CMD_H__ - -typedef enum _RTL8192E_H2C_CMD { - H2C_8192E_RSVDPAGE = 0x00, - H2C_8192E_MSRRPT = 0x01, - H2C_8192E_SCAN = 0x02, - H2C_8192E_KEEP_ALIVE_CTRL = 0x03, - H2C_8192E_DISCONNECT_DECISION = 0x04, - H2C_8192E_INIT_OFFLOAD = 0x06, - H2C_8192E_AP_OFFLOAD = 0x08, - H2C_8192E_BCN_RSVDPAGE = 0x09, - H2C_8192E_PROBERSP_RSVDPAGE = 0x0a, - - H2C_8192E_AP_WOW_GPIO_CTRL = 0x13, - - H2C_8192E_SETPWRMODE = 0x20, - H2C_8192E_PS_TUNING_PARA = 0x21, - H2C_8192E_PS_TUNING_PARA2 = 0x22, - H2C_8192E_PS_LPS_PARA = 0x23, - H2C_8192E_P2P_PS_OFFLOAD = 0x24, - H2C_8192E_SAP_PS = 0x26, - H2C_8192E_RA_MASK = 0x40, - H2C_8192E_RSSI_REPORT = 0x42, - H2C_8192E_RA_PARA_ADJUST = 0x46, - - H2C_8192E_WO_WLAN = 0x80, - H2C_8192E_REMOTE_WAKE_CTRL = 0x81, - H2C_8192E_AOAC_GLOBAL_INFO = 0x82, - H2C_8192E_AOAC_RSVDPAGE = 0x83, - - /* Not defined in new 88E H2C CMD Format */ - H2C_8192E_SELECTIVE_SUSPEND_ROF_CMD, - H2C_8192E_P2P_PS_MODE, - H2C_8192E_PSD_RESULT, - MAX_8192E_H2CCMD -} RTL8192E_H2C_CMD; - -struct cmd_msg_parm { - u8 eid; /* element id */ - u8 sz; /* sz */ - u8 buf[6]; -}; - -enum { - PWRS -}; - -typedef struct _SETPWRMODE_PARM { - u8 Mode;/* 0:Active,1:LPS,2:WMMPS */ - /* u8 RLBM:4; */ /* 0:Min,1:Max,2: User define */ - u8 SmartPS_RLBM;/* LPS=0:PS_Poll,1:PS_Poll,2:NullData,WMM=0:PS_Poll,1:NullData */ - u8 AwakeInterval; /* unit: beacon interval */ - u8 bAllQueueUAPSD; - u8 PwrState;/* AllON(0x0c),RFON(0x04),RFOFF(0x00) */ -} SETPWRMODE_PARM, *PSETPWRMODE_PARM; - -struct H2C_SS_RFOFF_PARAM { - u8 ROFOn; /* 1: on, 0:off */ - u16 gpio_period; /* unit: 1024 us */ -} __attribute__((packed)); - - -typedef struct JOINBSSRPT_PARM_92E { - u8 OpMode; /* RT_MEDIA_STATUS */ -#ifdef CONFIG_WOWLAN - u8 MacID; /* MACID */ -#endif /* CONFIG_WOWLAN */ -} JOINBSSRPT_PARM_92E, *PJOINBSSRPT_PARM_92E; - -/* move to hal_com_h2c.h -typedef struct _RSVDPAGE_LOC_92E { - u8 LocProbeRsp; - u8 LocPsPoll; - u8 LocNullData; - u8 LocQosNull; - u8 LocBTQosNull; -} RSVDPAGE_LOC_92E, *PRSVDPAGE_LOC_92E; -*/ - - -/* _SETPWRMODE_PARM */ -#define SET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8192E_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -#define SET_8192E_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8192E_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8192E_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -#define SET_8192E_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define GET_8192E_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) - -/* _P2P_PS_OFFLOAD */ -#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_CTWINDOW_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA0_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) -#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_NOA1_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) -#define SET_8192E_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) - - -/* host message to firmware cmd */ -void rtl8192e_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8192e_set_FwJoinBssReport_cmd(PADAPTER padapter, u8 mstatus); -s32 FillH2CCmd_8192E(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -u8 GetTxBufferRsvdPageNum8192E(_adapter *padapter, bool wowlan); -/* u8 rtl8192c_set_FwSelectSuspend_cmd(PADAPTER padapter, u8 bfwpoll, u16 period); */ -s32 c2h_handler_8192e(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload); -#ifdef CONFIG_BT_COEXIST - void rtl8192e_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -#endif /* CONFIG_BT_COEXIST */ -#ifdef CONFIG_P2P_PS - void rtl8192e_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -#ifdef CONFIG_TDLS - #ifdef CONFIG_TDLS_CH_SW - void rtl8192e_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); - #endif -#endif - -/* / TX Feedback Content */ -#define USEC_UNIT_FOR_8192E_C2H_TX_RPT_QUEUE_TIME 256 - -#define GET_8192E_C2H_TX_RPT_QUEUE_SELECT(_Header) LE_BITS_TO_1BYTE((_Header + 0), 0, 5) -#define GET_8192E_C2H_TX_RPT_PKT_BROCAST(_Header) LE_BITS_TO_1BYTE((_Header + 0), 5, 1) -#define GET_8192E_C2H_TX_RPT_LIFE_TIME_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 6, 1) -#define GET_8192E_C2H_TX_RPT_RETRY_OVER(_Header) LE_BITS_TO_1BYTE((_Header + 0), 7, 1) -#define GET_8192E_C2H_TX_RPT_MAC_ID(_Header) LE_BITS_TO_1BYTE((_Header + 1), 0, 8) -#define GET_8192E_C2H_TX_RPT_DATA_RETRY_CNT(_Header) LE_BITS_TO_1BYTE((_Header + 2), 0, 6) -#define GET_8192E_C2H_TX_RPT_QUEUE_TIME(_Header) LE_BITS_TO_2BYTE((_Header + 3), 0, 16) /* In unit of 256 microseconds. */ -#define GET_8192E_C2H_TX_RPT_FINAL_DATA_RATE(_Header) LE_BITS_TO_1BYTE((_Header + 5), 0, 8) - -#endif /* __RTL8192E_CMD_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_dm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_dm.h deleted file mode 100644 index 5f6ee4b0e61ab8..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_dm.h +++ /dev/null @@ -1,28 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_DM_H__ -#define __RTL8192E_DM_H__ - - -void rtl8192e_init_dm_priv(IN PADAPTER Adapter); -void rtl8192e_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8192e_InitHalDm(IN PADAPTER Adapter); -void rtl8192e_HalDmWatchDog(IN PADAPTER Adapter); - -/* VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); */ - -/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_hal.h deleted file mode 100644 index 716995f9f9cfcc..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_hal.h +++ /dev/null @@ -1,330 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_HAL_H__ -#define __RTL8192E_HAL_H__ - -/* #include "hal_com.h" */ - -#include "hal_data.h" - -/* include HAL Related header after HAL Related compiling flags */ -#include "rtl8192e_spec.h" -#include "rtl8192e_rf.h" -#include "rtl8192e_dm.h" -#include "rtl8192e_recv.h" -#include "rtl8192e_xmit.h" -#include "rtl8192e_cmd.h" -#include "rtl8192e_led.h" -#include "Hal8192EPwrSeq.h" -#include "Hal8192EPhyReg.h" -#include "Hal8192EPhyCfg.h" - - -#ifdef DBG_CONFIG_ERROR_DETECT - #include "rtl8192e_sreset.h" -#endif - -/* --------------------------------------------------------------------- - * RTL8192E Power Configuration CMDs for PCIe interface - * --------------------------------------------------------------------- */ -#define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow -#define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow -#define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow -#define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow -#define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow -#define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow -#define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow -#define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow -#define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow - - -#if 1 /* download firmware related data structure */ -#define FW_SIZE_8192E 0x8000 /* Compatible with RTL8192e Maximal RAM code size 32k */ -#define FW_START_ADDRESS 0x1000 -#define FW_END_ADDRESS 0x5FFF - - -#define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) & 0xFFF0) == 0x92E0) - - - -typedef struct _RT_FIRMWARE_8192E { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[FW_SIZE_8192E]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; - -/* - * This structure must be cared byte-ordering - * - * Added by tynli. 2009.12.04. */ - -/* ***************************************************** - * Firmware Header(8-byte alinment required) - * ***************************************************** - * --- LONG WORD 0 ---- */ -#define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ -#define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) /* AP/NIC and USB/PCI */ -#define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ -#define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)/* FW Version */ -#define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) /* FW Subversion, default 0x00 */ -#define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) - -/* --- LONG WORD 1 ---- */ -#define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) /* Release time Month field */ -#define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) /* Release time Date field */ -#define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)/* Release time Hour field */ -#define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)/* Release time Minute field */ -#define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)/* The size of RAM code */ -#define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) - -/* --- LONG WORD 2 ---- */ -#define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)/* The SVN entry index */ -#define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) - -/* --- LONG WORD 3 ---- */ -#define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) -#define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) - -#endif /* download firmware related data structure */ - -#define DRIVER_EARLY_INT_TIME_8192E 0x05 -#define BCN_DMA_ATIME_INT_TIME_8192E 0x02 -#define RX_DMA_SIZE_8192E 0x4000 /* 16K*/ - -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#ifdef CONFIG_FW_C2H_DEBUG - #define RX_DMA_RESERVED_SIZE_8192E 0x100 /* 256B, reserved for c2h debug message*/ -#else - #define RX_DMA_RESERVED_SIZE_8192E 0x40 /* 64B, reserved for c2h event(16bytes) or ccx(8 Bytes)*/ -#endif -#define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/ - - -#define PAGE_SIZE_TX_92E PAGE_SIZE_256 - -/* For General Reserved Page Number(Beacon Queue is reserved page) - * if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 - * Beacon: MAX_BEACON_LEN / PAGE_SIZE_TX_92E - * PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1,CTS-2-SELF / LTE QoS Null*/ - -#define RSVD_PAGE_NUM_8192E (MAX_BEACON_LEN / PAGE_SIZE_TX_92E + 6) /*0x08*/ -/* For WoWLan , more reserved page - * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 - * NS offload: 2 NDP info: 1 - */ -#ifdef CONFIG_WOWLAN - #define WOWLAN_PAGE_NUM_8192E 0x0b -#else - #define WOWLAN_PAGE_NUM_8192E 0x00 -#endif - -#ifdef CONFIG_PNO_SUPPORT - #undef WOWLAN_PAGE_NUM_8192E - #define WOWLAN_PAGE_NUM_8192E 0x0d -#endif - -/* Note: -Tx FIFO Size : 64KB -Tx page Size : 256B -Total page numbers : 256(0x100) -*/ - -#define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E + WOWLAN_PAGE_NUM_8192E) - -#define TOTAL_PAGE_NUMBER_8192E (0x100) -#define TX_TOTAL_PAGE_NUMBER_8192E (TOTAL_PAGE_NUMBER_8192E - TOTAL_RSVD_PAGE_NUMBER_8192E) - -#define TX_PAGE_BOUNDARY_8192E (TX_TOTAL_PAGE_NUMBER_8192E) /* beacon header start address */ - - -#define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E * PAGE_SIZE_TX_92E) - -#define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 /* 0xA5 */ -#define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C */ - -#define NORMAL_PAGE_NUM_HPQ_8192E 0x10 -#define NORMAL_PAGE_NUM_LPQ_8192E 0x10 -#define NORMAL_PAGE_NUM_NPQ_8192E 0x10 -#define NORMAL_PAGE_NUM_EPQ_8192E 0x00 - - -/* Note: For WMM Normal Chip Setting ,modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E -#define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E -#define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E - - -/* ------------------------------------------------------------------------- - * Chip specific - * ------------------------------------------------------------------------- */ - -/* pic buffer descriptor */ -#define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM -#define TX_DESC_NUM_92E 128 -#define RX_DESC_NUM_92E 128 - -/* ------------------------------------------------------------------------- - * Channel Plan - * ------------------------------------------------------------------------- */ - -#define HWSET_MAX_SIZE_8192E 512 - -#define EFUSE_REAL_CONTENT_LEN_8192E 512 - -#define EFUSE_MAP_LEN_8192E 512 -#define EFUSE_MAX_SECTION_8192E 64 -#define EFUSE_MAX_WORD_UNIT_8192E 4 -#define EFUSE_IC_ID_OFFSET_8192E 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -#define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) -/* - * To prevent out of boundary programming case, leave 1byte and program full section - * 9bytes + 1byt + 5bytes and pre 1byte. - * For worst case: - * | 1byte|----8bytes----|1byte|--5bytes--| - * | | Reserved(14bytes) | - * */ -#define EFUSE_OOB_PROTECT_BYTES_8192E 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */ - - - -/* ******************************************************** - * EFUSE for BT definition - * ******************************************************** */ -#define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 -#define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 /* 512*2 */ -#define EFUSE_BT_MAP_LEN_8192E 1024 /* 1k bytes */ -#define EFUSE_BT_MAX_SECTION_8192E 128 /* 1024/8 */ - -#define EFUSE_PROTECT_BYTES_BANK_8192E 16 -#define EFUSE_MAX_BANK_8192E 3 -/* *********************************************************** */ - -#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -/* #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) */ - -/* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ - -/* rtl8812_hal_init.c */ -void _8051Reset8192E(PADAPTER padapter); -s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); -void InitializeFirmwareVars8192E(PADAPTER padapter); - -s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); - -/* EFuse */ -u8 GetEEPROMSize8192E(PADAPTER padapter); -void hal_InitPGData_8192E(PADAPTER padapter, u8 *PROMContent); -void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); -void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadTxPowerInfo8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadBoardType8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadThermalMeter_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -void Hal_ReadPAType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void Hal_ReadAmplifierType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void Hal_ReadRFEType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseKFreeData_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); - -u8 Hal_CrystalAFEAdjust(_adapter *Adapter); - -BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); - -#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) - void Hal_DetectWoWMode(PADAPTER pAdapter); -#endif /* CONFIG_WOWLAN */ - -/***********************************************************/ -/* RTL8192E-MAC Setting */ -VOID _InitQueueReservedPage_8192E(IN PADAPTER Adapter); -VOID _InitQueuePriority_8192E(IN PADAPTER Adapter); -VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter, IN u8 txpktbuf_bndy); -VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); -/* VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); */ -VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter, IN u8 drvInfoSize); -VOID _InitRDGSetting_8192E(PADAPTER Adapter); -void _InitID_8192E(IN PADAPTER Adapter); -VOID _InitNetworkType_8192E(IN PADAPTER Adapter); -VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); -VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter); -VOID _InitEDCA_8192E(IN PADAPTER Adapter); -VOID _InitRetryFunction_8192E(IN PADAPTER Adapter); -VOID _BBTurnOnBlock_8192E(IN PADAPTER Adapter); -VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); -VOID _InitBeaconMaxError_8192E( - IN PADAPTER Adapter, - IN BOOLEAN InfraMode -); -void SetBeaconRelatedRegisters8192E(PADAPTER padapter); -VOID hal_ReadRFType_8192E(PADAPTER Adapter); -/* RTL8192E-MAC Setting - ***********************************************************/ - -u8 SetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); -void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); -u8 -SetHalDefVar8192E( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue -); -u8 -GetHalDefVar8192E( - IN PADAPTER Adapter, - IN HAL_DEF_VARIABLE eVariable, - IN PVOID pValue -); - -void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8192e(_adapter *adapter); -void rtl8192e_init_default_value(_adapter *padapter); - -void rtl8192e_start_thread(_adapter *padapter); -void rtl8192e_stop_thread(_adapter *padapter); - -#ifdef CONFIG_PCI_HCI - BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); - u16 get_txbd_rw_reg(u16 ff_hwaddr); -#endif - -#ifdef CONFIG_SDIO_HCI - #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT - void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); - #endif -#endif - -#ifdef CONFIG_BT_COEXIST - void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter); -#endif - -#endif /* __RTL8192E_HAL_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_led.h deleted file mode 100644 index 3d795c4055a89b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_led.h +++ /dev/null @@ -1,36 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_LED_H__ -#define __RTL8192E_LED_H__ - -#ifdef CONFIG_RTW_SW_LED -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI - void rtl8192eu_InitSwLeds(PADAPTER padapter); - void rtl8192eu_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_PCI_HCI - void rtl8192ee_InitSwLeds(PADAPTER padapter); - void rtl8192ee_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_SDIO_HCI - void rtl8192es_InitSwLeds(PADAPTER padapter); - void rtl8192es_DeInitSwLeds(PADAPTER padapter); -#endif - -#endif -#endif/*CONFIG_RTW_SW_LED*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_recv.h deleted file mode 100644 index 6ccb8e9b17a1f1..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_recv.h +++ /dev/null @@ -1,179 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_RECV_H__ -#define __RTL8192E_RECV_H__ - -#if defined(CONFIG_USB_HCI) - - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifdef CONFIG_MINIMAL_MEMORY_USAGE - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #else - #ifdef CONFIG_PREALLOC_RX_SKB_BUFFER - #define MAX_RECVBUF_SZ (rtw_rtkm_get_buff_size()) /*depend rtkm*/ - #elif defined(CONFIG_PLATFORM_HISILICON) - #define MAX_RECVBUF_SZ (16384) /* 16k */ - #else - #define MAX_RECVBUF_SZ (32768) /* 32k */ - #endif - /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 - #undef MAX_RECVBUF_SZ - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif /* CONFIG_PLATFORM_NOVATEK_NT72668 */ - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ - -#elif defined(CONFIG_PCI_HCI) - /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ - /* #define MAX_RECVBUF_SZ (9100) */ - /* #else */ - #define MAX_RECVBUF_SZ (4000) /* about 4K - * #endif */ - - -#elif defined(CONFIG_SDIO_HCI) - - #define MAX_RECVBUF_SZ (16384) - -#endif - - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -/* ************* - * [1] Rx Buffer Descriptor (for PCIE) buffer descriptor architecture - * DWORD 0 */ -#define SET_RX_BUFFER_DESC_DATA_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -#define SET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) - -#define GET_RX_BUFFER_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -#define GET_RX_BUFFER_DESC_LS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_BUFFER_DESC_FS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -#define GET_RX_BUFFER_DESC_TOTAL_LENGTH_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) - - -/* DWORD 1 */ -#define SET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) -#define GET_RX_BUFFER_PHYSICAL_LOW_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 0, 32) - -/* DWORD 2 */ -#define SET_RX_BUFFER_PHYSICAL_HIGH_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) - -/* ************* - * [2] Rx Descriptor - * DWORD 0 */ -#define GET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -#define GET_RX_STATUS_DESC_CRC32_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -#define GET_RX_STATUS_DESC_ICVERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_STATUS_DESC_DRVINFO_SIZE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -#define GET_RX_STATUS_DESC_SECURITY_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -#define GET_RX_STATUS_DESC_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -#define GET_RX_STATUS_DESC_SHIFT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -#define GET_RX_STATUS_DESC_PHY_STATUS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -#define GET_RX_STATUS_DESC_SWDEC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -#define GET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -#define GET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) - - -#define SET_RX_STATUS_DESC_PKT_LEN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_STATUS_DESC_EOR_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -#define SET_RX_STATUS_DESC_OWN_92E(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) - -/* DWORD 1 */ -#define GET_RX_STATUS_DESC_MACID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -#define GET_RX_STATUS_DESC_TID_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -#define GET_RX_STATUS_DESC_MACID_VLD_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 12, 1) -#define GET_RX_STATUS_DESC_AMSDU_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -#define GET_RX_STATUS_DESC_RXID_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -#define GET_RX_STATUS_DESC_PAGGR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 15, 1) -#define GET_RX_STATUS_DESC_A1_FITS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 16, 4) -#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHKERR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 20, 1) -#define GET_RX_STATUS_DESC_TCPOFFLOAD_IPVER_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 21, 1) -#define GET_RX_STATUS_DESC_TCPOFFLOAD_IS_TCPUDP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 22, 1) -#define GET_RX_STATUS_DESC_TCPOFFLOAD_CHK_VLD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 23, 1) -#define GET_RX_STATUS_DESC_PAM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 24, 1) -#define GET_RX_STATUS_DESC_PWR_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 25, 1) -#define GET_RX_STATUS_DESC_MORE_DATA_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 26, 1) -#define GET_RX_STATUS_DESC_MORE_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 27, 1) -#define GET_RX_STATUS_DESC_TYPE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 28, 2) -#define GET_RX_STATUS_DESC_MC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 30, 1) -#define GET_RX_STATUS_DESC_BC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+4, 31, 1) - -/* DWORD 2 */ -#define GET_RX_STATUS_DESC_SEQ_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -#define GET_RX_STATUS_DESC_FRAG_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -#define GET_RX_STATUS_DESC_RX_IS_QOS_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) - -#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -#define GET_RX_STATUS_DESC_HWRSVD_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 24, 4) -#define GET_RX_STATUS_DESC_FCS_OK_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) -#define GET_RX_STATUS_DESC_RPT_SEL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) - -/* DWORD 3 */ -#define GET_RX_STATUS_DESC_RX_RATE_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -#define GET_RX_STATUS_DESC_HTC_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -#define GET_RX_STATUS_DESC_EOSP_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -#define GET_RX_STATUS_DESC_BSSID_FIT_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -#define GET_RX_STATUS_DESC_DMA_AGG_NUM_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) - -#define GET_RX_STATUS_DESC_PATTERN_MATCH_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -#define GET_RX_STATUS_DESC_UNICAST_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -#define GET_RX_STATUS_DESC_MAGIC_WAKE_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) - -/* DWORD 6 */ -#define GET_RX_STATUS_DESC_SPLCP_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) -#define GET_RX_STATUS_DESC_LDPC_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) -#define GET_RX_STATUS_DESC_STBC_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) -#define GET_RX_STATUS_DESC_BW_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) - - -/* DWORD 5 */ -#define GET_RX_STATUS_DESC_TSFL_92E(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) - -#define GET_RX_STATUS_DESC_BUFF_ADDR_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -#define GET_RX_STATUS_DESC_BUFF_ADDR64_92E(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) - - -#ifdef CONFIG_SDIO_HCI - s32 rtl8192es_init_recv_priv(PADAPTER padapter); - void rtl8192es_free_recv_priv(PADAPTER padapter); - s32 rtl8192es_recv_hdl(_adapter *padapter); -#endif - -#ifdef CONFIG_USB_HCI - void rtl8192eu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); - s32 rtl8192eu_init_recv_priv(PADAPTER padapter); - void rtl8192eu_free_recv_priv(PADAPTER padapter); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8192ee_init_recv_priv(PADAPTER padapter); - void rtl8192ee_free_recv_priv(PADAPTER padapter); -#endif - -void rtl8192e_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); - -#endif /* __RTL8192E_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_rf.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_rf.h deleted file mode 100644 index f15e07041ba8df..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_rf.h +++ /dev/null @@ -1,28 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_RF_H__ -#define __RTL8192E_RF_H__ - -VOID -PHY_RF6052SetBandwidth8192E( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); - - -int -PHY_RF6052_Config_8192E( - IN PADAPTER Adapter); - -#endif/* __RTL8192E_RF_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_spec.h deleted file mode 100644 index c9b2b41e6e48fd..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_spec.h +++ /dev/null @@ -1,313 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_SPEC_H__ -#define __RTL8192E_SPEC_H__ - -#include - -#define HAL_NAV_UPPER_UNIT_8192E 128 /* micro-second */ - -/* ************************************************************ - * 8192E Regsiter offset definition - * ************************************************************ */ - -/* ************************************************************ - * - * ************************************************************ */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_SYS_SWR_CTRL1_8192E 0x0010 /* 1 Byte */ -#define REG_SYS_SWR_CTRL2_8192E 0x0014 /* 1 Byte */ -#define REG_AFE_CTRL1_8192E 0x0024 -#define REG_AFE_CTRL2_8192E 0x0028 -#define REG_AFE_CTRL3_8192E 0x002c - -#define REG_PAD_CTRL1_8192E 0x0064 -#define REG_SDIO_CTRL_8192E 0x0070 -#define REG_OPT_CTRL_8192E 0x0074 -#define REG_RF_B_CTRL_8192E 0x0076 -#define REG_AFE_CTRL4_8192E 0x0078 -#define REG_LDO_SWR_CTRL 0x007C -#define REG_FW_DRV_MSG_8192E 0x0088 -#define REG_HMEBOX_E2_E3_8192E 0x008C -#define REG_HIMR0_8192E 0x00B0 -#define REG_HISR0_8192E 0x00B4 -#define REG_HIMR1_8192E 0x00B8 -#define REG_HISR1_8192E 0x00BC - -#define REG_SYS_CFG1_8192E 0x00F0 -#define REG_SYS_CFG2_8192E 0x00FC -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL) -#define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2) -#define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3) -#define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN - -#define REG_RSVD3_8192E 0x0168 -#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -#define REG_C2HEVT_CMD_LEN_88XX 0x01AE - -#define REG_HMEBOX_EXT0_8192E 0x01F0 -#define REG_HMEBOX_EXT1_8192E 0x01F4 -#define REG_HMEBOX_EXT2_8192E 0x01F8 -#define REG_HMEBOX_EXT3_8192E 0x01FC - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_DWBCN0_CTRL 0x0208 -#define REG_DWBCN1_CTRL 0x0228 - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RXDMA_8192E 0x0290 -#define REG_EARLY_MODE_CONTROL_8192E 0x02BC - -#define REG_RSVD5_8192E 0x02F0 -#define REG_RSVD6_8192E 0x02F4 -#define REG_RSVD7_8192E 0x02F8 -#define REG_RSVD8_8192E 0x02FC - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_CTRL_REG_8192E 0x0300 -#define REG_INT_MIG_8192E 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_TXBD_DESA_8192E 0x0308 /* TX Beacon Descriptor Address */ -#define REG_MGQ_TXBD_DESA_8192E 0x0310 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_TXBD_DESA_8192E 0x0318 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_TXBD_DESA_8192E 0x0320 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_TXBD_DESA_8192E 0x0328 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_TXBD_DESA_8192E 0x0330 /* TX BK Queue Descriptor Address */ -#define REG_RXQ_RXBD_DESA_8192E 0x0338 /* RX Queue Descriptor Address */ -#define REG_HI0Q_TXBD_DESA_8192E 0x0340 -#define REG_HI1Q_TXBD_DESA_8192E 0x0348 -#define REG_HI2Q_TXBD_DESA_8192E 0x0350 -#define REG_HI3Q_TXBD_DESA_8192E 0x0358 -#define REG_HI4Q_TXBD_DESA_8192E 0x0360 -#define REG_HI5Q_TXBD_DESA_8192E 0x0368 -#define REG_HI6Q_TXBD_DESA_8192E 0x0370 -#define REG_HI7Q_TXBD_DESA_8192E 0x0378 -#define REG_MGQ_TXBD_NUM_8192E 0x0380 -#define REG_RX_RXBD_NUM_8192E 0x0382 -#define REG_VOQ_TXBD_NUM_8192E 0x0384 -#define REG_VIQ_TXBD_NUM_8192E 0x0386 -#define REG_BEQ_TXBD_NUM_8192E 0x0388 -#define REG_BKQ_TXBD_NUM_8192E 0x038A -#define REG_HI0Q_TXBD_NUM_8192E 0x038C -#define REG_HI1Q_TXBD_NUM_8192E 0x038E -#define REG_HI2Q_TXBD_NUM_8192E 0x0390 -#define REG_HI3Q_TXBD_NUM_8192E 0x0392 -#define REG_HI4Q_TXBD_NUM_8192E 0x0394 -#define REG_HI5Q_TXBD_NUM_8192E 0x0396 -#define REG_HI6Q_TXBD_NUM_8192E 0x0398 -#define REG_HI7Q_TXBD_NUM_8192E 0x039A -#define REG_TSFTIMER_HCI_8192E 0x039C - -/* Read Write Point */ -#define REG_VOQ_TXBD_IDX_8192E 0x03A0 -#define REG_VIQ_TXBD_IDX_8192E 0x03A4 -#define REG_BEQ_TXBD_IDX_8192E 0x03A8 -#define REG_BKQ_TXBD_IDX_8192E 0x03AC -#define REG_MGQ_TXBD_IDX_8192E 0x03B0 -#define REG_RXQ_TXBD_IDX_8192E 0x03B4 -#define REG_HI0Q_TXBD_IDX_8192E 0x03B8 -#define REG_HI1Q_TXBD_IDX_8192E 0x03BC -#define REG_HI2Q_TXBD_IDX_8192E 0x03C0 -#define REG_HI3Q_TXBD_IDX_8192E 0x03C4 -#define REG_HI4Q_TXBD_IDX_8192E 0x03C8 -#define REG_HI5Q_TXBD_IDX_8192E 0x03CC -#define REG_HI6Q_TXBD_IDX_8192E 0x03D0 -#define REG_HI7Q_TXBD_IDX_8192E 0x03D4 - -#define REG_PCIE_HCPWM_8192EE 0x03D8 /* ?????? */ -#define REG_PCIE_HRPWM_8192EE 0x03DC /* PCIe RPWM */ /* ?????? */ -#define REG_DBI_WDATA_V1_8192E 0x03E8 -#define REG_DBI_RDATA_V1_8192E 0x03EC -#define REG_DBI_FLAG_V1_8192E 0x03F0 -#define REG_MDIO_V1_8192E 0x3F4 -#define REG_PCIE_MIX_CFG_8192E 0x3F8 - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#define REG_TXBF_CTRL_8192E 0x042C -#define REG_ARFR0_8192E 0x0444 -#define REG_ARFR1_8192E 0x044C -#define REG_CCK_CHECK_8192E 0x0454 -#define REG_AMPDU_MAX_TIME_8192E 0x0456 -#define REG_BCNQ1_BDNY_8192E 0x0457 - -#define REG_AMPDU_MAX_LENGTH_8192E 0x0458 -#define REG_WMAC_LBK_BUF_HD_8192E 0x045D -#define REG_NDPA_OPT_CTRL_8192E 0x045F -#define REG_DATA_SC_8192E 0x0483 -#ifdef CONFIG_WOWLAN - #define REG_TXPKTBUF_IV_LOW 0x0484 - #define REG_TXPKTBUF_IV_HIGH 0x0488 -#endif -#define REG_ARFR2_8192E 0x048C -#define REG_ARFR3_8192E 0x0494 -#define REG_TXRPT_START_OFFSET 0x04AC -#define REG_AMPDU_BURST_MODE_8192E 0x04BC -#define REG_HT_SINGLE_AMPDU_8192E 0x04C7 -#define REG_MACID_PKT_DROP0_8192E 0x04D0 - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ -#define REG_CTWND_8192E 0x0572 -#define REG_SECONDARY_CCA_CTRL_8192E 0x0577 -#define REG_SCH_TXCMD_8192E 0x05F8 - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ -#define REG_MAC_CR_8192E 0x0600 - -#define REG_MAC_TX_SM_STATE_8192E 0x06B4 - -/* Power */ -#define REG_BFMER0_INFO_8192E 0x06E4 -#define REG_BFMER1_INFO_8192E 0x06EC -#define REG_CSI_RPT_PARAM_BW20_8192E 0x06F4 -#define REG_CSI_RPT_PARAM_BW40_8192E 0x06F8 -#define REG_CSI_RPT_PARAM_BW80_8192E 0x06FC - -/* Hardware Port 2 */ -#define REG_BFMEE_SEL_8192E 0x0714 -#define REG_SND_PTCL_CTRL_8192E 0x0718 - - -/* ----------------------------------------------------- - * - * Redifine register definition for compatibility - * - * ----------------------------------------------------- */ - -/* TODO: use these definition when using REG_xxx naming rule. - * NOTE: DO NOT Remove these definition. Use later. */ -#define ISR_8192E REG_HISR0_8192E - -/* ---------------------------------------------------------------------------- - * 8192E IMR/ISR bits (offset 0xB0, 8bits) - * ---------------------------------------------------------------------------- */ -#define IMR_DISABLED_8192E 0 -/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -#define IMR_TIMER2_8192E BIT(31) /* Timeout interrupt 2 */ -#define IMR_TIMER1_8192E BIT(30) /* Timeout interrupt 1 */ -#define IMR_PSTIMEOUT_8192E BIT(29) /* Power Save Time Out Interrupt */ -#define IMR_GTINT4_8192E BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -#define IMR_GTINT3_8192E BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -#define IMR_TXBCN0ERR_8192E BIT(26) /* Transmit Beacon0 Error */ -#define IMR_TXBCN0OK_8192E BIT(25) /* Transmit Beacon0 OK */ -#define IMR_TSF_BIT32_TOGGLE_8192E BIT(24) /* TSF Timer BIT(32) toggle indication interrupt */ -#define IMR_BCNDMAINT0_8192E BIT(20) /* Beacon DMA Interrupt 0 */ -#define IMR_BCNDERR0_8192E BIT(16) /* Beacon Queue DMA OK0 */ -#define IMR_HSISR_IND_ON_INT_8192E BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -#define IMR_BCNDMAINT_E_8192E BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -#define IMR_ATIMEND_8192E BIT(12) /* CTWidnow End or ATIM Window End */ -#define IMR_C2HCMD_8192E BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -#define IMR_CPWM2_8192E BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_CPWM_8192E BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_HIGHDOK_8192E BIT(7) /* High Queue DMA OK */ -#define IMR_MGNTDOK_8192E BIT(6) /* Management Queue DMA OK */ -#define IMR_BKDOK_8192E BIT(5) /* AC_BK DMA OK */ -#define IMR_BEDOK_8192E BIT(4) /* AC_BE DMA OK */ -#define IMR_VIDOK_8192E BIT(3) /* AC_VI DMA OK */ -#define IMR_VODOK_8192E BIT(2) /* AC_VO DMA OK */ -#define IMR_RDU_8192E BIT(1) /* Rx Descriptor Unavailable */ -#define IMR_ROK_8192E BIT(0) /* Receive DMA OK */ - -/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -#define IMR_BCNDMAINT7_8192E BIT(27) /* Beacon DMA Interrupt 7 */ -#define IMR_BCNDMAINT6_8192E BIT(26) /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5_8192E BIT(25) /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4_8192E BIT(24) /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3_8192E BIT(23) /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2_8192E BIT(22) /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1_8192E BIT(21) /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDOK7_8192E BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -#define IMR_BCNDOK6_8192E BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -#define IMR_BCNDOK5_8192E BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -#define IMR_BCNDOK4_8192E BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -#define IMR_BCNDOK3_8192E BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -#define IMR_BCNDOK2_8192E BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -#define IMR_BCNDOK1_8192E BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -#define IMR_ATIMEND_E_8192E BIT(13) /* ATIM Window End Extension for Win7 */ -#define IMR_TXERR_8192E BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -#define IMR_RXERR_8192E BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -#define IMR_TXFOVW_8192E BIT(9) /* Transmit FIFO Overflow */ -#define IMR_RXFOVW_8192E BIT(8) /* Receive FIFO Overflow */ - -/* ---------------------------------------------------------------------------- - * 8192E Auto LLT bits (offset 0x224, 8bits) - * ---------------------------------------------------------------------------- - * 224 REG_AUTO_LLT - * move to hal_com_reg.h */ - -/* ---------------------------------------------------------------------------- - * 8192E Auto LLT bits (offset 0x290, 32bits) - * ---------------------------------------------------------------------------- */ -#define BIT_DMA_MODE BIT(1) -#define BIT_USB_RXDMA_AGG_EN BIT(31) - -/* ---------------------------------------------------------------------------- - * 8192E REG_SYS_CFG1 (offset 0xF0, 32bits) - * ---------------------------------------------------------------------------- */ -#define BIT_SPSLDO_SEL BIT(24) - - -/* ---------------------------------------------------------------------------- - * 8192E REG_CCK_CHECK (offset 0x454, 8bits) - * ---------------------------------------------------------------------------- */ -#define BIT_BCN_PORT_SEL BIT(5) - -/* **************************************************************************** - * Regsiter Bit and Content definition - * **************************************************************************** */ - -/* 2 ACMHWCTRL 0x05C0 */ -#define AcmHw_HwEn_8192E BIT(0) -#define AcmHw_VoqEn_8192E BIT(1) -#define AcmHw_ViqEn_8192E BIT(2) -#define AcmHw_BeqEn_8192E BIT(3) -#define AcmHw_VoqStatus_8192E BIT(5) -#define AcmHw_ViqStatus_8192E BIT(6) -#define AcmHw_BeqStatus_8192E BIT(7) - -#endif /* __RTL8192E_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_sreset.h deleted file mode 100644 index 78109aea468f4a..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_sreset.h +++ /dev/null @@ -1,24 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL88812A_SRESET_H_ -#define _RTL8812A_SRESET_H_ - -#include - -#ifdef DBG_CONFIG_ERROR_DETECT - extern void rtl8192e_sreset_xmit_status_check(_adapter *padapter); - extern void rtl8192e_sreset_linked_status_check(_adapter *padapter); -#endif -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_xmit.h deleted file mode 100644 index 559eefe2c98066..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192e_xmit.h +++ /dev/null @@ -1,450 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192E_XMIT_H__ -#define __RTL8192E_XMIT_H__ - -typedef struct txdescriptor_8192e { - /* Offset 0 */ - u32 pktlen:16; - u32 offset:8; - u32 bmc:1; - u32 htc:1; - u32 ls:1; - u32 fs:1; - u32 linip:1; - u32 noacm:1; - u32 gf:1; - u32 own:1; - - /* Offset 4 */ - u32 macid:6; - u32 rsvd0406:2; - u32 qsel:5; - u32 rd_nav_ext:1; - u32 lsig_txop_en:1; - u32 pifs:1; - u32 rate_id:4; - u32 navusehdr:1; - u32 en_desc_id:1; - u32 sectype:2; - u32 rsvd0424:2; - u32 pkt_offset:5; /* unit: 8 bytes */ - u32 rsvd0431:1; - - /* Offset 8 */ - u32 rts_rc:6; - u32 data_rc:6; - u32 agg_en:1; - u32 rd_en:1; - u32 bar_rty_th:2; - u32 bk:1; - u32 morefrag:1; - u32 raw:1; - u32 ccx:1; - u32 ampdu_density:3; - u32 bt_null:1; - u32 ant_sel_a:1; - u32 ant_sel_b:1; - u32 tx_ant_cck:2; - u32 tx_antl:2; - u32 tx_ant_ht:2; - - /* Offset 12 */ - u32 nextheadpage:8; - u32 tailpage:8; - u32 seq:12; - u32 cpu_handle:1; - u32 tag1:1; - u32 trigger_int:1; - u32 hwseq_en:1; - - /* Offset 16 */ - u32 rtsrate:5; - u32 ap_dcfe:1; - u32 hwseq_sel:2; - u32 userate:1; - u32 disrtsfb:1; - u32 disdatafb:1; - u32 cts2self:1; - u32 rtsen:1; - u32 hw_rts_en:1; - u32 port_id:1; - u32 pwr_status:3; - u32 wait_dcts:1; - u32 cts2ap_en:1; - u32 data_sc:2; - u32 data_stbc:2; - u32 data_short:1; - u32 data_bw:1; - u32 rts_short:1; - u32 rts_bw:1; - u32 rts_sc:2; - u32 vcs_stbc:2; - - /* Offset 20 */ - u32 datarate:6; - u32 sgi:1; - u32 try_rate:1; - u32 data_ratefb_lmt:5; - u32 rts_ratefb_lmt:4; - u32 rty_lmt_en:1; - u32 data_rt_lmt:6; - u32 usb_txagg_num:8; - - /* Offset 24 */ - u32 txagg_a:5; - u32 txagg_b:5; - u32 use_max_len:1; - u32 max_agg_num:5; - u32 mcsg1_max_len:4; - u32 mcsg2_max_len:4; - u32 mcsg3_max_len:4; - u32 mcs7_sgi_max_len:4; - - /* Offset 28 */ - u32 checksum:16; /* TxBuffSize(PCIe)/CheckSum(USB) */ - u32 mcsg4_max_len:4; - u32 mcsg5_max_len:4; - u32 mcsg6_max_len:4; - u32 mcs15_sgi_max_len:4; -} TXDESC_8192E, *PTXDESC_8192E; - - - -/* For 88e early mode */ -#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) -#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) -#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) -#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) -#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) -#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) -#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) - -/* - * defined for TX DESC Operation - * */ - -#define MAX_TID (15) - -/* OFFSET 0 */ -#define OFFSET_SZ 0 -#define OFFSET_SHT 16 -#define BMC BIT(24) -#define LSG BIT(26) -#define FSG BIT(27) -#define OWN BIT(31) - - -/* OFFSET 4 */ -#define PKT_OFFSET_SZ 0 -#define QSEL_SHT 8 -#define RATE_ID_SHT 16 -#define NAVUSEHDR BIT(20) -#define SEC_TYPE_SHT 22 -#define PKT_OFFSET_SHT 26 - -/* OFFSET 8 */ -#define AGG_EN BIT(12) -#define AGG_BK BIT(16) -#define AMPDU_DENSITY_SHT 20 -#define ANTSEL_A BIT(24) -#define ANTSEL_B BIT(25) -#define TX_ANT_CCK_SHT 26 -#define TX_ANTL_SHT 28 -#define TX_ANT_HT_SHT 30 - -/* OFFSET 12 */ -#define SEQ_SHT 16 -#define EN_HWSEQ BIT(31) - -/* OFFSET 16 */ -#define QOS BIT(6) -#define HW_SSN BIT(7) -#define USERATE BIT(8) -#define DISDATAFB BIT(10) -#define CTS_2_SELF BIT(11) -#define RTS_EN BIT(12) -#define HW_RTS_EN BIT(13) -#define DATA_SHORT BIT(24) -#define PWR_STATUS_SHT 15 -#define DATA_SC_SHT 20 -#define DATA_BW BIT(25) - -/* OFFSET 20 */ -#define RTY_LMT_EN BIT(17) - - -/* OFFSET 20 */ -#define SGI BIT(6) -#define USB_TXAGG_NUM_SHT 24 - - -/* *****Tx Desc Buffer content */ - -/* config element for each tx buffer - * -#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 0, 16, __Valeu) -#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16), 31, 1, __Valeu) -#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+4, 0, 32, __Valeu) -#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) -*/ -#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) -#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) -#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) -#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*16)+8, 0, 32, __Valeu) - - -/* Dword 0 */ -#define SET_TX_BUFF_DESC_LEN_0_92E(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -#define SET_TX_BUFF_DESC_PSB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -#define SET_TX_BUFF_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -/* Dword 1 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -#define GET_TX_DESC_TX_BUFFER_ADDRESS_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) - - -/* Dword 2 */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 32, __Value) -/* Dword 3, RESERVED */ - - -/* *****Tx Desc content - * Dword 0 */ -#define SET_TX_DESC_PKT_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -#define SET_TX_DESC_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -#define SET_TX_DESC_BMC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -#define SET_TX_DESC_HTC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -#define SET_TX_DESC_LAST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) -#define SET_TX_DESC_FIRST_SEG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -#define SET_TX_DESC_LINIP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) -#define SET_TX_DESC_NO_ACM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -#define SET_TX_DESC_GF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) -#define SET_TX_DESC_OWN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) -#define GET_TX_DESC_OWN_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) - -/* Dword 1 */ -#define SET_TX_DESC_MACID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -#define SET_TX_DESC_QUEUE_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -#define SET_TX_DESC_RDG_NAV_EXT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -#define SET_TX_DESC_LSIG_TXOP_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -#define SET_TX_DESC_PIFS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -#define SET_TX_DESC_RATE_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -#define SET_TX_DESC_EN_DESC_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -#define SET_TX_DESC_SEC_TYPE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -#define SET_TX_DESC_PKT_OFFSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -#define SET_TX_DESC_MORE_DATA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) -#define SET_TX_DESC_TXOP_PS_CAP_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 30, 1, __Value) -#define SET_TX_DESC_TXOP_PS_MODE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 31, 1, __Value) - - -/* Dword 2 */ -#define SET_TX_DESC_PAID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -#define SET_TX_DESC_CCA_RTS_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -#define SET_TX_DESC_AGG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -#define SET_TX_DESC_RDG_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -#define SET_TX_DESC_NULL_0_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -#define SET_TX_DESC_NULL_1_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -#define SET_TX_DESC_BK_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -#define SET_TX_DESC_MORE_FRAG_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -#define SET_TX_DESC_RAW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -#define GET_TX_DESC_MORE_FRAG_92E(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 17, 1) -#define SET_TX_DESC_SPE_RPT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -#define SET_TX_DESC_AMPDU_DENSITY_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -#define SET_TX_DESC_BT_NULL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -#define SET_TX_DESC_GID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) - - -/* Dword 3 */ -#define SET_TX_DESC_WHEADER_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) -#define SET_TX_DESC_CHK_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) -#define SET_TX_DESC_EARLY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -#define SET_TX_DESC_HWSEQ_SEL_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -#define SET_TX_DESC_USE_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -#define SET_TX_DESC_DISABLE_RTS_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -#define SET_TX_DESC_DISABLE_FB_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -#define SET_TX_DESC_CTS2SELF_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -#define SET_TX_DESC_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -#define SET_TX_DESC_HW_RTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -#define SET_TX_DESC_HW_PORT_ID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) -#define SET_TX_DESC_NAV_USE_HDR_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -#define SET_TX_DESC_USE_MAX_LEN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -#define SET_TX_DESC_MAX_AGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -#define SET_TX_DESC_NDPA_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -#define SET_TX_DESC_AMPDU_MAX_TIME_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) - -/* Dword 4 */ -#define SET_TX_DESC_TX_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -#define SET_TX_DESC_TRY_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -#define SET_TX_DESC_DATA_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -#define SET_TX_DESC_RTS_RATE_FB_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -#define SET_TX_DESC_RETRY_LIMIT_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -#define SET_TX_DESC_DATA_RETRY_LIMIT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -#define SET_TX_DESC_RTS_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -#define SET_TX_DESC_PCTS_ENABLE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -#define SET_TX_DESC_PCTS_MASK_IDX_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) - - -/* Dword 5 */ -#define SET_TX_DESC_DATA_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -#define SET_TX_DESC_DATA_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -#define SET_TX_DESC_DATA_BW_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -#define SET_TX_DESC_DATA_LDPC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -#define SET_TX_DESC_DATA_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -#define SET_TX_DESC_VCS_STBC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -#define SET_TX_DESC_RTS_SHORT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -#define SET_TX_DESC_RTS_SC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -#define SET_TX_DESC_TX_ANT_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 4, __Value) -#define SET_TX_DESC_TX_POWER_0_PSET_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) - -/* Dword 6 */ -#define SET_TX_DESC_SW_DEFINE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -#define SET_TX_DESC_MBSSID_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -#define SET_TX_DESC_ANTSEL_A_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) -#define SET_TX_DESC_ANTSEL_B_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) -#define SET_TX_DESC_ANTSEL_C_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) -#define SET_TX_DESC_ANTSEL_D_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) - -/* Dword 7 */ -#ifdef CONFIG_PCI_HCI - #define SET_TX_DESC_TX_BUFFER_SIZE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) - #define SET_TX_DESC_TX_DESC_CHECKSUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif -#define SET_TX_DESC_USB_TXAGG_NUM_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - - -/* #define SET_TX_DESC_HWSEQ_EN_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) */ -/* Dword 8 */ - -#define SET_TX_DESC_RTS_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -#define SET_TX_DESC_BAR_RTY_TH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -#define SET_TX_DESC_DATA_RC_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -#define SET_TX_DESC_EN_HWSEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -#define SET_TX_DESC_NEXT_HEAD_PAGE_92E(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -#define SET_TX_DESC_TAIL_PAGE_92E(__pTxDesc, __Value)(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) - -/* Dword 9 */ -#define SET_TX_DESC_PADDING_LENGTH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -#define SET_TX_DESC_TXBF_PATH_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 11, 1, __Value) -#define SET_TX_DESC_SEQ_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -#define SET_TX_DESC_FINAL_DATA_RATE_92E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) - - -#define SET_EARLYMODE_PKTNUM_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -#define SET_EARLYMODE_LEN0_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -#define SET_EARLYMODE_LEN1_1_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -#define SET_EARLYMODE_LEN1_2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -#define SET_EARLYMODE_LEN2_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -#define SET_EARLYMODE_LEN3_92E(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) - -void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); - -#ifdef CONFIG_USB_HCI - s32 rtl8192eu_init_xmit_priv(PADAPTER padapter); - void rtl8192eu_free_xmit_priv(PADAPTER padapter); - s32 rtl8192eu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8192eu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8192eu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8192eu_xmit_buf_handler(PADAPTER padapter); - #define hal_xmit_handler rtl8192eu_xmit_buf_handler - void rtl8192eu_xmit_tasklet(void *priv); - s32 rtl8192eu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8192ee_init_xmit_priv(PADAPTER padapter); - void rtl8192ee_free_xmit_priv(PADAPTER padapter); - struct xmit_buf *rtl8192ee_dequeue_xmitbuf(struct rtw_tx_ring *ring); - s32 rtl8192ee_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8192ee_xmitframe_resume(_adapter *padapter); - s32 rtl8192ee_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8192ee_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - void rtl8192ee_xmit_tasklet(void *priv); -#endif - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8192es_init_xmit_priv(PADAPTER padapter); - void rtl8192es_free_xmit_priv(PADAPTER padapter); - - s32 rtl8192es_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8192es_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8192es_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - thread_return rtl8192es_xmit_thread(thread_context context); - s32 rtl8192es_xmit_buf_handler(PADAPTER padapter); - - #ifdef CONFIG_SDIO_TX_TASKLET - void rtl8192es_xmit_tasklet(void *priv); - #endif -#endif - -struct txrpt_ccx_92e { - /* offset 0 */ - u8 tag1:1; - u8 pkt_num:3; - u8 txdma_underflow:1; - u8 int_bt:1; - u8 int_tri:1; - u8 int_ccx:1; - - /* offset 1 */ - u8 mac_id:6; - u8 pkt_ok:1; - u8 bmc:1; - - /* offset 2 */ - u8 retry_cnt:6; - u8 lifetime_over:1; - u8 retry_over:1; - - /* offset 3 */ - u8 ccx_qtime0; - u8 ccx_qtime1; - - /* offset 5 */ - u8 final_data_rate; - - /* offset 6 */ - u8 sw1:4; - u8 qsel:4; - - /* offset 7 */ - u8 sw0; -}; - -#ifdef CONFIG_TX_EARLY_MODE - void UpdateEarlyModeInfo8192E(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); -#endif -s32 rtl8192e_init_xmit_priv(_adapter *padapter); -void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, u8 *ptxdesc); - -void rtl8192e_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, - u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -void rtl8192e_cal_txdesc_chksum(u8 *ptxdesc); - -u8 BWMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); -u8 SCMapping_92E(PADAPTER Adapter, struct pkt_attrib *pattrib); -void fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, u8 *ptxdesc); -void fill_txdesc_vcs(struct pkt_attrib *pattrib, u8 *ptxdesc); -#if defined(CONFIG_CONCURRENT_MODE) - void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -#endif -void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); - -void fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc); -void rtl8192e_fixed_rate(_adapter *padapter, u8 *ptxdesc); - -#endif /* __RTL8192E_XMIT_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_cmd.h deleted file mode 100644 index baca793932c9de..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_cmd.h +++ /dev/null @@ -1,194 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_CMD_H__ -#define __RTL8192F_CMD_H__ - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ - * --------------------------------------------------------------------------------------------------------- */ - -enum h2c_cmd_8192F { - /* Common Class: 000 */ - H2C_8192F_RSVD_PAGE = 0x00, - H2C_8192F_MEDIA_STATUS_RPT = 0x01, - H2C_8192F_SCAN_ENABLE = 0x02, - H2C_8192F_KEEP_ALIVE = 0x03, - H2C_8192F_DISCON_DECISION = 0x04, - H2C_8192F_PSD_OFFLOAD = 0x05, - H2C_8192F_AP_OFFLOAD = 0x08, - H2C_8192F_BCN_RSVDPAGE = 0x09, - H2C_8192F_PROBERSP_RSVDPAGE = 0x0A, - H2C_8192F_FCS_RSVDPAGE = 0x10, - H2C_8192F_FCS_INFO = 0x11, - H2C_8192F_AP_WOW_GPIO_CTRL = 0x13, - - /* PoweSave Class: 001 */ - H2C_8192F_SET_PWR_MODE = 0x20, - H2C_8192F_PS_TUNING_PARA = 0x21, - H2C_8192F_PS_TUNING_PARA2 = 0x22, - H2C_8192F_P2P_LPS_PARAM = 0x23, - H2C_8192F_P2P_PS_OFFLOAD = 0x24, - H2C_8192F_PS_SCAN_ENABLE = 0x25, - H2C_8192F_SAP_PS_ = 0x26, - H2C_8192F_INACTIVE_PS_ = 0x27,/* Inactive_PS */ - H2C_8192F_FWLPS_IN_IPS_ = 0x28, - - /* Dynamic Mechanism Class: 010 */ - H2C_8192F_MACID_CFG = 0x40, - H2C_8192F_TXBF = 0x41, - H2C_8192F_RSSI_SETTING = 0x42, - H2C_8192F_AP_REQ_TXRPT = 0x43, - H2C_8192F_INIT_RATE_COLLECT = 0x44, - H2C_8192F_RA_PARA_ADJUST = 0x46, - - /* BT Class: 011 */ - H2C_8192F_B_TYPE_TDMA = 0x60, - H2C_8192F_BT_INFO = 0x61, - H2C_8192F_FORCE_BT_TXPWR = 0x62, - H2C_8192F_BT_IGNORE_WLANACT = 0x63, - H2C_8192F_DAC_SWING_VALUE = 0x64, - H2C_8192F_ANT_SEL_RSV = 0x65, - H2C_8192F_WL_OPMODE = 0x66, - H2C_8192F_BT_MP_OPER = 0x67, - H2C_8192F_BT_CONTROL = 0x68, - H2C_8192F_BT_WIFI_CTRL = 0x69, - H2C_8192F_BT_FW_PATCH = 0x6A, - H2C_8192F_BT_WLAN_CALIBRATION = 0x6D, - - /* WOWLAN Class: 100 */ - H2C_8192F_WOWLAN = 0x80, - H2C_8192F_REMOTE_WAKE_CTRL = 0x81, - H2C_8192F_AOAC_GLOBAL_INFO = 0x82, - H2C_8192F_AOAC_RSVD_PAGE = 0x83, - H2C_8192F_AOAC_RSVD_PAGE2 = 0x84, - H2C_8192F_D0_SCAN_OFFLOAD_CTRL = 0x85, - H2C_8192F_D0_SCAN_OFFLOAD_INFO = 0x86, - H2C_8192F_CHNL_SWITCH_OFFLOAD = 0x87, - H2C_8192F_P2P_OFFLOAD_RSVD_PAGE = 0x8A, - H2C_8192F_P2P_OFFLOAD = 0x8B, - - H2C_8192F_RESET_TSF = 0xC0, - H2C_8192F_MAXID, -}; - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- - * _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8192F_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_8192F_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8192F_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8192F_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -/*_MEDIA_STATUS_RPT_PARM_CMD_0x01*/ -#define SET_8192F_H2CCMD_MSRRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_IND(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8192F_H2CCMD_MSRRPT_PARM_MACID_END(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -/* _PWR_MOD_CMD_0x20 */ -#define SET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8192F_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -#define SET_8192F_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8192F_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8192F_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -#define SET_8192F_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -#define GET_8192F_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) - -/* _PS_TUNE_PARAM_CMD_0x21 */ -#define SET_8192F_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8192F_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -#define SET_8192F_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -#define SET_8192F_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _MACID_CFG_CMD_0x40 */ -#define SET_8192F_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -#define SET_8192F_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) - -/* _RSSI_SETTING_CMD_0x42 */ -#define SET_8192F_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8192F_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -#define SET_8192F_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _AP_REQ_TXRPT_CMD_0x43 */ -#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8192F_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _FORCE_BT_TXPWR_CMD_0x62 */ -#define SET_8192F_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - -/* _FORCE_BT_MP_OPER_CMD_0x67 */ -#define SET_8192F_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -#define SET_8192F_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -#define SET_8192F_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8192F_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -#define SET_8192F_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8192F_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) - -/* _BT_FW_PATCH_0x6A */ -#define SET_8192F_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) -#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8192F_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) - -/* --------------------------------------------------------------------------------------------------------- - * ------------------------------------------- Structure -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- Function Statement -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - -/* host message to firmware cmd */ -void rtl8192f_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8192f_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -/* s32 rtl8192f__set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -void rtl8192f_set_FwPsTuneParam_cmd(PADAPTER padapter); -void rtl8192f_download_rsvd_page(PADAPTER padapter, u8 mstatus); -#ifdef CONFIG_BT_COEXIST - void rtl8192f__download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -#endif /* CONFIG_BT_COEXIST */ -#ifdef CONFIG_P2P - void rtl8192f_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -#ifdef CONFIG_TDLS -#ifdef CONFIG_TDLS_CH_SW -void rtl8192f_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); -#endif -#endif - -#ifdef CONFIG_P2P_WOWLAN - void rtl8192f_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -#endif - -s32 FillH2CCmd8192F(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -u8 GetTxBufferRsvdPageNum8192F(_adapter *padapter, bool wowlan); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_dm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_dm.h deleted file mode 100644 index f4ac100348e77e..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_dm.h +++ /dev/null @@ -1,27 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_DM_H__ -#define __RTL8192F_DM_H__ - -void rtl8192f_init_dm_priv(IN PADAPTER Adapter); -void rtl8192f_deinit_dm_priv(IN PADAPTER Adapter); -void rtl8192f_InitHalDm(IN PADAPTER Adapter); -void rtl8192f_HalDmWatchDog(IN PADAPTER Adapter); - -/* VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); */ - -/* void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); */ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_hal.h deleted file mode 100644 index c8a828a79da654..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_hal.h +++ /dev/null @@ -1,315 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_HAL_H__ -#define __RTL8192F_HAL_H__ - -#include "hal_data.h" - -#include "rtl8192f_spec.h" -#include "rtl8192f_rf.h" -#include "rtl8192f_dm.h" -#include "rtl8192f_recv.h" -#include "rtl8192f_xmit.h" -#include "rtl8192f_cmd.h" -#include "rtl8192f_led.h" -#include "Hal8192FPwrSeq.h" -#include "Hal8192FPhyReg.h" -#include "Hal8192FPhyCfg.h" -#ifdef DBG_CONFIG_ERROR_DETECT -#include "rtl8192f_sreset.h" -#endif -#ifdef CONFIG_LPS_POFF - #include "rtl8192f_lps_poff.h" -#endif - -#define FW_8192F_SIZE 0x8000 -#define FW_8192F_START_ADDRESS 0x4000 -#define FW_8192F_END_ADDRESS 0x5000 /* brian_zhang@realsil.com.cn */ - -#define IS_FW_HEADER_EXIST_8192F(_pFwHdr)\ - ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x92F0) - -typedef struct _RT_FIRMWARE { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[FW_8192F_SIZE]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8192F, *PRT_FIRMWARE_8192F; - -/* - * This structure must be cared byte-ordering - * - * Added by tynli. 2009.12.04. */ -typedef struct _RT_8192F_FIRMWARE_HDR { - /* 8-byte alinment required */ - - /* --- LONG WORD 0 ---- */ - u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ - u8 Category; /* AP/NIC and USB/PCI */ - u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ - u16 Version; /* FW Version */ - u16 Subversion; /* FW Subversion, default 0x00 */ - - /* --- LONG WORD 1 ---- */ - u8 Month; /* Release time Month field */ - u8 Date; /* Release time Date field */ - u8 Hour; /* Release time Hour field */ - u8 Minute; /* Release time Minute field */ - u16 RamCodeSize; /* The size of RAM code */ - u16 Rsvd2; - - /* --- LONG WORD 2 ---- */ - u32 SvnIdx; /* The SVN entry index */ - u32 Rsvd3; - - /* --- LONG WORD 3 ---- */ - u32 Rsvd4; - u32 Rsvd5; -} RT_8192F_FIRMWARE_HDR, *PRT_8192F_FIRMWARE_HDR; -#define DRIVER_EARLY_INT_TIME_8192F 0x05 -#define BCN_DMA_ATIME_INT_TIME_8192F 0x02 -/* for 8192F - * TX 64K, RX 16K, Page size 256B for TX*/ -#define PAGE_SIZE_TX_8192F 256 -#define PAGE_SIZE_RX_8192F 8 -#define TX_DMA_SIZE_8192F 0x10000/* 64K(TX) */ -#define RX_DMA_SIZE_8192F 0x4000/* 16K(RX) */ -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#ifdef CONFIG_FW_C2H_DEBUG - #define RX_DMA_RESERVED_SIZE_8192F 0x100 /* 256B, reserved for c2h debug message */ -#else - #define RX_DMA_RESERVED_SIZE_8192F 0xc0 /* 192B, reserved for tx report 24*8=192*/ -#endif -#define RX_DMA_BOUNDARY_8192F\ - (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F - 1) - - -/* Note: We will divide number of page equally for each queue other than public queue! */ - -/* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8192F - * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -#define BCNQ_PAGE_NUM_8192F (MAX_BEACON_LEN/PAGE_SIZE_TX_8192F + 6) /*0x08*/ - - -/* For WoWLan , more reserved page - * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 - * NS offload: 2 NDP info: 1 - */ -#ifdef CONFIG_WOWLAN - #define WOWLAN_PAGE_NUM_8192F 0x07 -#else - #define WOWLAN_PAGE_NUM_8192F 0x00 -#endif - -#ifdef CONFIG_PNO_SUPPORT - #undef WOWLAN_PAGE_NUM_8192F - #define WOWLAN_PAGE_NUM_8192F 0x15 -#endif - -#ifdef CONFIG_AP_WOWLAN - #define AP_WOWLAN_PAGE_NUM_8192F 0x02 -#endif - -#ifdef DBG_LA_MODE - #define LA_MODE_PAGE_NUM 0xE0 -#endif - -#define MAX_RX_DMA_BUFFER_SIZE_8192F (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F) - -#ifdef DBG_LA_MODE - #define TX_TOTAL_PAGE_NUMBER_8192F (0xFF - LA_MODE_PAGE_NUM) -#else - #define TX_TOTAL_PAGE_NUMBER_8192F (0xFF - BCNQ_PAGE_NUM_8192F - WOWLAN_PAGE_NUM_8192F) -#endif - -#define TX_PAGE_BOUNDARY_8192F (TX_TOTAL_PAGE_NUMBER_8192F + 1) - -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F \ - TX_TOTAL_PAGE_NUMBER_8192F -#define WMM_NORMAL_TX_PAGE_BOUNDARY_8192F \ - (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8192F + 1) - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8192F */ -#define NORMAL_PAGE_NUM_HPQ_8192F 0x8 -#define NORMAL_PAGE_NUM_LPQ_8192F 0x8 -#define NORMAL_PAGE_NUM_NPQ_8192F 0x8 -#define NORMAL_PAGE_NUM_EPQ_8192F 0x00 - -/* Note: For Normal Chip Setting, modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_8192F 0x30 -#define WMM_NORMAL_PAGE_NUM_LPQ_8192F 0x20 -#define WMM_NORMAL_PAGE_NUM_NPQ_8192F 0x20 -#define WMM_NORMAL_PAGE_NUM_EPQ_8192F 0x00 - - -#include "HalVerDef.h" -#include "hal_com.h" - -#define EFUSE_OOB_PROTECT_BYTES 56 /*0x1C8~0x1FF*/ - -#define HAL_EFUSE_MEMORY -#define HWSET_MAX_SIZE_8192F 512 -#define EFUSE_REAL_CONTENT_LEN_8192F 512 -#define EFUSE_MAP_LEN_8192F 512 -#define EFUSE_MAX_SECTION_8192F 64 - -/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ -#define EFUSE_IC_ID_OFFSET 506 -#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192F) - -#define EFUSE_ACCESS_ON 0x69 -#define EFUSE_ACCESS_OFF 0x00 - -/* ******************************************************** - * EFUSE for BT definition - * ******************************************************** */ -#define BANK_NUM 1 -#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -#define EFUSE_BT_REAL_CONTENT_LEN 1536/*512 * 3 */ -/* (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM)*/ -#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ -#define EFUSE_PROTECT_BYTES_BANK 16 - -typedef enum tag_Package_Definition { - PACKAGE_DEFAULT, - PACKAGE_QFN32, - PACKAGE_QFN40, - PACKAGE_QFN46 -} PACKAGE_TYPE_E; - -#define INCLUDE_MULTI_FUNC_BT(_Adapter) \ - (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ - (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -#ifdef CONFIG_FILE_FWIMG - extern char *rtw_fw_file_path; - extern char *rtw_fw_wow_file_path; - #ifdef CONFIG_MP_INCLUDED - extern char *rtw_fw_mp_bt_file_path; - #endif /* CONFIG_MP_INCLUDED */ -#endif /* CONFIG_FILE_FWIMG */ - -/* rtl8192f_hal_init.c */ -s32 rtl8192f_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -void rtl8192f_FirmwareSelfReset(PADAPTER padapter); -void rtl8192f_InitializeFirmwareVars(PADAPTER padapter); - -void rtl8192f_InitAntenna_Selection(PADAPTER padapter); -void rtl8192f_DeinitAntenna_Selection(PADAPTER padapter); -void rtl8192f_CheckAntenna_Selection(PADAPTER padapter); -void rtl8192f_init_default_value(PADAPTER padapter); - -s32 rtl8192f_InitLLTTable(PADAPTER padapter); - -s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -s32 CardDisableWithoutHWSM(PADAPTER padapter); - -/* EFuse */ -u8 GetEEPROMSize8192F(PADAPTER padapter); -void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -void Hal_EfuseParseTxPowerInfo_8192F(PADAPTER padapter, - u8 *PROMContent, BOOLEAN AutoLoadFail); -/* -void Hal_EfuseParseBTCoexistInfo_8192F(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -*/ -void Hal_EfuseParseEEPROMVer_8192F(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseChnlPlan_8192F(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseCustomerID_8192F(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseAntennaDiversity_8192F(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseXtal_8192F(PADAPTER pAdapter, - u8 *hwinfo, u8 AutoLoadFail); -void Hal_EfuseParseThermalMeter_8192F(PADAPTER padapter, - u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParseVoltage_8192F(PADAPTER pAdapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseBoardType_8192F(PADAPTER Adapter, - u8 *PROMContent, BOOLEAN AutoloadFail); -u8 Hal_ReadRFEType_8192F(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); -void rtl8192f_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8192f(_adapter *adapter); -u8 SetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val); -void GetHwReg8192F(PADAPTER padapter, u8 variable, u8 *val); -u8 SetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -u8 GetHalDefVar8192F(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); - -/* register */ -void rtl8192f_InitBeaconParameters(PADAPTER padapter); -void rtl8192f_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); - -void _InitMacAPLLSetting_8192F(PADAPTER Adapter); -void _8051Reset8192F(PADAPTER padapter); -#ifdef CONFIG_WOWLAN - void Hal_DetectWoWMode(PADAPTER pAdapter); -#endif /* CONFIG_WOWLAN */ - -void rtl8192f_start_thread(_adapter *padapter); -void rtl8192f_stop_thread(_adapter *padapter); - -#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) - void rtl8192fs_init_checkbthang_workqueue(_adapter *adapter); - void rtl8192fs_free_checkbthang_workqueue(_adapter *adapter); - void rtl8192fs_cancle_checkbthang_workqueue(_adapter *adapter); - void rtl8192fs_hal_check_bt_hang(_adapter *adapter); -#endif - -#ifdef CONFIG_GPIO_WAKEUP - void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -#endif -#ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -#endif -void CCX_FwC2HTxRpt_8192f(PADAPTER padapter, u8 *pdata, u8 len); - -u8 MRateToHwRate8192F(u8 rate); -u8 HwRateToMRate8192F(u8 rate); - -#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) - void check_bt_status_work(void *data); -#endif - - -void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); - -#ifdef CONFIG_AMPDU_PRETX_CD -void rtl8192f_pretx_cd_config(_adapter *adapter); -#endif - -#ifdef CONFIG_PCI_HCI - BOOLEAN InterruptRecognized8192FE(PADAPTER Adapter); - VOID UpdateInterruptMask8192FE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); - VOID InitMAC_TRXBD_8192FE(PADAPTER Adapter); - - u16 get_txbd_rw_reg(u16 ff_hwaddr); -#endif - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_led.h deleted file mode 100644 index 22530b488e7e76..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_led.h +++ /dev/null @@ -1,42 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_LED_H__ -#define __RTL8192F_LED_H__ - -#include -#include -#include - -#ifdef CONFIG_RTW_SW_LED -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI -void rtl8192fu_InitSwLeds(PADAPTER padapter); -void rtl8192fu_DeInitSwLeds(PADAPTER padapter); -#endif - -#ifdef CONFIG_SDIO_HCI -void rtl8192fs_InitSwLeds(PADAPTER padapter); -void rtl8192fs_DeInitSwLeds(PADAPTER padapter); -#endif - -#ifdef CONFIG_PCI_HCI -void rtl8192fe_InitSwLeds(PADAPTER padapter); -void rtl8192fe_DeInitSwLeds(PADAPTER padapter); -#endif -#endif /*#ifdef CONFIG_RTW_SW_LED*/ - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_recv.h deleted file mode 100644 index 989551b0b96035..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_recv.h +++ /dev/null @@ -1,111 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_RECV_H__ -#define __RTL8192F_RECV_H__ - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (32768) /* 32k */ - #endif - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ - -#elif defined(CONFIG_PCI_HCI) - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - -#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - - #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8192F + 1) - -#endif - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -#ifdef CONFIG_SDIO_HCI - #ifndef CONFIG_SDIO_RX_COPY - #undef MAX_RECVBUF_SZ - #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8192F - RX_DMA_RESERVED_SIZE_8192F) - #endif /* !CONFIG_SDIO_RX_COPY */ -#endif /* CONFIG_SDIO_HCI */ - -/*-----------------------------------------------------------------*/ -/* RTL8192F RX BUFFER DESC */ -/*-----------------------------------------------------------------*/ -/*DWORD 0*/ -#define SET_RX_BUFFER_DESC_DATA_LENGTH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -#define SET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) - -#define GET_RX_BUFFER_DESC_OWN_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -#define GET_RX_BUFFER_DESC_LS_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_BUFFER_DESC_FS_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -#ifdef USING_RX_TAG - #define GET_RX_BUFFER_DESC_RX_TAG_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) -#else - #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8192F(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -#endif - -/*DWORD 1*/ -#define SET_RX_BUFFER_PHYSICAL_LOW_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) - -/*DWORD 2*/ -#ifdef CONFIG_64BIT_DMA - #define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -#else - #define SET_RX_BUFFER_PHYSICAL_HIGH_8192F(__pRxStatusDesc, __Value) -#endif - - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8192fs_init_recv_priv(PADAPTER padapter); - void rtl8192fs_free_recv_priv(PADAPTER padapter); - s32 rtl8192fs_recv_hdl(_adapter *padapter); -#endif - -#ifdef CONFIG_USB_HCI - int rtl8192fu_init_recv_priv(_adapter *padapter); - void rtl8192fu_free_recv_priv(_adapter *padapter); - void rtl8192fu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8192fe_init_recv_priv(_adapter *padapter); - void rtl8192fe_free_recv_priv(_adapter *padapter); -#endif - -void rtl8192f_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); - -#endif /* __RTL8192F_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_rf.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_rf.h deleted file mode 100644 index 168eb7b82bcf7c..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_rf.h +++ /dev/null @@ -1,83 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2012 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_RF_H__ -#define __RTL8192F_RF_H__ - -/*default*/ -/*#define CONFIG_8192F_DRV_DIS*/ -/*AP*/ -#define CONFIG_8192F_TYPE3_DRV_DIS -#define CONFIG_8192F_TYPE4_DRV_DIS -/*unused*/ -#define CONFIG_8192F_TYPE10_DRV_DIS -#define CONFIG_8192F_TYPE11_DRV_DIS -#define CONFIG_8192F_TYPE12_DRV_DIS -#define CONFIG_8192F_TYPE13_DRV_DIS -#define CONFIG_8192F_TYPE14_DRV_DIS -#define CONFIG_8192F_TYPE15_DRV_DIS -#define CONFIG_8192F_TYPE16_DRV_DIS -#define CONFIG_8192F_TYPE17_DRV_DIS -#define CONFIG_8192F_TYPE18_DRV_DIS -#define CONFIG_8192F_TYPE19_DRV_DIS -#define CONFIG_8192F_TYPE20_DRV_DIS -#define CONFIG_8192F_TYPE21_DRV_DIS -#define CONFIG_8192F_TYPE22_DRV_DIS -#define CONFIG_8192F_TYPE23_DRV_DIS -#define CONFIG_8192F_TYPE24_DRV_DIS -#define CONFIG_8192F_TYPE25_DRV_DIS -#define CONFIG_8192F_TYPE26_DRV_DIS -#define CONFIG_8192F_TYPE27_DRV_DIS -#define CONFIG_8192F_TYPE28_DRV_DIS -#define CONFIG_8192F_TYPE29_DRV_DIS -#define CONFIG_8192F_TYPE30_DRV_DIS -#define CONFIG_8192F_TYPE31_DRV_DIS - - -#ifdef CONFIG_SDIO_HCI /**/ -/*usb*/ -#define CONFIG_8192F_TYPE1_DRV_DIS -#define CONFIG_8192F_TYPE5_DRV_DIS -/*pcie*/ -#define CONFIG_8192F_TYPE0_DRV_DIS -#define CONFIG_8192F_TYPE6_DRV_DIS -#define CONFIG_8192F_TYPE7_DRV_DIS -#define CONFIG_8192F_TYPE8_DRV_DIS -#define CONFIG_8192F_TYPE9_DRV_DIS -#endif/*CONFIG_SDIO_HCI*/ - -#ifdef CONFIG_USB_HCI -/*sdio*/ -#define CONFIG_8192F_TYPE2_DRV_DIS -/*pcie*/ -#define CONFIG_8192F_TYPE0_DRV_DIS -#define CONFIG_8192F_TYPE6_DRV_DIS -#define CONFIG_8192F_TYPE7_DRV_DIS -#define CONFIG_8192F_TYPE8_DRV_DIS -#define CONFIG_8192F_TYPE9_DRV_DIS -#endif/*CONFIG_USB_HCI*/ - -#ifdef CONFIG_PCI_HCI -/*sdio*/ -#define CONFIG_8192F_TYPE2_DRV_DIS -/*usb*/ -#define CONFIG_8192F_TYPE1_DRV_DIS -#define CONFIG_8192F_TYPE5_DRV_DIS -#endif/*CONFIG_PCI_HCI*/ - -int PHY_RF6052_Config8192F(IN PADAPTER pdapter); - -void PHY_RF6052SetBandwidth8192F(IN PADAPTER Adapter, IN enum channel_width Bandwidth); - -#endif/* __RTL8192F_RF_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_spec.h deleted file mode 100644 index a978cc604c11ee..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_spec.h +++ /dev/null @@ -1,538 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_SPEC_H__ -#define __RTL8192F_SPEC_H__ - -#include - - -#define HAL_NAV_UPPER_UNIT_8192F 128 /* micro-second */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_SYS_ISO_CTRL_8192F 0x0000 /* 2 Byte */ -#define REG_SYS_FUNC_EN_8192F 0x0002 /* 2 Byte */ -#define REG_APS_FSMCO_8192F 0x0004 /* 4 Byte */ -#define REG_SYS_CLKR_8192F 0x0008 /* 2 Byte */ -#define REG_9346CR_8192F 0x000A /* 2 Byte */ -#define REG_EE_VPD_8192F 0x000C /* 2 Byte */ -#define REG_AFE_MISC_8192F 0x0010 /* 1 Byte */ -#define REG_SPS0_CTRL_8192F 0x0011 /* 7 Byte */ -#define REG_SPS_OCP_CFG_8192F 0x0018 /* 4 Byte */ -#define REG_RSV_CTRL_8192F 0x001C /* 3 Byte */ -#define REG_RF_CTRL_8192F 0x001F /* 1 Byte */ -#define REG_LPLDO_CTRL_8192F 0x0023 /* 1 Byte */ -#define REG_AFE_XTAL_CTRL_8192F 0x0024 /* 4 Byte */ -#define REG_AFE_PLL_CTRL_8192F 0x0028 /* 4 Byte */ -#define REG_MAC_PLL_CTRL_EXT_8192F 0x002c /* 4 Byte */ -#define REG_EFUSE_CTRL_8192F 0x0030 -#define REG_EFUSE_TEST_8192F 0x0034 -#define REG_PWR_DATA_8192F 0x0038 -#define REG_CAL_TIMER_8192F 0x003C -#define REG_ACLK_MON_8192F 0x003E -#define REG_GPIO_MUXCFG_8192F 0x0040 -#define REG_GPIO_IO_SEL_8192F 0x0042 -#define REG_MAC_PINMUX_CFG_8192F 0x0043 -#define REG_GPIO_PIN_CTRL_8192F 0x0044 -#define REG_GPIO_INTM_8192F 0x0048 -#define REG_LEDCFG0_8192F 0x004C -#define REG_LEDCFG1_8192F 0x004D -#define REG_LEDCFG2_8192F 0x004E -#define REG_LEDCFG3_8192F 0x004F -#define REG_FSIMR_8192F 0x0050 -#define REG_FSISR_8192F 0x0054 -#define REG_HSIMR_8192F 0x0058 -#define REG_HSISR_8192F 0x005c -#define REG_GPIO_EXT_CTRL 0x0060 -#define REG_PAD_CTRL1_8192F 0x0064 -#define REG_MULTI_FUNC_CTRL_8192F 0x0068 -#define REG_GPIO_STATUS_8192F 0x006C -#define REG_SDIO_CTRL_8192F 0x0070 -#define REG_OPT_CTRL_8192F 0x0074 -#define REG_AFE_CTRL_4_8192F 0x0078 -#define REG_MCUFWDL_8192F 0x0080 -#define REG_8051FW_CTRL_8192F 0x0080 -#define REG_HMEBOX_DBG_0_8192F 0x0088 -#define REG_HMEBOX_DBG_1_8192F 0x008A -#define REG_HMEBOX_DBG_2_8192F 0x008C -#define REG_HMEBOX_DBG_3_8192F 0x008E -#define REG_WLLPS_CTRL 0x0090 -#define REG_HIMR0_8192F 0x00B0 -#define REG_HISR0_8192F 0x00B4 -#define REG_HIMR1_8192F 0x00B8 -#define REG_HISR1_8192F 0x00BC -#define REG_PMC_DBG_CTRL2_8192F 0x00CC -#define REG_EFUSE_BURN_GNT_8192F 0x00CF -#define REG_HPON_FSM_8192F 0x00EC -#define REG_SYS_CFG1_8192F 0x00F0 -#define REG_SYS_CFG2_8192F 0x00FC -#define REG_ROM_VERSION 0x00FD - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_CR_8192F 0x0100 -#define REG_PBP_8192F 0x0104 -#define REG_PKT_BUFF_ACCESS_CTRL_8192F 0x0106 -#define REG_TRXDMA_CTRL_8192F 0x010C -#define REG_TRXFF_BNDY_8192F 0x0114 -#define REG_TRXFF_STATUS_8192F 0x0118 -#define REG_RXFF_PTR_8192F 0x011C -#define REG_CPWM_8192F 0x012C -#define REG_FWIMR_8192F 0x0130 -#define REG_FWISR_8192F 0x0134 -#define REG_FTIMR_8192F 0x0138 -#define REG_PKTBUF_DBG_CTRL_8192F 0x0140 -#define REG_RXPKTBUF_CTRL_8192F 0x0142 -#define REG_PKTBUF_DBG_DATA_L_8192F 0x0144 -#define REG_PKTBUF_DBG_DATA_H_8192F 0x0148 - -#define REG_TC0_CTRL_8192F 0x0150 -#define REG_TC1_CTRL_8192F 0x0154 -#define REG_TC2_CTRL_8192F 0x0158 -#define REG_TC3_CTRL_8192F 0x015C -#define REG_TC4_CTRL_8192F 0x0160 -#define REG_TCUNIT_BASE_8192F 0x0164 -#define REG_RSVD3_8192F 0x0168 -#define REG_C2HEVT_CMD_ID_8192F 0x01A0 -#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -#define REG_C2HEVT_CMD_LEN_8192F 0x01AE -#define REG_C2HEVT_CLEAR_8192F 0x01AF -#define REG_MCUTST_1_8192F 0x01C0 -#define REG_WOWLAN_WAKE_REASON 0x01C7 -#define REG_FMETHR_8192F 0x01C8 -#define REG_HMETFR_8192F 0x01CC -#define REG_HMEBOX_0_8192F 0x01D0 -#define REG_HMEBOX_1_8192F 0x01D4 -#define REG_HMEBOX_2_8192F 0x01D8 -#define REG_HMEBOX_3_8192F 0x01DC -#define REG_LLT_INIT_8192F 0x01E0 -#define REG_HMEBOX_EXT0_8192F 0x01F0 -#define REG_HMEBOX_EXT1_8192F 0x01F4 -#define REG_HMEBOX_EXT2_8192F 0x01F8 -#define REG_HMEBOX_EXT3_8192F 0x01FC - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RQPN_8192F 0x0200 -#define REG_FIFOPAGE_8192F 0x0204 -#define REG_DWBCN0_CTRL_8192F REG_TDECTRL -#define REG_TXDMA_OFFSET_CHK_8192F 0x020C -#define REG_TXDMA_STATUS_8192F 0x0210 -#define REG_RQPN_NPQ_8192F 0x0214 -#define REG_DWBCN1_CTRL_8192F 0x0228 -#define REG_RQPN_EXQ1_EXQ2 0x0230 - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RXDMA_AGG_PG_TH_8192F 0x0280 -#define REG_FW_UPD_RDPTR_8192F 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -#define REG_RXDMA_CONTROL_8192F 0x0286 /* Control the RX DMA. */ -#define REG_RXDMA_STATUS_8192F 0x0288 -#define REG_RXDMA_MODE_CTRL_8192F 0x0290 -#define REG_EARLY_MODE_CONTROL_8192F 0x02BC -#define REG_RSVD5_8192F 0x02F0 -#define REG_RSVD6_8192F 0x02F4 - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_CTRL_REG_8192F 0x0300 -#define REG_INT_MIG_8192F 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_TXBD_DESA_8192F 0x0308 /* TX Beacon Descriptor Address */ -#define REG_MGQ_TXBD_DESA_8192F 0x0310 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_TXBD_DESA_8192F 0x0318 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_TXBD_DESA_8192F 0x0320 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_TXBD_DESA_8192F 0x0328 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_TXBD_DESA_8192F 0x0330 /* TX BK Queue Descriptor Address */ -#define REG_RXQ_RXBD_DESA_8192F 0x0338 /* RX Queue Descriptor Address */ -#define REG_HI0Q_TXBD_DESA_8192F 0x0340 -#define REG_HI1Q_TXBD_DESA_8192F 0x0348 -#define REG_HI2Q_TXBD_DESA_8192F 0x0350 -#define REG_HI3Q_TXBD_DESA_8192F 0x0358 -#define REG_HI4Q_TXBD_DESA_8192F 0x0360 -#define REG_HI5Q_TXBD_DESA_8192F 0x0368 -#define REG_HI6Q_TXBD_DESA_8192F 0x0370 -#define REG_HI7Q_TXBD_DESA_8192F 0x0378 -#define REG_MGQ_TXBD_NUM_8192F 0x0380 -#define REG_RX_RXBD_NUM_8192F 0x0382 -#define REG_VOQ_TXBD_NUM_8192F 0x0384 -#define REG_VIQ_TXBD_NUM_8192F 0x0386 -#define REG_BEQ_TXBD_NUM_8192F 0x0388 -#define REG_BKQ_TXBD_NUM_8192F 0x038A -#define REG_HI0Q_TXBD_NUM_8192F 0x038C -#define REG_HI1Q_TXBD_NUM_8192F 0x038E -#define REG_HI2Q_TXBD_NUM_8192F 0x0390 -#define REG_HI3Q_TXBD_NUM_8192F 0x0392 -#define REG_HI4Q_TXBD_NUM_8192F 0x0394 -#define REG_HI5Q_TXBD_NUM_8192F 0x0396 -#define REG_HI6Q_TXBD_NUM_8192F 0x0398 -#define REG_HI7Q_TXBD_NUM_8192F 0x039A -#define REG_TSFTIMER_HCI_8192F 0x039C -#define REG_BD_RW_PTR_CLR_8192F 0x039C - -/* Read Write Point */ -#define REG_VOQ_TXBD_IDX_8192F 0x03A0 -#define REG_VIQ_TXBD_IDX_8192F 0x03A4 -#define REG_BEQ_TXBD_IDX_8192F 0x03A8 -#define REG_BKQ_TXBD_IDX_8192F 0x03AC -#define REG_MGQ_TXBD_IDX_8192F 0x03B0 -#define REG_RXQ_TXBD_IDX_8192F 0x03B4 -#define REG_HI0Q_TXBD_IDX_8192F 0x03B8 -#define REG_HI1Q_TXBD_IDX_8192F 0x03BC -#define REG_HI2Q_TXBD_IDX_8192F 0x03C0 -#define REG_HI3Q_TXBD_IDX_8192F 0x03C4 -#define REG_HI4Q_TXBD_IDX_8192F 0x03C8 -#define REG_HI5Q_TXBD_IDX_8192F 0x03CC -#define REG_HI6Q_TXBD_IDX_8192F 0x03D0 -#define REG_HI7Q_TXBD_IDX_8192F 0x03D4 -#define REG_DBI_WDATA_V1_8192F 0x03E8 -#define REG_DBI_RDATA_V1_8192F 0x03EC -#define REG_DBI_FLAG_V1_8192F 0x03F0 -#define REG_MDIO_V1_8192F 0x03F4 -#define REG_HCI_MIX_CFG_8192F 0x03FC -#define REG_PCIE_HCPWM_8192FE 0x03D8 -#define REG_PCIE_HRPWM_8192FE 0x03DC -#define REG_PCIE_MIX_CFG_8192F 0x03F8 - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#define REG_QUEUELIST_INFO0_8192F 0x0400 -#define REG_QUEUELIST_INFO1_8192F 0x0404 -#define REG_QUEUELIST_INFO2_8192F 0x0414 -#define REG_TXPKT_EMPTY_8192F 0x0418 - -#define REG_FWHW_TXQ_CTRL_8192F 0x0420 -#define REG_HWSEQ_CTRL_8192F 0x0423 -#define REG_TXPKTBUF_BCNQ_BDNY_8192F 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY_8192F 0x0425 -#define REG_LIFECTRL_CTRL_8192F 0x0426 -#define REG_MULTI_BCNQ_OFFSET_8192F 0x0427 -#define REG_SPEC_SIFS_8192F 0x0428 -#define REG_RL_8192F 0x042A -#define REG_TXBF_CTRL_8192F 0x042C -#define REG_DARFRC_8192F 0x0430 -#define REG_RARFRC_8192F 0x0438 -#define REG_RRSR_8192F 0x0440 -#define REG_ARFR0_8192F 0x0444 -#define REG_ARFR1_8192F 0x044C -#define REG_CCK_CHECK_8192F 0x0454 -#define REG_AMPDU_MAX_TIME_8192F 0x0456 -#define REG_TXPKTBUF_BCNQ_BDNY1_8192F 0x0457 - -#define REG_AMPDU_MAX_LENGTH_8192F 0x0458 -#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8192F 0x045D -#define REG_NDPA_OPT_CTRL_8192F 0x045F -#define REG_FAST_EDCA_CTRL_8192F 0x0460 -#define REG_RD_RESP_PKT_TH_8192F 0x0463 -#define REG_DATA_SC_8192F 0x0483 -#define REG_TXRPT_START_OFFSET 0x04AC -#define REG_POWER_STAGE1_8192F 0x04B4 -#define REG_POWER_STAGE2_8192F 0x04B8 -#define REG_AMPDU_BURST_MODE_8192F 0x04BC -#define REG_PKT_VO_VI_LIFE_TIME_8192F 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME_8192F 0x04C2 -#define REG_STBC_SETTING_8192F 0x04C4 -#define REG_HT_SINGLE_AMPDU_8192F 0x04C7 -#define REG_PROT_MODE_CTRL_8192F 0x04C8 -#define REG_MAX_AGGR_NUM_8192F 0x04CA -#define REG_RTS_MAX_AGGR_NUM_8192F 0x04CB -#define REG_BAR_MODE_CTRL_8192F 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT_8192F 0x04CF -#define REG_MACID_PKT_DROP0_8192F 0x04D0 -#define REG_MACID_PKT_SLEEP_8192F 0x04D4 -#define REG_PRECNT_CTRL_8192F 0x04E5 -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ -#define REG_EDCA_VO_PARAM_8192F 0x0500 -#define REG_EDCA_VI_PARAM_8192F 0x0504 -#define REG_EDCA_BE_PARAM_8192F 0x0508 -#define REG_EDCA_BK_PARAM_8192F 0x050C -#define REG_BCNTCFG_8192F 0x0510 -#define REG_PIFS_8192F 0x0512 -#define REG_RDG_PIFS_8192F 0x0513 -#define REG_SIFS_CTX_8192F 0x0514 -#define REG_SIFS_TRX_8192F 0x0516 -#define REG_AGGR_BREAK_TIME_8192F 0x051A -#define REG_SLOT_8192F 0x051B -#define REG_TX_PTCL_CTRL_8192F 0x0520 -#define REG_TXPAUSE_8192F 0x0522 -#define REG_DIS_TXREQ_CLR_8192F 0x0523 -#define REG_RD_CTRL_8192F 0x0524 -/* - * Format for offset 540h-542h: - * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. - * [7:4]: Reserved. - * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. - * [23:20]: Reserved - * Description: - * | - * |<--Setup--|--Hold------------>| - * --------------|---------------------- - * | - * TBTT - * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. - * Described by Designer Tim and Bruce, 2011-01-14. - * */ -#define REG_TBTT_PROHIBIT_8192F 0x0540 -#define REG_RD_NAV_NXT_8192F 0x0544 -#define REG_NAV_PROT_LEN_8192F 0x0546 -#define REG_BCN_CTRL_8192F 0x0550 -#define REG_BCN_CTRL_1_8192F 0x0551 -#define REG_MBID_NUM_8192F 0x0552 -#define REG_DUAL_TSF_RST_8192F 0x0553 -#define REG_BCN_INTERVAL_8192F 0x0554 -#define REG_DRVERLYINT_8192F 0x0558 -#define REG_BCNDMATIM_8192F 0x0559 -#define REG_ATIMWND_8192F 0x055A -#define REG_USTIME_TSF_8192F 0x055C -#define REG_BCN_MAX_ERR_8192F 0x055D -#define REG_RXTSF_OFFSET_CCK_8192F 0x055E -#define REG_RXTSF_OFFSET_OFDM_8192F 0x055F -#define REG_TSFTR_8192F 0x0560 -#define REG_CTWND_8192F 0x0572 -#define REG_SECONDARY_CCA_CTRL_8192F 0x0577 -#define REG_PSTIMER_8192F 0x0580 -#define REG_TIMER0_8192F 0x0584 -#define REG_TIMER1_8192F 0x0588 -#define REG_ACMHWCTRL_8192F 0x05C0 -#define REG_SCH_TXCMD_8192F 0x05F8 - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ -#define REG_MAC_CR_8192F 0x0600 -#define REG_TCR_8192F 0x0604 -#define REG_RCR_8192F 0x0608 -#define REG_RX_PKT_LIMIT_8192F 0x060C -#define REG_RX_DLK_TIME_8192F 0x060D -#define REG_RX_DRVINFO_SZ_8192F 0x060F - -#define REG_MACID_8192F 0x0610 -#define REG_BSSID_8192F 0x0618 -#define REG_MAR_8192F 0x0620 -#define REG_MBIDCAMCFG_8192F 0x0628 - - -#define REG_USTIME_EDCA_8192F 0x0638 -#define REG_MAC_SPEC_SIFS_8192F 0x063A -#define REG_RESP_SIFP_CCK_8192F 0x063C -#define REG_RESP_SIFS_OFDM_8192F 0x063E -#define REG_ACKTO_8192F 0x0640 -#define REG_CTS2TO_8192F 0x0641 -#define REG_EIFS_8192F 0x0642 - -#define REG_NAV_UPPER_8192F 0x0652 /* unit of 128*/ -#define REG_TRXPTCL_CTL_8192F 0x0668 - -/* Security*/ -#define REG_CAMCMD_8192F 0x0670 -#define REG_CAMWRITE_8192F 0x0674 -#define REG_CAMREAD_8192F 0x0678 -#define REG_CAMDBG_8192F 0x067C -#define REG_SECCFG_8192F 0x0680 - -/* Power */ -#define REG_WOW_CTRL_8192F 0x0690 -#define REG_PS_RX_INFO_8192F 0x0692 -#define REG_UAPSD_TID_8192F 0x0693 -#define REG_WKFMCAM_CMD_8192F 0x0698 -#define REG_WKFMCAM_NUM_8192F 0x0698 -#define REG_WKFMCAM_RWD_8192F 0x069C -#define REG_RXFLTMAP0_8192F 0x06A0 -#define REG_RXFLTMAP1_8192F 0x06A2 -#define REG_RXFLTMAP2_8192F 0x06A4 -#define REG_BCN_PSR_RPT_8192F 0x06A8 -#define REG_BT_COEX_TABLE_8192F 0x06C0 -#define REG_BFMER0_INFO_8192F 0x06E4 -#define REG_BFMER1_INFO_8192F 0x06EC -#define REG_CSI_RPT_PARAM_BW20_8192F 0x06F4 -#define REG_CSI_RPT_PARAM_BW40_8192F 0x06F8 -#define REG_CSI_RPT_PARAM_BW80_8192F 0x06FC - -/* Hardware Port 2 */ -#define REG_MACID1_8192F 0x0700 -#define REG_BSSID1_8192F 0x0708 -#define REG_BFMEE_SEL_8192F 0x0714 -#define REG_SND_PTCL_CTRL_8192F 0x0718 - -/* LTR */ -#define REG_LTR_CTRL_BASIC_8192F 0x07A4 -#define REG_LTR_IDLE_LATENCY_V1_8192F 0x0798 -#define REG_LTR_ACTIVE_LATENCY_V1_8192F 0x079C - -/* GPIO Control */ -#define REG_SW_GPIO_SHARE_CTRL_8192F 0x1038 -#define REG_SW_GPIO_A_OUT_8192F 0x1040 -#define REG_SW_GPIO_A_OEN_8192F 0x1044 - -/* ************************************************************ - * SDIO Bus Specification - * ************************************************************ */ - -/* ----------------------------------------------------- - * SDIO CMD Address Mapping - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * I/O bus domain (Host) - * ----------------------------------------------------- */ -/*SDIO Host Interrupt Mask Register */ -#define SDIO_HIMR_CRCERR_MSK BIT(31) -/* SDIO Host Interrupt Service Routine */ -#define SDIO_HISR_HEISR_IND_INT BIT(28) -#define SDIO_HISR_HSISR2_IND_INT BIT(29) -#define SDIO_HISR_HSISR3_IND_INT BIT(30) -#define SDIO_HISR_SDIO_CRCERR BIT(31) -/* ----------------------------------------------------- - * SDIO register - * ----------------------------------------------------- */ -#define SDIO_REG_HCPWM1_8192F 0x038/* HCI Current Power Mode 1 */ -#define SDIO_REG_FREE_TXPG1_8192F 0x0020 /* Free Tx Buffer Page1*/ -#define SDIO_REG_FREE_TXPG2_8192F 0x0024 /* Free Tx Buffer Page1*/ -#define SDIO_REG_FREE_TXPG3_8192F 0x0028 -#define SDIO_REG_AC_OQT_FREEPG_8192F 0x002A -#define SDIO_REG_NOAC_OQT_FREEPG_8192F 0x002B -/* **************************************************************************** - * 8192F Regsiter Bit and Content definition - * **************************************************************************** */ - -#define BIT_USB_RXDMA_AGG_EN BIT(31) -#define RXDMA_AGG_MODE_EN BIT(1) - -#ifdef CONFIG_WOWLAN - #define RXPKT_RELEASE_POLL BIT(16) - #define RXDMA_IDLE BIT(17) - #define RW_RELEASE_EN BIT(18) -#endif - -#ifdef CONFIG_AMPDU_PRETX_CD -/*#define BIT_ERRORHDL_INT BIT(2)*/ -/*#define BIT_MACTX_ERR_3 BIT(4)*/ -#define BIT_PRE_TX_CMD_8192F BIT(6) -#define BIT_EN_PRECNT_8192F BIT(11) -#endif -/* SDIO Host Interrupt Service Routine */ -#define SDIO_HISR_HEISR_IND_INT BIT(28) -#define SDIO_HISR_HSISR2_IND_INT BIT(29) -#define SDIO_HISR_HSISR3_IND_INT BIT(30) -#define SDIO_HISR_SDIO_CRCERR BIT(31) - -/* PCIE Host Interrupt Mask Register (HIMR) */ -#ifdef CONFIG_PCI_HCI -/* ---------------------------------------------------------------------------- - * * 8192F IMR/ISR bits (offset 0xB0, 8bits) - * * ---------------------------------------------------------------------------- */ - -#define IMR_DISABLED_8192F 0 -/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -#define IMR_TIMER2_8192F BIT(31) /* Timeout interrupt 2 */ -#define IMR_TIMER1_8192F BIT(30) /* Timeout interrupt 1 */ -#define IMR_PSTIMEOUT_8192F BIT(29) /* Power Save Time Out Interrupt */ -#define IMR_GTINT4_8192F BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -#define IMR_GTINT3_8192F BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -#define IMR_TXBCN0ERR_8192F BIT(26) /* Transmit Beacon0 Error */ -#define IMR_TXBCN0OK_8192F BIT(25) /* Transmit Beacon0 OK */ -#define IMR_TSF_BIT32_TOGGLE_8192F BIT(24) /* TSF Timer BIT32 toggle indication interrupt */ -#define IMR_BCNDMAINT0_8192F BIT(20) /* Beacon DMA Interrupt 0 */ -#define IMR_BCNDERR0_8192F BIT(16) /* Beacon Queue DMA OK0 */ -#define IMR_HSISR_IND_ON_INT_8192F BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -#define IMR_BCNDMAINT_E_8192F BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -#define IMR_ATIMEND_8192F BIT(12) /* CTWidnow End or ATIM Window End */ -#define IMR_C2HCMD_8192F BIT(10) /* CPU to Host Command INT status, Write 1 clear */ -#define IMR_CPWM2_8192F BIT(9) /* CPU power mode exchange INT status, Write 1 clear */ -#define IMR_CPWM_8192F BIT(8) /* CPU power mode exchange INT status, Write 1 clear */ -#define IMR_HIGHDOK_8192F BIT(7) /* High Queue DMA OK */ -#define IMR_MGNTDOK_8192F BIT(6) /* Management Queue DMA OK */ -#define IMR_BKDOK_8192F BIT(5) /* AC_BK DMA OK */ -#define IMR_BEDOK_8192F BIT(4) /* AC_BE DMA OK */ -#define IMR_VIDOK_8192F BIT(3) /* AC_VI DMA OK */ -#define IMR_VODOK_8192F BIT(2) /* AC_VO DMA OK */ -#define IMR_RDU_8192F BIT(1) /* Rx Descriptor Unavailable */ -#define IMR_ROK_8192F BIT(0) /* Receive DMA OK */ - -/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -#define IMR_MCUERR_8192F BIT(28) -#define IMR_BCNDMAINT7_8192F BIT(27) /* Beacon DMA Interrupt 7 */ -#define IMR_BCNDMAINT6_8192F BIT(26) /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5_8192F BIT(25) /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4_8192F BIT(24) /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3_8192F BIT(23) /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2_8192F BIT(22) /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1_8192F BIT(21) /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDOK7_8192F BIT(20) /* Beacon Queue DMA OK Interrup 7 */ -#define IMR_BCNDOK6_8192F BIT(19) /* Beacon Queue DMA OK Interrup 6 */ -#define IMR_BCNDOK5_8192F BIT(18) /* Beacon Queue DMA OK Interrup 5 */ -#define IMR_BCNDOK4_8192F BIT(17) /* Beacon Queue DMA OK Interrup 4 */ -#define IMR_BCNDOK3_8192F BIT(16) /* Beacon Queue DMA OK Interrup 3 */ -#define IMR_BCNDOK2_8192F BIT(15) /* Beacon Queue DMA OK Interrup 2 */ -#define IMR_BCNDOK1_8192F BIT(14) /* Beacon Queue DMA OK Interrup 1 */ -#define IMR_ATIMEND_E_8192F BIT(13) /* ATIM Window End Extension for Win7 */ -#define IMR_TXERR_8192F BIT(11) /* Tx Error Flag Interrupt status, write 1 clear. */ -#define IMR_RXERR_8192F BIT(10) /* Rx Error Flag INT status, Write 1 clear */ -#define IMR_TXFOVW_8192F BIT(9) /* Transmit FIFO Overflow */ -#define IMR_RXFOVW_8192F BIT(8) /* Receive FIFO Overflow */ - -/* #define IMR_RX_MASK (IMR_ROK_8192F|IMR_RDU_8192F|IMR_RXFOVW_8192F) */ -#define IMR_TX_MASK (IMR_VODOK_8192F | IMR_VIDOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F | IMR_MGNTDOK_8192F | IMR_HIGHDOK_8192F) -#define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8192F | IMR_TXBCN0OK_8192F | IMR_TXBCN0ERR_8192F | IMR_BCNDERR0_8192F) -#define RT_AC_INT_MASKS (IMR_VIDOK_8192F | IMR_VODOK_8192F | IMR_BEDOK_8192F | IMR_BKDOK_8192F) -#endif /* CONFIG_PCI_HCI */ - -/* 2 HSISR - * interrupt mask which needs to clear */ -#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ - HSISR_SPS_OCP_INT |\ - HSISR_RON_INT |\ - HSISR_PDNINT |\ - HSISR_GPIO9_INT) - -#define _TXDMA_HIQ_MAP_8192F(x) (((x) & 0x7) << 19) -#define _TXDMA_MGQ_MAP_8192F(x) (((x) & 0x7) << 16) -#define _TXDMA_BKQ_MAP_8192F(x) (((x) & 0x7) << 13) -#define _TXDMA_BEQ_MAP_8192F(x) (((x) & 0x7) << 10) -#define _TXDMA_VIQ_MAP_8192F(x) (((x) & 0x7) << 7) -#define _TXDMA_VOQ_MAP_8192F(x) (((x) & 0x7) << 4) - -/*mac queue info*/ -#define QUEUE_TOTAL_NUM 20/*reg414h : 0~f ac queue 0x10~0x13MGQ HIQ BCNQ CMDQ*/ -#define QUEUE_ACQ_NUM 16 -#define QUEUE_INDEX_MGQ 0x10 -#define QUEUE_INDEX_HIQ 0x11 -#define QUEUE_INDEX_BCNQ 0x12 -#define QUEUE_INDEX_CMDQ 0x13 -#endif /* __RTL8192F_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_sreset.h deleted file mode 100644 index cf881c43184c57..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_sreset.h +++ /dev/null @@ -1,24 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8192F_SRESET_H_ -#define _RTL8192F_SRESET_H_ - -#include - -#ifdef DBG_CONFIG_ERROR_DETECT - extern void rtl8192f_sreset_xmit_status_check(_adapter *padapter); - extern void rtl8192f_sreset_linked_status_check(_adapter *padapter); -#endif /* DBG_CONFIG_ERROR_DETECT */ -#endif /* _RTL8192F_SRESET_H_ */ \ No newline at end of file diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_xmit.h deleted file mode 100644 index 6e0f1ea7c57579..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8192f_xmit.h +++ /dev/null @@ -1,531 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8192F_XMIT_H__ -#define __RTL8192F_XMIT_H__ - - -#define MAX_TID (15) - - -#ifndef __INC_HAL8192FDESC_H -#define __INC_HAL8192FDESC_H - -#define RX_STATUS_DESC_SIZE_8192F 24 -#define RX_DRV_INFO_SIZE_UNIT_8192F 8 - - -/* DWORD 0 */ -#define SET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -#define SET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) - -#define GET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -#define GET_RX_STATUS_DESC_CRC32_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -#define GET_RX_STATUS_DESC_ICV_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -#define GET_RX_STATUS_DESC_SECURITY_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -#define GET_RX_STATUS_DESC_QOS_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -#define GET_RX_STATUS_DESC_SHIFT_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -#define GET_RX_STATUS_DESC_PHY_STATUS_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -#define GET_RX_STATUS_DESC_SWDEC_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -#define GET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -#define GET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) - -/* DWORD 1 */ -#define GET_RX_STATUS_DESC_MACID_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -#define GET_RX_STATUS_DESC_TID_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -#define GET_RX_STATUS_DESC_AMSDU_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -#define GET_RX_STATUS_DESC_RXID_MATCH_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -#define GET_RX_STATUS_DESC_PAGGR_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -#define GET_RX_STATUS_DESC_A1_FIT_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -#define GET_RX_STATUS_DESC_CHKERR_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -#define GET_RX_STATUS_DESC_IPVER_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -#define GET_RX_STATUS_DESC_IS_TCPUDP__8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -#define GET_RX_STATUS_DESC_CHK_VLD_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -#define GET_RX_STATUS_DESC_PAM_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -#define GET_RX_STATUS_DESC_PWR_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -#define GET_RX_STATUS_DESC_MORE_DATA_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -#define GET_RX_STATUS_DESC_MORE_FRAG_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -#define GET_RX_STATUS_DESC_TYPE_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -#define GET_RX_STATUS_DESC_MC_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -#define GET_RX_STATUS_DESC_BC_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) - -/* DWORD 2 */ -#define GET_RX_STATUS_DESC_SEQ_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -#define GET_RX_STATUS_DESC_FRAG_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -#define GET_RX_STATUS_DESC_RX_IS_QOS_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -#define GET_RX_STATUS_DESC_RPT_SEL_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -#define GET_RX_STATUS_DESC_FCS_OK_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) - -/* DWORD 3 */ -#define GET_RX_STATUS_DESC_RX_RATE_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -#define GET_RX_STATUS_DESC_HTC_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -#define GET_RX_STATUS_DESC_EOSP_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -#define GET_RX_STATUS_DESC_BSSID_FIT_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -#ifdef CONFIG_USB_RX_AGGREGATION -#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -#endif -#define GET_RX_STATUS_DESC_PATTERN_MATCH_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -#define GET_RX_STATUS_DESC_UNICAST_MATCH_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -#define GET_RX_STATUS_DESC_MAGIC_MATCH_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) - -/* DWORD 6 */ -#define GET_RX_STATUS_DESC_MATCH_ID_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) - -/* DWORD 5 */ -#define GET_RX_STATUS_DESC_TSFL_8192F(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) - -#define GET_RX_STATUS_DESC_BUFF_ADDR64_8192F(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) - - - -/* Dword 0, rsvd: bit26, bit28 */ -#define GET_TX_DESC_OWN_8192F(__pTxDesc)\ - LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) - -#define SET_TX_DESC_PKT_SIZE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -#define SET_TX_DESC_OFFSET_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -#define SET_TX_DESC_BMC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -#define SET_TX_DESC_HTC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -#define SET_TX_DESC_AMSDU_PAD_EN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -#define SET_TX_DESC_NO_ACM_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -#define SET_TX_DESC_GF_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) - -/* Dword 1 */ -#define SET_TX_DESC_MACID_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -#define SET_TX_DESC_QUEUE_SEL_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -#define SET_TX_DESC_RDG_NAV_EXT_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -#define SET_TX_DESC_LSIG_TXOP_EN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -#define SET_TX_DESC_PIFS_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -#define SET_TX_DESC_RATE_ID_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -#define SET_TX_DESC_EN_DESC_ID_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -#define SET_TX_DESC_SEC_TYPE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -#define SET_TX_DESC_PKT_OFFSET_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -#define SET_TX_DESC_MORE_DATA_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) - -/* Dword 2 ADD HW_DIG*/ -#define SET_TX_DESC_PAID_92F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) -#define SET_TX_DESC_CCA_RTS_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -#define SET_TX_DESC_AGG_ENABLE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -#define SET_TX_DESC_RDG_ENABLE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -#define SET_TX_DESC_NULL0_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -#define SET_TX_DESC_NULL1_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -#define SET_TX_DESC_BK_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -#define SET_TX_DESC_MORE_FRAG_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -#define SET_TX_DESC_RAW_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -#define SET_TX_DESC_CCX_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -#define SET_TX_DESC_AMPDU_DENSITY_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -#define SET_TX_DESC_BT_INT_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -#define SET_TX_DESC_HW_DIG_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 7, __Value) - -/* Dword 3 */ -#define SET_TX_DESC_HWSEQ_SEL_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -#define SET_TX_DESC_USE_RATE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -#define SET_TX_DESC_DISABLE_RTS_FB_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -#define SET_TX_DESC_DISABLE_FB_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -#define SET_TX_DESC_CTS2SELF_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -#define SET_TX_DESC_RTS_ENABLE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -#define SET_TX_DESC_HW_RTS_ENABLE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -#define SET_TX_DESC_CHK_EN_92F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value) -#define SET_TX_DESC_NAV_USE_HDR_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -#define SET_TX_DESC_USE_MAX_LEN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -#define SET_TX_DESC_MAX_AGG_NUM_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -#define SET_TX_DESC_NDPA_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) -#define SET_TX_DESC_AMPDU_MAX_TIME_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) - -/* Dword 4 */ -#define SET_TX_DESC_TX_RATE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -#define SET_TX_DESC_TX_TRY_RATE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -#define SET_TX_DESC_DATA_RETRY_LIMIT_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -#define SET_TX_DESC_RTS_RATE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -#define SET_TX_DESC_PCTS_EN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -#define SET_TX_DESC_PCTS_MASK_IDX_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) - -/* Dword 5 */ -#define SET_TX_DESC_DATA_SC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -#define SET_TX_DESC_DATA_SHORT_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -#define SET_TX_DESC_DATA_BW_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -#define SET_TX_DESC_DATA_LDPC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) -#define SET_TX_DESC_DATA_STBC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -#define SET_TX_DESC_RTS_STBC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -#define SET_TX_DESC_RTS_SHORT_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -#define SET_TX_DESC_RTS_SC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -#define SET_TX_DESC_PORT_ID_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 1, __Value) -#define SET_TX_DESC_DROP_ID_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 22, 2, __Value) -#define SET_TX_DESC_PATH_A_EN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) -#define SET_TX_DESC_PATH_B_EN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 25, 1, __Value) -#define SET_TX_DESC_TXPWR_OF_SET_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) - -/* Dword 6 */ -#define SET_TX_DESC_SW_DEFINE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -#define SET_TX_DESC_MBSSID_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -#define SET_TX_DESC_RF_SEL_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) - -/* Dword 7 */ -#ifdef CONFIG_PCI_HCI -#define SET_TX_DESC_TX_BUFFER_SIZE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#ifdef CONFIG_USB_HCI -#define SET_TX_DESC_TX_DESC_CHECKSUM_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#ifdef CONFIG_SDIO_HCI -#define SET_TX_DESC_TX_TIMESTAMP_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) -#endif - -#define SET_TX_DESC_USB_TXAGG_NUM_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - -/* Dword 8 */ -#define SET_TX_DESC_RTS_RC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -#define SET_TX_DESC_BAR_RC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -#define SET_TX_DESC_DATA_RC_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -#define SET_TX_DESC_HWSEQ_EN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -#define SET_TX_DESC_NEXTHEADPAGE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -#define SET_TX_DESC_TAILPAGE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) - -/* Dword 9 */ -#define SET_TX_DESC_PADDING_LEN_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -#define SET_TX_DESC_SEQ_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -#define SET_TX_DESC_FINAL_DATA_RATE_8192F(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) - - -#define SET_EARLYMODE_PKTNUM_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -#define SET_EARLYMODE_LEN0_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -#define SET_EARLYMODE_LEN1_1_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -#define SET_EARLYMODE_LEN1_2_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -#define SET_EARLYMODE_LEN2_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -#define SET_EARLYMODE_LEN3_8192F(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) - - -/*-----------------------------------------------------------------*/ -/* RTL8192F TX BUFFER DESC */ -/*-----------------------------------------------------------------*/ -#ifdef CONFIG_64BIT_DMA - #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) - #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) - #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) - #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -#else - #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) - #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) - #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) - #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ -#endif -/* ********************************************************* */ - -/* 64 bits -- 32 bits */ -/* ======= ======= */ -/* Dword 0 0 */ -#define SET_TX_BUFF_DESC_LEN_0_8192F(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -#define SET_TX_BUFF_DESC_PSB_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -#define SET_TX_BUFF_DESC_OWN_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) - -/* Dword 1 1 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -#define GET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -/* Dword 2 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) -#ifdef CONFIG_64BIT_DMA - #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -#else - #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) 0 -#endif -/* Dword 3 NA */ -/* RESERVED 0 */ -/* Dword 4 2 */ -#define SET_TX_BUFF_DESC_LEN_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) -#define SET_TX_BUFF_DESC_AMSDU_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 5 3 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 6 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 7 NA */ -/*RESERVED 0 */ -/* Dword 8 4 */ -#define SET_TX_BUFF_DESC_LEN_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) -#define SET_TX_BUFF_DESC_AMSDU_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 9 5 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 10 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 11 NA */ -/*RESERVED 0 */ -/* Dword 12 6 */ -#define SET_TX_BUFF_DESC_LEN_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) -#define SET_TX_BUFF_DESC_AMSDU_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 13 7 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 14 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 15 NA */ -/*RESERVED 0 */ - - -#endif -/* ----------------------------------------------------------- - * - * Rate - * - * ----------------------------------------------------------- - * CCK Rates, TxHT = 0 */ -#define DESC8192F_RATE1M 0x00 -#define DESC8192F_RATE2M 0x01 -#define DESC8192F_RATE5_5M 0x02 -#define DESC8192F_RATE11M 0x03 - -/* OFDM Rates, TxHT = 0 */ -#define DESC8192F_RATE6M 0x04 -#define DESC8192F_RATE9M 0x05 -#define DESC8192F_RATE12M 0x06 -#define DESC8192F_RATE18M 0x07 -#define DESC8192F_RATE24M 0x08 -#define DESC8192F_RATE36M 0x09 -#define DESC8192F_RATE48M 0x0a -#define DESC8192F_RATE54M 0x0b - -/* MCS Rates, TxHT = 1 */ -#define DESC8192F_RATEMCS0 0x0c -#define DESC8192F_RATEMCS1 0x0d -#define DESC8192F_RATEMCS2 0x0e -#define DESC8192F_RATEMCS3 0x0f -#define DESC8192F_RATEMCS4 0x10 -#define DESC8192F_RATEMCS5 0x11 -#define DESC8192F_RATEMCS6 0x12 -#define DESC8192F_RATEMCS7 0x13 -#define DESC8192F_RATEMCS8 0x14 -#define DESC8192F_RATEMCS9 0x15 -#define DESC8192F_RATEMCS10 0x16 -#define DESC8192F_RATEMCS11 0x17 -#define DESC8192F_RATEMCS12 0x18 -#define DESC8192F_RATEMCS13 0x19 -#define DESC8192F_RATEMCS14 0x1a -#define DESC8192F_RATEMCS15 0x1b -#define DESC8192F_RATEVHTSS1MCS0 0x2c -#define DESC8192F_RATEVHTSS1MCS1 0x2d -#define DESC8192F_RATEVHTSS1MCS2 0x2e -#define DESC8192F_RATEVHTSS1MCS3 0x2f -#define DESC8192F_RATEVHTSS1MCS4 0x30 -#define DESC8192F_RATEVHTSS1MCS5 0x31 -#define DESC8192F_RATEVHTSS1MCS6 0x32 -#define DESC8192F_RATEVHTSS1MCS7 0x33 -#define DESC8192F_RATEVHTSS1MCS8 0x34 -#define DESC8192F_RATEVHTSS1MCS9 0x35 -#define DESC8192F_RATEVHTSS2MCS0 0x36 -#define DESC8192F_RATEVHTSS2MCS1 0x37 -#define DESC8192F_RATEVHTSS2MCS2 0x38 -#define DESC8192F_RATEVHTSS2MCS3 0x39 -#define DESC8192F_RATEVHTSS2MCS4 0x3a -#define DESC8192F_RATEVHTSS2MCS5 0x3b -#define DESC8192F_RATEVHTSS2MCS6 0x3c -#define DESC8192F_RATEVHTSS2MCS7 0x3d -#define DESC8192F_RATEVHTSS2MCS8 0x3e -#define DESC8192F_RATEVHTSS2MCS9 0x3f - - -#define RX_HAL_IS_CCK_RATE_8192F(pDesc)\ - (GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE1M || \ - GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE2M || \ - GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE5_5M || \ - GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE11M) - -#ifdef CONFIG_TRX_BD_ARCH - struct tx_desc; -#endif - -void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc); -void rtl8192f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -void rtl8192f_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8192f_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8192f_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8192f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); - -#if defined(CONFIG_CONCURRENT_MODE) - void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -#endif -void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8192fs_init_xmit_priv(PADAPTER padapter); - void rtl8192fs_free_xmit_priv(PADAPTER padapter); - s32 rtl8192fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8192fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8192fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8192fs_xmit_buf_handler(PADAPTER padapter); - thread_return rtl8192fs_xmit_thread(thread_context context); - #define hal_xmit_handler rtl8192fs_xmit_buf_handler -#endif - -#ifdef CONFIG_USB_HCI - s32 rtl8192fu_init_xmit_priv(PADAPTER padapter); - void rtl8192fu_free_xmit_priv(PADAPTER padapter); - s32 rtl8192fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8192fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8192fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8192fu_xmit_buf_handler(PADAPTER padapter); - #define hal_xmit_handler rtl8192fu_xmit_buf_handler - void rtl8192fu_xmit_tasklet(void *priv); - s32 rtl8192fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); - void _dbg_dump_tx_info(_adapter *padapter,int frame_tag,struct tx_desc *ptxdesc); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8192fe_init_xmit_priv(PADAPTER padapter); - void rtl8192fe_free_xmit_priv(PADAPTER padapter); - struct xmit_buf *rtl8192fe_dequeue_xmitbuf(struct rtw_tx_ring *ring); - void rtl8192fe_xmitframe_resume(_adapter *padapter); - s32 rtl8192fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8192fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8192fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8192fe_xmit_tasklet(void *priv); -#endif - -u8 BWMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib); -u8 SCMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_cmd.h deleted file mode 100644 index dd0439bac73b26..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_cmd.h +++ /dev/null @@ -1,205 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8703B_CMD_H__ -#define __RTL8703B_CMD_H__ - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ - * --------------------------------------------------------------------------------------------------------- */ - -enum h2c_cmd_8703B { - /* Common Class: 000 */ - H2C_8703B_RSVD_PAGE = 0x00, - H2C_8703B_MEDIA_STATUS_RPT = 0x01, - H2C_8703B_SCAN_ENABLE = 0x02, - H2C_8703B_KEEP_ALIVE = 0x03, - H2C_8703B_DISCON_DECISION = 0x04, - H2C_8703B_PSD_OFFLOAD = 0x05, - H2C_8703B_AP_OFFLOAD = 0x08, - H2C_8703B_BCN_RSVDPAGE = 0x09, - H2C_8703B_PROBERSP_RSVDPAGE = 0x0A, - H2C_8703B_FCS_RSVDPAGE = 0x10, - H2C_8703B_FCS_INFO = 0x11, - H2C_8703B_AP_WOW_GPIO_CTRL = 0x13, - - /* PoweSave Class: 001 */ - H2C_8703B_SET_PWR_MODE = 0x20, - H2C_8703B_PS_TUNING_PARA = 0x21, - H2C_8703B_PS_TUNING_PARA2 = 0x22, - H2C_8703B_P2P_LPS_PARAM = 0x23, - H2C_8703B_P2P_PS_OFFLOAD = 0x24, - H2C_8703B_PS_SCAN_ENABLE = 0x25, - H2C_8703B_SAP_PS_ = 0x26, - H2C_8703B_INACTIVE_PS_ = 0x27, /* Inactive_PS */ - H2C_8703B_FWLPS_IN_IPS_ = 0x28, - - /* Dynamic Mechanism Class: 010 */ - H2C_8703B_MACID_CFG = 0x40, - H2C_8703B_TXBF = 0x41, - H2C_8703B_RSSI_SETTING = 0x42, - H2C_8703B_AP_REQ_TXRPT = 0x43, - H2C_8703B_INIT_RATE_COLLECT = 0x44, - H2C_8703B_RA_PARA_ADJUST = 0x46, - - /* BT Class: 011 */ - H2C_8703B_B_TYPE_TDMA = 0x60, - H2C_8703B_BT_INFO = 0x61, - H2C_8703B_FORCE_BT_TXPWR = 0x62, - H2C_8703B_BT_IGNORE_WLANACT = 0x63, - H2C_8703B_DAC_SWING_VALUE = 0x64, - H2C_8703B_ANT_SEL_RSV = 0x65, - H2C_8703B_WL_OPMODE = 0x66, - H2C_8703B_BT_MP_OPER = 0x67, - H2C_8703B_BT_CONTROL = 0x68, - H2C_8703B_BT_WIFI_CTRL = 0x69, - H2C_8703B_BT_FW_PATCH = 0x6A, - H2C_8703B_BT_WLAN_CALIBRATION = 0x6D, - - /* WOWLAN Class: 100 */ - H2C_8703B_WOWLAN = 0x80, - H2C_8703B_REMOTE_WAKE_CTRL = 0x81, - H2C_8703B_AOAC_GLOBAL_INFO = 0x82, - H2C_8703B_AOAC_RSVD_PAGE = 0x83, - H2C_8703B_AOAC_RSVD_PAGE2 = 0x84, - H2C_8703B_D0_SCAN_OFFLOAD_CTRL = 0x85, - H2C_8703B_D0_SCAN_OFFLOAD_INFO = 0x86, - H2C_8703B_CHNL_SWITCH_OFFLOAD = 0x87, - H2C_8703B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, - H2C_8703B_P2P_OFFLOAD = 0x8B, - - H2C_8703B_RESET_TSF = 0xC0, - H2C_8703B_MAXID, -}; - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- - * _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_8703B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8703B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_8703B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8703B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8703B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -/* _KEEP_ALIVE_CMD_0x03 */ -#define SET_8703B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8703B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8703B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_8703B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _DISCONNECT_DECISION_CMD_0x04 */ -#define SET_8703B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8703B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8703B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8703B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) - -/* _PWR_MOD_CMD_0x20 */ -#define SET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8703B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -#define SET_8703B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -#define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8703B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8703B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -#define SET_8703B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -#define GET_8703B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) - -/* _PS_TUNE_PARAM_CMD_0x21 */ -#define SET_8703B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8703B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -#define SET_8703B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -#define SET_8703B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _MACID_CFG_CMD_0x40 */ -#define SET_8703B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -#define SET_8703B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) - -/* _RSSI_SETTING_CMD_0x42 */ -#define SET_8703B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8703B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -#define SET_8703B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _AP_REQ_TXRPT_CMD_0x43 */ -#define SET_8703B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8703B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _FORCE_BT_TXPWR_CMD_0x62 */ -#define SET_8703B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - -/* _FORCE_BT_MP_OPER_CMD_0x67 */ -#define SET_8703B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -#define SET_8703B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -#define SET_8703B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8703B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -#define SET_8703B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8703B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) - -/* _BT_FW_PATCH_0x6A */ -#define SET_8703B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) -#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8703B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) - -/* --------------------------------------------------------------------------------------------------------- - * ------------------------------------------- Structure -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- Function Statement -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - -/* host message to firmware cmd */ -void rtl8703b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8703b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -void rtl8703b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); -/* s32 rtl8703b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -void rtl8703b_set_FwPsTuneParam_cmd(PADAPTER padapter); -void rtl8703b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); -void rtl8703b_download_rsvd_page(PADAPTER padapter, u8 mstatus); -#ifdef CONFIG_BT_COEXIST - void rtl8703b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -#endif /* CONFIG_BT_COEXIST */ -#ifdef CONFIG_P2P - void rtl8703b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -#ifdef CONFIG_TDLS - #ifdef CONFIG_TDLS_CH_SW - void rtl8703b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); - #endif -#endif - -#ifdef CONFIG_P2P_WOWLAN - void rtl8703b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -#endif - -void rtl8703b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); - -s32 FillH2CCmd8703B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -u8 GetTxBufferRsvdPageNum8703B(_adapter *padapter, bool wowlan); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_dm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_dm.h deleted file mode 100644 index 912c7da079ea9e..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_dm.h +++ /dev/null @@ -1,39 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8703B_DM_H__ -#define __RTL8703B_DM_H__ -/* ************************************************************ - * Description: - * - * This file is for 8703B dynamic mechanism only - * - * - * ************************************************************ */ - -/* ************************************************************ - * structure and define - * ************************************************************ */ - -/* ************************************************************ - * function prototype - * ************************************************************ */ - -void rtl8703b_init_dm_priv(PADAPTER padapter); -void rtl8703b_deinit_dm_priv(PADAPTER padapter); - -void rtl8703b_InitHalDm(PADAPTER padapter); -void rtl8703b_HalDmWatchDog(PADAPTER padapter); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_hal.h deleted file mode 100644 index f75cc303c95cf0..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_hal.h +++ /dev/null @@ -1,266 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8703B_HAL_H__ -#define __RTL8703B_HAL_H__ - -#include "hal_data.h" - -#include "rtl8703b_spec.h" -#include "rtl8703b_rf.h" -#include "rtl8703b_dm.h" -#include "rtl8703b_recv.h" -#include "rtl8703b_xmit.h" -#include "rtl8703b_cmd.h" -#include "rtl8703b_led.h" -#include "Hal8703BPwrSeq.h" -#include "Hal8703BPhyReg.h" -#include "Hal8703BPhyCfg.h" -#ifdef DBG_CONFIG_ERROR_DETECT - #include "rtl8703b_sreset.h" -#endif - -#define FW_8703B_SIZE 0x8000 -#define FW_8703B_START_ADDRESS 0x1000 -#define FW_8703B_END_ADDRESS 0x1FFF /* 0x5FFF */ - -#define IS_FW_HEADER_EXIST_8703B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x03B0) - -typedef struct _RT_FIRMWARE { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[FW_8703B_SIZE]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8703B, *PRT_FIRMWARE_8703B; - -/* - * This structure must be cared byte-ordering - * - * Added by tynli. 2009.12.04. */ -typedef struct _RT_8703B_FIRMWARE_HDR { - /* 8-byte alinment required */ - - /* --- LONG WORD 0 ---- */ - u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ - u8 Category; /* AP/NIC and USB/PCI */ - u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ - u16 Version; /* FW Version */ - u16 Subversion; /* FW Subversion, default 0x00 */ - - /* --- LONG WORD 1 ---- */ - u8 Month; /* Release time Month field */ - u8 Date; /* Release time Date field */ - u8 Hour; /* Release time Hour field */ - u8 Minute; /* Release time Minute field */ - u16 RamCodeSize; /* The size of RAM code */ - u16 Rsvd2; - - /* --- LONG WORD 2 ---- */ - u32 SvnIdx; /* The SVN entry index */ - u32 Rsvd3; - - /* --- LONG WORD 3 ---- */ - u32 Rsvd4; - u32 Rsvd5; -} RT_8703B_FIRMWARE_HDR, *PRT_8703B_FIRMWARE_HDR; - -#define DRIVER_EARLY_INT_TIME_8703B 0x05 -#define BCN_DMA_ATIME_INT_TIME_8703B 0x02 - -/* for 8703B - * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -#define PAGE_SIZE_TX_8703B 128 -#define PAGE_SIZE_RX_8703B 8 - -#define TX_DMA_SIZE_8703B 0x8000 /* 32K(TX) */ -#define RX_DMA_SIZE_8703B 0x4000 /* 16K(RX) */ - -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#ifdef CONFIG_FW_C2H_DEBUG - #define RX_DMA_RESERVED_SIZE_8703B 0x100 /* 256B, reserved for c2h debug message */ -#else - #define RX_DMA_RESERVED_SIZE_8703B 0x80 /* 128B, reserved for tx report */ -#endif -#define RX_DMA_BOUNDARY_8703B (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B - 1) - - -/* Note: We will divide number of page equally for each queue other than public queue! */ - -/* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8703B - * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ - -#define BCNQ_PAGE_NUM_8703B (MAX_BEACON_LEN/PAGE_SIZE_TX_8703B + 6) /*0x08*/ - -/* For WoWLan , more reserved page - * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1 PNO: 6 - * NS offload: 2NDP info: 1 - */ -#ifdef CONFIG_WOWLAN - #define WOWLAN_PAGE_NUM_8703B 0x0b -#else - #define WOWLAN_PAGE_NUM_8703B 0x00 -#endif - -#ifdef CONFIG_PNO_SUPPORT - #undef WOWLAN_PAGE_NUM_8703B - #define WOWLAN_PAGE_NUM_8703B 0x15 -#endif - -#ifdef CONFIG_AP_WOWLAN - #define AP_WOWLAN_PAGE_NUM_8703B 0x02 -#endif - -#define TX_TOTAL_PAGE_NUMBER_8703B (0xFF - BCNQ_PAGE_NUM_8703B - WOWLAN_PAGE_NUM_8703B) -#define TX_PAGE_BOUNDARY_8703B (TX_TOTAL_PAGE_NUMBER_8703B + 1) - -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B TX_TOTAL_PAGE_NUMBER_8703B -#define WMM_NORMAL_TX_PAGE_BOUNDARY_8703B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8703B + 1) - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8703B */ -#define NORMAL_PAGE_NUM_HPQ_8703B 0x0C -#define NORMAL_PAGE_NUM_LPQ_8703B 0x02 -#define NORMAL_PAGE_NUM_NPQ_8703B 0x02 - -/* Note: For Normal Chip Setting, modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_8703B 0x30 -#define WMM_NORMAL_PAGE_NUM_LPQ_8703B 0x20 -#define WMM_NORMAL_PAGE_NUM_NPQ_8703B 0x20 - - -#include "HalVerDef.h" -#include "hal_com.h" - -#define EFUSE_OOB_PROTECT_BYTES 15 - -#define HAL_EFUSE_MEMORY - -#define HWSET_MAX_SIZE_8703B 256 -#define EFUSE_REAL_CONTENT_LEN_8703B 256 -#define EFUSE_MAP_LEN_8703B 512 -#define EFUSE_MAX_SECTION_8703B 64 - -#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8703B) - -#define EFUSE_ACCESS_ON 0x69 -#define EFUSE_ACCESS_OFF 0x00 - -/* ******************************************************** - * EFUSE for BT definition - * ******************************************************** */ -#define BANK_NUM 1 -#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 -#define EFUSE_BT_REAL_CONTENT_LEN (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) -#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) -#define EFUSE_PROTECT_BYTES_BANK 16 - -typedef enum tag_Package_Definition { - PACKAGE_DEFAULT, - PACKAGE_QFN68, - PACKAGE_TFBGA90, - PACKAGE_TFBGA80, - PACKAGE_TFBGA79 -} PACKAGE_TYPE_E; - -#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -/* rtl8703b_hal_init.c */ -s32 rtl8703b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -void rtl8703b_FirmwareSelfReset(PADAPTER padapter); -void rtl8703b_InitializeFirmwareVars(PADAPTER padapter); - -void rtl8703b_InitAntenna_Selection(PADAPTER padapter); -void rtl8703b_DeinitAntenna_Selection(PADAPTER padapter); -void rtl8703b_CheckAntenna_Selection(PADAPTER padapter); -void rtl8703b_init_default_value(PADAPTER padapter); - -s32 rtl8703b_InitLLTTable(PADAPTER padapter); - -s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -s32 CardDisableWithoutHWSM(PADAPTER padapter); - -/* EFuse */ -u8 GetEEPROMSize8703B(PADAPTER padapter); -void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -void Hal_EfuseParseTxPowerInfo_8703B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -void Hal_EfuseParseBTCoexistInfo_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseEEPROMVer_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseChnlPlan_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseCustomerID_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseAntennaDiversity_8703B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseXtal_8703B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -void Hal_EfuseParseThermalMeter_8703B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParseVoltage_8703B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseBoardType_8703B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); - -void rtl8703b_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8703b(_adapter *adapter); -u8 SetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); -void GetHwReg8703B(PADAPTER padapter, u8 variable, u8 *val); -u8 SetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -u8 GetHalDefVar8703B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); - -/* register */ -void rtl8703b_InitBeaconParameters(PADAPTER padapter); -void rtl8703b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -void _InitBurstPktLen_8703BS(PADAPTER Adapter); -void _InitLTECoex_8703BS(PADAPTER Adapter); -void _InitMacAPLLSetting_8703B(PADAPTER Adapter); -void _8051Reset8703(PADAPTER padapter); -#ifdef CONFIG_WOWLAN - void Hal_DetectWoWMode(PADAPTER pAdapter); -#endif /* CONFIG_WOWLAN */ - -void rtl8703b_start_thread(_adapter *padapter); -void rtl8703b_stop_thread(_adapter *padapter); - -#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) - void rtl8703bs_init_checkbthang_workqueue(_adapter *adapter); - void rtl8703bs_free_checkbthang_workqueue(_adapter *adapter); - void rtl8703bs_cancle_checkbthang_workqueue(_adapter *adapter); - void rtl8703bs_hal_check_bt_hang(_adapter *adapter); -#endif - -#ifdef CONFIG_GPIO_WAKEUP - void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -#endif -#ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -#endif -void CCX_FwC2HTxRpt_8703b(PADAPTER padapter, u8 *pdata, u8 len); - -u8 MRateToHwRate8703B(u8 rate); -u8 HwRateToMRate8703B(u8 rate); - -void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); - -#ifdef CONFIG_PCI_HCI - BOOLEAN InterruptRecognized8703BE(PADAPTER Adapter); - VOID UpdateInterruptMask8703BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -#endif - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_led.h deleted file mode 100644 index 99e590d31bc5a0..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_led.h +++ /dev/null @@ -1,44 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8703B_LED_H__ -#define __RTL8703B_LED_H__ - -#include -#include -#include - -#ifdef CONFIG_RTW_SW_LED -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI - void rtl8703bu_InitSwLeds(PADAPTER padapter); - void rtl8703bu_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_SDIO_HCI - void rtl8703bs_InitSwLeds(PADAPTER padapter); - void rtl8703bs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_GSPI_HCI - void rtl8703bs_InitSwLeds(PADAPTER padapter); - void rtl8703bs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_PCI_HCI - void rtl8703be_InitSwLeds(PADAPTER padapter); - void rtl8703be_DeInitSwLeds(PADAPTER padapter); -#endif - -#endif/*CONFIG_RTW_SW_LED*/ -#endif /*__RTL8703B_LED_H__*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_recv.h deleted file mode 100644 index e796e6e603de59..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_recv.h +++ /dev/null @@ -1,86 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8703B_RECV_H__ -#define __RTL8703B_RECV_H__ - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ - -#elif defined(CONFIG_PCI_HCI) - /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ - /* #define MAX_RECVBUF_SZ (9100) */ - /* #else */ - #define MAX_RECVBUF_SZ (4000) /* about 4K - * #endif */ - - -#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - - #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B) - -#endif - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -#ifdef CONFIG_SDIO_HCI - #ifndef CONFIG_SDIO_RX_COPY - #undef MAX_RECVBUF_SZ - #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8703B - RX_DMA_RESERVED_SIZE_8703B) - #endif /* !CONFIG_SDIO_RX_COPY */ -#endif /* CONFIG_SDIO_HCI */ - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8703bs_init_recv_priv(PADAPTER padapter); - void rtl8703bs_free_recv_priv(PADAPTER padapter); -#endif - -#ifdef CONFIG_USB_HCI - int rtl8703bu_init_recv_priv(_adapter *padapter); - void rtl8703bu_free_recv_priv(_adapter *padapter); - void rtl8703bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8703be_init_recv_priv(PADAPTER padapter); - void rtl8703be_free_recv_priv(PADAPTER padapter); -#endif - -void rtl8703b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); - -#endif /* __RTL8703B_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_spec.h deleted file mode 100644 index 633b23b1bf106b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_spec.h +++ /dev/null @@ -1,464 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8703B_SPEC_H__ -#define __RTL8703B_SPEC_H__ - -#include - - -#define HAL_NAV_UPPER_UNIT_8703B 128 /* micro-second */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_SYS_ISO_CTRL_8703B 0x0000 /* 2 Byte */ -#define REG_SYS_FUNC_EN_8703B 0x0002 /* 2 Byte */ -#define REG_APS_FSMCO_8703B 0x0004 /* 4 Byte */ -#define REG_SYS_CLKR_8703B 0x0008 /* 2 Byte */ -#define REG_9346CR_8703B 0x000A /* 2 Byte */ -#define REG_EE_VPD_8703B 0x000C /* 2 Byte */ -#define REG_AFE_MISC_8703B 0x0010 /* 1 Byte */ -#define REG_SPS0_CTRL_8703B 0x0011 /* 7 Byte */ -#define REG_SPS_OCP_CFG_8703B 0x0018 /* 4 Byte */ -#define REG_RSV_CTRL_8703B 0x001C /* 3 Byte */ -#define REG_RF_CTRL_8703B 0x001F /* 1 Byte */ -#define REG_LPLDO_CTRL_8703B 0x0023 /* 1 Byte */ -#define REG_AFE_XTAL_CTRL_8703B 0x0024 /* 4 Byte */ -#define REG_AFE_PLL_CTRL_8703B 0x0028 /* 4 Byte */ -#define REG_MAC_PLL_CTRL_EXT_8703B 0x002c /* 4 Byte */ -#define REG_EFUSE_CTRL_8703B 0x0030 -#define REG_EFUSE_TEST_8703B 0x0034 -#define REG_PWR_DATA_8703B 0x0038 -#define REG_CAL_TIMER_8703B 0x003C -#define REG_ACLK_MON_8703B 0x003E -#define REG_GPIO_MUXCFG_8703B 0x0040 -#define REG_GPIO_IO_SEL_8703B 0x0042 -#define REG_MAC_PINMUX_CFG_8703B 0x0043 -#define REG_GPIO_PIN_CTRL_8703B 0x0044 -#define REG_GPIO_INTM_8703B 0x0048 -#define REG_LEDCFG0_8703B 0x004C -#define REG_LEDCFG1_8703B 0x004D -#define REG_LEDCFG2_8703B 0x004E -#define REG_LEDCFG3_8703B 0x004F -#define REG_FSIMR_8703B 0x0050 -#define REG_FSISR_8703B 0x0054 -#define REG_HSIMR_8703B 0x0058 -#define REG_HSISR_8703B 0x005c -#define REG_GPIO_EXT_CTRL 0x0060 -#define REG_PAD_CTRL1_8703B 0x0064 -#define REG_MULTI_FUNC_CTRL_8703B 0x0068 -#define REG_GPIO_STATUS_8703B 0x006C -#define REG_SDIO_CTRL_8703B 0x0070 -#define REG_OPT_CTRL_8703B 0x0074 -#define REG_AFE_CTRL_4_8703B 0x0078 -#define REG_MCUFWDL_8703B 0x0080 -#define REG_HMEBOX_DBG_0_8703B 0x0088 -#define REG_HMEBOX_DBG_1_8703B 0x008A -#define REG_HMEBOX_DBG_2_8703B 0x008C -#define REG_HMEBOX_DBG_3_8703B 0x008E -#define REG_HIMR0_8703B 0x00B0 -#define REG_HISR0_8703B 0x00B4 -#define REG_HIMR1_8703B 0x00B8 -#define REG_HISR1_8703B 0x00BC -#define REG_PMC_DBG_CTRL2_8703B 0x00CC -#define REG_EFUSE_BURN_GNT_8703B 0x00CF -#define REG_HPON_FSM_8703B 0x00EC -#define REG_SYS_CFG_8703B 0x00F0 -#define REG_SYS_CFG1_8703B 0x00FC -#define REG_ROM_VERSION 0x00FD - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_C2HEVT_CMD_ID_8703B 0x01A0 -#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -#define REG_C2HEVT_CMD_LEN_8703B 0x01AE -#define REG_C2HEVT_CMD_LEN_88XX REG_C2HEVT_CMD_LEN_8703B -#define REG_C2HEVT_CLEAR_8703B 0x01AF -#define REG_MCUTST_1_8703B 0x01C0 -#define REG_WOWLAN_WAKE_REASON 0x01C7 -#define REG_FMETHR_8703B 0x01C8 -#define REG_HMETFR_8703B 0x01CC -#define REG_HMEBOX_0_8703B 0x01D0 -#define REG_HMEBOX_1_8703B 0x01D4 -#define REG_HMEBOX_2_8703B 0x01D8 -#define REG_HMEBOX_3_8703B 0x01DC -#define REG_LLT_INIT_8703B 0x01E0 -#define REG_HMEBOX_EXT0_8703B 0x01F0 -#define REG_HMEBOX_EXT1_8703B 0x01F4 -#define REG_HMEBOX_EXT2_8703B 0x01F8 -#define REG_HMEBOX_EXT3_8703B 0x01FC - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RQPN_8703B 0x0200 -#define REG_FIFOPAGE_8703B 0x0204 -#define REG_DWBCN0_CTRL_8703B REG_TDECTRL -#define REG_TXDMA_OFFSET_CHK_8703B 0x020C -#define REG_TXDMA_STATUS_8703B 0x0210 -#define REG_RQPN_NPQ_8703B 0x0214 -#define REG_DWBCN1_CTRL_8703B 0x0228 - - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RXDMA_AGG_PG_TH_8703B 0x0280 -#define REG_FW_UPD_RDPTR_8703B 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -#define REG_RXDMA_CONTROL_8703B 0x0286 /* Control the RX DMA. */ -#define REG_RXPKT_NUM_8703B 0x0287 /* The number of packets in RXPKTBUF. */ -#define REG_RXDMA_STATUS_8703B 0x0288 -#define REG_RXDMA_MODE_CTRL_8703B 0x0290 -#define REG_EARLY_MODE_CONTROL_8703B 0x02BC -#define REG_RSVD5_8703B 0x02F0 -#define REG_RSVD6_8703B 0x02F4 - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_CTRL_REG_8703B 0x0300 -#define REG_INT_MIG_8703B 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_DESA_8703B 0x0308 /* TX Beacon Descriptor Address */ -#define REG_HQ_DESA_8703B 0x0310 /* TX High Queue Descriptor Address */ -#define REG_MGQ_DESA_8703B 0x0318 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_DESA_8703B 0x0320 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_DESA_8703B 0x0328 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_DESA_8703B 0x0330 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_DESA_8703B 0x0338 /* TX BK Queue Descriptor Address */ -#define REG_RX_DESA_8703B 0x0340 /* RX Queue Descriptor Address */ -#define REG_DBI_WDATA_8703B 0x0348 /* DBI Write Data */ -#define REG_DBI_RDATA_8703B 0x034C /* DBI Read Data */ -#define REG_DBI_ADDR_8703B 0x0350 /* DBI Address */ -#define REG_DBI_FLAG_8703B 0x0352 /* DBI Read/Write Flag */ -#define REG_MDIO_WDATA_8703B 0x0354 /* MDIO for Write PCIE PHY */ -#define REG_MDIO_RDATA_8703B 0x0356 /* MDIO for Reads PCIE PHY */ -#define REG_MDIO_CTL_8703B 0x0358 /* MDIO for Control */ -#define REG_DBG_SEL_8703B 0x0360 /* Debug Selection Register */ -#define REG_PCIE_HRPWM_8703B 0x0361 /* PCIe RPWM */ -#define REG_PCIE_HCPWM_8703B 0x0363 /* PCIe CPWM */ -#define REG_PCIE_MULTIFET_CTRL_8703B 0x036A /* PCIE Multi-Fethc Control */ - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#define REG_VOQ_INFORMATION_8703B 0x0400 -#define REG_VIQ_INFORMATION_8703B 0x0404 -#define REG_BEQ_INFORMATION_8703B 0x0408 -#define REG_BKQ_INFORMATION_8703B 0x040C -#define REG_MGQ_INFORMATION_8703B 0x0410 -#define REG_HGQ_INFORMATION_8703B 0x0414 -#define REG_BCNQ_INFORMATION_8703B 0x0418 -#define REG_TXPKT_EMPTY_8703B 0x041A - -#define REG_FWHW_TXQ_CTRL_8703B 0x0420 -#define REG_HWSEQ_CTRL_8703B 0x0423 -#define REG_TXPKTBUF_BCNQ_BDNY_8703B 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY_8703B 0x0425 -#define REG_LIFECTRL_CTRL_8703B 0x0426 -#define REG_MULTI_BCNQ_OFFSET_8703B 0x0427 -#define REG_SPEC_SIFS_8703B 0x0428 -#define REG_RL_8703B 0x042A -#define REG_TXBF_CTRL_8703B 0x042C -#define REG_DARFRC_8703B 0x0430 -#define REG_RARFRC_8703B 0x0438 -#define REG_RRSR_8703B 0x0440 -#define REG_ARFR0_8703B 0x0444 -#define REG_ARFR1_8703B 0x044C -#define REG_CCK_CHECK_8703B 0x0454 -#define REG_AMPDU_MAX_TIME_8703B 0x0456 -#define REG_TXPKTBUF_BCNQ_BDNY1_8703B 0x0457 - -#define REG_AMPDU_MAX_LENGTH_8703B 0x0458 -#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8703B 0x045D -#define REG_NDPA_OPT_CTRL_8703B 0x045F -#define REG_FAST_EDCA_CTRL_8703B 0x0460 -#define REG_RD_RESP_PKT_TH_8703B 0x0463 -#define REG_DATA_SC_8703B 0x0483 -#ifdef CONFIG_WOWLAN - #define REG_TXPKTBUF_IV_LOW 0x0484 - #define REG_TXPKTBUF_IV_HIGH 0x0488 -#endif -#define REG_TXRPT_START_OFFSET 0x04AC -#define REG_POWER_STAGE1_8703B 0x04B4 -#define REG_POWER_STAGE2_8703B 0x04B8 -#define REG_AMPDU_BURST_MODE_8703B 0x04BC -#define REG_PKT_VO_VI_LIFE_TIME_8703B 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME_8703B 0x04C2 -#define REG_STBC_SETTING_8703B 0x04C4 -#define REG_HT_SINGLE_AMPDU_8703B 0x04C7 -#define REG_PROT_MODE_CTRL_8703B 0x04C8 -#define REG_MAX_AGGR_NUM_8703B 0x04CA -#define REG_RTS_MAX_AGGR_NUM_8703B 0x04CB -#define REG_BAR_MODE_CTRL_8703B 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT_8703B 0x04CF -#define REG_MACID_PKT_DROP0_8703B 0x04D0 -#define REG_MACID_PKT_SLEEP_8703B 0x04D4 - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ -#define REG_EDCA_VO_PARAM_8703B 0x0500 -#define REG_EDCA_VI_PARAM_8703B 0x0504 -#define REG_EDCA_BE_PARAM_8703B 0x0508 -#define REG_EDCA_BK_PARAM_8703B 0x050C -#define REG_BCNTCFG_8703B 0x0510 -#define REG_PIFS_8703B 0x0512 -#define REG_RDG_PIFS_8703B 0x0513 -#define REG_SIFS_CTX_8703B 0x0514 -#define REG_SIFS_TRX_8703B 0x0516 -#define REG_AGGR_BREAK_TIME_8703B 0x051A -#define REG_SLOT_8703B 0x051B -#define REG_TX_PTCL_CTRL_8703B 0x0520 -#define REG_TXPAUSE_8703B 0x0522 -#define REG_DIS_TXREQ_CLR_8703B 0x0523 -#define REG_RD_CTRL_8703B 0x0524 -/* - * Format for offset 540h-542h: - * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. - * [7:4]: Reserved. - * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. - * [23:20]: Reserved - * Description: - * | - * |<--Setup--|--Hold------------>| - * --------------|---------------------- - * | - * TBTT - * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. - * Described by Designer Tim and Bruce, 2011-01-14. - * */ -#define REG_TBTT_PROHIBIT_8703B 0x0540 -#define REG_RD_NAV_NXT_8703B 0x0544 -#define REG_NAV_PROT_LEN_8703B 0x0546 -#define REG_BCN_CTRL_8703B 0x0550 -#define REG_BCN_CTRL_1_8703B 0x0551 -#define REG_MBID_NUM_8703B 0x0552 -#define REG_DUAL_TSF_RST_8703B 0x0553 -#define REG_BCN_INTERVAL_8703B 0x0554 -#define REG_DRVERLYINT_8703B 0x0558 -#define REG_BCNDMATIM_8703B 0x0559 -#define REG_ATIMWND_8703B 0x055A -#define REG_USTIME_TSF_8703B 0x055C -#define REG_BCN_MAX_ERR_8703B 0x055D -#define REG_RXTSF_OFFSET_CCK_8703B 0x055E -#define REG_RXTSF_OFFSET_OFDM_8703B 0x055F -#define REG_TSFTR_8703B 0x0560 -#define REG_CTWND_8703B 0x0572 -#define REG_SECONDARY_CCA_CTRL_8703B 0x0577 -#define REG_PSTIMER_8703B 0x0580 -#define REG_TIMER0_8703B 0x0584 -#define REG_TIMER1_8703B 0x0588 -#define REG_ACMHWCTRL_8703B 0x05C0 -#define REG_SCH_TXCMD_8703B 0x05F8 - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ -#define REG_MAC_CR_8703B 0x0600 -#define REG_TCR_8703B 0x0604 -#define REG_RCR_8703B 0x0608 -#define REG_RX_PKT_LIMIT_8703B 0x060C -#define REG_RX_DLK_TIME_8703B 0x060D -#define REG_RX_DRVINFO_SZ_8703B 0x060F - -#define REG_MACID_8703B 0x0610 -#define REG_BSSID_8703B 0x0618 -#define REG_MAR_8703B 0x0620 -#define REG_MBIDCAMCFG_8703B 0x0628 -#define REG_WOWLAN_GTK_DBG1 0x630 -#define REG_WOWLAN_GTK_DBG2 0x634 - -#define REG_USTIME_EDCA_8703B 0x0638 -#define REG_MAC_SPEC_SIFS_8703B 0x063A -#define REG_RESP_SIFP_CCK_8703B 0x063C -#define REG_RESP_SIFS_OFDM_8703B 0x063E -#define REG_ACKTO_8703B 0x0640 -#define REG_CTS2TO_8703B 0x0641 -#define REG_EIFS_8703B 0x0642 - -#define REG_NAV_UPPER_8703B 0x0652 /* unit of 128 */ -#define REG_TRXPTCL_CTL_8703B 0x0668 - -/* Security */ -#define REG_CAMCMD_8703B 0x0670 -#define REG_CAMWRITE_8703B 0x0674 -#define REG_CAMREAD_8703B 0x0678 -#define REG_CAMDBG_8703B 0x067C -#define REG_SECCFG_8703B 0x0680 - -/* Power */ -#define REG_WOW_CTRL_8703B 0x0690 -#define REG_PS_RX_INFO_8703B 0x0692 -#define REG_UAPSD_TID_8703B 0x0693 -#define REG_WKFMCAM_CMD_8703B 0x0698 -#define REG_WKFMCAM_NUM_8703B 0x0698 -#define REG_WKFMCAM_RWD_8703B 0x069C -#define REG_RXFLTMAP0_8703B 0x06A0 -#define REG_RXFLTMAP1_8703B 0x06A2 -#define REG_RXFLTMAP2_8703B 0x06A4 -#define REG_BCN_PSR_RPT_8703B 0x06A8 -#define REG_BT_COEX_TABLE_8703B 0x06C0 -#define REG_BFMER0_INFO_8703B 0x06E4 -#define REG_BFMER1_INFO_8703B 0x06EC -#define REG_CSI_RPT_PARAM_BW20_8703B 0x06F4 -#define REG_CSI_RPT_PARAM_BW40_8703B 0x06F8 -#define REG_CSI_RPT_PARAM_BW80_8703B 0x06FC - -/* Hardware Port 2 */ -#define REG_MACID1_8703B 0x0700 -#define REG_BSSID1_8703B 0x0708 -#define REG_BFMEE_SEL_8703B 0x0714 -#define REG_SND_PTCL_CTRL_8703B 0x0718 - -/* LTE_COEX */ -#define REG_LTECOEX_CTRL 0x07C0 -#define REG_LTECOEX_WRITE_DATA 0x07C4 -#define REG_LTECOEX_READ_DATA 0x07C8 -#define REG_LTECOEX_PATH_CONTROL 0x70 - -/* ************************************************************ - * SDIO Bus Specification - * ************************************************************ */ - -/* ----------------------------------------------------- - * SDIO CMD Address Mapping - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * I/O bus domain (Host) - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * SDIO register - * ----------------------------------------------------- */ -#define SDIO_REG_HCPWM1_8703B 0x025 /* HCI Current Power Mode 1 */ - - -/* **************************************************************************** - * 8703 Regsiter Bit and Content definition - * **************************************************************************** */ - -#define BIT_USB_RXDMA_AGG_EN BIT(31) -#define RXDMA_AGG_MODE_EN BIT(1) - -#ifdef CONFIG_WOWLAN - #define RXPKT_RELEASE_POLL BIT(16) - #define RXDMA_IDLE BIT(17) - #define RW_RELEASE_EN BIT(18) -#endif - -/* 2 HSISR - * interrupt mask which needs to clear */ -#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ - HSISR_SPS_OCP_INT |\ - HSISR_RON_INT |\ - HSISR_PDNINT |\ - HSISR_GPIO9_INT) - - -/* ---------------------------------------------------------------------------- - * 8703B REG_CCK_CHECK (offset 0x454) - * ---------------------------------------------------------------------------- */ -#define BIT_BCN_PORT_SEL BIT(5) - -#ifdef CONFIG_RF_POWER_TRIM - - #ifdef CONFIG_RTL8703B - #define EEPROM_RF_GAIN_OFFSET 0xC1 - #endif - - #define EEPROM_RF_GAIN_VAL 0x1F6 -#endif /*CONFIG_RF_POWER_TRIM*/ - - -/* ---------------------------------------------------------------------------- - * 8195 IMR/ISR bits (offset 0xB0, 8bits) - * ---------------------------------------------------------------------------- */ -#define IMR_DISABLED_8703B 0 -/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -#define IMR_TIMER2_8703B BIT(31) /* Timeout interrupt 2 */ -#define IMR_TIMER1_8703B BIT(30) /* Timeout interrupt 1 */ -#define IMR_PSTIMEOUT_8703B BIT(29) /* Power Save Time Out Interrupt */ -#define IMR_GTINT4_8703B BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -#define IMR_GTINT3_8703B BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -#define IMR_TXBCN0ERR_8703B BIT(26) /* Transmit Beacon0 Error */ -#define IMR_TXBCN0OK_8703B BIT(25) /* Transmit Beacon0 OK */ -#define IMR_TSF_BIT32_TOGGLE_8703B BIT(24) /* TSF Timer BIT32 toggle indication interrupt */ -#define IMR_BCNDMAINT0_8703B BIT(20) /* Beacon DMA Interrupt 0 */ -#define IMR_BCNDERR0_8703B BIT(16) /* Beacon Queue DMA OK0 */ -#define IMR_HSISR_IND_ON_INT_8703B BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -#define IMR_BCNDMAINT_E_8703B BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -#define IMR_ATIMEND_8703B BIT(12) /* CTWidnow End or ATIM Window End */ -#define IMR_C2HCMD_8703B BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -#define IMR_CPWM2_8703B BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_CPWM_8703B BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_HIGHDOK_8703B BIT(7) /* High Queue DMA OK */ -#define IMR_MGNTDOK_8703B BIT(6) /* Management Queue DMA OK */ -#define IMR_BKDOK_8703B BIT(5) /* AC_BK DMA OK */ -#define IMR_BEDOK_8703B BIT(4) /* AC_BE DMA OK */ -#define IMR_VIDOK_8703B BIT(3) /* AC_VI DMA OK */ -#define IMR_VODOK_8703B BIT(2) /* AC_VO DMA OK */ -#define IMR_RDU_8703B BIT(1) /* Rx Descriptor Unavailable */ -#define IMR_ROK_8703B BIT(0) /* Receive DMA OK */ - -/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -#define IMR_BCNDMAINT7_8703B BIT(27) /* Beacon DMA Interrupt 7 */ -#define IMR_BCNDMAINT6_8703B BIT(26) /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5_8703B BIT(25) /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4_8703B BIT(24) /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3_8703B BIT(23) /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2_8703B BIT(22) /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1_8703B BIT(21) /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDOK7_8703B BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -#define IMR_BCNDOK6_8703B BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -#define IMR_BCNDOK5_8703B BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -#define IMR_BCNDOK4_8703B BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -#define IMR_BCNDOK3_8703B BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -#define IMR_BCNDOK2_8703B BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -#define IMR_BCNDOK1_8703B BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -#define IMR_ATIMEND_E_8703B BIT(13) /* ATIM Window End Extension for Win7 */ -#define IMR_TXERR_8703B BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -#define IMR_RXERR_8703B BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -#define IMR_TXFOVW_8703B BIT(9) /* Transmit FIFO Overflow */ -#define IMR_RXFOVW_8703B BIT(8) /* Receive FIFO Overflow */ - -#ifdef CONFIG_PCI_HCI - /* #define IMR_RX_MASK (IMR_ROK_8703B|IMR_RDU_8703B|IMR_RXFOVW_8703B) */ - #define IMR_TX_MASK (IMR_VODOK_8703B | IMR_VIDOK_8703B | IMR_BEDOK_8703B | IMR_BKDOK_8703B | IMR_MGNTDOK_8703B | IMR_HIGHDOK_8703B) - - #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8703B | IMR_TXBCN0OK_8703B | IMR_TXBCN0ERR_8703B | IMR_BCNDERR0_8703B) - - #define RT_AC_INT_MASKS (IMR_VIDOK_8703B | IMR_VODOK_8703B | IMR_BEDOK_8703B | IMR_BKDOK_8703B) -#endif - -#endif /* __RTL8703B_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_sreset.h deleted file mode 100644 index 5fe53cf414a189..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_sreset.h +++ /dev/null @@ -1,24 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8703B_SRESET_H_ -#define _RTL8703B_SRESET_H_ - -#include - -#ifdef DBG_CONFIG_ERROR_DETECT - extern void rtl8703b_sreset_xmit_status_check(_adapter *padapter); - extern void rtl8703b_sreset_linked_status_check(_adapter *padapter); -#endif -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_xmit.h deleted file mode 100644 index 40c7bb2bcfbe69..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8703b_xmit.h +++ /dev/null @@ -1,335 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8703B_XMIT_H__ -#define __RTL8703B_XMIT_H__ - - -#define MAX_TID (15) - - -#ifndef __INC_HAL8703BDESC_H - #define __INC_HAL8703BDESC_H - - #define RX_STATUS_DESC_SIZE_8703B 24 - #define RX_DRV_INFO_SIZE_UNIT_8703B 8 - - - /* DWORD 0 */ - #define SET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) - #define SET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) - #define SET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) - - #define GET_RX_STATUS_DESC_PKT_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) - #define GET_RX_STATUS_DESC_CRC32_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) - #define GET_RX_STATUS_DESC_ICV_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) - #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) - #define GET_RX_STATUS_DESC_SECURITY_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) - #define GET_RX_STATUS_DESC_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) - #define GET_RX_STATUS_DESC_SHIFT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) - #define GET_RX_STATUS_DESC_PHY_STATUS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) - #define GET_RX_STATUS_DESC_SWDEC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) - #define GET_RX_STATUS_DESC_LAST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) - #define GET_RX_STATUS_DESC_FIRST_SEG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) - #define GET_RX_STATUS_DESC_EOR_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) - #define GET_RX_STATUS_DESC_OWN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) - - /* DWORD 1 */ - #define GET_RX_STATUS_DESC_MACID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) - #define GET_RX_STATUS_DESC_TID_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) - #define GET_RX_STATUS_DESC_AMSDU_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) - #define GET_RX_STATUS_DESC_RXID_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) - #define GET_RX_STATUS_DESC_PAGGR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) - #define GET_RX_STATUS_DESC_A1_FIT_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) - #define GET_RX_STATUS_DESC_CHKERR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) - #define GET_RX_STATUS_DESC_IPVER_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) - #define GET_RX_STATUS_DESC_IS_TCPUDP__8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) - #define GET_RX_STATUS_DESC_CHK_VLD_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) - #define GET_RX_STATUS_DESC_PAM_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) - #define GET_RX_STATUS_DESC_PWR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) - #define GET_RX_STATUS_DESC_MORE_DATA_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) - #define GET_RX_STATUS_DESC_MORE_FRAG_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) - #define GET_RX_STATUS_DESC_TYPE_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) - #define GET_RX_STATUS_DESC_MC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) - #define GET_RX_STATUS_DESC_BC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) - - /* DWORD 2 */ - #define GET_RX_STATUS_DESC_SEQ_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) - #define GET_RX_STATUS_DESC_FRAG_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) - #define GET_RX_STATUS_DESC_RX_IS_QOS_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) - #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) - #define GET_RX_STATUS_DESC_RPT_SEL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) - - /* DWORD 3 */ - #define GET_RX_STATUS_DESC_RX_RATE_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) - #define GET_RX_STATUS_DESC_HTC_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) - #define GET_RX_STATUS_DESC_EOSP_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) - #define GET_RX_STATUS_DESC_BSSID_FIT_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) - #ifdef CONFIG_USB_RX_AGGREGATION - #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) - #endif - #define GET_RX_STATUS_DESC_PATTERN_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) - #define GET_RX_STATUS_DESC_UNICAST_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) - #define GET_RX_STATUS_DESC_MAGIC_MATCH_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) - - /* DWORD 6 */ - #define GET_RX_STATUS_DESC_SPLCP_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) - #define GET_RX_STATUS_DESC_LDPC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) - #define GET_RX_STATUS_DESC_STBC_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) - #define GET_RX_STATUS_DESC_BW_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) - - /* DWORD 5 */ - #define GET_RX_STATUS_DESC_TSFL_8703B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) - - #define GET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) - #define GET_RX_STATUS_DESC_BUFF_ADDR64_8703B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) - - #define SET_RX_STATUS_DESC_BUFF_ADDR_8703B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) - - - /* Dword 0 */ - #define GET_TX_DESC_OWN_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) - - #define SET_TX_DESC_PKT_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) - #define SET_TX_DESC_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) - #define SET_TX_DESC_BMC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) - #define SET_TX_DESC_HTC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) - #define SET_TX_DESC_LAST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) - #define SET_TX_DESC_FIRST_SEG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) - #define SET_TX_DESC_LINIP_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) - #define SET_TX_DESC_NO_ACM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) - #define SET_TX_DESC_GF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) - #define SET_TX_DESC_OWN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) - - /* Dword 1 */ - #define SET_TX_DESC_MACID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) - #define SET_TX_DESC_QUEUE_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) - #define SET_TX_DESC_RDG_NAV_EXT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) - #define SET_TX_DESC_LSIG_TXOP_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) - #define SET_TX_DESC_PIFS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) - #define SET_TX_DESC_RATE_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) - #define SET_TX_DESC_EN_DESC_ID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) - #define SET_TX_DESC_SEC_TYPE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) - #define SET_TX_DESC_PKT_OFFSET_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) - - - /* Dword 2 */ - #define SET_TX_DESC_PAID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) - #define SET_TX_DESC_CCA_RTS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) - #define SET_TX_DESC_AGG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) - #define SET_TX_DESC_RDG_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) - #define SET_TX_DESC_AGG_BREAK_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) - #define SET_TX_DESC_MORE_FRAG_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) - #define SET_TX_DESC_RAW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) - #define SET_TX_DESC_SPE_RPT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) - #define SET_TX_DESC_AMPDU_DENSITY_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) - #define SET_TX_DESC_BT_INT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) - #define SET_TX_DESC_GID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) - - - /* Dword 3 */ - #define SET_TX_DESC_WHEADER_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) - #define SET_TX_DESC_CHK_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) - #define SET_TX_DESC_EARLY_MODE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) - #define SET_TX_DESC_HWSEQ_SEL_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) - #define SET_TX_DESC_USE_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) - #define SET_TX_DESC_DISABLE_RTS_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) - #define SET_TX_DESC_DISABLE_FB_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) - #define SET_TX_DESC_CTS2SELF_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) - #define SET_TX_DESC_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) - #define SET_TX_DESC_HW_RTS_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) - #define SET_TX_DESC_NAV_USE_HDR_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) - #define SET_TX_DESC_USE_MAX_LEN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) - #define SET_TX_DESC_MAX_AGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) - #define SET_TX_DESC_NDPA_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) - #define SET_TX_DESC_AMPDU_MAX_TIME_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) - - /* Dword 4 */ - #define SET_TX_DESC_TX_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) - #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) - #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) - #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) - #define SET_TX_DESC_DATA_RETRY_LIMIT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) - #define SET_TX_DESC_RTS_RATE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) - - - /* Dword 5 */ - #define SET_TX_DESC_DATA_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) - #define SET_TX_DESC_DATA_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) - #define SET_TX_DESC_DATA_BW_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) - #define SET_TX_DESC_DATA_LDPC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) - #define SET_TX_DESC_DATA_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) - #define SET_TX_DESC_CTROL_STBC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) - #define SET_TX_DESC_RTS_SHORT_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) - #define SET_TX_DESC_RTS_SC_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) - - - /* Dword 6 */ - #define SET_TX_DESC_SW_DEFINE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) - #define SET_TX_DESC_MBSSID_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) - #define SET_TX_DESC_ANTSEL_A_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) - #define SET_TX_DESC_ANTSEL_B_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) - #define SET_TX_DESC_ANTSEL_C_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) - #define SET_TX_DESC_ANTSEL_D_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) - - /* Dword 7 */ - #ifdef CONFIG_PCI_HCI - #define SET_TX_DESC_TX_BUFFER_SIZE_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) - #endif /*CONFIG_PCI_HCI*/ - #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) - #define SET_TX_DESC_TX_DESC_CHECKSUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) - #endif - #define SET_TX_DESC_USB_TXAGG_NUM_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - #ifdef CONFIG_SDIO_HCI - #define SET_TX_DESC_SDIO_TXSEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) - #endif - - /* Dword 8 */ - #define SET_TX_DESC_HWSEQ_EN_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) - - /* Dword 9 */ - #define SET_TX_DESC_SEQ_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) - - /* Dword 10 */ - #define SET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) - #define GET_TX_DESC_TX_BUFFER_ADDRESS_8703B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) - - /* Dword 11 */ - #define SET_TX_DESC_NEXT_DESC_ADDRESS_8703B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) - - - #define SET_EARLYMODE_PKTNUM_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) - #define SET_EARLYMODE_LEN0_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) - #define SET_EARLYMODE_LEN1_1_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) - #define SET_EARLYMODE_LEN1_2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) - #define SET_EARLYMODE_LEN2_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) - #define SET_EARLYMODE_LEN3_8703B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) - -#endif -/* ----------------------------------------------------------- - * - * Rate - * - * ----------------------------------------------------------- - * CCK Rates, TxHT = 0 */ -#define DESC8703B_RATE1M 0x00 -#define DESC8703B_RATE2M 0x01 -#define DESC8703B_RATE5_5M 0x02 -#define DESC8703B_RATE11M 0x03 - -/* OFDM Rates, TxHT = 0 */ -#define DESC8703B_RATE6M 0x04 -#define DESC8703B_RATE9M 0x05 -#define DESC8703B_RATE12M 0x06 -#define DESC8703B_RATE18M 0x07 -#define DESC8703B_RATE24M 0x08 -#define DESC8703B_RATE36M 0x09 -#define DESC8703B_RATE48M 0x0a -#define DESC8703B_RATE54M 0x0b - -/* MCS Rates, TxHT = 1 */ -#define DESC8703B_RATEMCS0 0x0c -#define DESC8703B_RATEMCS1 0x0d -#define DESC8703B_RATEMCS2 0x0e -#define DESC8703B_RATEMCS3 0x0f -#define DESC8703B_RATEMCS4 0x10 -#define DESC8703B_RATEMCS5 0x11 -#define DESC8703B_RATEMCS6 0x12 -#define DESC8703B_RATEMCS7 0x13 -#define DESC8703B_RATEMCS8 0x14 -#define DESC8703B_RATEMCS9 0x15 -#define DESC8703B_RATEMCS10 0x16 -#define DESC8703B_RATEMCS11 0x17 -#define DESC8703B_RATEMCS12 0x18 -#define DESC8703B_RATEMCS13 0x19 -#define DESC8703B_RATEMCS14 0x1a -#define DESC8703B_RATEMCS15 0x1b -#define DESC8703B_RATEVHTSS1MCS0 0x2c -#define DESC8703B_RATEVHTSS1MCS1 0x2d -#define DESC8703B_RATEVHTSS1MCS2 0x2e -#define DESC8703B_RATEVHTSS1MCS3 0x2f -#define DESC8703B_RATEVHTSS1MCS4 0x30 -#define DESC8703B_RATEVHTSS1MCS5 0x31 -#define DESC8703B_RATEVHTSS1MCS6 0x32 -#define DESC8703B_RATEVHTSS1MCS7 0x33 -#define DESC8703B_RATEVHTSS1MCS8 0x34 -#define DESC8703B_RATEVHTSS1MCS9 0x35 -#define DESC8703B_RATEVHTSS2MCS0 0x36 -#define DESC8703B_RATEVHTSS2MCS1 0x37 -#define DESC8703B_RATEVHTSS2MCS2 0x38 -#define DESC8703B_RATEVHTSS2MCS3 0x39 -#define DESC8703B_RATEVHTSS2MCS4 0x3a -#define DESC8703B_RATEVHTSS2MCS5 0x3b -#define DESC8703B_RATEVHTSS2MCS6 0x3c -#define DESC8703B_RATEVHTSS2MCS7 0x3d -#define DESC8703B_RATEVHTSS2MCS8 0x3e -#define DESC8703B_RATEVHTSS2MCS9 0x3f - - -#define RX_HAL_IS_CCK_RATE_8703B(pDesc)\ - (GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE1M || \ - GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE2M || \ - GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE5_5M || \ - GET_RX_STATUS_DESC_RX_RATE_8703B(pDesc) == DESC8703B_RATE11M) - - -void rtl8703b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -void rtl8703b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -#if defined(CONFIG_CONCURRENT_MODE) - void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -#endif -void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8703bs_init_xmit_priv(PADAPTER padapter); - void rtl8703bs_free_xmit_priv(PADAPTER padapter); - s32 rtl8703bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8703bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8703bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8703bs_xmit_buf_handler(PADAPTER padapter); - thread_return rtl8703bs_xmit_thread(thread_context context); - #define hal_xmit_handler rtl8703bs_xmit_buf_handler -#endif - -#ifdef CONFIG_USB_HCI - s32 rtl8703bu_xmit_buf_handler(PADAPTER padapter); - #define hal_xmit_handler rtl8703bu_xmit_buf_handler - - - s32 rtl8703bu_init_xmit_priv(PADAPTER padapter); - void rtl8703bu_free_xmit_priv(PADAPTER padapter); - s32 rtl8703bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8703bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8703bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - /* s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); */ - void rtl8703bu_xmit_tasklet(void *priv); - s32 rtl8703bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); - void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8703be_init_xmit_priv(PADAPTER padapter); - void rtl8703be_free_xmit_priv(PADAPTER padapter); - struct xmit_buf *rtl8703be_dequeue_xmitbuf(struct rtw_tx_ring *ring); - void rtl8703be_xmitframe_resume(_adapter *padapter); - s32 rtl8703be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8703be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8703be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8703be_xmit_tasklet(void *priv); -#endif - -u8 BWMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); -u8 SCMapping_8703B(PADAPTER Adapter, struct pkt_attrib *pattrib); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_cmd.h deleted file mode 100644 index 8b2e8fab3e858e..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_cmd.h +++ /dev/null @@ -1,175 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_CMD_H__ -#define __RTL8710B_CMD_H__ - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ - * --------------------------------------------------------------------------------------------------------- */ - -enum h2c_cmd_8710B { - /* Common Class: 000 */ - H2C_8710B_RSVD_PAGE = 0x00, - H2C_8710B_MEDIA_STATUS_RPT = 0x01, - H2C_8710B_SCAN_ENABLE = 0x02, - H2C_8710B_KEEP_ALIVE = 0x03, - H2C_8710B_DISCON_DECISION = 0x04, - H2C_8710B_PSD_OFFLOAD = 0x05, - H2C_8710B_AP_OFFLOAD = 0x08, - H2C_8710B_BCN_RSVDPAGE = 0x09, - H2C_8710B_PROBERSP_RSVDPAGE = 0x0A, - H2C_8710B_FCS_RSVDPAGE = 0x10, - H2C_8710B_FCS_INFO = 0x11, - H2C_8710B_AP_WOW_GPIO_CTRL = 0x13, - - /* PoweSave Class: 001 */ - H2C_8710B_SET_PWR_MODE = 0x20, - H2C_8710B_PS_TUNING_PARA = 0x21, - H2C_8710B_PS_TUNING_PARA2 = 0x22, - H2C_8710B_P2P_LPS_PARAM = 0x23, - H2C_8710B_P2P_PS_OFFLOAD = 0x24, - H2C_8710B_PS_SCAN_ENABLE = 0x25, - H2C_8710B_SAP_PS_ = 0x26, - H2C_8710B_INACTIVE_PS_ = 0x27, /* Inactive_PS */ - H2C_8710B_FWLPS_IN_IPS_ = 0x28, - - /* Dynamic Mechanism Class: 010 */ - H2C_8710B_MACID_CFG = 0x40, - H2C_8710B_TXBF = 0x41, - H2C_8710B_RSSI_SETTING = 0x42, - H2C_8710B_AP_REQ_TXRPT = 0x43, - H2C_8710B_INIT_RATE_COLLECT = 0x44, - H2C_8710B_RA_PARA_ADJUST = 0x46, - - /* WOWLAN Class: 100 */ - H2C_8710B_WOWLAN = 0x80, - H2C_8710B_REMOTE_WAKE_CTRL = 0x81, - H2C_8710B_AOAC_GLOBAL_INFO = 0x82, - H2C_8710B_AOAC_RSVD_PAGE = 0x83, - H2C_8710B_AOAC_RSVD_PAGE2 = 0x84, - H2C_8710B_D0_SCAN_OFFLOAD_CTRL = 0x85, - H2C_8710B_D0_SCAN_OFFLOAD_INFO = 0x86, - H2C_8710B_CHNL_SWITCH_OFFLOAD = 0x87, - H2C_8710B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, - H2C_8710B_P2P_OFFLOAD = 0x8B, - - H2C_8710B_RESET_TSF = 0xC0, - H2C_8710B_MAXID, -}; - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- - * _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8710B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_8710B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8710B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8710B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -/* _PWR_MOD_CMD_0x20 */ -#define SET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8710B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -#define SET_8710B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8710B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8710B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -#define SET_8710B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -#define GET_8710B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) - -/* _PS_TUNE_PARAM_CMD_0x21 */ -#define SET_8710B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8710B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -#define SET_8710B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -#define SET_8710B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _MACID_CFG_CMD_0x40 */ -#define SET_8710B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -#define SET_8710B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) - -/* _RSSI_SETTING_CMD_0x42 */ -#define SET_8710B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8710B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -#define SET_8710B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _AP_REQ_TXRPT_CMD_0x43 */ -#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8710B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _FORCE_BT_TXPWR_CMD_0x62 */ -#define SET_8710B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - -/* _FORCE_BT_MP_OPER_CMD_0x67 */ -#define SET_8710B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -#define SET_8710B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -#define SET_8710B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8710B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -#define SET_8710B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8710B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) - -/* _BT_FW_PATCH_0x6A */ -#define SET_8710B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) -#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8710B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) - -/* --------------------------------------------------------------------------------------------------------- - * ------------------------------------------- Structure -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- Function Statement -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - -/* host message to firmware cmd */ -void rtl8710b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8710b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -/* s32 rtl8710b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -void rtl8710b_set_FwPsTuneParam_cmd(PADAPTER padapter); -void rtl8710b_download_rsvd_page(PADAPTER padapter, u8 mstatus); -#ifdef CONFIG_BT_COEXIST - void rtl8710b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -#endif /* CONFIG_BT_COEXIST */ -#ifdef CONFIG_P2P - void rtl8710b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -#ifdef CONFIG_TDLS -#ifdef CONFIG_TDLS_CH_SW -void rtl8710b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); -#endif -#endif - -#ifdef CONFIG_P2P_WOWLAN - void rtl8710b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -#endif - -s32 FillH2CCmd8710B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -u8 GetTxBufferRsvdPageNum8710B(_adapter *padapter, bool wowlan); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_dm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_dm.h deleted file mode 100644 index 9a131ba05df3e8..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_dm.h +++ /dev/null @@ -1,39 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_DM_H__ -#define __RTL8710B_DM_H__ -/* ************************************************************ - * Description: - * - * This file is for 8710B dynamic mechanism only - * - * - * ************************************************************ */ - -/* ************************************************************ - * structure and define - * ************************************************************ */ - -/* ************************************************************ - * function prototype - * ************************************************************ */ - -void rtl8710b_init_dm_priv(PADAPTER padapter); -void rtl8710b_deinit_dm_priv(PADAPTER padapter); - -void rtl8710b_InitHalDm(PADAPTER padapter); -void rtl8710b_HalDmWatchDog(PADAPTER padapter); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_hal.h deleted file mode 100644 index 3e70fb7d068edb..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_hal.h +++ /dev/null @@ -1,277 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_HAL_H__ -#define __RTL8710B_HAL_H__ - -#include "hal_data.h" - -#include "rtl8710b_spec.h" -#include "rtl8710b_rf.h" -#include "rtl8710b_dm.h" -#include "rtl8710b_recv.h" -#include "rtl8710b_xmit.h" -#include "rtl8710b_cmd.h" -#include "rtl8710b_led.h" -#include "Hal8710BPwrSeq.h" -#include "Hal8710BPhyReg.h" -#include "Hal8710BPhyCfg.h" -#ifdef DBG_CONFIG_ERROR_DETECT - #include "rtl8710b_sreset.h" -#endif -#ifdef CONFIG_LPS_POFF - #include "rtl8710b_lps_poff.h" -#endif - -#define FW_8710B_SIZE 0x8000 -#define FW_8710B_START_ADDRESS 0x1000 -#define FW_8710B_END_ADDRESS 0x1FFF /* 0x5FFF */ - -typedef struct _RT_FIRMWARE { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[FW_8710B_SIZE]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8710B, *PRT_FIRMWARE_8710B; - -/* - * This structure must be cared byte-ordering - * - * Added by tynli. 2009.12.04. */ -typedef struct _RT_8710B_FIRMWARE_HDR { - /* 8-byte alinment required */ - - /* --- LONG WORD 0 ---- */ - u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ - u8 Category; /* AP/NIC and USB/PCI */ - u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ - u16 Version; /* FW Version */ - u16 Subversion; /* FW Subversion, default 0x00 */ - - /* --- LONG WORD 1 ---- */ - u8 Month; /* Release time Month field */ - u8 Date; /* Release time Date field */ - u8 Hour; /* Release time Hour field */ - u8 Minute; /* Release time Minute field */ - u16 RamCodeSize; /* The size of RAM code */ - u16 Rsvd2; - - /* --- LONG WORD 2 ---- */ - u32 SvnIdx; /* The SVN entry index */ - u32 Rsvd3; - - /* --- LONG WORD 3 ---- */ - u32 Rsvd4; - u32 Rsvd5; -} RT_8710B_FIRMWARE_HDR, *PRT_8710B_FIRMWARE_HDR; - -#define DRIVER_EARLY_INT_TIME_8710B 0x05 -#define BCN_DMA_ATIME_INT_TIME_8710B 0x02 - -/* for 8710B - * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -#define PAGE_SIZE_TX_8710B 128 -#define PAGE_SIZE_RX_8710B 8 - -#define TX_DMA_SIZE_8710B 0x8000 /* 32K(TX) */ -#define RX_DMA_SIZE_8710B 0x4000 /* 16K(RX) */ - -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#ifdef CONFIG_FW_C2H_DEBUG - #define RX_DMA_RESERVED_SIZE_8710B 0x100 /* 256B, reserved for c2h debug message */ -#else - #define RX_DMA_RESERVED_SIZE_8710B 0x80 /* 128B, reserved for tx report */ -#endif -#define RX_DMA_BOUNDARY_8710B\ - (RX_DMA_SIZE_8710B - RX_DMA_RESERVED_SIZE_8710B - 1) - - -/* Note: We will divide number of page equally for each queue other than public queue! */ - -/* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8710B - * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -#define BCNQ_PAGE_NUM_8710B (MAX_BEACON_LEN/PAGE_SIZE_TX_8710B + 6) /*0x08*/ - - -/* For WoWLan , more reserved page - * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 - * NS offload: 2 NDP info: 1 - */ -#ifdef CONFIG_WOWLAN - #define WOWLAN_PAGE_NUM_8710B 0x0b -#else - #define WOWLAN_PAGE_NUM_8710B 0x00 -#endif - -#ifdef CONFIG_PNO_SUPPORT - #undef WOWLAN_PAGE_NUM_8710B - #define WOWLAN_PAGE_NUM_8710B 0x15 -#endif - -#ifdef CONFIG_AP_WOWLAN - #define AP_WOWLAN_PAGE_NUM_8710B 0x02 -#endif - -#define TX_TOTAL_PAGE_NUMBER_8710B\ - (0xFF - BCNQ_PAGE_NUM_8710B -WOWLAN_PAGE_NUM_8710B) -#define TX_PAGE_BOUNDARY_8710B (TX_TOTAL_PAGE_NUMBER_8710B + 1) - -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B TX_TOTAL_PAGE_NUMBER_8710B -#define WMM_NORMAL_TX_PAGE_BOUNDARY_8710B\ - (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8710B + 1) - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8710B */ -#define NORMAL_PAGE_NUM_HPQ_8710B 0x0C -#define NORMAL_PAGE_NUM_LPQ_8710B 0x02 -#define NORMAL_PAGE_NUM_NPQ_8710B 0x02 -#define NORMAL_PAGE_NUM_EPQ_8710B 0x04 - -/* Note: For Normal Chip Setting, modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_8710B 0x30 -#define WMM_NORMAL_PAGE_NUM_LPQ_8710B 0x20 -#define WMM_NORMAL_PAGE_NUM_NPQ_8710B 0x20 -#define WMM_NORMAL_PAGE_NUM_EPQ_8710B 0x00 - - -#include "HalVerDef.h" -#include "hal_com.h" - -#define EFUSE_OOB_PROTECT_BYTES (96 + 1) - -#define HAL_EFUSE_MEMORY -#define HWSET_MAX_SIZE_8710B 512 -#define EFUSE_REAL_CONTENT_LEN_8710B 512 -#define EFUSE_MAP_LEN_8710B 512 -#define EFUSE_MAX_SECTION_8710B 64 - -/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ -#define EFUSE_IC_ID_OFFSET 506 -#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8710B) - -#define EFUSE_ACCESS_ON 0x69 -#define EFUSE_ACCESS_OFF 0x00 - -#define PACKAGE_QFN32_S 0 -#define PACKAGE_QFN48M_S 1 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xFE -#define PACKAGE_QFN48_S 2 -#define PACKAGE_QFN64_S 3 -#define PACKAGE_QFN32_U 4 -#define PACKAGE_QFN48M_U 5 //definiton 8188GU Dongle Package, Efuse Physical Address 0xF8 = 0xEE -#define PACKAGE_QFN48_U 6 -#define PACKAGE_QFN68_U 7 - -typedef enum _PACKAGE_TYPE_E -{ - PACKAGE_DEFAULT, - PACKAGE_QFN68, - PACKAGE_TFBGA90, - PACKAGE_TFBGA80, - PACKAGE_TFBGA79 -}PACKAGE_TYPE_E; - -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ - (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -#ifdef CONFIG_FILE_FWIMG - extern char *rtw_fw_file_path; - extern char *rtw_fw_wow_file_path; - #ifdef CONFIG_MP_INCLUDED - extern char *rtw_fw_mp_bt_file_path; - #endif /* CONFIG_MP_INCLUDED */ -#endif /* CONFIG_FILE_FWIMG */ - -/* rtl8710b_hal_init.c */ -s32 rtl8710b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -void rtl8710b_FirmwareSelfReset(PADAPTER padapter); -void rtl8710b_InitializeFirmwareVars(PADAPTER padapter); - -void rtl8710b_InitAntenna_Selection(PADAPTER padapter); -void rtl8710b_DeinitAntenna_Selection(PADAPTER padapter); -void rtl8710b_CheckAntenna_Selection(PADAPTER padapter); -void rtl8710b_init_default_value(PADAPTER padapter); - - -u32 indirect_read32_8710b(PADAPTER padapter, u32 regaddr); -VOID indirect_write32_8710b(PADAPTER padapter, u32 regaddr, u32 data); -u32 hal_query_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask); -VOID hal_set_syson_reg_8710b(PADAPTER padapter, u32 regaddr, u32 bitmask, u32 data); -#define HAL_SetSYSOnReg hal_set_syson_reg_8710b - - -/* EFuse */ -u8 GetEEPROMSize8710B(PADAPTER padapter); - -#if 0 -void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -void Hal_EfuseParseTxPowerInfo_8710B(PADAPTER padapter, - u8 *PROMContent, BOOLEAN AutoLoadFail); -void Hal_EfuseParseEEPROMVer_8710B(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParsePackageType_8710B(PADAPTER pAdapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseChnlPlan_8710B(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseCustomerID_8710B(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseAntennaDiversity_8710B(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseXtal_8710B(PADAPTER pAdapter, - u8 *hwinfo, u8 AutoLoadFail); -void Hal_EfuseParseThermalMeter_8710B(PADAPTER padapter, - u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParseBoardType_8710B(PADAPTER Adapter, - u8 *PROMContent, BOOLEAN AutoloadFail); -#endif - -void rtl8710b_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8710b(_adapter *adapter); -u8 SetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); -void GetHwReg8710B(PADAPTER padapter, u8 variable, u8 *val); -u8 SetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -u8 GetHalDefVar8710B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); - -/* register */ -void rtl8710b_InitBeaconParameters(PADAPTER padapter); -void rtl8710b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -void _8051Reset8710(PADAPTER padapter); - -void rtl8710b_start_thread(_adapter *padapter); -void rtl8710b_stop_thread(_adapter *padapter); - -#ifdef CONFIG_GPIO_WAKEUP - void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -#endif - -void CCX_FwC2HTxRpt_8710b(PADAPTER padapter, u8 *pdata, u8 len); - -u8 MRateToHwRate8710B(u8 rate); -u8 HwRateToMRate8710B(u8 rate); - -#ifdef CONFIG_USB_HCI - void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc); -#endif - - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_led.h deleted file mode 100644 index 8ca346d7ad357c..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_led.h +++ /dev/null @@ -1,44 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_LED_H__ -#define __RTL8710B_LED_H__ - -#include -#include -#include - -#ifdef CONFIG_RTW_SW_LED -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI - void rtl8710bu_InitSwLeds(PADAPTER padapter); - void rtl8710bu_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_SDIO_HCI - void rtl8710bs_InitSwLeds(PADAPTER padapter); - void rtl8710bs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_GSPI_HCI - void rtl8710bs_InitSwLeds(PADAPTER padapter); - void rtl8710bs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_PCI_HCI - void rtl8710be_InitSwLeds(PADAPTER padapter); - void rtl8710be_DeInitSwLeds(PADAPTER padapter); -#endif - -#endif /*#ifdef CONFIG_RTW_SW_LED*/ -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_lps_poff.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_lps_poff.h deleted file mode 100644 index ea9c60e8f700ea..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_lps_poff.h +++ /dev/null @@ -1,56 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ - -/******************************************** CONST ************************/ -#define NUM_OF_REGISTER_BANK 13 -#define NUM_OF_TOTAL_DWORD (NUM_OF_REGISTER_BANK * 64) -#define TOTAL_LEN_FOR_HIOE ((NUM_OF_TOTAL_DWORD + 1) * 8) -#define LPS_POFF_STATIC_FILE_LEN (TOTAL_LEN_FOR_HIOE + TXDESC_SIZE) -#define LPS_POFF_DYNAMIC_FILE_LEN (512 + TXDESC_SIZE) -/******************************************** CONST ************************/ - -/******************************************** MACRO ************************/ -/* HOIE Entry Definition */ -#define SET_HOIE_ENTRY_LOW_DATA(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE), 0, 16, __Value) -#define SET_HOIE_ENTRY_HIGH_DATA(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE), 16, 16, __Value) -#define SET_HOIE_ENTRY_MODE_SELECT(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 0, 1, __Value) -#define SET_HOIE_ENTRY_ADDRESS(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 1, 14, __Value) -#define SET_HOIE_ENTRY_BYTE_MASK(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 15, 4, __Value) -#define SET_HOIE_ENTRY_IO_LOCK(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 19, 1, __Value) -#define SET_HOIE_ENTRY_RD_EN(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 20, 1, __Value) -#define SET_HOIE_ENTRY_WR_EN(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 21, 1, __Value) -#define SET_HOIE_ENTRY_RAW_RW(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 22, 1, __Value) -#define SET_HOIE_ENTRY_RAW(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 23, 1, __Value) -#define SET_HOIE_ENTRY_IO_DELAY(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 24, 8, __Value) - -/*********************Function Definition*******************************************/ -void rtl8710b_lps_poff_init(PADAPTER padapter); -void rtl8710b_lps_poff_deinit(PADAPTER padapter); -bool rtl8710b_lps_poff_get_txbndy_status(PADAPTER padapter); -void rtl8710b_lps_poff_h2c_ctrl(PADAPTER padapter, u8 enable); -void rtl8710b_lps_poff_set_ps_mode(PADAPTER padapter, bool bEnterLPS); -bool rtl8710b_lps_poff_get_status(PADAPTER padapter); -void rtl8710b_lps_poff_wow(PADAPTER padapter); diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_recv.h deleted file mode 100644 index f99c3317523ad0..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_recv.h +++ /dev/null @@ -1,85 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_RECV_H__ -#define __RTL8710B_RECV_H__ - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifdef CONFIG_MINIMAL_MEMORY_USAGE - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #else - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #elif defined(CONFIG_PLATFORM_HISILICON) - #define MAX_RECVBUF_SZ (16384) /* 16k */ - #else - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (20480) */ /* 20K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16k - 92E RX BUF :16K */ - #endif - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ -#endif - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -/*-----------------------------------------------------------------*/ -/* RTL8710B RX BUFFER DESC */ -/*-----------------------------------------------------------------*/ -/*DWORD 0*/ -#define SET_RX_BUFFER_DESC_DATA_LENGTH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -#define SET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) - -#define GET_RX_BUFFER_DESC_OWN_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -#define GET_RX_BUFFER_DESC_LS_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_BUFFER_DESC_FS_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -#ifdef USING_RX_TAG - #define GET_RX_BUFFER_DESC_RX_TAG_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) -#else - #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8710B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -#endif - -/*DWORD 1*/ -#define SET_RX_BUFFER_PHYSICAL_LOW_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) - -/*DWORD 2*/ -#ifdef CONFIG_64BIT_DMA - #define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -#else - #define SET_RX_BUFFER_PHYSICAL_HIGH_8710B(__pRxStatusDesc, __Value) -#endif - -#ifdef CONFIG_USB_HCI - int rtl8710bu_init_recv_priv(_adapter *padapter); - void rtl8710bu_free_recv_priv(_adapter *padapter); - void rtl8710bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -#endif - -void rtl8710b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); - -#endif /* __RTL8710B_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_rf.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_rf.h deleted file mode 100644 index 2f176e6dc01c06..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_rf.h +++ /dev/null @@ -1,20 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_RF_H__ -#define __RTL8710B_RF_H__ - -int PHY_RF6052_Config8710B(IN PADAPTER pdapter); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_spec.h deleted file mode 100644 index 78c5745c15d96f..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_spec.h +++ /dev/null @@ -1,481 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_SPEC_H__ -#define __RTL8710B_SPEC_H__ - -#include - - -#define HAL_NAV_UPPER_UNIT_8710B 128 /* micro-second */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_SYS_ISO_CTRL_8710B 0x0000 /* 2 Byte */ -#define REG_APS_FSMCO_8710B 0x0004 /* 4 Byte */ -#define REG_SYS_CLKR_8710B 0x0008 /* 2 Byte */ -#define REG_9346CR_8710B 0x000A /* 2 Byte */ -#define REG_EE_VPD_8710B 0x000C /* 2 Byte */ -#define REG_AFE_MISC_8710B 0x0010 /* 1 Byte */ -#define REG_SPS0_CTRL_8710B 0x0011 /* 7 Byte */ -#define REG_SPS_OCP_CFG_8710B 0x0018 /* 4 Byte */ -#define REG_RSV_CTRL_8710B 0x001C /* 3 Byte */ -#define REG_RF_CTRL_8710B 0x001F /* 1 Byte */ -#define REG_LPLDO_CTRL_8710B 0x0023 /* 1 Byte */ -#define REG_AFE_XTAL_CTRL_8710B 0x0024 /* 4 Byte */ -#define REG_AFE_PLL_CTRL_8710B 0x0028 /* 4 Byte */ -#define REG_MAC_PLL_CTRL_EXT_8710B 0x002c /* 4 Byte */ -#define REG_EFUSE_CTRL_8710B 0x0030 -#define REG_EFUSE_TEST_8710B 0x0034 -#define REG_PWR_DATA_8710B 0x0038 -#define REG_CAL_TIMER_8710B 0x003C -#define REG_ACLK_MON_8710B 0x003E -#define REG_GPIO_MUXCFG_8710B 0x0040 -#define REG_GPIO_IO_SEL_8710B 0x0042 -#define REG_MAC_PINMUX_CFG_8710B 0x0043 -#define REG_GPIO_PIN_CTRL_8710B 0x0044 -#define REG_GPIO_INTM_8710B 0x0048 -#define REG_LEDCFG0_8710B 0x004C -#define REG_LEDCFG1_8710B 0x004D -#define REG_LEDCFG2_8710B 0x004E -#define REG_LEDCFG3_8710B 0x004F -#define REG_FSIMR_8710B 0x0050 -#define REG_FSISR_8710B 0x0054 -#define REG_HSIMR_8710B 0x0058 -#define REG_HSISR_8710B 0x005c -#define REG_GPIO_EXT_CTRL 0x0060 -#define REG_PAD_CTRL1_8710B 0x0064 -#define REG_MULTI_FUNC_CTRL_8710B 0x0068 -#define REG_GPIO_STATUS_8710B 0x006C -#define REG_SDIO_CTRL_8710B 0x0070 -#define REG_OPT_CTRL_8710B 0x0074 -#define REG_AFE_CTRL_4_8710B 0x0078 -#define REG_MCUFWDL_8710B 0x0080 -#define REG_8051FW_CTRL_8710B 0x0080 -#define REG_HMEBOX_DBG_0_8710B 0x0088 -#define REG_HMEBOX_DBG_1_8710B 0x008A -#define REG_HMEBOX_DBG_2_8710B 0x008C -#define REG_HMEBOX_DBG_3_8710B 0x008E -#define REG_WLLPS_CTRL 0x0090 - -#define REG_PMC_DBG_CTRL2_8710B 0x00CC -#define REG_EFUSE_BURN_GNT_8710B 0x00CF -#define REG_HPON_FSM_8710B 0x00EC -#define REG_SYS_CFG1_8710B 0x00F0 -#define REG_SYS_CFG_8710B 0x00FC -#define REG_ROM_VERSION 0x00FD - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_C2HEVT_CMD_ID_8710B 0x01A0 -#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -#define REG_C2HEVT_CMD_LEN_8710B 0x01AE -#define REG_C2HEVT_CLEAR_8710B 0x01AF -#define REG_MCUTST_1_8710B 0x01C0 -#define REG_WOWLAN_WAKE_REASON 0x01C7 -#define REG_FMETHR_8710B 0x01C8 -#define REG_HMETFR_8710B 0x01CC -#define REG_HMEBOX_0_8710B 0x01D0 -#define REG_HMEBOX_1_8710B 0x01D4 -#define REG_HMEBOX_2_8710B 0x01D8 -#define REG_HMEBOX_3_8710B 0x01DC -#define REG_LLT_INIT_8710B 0x01E0 -#define REG_HMEBOX_EXT0_8710B 0x01F0 -#define REG_HMEBOX_EXT1_8710B 0x01F4 -#define REG_HMEBOX_EXT2_8710B 0x01F8 -#define REG_HMEBOX_EXT3_8710B 0x01FC - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RQPN_8710B 0x0200 -#define REG_FIFOPAGE_8710B 0x0204 -#define REG_DWBCN0_CTRL_8710B REG_TDECTRL -#define REG_TXDMA_OFFSET_CHK_8710B 0x020C -#define REG_TXDMA_STATUS_8710B 0x0210 -#define REG_RQPN_NPQ_8710B 0x0214 -#define REG_DWBCN1_CTRL_8710B 0x0228 - - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RXDMA_AGG_PG_TH_8710B 0x0280 -#define REG_FW_UPD_RDPTR_8710B 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -#define REG_RXDMA_CONTROL_8710B 0x0286 /* Control the RX DMA. */ -#define REG_RXDMA_STATUS_8710B 0x0288 -#define REG_RXDMA_MODE_CTRL_8710B 0x0290 -#define REG_EARLY_MODE_CONTROL_8710B 0x02BC -#define REG_RSVD5_8710B 0x02F0 -#define REG_RSVD6_8710B 0x02F4 - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_CTRL_REG_8710B 0x0300 -#define REG_INT_MIG_8710B 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_TXBD_DESA_8710B 0x0308 /* TX Beacon Descriptor Address */ -#define REG_MGQ_TXBD_DESA_8710B 0x0310 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_TXBD_DESA_8710B 0x0318 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_TXBD_DESA_8710B 0x0320 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_TXBD_DESA_8710B 0x0328 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_TXBD_DESA_8710B 0x0330 /* TX BK Queue Descriptor Address */ -#define REG_RXQ_RXBD_DESA_8710B 0x0338 /* RX Queue Descriptor Address */ -#define REG_HI0Q_TXBD_DESA_8710B 0x0340 -#define REG_HI1Q_TXBD_DESA_8710B 0x0348 -#define REG_HI2Q_TXBD_DESA_8710B 0x0350 -#define REG_HI3Q_TXBD_DESA_8710B 0x0358 -#define REG_HI4Q_TXBD_DESA_8710B 0x0360 -#define REG_HI5Q_TXBD_DESA_8710B 0x0368 -#define REG_HI6Q_TXBD_DESA_8710B 0x0370 -#define REG_HI7Q_TXBD_DESA_8710B 0x0378 -#define REG_MGQ_TXBD_NUM_8710B 0x0380 -#define REG_RX_RXBD_NUM_8710B 0x0382 -#define REG_VOQ_TXBD_NUM_8710B 0x0384 -#define REG_VIQ_TXBD_NUM_8710B 0x0386 -#define REG_BEQ_TXBD_NUM_8710B 0x0388 -#define REG_BKQ_TXBD_NUM_8710B 0x038A -#define REG_HI0Q_TXBD_NUM_8710B 0x038C -#define REG_HI1Q_TXBD_NUM_8710B 0x038E -#define REG_HI2Q_TXBD_NUM_8710B 0x0390 -#define REG_HI3Q_TXBD_NUM_8710B 0x0392 -#define REG_HI4Q_TXBD_NUM_8710B 0x0394 -#define REG_HI5Q_TXBD_NUM_8710B 0x0396 -#define REG_HI6Q_TXBD_NUM_8710B 0x0398 -#define REG_HI7Q_TXBD_NUM_8710B 0x039A -#define REG_TSFTIMER_HCI_8710B 0x039C -#define REG_BD_RW_PTR_CLR_8710B 0x039C - -/* Read Write Point */ -#define REG_VOQ_TXBD_IDX_8710B 0x03A0 -#define REG_VIQ_TXBD_IDX_8710B 0x03A4 -#define REG_BEQ_TXBD_IDX_8710B 0x03A8 -#define REG_BKQ_TXBD_IDX_8710B 0x03AC -#define REG_MGQ_TXBD_IDX_8710B 0x03B0 -#define REG_RXQ_TXBD_IDX_8710B 0x03B4 -#define REG_HI0Q_TXBD_IDX_8710B 0x03B8 -#define REG_HI1Q_TXBD_IDX_8710B 0x03BC -#define REG_HI2Q_TXBD_IDX_8710B 0x03C0 -#define REG_HI3Q_TXBD_IDX_8710B 0x03C4 -#define REG_HI4Q_TXBD_IDX_8710B 0x03C8 -#define REG_HI5Q_TXBD_IDX_8710B 0x03CC -#define REG_HI6Q_TXBD_IDX_8710B 0x03D0 -#define REG_HI7Q_TXBD_IDX_8710B 0x03D4 - -#define REG_PCIE_HCPWM_8710BE 0x03D8 /* ?????? */ -#define REG_PCIE_HRPWM_8710BE 0x03DC /* PCIe RPWM ?????? */ -#define REG_DBI_WDATA_V1_8710B 0x03E8 -#define REG_DBI_RDATA_V1_8710B 0x03EC -#define REG_DBI_FLAG_V1_8710B 0x03F0 -#define REG_MDIO_V1_8710B 0x03F4 -#define REG_PCIE_MIX_CFG_8710B 0x03F8 -#define REG_HCI_MIX_CFG_8710B 0x03FC - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#define REG_VOQ_INFORMATION_8710B 0x0400 -#define REG_VIQ_INFORMATION_8710B 0x0404 -#define REG_BEQ_INFORMATION_8710B 0x0408 -#define REG_BKQ_INFORMATION_8710B 0x040C -#define REG_MGQ_INFORMATION_8710B 0x0410 -#define REG_HGQ_INFORMATION_8710B 0x0414 -#define REG_BCNQ_INFORMATION_8710B 0x0418 -#define REG_TXPKT_EMPTY_8710B 0x041A - -#define REG_FWHW_TXQ_CTRL_8710B 0x0420 -#define REG_HWSEQ_CTRL_8710B 0x0423 -#define REG_TXPKTBUF_BCNQ_BDNY_8710B 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY_8710B 0x0425 -#define REG_LIFECTRL_CTRL_8710B 0x0426 -#define REG_MULTI_BCNQ_OFFSET_8710B 0x0427 -#define REG_SPEC_SIFS_8710B 0x0428 -#define REG_RL_8710B 0x042A -#define REG_TXBF_CTRL_8710B 0x042C -#define REG_DARFRC_8710B 0x0430 -#define REG_RARFRC_8710B 0x0438 -#define REG_RRSR_8710B 0x0440 -#define REG_ARFR0_8710B 0x0444 -#define REG_ARFR1_8710B 0x044C -#define REG_CCK_CHECK_8710B 0x0454 -#define REG_AMPDU_MAX_TIME_8710B 0x0456 -#define REG_TXPKTBUF_BCNQ_BDNY1_8710B 0x0457 - -#define REG_AMPDU_MAX_LENGTH_8710B 0x0458 -#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8710B 0x045D -#define REG_NDPA_OPT_CTRL_8710B 0x045F -#define REG_FAST_EDCA_CTRL_8710B 0x0460 -#define REG_RD_RESP_PKT_TH_8710B 0x0463 -#define REG_DATA_SC_8710B 0x0483 -#ifdef CONFIG_WOWLAN - #define REG_TXPKTBUF_IV_LOW 0x0484 - #define REG_TXPKTBUF_IV_HIGH 0x0488 -#endif -#define REG_TXRPT_START_OFFSET 0x04AC -#define REG_POWER_STAGE1_8710B 0x04B4 -#define REG_POWER_STAGE2_8710B 0x04B8 -#define REG_AMPDU_BURST_MODE_8710B 0x04BC -#define REG_PKT_VO_VI_LIFE_TIME_8710B 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME_8710B 0x04C2 -#define REG_STBC_SETTING_8710B 0x04C4 -#define REG_HT_SINGLE_AMPDU_8710B 0x04C7 -#define REG_PROT_MODE_CTRL_8710B 0x04C8 -#define REG_MAX_AGGR_NUM_8710B 0x04CA -#define REG_RTS_MAX_AGGR_NUM_8710B 0x04CB -#define REG_BAR_MODE_CTRL_8710B 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT_8710B 0x04CF -#define REG_MACID_PKT_DROP0_8710B 0x04D0 -#define REG_MACID_PKT_SLEEP_8710B 0x04D4 - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ -#define REG_EDCA_VO_PARAM_8710B 0x0500 -#define REG_EDCA_VI_PARAM_8710B 0x0504 -#define REG_EDCA_BE_PARAM_8710B 0x0508 -#define REG_EDCA_BK_PARAM_8710B 0x050C -#define REG_BCNTCFG_8710B 0x0510 -#define REG_PIFS_8710B 0x0512 -#define REG_RDG_PIFS_8710B 0x0513 -#define REG_SIFS_CTX_8710B 0x0514 -#define REG_SIFS_TRX_8710B 0x0516 -#define REG_AGGR_BREAK_TIME_8710B 0x051A -#define REG_SLOT_8710B 0x051B -#define REG_TX_PTCL_CTRL_8710B 0x0520 -#define REG_TXPAUSE_8710B 0x0522 -#define REG_DIS_TXREQ_CLR_8710B 0x0523 -#define REG_RD_CTRL_8710B 0x0524 -/* - * Format for offset 540h-542h: - * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. - * [7:4]: Reserved. - * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. - * [23:20]: Reserved - * Description: - * | - * |<--Setup--|--Hold------------>| - * --------------|---------------------- - * | - * TBTT - * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. - * Described by Designer Tim and Bruce, 2011-01-14. - * */ -#define REG_TBTT_PROHIBIT_8710B 0x0540 -#define REG_RD_NAV_NXT_8710B 0x0544 -#define REG_NAV_PROT_LEN_8710B 0x0546 -#define REG_BCN_CTRL_8710B 0x0550 -#define REG_BCN_CTRL_1_8710B 0x0551 -#define REG_MBID_NUM_8710B 0x0552 -#define REG_DUAL_TSF_RST_8710B 0x0553 -#define REG_BCN_INTERVAL_8710B 0x0554 -#define REG_DRVERLYINT_8710B 0x0558 -#define REG_BCNDMATIM_8710B 0x0559 -#define REG_ATIMWND_8710B 0x055A -#define REG_USTIME_TSF_8710B 0x055C -#define REG_BCN_MAX_ERR_8710B 0x055D -#define REG_RXTSF_OFFSET_CCK_8710B 0x055E -#define REG_RXTSF_OFFSET_OFDM_8710B 0x055F -#define REG_TSFTR_8710B 0x0560 -#define REG_CTWND_8710B 0x0572 -#define REG_SECONDARY_CCA_CTRL_8710B 0x0577 -#define REG_PSTIMER_8710B 0x0580 -#define REG_TIMER0_8710B 0x0584 -#define REG_TIMER1_8710B 0x0588 -#define REG_ACMHWCTRL_8710B 0x05C0 -#define REG_SCH_TXCMD_8710B 0x05F8 - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ -#define REG_MAC_CR_8710B 0x0600 -#define REG_TCR_8710B 0x0604 -#define REG_RCR_8710B 0x0608 -#define REG_RX_PKT_LIMIT_8710B 0x060C -#define REG_RX_DLK_TIME_8710B 0x060D -#define REG_RX_DRVINFO_SZ_8710B 0x060F - -#define REG_MACID_8710B 0x0610 -#define REG_BSSID_8710B 0x0618 -#define REG_MAR_8710B 0x0620 -#define REG_MBIDCAMCFG_8710B 0x0628 -#define REG_WOWLAN_GTK_DBG1 0x630 -#define REG_WOWLAN_GTK_DBG2 0x634 - -#define REG_USTIME_EDCA_8710B 0x0638 -#define REG_MAC_SPEC_SIFS_8710B 0x063A -#define REG_RESP_SIFP_CCK_8710B 0x063C -#define REG_RESP_SIFS_OFDM_8710B 0x063E -#define REG_ACKTO_8710B 0x0640 -#define REG_CTS2TO_8710B 0x0641 -#define REG_EIFS_8710B 0x0642 - -#define REG_NAV_UPPER_8710B 0x0652 /* unit of 128 */ -#define REG_TRXPTCL_CTL_8710B 0x0668 - -/* Security */ -#define REG_CAMCMD_8710B 0x0670 -#define REG_CAMWRITE_8710B 0x0674 -#define REG_CAMREAD_8710B 0x0678 -#define REG_CAMDBG_8710B 0x067C -#define REG_SECCFG_8710B 0x0680 - -/* Power */ -#define REG_WOW_CTRL_8710B 0x0690 -#define REG_PS_RX_INFO_8710B 0x0692 -#define REG_UAPSD_TID_8710B 0x0693 -#define REG_WKFMCAM_CMD_8710B 0x0698 -#define REG_WKFMCAM_NUM_8710B 0x0698 -#define REG_WKFMCAM_RWD_8710B 0x069C -#define REG_RXFLTMAP0_8710B 0x06A0 -#define REG_RXFLTMAP1_8710B 0x06A2 -#define REG_RXFLTMAP2_8710B 0x06A4 -#define REG_BCN_PSR_RPT_8710B 0x06A8 -#define REG_BT_COEX_TABLE_8710B 0x06C0 -#define REG_BFMER0_INFO_8710B 0x06E4 -#define REG_BFMER1_INFO_8710B 0x06EC -#define REG_CSI_RPT_PARAM_BW20_8710B 0x06F4 -#define REG_CSI_RPT_PARAM_BW40_8710B 0x06F8 -#define REG_CSI_RPT_PARAM_BW80_8710B 0x06FC - -/* Hardware Port 2 */ -#define REG_MACID1_8710B 0x0700 -#define REG_BSSID1_8710B 0x0708 -#define REG_BFMEE_SEL_8710B 0x0714 -#define REG_SND_PTCL_CTRL_8710B 0x0718 - -/* LTR */ -#define REG_LTR_CTRL_BASIC_8710B 0x07A4 -#define REG_LTR_IDLE_LATENCY_V1_8710B 0x0798 -#define REG_LTR_ACTIVE_LATENCY_V1_8710B 0x079C - -/* LTE_COEX */ -#define REG_LTECOEX_CTRL 0x07C0 -#define REG_LTECOEX_WRITE_DATA 0x07C4 -#define REG_LTECOEX_READ_DATA 0x07C8 -#define REG_LTECOEX_PATH_CONTROL 0x70 - -/* Other */ -#define REG_USB_ACCESS_TIMEOUT 0xFE4C - -/* ----------------------------------------------------- - * SYSON_REG_SPEC - * ----------------------------------------------------- */ -#define SYSON_REG_BASE_ADDR_8710B 0x40000000 -#define REG_SYS_XTAL_CTRL0 0x0060 -#define REG_SYS_SYSTEM_CFG0 0x1F0 -#define REG_SYS_SYSTEM_CFG1 0x1F4 -#define REG_SYS_SYSTEM_CFG2 0x1F8 -#define REG_SYS_EEPROM_CTRL0 0x0E0 - - -/* ----------------------------------------------------- - * Indirect_R/W_SPEC - * ----------------------------------------------------- */ -#define NORMAL_REG_READ_OFFSET 0x83000000 -#define NORMAL_REG_WRITE_OFFSET 0x84000000 -#define EFUSE_READ_OFFSET 0x85000000 -#define EFUSE_WRITE_OFFSET 0x86000000 - - -/* ----------------------------------------------------- - * PAGE0_WLANON_REG_SPEC - * ----------------------------------------------------- */ -#define PAGE0_OFFSET 0x0 // WLANON_PAGE0_REG needs to add an offset. - - - -/* **************************************************************************** - * 8723 Regsiter Bit and Content definition - * **************************************************************************** */ - - /* ----------------------------------------------------- - * REG_SYS_SYSTEM_CFG0 - * ----------------------------------------------------- */ -#define BIT_RTL_ID_8710B BIT(16) - -#define BIT_MASK_CHIP_VER_8710B 0xf -#define BIT_GET_CHIP_VER_8710B(x) ((x) & BIT_MASK_CHIP_VER_8710B) - -#define BIT_SHIFT_VENDOR_ID_8710B 4 -#define BIT_MASK_VENDOR_ID_8710B 0xf -#define BIT_GET_VENDOR_ID_8710B(x) (((x) >> BIT_SHIFT_VENDOR_ID_8710B) & BIT_MASK_VENDOR_ID_8710B) - - /* ----------------------------------------------------- - * REG_SYS_SYSTEM_CFG1 - * ----------------------------------------------------- */ -#define BIT_SPSLDO_SEL_8710B BIT(25) - - /* ----------------------------------------------------- - * REG_SYS_SYSTEM_CFG2 - * ----------------------------------------------------- */ -#define BIT_MASK_RF_RL_ID_8710B 0xf -#define BIT_GET_RF_RL_ID_8710B(x) ((x) & BIT_MASK_RF_RL_ID_8710B) - - /* ----------------------------------------------------- - * REG_SYS_SYSTEM_CFG2 - * ----------------------------------------------------- */ -#define BIT_EERPOMSEL_8710B BIT(4) -#define BIT_AUTOLOAD_SUS_8710B BIT(5) - - - /* ----------------------------------------------------- - * Other - * ----------------------------------------------------- */ - - -#define BIT_USB_RXDMA_AGG_EN BIT(31) -#define RXDMA_AGG_MODE_EN BIT(1) - -#ifdef CONFIG_WOWLAN - #define RXPKT_RELEASE_POLL BIT(16) - #define RXDMA_IDLE BIT(17) - #define RW_RELEASE_EN BIT(18) -#endif - -/* 2 HSISR - * interrupt mask which needs to clear */ -#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ - HSISR_SPS_OCP_INT |\ - HSISR_RON_INT |\ - HSISR_PDNINT |\ - HSISR_GPIO9_INT) - -#ifdef CONFIG_RF_POWER_TRIM - #ifdef CONFIG_RTL8710B - #define EEPROM_RF_GAIN_OFFSET 0xC1 - #endif - - #define EEPROM_RF_GAIN_VAL 0x1F6 -#endif /*CONFIG_RF_POWER_TRIM*/ - -#endif /* __RTL8710B_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_xmit.h deleted file mode 100644 index a6b49cd74568cb..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8710b_xmit.h +++ /dev/null @@ -1,522 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8710B_XMIT_H__ -#define __RTL8710B_XMIT_H__ - - -#define MAX_TID (15) - - -#ifndef __INC_HAL8710BDESC_H -#define __INC_HAL8710BDESC_H - -#define RX_STATUS_DESC_SIZE_8710B 24 -#define RX_DRV_INFO_SIZE_UNIT_8710B 8 - - -/* DWORD 0 */ -#define SET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -#define SET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) - -#define GET_RX_STATUS_DESC_PKT_LEN_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -#define GET_RX_STATUS_DESC_CRC32_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -#define GET_RX_STATUS_DESC_ICV_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -#define GET_RX_STATUS_DESC_SECURITY_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -#define GET_RX_STATUS_DESC_QOS_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -#define GET_RX_STATUS_DESC_SHIFT_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -#define GET_RX_STATUS_DESC_PHY_STATUS_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -#define GET_RX_STATUS_DESC_SWDEC_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -#define GET_RX_STATUS_DESC_EOR_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -#define GET_RX_STATUS_DESC_OWN_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) - -/* DWORD 1 */ -#define GET_RX_STATUS_DESC_MACID_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -#define GET_RX_STATUS_DESC_TID_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -#define GET_RX_STATUS_DESC_AMSDU_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -#define GET_RX_STATUS_DESC_RXID_MATCH_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -#define GET_RX_STATUS_DESC_PAGGR_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -#define GET_RX_STATUS_DESC_A1_FIT_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -#define GET_RX_STATUS_DESC_CHKERR_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -#define GET_RX_STATUS_DESC_IPVER_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -#define GET_RX_STATUS_DESC_IS_TCPUDP__8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -#define GET_RX_STATUS_DESC_CHK_VLD_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -#define GET_RX_STATUS_DESC_PAM_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -#define GET_RX_STATUS_DESC_PWR_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -#define GET_RX_STATUS_DESC_MORE_DATA_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -#define GET_RX_STATUS_DESC_MORE_FRAG_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -#define GET_RX_STATUS_DESC_TYPE_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -#define GET_RX_STATUS_DESC_MC_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -#define GET_RX_STATUS_DESC_BC_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) - -/* DWORD 2 */ -#define GET_RX_STATUS_DESC_SEQ_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -#define GET_RX_STATUS_DESC_FRAG_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -#define GET_RX_STATUS_DESC_RX_IS_QOS_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -#define GET_RX_STATUS_DESC_RPT_SEL_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -#define GET_RX_STATUS_DESC_FCS_OK_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) - -/* DWORD 3 */ -#define GET_RX_STATUS_DESC_RX_RATE_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -#define GET_RX_STATUS_DESC_HTC_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -#define GET_RX_STATUS_DESC_EOSP_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -#define GET_RX_STATUS_DESC_BSSID_FIT_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -#ifdef CONFIG_USB_RX_AGGREGATION -#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -#endif -#define GET_RX_STATUS_DESC_PATTERN_MATCH_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -#define GET_RX_STATUS_DESC_UNICAST_MATCH_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -#define GET_RX_STATUS_DESC_MAGIC_MATCH_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) - -/* DWORD 6 */ -#define GET_RX_STATUS_DESC_MATCH_ID_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) - -/* DWORD 5 */ -#define GET_RX_STATUS_DESC_TSFL_8710B(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) - -#define GET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -#define GET_RX_STATUS_DESC_BUFF_ADDR64_8710B(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) - -#define SET_RX_STATUS_DESC_BUFF_ADDR_8710B(__pRxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) - - -/* Dword 0, rsvd: bit26, bit28 */ -#define GET_TX_DESC_OWN_8710B(__pTxDesc)\ - LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) - -#define SET_TX_DESC_PKT_SIZE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -#define SET_TX_DESC_OFFSET_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -#define SET_TX_DESC_BMC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -#define SET_TX_DESC_HTC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -#define SET_TX_DESC_AMSDU_PAD_EN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -#define SET_TX_DESC_NO_ACM_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -#define SET_TX_DESC_GF_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) - -/* Dword 1 */ -#define SET_TX_DESC_MACID_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -#define SET_TX_DESC_QUEUE_SEL_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -#define SET_TX_DESC_RDG_NAV_EXT_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -#define SET_TX_DESC_LSIG_TXOP_EN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -#define SET_TX_DESC_PIFS_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -#define SET_TX_DESC_RATE_ID_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -#define SET_TX_DESC_EN_DESC_ID_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -#define SET_TX_DESC_SEC_TYPE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -#define SET_TX_DESC_PKT_OFFSET_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -#define SET_TX_DESC_MORE_DATA_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) - -/* Dword 2 remove P_AID, G_ID field*/ -#define SET_TX_DESC_CCA_RTS_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -#define SET_TX_DESC_AGG_ENABLE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -#define SET_TX_DESC_RDG_ENABLE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -#define SET_TX_DESC_NULL0_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -#define SET_TX_DESC_NULL1_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -#define SET_TX_DESC_BK_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -#define SET_TX_DESC_MORE_FRAG_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -#define SET_TX_DESC_RAW_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -#define SET_TX_DESC_CCX_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -#define SET_TX_DESC_AMPDU_DENSITY_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -#define SET_TX_DESC_BT_INT_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -#define SET_TX_DESC_FTM_EN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value) - -/* Dword 3 */ -#define SET_TX_DESC_NAV_USE_HDR_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) -#define SET_TX_DESC_HWSEQ_SEL_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -#define SET_TX_DESC_USE_RATE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -#define SET_TX_DESC_DISABLE_RTS_FB_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -#define SET_TX_DESC_DISABLE_FB_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -#define SET_TX_DESC_CTS2SELF_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -#define SET_TX_DESC_RTS_ENABLE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -#define SET_TX_DESC_HW_RTS_ENABLE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -#define SET_TX_DESC_PORT_ID_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 2, __Value) -#define SET_TX_DESC_USE_MAX_LEN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -#define SET_TX_DESC_MAX_AGG_NUM_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -#define SET_TX_DESC_AMPDU_MAX_TIME_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) - -/* Dword 4 */ -#define SET_TX_DESC_TX_RATE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -#define SET_TX_DESC_TX_TRY_RATE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -#define SET_TX_DESC_DATA_RETRY_LIMIT_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -#define SET_TX_DESC_RTS_RATE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -#define SET_TX_DESC_PCTS_EN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -#define SET_TX_DESC_PCTS_MASK_IDX_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) - -/* Dword 5 */ -#define SET_TX_DESC_DATA_SC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -#define SET_TX_DESC_DATA_SHORT_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -#define SET_TX_DESC_DATA_BW_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -#define SET_TX_DESC_DATA_STBC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -#define SET_TX_DESC_RTS_STBC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -#define SET_TX_DESC_RTS_SHORT_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -#define SET_TX_DESC_RTS_SC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -#define SET_TX_DESC_PATH_A_EN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) -#define SET_TX_DESC_TXPWR_OF_SET_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) - -/* Dword 6 */ -#define SET_TX_DESC_SW_DEFINE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -#define SET_TX_DESC_MBSSID_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -#define SET_TX_DESC_RF_SEL_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) - -/* Dword 7 */ -#ifdef CONFIG_PCI_HCI -#define SET_TX_DESC_TX_BUFFER_SIZE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#ifdef CONFIG_USB_HCI -#define SET_TX_DESC_TX_DESC_CHECKSUM_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#ifdef CONFIG_SDIO_HCI -#define SET_TX_DESC_TX_TIMESTAMP_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) -#endif - -#define SET_TX_DESC_USB_TXAGG_NUM_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - -/* Dword 8 */ -#define SET_TX_DESC_RTS_RC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -#define SET_TX_DESC_BAR_RC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -#define SET_TX_DESC_DATA_RC_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -#define SET_TX_DESC_HWSEQ_EN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -#define SET_TX_DESC_NEXTHEADPAGE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -#define SET_TX_DESC_TAILPAGE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) - -/* Dword 9 */ -#define SET_TX_DESC_PADDING_LEN_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -#define SET_TX_DESC_SEQ_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -#define SET_TX_DESC_FINAL_DATA_RATE_8710B(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) - - -#define SET_EARLYMODE_PKTNUM_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -#define SET_EARLYMODE_LEN0_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -#define SET_EARLYMODE_LEN1_1_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -#define SET_EARLYMODE_LEN1_2_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -#define SET_EARLYMODE_LEN2_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -#define SET_EARLYMODE_LEN3_8710B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) - - -/*-----------------------------------------------------------------*/ -/* RTL8710B TX BUFFER DESC */ -/*-----------------------------------------------------------------*/ -#ifdef CONFIG_64BIT_DMA - #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) - #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) - #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) - #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -#else - #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) - #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) - #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) - #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ -#endif -/* ********************************************************* */ - -/* 64 bits -- 32 bits */ -/* ======= ======= */ -/* Dword 0 0 */ -#define SET_TX_BUFF_DESC_LEN_0_8710B(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -#define SET_TX_BUFF_DESC_PSB_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -#define SET_TX_BUFF_DESC_OWN_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) - -/* Dword 1 1 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -#define GET_TX_BUFF_DESC_ADDR_LOW_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -/* Dword 2 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) -#ifdef CONFIG_64BIT_DMA - #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -#else - #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8710B(__pTxDesc) 0 -#endif -/* Dword 3 NA */ -/* RESERVED 0 */ -/* Dword 4 2 */ -#define SET_TX_BUFF_DESC_LEN_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) -#define SET_TX_BUFF_DESC_AMSDU_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 5 3 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 6 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 7 NA */ -/*RESERVED 0 */ -/* Dword 8 4 */ -#define SET_TX_BUFF_DESC_LEN_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) -#define SET_TX_BUFF_DESC_AMSDU_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 9 5 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 10 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 11 NA */ -/*RESERVED 0 */ -/* Dword 12 6 */ -#define SET_TX_BUFF_DESC_LEN_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) -#define SET_TX_BUFF_DESC_AMSDU_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 13 7 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 14 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8710B(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 15 NA */ -/*RESERVED 0 */ - - -#endif -/* ----------------------------------------------------------- - * - * Rate - * - * ----------------------------------------------------------- - * CCK Rates, TxHT = 0 */ -#define DESC8710B_RATE1M 0x00 -#define DESC8710B_RATE2M 0x01 -#define DESC8710B_RATE5_5M 0x02 -#define DESC8710B_RATE11M 0x03 - -/* OFDM Rates, TxHT = 0 */ -#define DESC8710B_RATE6M 0x04 -#define DESC8710B_RATE9M 0x05 -#define DESC8710B_RATE12M 0x06 -#define DESC8710B_RATE18M 0x07 -#define DESC8710B_RATE24M 0x08 -#define DESC8710B_RATE36M 0x09 -#define DESC8710B_RATE48M 0x0a -#define DESC8710B_RATE54M 0x0b - -/* MCS Rates, TxHT = 1 */ -#define DESC8710B_RATEMCS0 0x0c -#define DESC8710B_RATEMCS1 0x0d -#define DESC8710B_RATEMCS2 0x0e -#define DESC8710B_RATEMCS3 0x0f -#define DESC8710B_RATEMCS4 0x10 -#define DESC8710B_RATEMCS5 0x11 -#define DESC8710B_RATEMCS6 0x12 -#define DESC8710B_RATEMCS7 0x13 -#define DESC8710B_RATEMCS8 0x14 -#define DESC8710B_RATEMCS9 0x15 -#define DESC8710B_RATEMCS10 0x16 -#define DESC8710B_RATEMCS11 0x17 -#define DESC8710B_RATEMCS12 0x18 -#define DESC8710B_RATEMCS13 0x19 -#define DESC8710B_RATEMCS14 0x1a -#define DESC8710B_RATEMCS15 0x1b -#define DESC8710B_RATEVHTSS1MCS0 0x2c -#define DESC8710B_RATEVHTSS1MCS1 0x2d -#define DESC8710B_RATEVHTSS1MCS2 0x2e -#define DESC8710B_RATEVHTSS1MCS3 0x2f -#define DESC8710B_RATEVHTSS1MCS4 0x30 -#define DESC8710B_RATEVHTSS1MCS5 0x31 -#define DESC8710B_RATEVHTSS1MCS6 0x32 -#define DESC8710B_RATEVHTSS1MCS7 0x33 -#define DESC8710B_RATEVHTSS1MCS8 0x34 -#define DESC8710B_RATEVHTSS1MCS9 0x35 -#define DESC8710B_RATEVHTSS2MCS0 0x36 -#define DESC8710B_RATEVHTSS2MCS1 0x37 -#define DESC8710B_RATEVHTSS2MCS2 0x38 -#define DESC8710B_RATEVHTSS2MCS3 0x39 -#define DESC8710B_RATEVHTSS2MCS4 0x3a -#define DESC8710B_RATEVHTSS2MCS5 0x3b -#define DESC8710B_RATEVHTSS2MCS6 0x3c -#define DESC8710B_RATEVHTSS2MCS7 0x3d -#define DESC8710B_RATEVHTSS2MCS8 0x3e -#define DESC8710B_RATEVHTSS2MCS9 0x3f - - -#define RX_HAL_IS_CCK_RATE_8710B(pDesc)\ - (GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE1M || \ - GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE2M || \ - GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE5_5M || \ - GET_RX_STATUS_DESC_RX_RATE_8710B(pDesc) == DESC8710B_RATE11M) - -#ifdef CONFIG_TRX_BD_ARCH - struct tx_desc; -#endif - -void rtl8710b_cal_txdesc_chksum(struct tx_desc *ptxdesc); -void rtl8710b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -void rtl8710b_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8710b_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8710b_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8710b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); - -#if defined(CONFIG_CONCURRENT_MODE) - void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -#endif -void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8710bs_init_xmit_priv(PADAPTER padapter); - void rtl8710bs_free_xmit_priv(PADAPTER padapter); - s32 rtl8710bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8710bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8710bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8710bs_xmit_buf_handler(PADAPTER padapter); - thread_return rtl8710bs_xmit_thread(thread_context context); - #define hal_xmit_handler rtl8710bs_xmit_buf_handler -#endif - -#ifdef CONFIG_USB_HCI - s32 rtl8710bu_xmit_buf_handler(PADAPTER padapter); - #define hal_xmit_handler rtl8710bu_xmit_buf_handler - s32 rtl8710bu_init_xmit_priv(PADAPTER padapter); - void rtl8710bu_free_xmit_priv(PADAPTER padapter); - s32 rtl8710bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8710bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8710bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8710bu_xmit_tasklet(void *priv); - s32 rtl8710bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); - void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8710be_init_xmit_priv(PADAPTER padapter); - void rtl8710be_free_xmit_priv(PADAPTER padapter); - struct xmit_buf *rtl8710be_dequeue_xmitbuf(struct rtw_tx_ring *ring); - void rtl8710be_xmitframe_resume(_adapter *padapter); - s32 rtl8710be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8710be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8710be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8710be_xmit_tasklet(void *priv); -#endif - -u8 BWMapping_8710B(PADAPTER Adapter, struct pkt_attrib *pattrib); -u8 SCMapping_8710B(PADAPTER Adapter, struct pkt_attrib *pattrib); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_cmd.h deleted file mode 100644 index 4f542da88191ee..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_cmd.h +++ /dev/null @@ -1,205 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_CMD_H__ -#define __RTL8723B_CMD_H__ - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ - * --------------------------------------------------------------------------------------------------------- */ - -enum h2c_cmd_8723B { - /* Common Class: 000 */ - H2C_8723B_RSVD_PAGE = 0x00, - H2C_8723B_MEDIA_STATUS_RPT = 0x01, - H2C_8723B_SCAN_ENABLE = 0x02, - H2C_8723B_KEEP_ALIVE = 0x03, - H2C_8723B_DISCON_DECISION = 0x04, - H2C_8723B_PSD_OFFLOAD = 0x05, - H2C_8723B_AP_OFFLOAD = 0x08, - H2C_8723B_BCN_RSVDPAGE = 0x09, - H2C_8723B_PROBERSP_RSVDPAGE = 0x0A, - H2C_8723B_FCS_RSVDPAGE = 0x10, - H2C_8723B_FCS_INFO = 0x11, - H2C_8723B_AP_WOW_GPIO_CTRL = 0x13, - - /* PoweSave Class: 001 */ - H2C_8723B_SET_PWR_MODE = 0x20, - H2C_8723B_PS_TUNING_PARA = 0x21, - H2C_8723B_PS_TUNING_PARA2 = 0x22, - H2C_8723B_P2P_LPS_PARAM = 0x23, - H2C_8723B_P2P_PS_OFFLOAD = 0x24, - H2C_8723B_PS_SCAN_ENABLE = 0x25, - H2C_8723B_SAP_PS_ = 0x26, - H2C_8723B_INACTIVE_PS_ = 0x27, /* Inactive_PS */ - H2C_8723B_FWLPS_IN_IPS_ = 0x28, - - /* Dynamic Mechanism Class: 010 */ - H2C_8723B_MACID_CFG = 0x40, - H2C_8723B_TXBF = 0x41, - H2C_8723B_RSSI_SETTING = 0x42, - H2C_8723B_AP_REQ_TXRPT = 0x43, - H2C_8723B_INIT_RATE_COLLECT = 0x44, - H2C_8723B_RA_PARA_ADJUST = 0x46, - - /* BT Class: 011 */ - H2C_8723B_B_TYPE_TDMA = 0x60, - H2C_8723B_BT_INFO = 0x61, - H2C_8723B_FORCE_BT_TXPWR = 0x62, - H2C_8723B_BT_IGNORE_WLANACT = 0x63, - H2C_8723B_DAC_SWING_VALUE = 0x64, - H2C_8723B_ANT_SEL_RSV = 0x65, - H2C_8723B_WL_OPMODE = 0x66, - H2C_8723B_BT_MP_OPER = 0x67, - H2C_8723B_BT_CONTROL = 0x68, - H2C_8723B_BT_WIFI_CTRL = 0x69, - H2C_8723B_BT_FW_PATCH = 0x6A, - H2C_8723B_BT_WLAN_CALIBRATION = 0x6D, - - /* WOWLAN Class: 100 */ - H2C_8723B_WOWLAN = 0x80, - H2C_8723B_REMOTE_WAKE_CTRL = 0x81, - H2C_8723B_AOAC_GLOBAL_INFO = 0x82, - H2C_8723B_AOAC_RSVD_PAGE = 0x83, - H2C_8723B_AOAC_RSVD_PAGE2 = 0x84, - H2C_8723B_D0_SCAN_OFFLOAD_CTRL = 0x85, - H2C_8723B_D0_SCAN_OFFLOAD_INFO = 0x86, - H2C_8723B_CHNL_SWITCH_OFFLOAD = 0x87, - H2C_8723B_P2P_OFFLOAD_RSVD_PAGE = 0x8A, - H2C_8723B_P2P_OFFLOAD = 0x8B, - - H2C_8723B_RESET_TSF = 0xC0, - H2C_8723B_MAXID, -}; - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- - * _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723B_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_8723B_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8723B_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8723B_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -/* _KEEP_ALIVE_CMD_0x03 */ -#define SET_8723B_H2CCMD_KEEPALIVE_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8723B_H2CCMD_KEEPALIVE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8723B_H2CCMD_KEEPALIVE_PARM_PKT_TYPE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) -#define SET_8723B_H2CCMD_KEEPALIVE_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _DISCONNECT_DECISION_CMD_0x04 */ -#define SET_8723B_H2CCMD_DISCONDECISION_PARM_ENABLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) -#define SET_8723B_H2CCMD_DISCONDECISION_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) -#define SET_8723B_H2CCMD_DISCONDECISION_PARM_CHECK_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8723B_H2CCMD_DISCONDECISION_PARM_TRY_PKT_NUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) - -/* _PWR_MOD_CMD_0x20 */ -#define SET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723B_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -#define SET_8723B_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -#define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8723B_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8723B_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -#define SET_8723B_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -#define GET_8723B_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) - -/* _PS_TUNE_PARAM_CMD_0x21 */ -#define SET_8723B_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8723B_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -#define SET_8723B_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -#define SET_8723B_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _MACID_CFG_CMD_0x40 */ -#define SET_8723B_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -#define SET_8723B_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) - -/* _RSSI_SETTING_CMD_0x42 */ -#define SET_8723B_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723B_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -#define SET_8723B_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _AP_REQ_TXRPT_CMD_0x43 */ -#define SET_8723B_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723B_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _FORCE_BT_TXPWR_CMD_0x62 */ -#define SET_8723B_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - -/* _FORCE_BT_MP_OPER_CMD_0x67 */ -#define SET_8723B_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -#define SET_8723B_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -#define SET_8723B_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8723B_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -#define SET_8723B_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8723B_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) - -/* _BT_FW_PATCH_0x6A */ -#define SET_8723B_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) -#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8723B_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) - -/* --------------------------------------------------------------------------------------------------------- - * ------------------------------------------- Structure -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- Function Statement -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - -/* host message to firmware cmd */ -void rtl8723b_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8723b_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -void rtl8723b_fw_try_ap_cmd(PADAPTER padapter, u32 need_ack); -/* s32 rtl8723b_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -void rtl8723b_set_FwPsTuneParam_cmd(PADAPTER padapter); -void rtl8723b_set_FwBtMpOper_cmd(PADAPTER padapter, u8 idx, u8 ver, u8 reqnum, u8 *param); -void rtl8723b_download_rsvd_page(PADAPTER padapter, u8 mstatus); -#ifdef CONFIG_BT_COEXIST - void rtl8723b_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -#endif /* CONFIG_BT_COEXIST */ -#ifdef CONFIG_P2P - void rtl8723b_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -#ifdef CONFIG_TDLS - #ifdef CONFIG_TDLS_CH_SW - void rtl8723b_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); - #endif -#endif - -#ifdef CONFIG_P2P_WOWLAN - void rtl8723b_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -#endif - -void rtl8723b_set_FwPwrModeInIPS_cmd(PADAPTER padapter, u8 cmd_param); - -s32 FillH2CCmd8723B(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -u8 GetTxBufferRsvdPageNum8723B(_adapter *padapter, bool wowlan); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_dm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_dm.h deleted file mode 100644 index ea517175f0bd56..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_dm.h +++ /dev/null @@ -1,38 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_DM_H__ -#define __RTL8723B_DM_H__ -/* ************************************************************ - * Description: - * - * This file is for 8723B dynamic mechanism only - * - * - * ************************************************************ */ - -/* ************************************************************ - * structure and define - * ************************************************************ */ - -/* ************************************************************ - * function prototype - * ************************************************************ */ - -void rtl8723b_init_dm_priv(PADAPTER padapter); -void rtl8723b_deinit_dm_priv(PADAPTER padapter); - -void rtl8723b_InitHalDm(PADAPTER padapter); -void rtl8723b_HalDmWatchDog(PADAPTER padapter); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_hal.h deleted file mode 100755 index 5ab8b35f74ecbd..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_hal.h +++ /dev/null @@ -1,274 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_HAL_H__ -#define __RTL8723B_HAL_H__ - -#include "hal_data.h" - -#include "rtl8723b_spec.h" -#include "rtl8723b_rf.h" -#include "rtl8723b_dm.h" -#include "rtl8723b_recv.h" -#include "rtl8723b_xmit.h" -#include "rtl8723b_cmd.h" -#include "rtl8723b_led.h" -#include "Hal8723BPwrSeq.h" -#include "Hal8723BPhyReg.h" -#include "Hal8723BPhyCfg.h" -#ifdef DBG_CONFIG_ERROR_DETECT - #include "rtl8723b_sreset.h" -#endif - -#define FW_8723B_SIZE 0x8000 -#define FW_8723B_START_ADDRESS 0x1000 -#define FW_8723B_END_ADDRESS 0x1FFF /* 0x5FFF */ - -#define IS_FW_HEADER_EXIST_8723B(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x5300) - -typedef struct _RT_FIRMWARE { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[FW_8723B_SIZE]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8723B, *PRT_FIRMWARE_8723B; - -/* - * This structure must be cared byte-ordering - * - * Added by tynli. 2009.12.04. */ -typedef struct _RT_8723B_FIRMWARE_HDR { - /* 8-byte alinment required */ - - /* --- LONG WORD 0 ---- */ - u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ - u8 Category; /* AP/NIC and USB/PCI */ - u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ - u16 Version; /* FW Version */ - u16 Subversion; /* FW Subversion, default 0x00 */ - - /* --- LONG WORD 1 ---- */ - u8 Month; /* Release time Month field */ - u8 Date; /* Release time Date field */ - u8 Hour; /* Release time Hour field */ - u8 Minute; /* Release time Minute field */ - u16 RamCodeSize; /* The size of RAM code */ - u16 Rsvd2; - - /* --- LONG WORD 2 ---- */ - u32 SvnIdx; /* The SVN entry index */ - u32 Rsvd3; - - /* --- LONG WORD 3 ---- */ - u32 Rsvd4; - u32 Rsvd5; -} RT_8723B_FIRMWARE_HDR, *PRT_8723B_FIRMWARE_HDR; - -#define DRIVER_EARLY_INT_TIME_8723B 0x05 -#define BCN_DMA_ATIME_INT_TIME_8723B 0x02 - -/* for 8723B - * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -#define PAGE_SIZE_TX_8723B 128 -#define PAGE_SIZE_RX_8723B 8 - -#define TX_DMA_SIZE_8723B 0x8000 /* 32K(TX) */ -#define RX_DMA_SIZE_8723B 0x4000 /* 16K(RX) */ - -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#ifdef CONFIG_FW_C2H_DEBUG - #define RX_DMA_RESERVED_SIZE_8723B 0x100 /* 256B, reserved for c2h debug message */ -#else - #define RX_DMA_RESERVED_SIZE_8723B 0x80 /* 128B, reserved for tx report */ -#endif -#define RX_DMA_BOUNDARY_8723B (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B - 1) - - -/* Note: We will divide number of page equally for each queue other than public queue! */ - -/* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723B - * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ -#define BCNQ_PAGE_NUM_8723B (MAX_BEACON_LEN / PAGE_SIZE_TX_8723B + 6) /*0x08*/ - - -/* For WoWLan , more reserved page - * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt: 1,PNO: 6 - * NS offload: 2 NDP info: 1 - */ -#ifdef CONFIG_WOWLAN - #define WOWLAN_PAGE_NUM_8723B 0x0b -#else - #define WOWLAN_PAGE_NUM_8723B 0x00 -#endif - -#ifdef CONFIG_PNO_SUPPORT - #undef WOWLAN_PAGE_NUM_8723B - #define WOWLAN_PAGE_NUM_8723B 0x15 -#endif - -#ifdef CONFIG_AP_WOWLAN - #define AP_WOWLAN_PAGE_NUM_8723B 0x02 -#endif - -#define TX_TOTAL_PAGE_NUMBER_8723B (0xFF - BCNQ_PAGE_NUM_8723B - WOWLAN_PAGE_NUM_8723B) -#define TX_PAGE_BOUNDARY_8723B (TX_TOTAL_PAGE_NUMBER_8723B + 1) - -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B TX_TOTAL_PAGE_NUMBER_8723B -#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723B (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723B + 1) - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723B */ -#define NORMAL_PAGE_NUM_HPQ_8723B 0x0C -#define NORMAL_PAGE_NUM_LPQ_8723B 0x02 -#define NORMAL_PAGE_NUM_NPQ_8723B 0x02 -#define NORMAL_PAGE_NUM_EPQ_8723B 0x04 - -/* Note: For Normal Chip Setting, modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_8723B 0x30 -#define WMM_NORMAL_PAGE_NUM_LPQ_8723B 0x20 -#define WMM_NORMAL_PAGE_NUM_NPQ_8723B 0x20 -#define WMM_NORMAL_PAGE_NUM_EPQ_8723B 0x00 - - -#include "HalVerDef.h" -#include "hal_com.h" - -#define EFUSE_OOB_PROTECT_BYTES 15 - -#define HAL_EFUSE_MEMORY - -#define HWSET_MAX_SIZE_8723B 512 -#define EFUSE_REAL_CONTENT_LEN_8723B 512 -#define EFUSE_MAP_LEN_8723B 512 -#define EFUSE_MAX_SECTION_8723B 64 - -#define EFUSE_IC_ID_OFFSET 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ -#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723B) - -#define EFUSE_ACCESS_ON 0x69 /* For RTL8723 only. */ -#define EFUSE_ACCESS_OFF 0x00 /* For RTL8723 only. */ - -/* ******************************************************** - * EFUSE for BT definition - * ******************************************************** */ -#define EFUSE_BT_REAL_BANK_CONTENT_LEN 512 -#define EFUSE_BT_REAL_CONTENT_LEN 1536 /* 512*3 */ -#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -#define EFUSE_BT_MAX_SECTION 128 /* 1024/8 */ - -#define EFUSE_PROTECT_BYTES_BANK 16 - -typedef enum tag_Package_Definition { - PACKAGE_DEFAULT, - PACKAGE_QFN68, - PACKAGE_TFBGA90, - PACKAGE_TFBGA80, - PACKAGE_TFBGA79 -} PACKAGE_TYPE_E; - -#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -/* rtl8723a_hal_init.c */ -s32 rtl8723b_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -void rtl8723b_FirmwareSelfReset(PADAPTER padapter); -void rtl8723b_InitializeFirmwareVars(PADAPTER padapter); - -void rtl8723b_InitAntenna_Selection(PADAPTER padapter); -void rtl8723b_DeinitAntenna_Selection(PADAPTER padapter); -void rtl8723b_CheckAntenna_Selection(PADAPTER padapter); -void rtl8723b_init_default_value(PADAPTER padapter); - -s32 rtl8723b_InitLLTTable(PADAPTER padapter); - -s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -s32 CardDisableWithoutHWSM(PADAPTER padapter); - -/* EFuse */ -u8 GetEEPROMSize8723B(PADAPTER padapter); -void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -void Hal_EfuseParseTxPowerInfo_8723B(PADAPTER padapter, u8 *PROMContent, BOOLEAN AutoLoadFail); -void Hal_EfuseParseBTCoexistInfo_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseEEPROMVer_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseChnlPlan_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseCustomerID_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseAntennaDiversity_8723B(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseXtal_8723B(PADAPTER pAdapter, u8 *hwinfo, u8 AutoLoadFail); -void Hal_EfuseParseThermalMeter_8723B(PADAPTER padapter, u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParsePackageType_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseVoltage_8723B(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseBoardType_8723B(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); - -void rtl8723b_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8723b(_adapter *adapter); -u8 SetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); -void GetHwReg8723B(PADAPTER padapter, u8 variable, u8 *val); -u8 SetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -u8 GetHalDefVar8723B(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); - -/* register */ -void rtl8723b_InitBeaconParameters(PADAPTER padapter); -void rtl8723b_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -void _InitBurstPktLen_8723BS(PADAPTER Adapter); -void _8051Reset8723(PADAPTER padapter); -#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) - void Hal_DetectWoWMode(PADAPTER pAdapter); -#endif /* CONFIG_WOWLAN */ - -void rtl8723b_start_thread(_adapter *padapter); -void rtl8723b_stop_thread(_adapter *padapter); - -#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) - void rtl8723bs_init_checkbthang_workqueue(_adapter *adapter); - void rtl8723bs_free_checkbthang_workqueue(_adapter *adapter); - void rtl8723bs_cancle_checkbthang_workqueue(_adapter *adapter); - void rtl8723bs_hal_check_bt_hang(_adapter *adapter); -#endif - -#ifdef CONFIG_GPIO_WAKEUP - void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -#endif -#ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -#endif -void CCX_FwC2HTxRpt_8723b(PADAPTER padapter, u8 *pdata, u8 len); - -u8 MRateToHwRate8723B(u8 rate); -u8 HwRateToMRate8723B(u8 rate); - -#ifdef CONFIG_RF_POWER_TRIM - void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); -#endif /*CONFIG_RF_POWER_TRIM*/ - -#ifdef CONFIG_PCI_HCI - BOOLEAN InterruptRecognized8723BE(PADAPTER Adapter); - VOID UpdateInterruptMask8723BE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -#endif - -#ifdef CONFIG_GPIO_API -int rtl8723b_GpioFuncCheck(PADAPTER adapter, u8 gpio_num); -VOID rtl8723b_GpioMultiFuncReset(PADAPTER adapter, u8 gpio_num); -#endif - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_led.h deleted file mode 100755 index 6b772cceb7ecb2..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_led.h +++ /dev/null @@ -1,44 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_LED_H__ -#define __RTL8723B_LED_H__ - -#include -#include -#include - -#ifdef CONFIG_RTW_SW_LED -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI - void rtl8723bu_InitSwLeds(PADAPTER padapter); - void rtl8723bu_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_SDIO_HCI - void rtl8723bs_InitSwLeds(PADAPTER padapter); - void rtl8723bs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_GSPI_HCI - void rtl8723bs_InitSwLeds(PADAPTER padapter); - void rtl8723bs_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_PCI_HCI - void rtl8723be_InitSwLeds(PADAPTER padapter); - void rtl8723be_DeInitSwLeds(PADAPTER padapter); -#endif - -#endif -#endif/*CONFIG_RTW_SW_LED*/ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_recv.h deleted file mode 100755 index cf5e18b6661334..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_recv.h +++ /dev/null @@ -1,86 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_RECV_H__ -#define __RTL8723B_RECV_H__ - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ - -#elif defined(CONFIG_PCI_HCI) - /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ - /* #define MAX_RECVBUF_SZ (9100) */ - /* #else */ - #define MAX_RECVBUF_SZ (4000) /* about 4K - * #endif */ - - -#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - - #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) - -#endif - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -#ifdef CONFIG_SDIO_HCI - #ifndef CONFIG_SDIO_RX_COPY - #undef MAX_RECVBUF_SZ - #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723B - RX_DMA_RESERVED_SIZE_8723B) - #endif /* !CONFIG_SDIO_RX_COPY */ -#endif /* CONFIG_SDIO_HCI */ - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8723bs_init_recv_priv(PADAPTER padapter); - void rtl8723bs_free_recv_priv(PADAPTER padapter); -#endif - -#ifdef CONFIG_USB_HCI - int rtl8723bu_init_recv_priv(_adapter *padapter); - void rtl8723bu_free_recv_priv(_adapter *padapter); - void rtl8723bu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8723be_init_recv_priv(PADAPTER padapter); - void rtl8723be_free_recv_priv(PADAPTER padapter); -#endif - -void rtl8723b_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); - -#endif /* __RTL8723B_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_rf.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_rf.h deleted file mode 100644 index 6325ad5b8358a7..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_rf.h +++ /dev/null @@ -1,25 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_RF_H__ -#define __RTL8723B_RF_H__ - -int PHY_RF6052_Config8723B(IN PADAPTER Adapter); - -VOID -PHY_RF6052SetBandwidth8723B( - IN PADAPTER Adapter, - IN enum channel_width Bandwidth); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_spec.h deleted file mode 100755 index b0fb4aa41d1753..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_spec.h +++ /dev/null @@ -1,280 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_SPEC_H__ -#define __RTL8723B_SPEC_H__ - -#include - - -#define HAL_NAV_UPPER_UNIT_8723B 128 /* micro-second */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_RSV_CTRL_8723B 0x001C /* 3 Byte */ -#define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038 -#define REG_HSISR_8723B 0x005c -#define REG_PAD_CTRL1_8723B 0x0064 -#define REG_AFE_CTRL_4_8723B 0x0078 -#define REG_HMEBOX_DBG_0_8723B 0x0088 -#define REG_HMEBOX_DBG_1_8723B 0x008A -#define REG_HMEBOX_DBG_2_8723B 0x008C -#define REG_HMEBOX_DBG_3_8723B 0x008E -#define REG_HIMR0_8723B 0x00B0 -#define REG_HISR0_8723B 0x00B4 -#define REG_HIMR1_8723B 0x00B8 -#define REG_HISR1_8723B 0x00BC -#define REG_PMC_DBG_CTRL2_8723B 0x00CC - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_C2HEVT_CMD_ID_8723B 0x01A0 -#define REG_C2HEVT_CMD_LEN_8723B 0x01AE -#define REG_WOWLAN_WAKE_REASON 0x01C7 -#define REG_WOWLAN_GTK_DBG1 0x630 -#define REG_WOWLAN_GTK_DBG2 0x634 - -#define REG_HMEBOX_EXT0_8723B 0x01F0 -#define REG_HMEBOX_EXT1_8723B 0x01F4 -#define REG_HMEBOX_EXT2_8723B 0x01F8 -#define REG_HMEBOX_EXT3_8723B 0x01FC - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RXDMA_CONTROL_8723B 0x0286 /* Control the RX DMA. */ -#define REG_RXDMA_MODE_CTRL_8723B 0x0290 - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_CTRL_REG_8723B 0x0300 -#define REG_INT_MIG_8723B 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_DESA_8723B 0x0308 /* TX Beacon Descriptor Address */ -#define REG_HQ_DESA_8723B 0x0310 /* TX High Queue Descriptor Address */ -#define REG_MGQ_DESA_8723B 0x0318 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_DESA_8723B 0x0320 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_DESA_8723B 0x0328 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_DESA_8723B 0x0330 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_DESA_8723B 0x0338 /* TX BK Queue Descriptor Address */ -#define REG_RX_DESA_8723B 0x0340 /* RX Queue Descriptor Address */ -#define REG_DBI_WDATA_8723B 0x0348 /* DBI Write Data */ -#define REG_DBI_RDATA_8723B 0x034C /* DBI Read Data */ -#define REG_DBI_ADDR_8723B 0x0350 /* DBI Address */ -#define REG_DBI_FLAG_8723B 0x0352 /* DBI Read/Write Flag */ -#define REG_MDIO_WDATA_8723B 0x0354 /* MDIO for Write PCIE PHY */ -#define REG_MDIO_RDATA_8723B 0x0356 /* MDIO for Reads PCIE PHY */ -#define REG_MDIO_CTL_8723B 0x0358 /* MDIO for Control */ -#define REG_DBG_SEL_8723B 0x0360 /* Debug Selection Register */ -#define REG_PCIE_HRPWM_8723B 0x0361 /* PCIe RPWM */ -#define REG_PCIE_HCPWM_8723B 0x0363 /* PCIe CPWM */ -#define REG_PCIE_MULTIFET_CTRL_8723B 0x036A /* PCIE Multi-Fethc Control */ - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425 -#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D -#ifdef CONFIG_WOWLAN - #define REG_TXPKTBUF_IV_LOW 0x0484 - #define REG_TXPKTBUF_IV_HIGH 0x0488 -#endif -#define REG_AMPDU_BURST_MODE_8723B 0x04BC - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ -#define REG_SECONDARY_CCA_CTRL_8723B 0x0577 - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ - - -/* ************************************************************ - * SDIO Bus Specification - * ************************************************************ */ - -/* ----------------------------------------------------- - * SDIO CMD Address Mapping - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * I/O bus domain (Host) - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * SDIO register - * ----------------------------------------------------- */ -#define SDIO_REG_HCPWM1_8723B 0x025 /* HCI Current Power Mode 1 */ - - -/* **************************************************************************** - * 8723 Regsiter Bit and Content definition - * **************************************************************************** */ - -/* 2 HSISR - * interrupt mask which needs to clear */ -#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ - HSISR_SPS_OCP_INT |\ - HSISR_RON_INT |\ - HSISR_PDNINT |\ - HSISR_GPIO9_INT) - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#undef IS_E_CUT -#define IS_E_CUT(version) FALSE -#undef IS_F_CUT -#define IS_F_CUT(version) ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? TRUE : FALSE) - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define BIT_USB_RXDMA_AGG_EN BIT(31) -#define RXDMA_AGG_MODE_EN BIT(1) - -#ifdef CONFIG_WOWLAN - #define RXPKT_RELEASE_POLL BIT(16) - #define RXDMA_IDLE BIT(17) - #define RW_RELEASE_EN BIT(18) -#endif - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ - -/* ---------------------------------------------------------------------------- - * 8723B REG_CCK_CHECK (offset 0x454) - * ---------------------------------------------------------------------------- */ -#define BIT_BCN_PORT_SEL BIT(5) - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ -#ifdef CONFIG_RF_POWER_TRIM - - #ifdef CONFIG_RTL8723B - #define EEPROM_RF_GAIN_OFFSET 0xC1 - #endif - - #define EEPROM_RF_GAIN_VAL 0x1F6 -#endif /*CONFIG_RF_POWER_TRIM*/ - - -/* ---------------------------------------------------------------------------- - * 8195 IMR/ISR bits (offset 0xB0, 8bits) - * ---------------------------------------------------------------------------- */ -#define IMR_DISABLED_8723B 0 -/* IMR DW0(0x00B0-00B3) Bit 0-31 */ -#define IMR_TIMER2_8723B BIT(31) /* Timeout interrupt 2 */ -#define IMR_TIMER1_8723B BIT(30) /* Timeout interrupt 1 */ -#define IMR_PSTIMEOUT_8723B BIT(29) /* Power Save Time Out Interrupt */ -#define IMR_GTINT4_8723B BIT(28) /* When GTIMER4 expires, this bit is set to 1 */ -#define IMR_GTINT3_8723B BIT(27) /* When GTIMER3 expires, this bit is set to 1 */ -#define IMR_TXBCN0ERR_8723B BIT(26) /* Transmit Beacon0 Error */ -#define IMR_TXBCN0OK_8723B BIT(25) /* Transmit Beacon0 OK */ -#define IMR_TSF_BIT32_TOGGLE_8723B BIT(24) /* TSF Timer BIT(32) toggle indication interrupt */ -#define IMR_BCNDMAINT0_8723B BIT(20) /* Beacon DMA Interrupt 0 */ -#define IMR_BCNDERR0_8723B BIT(16) /* Beacon Queue DMA OK0 */ -#define IMR_HSISR_IND_ON_INT_8723B BIT(15) /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */ -#define IMR_BCNDMAINT_E_8723B BIT(14) /* Beacon DMA Interrupt Extension for Win7 */ -#define IMR_ATIMEND_8723B BIT(12) /* CTWidnow End or ATIM Window End */ -#define IMR_C2HCMD_8723B BIT(10) /* CPU to Host Command INT Status, Write 1 clear */ -#define IMR_CPWM2_8723B BIT(9) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_CPWM_8723B BIT(8) /* CPU power Mode exchange INT Status, Write 1 clear */ -#define IMR_HIGHDOK_8723B BIT(7) /* High Queue DMA OK */ -#define IMR_MGNTDOK_8723B BIT(6) /* Management Queue DMA OK */ -#define IMR_BKDOK_8723B BIT(5) /* AC_BK DMA OK */ -#define IMR_BEDOK_8723B BIT(4) /* AC_BE DMA OK */ -#define IMR_VIDOK_8723B BIT(3) /* AC_VI DMA OK */ -#define IMR_VODOK_8723B BIT(2) /* AC_VO DMA OK */ -#define IMR_RDU_8723B BIT(1) /* Rx Descriptor Unavailable */ -#define IMR_ROK_8723B BIT(0) /* Receive DMA OK */ - -/* IMR DW1(0x00B4-00B7) Bit 0-31 */ -#define IMR_BCNDMAINT7_8723B BIT(27) /* Beacon DMA Interrupt 7 */ -#define IMR_BCNDMAINT6_8723B BIT(26) /* Beacon DMA Interrupt 6 */ -#define IMR_BCNDMAINT5_8723B BIT(25) /* Beacon DMA Interrupt 5 */ -#define IMR_BCNDMAINT4_8723B BIT(24) /* Beacon DMA Interrupt 4 */ -#define IMR_BCNDMAINT3_8723B BIT(23) /* Beacon DMA Interrupt 3 */ -#define IMR_BCNDMAINT2_8723B BIT(22) /* Beacon DMA Interrupt 2 */ -#define IMR_BCNDMAINT1_8723B BIT(21) /* Beacon DMA Interrupt 1 */ -#define IMR_BCNDOK7_8723B BIT(20) /* Beacon Queue DMA OK Interrupt 7 */ -#define IMR_BCNDOK6_8723B BIT(19) /* Beacon Queue DMA OK Interrupt 6 */ -#define IMR_BCNDOK5_8723B BIT(18) /* Beacon Queue DMA OK Interrupt 5 */ -#define IMR_BCNDOK4_8723B BIT(17) /* Beacon Queue DMA OK Interrupt 4 */ -#define IMR_BCNDOK3_8723B BIT(16) /* Beacon Queue DMA OK Interrupt 3 */ -#define IMR_BCNDOK2_8723B BIT(15) /* Beacon Queue DMA OK Interrupt 2 */ -#define IMR_BCNDOK1_8723B BIT(14) /* Beacon Queue DMA OK Interrupt 1 */ -#define IMR_ATIMEND_E_8723B BIT(13) /* ATIM Window End Extension for Win7 */ -#define IMR_TXERR_8723B BIT(11) /* Tx Error Flag Interrupt Status, write 1 clear. */ -#define IMR_RXERR_8723B BIT(10) /* Rx Error Flag INT Status, Write 1 clear */ -#define IMR_TXFOVW_8723B BIT(9) /* Transmit FIFO Overflow */ -#define IMR_RXFOVW_8723B BIT(8) /* Receive FIFO Overflow */ - -#ifdef CONFIG_PCI_HCI - /* #define IMR_RX_MASK (IMR_ROK_8723B|IMR_RDU_8723B|IMR_RXFOVW_8723B) */ - #define IMR_TX_MASK (IMR_VODOK_8723B | IMR_VIDOK_8723B | IMR_BEDOK_8723B | IMR_BKDOK_8723B | IMR_MGNTDOK_8723B | IMR_HIGHDOK_8723B) - - #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723B | IMR_TXBCN0OK_8723B | IMR_TXBCN0ERR_8723B | IMR_BCNDERR0_8723B) - - #define RT_AC_INT_MASKS (IMR_VIDOK_8723B | IMR_VODOK_8723B | IMR_BEDOK_8723B | IMR_BKDOK_8723B) -#endif - -#endif /* __RTL8723B_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_sreset.h deleted file mode 100644 index c97f2648ac60a8..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_sreset.h +++ /dev/null @@ -1,24 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8723B_SRESET_H_ -#define _RTL8723B_SRESET_H_ - -#include - -#ifdef DBG_CONFIG_ERROR_DETECT - extern void rtl8723b_sreset_xmit_status_check(_adapter *padapter); - extern void rtl8723b_sreset_linked_status_check(_adapter *padapter); -#endif -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_xmit.h deleted file mode 100755 index 22b3bacf779b6f..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723b_xmit.h +++ /dev/null @@ -1,335 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723B_XMIT_H__ -#define __RTL8723B_XMIT_H__ - - -#define MAX_TID (15) - - -#ifndef __INC_HAL8723BDESC_H - #define __INC_HAL8723BDESC_H - - #define RX_STATUS_DESC_SIZE_8723B 24 - #define RX_DRV_INFO_SIZE_UNIT_8723B 8 - - - /* DWORD 0 */ - #define SET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) - #define SET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) - #define SET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) - - #define GET_RX_STATUS_DESC_PKT_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) - #define GET_RX_STATUS_DESC_CRC32_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) - #define GET_RX_STATUS_DESC_ICV_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) - #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) - #define GET_RX_STATUS_DESC_SECURITY_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) - #define GET_RX_STATUS_DESC_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) - #define GET_RX_STATUS_DESC_SHIFT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) - #define GET_RX_STATUS_DESC_PHY_STATUS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) - #define GET_RX_STATUS_DESC_SWDEC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) - #define GET_RX_STATUS_DESC_LAST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 28, 1) - #define GET_RX_STATUS_DESC_FIRST_SEG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 29, 1) - #define GET_RX_STATUS_DESC_EOR_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) - #define GET_RX_STATUS_DESC_OWN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) - - /* DWORD 1 */ - #define GET_RX_STATUS_DESC_MACID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) - #define GET_RX_STATUS_DESC_TID_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) - #define GET_RX_STATUS_DESC_AMSDU_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) - #define GET_RX_STATUS_DESC_RXID_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) - #define GET_RX_STATUS_DESC_PAGGR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) - #define GET_RX_STATUS_DESC_A1_FIT_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) - #define GET_RX_STATUS_DESC_CHKERR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) - #define GET_RX_STATUS_DESC_IPVER_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) - #define GET_RX_STATUS_DESC_IS_TCPUDP__8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) - #define GET_RX_STATUS_DESC_CHK_VLD_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) - #define GET_RX_STATUS_DESC_PAM_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) - #define GET_RX_STATUS_DESC_PWR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) - #define GET_RX_STATUS_DESC_MORE_DATA_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) - #define GET_RX_STATUS_DESC_MORE_FRAG_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) - #define GET_RX_STATUS_DESC_TYPE_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) - #define GET_RX_STATUS_DESC_MC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) - #define GET_RX_STATUS_DESC_BC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) - - /* DWORD 2 */ - #define GET_RX_STATUS_DESC_SEQ_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) - #define GET_RX_STATUS_DESC_FRAG_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) - #define GET_RX_STATUS_DESC_RX_IS_QOS_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) - #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) - #define GET_RX_STATUS_DESC_RPT_SEL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) - - /* DWORD 3 */ - #define GET_RX_STATUS_DESC_RX_RATE_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) - #define GET_RX_STATUS_DESC_HTC_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) - #define GET_RX_STATUS_DESC_EOSP_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) - #define GET_RX_STATUS_DESC_BSSID_FIT_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) - #ifdef CONFIG_USB_RX_AGGREGATION - #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) - #endif - #define GET_RX_STATUS_DESC_PATTERN_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) - #define GET_RX_STATUS_DESC_UNICAST_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) - #define GET_RX_STATUS_DESC_MAGIC_MATCH_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) - - /* DWORD 6 */ - #define GET_RX_STATUS_DESC_SPLCP_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 1) - #define GET_RX_STATUS_DESC_LDPC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 1, 1) - #define GET_RX_STATUS_DESC_STBC_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 2, 1) - #define GET_RX_STATUS_DESC_BW_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+16, 4, 2) - - /* DWORD 5 */ - #define GET_RX_STATUS_DESC_TSFL_8723B(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) - - #define GET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) - #define GET_RX_STATUS_DESC_BUFF_ADDR64_8723B(__pRxDesc) LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) - - #define SET_RX_STATUS_DESC_BUFF_ADDR_8723B(__pRxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) - - - /* Dword 0 */ - #define GET_TX_DESC_OWN_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) - - #define SET_TX_DESC_PKT_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) - #define SET_TX_DESC_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) - #define SET_TX_DESC_BMC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) - #define SET_TX_DESC_HTC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) - #define SET_TX_DESC_LAST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 26, 1, __Value) - #define SET_TX_DESC_FIRST_SEG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) - #define SET_TX_DESC_LINIP_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 28, 1, __Value) - #define SET_TX_DESC_NO_ACM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) - #define SET_TX_DESC_GF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) - #define SET_TX_DESC_OWN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) - - /* Dword 1 */ - #define SET_TX_DESC_MACID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) - #define SET_TX_DESC_QUEUE_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) - #define SET_TX_DESC_RDG_NAV_EXT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) - #define SET_TX_DESC_LSIG_TXOP_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) - #define SET_TX_DESC_PIFS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) - #define SET_TX_DESC_RATE_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) - #define SET_TX_DESC_EN_DESC_ID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) - #define SET_TX_DESC_SEC_TYPE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) - #define SET_TX_DESC_PKT_OFFSET_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) - - - /* Dword 2 */ - #define SET_TX_DESC_PAID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value) - #define SET_TX_DESC_CCA_RTS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) - #define SET_TX_DESC_AGG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) - #define SET_TX_DESC_RDG_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) - #define SET_TX_DESC_AGG_BREAK_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) - #define SET_TX_DESC_MORE_FRAG_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) - #define SET_TX_DESC_RAW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) - #define SET_TX_DESC_SPE_RPT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) - #define SET_TX_DESC_AMPDU_DENSITY_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) - #define SET_TX_DESC_BT_INT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) - #define SET_TX_DESC_GID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 6, __Value) - - - /* Dword 3 */ - #define SET_TX_DESC_WHEADER_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 0, 4, __Value) - #define SET_TX_DESC_CHK_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 4, 1, __Value) - #define SET_TX_DESC_EARLY_MODE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 5, 1, __Value) - #define SET_TX_DESC_HWSEQ_SEL_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) - #define SET_TX_DESC_USE_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) - #define SET_TX_DESC_DISABLE_RTS_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) - #define SET_TX_DESC_DISABLE_FB_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) - #define SET_TX_DESC_CTS2SELF_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) - #define SET_TX_DESC_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) - #define SET_TX_DESC_HW_RTS_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) - #define SET_TX_DESC_NAV_USE_HDR_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) - #define SET_TX_DESC_USE_MAX_LEN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) - #define SET_TX_DESC_MAX_AGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) - #define SET_TX_DESC_NDPA_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value) - #define SET_TX_DESC_AMPDU_MAX_TIME_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) - - /* Dword 4 */ - #define SET_TX_DESC_TX_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) - #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) - #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) - #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) - #define SET_TX_DESC_DATA_RETRY_LIMIT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) - #define SET_TX_DESC_RTS_RATE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) - - - /* Dword 5 */ - #define SET_TX_DESC_DATA_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) - #define SET_TX_DESC_DATA_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) - #define SET_TX_DESC_DATA_BW_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) - #define SET_TX_DESC_DATA_LDPC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value) - #define SET_TX_DESC_DATA_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) - #define SET_TX_DESC_CTROL_STBC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) - #define SET_TX_DESC_RTS_SHORT_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) - #define SET_TX_DESC_RTS_SC_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) - - - /* Dword 6 */ - #define SET_TX_DESC_SW_DEFINE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) - #define SET_TX_DESC_MBSSID_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) - #define SET_TX_DESC_ANTSEL_A_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) - #define SET_TX_DESC_ANTSEL_B_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 19, 3, __Value) - #define SET_TX_DESC_ANTSEL_C_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 22, 3, __Value) - #define SET_TX_DESC_ANTSEL_D_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 25, 3, __Value) - - /* Dword 7 */ - #ifdef CONFIG_PCI_HCI - #define SET_TX_DESC_TX_BUFFER_SIZE_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) - #endif - #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_USB_HCI) - #define SET_TX_DESC_TX_DESC_CHECKSUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) - #endif - #define SET_TX_DESC_USB_TXAGG_NUM_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - #ifdef CONFIG_SDIO_HCI - #define SET_TX_DESC_SDIO_TXSEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 16, 8, __Value) - #endif - - /* Dword 8 */ - #define SET_TX_DESC_HWSEQ_EN_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) - - /* Dword 9 */ - #define SET_TX_DESC_SEQ_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) - - /* Dword 10 */ - #define SET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+40, 0, 32, __Value) - #define GET_TX_DESC_TX_BUFFER_ADDRESS_8723B(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+40, 0, 32) - - /* Dword 11 */ - #define SET_TX_DESC_NEXT_DESC_ADDRESS_8723B(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+48, 0, 32, __Value) - - - #define SET_EARLYMODE_PKTNUM_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) - #define SET_EARLYMODE_LEN0_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) - #define SET_EARLYMODE_LEN1_1_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) - #define SET_EARLYMODE_LEN1_2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) - #define SET_EARLYMODE_LEN2_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) - #define SET_EARLYMODE_LEN3_8723B(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) - -#endif -/* ----------------------------------------------------------- - * - * Rate - * - * ----------------------------------------------------------- - * CCK Rates, TxHT = 0 */ -#define DESC8723B_RATE1M 0x00 -#define DESC8723B_RATE2M 0x01 -#define DESC8723B_RATE5_5M 0x02 -#define DESC8723B_RATE11M 0x03 - -/* OFDM Rates, TxHT = 0 */ -#define DESC8723B_RATE6M 0x04 -#define DESC8723B_RATE9M 0x05 -#define DESC8723B_RATE12M 0x06 -#define DESC8723B_RATE18M 0x07 -#define DESC8723B_RATE24M 0x08 -#define DESC8723B_RATE36M 0x09 -#define DESC8723B_RATE48M 0x0a -#define DESC8723B_RATE54M 0x0b - -/* MCS Rates, TxHT = 1 */ -#define DESC8723B_RATEMCS0 0x0c -#define DESC8723B_RATEMCS1 0x0d -#define DESC8723B_RATEMCS2 0x0e -#define DESC8723B_RATEMCS3 0x0f -#define DESC8723B_RATEMCS4 0x10 -#define DESC8723B_RATEMCS5 0x11 -#define DESC8723B_RATEMCS6 0x12 -#define DESC8723B_RATEMCS7 0x13 -#define DESC8723B_RATEMCS8 0x14 -#define DESC8723B_RATEMCS9 0x15 -#define DESC8723B_RATEMCS10 0x16 -#define DESC8723B_RATEMCS11 0x17 -#define DESC8723B_RATEMCS12 0x18 -#define DESC8723B_RATEMCS13 0x19 -#define DESC8723B_RATEMCS14 0x1a -#define DESC8723B_RATEMCS15 0x1b -#define DESC8723B_RATEVHTSS1MCS0 0x2c -#define DESC8723B_RATEVHTSS1MCS1 0x2d -#define DESC8723B_RATEVHTSS1MCS2 0x2e -#define DESC8723B_RATEVHTSS1MCS3 0x2f -#define DESC8723B_RATEVHTSS1MCS4 0x30 -#define DESC8723B_RATEVHTSS1MCS5 0x31 -#define DESC8723B_RATEVHTSS1MCS6 0x32 -#define DESC8723B_RATEVHTSS1MCS7 0x33 -#define DESC8723B_RATEVHTSS1MCS8 0x34 -#define DESC8723B_RATEVHTSS1MCS9 0x35 -#define DESC8723B_RATEVHTSS2MCS0 0x36 -#define DESC8723B_RATEVHTSS2MCS1 0x37 -#define DESC8723B_RATEVHTSS2MCS2 0x38 -#define DESC8723B_RATEVHTSS2MCS3 0x39 -#define DESC8723B_RATEVHTSS2MCS4 0x3a -#define DESC8723B_RATEVHTSS2MCS5 0x3b -#define DESC8723B_RATEVHTSS2MCS6 0x3c -#define DESC8723B_RATEVHTSS2MCS7 0x3d -#define DESC8723B_RATEVHTSS2MCS8 0x3e -#define DESC8723B_RATEVHTSS2MCS9 0x3f - - -#define RX_HAL_IS_CCK_RATE_8723B(pDesc)\ - (GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE1M || \ - GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE2M || \ - GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE5_5M || \ - GET_RX_STATUS_DESC_RX_RATE_8723B(pDesc) == DESC8723B_RATE11M) - - -void rtl8723b_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -void rtl8723b_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); -#if defined(CONFIG_CONCURRENT_MODE) - void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -#endif -void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8723bs_init_xmit_priv(PADAPTER padapter); - void rtl8723bs_free_xmit_priv(PADAPTER padapter); - s32 rtl8723bs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8723bs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8723bs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8723bs_xmit_buf_handler(PADAPTER padapter); - thread_return rtl8723bs_xmit_thread(thread_context context); - #define hal_xmit_handler rtl8723bs_xmit_buf_handler -#endif - -#ifdef CONFIG_USB_HCI - s32 rtl8723bu_xmit_buf_handler(PADAPTER padapter); - #define hal_xmit_handler rtl8723bu_xmit_buf_handler - - - s32 rtl8723bu_init_xmit_priv(PADAPTER padapter); - void rtl8723bu_free_xmit_priv(PADAPTER padapter); - s32 rtl8723bu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8723bu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8723bu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - /* s32 rtl8812au_xmit_buf_handler(PADAPTER padapter); */ - void rtl8723bu_xmit_tasklet(void *priv); - s32 rtl8723bu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); - void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8723be_init_xmit_priv(PADAPTER padapter); - void rtl8723be_free_xmit_priv(PADAPTER padapter); - struct xmit_buf *rtl8723be_dequeue_xmitbuf(struct rtw_tx_ring *ring); - void rtl8723be_xmitframe_resume(_adapter *padapter); - s32 rtl8723be_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8723be_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8723be_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8723be_xmit_tasklet(void *priv); -#endif - -u8 BWMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); -u8 SCMapping_8723B(PADAPTER Adapter, struct pkt_attrib *pattrib); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_cmd.h deleted file mode 100644 index 22269593449006..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_cmd.h +++ /dev/null @@ -1,189 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_CMD_H__ -#define __RTL8723D_CMD_H__ - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD DEFINITION ------------------------------------------------ - * --------------------------------------------------------------------------------------------------------- */ - -enum h2c_cmd_8723D { - /* Common Class: 000 */ - H2C_8723D_RSVD_PAGE = 0x00, - H2C_8723D_MEDIA_STATUS_RPT = 0x01, - H2C_8723D_SCAN_ENABLE = 0x02, - H2C_8723D_KEEP_ALIVE = 0x03, - H2C_8723D_DISCON_DECISION = 0x04, - H2C_8723D_PSD_OFFLOAD = 0x05, - H2C_8723D_AP_OFFLOAD = 0x08, - H2C_8723D_BCN_RSVDPAGE = 0x09, - H2C_8723D_PROBERSP_RSVDPAGE = 0x0A, - H2C_8723D_FCS_RSVDPAGE = 0x10, - H2C_8723D_FCS_INFO = 0x11, - H2C_8723D_AP_WOW_GPIO_CTRL = 0x13, - - /* PoweSave Class: 001 */ - H2C_8723D_SET_PWR_MODE = 0x20, - H2C_8723D_PS_TUNING_PARA = 0x21, - H2C_8723D_PS_TUNING_PARA2 = 0x22, - H2C_8723D_P2P_LPS_PARAM = 0x23, - H2C_8723D_P2P_PS_OFFLOAD = 0x24, - H2C_8723D_PS_SCAN_ENABLE = 0x25, - H2C_8723D_SAP_PS_ = 0x26, - H2C_8723D_INACTIVE_PS_ = 0x27, /* Inactive_PS */ - H2C_8723D_FWLPS_IN_IPS_ = 0x28, - - /* Dynamic Mechanism Class: 010 */ - H2C_8723D_MACID_CFG = 0x40, - H2C_8723D_TXBF = 0x41, - H2C_8723D_RSSI_SETTING = 0x42, - H2C_8723D_AP_REQ_TXRPT = 0x43, - H2C_8723D_INIT_RATE_COLLECT = 0x44, - H2C_8723D_RA_PARA_ADJUST = 0x46, - - /* BT Class: 011 */ - H2C_8723D_B_TYPE_TDMA = 0x60, - H2C_8723D_BT_INFO = 0x61, - H2C_8723D_FORCE_BT_TXPWR = 0x62, - H2C_8723D_BT_IGNORE_WLANACT = 0x63, - H2C_8723D_DAC_SWING_VALUE = 0x64, - H2C_8723D_ANT_SEL_RSV = 0x65, - H2C_8723D_WL_OPMODE = 0x66, - H2C_8723D_BT_MP_OPER = 0x67, - H2C_8723D_BT_CONTROL = 0x68, - H2C_8723D_BT_WIFI_CTRL = 0x69, - H2C_8723D_BT_FW_PATCH = 0x6A, - H2C_8723D_BT_WLAN_CALIBRATION = 0x6D, - - /* WOWLAN Class: 100 */ - H2C_8723D_WOWLAN = 0x80, - H2C_8723D_REMOTE_WAKE_CTRL = 0x81, - H2C_8723D_AOAC_GLOBAL_INFO = 0x82, - H2C_8723D_AOAC_RSVD_PAGE = 0x83, - H2C_8723D_AOAC_RSVD_PAGE2 = 0x84, - H2C_8723D_D0_SCAN_OFFLOAD_CTRL = 0x85, - H2C_8723D_D0_SCAN_OFFLOAD_INFO = 0x86, - H2C_8723D_CHNL_SWITCH_OFFLOAD = 0x87, - H2C_8723D_P2P_OFFLOAD_RSVD_PAGE = 0x8A, - H2C_8723D_P2P_OFFLOAD = 0x8B, - - H2C_8723D_RESET_TSF = 0xC0, - H2C_8723D_MAXID, -}; - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- H2C CMD CONTENT -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- - * _RSVDPAGE_LOC_CMD_0x00 */ -#define SET_8723D_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723D_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) -#define SET_8723D_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8723D_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8723D_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -/* _PWR_MOD_CMD_0x20 */ -#define SET_8723D_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723D_H2CCMD_PWRMODE_PARM_RLBM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 4, __Value) -#define SET_8723D_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 4, 4, __Value) -#define SET_8723D_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8723D_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8723D_H2CCMD_PWRMODE_PARM_BCN_EARLY_C2H_RPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 2, 1, __Value) -#define SET_8723D_H2CCMD_PWRMODE_PARM_PWR_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) - -#define GET_8723D_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd) LE_BITS_TO_1BYTE(__pH2CCmd, 0, 8) - -/* _PS_TUNE_PARAM_CMD_0x21 */ -#define SET_8723D_H2CCMD_PSTUNE_PARM_BCN_TO_LIMIT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723D_H2CCMD_PSTUNE_PARM_DTIM_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8723D_H2CCMD_PSTUNE_PARM_ADOPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 1, __Value) -#define SET_8723D_H2CCMD_PSTUNE_PARM_PS_TIMEOUT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 1, 7, __Value) -#define SET_8723D_H2CCMD_PSTUNE_PARM_DTIM_PERIOD(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _MACID_CFG_CMD_0x40 */ -#define SET_8723D_H2CCMD_MACID_CFG_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_RAID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 5, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_SGI_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 7, 1, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_BW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 2, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_NO_UPDATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 3, 1, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_VHT_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 4, 2, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_DISPT(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 6, 1, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_DISRA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 7, 1, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+5, 0, 8, __Value) -#define SET_8723D_H2CCMD_MACID_CFG_RATE_MASK3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+6, 0, 8, __Value) - -/* _RSSI_SETTING_CMD_0x42 */ -#define SET_8723D_H2CCMD_RSSI_SETTING_MACID(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723D_H2CCMD_RSSI_SETTING_RSSI(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 7, __Value) -#define SET_8723D_H2CCMD_RSSI_SETTING_ULDL_STATE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) - -/* _AP_REQ_TXRPT_CMD_0x43 */ -#define SET_8723D_H2CCMD_APREQRPT_PARM_MACID1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) -#define SET_8723D_H2CCMD_APREQRPT_PARM_MACID2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) - -/* _FORCE_BT_TXPWR_CMD_0x62 */ -#define SET_8723D_H2CCMD_BT_PWR_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) - -/* _FORCE_BT_MP_OPER_CMD_0x67 */ -#define SET_8723D_H2CCMD_BT_MPOPER_VER(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 4, __Value) -#define SET_8723D_H2CCMD_BT_MPOPER_REQNUM(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 4, __Value) -#define SET_8723D_H2CCMD_BT_MPOPER_IDX(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+1, 0, 8, __Value) -#define SET_8723D_H2CCMD_BT_MPOPER_PARAM1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+2, 0, 8, __Value) -#define SET_8723D_H2CCMD_BT_MPOPER_PARAM2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+3, 0, 8, __Value) -#define SET_8723D_H2CCMD_BT_MPOPER_PARAM3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd+4, 0, 8, __Value) - -/* _BT_FW_PATCH_0x6A */ -#define SET_8723D_H2CCMD_BT_FW_PATCH_SIZE(__pH2CCmd, __Value) SET_BITS_TO_LE_2BYTE((pu1Byte)(__pH2CCmd), 0, 16, __Value) -#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) -#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+3, 0, 8, __Value) -#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR2(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+4, 0, 8, __Value) -#define SET_8723D_H2CCMD_BT_FW_PATCH_ADDR3(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+5, 0, 8, __Value) - -/* --------------------------------------------------------------------------------------------------------- - * ------------------------------------------- Structure -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - - -/* --------------------------------------------------------------------------------------------------------- - * ---------------------------------- Function Statement -------------------------------------------------- - * --------------------------------------------------------------------------------------------------------- */ - -/* host message to firmware cmd */ -void rtl8723d_set_FwPwrMode_cmd(PADAPTER padapter, u8 Mode); -void rtl8723d_set_FwJoinBssRpt_cmd(PADAPTER padapter, u8 mstatus); -/* s32 rtl8723d_set_lowpwr_lps_cmd(PADAPTER padapter, u8 enable); */ -void rtl8723d_set_FwPsTuneParam_cmd(PADAPTER padapter); -void rtl8723d_download_rsvd_page(PADAPTER padapter, u8 mstatus); -#ifdef CONFIG_BT_COEXIST - void rtl8723d_download_BTCoex_AP_mode_rsvd_page(PADAPTER padapter); -#endif /* CONFIG_BT_COEXIST */ -#ifdef CONFIG_P2P - void rtl8723d_set_p2p_ps_offload_cmd(PADAPTER padapter, u8 p2p_ps_state); -#endif /* CONFIG_P2P */ - -#ifdef CONFIG_TDLS -#ifdef CONFIG_TDLS_CH_SW -void rtl8723d_set_BcnEarly_C2H_Rpt_cmd(PADAPTER padapter, u8 enable); -#endif -#endif - -#ifdef CONFIG_P2P_WOWLAN - void rtl8723d_set_p2p_wowlan_offload_cmd(PADAPTER padapter); -#endif - -s32 FillH2CCmd8723D(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); -u8 GetTxBufferRsvdPageNum8723D(_adapter *padapter, bool wowlan); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_dm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_dm.h deleted file mode 100644 index 0612f0620e799e..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_dm.h +++ /dev/null @@ -1,39 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_DM_H__ -#define __RTL8723D_DM_H__ -/* ************************************************************ - * Description: - * - * This file is for 8723D dynamic mechanism only - * - * - * ************************************************************ */ - -/* ************************************************************ - * structure and define - * ************************************************************ */ - -/* ************************************************************ - * function prototype - * ************************************************************ */ - -void rtl8723d_init_dm_priv(PADAPTER padapter); -void rtl8723d_deinit_dm_priv(PADAPTER padapter); - -void rtl8723d_InitHalDm(PADAPTER padapter); -void rtl8723d_HalDmWatchDog(PADAPTER padapter); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_hal.h deleted file mode 100644 index 49bfc5ea821afc..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_hal.h +++ /dev/null @@ -1,303 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_HAL_H__ -#define __RTL8723D_HAL_H__ - -#include "hal_data.h" - -#include "rtl8723d_spec.h" -#include "rtl8723d_rf.h" -#include "rtl8723d_dm.h" -#include "rtl8723d_recv.h" -#include "rtl8723d_xmit.h" -#include "rtl8723d_cmd.h" -#include "rtl8723d_led.h" -#include "Hal8723DPwrSeq.h" -#include "Hal8723DPhyReg.h" -#include "Hal8723DPhyCfg.h" -#ifdef DBG_CONFIG_ERROR_DETECT - #include "rtl8723d_sreset.h" -#endif -#ifdef CONFIG_LPS_POFF - #include "rtl8723d_lps_poff.h" -#endif - -#define FW_8723D_SIZE 0x8000 -#define FW_8723D_START_ADDRESS 0x1000 -#define FW_8723D_END_ADDRESS 0x1FFF /* 0x5FFF */ - -#define IS_FW_HEADER_EXIST_8723D(_pFwHdr)\ - ((le16_to_cpu(_pFwHdr->Signature) & 0xFFF0) == 0x23D0) - -typedef struct _RT_FIRMWARE { - FIRMWARE_SOURCE eFWSource; -#ifdef CONFIG_EMBEDDED_FWIMG - u8 *szFwBuffer; -#else - u8 szFwBuffer[FW_8723D_SIZE]; -#endif - u32 ulFwLength; -} RT_FIRMWARE_8723D, *PRT_FIRMWARE_8723D; - -/* - * This structure must be cared byte-ordering - * - * Added by tynli. 2009.12.04. */ -typedef struct _RT_8723D_FIRMWARE_HDR { - /* 8-byte alinment required */ - - /* --- LONG WORD 0 ---- */ - u16 Signature; /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ - u8 Category; /* AP/NIC and USB/PCI */ - u8 Function; /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ - u16 Version; /* FW Version */ - u16 Subversion; /* FW Subversion, default 0x00 */ - - /* --- LONG WORD 1 ---- */ - u8 Month; /* Release time Month field */ - u8 Date; /* Release time Date field */ - u8 Hour; /* Release time Hour field */ - u8 Minute; /* Release time Minute field */ - u16 RamCodeSize; /* The size of RAM code */ - u16 Rsvd2; - - /* --- LONG WORD 2 ---- */ - u32 SvnIdx; /* The SVN entry index */ - u32 Rsvd3; - - /* --- LONG WORD 3 ---- */ - u32 Rsvd4; - u32 Rsvd5; -} RT_8723D_FIRMWARE_HDR, *PRT_8723D_FIRMWARE_HDR; - -#define DRIVER_EARLY_INT_TIME_8723D 0x05 -#define BCN_DMA_ATIME_INT_TIME_8723D 0x02 - -/* for 8723D - * TX 32K, RX 16K, Page size 128B for TX, 8B for RX */ -#define PAGE_SIZE_TX_8723D 128 -#define PAGE_SIZE_RX_8723D 8 - -#define TX_DMA_SIZE_8723D 0x8000 /* 32K(TX) */ -#define RX_DMA_SIZE_8723D 0x4000 /* 16K(RX) */ - -#ifdef CONFIG_WOWLAN - #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_CAM_NUM) /* 16 entries, for each is 24 bytes*/ -#else - #define RESV_FMWF 0 -#endif - -#ifdef CONFIG_FW_C2H_DEBUG - #define RX_DMA_RESERVED_SIZE_8723D 0x100 /* 256B, reserved for c2h debug message */ -#else - #define RX_DMA_RESERVED_SIZE_8723D 0x80 /* 128B, reserved for tx report */ -#endif -#define RX_DMA_BOUNDARY_8723D\ - (RX_DMA_SIZE_8723D - RX_DMA_RESERVED_SIZE_8723D - 1) - - -/* Note: We will divide number of page equally for each queue other than public queue! */ - -/* For General Reserved Page Number(Beacon Queue is reserved page) - * Beacon:MAX_BEACON_LEN/PAGE_SIZE_TX_8723D - * PS-Poll:1, Null Data:1,Qos Null Data:1,BT Qos Null Data:1,CTS-2-SELF,LTE QoS Null*/ - -#define BCNQ_PAGE_NUM_8723D (MAX_BEACON_LEN/PAGE_SIZE_TX_8723D + 6) /*0x08*/ - -/* For WoWLan , more reserved page - * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, AOAC rpt 1, PNO: 6 - * NS offload: 2 NDP info: 1 - */ -#ifdef CONFIG_WOWLAN - #define WOWLAN_PAGE_NUM_8723D 0x0b -#else - #define WOWLAN_PAGE_NUM_8723D 0x00 -#endif - -#ifdef CONFIG_PNO_SUPPORT - #undef WOWLAN_PAGE_NUM_8723D - #define WOWLAN_PAGE_NUM_8723D 0x15 -#endif - -#ifdef CONFIG_AP_WOWLAN - #define AP_WOWLAN_PAGE_NUM_8723D 0x02 -#endif - -#define TX_TOTAL_PAGE_NUMBER_8723D\ - (0xFF - BCNQ_PAGE_NUM_8723D - WOWLAN_PAGE_NUM_8723D) -#define TX_PAGE_BOUNDARY_8723D (TX_TOTAL_PAGE_NUMBER_8723D + 1) - -#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723D TX_TOTAL_PAGE_NUMBER_8723D -#define WMM_NORMAL_TX_PAGE_BOUNDARY_8723D\ - (WMM_NORMAL_TX_TOTAL_PAGE_NUMBER_8723D + 1) - -/* For Normal Chip Setting - * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_8723D */ -#define NORMAL_PAGE_NUM_HPQ_8723D 0x0C -#define NORMAL_PAGE_NUM_LPQ_8723D 0x02 -#define NORMAL_PAGE_NUM_NPQ_8723D 0x02 -#define NORMAL_PAGE_NUM_EPQ_8723D 0x04 - -/* Note: For Normal Chip Setting, modify later */ -#define WMM_NORMAL_PAGE_NUM_HPQ_8723D 0x30 -#define WMM_NORMAL_PAGE_NUM_LPQ_8723D 0x20 -#define WMM_NORMAL_PAGE_NUM_NPQ_8723D 0x20 -#define WMM_NORMAL_PAGE_NUM_EPQ_8723D 0x00 - - -#include "HalVerDef.h" -#include "hal_com.h" - -#define EFUSE_OOB_PROTECT_BYTES (96 + 1) - -#define HAL_EFUSE_MEMORY -#define HWSET_MAX_SIZE_8723D 512 -#define EFUSE_REAL_CONTENT_LEN_8723D 512 -#define EFUSE_MAP_LEN_8723D 512 -#define EFUSE_MAX_SECTION_8723D 64 - -/* For some inferiority IC purpose. added by Roger, 2009.09.02.*/ -#define EFUSE_IC_ID_OFFSET 506 -#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN_8723D) - -#define EFUSE_ACCESS_ON 0x69 -#define EFUSE_ACCESS_OFF 0x00 - -/* ******************************************************** - * EFUSE for BT definition - * ******************************************************** */ -#define BANK_NUM 1 -#define EFUSE_BT_REAL_BANK_CONTENT_LEN 128 -#define EFUSE_BT_REAL_CONTENT_LEN \ - (EFUSE_BT_REAL_BANK_CONTENT_LEN * BANK_NUM) -#define EFUSE_BT_MAP_LEN 1024 /* 1k bytes */ -#define EFUSE_BT_MAX_SECTION (EFUSE_BT_MAP_LEN / 8) -#define EFUSE_PROTECT_BYTES_BANK 16 - -typedef enum tag_Package_Definition { - PACKAGE_DEFAULT, - PACKAGE_QFN68, - PACKAGE_TFBGA90, - PACKAGE_TFBGA80, - PACKAGE_TFBGA79 -} PACKAGE_TYPE_E; - -#define INCLUDE_MULTI_FUNC_BT(_Adapter) \ - (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) -#define INCLUDE_MULTI_FUNC_GPS(_Adapter) \ - (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) - -#ifdef CONFIG_FILE_FWIMG - extern char *rtw_fw_file_path; - extern char *rtw_fw_wow_file_path; - #ifdef CONFIG_MP_INCLUDED - extern char *rtw_fw_mp_bt_file_path; - #endif /* CONFIG_MP_INCLUDED */ -#endif /* CONFIG_FILE_FWIMG */ - -/* rtl8723d_hal_init.c */ -s32 rtl8723d_FirmwareDownload(PADAPTER padapter, BOOLEAN bUsedWoWLANFw); -void rtl8723d_FirmwareSelfReset(PADAPTER padapter); -void rtl8723d_InitializeFirmwareVars(PADAPTER padapter); - -void rtl8723d_InitAntenna_Selection(PADAPTER padapter); -void rtl8723d_DeinitAntenna_Selection(PADAPTER padapter); -void rtl8723d_CheckAntenna_Selection(PADAPTER padapter); -void rtl8723d_init_default_value(PADAPTER padapter); - -s32 rtl8723d_InitLLTTable(PADAPTER padapter); - -s32 CardDisableHWSM(PADAPTER padapter, u8 resetMCU); -s32 CardDisableWithoutHWSM(PADAPTER padapter); - -/* EFuse */ -u8 GetEEPROMSize8723D(PADAPTER padapter); -void Hal_InitPGData(PADAPTER padapter, u8 *PROMContent); -void Hal_EfuseParseIDCode(PADAPTER padapter, u8 *hwinfo); -void Hal_EfuseParseTxPowerInfo_8723D(PADAPTER padapter, - u8 *PROMContent, BOOLEAN AutoLoadFail); -void Hal_EfuseParseBTCoexistInfo_8723D(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseEEPROMVer_8723D(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseChnlPlan_8723D(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseCustomerID_8723D(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseAntennaDiversity_8723D(PADAPTER padapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -void Hal_EfuseParseXtal_8723D(PADAPTER pAdapter, - u8 *hwinfo, u8 AutoLoadFail); -void Hal_EfuseParseThermalMeter_8723D(PADAPTER padapter, - u8 *hwinfo, u8 AutoLoadFail); -VOID Hal_EfuseParseVoltage_8723D(PADAPTER pAdapter, - u8 *hwinfo, BOOLEAN AutoLoadFail); -VOID Hal_EfuseParseBoardType_8723D(PADAPTER Adapter, - u8 *PROMContent, BOOLEAN AutoloadFail); - -void rtl8723d_set_hal_ops(struct hal_ops *pHalFunc); -void init_hal_spec_8723d(_adapter *adapter); -u8 SetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val); -void GetHwReg8723D(PADAPTER padapter, u8 variable, u8 *val); -u8 SetHalDefVar8723D(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); -u8 GetHalDefVar8723D(PADAPTER padapter, HAL_DEF_VARIABLE variable, void *pval); - -/* register */ -void rtl8723d_InitBeaconParameters(PADAPTER padapter); -void rtl8723d_InitBeaconMaxError(PADAPTER padapter, u8 InfraMode); -void _InitMacAPLLSetting_8723D(PADAPTER Adapter); -void _8051Reset8723(PADAPTER padapter); -#ifdef CONFIG_WOWLAN - void Hal_DetectWoWMode(PADAPTER pAdapter); -#endif /* CONFIG_WOWLAN */ - -void rtl8723d_start_thread(_adapter *padapter); -void rtl8723d_stop_thread(_adapter *padapter); - -#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) - void rtl8723ds_init_checkbthang_workqueue(_adapter *adapter); - void rtl8723ds_free_checkbthang_workqueue(_adapter *adapter); - void rtl8723ds_cancle_checkbthang_workqueue(_adapter *adapter); - void rtl8723ds_hal_check_bt_hang(_adapter *adapter); -#endif - -#ifdef CONFIG_GPIO_WAKEUP - void HalSetOutPutGPIO(PADAPTER padapter, u8 index, u8 OutPutValue); -#endif -#ifdef CONFIG_MP_INCLUDED -int FirmwareDownloadBT(IN PADAPTER Adapter, PRT_MP_FIRMWARE pFirmware); -#endif -void CCX_FwC2HTxRpt_8723d(PADAPTER padapter, u8 *pdata, u8 len); - -u8 MRateToHwRate8723D(u8 rate); -u8 HwRateToMRate8723D(u8 rate); - -void Hal_ReadRFGainOffset(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); - -#if defined(CONFIG_CHECK_BT_HANG) && defined(CONFIG_BT_COEXIST) - void check_bt_status_work(void *data); -#endif - -#ifdef CONFIG_USB_HCI - void rtl8723d_cal_txdesc_chksum(struct tx_desc *ptxdesc); -#endif - -#ifdef CONFIG_PCI_HCI - BOOLEAN InterruptRecognized8723DE(PADAPTER Adapter); - VOID UpdateInterruptMask8723DE(PADAPTER Adapter, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); - u16 get_txbd_rw_reg(u16 ff_hwaddr); -#endif - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_led.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_led.h deleted file mode 100644 index 1905e8bed02c25..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_led.h +++ /dev/null @@ -1,44 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_LED_H__ -#define __RTL8723D_LED_H__ - -#include -#include -#include - -#ifdef CONFIG_RTW_SW_LED -/* ******************************************************************************** - * Interface to manipulate LED objects. - * ******************************************************************************** */ -#ifdef CONFIG_USB_HCI - void rtl8723du_InitSwLeds(PADAPTER padapter); - void rtl8723du_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_SDIO_HCI - void rtl8723ds_InitSwLeds(PADAPTER padapter); - void rtl8723ds_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_GSPI_HCI - void rtl8723ds_InitSwLeds(PADAPTER padapter); - void rtl8723ds_DeInitSwLeds(PADAPTER padapter); -#endif -#ifdef CONFIG_PCI_HCI - void rtl8723de_InitSwLeds(PADAPTER padapter); - void rtl8723de_DeInitSwLeds(PADAPTER padapter); -#endif - -#endif /*#ifdef CONFIG_RTW_SW_LED*/ -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_lps_poff.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_lps_poff.h deleted file mode 100644 index 138a0ca6673285..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_lps_poff.h +++ /dev/null @@ -1,56 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ - -/******************************************** CONST ************************/ -#define NUM_OF_REGISTER_BANK 13 -#define NUM_OF_TOTAL_DWORD (NUM_OF_REGISTER_BANK * 64) -#define TOTAL_LEN_FOR_HIOE ((NUM_OF_TOTAL_DWORD + 1) * 8) -#define LPS_POFF_STATIC_FILE_LEN (TOTAL_LEN_FOR_HIOE + TXDESC_SIZE) -#define LPS_POFF_DYNAMIC_FILE_LEN (512 + TXDESC_SIZE) -/******************************************** CONST ************************/ - -/******************************************** MACRO ************************/ -/* HOIE Entry Definition */ -#define SET_HOIE_ENTRY_LOW_DATA(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE), 0, 16, __Value) -#define SET_HOIE_ENTRY_HIGH_DATA(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE), 16, 16, __Value) -#define SET_HOIE_ENTRY_MODE_SELECT(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 0, 1, __Value) -#define SET_HOIE_ENTRY_ADDRESS(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 1, 14, __Value) -#define SET_HOIE_ENTRY_BYTE_MASK(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 15, 4, __Value) -#define SET_HOIE_ENTRY_IO_LOCK(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 19, 1, __Value) -#define SET_HOIE_ENTRY_RD_EN(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 20, 1, __Value) -#define SET_HOIE_ENTRY_WR_EN(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 21, 1, __Value) -#define SET_HOIE_ENTRY_RAW_RW(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 22, 1, __Value) -#define SET_HOIE_ENTRY_RAW(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 23, 1, __Value) -#define SET_HOIE_ENTRY_IO_DELAY(__pHOIE, __Value) \ - SET_BITS_TO_LE_4BYTE((__pHOIE)+4, 24, 8, __Value) - -/*********************Function Definition*******************************************/ -void rtl8723d_lps_poff_init(PADAPTER padapter); -void rtl8723d_lps_poff_deinit(PADAPTER padapter); -bool rtl8723d_lps_poff_get_txbndy_status(PADAPTER padapter); -void rtl8723d_lps_poff_h2c_ctrl(PADAPTER padapter, u8 enable); -void rtl8723d_lps_poff_set_ps_mode(PADAPTER padapter, bool bEnterLPS); -bool rtl8723d_lps_poff_get_status(PADAPTER padapter); -void rtl8723d_lps_poff_wow(PADAPTER padapter); diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_recv.h deleted file mode 100644 index 03539a8b0a3956..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_recv.h +++ /dev/null @@ -1,116 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_RECV_H__ -#define __RTL8723D_RECV_H__ - -#define RECV_BLK_SZ 512 -#define RECV_BLK_CNT 16 -#define RECV_BLK_TH RECV_BLK_CNT - -#if defined(CONFIG_USB_HCI) - - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) /* 8K+1k */ - #else - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* #define MAX_RECVBUF_SZ (32768) */ /* 32k */ - /* #define MAX_RECVBUF_SZ (16384) */ /* 16K */ - /* #define MAX_RECVBUF_SZ (10240) */ /* 10K */ - #ifdef CONFIG_PLATFORM_MSTAR - #define MAX_RECVBUF_SZ (8192) /* 8K */ - #else - #define MAX_RECVBUF_SZ (15360) /* 15k < 16k */ - #endif - /* #define MAX_RECVBUF_SZ (8192+1024) */ /* 8K+1k */ - #else - #define MAX_RECVBUF_SZ (4000) /* about 4K */ - #endif - #endif - #endif /* !MAX_RECVBUF_SZ */ - -#elif defined(CONFIG_PCI_HCI) - /* #ifndef CONFIG_MINIMAL_MEMORY_USAGE */ - /* #define MAX_RECVBUF_SZ (9100) */ - /* #else */ - #define MAX_RECVBUF_SZ (4000) /* about 4K - * #endif */ - - -#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - - #define MAX_RECVBUF_SZ (RX_DMA_BOUNDARY_8723D + 1) - -#endif - -/* Rx smooth factor */ -#define Rx_Smooth_Factor (20) - -#ifdef CONFIG_SDIO_HCI - #ifndef CONFIG_SDIO_RX_COPY - #undef MAX_RECVBUF_SZ - #define MAX_RECVBUF_SZ (RX_DMA_SIZE_8723D - RX_DMA_RESERVED_SIZE_8723D) - #endif /* !CONFIG_SDIO_RX_COPY */ -#endif /* CONFIG_SDIO_HCI */ - -/*-----------------------------------------------------------------*/ -/* RTL8723D RX BUFFER DESC */ -/*-----------------------------------------------------------------*/ -/*DWORD 0*/ -#define SET_RX_BUFFER_DESC_DATA_LENGTH_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_BUFFER_DESC_LS_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 15, 1, __Value) -#define SET_RX_BUFFER_DESC_FS_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 1, __Value) -#define SET_RX_BUFFER_DESC_TOTAL_LENGTH_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 16, 15, __Value) - -#define GET_RX_BUFFER_DESC_OWN_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) -#define GET_RX_BUFFER_DESC_LS_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_BUFFER_DESC_FS_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 1) -#ifdef USING_RX_TAG - #define GET_RX_BUFFER_DESC_RX_TAG_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 13) -#else - #define GET_RX_BUFFER_DESC_TOTAL_LENGTH_8723D(__pRxStatusDesc) LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 15) -#endif - -/*DWORD 1*/ -#define SET_RX_BUFFER_PHYSICAL_LOW_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+4, 0, 32, __Value) - -/*DWORD 2*/ -#ifdef CONFIG_64BIT_DMA - #define SET_RX_BUFFER_PHYSICAL_HIGH_8723D(__pRxStatusDesc, __Value) SET_BITS_TO_LE_4BYTE(__pRxStatusDesc+8, 0, 32, __Value) -#else - #define SET_RX_BUFFER_PHYSICAL_HIGH_8723D(__pRxStatusDesc, __Value) -#endif - - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8723ds_init_recv_priv(PADAPTER padapter); - void rtl8723ds_free_recv_priv(PADAPTER padapter); - s32 rtl8723ds_recv_hdl(_adapter *padapter); -#endif - -#ifdef CONFIG_USB_HCI - int rtl8723du_init_recv_priv(_adapter *padapter); - void rtl8723du_free_recv_priv(_adapter *padapter); - void rtl8723du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8723de_init_recv_priv(PADAPTER padapter); - void rtl8723de_free_recv_priv(PADAPTER padapter); -#endif - -void rtl8723d_query_rx_desc_status(union recv_frame *precvframe, u8 *pdesc); - -#endif /* __RTL8723D_RECV_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_rf.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_rf.h deleted file mode 100644 index 733eb0a46518a5..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_rf.h +++ /dev/null @@ -1,21 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_RF_H__ -#define __RTL8723D_RF_H__ - -int PHY_RF6052_Config8723D(IN PADAPTER pdapter); - -void PHY_RF6052SetBandwidth8723D(IN PADAPTER Adapter, IN enum channel_width Bandwidth); -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_spec.h deleted file mode 100644 index 5106b23b772263..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_spec.h +++ /dev/null @@ -1,447 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_SPEC_H__ -#define __RTL8723D_SPEC_H__ - -#include - - -#define HAL_NAV_UPPER_UNIT_8723D 128 /* micro-second */ - -/* ----------------------------------------------------- - * - * 0x0000h ~ 0x00FFh System Configuration - * - * ----------------------------------------------------- */ -#define REG_SYS_ISO_CTRL_8723D 0x0000 /* 2 Byte */ -#define REG_SYS_FUNC_EN_8723D 0x0002 /* 2 Byte */ -#define REG_APS_FSMCO_8723D 0x0004 /* 4 Byte */ -#define REG_SYS_CLKR_8723D 0x0008 /* 2 Byte */ -#define REG_9346CR_8723D 0x000A /* 2 Byte */ -#define REG_EE_VPD_8723D 0x000C /* 2 Byte */ -#define REG_AFE_MISC_8723D 0x0010 /* 1 Byte */ -#define REG_SPS0_CTRL_8723D 0x0011 /* 7 Byte */ -#define REG_SPS_OCP_CFG_8723D 0x0018 /* 4 Byte */ -#define REG_RSV_CTRL_8723D 0x001C /* 3 Byte */ -#define REG_RF_CTRL_8723D 0x001F /* 1 Byte */ -#define REG_LPLDO_CTRL_8723D 0x0023 /* 1 Byte */ -#define REG_AFE_XTAL_CTRL_8723D 0x0024 /* 4 Byte */ -#define REG_AFE_PLL_CTRL_8723D 0x0028 /* 4 Byte */ -#define REG_MAC_PLL_CTRL_EXT_8723D 0x002c /* 4 Byte */ -#define REG_EFUSE_CTRL_8723D 0x0030 -#define REG_EFUSE_TEST_8723D 0x0034 -#define REG_PWR_DATA_8723D 0x0038 -#define REG_CAL_TIMER_8723D 0x003C -#define REG_ACLK_MON_8723D 0x003E -#define REG_GPIO_MUXCFG_8723D 0x0040 -#define REG_GPIO_IO_SEL_8723D 0x0042 -#define REG_MAC_PINMUX_CFG_8723D 0x0043 -#define REG_GPIO_PIN_CTRL_8723D 0x0044 -#define REG_GPIO_INTM_8723D 0x0048 -#define REG_LEDCFG0_8723D 0x004C -#define REG_LEDCFG1_8723D 0x004D -#define REG_LEDCFG2_8723D 0x004E -#define REG_LEDCFG3_8723D 0x004F -#define REG_FSIMR_8723D 0x0050 -#define REG_FSISR_8723D 0x0054 -#define REG_HSIMR_8723D 0x0058 -#define REG_HSISR_8723D 0x005c -#define REG_GPIO_EXT_CTRL 0x0060 -#define REG_PAD_CTRL1_8723D 0x0064 -#define REG_MULTI_FUNC_CTRL_8723D 0x0068 -#define REG_GPIO_STATUS_8723D 0x006C -#define REG_SDIO_CTRL_8723D 0x0070 -#define REG_OPT_CTRL_8723D 0x0074 -#define REG_AFE_CTRL_4_8723D 0x0078 -#define REG_MCUFWDL_8723D 0x0080 -#define REG_8051FW_CTRL_8723D 0x0080 -#define REG_HMEBOX_DBG_0_8723D 0x0088 -#define REG_HMEBOX_DBG_1_8723D 0x008A -#define REG_HMEBOX_DBG_2_8723D 0x008C -#define REG_HMEBOX_DBG_3_8723D 0x008E -#define REG_WLLPS_CTRL 0x0090 -#define REG_HIMR0_8723D 0x00B0 -#define REG_HISR0_8723D 0x00B4 -#define REG_HIMR1_8723D 0x00B8 -#define REG_HISR1_8723D 0x00BC -#define REG_PMC_DBG_CTRL2_8723D 0x00CC -#define REG_EFUSE_BURN_GNT_8723D 0x00CF -#define REG_HPON_FSM_8723D 0x00EC -#define REG_SYS_CFG1_8723D 0x00F0 -#define REG_SYS_CFG_8723D 0x00FC -#define REG_ROM_VERSION 0x00FD - -/* ----------------------------------------------------- - * - * 0x0100h ~ 0x01FFh MACTOP General Configuration - * - * ----------------------------------------------------- */ -#define REG_C2HEVT_CMD_ID_8723D 0x01A0 -#define REG_C2HEVT_CMD_SEQ_88XX 0x01A1 -#define REG_C2hEVT_CMD_CONTENT_88XX 0x01A2 -#define REG_C2HEVT_CMD_LEN_8723D 0x01AE -#define REG_C2HEVT_CLEAR_8723D 0x01AF -#define REG_MCUTST_1_8723D 0x01C0 -#define REG_WOWLAN_WAKE_REASON 0x01C7 -#define REG_FMETHR_8723D 0x01C8 -#define REG_HMETFR_8723D 0x01CC -#define REG_HMEBOX_0_8723D 0x01D0 -#define REG_HMEBOX_1_8723D 0x01D4 -#define REG_HMEBOX_2_8723D 0x01D8 -#define REG_HMEBOX_3_8723D 0x01DC -#define REG_LLT_INIT_8723D 0x01E0 -#define REG_HMEBOX_EXT0_8723D 0x01F0 -#define REG_HMEBOX_EXT1_8723D 0x01F4 -#define REG_HMEBOX_EXT2_8723D 0x01F8 -#define REG_HMEBOX_EXT3_8723D 0x01FC - -/* ----------------------------------------------------- - * - * 0x0200h ~ 0x027Fh TXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RQPN_8723D 0x0200 -#define REG_FIFOPAGE_8723D 0x0204 -#define REG_DWBCN0_CTRL_8723D REG_TDECTRL -#define REG_TXDMA_OFFSET_CHK_8723D 0x020C -#define REG_TXDMA_STATUS_8723D 0x0210 -#define REG_RQPN_NPQ_8723D 0x0214 -#define REG_DWBCN1_CTRL_8723D 0x0228 - - -/* ----------------------------------------------------- - * - * 0x0280h ~ 0x02FFh RXDMA Configuration - * - * ----------------------------------------------------- */ -#define REG_RXDMA_AGG_PG_TH_8723D 0x0280 -#define REG_FW_UPD_RDPTR_8723D 0x0284 /* FW shall update this register before FW write RXPKT_RELEASE_POLL to 1 */ -#define REG_RXDMA_CONTROL_8723D 0x0286 /* Control the RX DMA. */ -#define REG_RXDMA_STATUS_8723D 0x0288 -#define REG_RXDMA_MODE_CTRL_8723D 0x0290 -#define REG_EARLY_MODE_CONTROL_8723D 0x02BC -#define REG_RSVD5_8723D 0x02F0 -#define REG_RSVD6_8723D 0x02F4 - -/* ----------------------------------------------------- - * - * 0x0300h ~ 0x03FFh PCIe - * - * ----------------------------------------------------- */ -#define REG_PCIE_CTRL_REG_8723D 0x0300 -#define REG_INT_MIG_8723D 0x0304 /* Interrupt Migration */ -#define REG_BCNQ_TXBD_DESA_8723D 0x0308 /* TX Beacon Descriptor Address */ -#define REG_MGQ_TXBD_DESA_8723D 0x0310 /* TX Manage Queue Descriptor Address */ -#define REG_VOQ_TXBD_DESA_8723D 0x0318 /* TX VO Queue Descriptor Address */ -#define REG_VIQ_TXBD_DESA_8723D 0x0320 /* TX VI Queue Descriptor Address */ -#define REG_BEQ_TXBD_DESA_8723D 0x0328 /* TX BE Queue Descriptor Address */ -#define REG_BKQ_TXBD_DESA_8723D 0x0330 /* TX BK Queue Descriptor Address */ -#define REG_RXQ_RXBD_DESA_8723D 0x0338 /* RX Queue Descriptor Address */ -#define REG_HI0Q_TXBD_DESA_8723D 0x0340 -#define REG_HI1Q_TXBD_DESA_8723D 0x0348 -#define REG_HI2Q_TXBD_DESA_8723D 0x0350 -#define REG_HI3Q_TXBD_DESA_8723D 0x0358 -#define REG_HI4Q_TXBD_DESA_8723D 0x0360 -#define REG_HI5Q_TXBD_DESA_8723D 0x0368 -#define REG_HI6Q_TXBD_DESA_8723D 0x0370 -#define REG_HI7Q_TXBD_DESA_8723D 0x0378 -#define REG_MGQ_TXBD_NUM_8723D 0x0380 -#define REG_RX_RXBD_NUM_8723D 0x0382 -#define REG_VOQ_TXBD_NUM_8723D 0x0384 -#define REG_VIQ_TXBD_NUM_8723D 0x0386 -#define REG_BEQ_TXBD_NUM_8723D 0x0388 -#define REG_BKQ_TXBD_NUM_8723D 0x038A -#define REG_HI0Q_TXBD_NUM_8723D 0x038C -#define REG_HI1Q_TXBD_NUM_8723D 0x038E -#define REG_HI2Q_TXBD_NUM_8723D 0x0390 -#define REG_HI3Q_TXBD_NUM_8723D 0x0392 -#define REG_HI4Q_TXBD_NUM_8723D 0x0394 -#define REG_HI5Q_TXBD_NUM_8723D 0x0396 -#define REG_HI6Q_TXBD_NUM_8723D 0x0398 -#define REG_HI7Q_TXBD_NUM_8723D 0x039A -#define REG_TSFTIMER_HCI_8723D 0x039C -#define REG_BD_RW_PTR_CLR_8723D 0x039C - -/* Read Write Point */ -#define REG_VOQ_TXBD_IDX_8723D 0x03A0 -#define REG_VIQ_TXBD_IDX_8723D 0x03A4 -#define REG_BEQ_TXBD_IDX_8723D 0x03A8 -#define REG_BKQ_TXBD_IDX_8723D 0x03AC -#define REG_MGQ_TXBD_IDX_8723D 0x03B0 -#define REG_RXQ_TXBD_IDX_8723D 0x03B4 -#define REG_HI0Q_TXBD_IDX_8723D 0x03B8 -#define REG_HI1Q_TXBD_IDX_8723D 0x03BC -#define REG_HI2Q_TXBD_IDX_8723D 0x03C0 -#define REG_HI3Q_TXBD_IDX_8723D 0x03C4 -#define REG_HI4Q_TXBD_IDX_8723D 0x03C8 -#define REG_HI5Q_TXBD_IDX_8723D 0x03CC -#define REG_HI6Q_TXBD_IDX_8723D 0x03D0 -#define REG_HI7Q_TXBD_IDX_8723D 0x03D4 - -#define REG_PCIE_HCPWM_8723DE 0x03D8 /* ?????? */ -#define REG_PCIE_HRPWM_8723DE 0x03DC /* PCIe RPWM ?????? */ -#define REG_DBI_WDATA_V1_8723D 0x03E8 -#define REG_DBI_RDATA_V1_8723D 0x03EC -#define REG_DBI_FLAG_V1_8723D 0x03F0 -#define REG_MDIO_V1_8723D 0x03F4 -#define REG_PCIE_MIX_CFG_8723D 0x03F8 -#define REG_HCI_MIX_CFG_8723D 0x03FC - -/* ----------------------------------------------------- - * - * 0x0400h ~ 0x047Fh Protocol Configuration - * - * ----------------------------------------------------- */ -#define REG_VOQ_INFORMATION_8723D 0x0400 -#define REG_VIQ_INFORMATION_8723D 0x0404 -#define REG_BEQ_INFORMATION_8723D 0x0408 -#define REG_BKQ_INFORMATION_8723D 0x040C -#define REG_MGQ_INFORMATION_8723D 0x0410 -#define REG_HGQ_INFORMATION_8723D 0x0414 -#define REG_BCNQ_INFORMATION_8723D 0x0418 -#define REG_TXPKT_EMPTY_8723D 0x041A - -#define REG_FWHW_TXQ_CTRL_8723D 0x0420 -#define REG_HWSEQ_CTRL_8723D 0x0423 -#define REG_TXPKTBUF_BCNQ_BDNY_8723D 0x0424 -#define REG_TXPKTBUF_MGQ_BDNY_8723D 0x0425 -#define REG_LIFECTRL_CTRL_8723D 0x0426 -#define REG_MULTI_BCNQ_OFFSET_8723D 0x0427 -#define REG_SPEC_SIFS_8723D 0x0428 -#define REG_RL_8723D 0x042A -#define REG_TXBF_CTRL_8723D 0x042C -#define REG_DARFRC_8723D 0x0430 -#define REG_RARFRC_8723D 0x0438 -#define REG_RRSR_8723D 0x0440 -#define REG_ARFR0_8723D 0x0444 -#define REG_ARFR1_8723D 0x044C -#define REG_CCK_CHECK_8723D 0x0454 -#define REG_AMPDU_MAX_TIME_8723D 0x0456 -#define REG_TXPKTBUF_BCNQ_BDNY1_8723D 0x0457 - -#define REG_AMPDU_MAX_LENGTH_8723D 0x0458 -#define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723D 0x045D -#define REG_NDPA_OPT_CTRL_8723D 0x045F -#define REG_FAST_EDCA_CTRL_8723D 0x0460 -#define REG_RD_RESP_PKT_TH_8723D 0x0463 -#define REG_DATA_SC_8723D 0x0483 -#ifdef CONFIG_WOWLAN - #define REG_TXPKTBUF_IV_LOW 0x0484 - #define REG_TXPKTBUF_IV_HIGH 0x0488 -#endif -#define REG_TXRPT_START_OFFSET 0x04AC -#define REG_POWER_STAGE1_8723D 0x04B4 -#define REG_POWER_STAGE2_8723D 0x04B8 -#define REG_AMPDU_BURST_MODE_8723D 0x04BC -#define REG_PKT_VO_VI_LIFE_TIME_8723D 0x04C0 -#define REG_PKT_BE_BK_LIFE_TIME_8723D 0x04C2 -#define REG_STBC_SETTING_8723D 0x04C4 -#define REG_HT_SINGLE_AMPDU_8723D 0x04C7 -#define REG_PROT_MODE_CTRL_8723D 0x04C8 -#define REG_MAX_AGGR_NUM_8723D 0x04CA -#define REG_RTS_MAX_AGGR_NUM_8723D 0x04CB -#define REG_BAR_MODE_CTRL_8723D 0x04CC -#define REG_RA_TRY_RATE_AGG_LMT_8723D 0x04CF -#define REG_MACID_PKT_DROP0_8723D 0x04D0 -#define REG_MACID_PKT_SLEEP_8723D 0x04D4 - -/* ----------------------------------------------------- - * - * 0x0500h ~ 0x05FFh EDCA Configuration - * - * ----------------------------------------------------- */ -#define REG_EDCA_VO_PARAM_8723D 0x0500 -#define REG_EDCA_VI_PARAM_8723D 0x0504 -#define REG_EDCA_BE_PARAM_8723D 0x0508 -#define REG_EDCA_BK_PARAM_8723D 0x050C -#define REG_BCNTCFG_8723D 0x0510 -#define REG_PIFS_8723D 0x0512 -#define REG_RDG_PIFS_8723D 0x0513 -#define REG_SIFS_CTX_8723D 0x0514 -#define REG_SIFS_TRX_8723D 0x0516 -#define REG_AGGR_BREAK_TIME_8723D 0x051A -#define REG_SLOT_8723D 0x051B -#define REG_TX_PTCL_CTRL_8723D 0x0520 -#define REG_TXPAUSE_8723D 0x0522 -#define REG_DIS_TXREQ_CLR_8723D 0x0523 -#define REG_RD_CTRL_8723D 0x0524 -/* - * Format for offset 540h-542h: - * [3:0]: TBTT prohibit setup in unit of 32us. The time for HW getting beacon content before TBTT. - * [7:4]: Reserved. - * [19:8]: TBTT prohibit hold in unit of 32us. The time for HW holding to send the beacon packet. - * [23:20]: Reserved - * Description: - * | - * |<--Setup--|--Hold------------>| - * --------------|---------------------- - * | - * TBTT - * Note: We cannot update beacon content to HW or send any AC packets during the time between Setup and Hold. - * Described by Designer Tim and Bruce, 2011-01-14. - * */ -#define REG_TBTT_PROHIBIT_8723D 0x0540 -#define REG_RD_NAV_NXT_8723D 0x0544 -#define REG_NAV_PROT_LEN_8723D 0x0546 -#define REG_BCN_CTRL_8723D 0x0550 -#define REG_BCN_CTRL_1_8723D 0x0551 -#define REG_MBID_NUM_8723D 0x0552 -#define REG_DUAL_TSF_RST_8723D 0x0553 -#define REG_BCN_INTERVAL_8723D 0x0554 -#define REG_DRVERLYINT_8723D 0x0558 -#define REG_BCNDMATIM_8723D 0x0559 -#define REG_ATIMWND_8723D 0x055A -#define REG_USTIME_TSF_8723D 0x055C -#define REG_BCN_MAX_ERR_8723D 0x055D -#define REG_RXTSF_OFFSET_CCK_8723D 0x055E -#define REG_RXTSF_OFFSET_OFDM_8723D 0x055F -#define REG_TSFTR_8723D 0x0560 -#define REG_CTWND_8723D 0x0572 -#define REG_SECONDARY_CCA_CTRL_8723D 0x0577 -#define REG_PSTIMER_8723D 0x0580 -#define REG_TIMER0_8723D 0x0584 -#define REG_TIMER1_8723D 0x0588 -#define REG_ACMHWCTRL_8723D 0x05C0 -#define REG_SCH_TXCMD_8723D 0x05F8 - -/* ----------------------------------------------------- - * - * 0x0600h ~ 0x07FFh WMAC Configuration - * - * ----------------------------------------------------- */ -#define REG_MAC_CR_8723D 0x0600 -#define REG_TCR_8723D 0x0604 -#define REG_RCR_8723D 0x0608 -#define REG_RX_PKT_LIMIT_8723D 0x060C -#define REG_RX_DLK_TIME_8723D 0x060D -#define REG_RX_DRVINFO_SZ_8723D 0x060F - -#define REG_MACID_8723D 0x0610 -#define REG_BSSID_8723D 0x0618 -#define REG_MAR_8723D 0x0620 -#define REG_MBIDCAMCFG_8723D 0x0628 -#define REG_WOWLAN_GTK_DBG1 0x630 -#define REG_WOWLAN_GTK_DBG2 0x634 - -#define REG_USTIME_EDCA_8723D 0x0638 -#define REG_MAC_SPEC_SIFS_8723D 0x063A -#define REG_RESP_SIFP_CCK_8723D 0x063C -#define REG_RESP_SIFS_OFDM_8723D 0x063E -#define REG_ACKTO_8723D 0x0640 -#define REG_CTS2TO_8723D 0x0641 -#define REG_EIFS_8723D 0x0642 - -#define REG_NAV_UPPER_8723D 0x0652 /* unit of 128 */ -#define REG_TRXPTCL_CTL_8723D 0x0668 - -/* Security */ -#define REG_CAMCMD_8723D 0x0670 -#define REG_CAMWRITE_8723D 0x0674 -#define REG_CAMREAD_8723D 0x0678 -#define REG_CAMDBG_8723D 0x067C -#define REG_SECCFG_8723D 0x0680 - -/* Power */ -#define REG_WOW_CTRL_8723D 0x0690 -#define REG_PS_RX_INFO_8723D 0x0692 -#define REG_UAPSD_TID_8723D 0x0693 -#define REG_WKFMCAM_CMD_8723D 0x0698 -#define REG_WKFMCAM_NUM_8723D 0x0698 -#define REG_WKFMCAM_RWD_8723D 0x069C -#define REG_RXFLTMAP0_8723D 0x06A0 -#define REG_RXFLTMAP1_8723D 0x06A2 -#define REG_RXFLTMAP2_8723D 0x06A4 -#define REG_BCN_PSR_RPT_8723D 0x06A8 -#define REG_BT_COEX_TABLE_8723D 0x06C0 -#define REG_BFMER0_INFO_8723D 0x06E4 -#define REG_BFMER1_INFO_8723D 0x06EC -#define REG_CSI_RPT_PARAM_BW20_8723D 0x06F4 -#define REG_CSI_RPT_PARAM_BW40_8723D 0x06F8 -#define REG_CSI_RPT_PARAM_BW80_8723D 0x06FC - -/* Hardware Port 2 */ -#define REG_MACID1_8723D 0x0700 -#define REG_BSSID1_8723D 0x0708 -#define REG_BFMEE_SEL_8723D 0x0714 -#define REG_SND_PTCL_CTRL_8723D 0x0718 - -/* LTR */ -#define REG_LTR_CTRL_BASIC_8723D 0x07A4 -#define REG_LTR_IDLE_LATENCY_V1_8723D 0x0798 -#define REG_LTR_ACTIVE_LATENCY_V1_8723D 0x079C - -/* LTE_COEX */ -#define REG_LTECOEX_CTRL 0x07C0 -#define REG_LTECOEX_WRITE_DATA 0x07C4 -#define REG_LTECOEX_READ_DATA 0x07C8 -#define REG_LTECOEX_PATH_CONTROL 0x70 - -/* ************************************************************ - * SDIO Bus Specification - * ************************************************************ */ - -/* ----------------------------------------------------- - * SDIO CMD Address Mapping - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * I/O bus domain (Host) - * ----------------------------------------------------- */ - -/* ----------------------------------------------------- - * SDIO register - * ----------------------------------------------------- */ -#define SDIO_REG_HCPWM1_8723D 0x025 /* HCI Current Power Mode 1 */ - - -/* **************************************************************************** - * 8723 Regsiter Bit and Content definition - * **************************************************************************** */ - -#define BIT_USB_RXDMA_AGG_EN BIT(31) -#define RXDMA_AGG_MODE_EN BIT(1) - -#ifdef CONFIG_WOWLAN - #define RXPKT_RELEASE_POLL BIT(16) - #define RXDMA_IDLE BIT(17) - #define RW_RELEASE_EN BIT(18) -#endif - -/* 2 HSISR - * interrupt mask which needs to clear */ -#define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\ - HSISR_SPS_OCP_INT |\ - HSISR_RON_INT |\ - HSISR_PDNINT |\ - HSISR_GPIO9_INT) - -#ifdef CONFIG_RF_POWER_TRIM - #ifdef CONFIG_RTL8723D - #define EEPROM_RF_GAIN_OFFSET 0xC1 - #endif - - #define EEPROM_RF_GAIN_VAL 0x1F6 -#endif /*CONFIG_RF_POWER_TRIM*/ - -#ifdef CONFIG_PCI_HCI - /* #define IMR_RX_MASK (IMR_ROK_8723D|IMR_RDU_8723D|IMR_RXFOVW_8723D) */ - #define IMR_TX_MASK (IMR_VODOK_8723D | IMR_VIDOK_8723D | IMR_BEDOK_8723D | IMR_BKDOK_8723D | IMR_MGNTDOK_8723D | IMR_HIGHDOK_8723D) - - #define RT_BCN_INT_MASKS (IMR_BCNDMAINT0_8723D | IMR_TXBCN0OK_8723D | IMR_TXBCN0ERR_8723D | IMR_BCNDERR0_8723D) - - #define RT_AC_INT_MASKS (IMR_VIDOK_8723D | IMR_VODOK_8723D | IMR_BEDOK_8723D | IMR_BKDOK_8723D) -#endif - -#endif /* __RTL8723D_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_sreset.h deleted file mode 100644 index db75dba73e32b5..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_sreset.h +++ /dev/null @@ -1,24 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8723D_SRESET_H_ -#define _RTL8723D_SRESET_H_ - -#include - -#ifdef DBG_CONFIG_ERROR_DETECT - extern void rtl8723d_sreset_xmit_status_check(_adapter *padapter); - extern void rtl8723d_sreset_linked_status_check(_adapter *padapter); -#endif -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_xmit.h deleted file mode 100644 index b1636ad32e5fc6..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8723d_xmit.h +++ /dev/null @@ -1,523 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8723D_XMIT_H__ -#define __RTL8723D_XMIT_H__ - - -#define MAX_TID (15) - - -#ifndef __INC_HAL8723DDESC_H -#define __INC_HAL8723DDESC_H - -#define RX_STATUS_DESC_SIZE_8723D 24 -#define RX_DRV_INFO_SIZE_UNIT_8723D 8 - - -/* DWORD 0 */ -#define SET_RX_STATUS_DESC_PKT_LEN_8723D(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value) -#define SET_RX_STATUS_DESC_EOR_8723D(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value) -#define SET_RX_STATUS_DESC_OWN_8723D(__pRxStatusDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value) - -#define GET_RX_STATUS_DESC_PKT_LEN_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14) -#define GET_RX_STATUS_DESC_CRC32_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1) -#define GET_RX_STATUS_DESC_ICV_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1) -#define GET_RX_STATUS_DESC_DRVINFO_SIZE_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4) -#define GET_RX_STATUS_DESC_SECURITY_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3) -#define GET_RX_STATUS_DESC_QOS_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1) -#define GET_RX_STATUS_DESC_SHIFT_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2) -#define GET_RX_STATUS_DESC_PHY_STATUS_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1) -#define GET_RX_STATUS_DESC_SWDEC_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1) -#define GET_RX_STATUS_DESC_EOR_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1) -#define GET_RX_STATUS_DESC_OWN_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1) - -/* DWORD 1 */ -#define GET_RX_STATUS_DESC_MACID_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7) -#define GET_RX_STATUS_DESC_TID_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4) -#define GET_RX_STATUS_DESC_AMSDU_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1) -#define GET_RX_STATUS_DESC_RXID_MATCH_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1) -#define GET_RX_STATUS_DESC_PAGGR_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1) -#define GET_RX_STATUS_DESC_A1_FIT_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4) -#define GET_RX_STATUS_DESC_CHKERR_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1) -#define GET_RX_STATUS_DESC_IPVER_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1) -#define GET_RX_STATUS_DESC_IS_TCPUDP__8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1) -#define GET_RX_STATUS_DESC_CHK_VLD_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1) -#define GET_RX_STATUS_DESC_PAM_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1) -#define GET_RX_STATUS_DESC_PWR_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1) -#define GET_RX_STATUS_DESC_MORE_DATA_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1) -#define GET_RX_STATUS_DESC_MORE_FRAG_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1) -#define GET_RX_STATUS_DESC_TYPE_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2) -#define GET_RX_STATUS_DESC_MC_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1) -#define GET_RX_STATUS_DESC_BC_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1) - -/* DWORD 2 */ -#define GET_RX_STATUS_DESC_SEQ_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12) -#define GET_RX_STATUS_DESC_FRAG_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4) -#define GET_RX_STATUS_DESC_RX_IS_QOS_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1) -#define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6) -#define GET_RX_STATUS_DESC_RPT_SEL_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1) -#define GET_RX_STATUS_DESC_FCS_OK_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1) - -/* DWORD 3 */ -#define GET_RX_STATUS_DESC_RX_RATE_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7) -#define GET_RX_STATUS_DESC_HTC_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1) -#define GET_RX_STATUS_DESC_EOSP_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1) -#define GET_RX_STATUS_DESC_BSSID_FIT_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2) -#ifdef CONFIG_USB_RX_AGGREGATION -#define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8) -#endif -#define GET_RX_STATUS_DESC_PATTERN_MATCH_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1) -#define GET_RX_STATUS_DESC_UNICAST_MATCH_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1) -#define GET_RX_STATUS_DESC_MAGIC_MATCH_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1) - -/* DWORD 6 */ -#define GET_RX_STATUS_DESC_MATCH_ID_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7) - -/* DWORD 5 */ -#define GET_RX_STATUS_DESC_TSFL_8723D(__pRxStatusDesc) \ - LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32) - -#define GET_RX_STATUS_DESC_BUFF_ADDR_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+24, 0, 32) -#define GET_RX_STATUS_DESC_BUFF_ADDR64_8723D(__pRxDesc) \ - LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32) - -#define SET_RX_STATUS_DESC_BUFF_ADDR_8723D(__pRxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pRxDesc+24, 0, 32, __Value) - - -/* Dword 0, rsvd: bit26, bit28 */ -#define GET_TX_DESC_OWN_8723D(__pTxDesc)\ - LE_BITS_TO_4BYTE(__pTxDesc, 31, 1) - -#define SET_TX_DESC_PKT_SIZE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value) -#define SET_TX_DESC_OFFSET_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value) -#define SET_TX_DESC_BMC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value) -#define SET_TX_DESC_HTC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value) -#define SET_TX_DESC_AMSDU_PAD_EN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value) -#define SET_TX_DESC_NO_ACM_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value) -#define SET_TX_DESC_GF_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value) - -/* Dword 1 */ -#define SET_TX_DESC_MACID_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value) -#define SET_TX_DESC_QUEUE_SEL_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value) -#define SET_TX_DESC_RDG_NAV_EXT_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value) -#define SET_TX_DESC_LSIG_TXOP_EN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value) -#define SET_TX_DESC_PIFS_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value) -#define SET_TX_DESC_RATE_ID_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value) -#define SET_TX_DESC_EN_DESC_ID_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value) -#define SET_TX_DESC_SEC_TYPE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value) -#define SET_TX_DESC_PKT_OFFSET_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value) -#define SET_TX_DESC_MORE_DATA_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value) - -/* Dword 2 remove P_AID, G_ID field*/ -#define SET_TX_DESC_CCA_RTS_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value) -#define SET_TX_DESC_AGG_ENABLE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value) -#define SET_TX_DESC_RDG_ENABLE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value) -#define SET_TX_DESC_NULL0_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value) -#define SET_TX_DESC_NULL1_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value) -#define SET_TX_DESC_BK_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value) -#define SET_TX_DESC_MORE_FRAG_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value) -#define SET_TX_DESC_RAW_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value) -#define SET_TX_DESC_CCX_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value) -#define SET_TX_DESC_AMPDU_DENSITY_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value) -#define SET_TX_DESC_BT_INT_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value) -#define SET_TX_DESC_FTM_EN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 30, 1, __Value) - -/* Dword 3 */ -#define SET_TX_DESC_HWSEQ_SEL_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value) -#define SET_TX_DESC_USE_RATE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value) -#define SET_TX_DESC_DISABLE_RTS_FB_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value) -#define SET_TX_DESC_DISABLE_FB_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value) -#define SET_TX_DESC_CTS2SELF_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value) -#define SET_TX_DESC_RTS_ENABLE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value) -#define SET_TX_DESC_HW_RTS_ENABLE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value) -#define SET_TX_DESC_PORT_ID_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 2, __Value) -#define SET_TX_DESC_NAV_USE_HDR_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value) -#define SET_TX_DESC_USE_MAX_LEN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value) -#define SET_TX_DESC_MAX_AGG_NUM_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value) -#define SET_TX_DESC_AMPDU_MAX_TIME_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value) - -/* Dword 4 */ -#define SET_TX_DESC_TX_RATE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value) -#define SET_TX_DESC_TX_TRY_RATE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value) -#define SET_TX_DESC_DATA_RATE_FB_LIMIT_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value) -#define SET_TX_DESC_RTS_RATE_FB_LIMIT_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value) -#define SET_TX_DESC_RETRY_LIMIT_ENABLE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value) -#define SET_TX_DESC_DATA_RETRY_LIMIT_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value) -#define SET_TX_DESC_RTS_RATE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value) -#define SET_TX_DESC_PCTS_EN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value) -#define SET_TX_DESC_PCTS_MASK_IDX_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value) - -/* Dword 5 */ -#define SET_TX_DESC_DATA_SC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value) -#define SET_TX_DESC_DATA_SHORT_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value) -#define SET_TX_DESC_DATA_BW_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value) -#define SET_TX_DESC_DATA_STBC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value) -#define SET_TX_DESC_RTS_STBC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value) -#define SET_TX_DESC_RTS_SHORT_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value) -#define SET_TX_DESC_RTS_SC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value) -#define SET_TX_DESC_PATH_A_EN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value) -#define SET_TX_DESC_TXPWR_OF_SET_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value) - -/* Dword 6 */ -#define SET_TX_DESC_SW_DEFINE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value) -#define SET_TX_DESC_MBSSID_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value) -#define SET_TX_DESC_RF_SEL_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value) - -/* Dword 7 */ -#ifdef CONFIG_PCI_HCI -#define SET_TX_DESC_TX_BUFFER_SIZE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#ifdef CONFIG_USB_HCI -#define SET_TX_DESC_TX_DESC_CHECKSUM_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value) -#endif - -#ifdef CONFIG_SDIO_HCI -#define SET_TX_DESC_TX_TIMESTAMP_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value) -#endif - -#define SET_TX_DESC_USB_TXAGG_NUM_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value) - -/* Dword 8 */ -#define SET_TX_DESC_RTS_RC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value) -#define SET_TX_DESC_BAR_RC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value) -#define SET_TX_DESC_DATA_RC_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value) -#define SET_TX_DESC_HWSEQ_EN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value) -#define SET_TX_DESC_NEXTHEADPAGE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value) -#define SET_TX_DESC_TAILPAGE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value) - -/* Dword 9 */ -#define SET_TX_DESC_PADDING_LEN_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value) -#define SET_TX_DESC_SEQ_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value) -#define SET_TX_DESC_FINAL_DATA_RATE_8723D(__pTxDesc, __Value) \ - SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value) - - -#define SET_EARLYMODE_PKTNUM_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value) -#define SET_EARLYMODE_LEN0_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value) -#define SET_EARLYMODE_LEN1_1_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value) -#define SET_EARLYMODE_LEN1_2_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value) -#define SET_EARLYMODE_LEN2_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15, __Value) -#define SET_EARLYMODE_LEN3_8723D(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value) - - -/*-----------------------------------------------------------------*/ -/* RTL8723D TX BUFFER DESC */ -/*-----------------------------------------------------------------*/ -#ifdef CONFIG_64BIT_DMA - #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu) - #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu) - #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu) - #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu) -#else - #define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu) - #define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu) - #define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu) - #define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) /* 64 BIT mode only */ -#endif -/* ********************************************************* */ - -/* 64 bits -- 32 bits */ -/* ======= ======= */ -/* Dword 0 0 */ -#define SET_TX_BUFF_DESC_LEN_0_8723D(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu) -#define SET_TX_BUFF_DESC_PSB_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value) -#define SET_TX_BUFF_DESC_OWN_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value) - -/* Dword 1 1 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_0_8723D(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value) -#define GET_TX_BUFF_DESC_ADDR_LOW_0_8723D(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32) -/* Dword 2 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value) -#ifdef CONFIG_64BIT_DMA - #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32) -#else - #define GET_TX_BUFF_DESC_ADDR_HIGH_0_8723D(__pTxDesc) 0 -#endif -/* Dword 3 NA */ -/* RESERVED 0 */ -/* Dword 4 2 */ -#define SET_TX_BUFF_DESC_LEN_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value) -#define SET_TX_BUFF_DESC_AMSDU_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 5 3 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 6 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_1_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value) -/* Dword 7 NA */ -/*RESERVED 0 */ -/* Dword 8 4 */ -#define SET_TX_BUFF_DESC_LEN_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value) -#define SET_TX_BUFF_DESC_AMSDU_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 9 5 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 10 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_2_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value) -/* Dword 11 NA */ -/*RESERVED 0 */ -/* Dword 12 6 */ -#define SET_TX_BUFF_DESC_LEN_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value) -#define SET_TX_BUFF_DESC_AMSDU_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 13 7 */ -#define SET_TX_BUFF_DESC_ADDR_LOW_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 14 NA */ -#define SET_TX_BUFF_DESC_ADDR_HIGH_3_8723D(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value) -/* Dword 15 NA */ -/*RESERVED 0 */ - - -#endif -/* ----------------------------------------------------------- - * - * Rate - * - * ----------------------------------------------------------- - * CCK Rates, TxHT = 0 */ -#define DESC8723D_RATE1M 0x00 -#define DESC8723D_RATE2M 0x01 -#define DESC8723D_RATE5_5M 0x02 -#define DESC8723D_RATE11M 0x03 - -/* OFDM Rates, TxHT = 0 */ -#define DESC8723D_RATE6M 0x04 -#define DESC8723D_RATE9M 0x05 -#define DESC8723D_RATE12M 0x06 -#define DESC8723D_RATE18M 0x07 -#define DESC8723D_RATE24M 0x08 -#define DESC8723D_RATE36M 0x09 -#define DESC8723D_RATE48M 0x0a -#define DESC8723D_RATE54M 0x0b - -/* MCS Rates, TxHT = 1 */ -#define DESC8723D_RATEMCS0 0x0c -#define DESC8723D_RATEMCS1 0x0d -#define DESC8723D_RATEMCS2 0x0e -#define DESC8723D_RATEMCS3 0x0f -#define DESC8723D_RATEMCS4 0x10 -#define DESC8723D_RATEMCS5 0x11 -#define DESC8723D_RATEMCS6 0x12 -#define DESC8723D_RATEMCS7 0x13 -#define DESC8723D_RATEMCS8 0x14 -#define DESC8723D_RATEMCS9 0x15 -#define DESC8723D_RATEMCS10 0x16 -#define DESC8723D_RATEMCS11 0x17 -#define DESC8723D_RATEMCS12 0x18 -#define DESC8723D_RATEMCS13 0x19 -#define DESC8723D_RATEMCS14 0x1a -#define DESC8723D_RATEMCS15 0x1b -#define DESC8723D_RATEVHTSS1MCS0 0x2c -#define DESC8723D_RATEVHTSS1MCS1 0x2d -#define DESC8723D_RATEVHTSS1MCS2 0x2e -#define DESC8723D_RATEVHTSS1MCS3 0x2f -#define DESC8723D_RATEVHTSS1MCS4 0x30 -#define DESC8723D_RATEVHTSS1MCS5 0x31 -#define DESC8723D_RATEVHTSS1MCS6 0x32 -#define DESC8723D_RATEVHTSS1MCS7 0x33 -#define DESC8723D_RATEVHTSS1MCS8 0x34 -#define DESC8723D_RATEVHTSS1MCS9 0x35 -#define DESC8723D_RATEVHTSS2MCS0 0x36 -#define DESC8723D_RATEVHTSS2MCS1 0x37 -#define DESC8723D_RATEVHTSS2MCS2 0x38 -#define DESC8723D_RATEVHTSS2MCS3 0x39 -#define DESC8723D_RATEVHTSS2MCS4 0x3a -#define DESC8723D_RATEVHTSS2MCS5 0x3b -#define DESC8723D_RATEVHTSS2MCS6 0x3c -#define DESC8723D_RATEVHTSS2MCS7 0x3d -#define DESC8723D_RATEVHTSS2MCS8 0x3e -#define DESC8723D_RATEVHTSS2MCS9 0x3f - - -#define RX_HAL_IS_CCK_RATE_8723D(pDesc)\ - (GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE1M || \ - GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE2M || \ - GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE5_5M || \ - GET_RX_STATUS_DESC_RX_RATE_8723D(pDesc) == DESC8723D_RATE11M) - -#ifdef CONFIG_TRX_BD_ARCH - struct tx_desc; -#endif - -void rtl8723d_cal_txdesc_chksum(struct tx_desc *ptxdesc); -void rtl8723d_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem); -void rtl8723d_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8723d_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8723d_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc); -void rtl8723d_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame); - -#if defined(CONFIG_CONCURRENT_MODE) - void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc); -#endif -void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc); - -#if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - s32 rtl8723ds_init_xmit_priv(PADAPTER padapter); - void rtl8723ds_free_xmit_priv(PADAPTER padapter); - s32 rtl8723ds_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8723ds_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8723ds_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - s32 rtl8723ds_xmit_buf_handler(PADAPTER padapter); - thread_return rtl8723ds_xmit_thread(thread_context context); - #define hal_xmit_handler rtl8723ds_xmit_buf_handler -#endif - -#ifdef CONFIG_USB_HCI - s32 rtl8723du_xmit_buf_handler(PADAPTER padapter); - #define hal_xmit_handler rtl8723du_xmit_buf_handler - s32 rtl8723du_init_xmit_priv(PADAPTER padapter); - void rtl8723du_free_xmit_priv(PADAPTER padapter); - s32 rtl8723du_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8723du_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8723du_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8723du_xmit_tasklet(void *priv); - s32 rtl8723du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); - void _dbg_dump_tx_info(_adapter *padapter, int frame_tag, struct tx_desc *ptxdesc); -#endif - -#ifdef CONFIG_PCI_HCI - s32 rtl8723de_init_xmit_priv(PADAPTER padapter); - void rtl8723de_free_xmit_priv(PADAPTER padapter); - struct xmit_buf *rtl8723de_dequeue_xmitbuf(struct rtw_tx_ring *ring); - void rtl8723de_xmitframe_resume(_adapter *padapter); - s32 rtl8723de_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe); - s32 rtl8723de_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe); - s32 rtl8723de_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); - void rtl8723de_xmit_tasklet(void *priv); -#endif - -u8 BWMapping_8723D(PADAPTER Adapter, struct pkt_attrib *pattrib); -u8 SCMapping_8723D(PADAPTER Adapter, struct pkt_attrib *pattrib); - -#endif diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8812a_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8812a_sreset.h index d4bbd5867b249b..13cbf5f25c3e56 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8812a_sreset.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtl8812a_sreset.h @@ -12,7 +12,7 @@ * more details. * *****************************************************************************/ -#ifndef _RTL88812A_SRESET_H_ +#ifndef _RTL8812A_SRESET_H_ #define _RTL8812A_SRESET_H_ #include diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_cmd.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_hal.h old mode 100755 new mode 100644 index aa7b4984b86b88..9670d36f012057 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_hal.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_hal.h @@ -32,11 +32,11 @@ #ifdef DBG_CONFIG_ERROR_DETECT #include "rtl8814a_sreset.h" #endif /* DBG_CONFIG_ERROR_DETECT */ - +/* enum { VOLTAGE_V25 = 0x03, LDOE25_SHIFT = 28 , -}; +};*/ /* max. iram is 64k , max dmen is 32k. Total = 96k = 0x18000*/ #define FW_SIZE 0x18000 #define FW_START_ADDRESS 0x1000 diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_recv.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_spec.h old mode 100755 new mode 100644 index 917b96178d6684..fd5fb0403a1e3e --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_spec.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_spec.h @@ -645,4 +645,12 @@ So the following defines for 92C is not entire!!!!!! #define LAST_ENTRY_OF_TX_PKT_BUFFER_8814A (2048-1) /* 20130415 KaiYuan add for 8814 */ +#define MACID_NUM_8814A 128 +#define SEC_CAM_ENT_NUM_8814A 64 +#define HW_PORT_NUM_8814A 5 +#define NSS_NUM_8814A 3 +#define BAND_CAP_8814A (BAND_CAP_2G | BAND_CAP_5G) +#define BW_CAP_8814A (BW_CAP_20M | BW_CAP_40M | BW_CAP_80M) +#define PROTO_CAP_8814A (PROTO_CAP_11B | PROTO_CAP_11G | PROTO_CAP_11N | PROTO_CAP_11AC) + #endif /* __RTL8814A_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_sreset.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_sreset.h index d65cb98a530ea5..f5770c65b249b2 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_sreset.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_sreset.h @@ -12,7 +12,7 @@ * more details. * *****************************************************************************/ -#ifndef _RTL88814A_SRESET_H_ +#ifndef _RTL8814A_SRESET_H_ #define _RTL8814A_SRESET_H_ #include diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8814a_xmit.h old mode 100755 new mode 100644 diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_hal.h deleted file mode 100644 index 41d222ef34d9a0..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_hal.h +++ /dev/null @@ -1,84 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8821C_HAL_H_ -#define _RTL8821C_HAL_H_ - -#include /* BIT(x) */ -#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ -#include "hal_data.h" -#include "rtl8821c_spec.h" -#include "../hal/rtl8821c/hal8821c_fw.h" - -#ifdef CONFIG_USB_HCI -#include -#endif -#ifdef CONFIG_SDIO_HCI -#include -#endif -#ifdef CONFIG_PCI_HCI -#include -#endif - -#ifdef CONFIG_SUPPORT_TRX_SHARED -#define FIFO_BLOCK_SIZE 32768 /*@Block size = 32K*/ -#define RX_FIFO_EXPANDING (1 * FIFO_BLOCK_SIZE) -#else -#define RX_FIFO_EXPANDING 0 -#endif - - -#if defined(CONFIG_USB_HCI) - - #ifndef MAX_RECVBUF_SZ - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - /* 8821C - RX FIFO :16K ,for RX agg DMA mode = 16K, Rx agg USB mode could large than 16k*/ - /* #define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING)*/ - /* For Max throughput issue , need to use USB AGG mode to replace DMA AGG mode*/ - #define MAX_RECVBUF_SZ (32768) - - /*#define MAX_RECVBUF_SZ_8821C (24576)*/ /* 24k*/ - /*#define MAX_RECVBUF_SZ_8821C (20480)*/ /*20K*/ - /*#define MAX_RECVBUF_SZ_8821C (10240) */ /*10K*/ - /*#define MAX_RECVBUF_SZ_8821C (15360)*/ /*15k < 16k*/ - /*#define MAX_RECVBUF_SZ_8821C (8192+1024)*/ /* 8K+1k*/ - #else - #define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */ - #endif - #endif/* !MAX_RECVBUF_SZ*/ - -#elif defined(CONFIG_PCI_HCI) - /*#ifndef CONFIG_MINIMAL_MEMORY_USAGE - #define MAX_RECVBUF_SZ (9100) - #else*/ - #define MAX_RECVBUF_SZ (4096 + RX_FIFO_EXPANDING) /* about 4K */ - /*#endif*/ - -#elif defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) - #define MAX_RECVBUF_SZ (16384 + RX_FIFO_EXPANDING) -#endif - -void init_hal_spec_rtl8821c(PADAPTER); -/* MP Functions */ -#ifdef CONFIG_MP_INCLUDED -void rtl8821c_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ -void rtl8821c_mp_config_rfpath(PADAPTER); /* hal_mp.c */ -#endif -void rtl8821c_dl_rsvd_page(PADAPTER adapter, u8 mstatus); - -#ifdef CONFIG_PCI_HCI -u16 get_txbd_rw_reg(u16 q_idx); -#endif - -#endif /* _RTL8821C_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_spec.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_spec.h deleted file mode 100644 index 91b69b8f32d97f..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821c_spec.h +++ /dev/null @@ -1,202 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef __RTL8821C_SPEC_H__ -#define __RTL8821C_SPEC_H__ - -#define EFUSE_MAP_SIZE HALMAC_EFUSE_SIZE_8821C - -/* - * MAC Register definition - */ -#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8821C /* hal_com.c & phydm */ -#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8821C /* hal_com.c & phydm */ -#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8821C /* phydm only */ -#define REG_LEDCFG0 REG_LED_CFG_8821C /* rtw_mp.c */ -#define MSR (REG_CR_8821C + 2) /* rtw_mp.c */ -#define MSR1 REG_CR_EXT_8821C /* rtw_mp.c & hal_com.c */ -#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ -#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ -#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8821C/* hal_com.c */ - -#define REG_WOWLAN_WAKE_REASON 0x01C7 -#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8821C - -/* RXERR_RPT, for rtw_mp.c */ -#define RXERR_TYPE_OFDM_PPDU 0 -#define RXERR_TYPE_OFDM_FALSE_ALARM 2 -#define RXERR_TYPE_OFDM_MPDU_OK 0 -#define RXERR_TYPE_OFDM_MPDU_FAIL 1 -#define RXERR_TYPE_CCK_PPDU 3 -#define RXERR_TYPE_CCK_FALSE_ALARM 5 -#define RXERR_TYPE_CCK_MPDU_OK 3 -#define RXERR_TYPE_CCK_MPDU_FAIL 4 -#define RXERR_TYPE_HT_PPDU 8 -#define RXERR_TYPE_HT_FALSE_ALARM 9 -#define RXERR_TYPE_HT_MPDU_TOTAL 6 -#define RXERR_TYPE_HT_MPDU_OK 6 -#define RXERR_TYPE_HT_MPDU_FAIL 7 -#define RXERR_TYPE_RX_FULL_DROP 10 - -#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8821C -#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8821C -#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8821C(type) \ - | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8821C : 0)) - -/* - * BB Register definition - */ -#define rPMAC_Reset 0x100 /* hal_mp.c */ - -#define rFPGA0_RFMOD 0x800 -#define rFPGA0_TxInfo 0x804 -#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ -#define rFPGA0_TxGainStage 0x80C /* phydm only */ -#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ -#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ -#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ -#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ -#define rTxAGC_B_Mcs03_Mcs00 0x83C -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84C -#define rFPGA0_XA_RFInterfaceOE 0x860 -#define rFPGA0_XB_RFInterfaceOE 0x864 -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86C -#define rFPGA0_XAB_RFInterfaceSW 0x870 -#define rFPGA0_XAB_RFParameter 0x878 -#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ -#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ -#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8821c_phy.c) */ - -#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ -#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ - -#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ -#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ - -#define rCCK0_System 0xA00 -#define rCCK0_AFESetting 0xA04 - -#define rCCK0_DSPParameter2 0xA1C -#define rCCK0_TxFilter1 0xA20 -#define rCCK0_TxFilter2 0xA24 -#define rCCK0_DebugPort 0xA28 -#define rCCK0_FalseAlarmReport 0xA2C - -#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ -#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ - -#define rOFDM0_TRxPathEnable 0xC04 -#define rOFDM0_TRMuxPar 0xC08 -#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ -#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ -#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ -#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ -#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ -#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ -#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ -#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */ -/* RFE */ -#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ -#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ -#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ -#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ -#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ -#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ -#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -#define bMask_RFEInv_Jaguar 0x3FF00000 -#define bMask_AntselPathFollow_Jaguar 0x00030000 - -#define rOFDM1_LSTF 0xD00 -#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ -#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8821c_phy.c) */ -#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8821c_phy.c) */ -#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8821c_phy.c) */ -#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8821c_phy.c) */ - -#define rTxAGC_A_Rate18_06 0xE00 -#define rTxAGC_A_Rate54_24 0xE04 -#define rTxAGC_A_CCK1_Mcs32 0xE08 -#define rTxAGC_A_Mcs03_Mcs00 0xE10 -#define rTxAGC_A_Mcs07_Mcs04 0xE14 -#define rTxAGC_A_Mcs11_Mcs08 0xE18 -#define rTxAGC_A_Mcs15_Mcs12 0xE1C -#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ -#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ -#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8821c_phy.c) */ - -/* Page1(0x100) */ -#define bBBResetB 0x100 - -/* Page8(0x800) */ -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 -/* Reg 0x80C rFPGA0_TxGainStage */ -#define bXBTxAGC 0xF00 -#define bXCTxAGC 0xF000 -#define bXDTxAGC 0xF0000 - -/* PageA(0xA00) */ -#define bCCKBBMode 0x3 - -#define bCCKScramble 0x8 -#define bCCKTxRate 0x3000 - -/* General */ -#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ -#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ -#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ -#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ -#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ -#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ -#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ - -#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ -#define bDisable 0x0 /* rtw_mp.c */ - -#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ - -#define Rx_Smooth_Factor 20 /* phydm only */ - -/* - * RF Register definition - */ -#define RF_AC 0x00 -#define RF_AC_Jaguar 0x00 /* hal_mp.c */ -#define RF_CHNLBW 0x18 /* rtl8821c_phy.c */ -#define RF_0x52 0x52 - -struct hw_port_reg { - u32 net_type; /*reg_offset*/ - u8 net_type_shift; - u32 macaddr; /*reg_offset*/ - u32 bssid; /*reg_offset*/ - u32 bcn_ctl; /*reg_offset*/ - u32 tsf_rst; /*reg_offset*/ - u8 tsf_rst_bit; - u32 bcn_space; /*reg_offset*/ - u8 bcn_space_shift; - u16 bcn_space_mask; - u32 ps_aid; /*reg_offset*/ - u32 ta; /*reg_offset*/ -}; - -#endif /* __RTL8192E_SPEC_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821ce_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8821ce_hal.h deleted file mode 100755 index 426002a30c9a19..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821ce_hal.h +++ /dev/null @@ -1,23 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8821CE_HAL_H_ -#define _RTL8821CE_HAL_H_ - -#include /* PADAPTER */ - -/* rtl8821ce_ops.c */ -void rtl8821ce_set_hal_ops(PADAPTER); - -#endif /* _RTL8821CE_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821cs_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8821cs_hal.h deleted file mode 100644 index ceecc15f966d86..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821cs_hal.h +++ /dev/null @@ -1,23 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8821CS_HAL_H_ -#define _RTL8821CS_HAL_H_ - -#include /* PADAPTER */ - -/* rtl8821cs_ops.c */ -u8 rtl8821cs_set_hal_ops(PADAPTER); - -#endif /* _RTL8821CS_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821cu_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8821cu_hal.h deleted file mode 100644 index aec437224c73c1..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8821cu_hal.h +++ /dev/null @@ -1,24 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2016 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8821CU_HAL_H_ -#define _RTL8821CU_HAL_H_ - -#include /* PADAPTER */ - -/* rtl8821cu_ops.c */ -u8 rtl8821cu_set_hal_ops(PADAPTER); -void rtl8821cu_set_hw_type(struct dvobj_priv *pdvobj); - -#endif /* _RTL8821CU_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822b_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8822b_hal.h deleted file mode 100644 index 5ccf7990f168a5..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822b_hal.h +++ /dev/null @@ -1,230 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2015 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8822B_HAL_H_ -#define _RTL8822B_HAL_H_ - -#include /* BIT(x) */ -#include /* PADAPTER */ -#include "../hal/halmac/halmac_api.h" /* MAC REG definition */ - - -#ifdef CONFIG_SUPPORT_TRX_SHARED -#define MAX_RECVBUF_SZ 46080 /* 45KB, TX: (256-64)KB */ -#else /* !CONFIG_SUPPORT_TRX_SHARED */ -#define MAX_RECVBUF_SZ 24576 /* 24KB, TX: 256KB */ -#endif /* !CONFIG_SUPPORT_TRX_SHARED */ - -/* - * MAC Register definition - */ -#define REG_AFE_XTAL_CTRL REG_AFE_CTRL1_8822B /* hal_com.c & phydm */ -#define REG_AFE_PLL_CTRL REG_AFE_CTRL2_8822B /* hal_com.c & phydm */ -#define REG_MAC_PHY_CTRL REG_AFE_CTRL3_8822B /* phydm only */ -#define REG_LEDCFG0 REG_LED_CFG_8822B /* rtw_mp.c */ -#define MSR (REG_CR_8822B + 2) /* rtw_mp.c & hal_com.c */ -#define MSR1 REG_CR_EXT_8822B /* rtw_mp.c & hal_com.c */ -#define REG_C2HEVT_MSG_NORMAL 0x1A0 /* hal_com.c */ -#define REG_C2HEVT_CLEAR 0x1AF /* hal_com.c */ -#define REG_BCN_CTRL_1 REG_BCN_CTRL_CLINT0_8822B /* hal_com.c */ - -#define REG_WOWLAN_WAKE_REASON 0x01C7 /* hal_com.c */ -#define REG_GPIO_PIN_CTRL_2 REG_GPIO_EXT_CTRL_8822B /* hal_com.c */ - -/* RXERR_RPT, for rtw_mp.c */ -#define RXERR_TYPE_OFDM_PPDU 0 -#define RXERR_TYPE_OFDM_FALSE_ALARM 2 -#define RXERR_TYPE_OFDM_MPDU_OK 0 -#define RXERR_TYPE_OFDM_MPDU_FAIL 1 -#define RXERR_TYPE_CCK_PPDU 3 -#define RXERR_TYPE_CCK_FALSE_ALARM 5 -#define RXERR_TYPE_CCK_MPDU_OK 3 -#define RXERR_TYPE_CCK_MPDU_FAIL 4 -#define RXERR_TYPE_HT_PPDU 8 -#define RXERR_TYPE_HT_FALSE_ALARM 9 -#define RXERR_TYPE_HT_MPDU_TOTAL 6 -#define RXERR_TYPE_HT_MPDU_OK 6 -#define RXERR_TYPE_HT_MPDU_FAIL 7 -#define RXERR_TYPE_RX_FULL_DROP 10 - -#define RXERR_COUNTER_MASK BIT_MASK_RPT_COUNTER_8822B -#define RXERR_RPT_RST BIT_RXERR_RPT_RST_8822B -#define _RXERR_RPT_SEL(type) (BIT_RXERR_RPT_SEL_V1_3_0_8822B(type) \ - | ((type & 0x10) ? BIT_RXERR_RPT_SEL_V1_4_8822B : 0)) - -/* - * BB Register definition - */ -#define rPMAC_Reset 0x100 /* hal_mp.c */ - -#define rFPGA0_RFMOD 0x800 -#define rFPGA0_TxInfo 0x804 -#define rOFDMCCKEN_Jaguar 0x808 /* hal_mp.c */ -#define rFPGA0_TxGainStage 0x80C /* phydm only */ -#define rFPGA0_XA_HSSIParameter1 0x820 /* hal_mp.c */ -#define rFPGA0_XA_HSSIParameter2 0x824 /* hal_mp.c */ -#define rFPGA0_XB_HSSIParameter1 0x828 /* hal_mp.c */ -#define rFPGA0_XB_HSSIParameter2 0x82C /* hal_mp.c */ -#define rTxAGC_B_Rate18_06 0x830 -#define rTxAGC_B_Rate54_24 0x834 -#define rTxAGC_B_CCK1_55_Mcs32 0x838 -#define rCCAonSec_Jaguar 0x838 /* hal_mp.c */ -#define rTxAGC_B_Mcs03_Mcs00 0x83C -#define rTxAGC_B_Mcs07_Mcs04 0x848 -#define rTxAGC_B_Mcs11_Mcs08 0x84C -#define rFPGA0_XA_RFInterfaceOE 0x860 -#define rFPGA0_XB_RFInterfaceOE 0x864 -#define rTxAGC_B_Mcs15_Mcs12 0x868 -#define rTxAGC_B_CCK11_A_CCK2_11 0x86C -#define rFPGA0_XAB_RFInterfaceSW 0x870 -#define rFPGA0_XAB_RFParameter 0x878 -#define rFPGA0_AnalogParameter4 0x88C /* hal_mp.c & phydm */ -#define rFPGA0_XB_LSSIReadBack 0x8A4 /* phydm */ -#define rHSSIRead_Jaguar 0x8B0 /* RF read addr (rtl8822b_phy.c) */ - -#define rC_TxScale_Jaguar2 0x181C /* Pah_C TX scaling factor (hal_mp.c) */ -#define rC_IGI_Jaguar2 0x1850 /* Initial Gain for path-C (hal_mp.c) */ - -#define rFPGA1_TxInfo 0x90C /* hal_mp.c */ -#define rSingleTone_ContTx_Jaguar 0x914 /* hal_mp.c */ -/* TX BeamForming */ -#define REG_BB_TX_PATH_SEL_1_8822B 0x93C /* rtl8822b_phy.c */ -#define REG_BB_TX_PATH_SEL_2_8822B 0x940 /* rtl8822b_phy.c */ - -/* TX BeamForming */ -#define REG_BB_TXBF_ANT_SET_BF1_8822B 0x19AC /* rtl8822b_phy.c */ -#define REG_BB_TXBF_ANT_SET_BF0_8822B 0x19B4 /* rtl8822b_phy.c */ - -#define rCCK0_System 0xA00 -#define rCCK0_AFESetting 0xA04 - -#define rCCK0_DSPParameter2 0xA1C -#define rCCK0_TxFilter1 0xA20 -#define rCCK0_TxFilter2 0xA24 -#define rCCK0_DebugPort 0xA28 -#define rCCK0_FalseAlarmReport 0xA2C - -#define rD_TxScale_Jaguar2 0x1A1C /* Path_D TX scaling factor (hal_mp.c) */ -#define rD_IGI_Jaguar2 0x1A50 /* Initial Gain for path-D (hal_mp.c) */ - -#define rOFDM0_TRxPathEnable 0xC04 -#define rOFDM0_TRMuxPar 0xC08 -#define rA_TxScale_Jaguar 0xC1C /* Pah_A TX scaling factor (hal_mp.c) */ -#define rOFDM0_RxDetector1 0xC30 /* rtw_mp.c */ -#define rOFDM0_ECCAThreshold 0xC4C /* phydm only */ -#define rOFDM0_XAAGCCore1 0xC50 /* phydm only */ -#define rA_IGI_Jaguar 0xC50 /* Initial Gain for path-A (hal_mp.c) */ -#define rOFDM0_XBAGCCore1 0xC58 /* phydm only */ -#define rOFDM0_XATxIQImbalance 0xC80 /* phydm only */ -#define rA_LSSIWrite_Jaguar 0xC90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ - -#define rOFDM1_LSTF 0xD00 -#define rOFDM1_TRxPathEnable 0xD04 /* hal_mp.c */ -#define rA_PIRead_Jaguar 0xD04 /* RF readback with PI (rtl8822b_phy.c) */ -#define rA_SIRead_Jaguar 0xD08 /* RF readback with SI (rtl8822b_phy.c) */ -#define rB_PIRead_Jaguar 0xD44 /* RF readback with PI (rtl8822b_phy.c) */ -#define rB_SIRead_Jaguar 0xD48 /* RF readback with SI (rtl8822b_phy.c) */ - -#define rTxAGC_A_Rate18_06 0xE00 -#define rTxAGC_A_Rate54_24 0xE04 -#define rTxAGC_A_CCK1_Mcs32 0xE08 -#define rTxAGC_A_Mcs03_Mcs00 0xE10 -#define rTxAGC_A_Mcs07_Mcs04 0xE14 -#define rTxAGC_A_Mcs11_Mcs08 0xE18 -#define rTxAGC_A_Mcs15_Mcs12 0xE1C -#define rB_TxScale_Jaguar 0xE1C /* Path_B TX scaling factor (hal_mp.c) */ -#define rB_IGI_Jaguar 0xE50 /* Initial Gain for path-B (hal_mp.c) */ -#define rB_LSSIWrite_Jaguar 0xE90 /* RF write addr, LSSI Parameter (rtl8822b_phy.c) */ -/* RFE */ -#define rA_RFE_Pinmux_Jaguar 0xCB0 /* hal_mp.c */ -#define rB_RFE_Pinmux_Jaguar 0xEB0 /* Path_B RFE control pinmux */ -#define rA_RFE_Inv_Jaguar 0xCB4 /* Path_A RFE cotrol */ -#define rB_RFE_Inv_Jaguar 0xEB4 /* Path_B RFE control */ -#define rA_RFE_Jaguar 0xCB8 /* Path_A RFE cotrol */ -#define rB_RFE_Jaguar 0xEB8 /* Path_B RFE control */ -#define rA_RFE_Inverse_Jaguar 0xCBC /* Path_A RFE control inverse */ -#define rB_RFE_Inverse_Jaguar 0xEBC /* Path_B RFE control inverse */ -#define r_ANTSEL_SW_Jaguar 0x900 /* ANTSEL SW Control */ -#define bMask_RFEInv_Jaguar 0x3FF00000 -#define bMask_AntselPathFollow_Jaguar 0x00030000 - -#define rC_RFE_Pinmux_Jaguar 0x18B4 /* Path_C RFE cotrol pinmux*/ -#define rD_RFE_Pinmux_Jaguar 0x1AB4 /* Path_D RFE cotrol pinmux*/ -#define rA_RFE_Sel_Jaguar2 0x1990 - -/* Page1(0x100) */ -#define bBBResetB 0x100 - -/* Page8(0x800) */ -#define bCCKEn 0x1000000 -#define bOFDMEn 0x2000000 -/* Reg 0x80C rFPGA0_TxGainStage */ -#define bXBTxAGC 0xF00 -#define bXCTxAGC 0xF000 -#define bXDTxAGC 0xF0000 - -/* PageA(0xA00) */ -#define bCCKBBMode 0x3 - -#define bCCKScramble 0x8 -#define bCCKTxRate 0x3000 - -/* General */ -#define bMaskByte0 0xFF /* mp, rtw_odm.c & phydm */ -#define bMaskByte1 0xFF00 /* hal_mp.c & phydm */ -#define bMaskByte2 0xFF0000 /* hal_mp.c & phydm */ -#define bMaskByte3 0xFF000000 /* hal_mp.c & phydm */ -#define bMaskHWord 0xFFFF0000 /* hal_com.c, rtw_mp.c */ -#define bMaskLWord 0x0000FFFF /* mp, hal_com.c & phydm */ -#define bMaskDWord 0xFFFFFFFF /* mp, hal, rtw_odm.c & phydm */ - -#define bEnable 0x1 /* hal_mp.c, rtw_mp.c */ -#define bDisable 0x0 /* rtw_mp.c */ - -#define MAX_STALL_TIME 50 /* unit: us, hal_com_phycfg.c */ - -#define Rx_Smooth_Factor 20 /* phydm only */ - -/* - * RF Register definition - */ -#define RF_AC 0x00 -#define RF_AC_Jaguar 0x00 /* hal_mp.c */ -#define RF_CHNLBW 0x18 /* rtl8822b_phy.c */ -#define RF_ModeTableAddr 0x30 /* rtl8822b_phy.c */ -#define RF_ModeTableData0 0x31 /* rtl8822b_phy.c */ -#define RF_ModeTableData1 0x32 /* rtl8822b_phy.c */ -#define RF_0x52 0x52 -#define RF_WeLut_Jaguar 0xEF /* rtl8822b_phy.c */ - -/* General Functions */ -void rtl8822b_init_hal_spec(PADAPTER); /* hal/hal_com.c */ - -#ifdef CONFIG_MP_INCLUDED -/* MP Functions */ -#include /* struct mp_priv */ -void rtl8822b_prepare_mp_txdesc(PADAPTER, struct mp_priv *); /* rtw_mp.c */ -void rtl8822b_mp_config_rfpath(PADAPTER); /* hal_mp.c */ -#endif -void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus); - -#ifdef CONFIG_USB_HCI -#include -#elif defined(CONFIG_SDIO_HCI) -#include -#elif defined(CONFIG_PCI_HCI) -#include -#endif - -#endif /* _RTL8822B_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822be_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8822be_hal.h deleted file mode 100755 index a81445fa166ff9..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822be_hal.h +++ /dev/null @@ -1,27 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2015 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8822BE_HAL_H_ -#define _RTL8822BE_HAL_H_ - -#include /* PADAPTER */ - -#define RT_BCN_INT_MASKS (BIT20 | BIT25 | BIT26 | BIT16) - -/* rtl8822be_ops.c */ -void UpdateInterruptMask8822BE(PADAPTER, u32 AddMSR, u32 AddMSR1, u32 RemoveMSR, u32 RemoveMSR1); -u16 get_txbd_rw_reg(u16 q_idx); - - -#endif /* _RTL8822BE_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822bs_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8822bs_hal.h deleted file mode 100644 index ffaddee09832f2..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822bs_hal.h +++ /dev/null @@ -1,31 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2015 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8822BS_HAL_H_ -#define _RTL8822BS_HAL_H_ - -#include /* PADAPTER */ - -/* rtl8822bs_ops.c */ -void rtl8822bs_set_hal_ops(PADAPTER); - -#if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) -void rtl8822bs_disable_interrupt_but_cpwm2(PADAPTER adapter); -#endif - -/* rtl8822bs_xmit.c */ -s32 rtl8822bs_dequeue_writeport(PADAPTER); -#define _dequeue_writeport(a) rtl8822bs_dequeue_writeport(a) - -#endif /* _RTL8822BS_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822bu_hal.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl8822bu_hal.h deleted file mode 100644 index 39618c9ea42de3..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtl8822bu_hal.h +++ /dev/null @@ -1,65 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2015 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ -#ifndef _RTL8822BU_HAL_H_ -#define _RTL8822BU_HAL_H_ - -#ifdef CONFIG_USB_HCI - #include /* PADAPTER */ - - #ifdef CONFIG_USB_HCI - #ifdef USB_PACKET_OFFSET_SZ - #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) - #else - #define PACKET_OFFSET_SZ (8) - #endif - #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) - #endif - - /* undefine MAX_RECVBUF_SZ from rtl8822b_hal.h */ - #ifdef MAX_RECVBUF_SZ - #undef MAX_RECVBUF_SZ - #endif - - /* recv_buffer must be large than usb agg size */ - #ifndef MAX_RECVBUF_SZ - #ifdef PLATFORM_OS_CE - #define MAX_RECVBUF_SZ (8192+1024) - #else /* !PLATFORM_OS_CE */ - #ifndef CONFIG_MINIMAL_MEMORY_USAGE - #ifdef CONFIG_PLATFORM_NOVATEK_NT72668 - #define MAX_RECVBUF_SZ (15360) /* 15k */ - #elif defined(CONFIG_PLATFORM_HISILICON) - /* use 16k to workaround for HISILICON platform */ - #define MAX_RECVBUF_SZ (16384) - #else - #define MAX_RECVBUF_SZ (32768) - #endif - #else - #define MAX_RECVBUF_SZ (4000) - #endif - #endif /* PLATFORM_OS_CE */ - #endif /* !MAX_RECVBUF_SZ */ - - /* rtl8822bu_ops.c */ - void rtl8822bu_set_hal_ops(PADAPTER padapter); - void rtl8822bu_set_hw_type(struct dvobj_priv *pdvobj); - - /* rtl8822bu_io.c */ - void rtl8822bu_set_intf_ops(struct _io_ops *pops); - -#endif /* CONFIG_USB_HCI */ - - -#endif /* _RTL8822BU_HAL_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/autoconf.h b/drivers/net/wireless/realtek/rtl8812au/include/rtl_autoconf.h similarity index 97% rename from drivers/net/wireless/realtek/rtl8812au/include/autoconf.h rename to drivers/net/wireless/realtek/rtl8812au/include/rtl_autoconf.h index d88036bb36faf7..6ce3de050d351a 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/autoconf.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtl_autoconf.h @@ -22,17 +22,17 @@ */ #define AUTOCONF_INCLUDED #define RTL871X_MODULE_NAME "8812AU" -#define DRV_NAME "rtl8812au" +/* +#ifndef DRV_NAME +#define DRV_NAME "rtl8812au" +#endif +*/ #define CONFIG_USB_HCI - #define PLATFORM_LINUX - -/* #define CONFIG_IOCTL_CFG80211 1 */ - #ifdef CONFIG_IOCTL_CFG80211 /* #define RTW_USE_CFG80211_STA_EVENT */ /* Indecate new sta asoc through cfg80211_new_sta */ #define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER @@ -55,10 +55,11 @@ #define CONFIG_XMIT_ACK #ifdef CONFIG_XMIT_ACK - #define CONFIG_ACTIVE_KEEP_ALIVE_CHECK + //#define CONFIG_ACTIVE_KEEP_ALIVE_CHECK #endif #define CONFIG_80211N_HT + #define CONFIG_80211AC_VHT #ifdef CONFIG_80211AC_VHT #ifndef CONFIG_80211N_HT @@ -84,7 +85,7 @@ #define CONFIG_RECV_REORDERING_CTRL 1 -#define CONFIG_DFS 1 +#define CONFIG_DFS 0 /* #define CONFIG_SUPPORT_USB_INT */ #ifdef CONFIG_SUPPORT_USB_INT @@ -180,8 +181,7 @@ #define CONFIG_TDLS_CH_SW /* Enable this flag only when we confirm that TDLS CH SW is supported in FW */ #endif - -#define CONFIG_SKB_COPY 1/* for amsdu */ +#define CONFIG_SKB_COPY 1 /* for amsdu */ #define CONFIG_RTW_LED #ifdef CONFIG_RTW_LED @@ -325,7 +325,7 @@ /* * Debug Related Config */ -#define DBG 1 +#define DBG 0 #define CONFIG_PROC_DEBUG @@ -348,7 +348,9 @@ /* #define DBG_RX_SIGNAL_DISPLAY_PROCESSING */ /* #define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" */ - +#define DBG_TX_POWER_IDX 1 +#define DBG_PG_TXPWR_READ 1 +#define DBG_HIGHEST_RATE_BMP_BW_CHANGE 1 /* #define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE */ /* #define DBG_ROAMING_TEST */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_byteorder.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_byteorder.h index 8e6bb7a6df0195..5177310a92c7cf 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_byteorder.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_byteorder.h @@ -20,6 +20,18 @@ #error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n" #endif +#if !((defined CONFIG_LITTLE_ENDIAN) || (defined CONFIG_BIG_ENDIAN)) +#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ +#define CONFIG_LITTLE_ENDIAN +//#warning "Auto-detected little-endian system...hope it is correct!" +#else +#if __BYTE_ORDER == __BIG_ENDIAN +//#warning "Auto-detected big-endian system...hope it is correct!" +#define CONFIG_BIG_ENDIAN +#endif +#endif +#endif + #if defined(CONFIG_LITTLE_ENDIAN) #ifndef CONFIG_PLATFORM_MSTAR389 #include diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_cmd.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_cmd.h index 00a5a2d6d25c5e..4df67602f1c886 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_cmd.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_cmd.h @@ -213,7 +213,7 @@ u8 p2p_cancel_roch_cmd(_adapter *adapter, u64 cookie, struct wireless_dev *wdev, #endif /* CONFIG_IOCTL_CFG80211 */ #endif /* CONFIG_P2P */ -#ifdef CONFIG_IOCTL_CFG80211 +#ifdef CONFIG_IOCTL_CFG80211 u8 rtw_mgnt_tx_cmd(_adapter *adapter, u8 tx_ch, u8 no_cck, const u8 *buf, size_t len, int wait_ack, u8 flags); struct mgnt_tx_parm { u8 tx_ch; diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_debug.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_debug.h index d5ed2c1c5f68a2..0d005c3c61e7d4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_debug.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_debug.h @@ -506,7 +506,7 @@ ssize_t proc_set_new_bcn_max(struct file *file, const char __user *buffer, size_ #ifdef CONFIG_POWER_SAVING int proc_get_ps_info(struct seq_file *m, void *v); ssize_t proc_set_ps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); -#ifdef CONFIG_WMMPS_STA +#ifdef CONFIG_WMMPS_STA int proc_get_wmmps_info(struct seq_file *m, void *v); ssize_t proc_set_wmmps_info(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); #endif /* CONFIG_WMMPS_STA */ @@ -563,6 +563,11 @@ ssize_t proc_set_mcc_sta_bw80_target_tp(struct file *file, const char __user *bu int proc_get_mcc_policy_table(struct seq_file *m, void *v); #endif /* CONFIG_MCC_MODE */ +#ifdef CONFIG_RTW_SW_LED +int proc_get_led_ctrl(struct seq_file *m, void *v); +ssize_t proc_set_led_ctrl(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); +#endif /* CONFIG_RTW_SW_LED */ + int proc_get_ack_timeout(struct seq_file *m, void *v); ssize_t proc_set_ack_timeout(struct file *file, const char __user *buffer, size_t count, loff_t *pos, void *data); diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme.h index 72888b00b4085d..cdac712cdf0d98 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme.h @@ -607,7 +607,7 @@ enum rtw_ft_capability { #define rtw_ft_roam(a) \ ((rtw_to_roam(a) > 0) && rtw_ft_chk_flags(a, RTW_FT_PEER_EN)) - + #define rtw_ft_valid_akm(a, t) \ ((rtw_ft_chk_flags(a, RTW_FT_EN)) && \ (((t) == 3) || ((t) == 4))) @@ -620,7 +620,7 @@ enum rtw_ft_capability { ((rtw_ft_chk_flags(a, RTW_FT_OTD_EN)) \ && ((a)->mlmepriv.ft_roam.ft_roam_on_expired == _FALSE) \ && ((a)->mlmepriv.ft_roam.ft_cap & 0x01)) - + #define rtw_ft_otd_roam(a) \ rtw_ft_chk_flags(a, RTW_FT_PEER_OTD_EN) @@ -633,7 +633,7 @@ enum rtw_ft_capability { struct ft_roam_info { u16 mdid; - u8 ft_cap; + u8 ft_cap; /*b0: FT over DS, b1: Resource Req Protocol Cap, b2~b7: Reserved*/ u8 updated_ft_ies[RTW_FT_MAX_IE_SZ]; u16 updated_ft_ies_len; @@ -644,7 +644,7 @@ struct ft_roam_info { u8 ft_flags; u32 ft_status; u32 ft_req_retry_cnt; - bool ft_updated_bcn; + bool ft_updated_bcn; }; #endif @@ -695,7 +695,7 @@ struct nb_rpt_hdr { u32 bss_info; u8 reg_class; u8 ch_num; - u8 phy_type; + u8 phy_type; }; /*IEEE Std 80211v, Figure 7-95e2�XBSS Termination Duration subelement field format */ @@ -1072,7 +1072,7 @@ void rtw_sta_timeout_event_callback(_adapter *adapter, u8 *pbuf); #endif /* CONFIG_IEEE80211W */ #ifdef CONFIG_RTW_80211R void rtw_ft_info_init(struct ft_roam_info *pft); -u8 rtw_ft_chk_roaming_candidate(_adapter *padapter, +u8 rtw_ft_chk_roaming_candidate(_adapter *padapter, struct wlan_network *competitor); void rtw_ft_update_stainfo(_adapter *padapter, WLAN_BSSID_EX *pnetwork); void rtw_ft_reassoc_event_callback(_adapter *padapter, u8 *pbuf); diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme_ext.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme_ext.h index 2b3a5536ccc778..49fcaa9d7ae11c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme_ext.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_mlme_ext.h @@ -984,11 +984,11 @@ unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame); #ifdef CONFIG_RTW_80211R void rtw_ft_update_bcn(_adapter *padapter, union recv_frame *precv_frame); void rtw_ft_start_clnt_join(_adapter *padapter); -u8 rtw_ft_update_rsnie(_adapter *padapter, u8 bwrite, +u8 rtw_ft_update_rsnie(_adapter *padapter, u8 bwrite, struct pkt_attrib *pattrib, u8 **pframe); -void rtw_ft_build_auth_req_ies(_adapter *padapter, +void rtw_ft_build_auth_req_ies(_adapter *padapter, struct pkt_attrib *pattrib, u8 **pframe); -void rtw_ft_build_assoc_req_ies(_adapter *padapter, +void rtw_ft_build_assoc_req_ies(_adapter *padapter, u8 is_reassoc, struct pkt_attrib *pattrib, u8 **pframe); u8 rtw_ft_update_auth_rsp_ies(_adapter *padapter, u8 *pframe, u32 len); void rtw_ft_start_roam(_adapter *padapter, u8 *pTargetAddr); diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_pwrctrl.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_pwrctrl.h index 49860aa4a58586..8eac09495f6559 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_pwrctrl.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_pwrctrl.h @@ -339,7 +339,7 @@ struct pwrctrl_priv { #ifdef CONFIG_WMMPS_STA u8 wmm_smart_ps; -#endif /* CONFIG_WMMPS_STA */ +#endif /* CONFIG_WMMPS_STA */ u32 alives; _workitem cpwm_event; diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_qos.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_qos.h index cf2e8c03f40c02..8e1d013e128f69 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_qos.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_qos.h @@ -58,7 +58,7 @@ struct qos_priv { u8 uapsd_tid_trigger_enabled; /* declare uapsd_ap_supported to record whether the connected ap supports uapsd or not */ u8 uapsd_ap_supported; -#endif /* CONFIG_WMMPS_STA */ +#endif /* CONFIG_WMMPS_STA */ }; diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_recv.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_recv.h index 89919306a2e0cb..d6422a1d2d1857 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_recv.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_recv.h @@ -33,6 +33,8 @@ #endif #else /* PLATFORM_LINUX /PLATFORM_BSD */ +#include + #ifdef CONFIG_SINGLE_RECV_BUF #define NR_RECVBUFF (1) #else @@ -410,7 +412,7 @@ struct recv_priv { struct sk_buff_head rx_skb_queue; #ifdef CONFIG_RTW_NAPI struct sk_buff_head rx_napi_skb_queue; -#endif +#endif #ifdef CONFIG_RX_INDICATE_QUEUE struct task rx_indicate_tasklet; struct ifqueue rx_indicate_queue; diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_rm_fsm.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_rm_fsm.h index 6a0a06f11242cd..ba903a9c46bbd2 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_rm_fsm.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_rm_fsm.h @@ -267,7 +267,7 @@ struct data_buf { struct rm_obj { - /* aid << 16 + /* aid << 16 |diag_token << 8 |B(1) 1/0:All_AID/UNIC |B(0) 1/0:RM_MASTER/RM_SLAVE */ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_security.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_security.h index f4fc8fb3b04ee9..f09f8a3663c68e 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_security.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_security.h @@ -254,12 +254,6 @@ struct security_priv { #define SEC_IS_BIP_KEY_INSTALLED(sec) _FALSE #endif -struct rtw_sha256_state { - u64 length; - u32 state[8], curlen; - u8 buf[64]; -}; - #define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\ do {\ switch (psecuritypriv->dot11AuthAlgrthm) {\ diff --git a/drivers/net/wireless/realtek/rtl8812au/include/rtw_xmit.h b/drivers/net/wireless/realtek/rtl8812au/include/rtw_xmit.h index 6cc9b9f26f058a..c1cd9286c0e3b1 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/rtw_xmit.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/rtw_xmit.h @@ -206,11 +206,7 @@ #endif #ifdef CONFIG_USB_HCI - #ifdef USB_PACKET_OFFSET_SZ - #define PACKET_OFFSET_SZ (USB_PACKET_OFFSET_SZ) - #else - #define PACKET_OFFSET_SZ (8) - #endif + #define PACKET_OFFSET_SZ (8) #define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) #endif @@ -467,8 +463,9 @@ struct pkt_attrib { #ifdef CONFIG_WMMPS_STA u8 trigger_frame; #endif /* CONFIG_WMMPS_STA */ - + struct sta_info *psta; + u8 injected; u8 rtsen; u8 cts2self; @@ -1034,7 +1031,7 @@ extern void rtw_amsdu_set_timer_status(_adapter *padapter, u8 priority, u8 statu extern void rtw_amsdu_set_timer(_adapter *padapter, u8 priority); extern void rtw_amsdu_cancel_timer(_adapter *padapter, u8 priority); -extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue); +extern s32 rtw_xmitframe_coalesce_amsdu(_adapter *padapter, struct xmit_frame *pxmitframe, struct xmit_frame *pxmitframe_queue); extern s32 check_amsdu(struct xmit_frame *pxmitframe); extern s32 check_amsdu_tx_support(_adapter *padapter); extern struct xmit_frame *rtw_get_xframe(struct xmit_priv *pxmitpriv, int *num_frame); diff --git a/drivers/net/wireless/realtek/rtl8812au/include/wifi.h b/drivers/net/wireless/realtek/rtl8812au/include/wifi.h index 9d9c0d777980a2..f071dd04472da1 100644 --- a/drivers/net/wireless/realtek/rtl8812au/include/wifi.h +++ b/drivers/net/wireless/realtek/rtl8812au/include/wifi.h @@ -15,12 +15,10 @@ #ifndef _WIFI_H_ #define _WIFI_H_ - #ifndef BIT #define BIT(x) (1 << (x)) #endif - #define WLAN_ETHHDR_LEN 14 #define WLAN_ETHADDR_LEN 6 #define WLAN_IEEE_OUI_LEN 3 @@ -1034,8 +1032,12 @@ typedef enum _HT_CAP_AMPDU_DENSITY { * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2) */ #define IEEE80211_MIN_AMPDU_BUF 0x8 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0) #define IEEE80211_MAX_AMPDU_BUF_HT 0x40 - +#define IEEE80211_MAX_AMPDU_BUF 0x100 +#else +#define IEEE80211_MAX_AMPDU_BUF_HT 0x40 +#endif /* Spatial Multiplexing Power Save Modes */ #define WLAN_HT_CAP_SM_PS_STATIC 0 @@ -1043,7 +1045,6 @@ typedef enum _HT_CAP_AMPDU_DENSITY { #define WLAN_HT_CAP_SM_PS_INVALID 2 #define WLAN_HT_CAP_SM_PS_DISABLED 3 - #define OP_MODE_PURE 0 #define OP_MODE_MAY_BE_LEGACY_STAS 1 #define OP_MODE_20MHZ_HT_STA_ASSOCED 2 @@ -1071,8 +1072,6 @@ typedef enum _HT_CAP_AMPDU_DENSITY { #define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10)) #define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11)) - - /* #endif */ /* ===============WPS Section=============== */ diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.c old mode 100755 new mode 100644 index a15fd66c5ab8ef..8c674fa7b9b07b --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.c @@ -34,13 +34,29 @@ #define STATION_INFO_PLINK_STATE BIT(NL80211_STA_INFO_PLINK_STATE) #define STATION_INFO_SIGNAL BIT(NL80211_STA_INFO_SIGNAL) #define STATION_INFO_TX_BITRATE BIT(NL80211_STA_INFO_TX_BITRATE) +#define STATION_INFO_TX_BITRATE_BW_5 BIT(RATE_INFO_BW_5) +#define STATION_INFO_TX_BITRATE_BW_10 BIT(RATE_INFO_BW_10) +#define STATION_INFO_TX_BITRATE_BW_20 BIT(RATE_INFO_BW_20) +#define STATION_INFO_TX_BITRATE_BW_40 BIT(RATE_INFO_BW_40) +#define STATION_INFO_TX_BITRATE_BW_80 BIT(RATE_INFO_BW_80) +#define STATION_INFO_TX_BITRATE_BW_160 BIT(RATE_INFO_BW_160) #define STATION_INFO_RX_PACKETS BIT(NL80211_STA_INFO_RX_PACKETS) #define STATION_INFO_TX_PACKETS BIT(NL80211_STA_INFO_TX_PACKETS) #define STATION_INFO_TX_FAILED BIT(NL80211_STA_INFO_TX_FAILED) +#define STATION_INFO_RX_BYTES BIT(NL80211_STA_INFO_RX_BYTES) +#define STATION_INFO_TX_BYTES BIT(NL80211_STA_INFO_TX_BYTES) #define STATION_INFO_LOCAL_PM BIT(NL80211_STA_INFO_LOCAL_PM) #define STATION_INFO_PEER_PM BIT(NL80211_STA_INFO_PEER_PM) #define STATION_INFO_NONPEER_PM BIT(NL80211_STA_INFO_NONPEER_PM) +#define STATION_INFO_RX_BYTES BIT(NL80211_STA_INFO_RX_BYTES) +#define STATION_INFO_TX_BYTES BIT(NL80211_STA_INFO_TX_BYTES) #define STATION_INFO_ASSOC_REQ_IES 0 +#define STATION_INFO_BSS_PARAM BIT(NL80211_STA_INFO_BSS_PARAM) +#define STATION_INFO_BSS_PARAM_CTS_PROT BIT(NL80211_STA_BSS_PARAM_CTS_PROT) +#define STATION_INFO_BSS_PARAM_SHORT_PREAMBLE BIT(NL80211_STA_BSS_PARAM_SHORT_PREAMBLE) +#define STATION_INFO_BSS_PARAM_SHORT_SLOT_TIME BIT(NL80211_STA_BSS_PARAM_SHORT_SLOT_TIME) +#define STATION_INFO_BSS_PARAM_DTIM_PERIOD BIT(NL80211_STA_BSS_PARAM_DTIM_PERIOD) +#define STATION_INFO_BSS_PARAM_BEACON_INTERVAL BIT(NL80211_STA_BSS_PARAM_BEACON_INTERVAL) #endif /* Linux kernel >= 4.0.0 */ #include @@ -82,7 +98,7 @@ #endif /* - * In the current design of Wi-Fi driver, it will return success to the system (e.g. supplicant) + * In the current design of Wi-Fi driver, it will return success to the system (e.g. supplicant) * when Wi-Fi driver decides to abort the scan request in the scan flow by default. * Defining this flag makes Wi-Fi driver to return -EBUSY to the system if Wi-Fi driver is too busy to do the scan. */ @@ -323,7 +339,7 @@ static u8 rtw_chbw_to_cfg80211_chan_def(struct wiphy *wiphy, struct cfg80211_cha if (!chan) goto exit; - if (bw == CHANNEL_WIDTH_20) + if (bw == CHANNEL_WIDTH_20) chdef->width = ht ? NL80211_CHAN_WIDTH_20 : NL80211_CHAN_WIDTH_20_NOHT; else if (bw == CHANNEL_WIDTH_40) chdef->width = NL80211_CHAN_WIDTH_40; @@ -357,7 +373,7 @@ static void rtw_get_chbw_from_cfg80211_chan_def(struct cfg80211_chan_def *chdef, rtw_warn_on(1); *ch = 0; return; - } + } switch (chdef->width) { case NL80211_CHAN_WIDTH_20_NOHT: @@ -431,7 +447,7 @@ u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, u8 ret = _SUCCESS; #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 8, 0)) - struct cfg80211_chan_def chdef; + struct cfg80211_chan_def chdef = {}; ret = rtw_chbw_to_cfg80211_chan_def(wiphy, &chdef, ch, bw, offset, ht); if (ret != _SUCCESS) @@ -720,12 +736,12 @@ static int rtw_cfg80211_sync_iftype(_adapter *adapter) static u64 rtw_get_systime_us(void) { -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) - return ktime_to_us(ktime_get_boottime()); -#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39) && LINUX_VERSION_CODE < KERNEL_VERSION(4, 20, 0)) struct timespec ts; get_monotonic_boottime(&ts); return ((u64)ts.tv_sec * 1000000) + ts.tv_nsec / 1000; +#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 20, 0)) + return ktime_to_us(ktime_get_boottime()); #else struct timeval tv; do_gettimeofday(&tv); @@ -1232,10 +1248,14 @@ void rtw_cfg80211_indicate_disconnect(_adapter *padapter, u16 reason, u8 locally rtw_cfg80211_connect_result(pwdev, NULL, NULL, 0, NULL, 0, reason, GFP_ATOMIC); } else { - RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter)); - rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC); + RTW_INFO(FUNC_ADPT_FMT" call cfg80211_disconnected\n", FUNC_ADPT_ARG(padapter)); + rtw_cfg80211_disconnected(pwdev, reason, NULL, 0, locally_generated, GFP_ATOMIC); + + cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, + WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC); } #endif + } rtw_wdev_free_connect_req(pwdev_priv); @@ -1621,8 +1641,8 @@ static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); padapter->securitypriv.binstallGrpkey = _TRUE; - if (param->u.crypt.idx < 4) - _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); + if (param->u.crypt.idx < 4) + _rtw_memcpy(padapter->securitypriv.iv_seq[param->u.crypt.idx], param->u.crypt.seq, 8); padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; rtw_set_key(padapter, &padapter->securitypriv, param->u.crypt.idx, 1, _TRUE); @@ -1870,7 +1890,7 @@ static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) || (MLME_IS_STA(adapter) && !pairwise) #endif - ) { + ) { /* WEP key, TX GTK/IGTK, RX GTK/IGTK(for STA mode) */ if (is_wep_enc(sec->dot118021XGrpPrivacy)) { if (keyid >= WEP_KEYS) @@ -1959,7 +1979,7 @@ static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev } ret = 0; - + exit: RTW_INFO(FUNC_NDEV_FMT GET_KEY_PARAM_FMT_S @@ -2260,18 +2280,66 @@ static int cfg80211_rtw_get_station(struct wiphy *wiphy, && check_fwstate(pmlmepriv, _FW_LINKED) ) { struct wlan_network *cur_network = &(pmlmepriv->cur_network); + struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(padapter); - if (_rtw_memcmp((u8 *)mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { - RTW_INFO("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); - ret = -ENOENT; - goto exit; - } + if (_rtw_memcmp((u8 *)mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) { + RTW_INFO("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); + ret = -ENOENT; + goto exit; + } - sinfo->filled |= STATION_INFO_SIGNAL; - sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); + sinfo->filled |= STATION_INFO_SIGNAL; + sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); + + sinfo->filled |= STATION_INFO_TX_BITRATE; + sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); + + /* to-do set the txrate flags */ + // for example something like: + //sinfo->txrate.flags |= NL80211_RATE_INFO_VHT_NSS; + //sinfo->txrate.nss = rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map); + + /* bw_mode is more delicate + sinfo->txrate.bw is flagged + psta->bw_mode */ + + /* + sinfo->txrate.bw = psta->bw_mode; + sinfo->txrate.flags |= psta->bw_mode; + printk("rtw_get_current_tx_sgi: %i", rtw_get_current_tx_sgi(padapter, mac)); + printk("NSS: %i", rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map)); + printk("BW MODE: %i", psta->bw_mode); + printk("5 10 20 40 80 160: %i %i %i %i %i %i", STATION_INFO_TX_BITRATE_BW_5, STATION_INFO_TX_BITRATE_BW_10, STATION_INFO_TX_BITRATE_BW_20, STATION_INFO_TX_BITRATE_BW_40, STATION_INFO_TX_BITRATE_BW_80, STATION_INFO_TX_BITRATE_BW_160); + printk("5 10 20 40 80 160: %i %i %i %i %i %i", RATE_INFO_BW_5, RATE_INFO_BW_10, RATE_INFO_BW_20, RATE_INFO_BW_40, RATE_INFO_BW_80, RATE_INFO_BW_160); + */ + + sinfo->filled |= STATION_INFO_RX_PACKETS; + sinfo->rx_packets = sta_rx_data_pkts(psta); + + sinfo->filled |= STATION_INFO_TX_PACKETS; + sinfo->tx_packets = psta->sta_stats.tx_pkts; + + sinfo->filled |= STATION_INFO_TX_FAILED; + sinfo->tx_failed = psta->sta_stats.tx_fail_cnt; + + sinfo->filled |= STATION_INFO_BSS_PARAM; + + if (!psta->no_short_preamble_set) + sinfo->bss_param.flags |= STATION_INFO_BSS_PARAM_SHORT_PREAMBLE; + + if (!psta->no_short_slot_time_set) + sinfo->bss_param.flags |= STATION_INFO_BSS_PARAM_SHORT_SLOT_TIME; + + /* no idea how to check this yet */ + if (0) + sinfo->bss_param.flags |= STATION_INFO_BSS_PARAM_CTS_PROT; + + /* is this actually the dtim_period? */ + sinfo->bss_param.flags |= STATION_INFO_BSS_PARAM_DTIM_PERIOD; + sinfo->bss_param.dtim_period = pwrctl->dtim; + + sinfo->bss_param.beacon_interval = get_beacon_interval(&cur_network->network); - sinfo->filled |= STATION_INFO_TX_BITRATE; - sinfo->txrate.legacy = rtw_get_cur_max_rate(padapter); } if (psta) { @@ -2319,6 +2387,11 @@ enum nl80211_iftype { NL80211_IFTYPE_MAX = NUM_NL80211_IFTYPES - 1 }; #endif + +#ifdef CONFIG_CONCURRENT_MODE +extern int netdev_if2_open(struct net_device *pnetdev); +#endif + static int cfg80211_rtw_change_iface(struct wiphy *wiphy, struct net_device *ndev, enum nl80211_iftype type, @@ -2563,10 +2636,17 @@ void rtw_cfg80211_unlink_bss(_adapter *padapter, struct wlan_network *pnetwork) select_network.InfrastructureMode == Ndis802_11Infrastructure?WLAN_CAPABILITY_ESS:WLAN_CAPABILITY_IBSS); #endif + if (!wiphy) { + pr_info("88XXAU: rtw_cfg80211_unlink_bss: wiphy is NULL\n"); + return; + } + if (bss) { cfg80211_unlink_bss(wiphy, bss); RTW_INFO("%s(): cfg80211_unlink %s!!\n", __func__, select_network.Ssid.Ssid); #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 9, 0) + if (!padapter->rtw_wdev->wiphy) + return; cfg80211_put_bss(padapter->rtw_wdev->wiphy, bss); #else cfg80211_put_bss(bss); @@ -3021,9 +3101,6 @@ static int cfg80211_rtw_scan(struct wiphy *wiphy goto check_need_indicate_scan_done; } -#else - - #ifdef CONFIG_MP_INCLUDED if (rtw_mp_mode_check(padapter)) { RTW_INFO("MP mode block Scan request\n"); @@ -4134,6 +4211,27 @@ static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, enum tx_power_setting type, int dbm) #endif { + +_adapter *padapter = wiphy_to_adapter(wiphy); +HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); +int value; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) || defined(COMPAT_KERNEL_RELEASE) + value = mbm/100; +#else + value = dbm; +#endif + +if(value < 0) + value = 0; +if(value > 40) + value = 40; + +if(type == NL80211_TX_POWER_FIXED) { + pHalData->CurrentTxPwrIdx = value; + rtw_hal_set_tx_power_level(padapter, pHalData->current_channel); +} else + return -EOPNOTSUPP; + #if 0 struct iwm_priv *iwm = wiphy_to_iwm(wiphy); int ret; @@ -4170,9 +4268,12 @@ static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, #endif int *dbm) { + _adapter *padapter = wiphy_to_adapter(wiphy); + HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); + RTW_INFO("%s\n", __func__); - *dbm = (12); + *dbm = pHalData->CurrentTxPwrIdx; return 0; } @@ -4335,6 +4436,7 @@ void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint f { struct station_info sinfo; u8 ie_offset; + _rtw_memset(&sinfo, 0, sizeof(struct station_info)); if (get_frame_sub_type(pmgmt_frame) == WIFI_ASSOCREQ) ie_offset = _ASOCREQ_IE_OFFSET_; else /* WIFI_REASSOCREQ */ @@ -4344,6 +4446,9 @@ void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint f sinfo.filled = STATION_INFO_ASSOC_REQ_IES; sinfo.assoc_req_ies = pmgmt_frame + WLAN_HDR_A3_LEN + ie_offset; sinfo.assoc_req_ies_len = frame_len - WLAN_HDR_A3_LEN - ie_offset; + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 18, 0)) + cfg80211_sinfo_alloc_tid_stats(&sinfo, GFP_KERNEL); + #endif cfg80211_new_sta(ndev, get_addr2_ptr(pmgmt_frame), &sinfo, GFP_ATOMIC); } #else /* defined(RTW_USE_CFG80211_STA_EVENT) */ @@ -4485,11 +4590,6 @@ static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_de if (unlikely(skb->len < rtap_len)) goto fail; - if (rtap_len != 14) { - RTW_INFO("radiotap len (should be 14): %d\n", rtap_len); - goto fail; - } - /* Skip the ratio tap header */ skb_pull(skb, rtap_len); @@ -4658,9 +4758,20 @@ static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct ne goto out; } + mon_ndev->mtu = WLAN_DATA_MAXLEN; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) + mon_ndev->min_mtu = WLAN_MIN_ETHFRM_LEN; + mon_ndev->max_mtu = WLAN_DATA_MAXLEN; +#endif + mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; strncpy(mon_ndev->name, name, IFNAMSIZ); mon_ndev->name[IFNAMSIZ - 1] = 0; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12 ,0)) + mon_ndev->needs_free_netdev = true; +#else + mon_ndev->destructor = rtw_ndev_destructor; +#endif #if (LINUX_VERSION_CODE > KERNEL_VERSION(4, 11, 8)) mon_ndev->priv_destructor = rtw_ndev_destructor; #else @@ -4837,7 +4948,11 @@ static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, pwdev_priv = adapter_wdev_data(adapter); if (ndev == pwdev_priv->pmon_ndev) { - unregister_netdevice(ndev); + /* unregister only monitor device + * because only monitor can be added + */ + if(wdev->iftype == NL80211_IFTYPE_MONITOR) + unregister_netdevice(ndev); pwdev_priv->pmon_ndev = NULL; pwdev_priv->ifname_mon[0] = '\0'; RTW_INFO(FUNC_NDEV_FMT" remove monitor ndev\n", FUNC_NDEV_ARG(ndev)); @@ -4876,10 +4991,8 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); /* struct sta_priv *pstapriv = &padapter->stapriv; */ - RTW_INFO("%s beacon_head_len=%zu, beacon_tail_len=%zu\n", __FUNCTION__, head_len, tail_len); - if (check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) return -EINVAL; @@ -4897,7 +5010,6 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co if (!pbuf) return -ENOMEM; - /* _rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); */ /* if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) */ @@ -4956,7 +5068,6 @@ static int rtw_add_beacon(_adapter *adapter, const u8 *head, size_t head_len, co } else ret = -EINVAL; - rtw_mfree(pbuf, head_len + tail_len); return ret; @@ -5034,6 +5145,18 @@ static int cfg80211_rtw_start_ap(struct wiphy *wiphy, struct net_device *ndev, ret = rtw_add_beacon(adapter, settings->beacon.head, settings->beacon.head_len, settings->beacon.tail, settings->beacon.tail_len); + // In cases like WPS, the proberesp and assocresp IEs vary from the beacon, and need to be explicitly set + if(ret == 0) { + if(settings->beacon.proberesp_ies && settings->beacon.proberesp_ies_len > 0) { + rtw_cfg80211_set_mgnt_wpsp2pie(ndev, (char *)settings->beacon.proberesp_ies, + settings->beacon.proberesp_ies_len, 0x2/*PROBE_RESP*/); + } + if(settings->beacon.assocresp_ies && settings->beacon.assocresp_ies_len < 0) { + rtw_cfg80211_set_mgnt_wpsp2pie(ndev, (char *)settings->beacon.assocresp_ies, + settings->beacon.assocresp_ies_len, 0x4/*ASSOC_RESP*/); + } + } + adapter->mlmeextpriv.mlmext_info.hidden_ssid_mode = settings->hidden_ssid; if (settings->ssid && settings->ssid_len) { @@ -5070,6 +5193,18 @@ static int cfg80211_rtw_change_beacon(struct wiphy *wiphy, struct net_device *nd ret = rtw_add_beacon(adapter, info->head, info->head_len, info->tail, info->tail_len); + // In cases like WPS, the proberesp and assocresp IEs vary from the beacon, and need to be explicitly set + if(ret == 0) { + if(info->proberesp_ies && info->proberesp_ies_len > 0) { + rtw_cfg80211_set_mgnt_wpsp2pie(ndev, (char *)info->proberesp_ies, + info->proberesp_ies_len, 0x2/*PROBE_RESP*/); + } + if(info->assocresp_ies && info->assocresp_ies_len > 0) { + rtw_cfg80211_set_mgnt_wpsp2pie(ndev, (char *)info->assocresp_ies, + info->assocresp_ies_len, 0x4/*ASSOC_RESP*/); + } + } + return ret; } @@ -5499,7 +5634,6 @@ static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev return -EINVAL; } - if (!target_mac) { RTW_INFO("flush all sta, and cam_entry\n"); @@ -5511,7 +5645,6 @@ static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev return ret; } - RTW_INFO("free sta macaddr =" MAC_FMT "\n", MAC_ARG(target_mac)); if (target_mac[0] == 0xff && target_mac[1] == 0xff && @@ -5519,7 +5652,6 @@ static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *ndev target_mac[4] == 0xff && target_mac[5] == 0xff) return -EINVAL; - _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); phead = &pstapriv->asoc_list; @@ -6319,7 +6451,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); - RTW_INFO("[%s] In\n", __FUNCTION__); /* prepare for building provision_request frame */ @@ -6353,7 +6484,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, break; } - if (rtw_get_p2p_ie(frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen)) { rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); @@ -6361,7 +6491,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, } - /* start to build provision_request frame */ _rtw_memset(wpsie, 0, sizeof(wpsie)); _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); @@ -6371,7 +6500,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, if (pmgntframe == NULL) return; - /* update attribute */ pattrib = &pmgntframe->attrib; update_mgntframe_attrib(padapter, pattrib); @@ -6401,7 +6529,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); - /* build_prov_disc_request_p2p_ie */ /* P2P OUI */ p2pielen = 0; @@ -6431,7 +6558,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); p2pielen += 2; - /* Device Info ATTR */ /* Type: */ p2p_ie[p2pielen++] = P2P_ATTR_DEVICE_INFO; @@ -6447,7 +6573,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); p2pielen += devinfo_contentlen; - pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); /* p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); */ /* pframe += p2pielen; */ @@ -6485,7 +6610,6 @@ void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen); - #ifdef CONFIG_WFD wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); pframe += wfdielen; @@ -7474,15 +7598,17 @@ static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, return ret; } +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)) +static void cfg80211_rtw_update_mgmt_frame_register(struct wiphy *wiphy, + struct wireless_dev *wdev, + struct mgmt_frame_regs *upd) +#else static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) struct wireless_dev *wdev, #else struct net_device *ndev, #endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) - struct mgmt_frame_regs *upd) -#else u16 frame_type, bool reg) #endif { @@ -7490,11 +7616,6 @@ static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, struct net_device *ndev = wdev_to_ndev(wdev); #endif _adapter *adapter; -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) - u16 frame_type = BIT(upd->global_stypes << 4); - bool reg = false; -#endif - struct rtw_wdev_priv *pwdev_priv; if (ndev == NULL) @@ -7508,31 +7629,6 @@ static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, frame_type, reg); #endif - switch (frame_type) { - case IEEE80211_STYPE_AUTH: /* 0x00B0 */ - if (reg > 0) - SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_AUTH, reg); - else - CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_AUTH, reg); - break; -#ifdef not_yet - case IEEE80211_STYPE_PROBE_REQ: /* 0x0040 */ - if (reg > 0) - SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); - else - CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_PROBE_REQ, reg); - break; - case IEEE80211_STYPE_ACTION: /* 0x00D0 */ - if (reg > 0) - SET_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); - else - CLR_CFG80211_REPORT_MGMT(pwdev_priv, IEEE80211_STYPE_ACTION, reg); - break; -#endif - default: - break; - } - exit: return; } @@ -7874,7 +7970,7 @@ void dump_mesh_config(void *sel, const struct mesh_config *conf) RTW_PRINT_SEL(sel, "path_refresh_time:%u\n", conf->path_refresh_time); RTW_PRINT_SEL(sel, "min_discovery_timeout:%u\n", conf->min_discovery_timeout); RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathTimeout:%u\n", conf->dot11MeshHWMPactivePathTimeout); - RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval); + RTW_PRINT_SEL(sel, "dot11MeshHWMPpreqMinInterval:%u\n", conf->dot11MeshHWMPpreqMinInterval); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 3, 0)) RTW_PRINT_SEL(sel, "dot11MeshHWMPperrMinInterval:%u\n", conf->dot11MeshHWMPperrMinInterval); #endif @@ -7889,11 +7985,11 @@ void dump_mesh_config(void *sel, const struct mesh_config *conf) RTW_PRINT_SEL(sel, "dot11MeshForwarding:%d\n", conf->dot11MeshForwarding); RTW_PRINT_SEL(sel, "rssi_threshold:%d\n", conf->rssi_threshold); #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 5, 0)) RTW_PRINT_SEL(sel, "ht_opmode:0x%04x\n", conf->ht_opmode); #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) RTW_PRINT_SEL(sel, "dot11MeshHWMPactivePathToRootTimeout:%u\n", conf->dot11MeshHWMPactivePathToRootTimeout); RTW_PRINT_SEL(sel, "dot11MeshHWMProotInterval:%u\n", conf->dot11MeshHWMProotInterval); @@ -7904,7 +8000,7 @@ void dump_mesh_config(void *sel, const struct mesh_config *conf) RTW_PRINT_SEL(sel, "power_mode:%s\n", nl80211_mesh_power_mode_str(conf->power_mode)); RTW_PRINT_SEL(sel, "dot11MeshAwakeWindowDuration:%u\n", conf->dot11MeshAwakeWindowDuration); #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 11, 0)) RTW_PRINT_SEL(sel, "plink_timeout:%u\n", conf->plink_timeout); #endif @@ -8040,14 +8136,14 @@ static void rtw_cfg80211_mesh_cfg_set(_adapter *adapter, const struct mesh_confi if (chk_mesh_attr(NL80211_MESHCONF_HT_OPMODE, mask)); #endif #endif - + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) if (chk_mesh_attr(NL80211_MESHCONF_HWMP_PATH_TO_ROOT_TIMEOUT, mask)) mcfg->dot11MeshHWMPactivePathToRootTimeout = conf->dot11MeshHWMPactivePathToRootTimeout; if (chk_mesh_attr(NL80211_MESHCONF_HWMP_ROOT_INTERVAL, mask)) mcfg->dot11MeshHWMProotInterval = conf->dot11MeshHWMProotInterval; if (chk_mesh_attr(NL80211_MESHCONF_HWMP_CONFIRMATION_INTERVAL, mask)) - mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval; + mcfg->dot11MeshHWMPconfirmationInterval = conf->dot11MeshHWMPconfirmationInterval; #endif #if 0 /* TBD */ @@ -8105,7 +8201,7 @@ u8 *rtw_cfg80211_construct_mesh_beacon_ies(struct wiphy *wiphy, _adapter *adapte #endif if (!ch) goto exit; - + #if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) vht = ht && ch > 14 && bw >= CHANNEL_WIDTH_80; /* VHT40/VHT20? */ #endif @@ -8436,7 +8532,7 @@ static int cfg80211_rtw_join_mesh(struct wiphy *wiphy, struct net_device *dev, ret = -EINVAL; goto exit; } - + rtw_mesh_work(&adapter->mesh_work); exit: @@ -8517,7 +8613,7 @@ static int cfg80211_rtw_del_mpath(struct wiphy *wiphy, struct net_device *dev } } else { rtw_mesh_path_flush_by_iface(adapter); - } + } exit: return ret; @@ -9228,12 +9324,12 @@ static void rtw_cfg80211_init_ht_capab_ex(_adapter *padapter case RF_2T2R: case RF_1T2R: - ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ + ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_2R;/* Only one spatial-stream STBC RX is supported */ break; case RF_3T3R: case RF_3T4R: case RF_4T4R: - ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_1R;/* Only one spatial-stream STBC RX is supported */ + ht_cap->cap |= IEEE80211_HT_CAP_RX_STBC_3R;/* Only one spatial-stream STBC RX is supported */ break; default: RTW_INFO("[warning] rf_type %d is not expected\n", rf_type); @@ -9255,7 +9351,13 @@ static void rtw_cfg80211_init_ht_capab(_adapter *padapter ht_cap->ht_supported = 1; - ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | + /* According to the comment in rtw_ap.c: + * "Note: currently we switch to the MIXED op mode if HT non-greenfield + * station is associated. Probably it's a theoretical case, since + * it looks like all known HT STAs support greenfield." + * Therefore Greenfield is added to ht_cap + */ + ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; rtw_cfg80211_init_ht_capab_ex(padapter, ht_cap, band, rf_type); @@ -9421,6 +9523,8 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); struct registry_priv *regsty = dvobj_to_regsty(dvobj); + struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter); +struct ieee80211_supported_band *band; wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; @@ -9491,6 +9595,9 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) wiphy->bands[NL80211_BAND_5GHZ] = rtw_spt_band_alloc(BAND_ON_5G); #endif +#if defined(CONFIG_NET_NS) + wiphy->flags |= WIPHY_FLAG_NETNS_OK; +#endif //CONFIG_NET_NS #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 38) && LINUX_VERSION_CODE < KERNEL_VERSION(3, 0, 0)) wiphy->flags |= WIPHY_FLAG_SUPPORTS_SEPARATE_DEFAULT_KEYS; #endif @@ -9502,9 +9609,12 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) /* wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; */ #endif -#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) && \ - LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0)) - wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; +#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)) + wiphy->max_sched_scan_reqs = 1; +#else + wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; +#endif #ifdef CONFIG_PNO_SUPPORT wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) @@ -9560,6 +9670,31 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy) #if (KERNEL_VERSION(3, 8, 0) <= LINUX_VERSION_CODE) wiphy->features |= NL80211_FEATURE_SAE; #endif + + wiphy->available_antennas_tx = hal_spec->tx_nss_num; + wiphy->available_antennas_rx = hal_spec->rx_nss_num; + +if (IsSupported24G(adapter->registrypriv.wireless_mode)) { + band = wiphy->bands[NL80211_BAND_2GHZ]; + if (band) { + #if defined(CONFIG_80211N_HT) + rtw_cfg80211_init_ht_capab(adapter, &band->ht_cap, BAND_ON_2_4G, RF_1T1R); + #endif + } + } +#ifdef CONFIG_IEEE80211_BAND_5GHZ + if (is_supported_5g(adapter->registrypriv.wireless_mode)) { + band = wiphy->bands[NL80211_BAND_5GHZ]; + if (band) { + #if defined(CONFIG_80211N_HT) + rtw_cfg80211_init_ht_capab(adapter, &band->ht_cap, BAND_ON_5G, RF_1T1R); + #endif + #if defined(CONFIG_80211AC_VHT) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 6, 0)) + rtw_cfg80211_init_vht_capab(adapter, &band->vht_cap, BAND_ON_5G, RF_1T1R); + #endif + } + } +#endif } #ifdef CONFIG_RFKILL_POLL @@ -9726,7 +9861,7 @@ int rtw_hostapd_acs_dump_survey(struct wiphy *wiphy, struct net_device *netdev, #elif defined(CONFIG_RTW_ACS) && defined(CONFIG_BACKGROUND_NOISE_MONITOR) rtw_cfg80211_set_survey_info_with_clm(padapter, idx, info); #else - RTW_ERR("%s: unknown acs operation!\n", __func__); + RTW_ERR("%s: unknown acs operation!\n", __func__); #endif return ret; @@ -9915,16 +10050,15 @@ static struct cfg80211_ops rtw_cfg80211_ops = { #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) .mgmt_tx = cfg80211_rtw_mgmt_tx, +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0)) + .update_mgmt_frame_registrations = cfg80211_rtw_update_mgmt_frame_register, +#else + .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, +#endif #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 34) && LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) .action = cfg80211_rtw_mgmt_tx, #endif -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 8, 0)) - .update_mgmt_frame_registrations = cfg80211_rtw_mgmt_frame_register, -#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) - .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, -#endif - #if defined(CONFIG_TDLS) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0)) .tdls_mgmt = cfg80211_rtw_tdls_mgmt, .tdls_oper = cfg80211_rtw_tdls_oper, @@ -9998,12 +10132,6 @@ int rtw_wiphy_register(struct wiphy *wiphy) { RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -#if ( ((LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 0)) && \ - LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) \ - || defined(RTW_VENDOR_EXT_SUPPORT) ) - rtw_cfgvendor_attach(wiphy); -#endif - rtw_regd_init(wiphy); return wiphy_register(wiphy); @@ -10013,12 +10141,6 @@ void rtw_wiphy_unregister(struct wiphy *wiphy) { RTW_INFO(FUNC_WIPHY_FMT"\n", FUNC_WIPHY_ARG(wiphy)); -#if ( ((LINUX_VERSION_CODE < KERNEL_VERSION(5, 3, 0)) && \ - LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) \ - || defined(RTW_VENDOR_EXT_SUPPORT) ) - rtw_cfgvendor_detach(wiphy); -#endif - #if defined(RTW_DEDICATED_P2P_DEVICE) rtw_pd_iface_free(wiphy); #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.h b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.h index 677548015b2518..e7dd8050e97a9a 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.h +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_cfg80211.h @@ -423,6 +423,5 @@ u8 rtw_cfg80211_ch_switch_notify(_adapter *adapter, u8 ch, u8 bw, u8 offset, u8 (band == BAND_ON_2_4G) ? NL80211_BAND_2GHZ : \ (band == BAND_ON_5G) ? NL80211_BAND_5GHZ : NUM_NL80211_BANDS -#include "rtw_cfgvendor.h" #endif /* __IOCTL_CFG80211_H__ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_linux.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_linux.c index 1060cf017e4689..b5b911904a938e 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_linux.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_linux.c @@ -1,3 +1,4 @@ + /****************************************************************************** * * Copyright(c) 2007 - 2017 Realtek Corporation. @@ -265,6 +266,7 @@ uint rtw_is_cckratesonly_included(u8 *rate) } */ +#ifdef CONFIG_WIRELESS_EXT static int search_p2p_wfd_ie(_adapter *padapter, struct iw_request_info *info, struct wlan_network *pnetwork, char *start, char *stop) @@ -338,6 +340,7 @@ static int search_p2p_wfd_ie(_adapter *padapter, #endif /* CONFIG_P2P */ return _TRUE; } +#endif static inline char *iwe_stream_mac_addr_proess(_adapter *padapter, struct iw_request_info *info, struct wlan_network *pnetwork, char *start, char *stop, struct iw_event *iwe) @@ -781,6 +784,7 @@ static inline char *iwe_stream_net_rsv_process(_adapter *padapter, return start; } +#ifdef CONFIG_WIRELESS_EXT static char *translate_scan(_adapter *padapter, struct iw_request_info *info, struct wlan_network *pnetwork, char *start, char *stop) @@ -1197,7 +1201,9 @@ static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen) return ret; } +#endif +#ifdef CONFIG_WIRELESS_EXT static int rtw_wx_get_name(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -2453,25 +2459,19 @@ static int rtw_wx_get_essid(struct net_device *dev, struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; - - if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { len = pcur_bss->Ssid.SsidLength; - - wrqu->essid.length = len; - - _rtw_memcpy(extra, pcur_bss->Ssid.Ssid, len); - - wrqu->essid.flags = 1; } else { - ret = -1; - goto exit; + len = 0; } + wrqu->essid.length = len; -exit: + memcpy(extra, pcur_bss->Ssid.Ssid, len); + wrqu->essid.flags = 1; +exit: return ret; } @@ -6861,21 +6861,17 @@ static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) /* down(&ieee->wx_sem); */ - if (p->length < sizeof(struct ieee_param) || !p->pointer) { - ret = -EINVAL; - goto out; - } + if (!p->pointer || p->length != sizeof(struct ieee_param)) + return -EINVAL; param = (struct ieee_param *)rtw_malloc(p->length); - if (param == NULL) { - ret = -ENOMEM; - goto out; - } + + if (param == NULL) + return -ENOMEM; if (copy_from_user(param, p->pointer, p->length)) { rtw_mfree((u8 *)param, p->length); - ret = -EFAULT; - goto out; + return -EFAULT; } switch (param->cmd) { @@ -6909,12 +6905,7 @@ static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) rtw_mfree((u8 *)param, p->length); -out: - - /* up(&ieee->wx_sem); */ - return ret; - } #ifdef CONFIG_AP_MODE @@ -7721,32 +7712,21 @@ static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) * so, we just check hw_init_completed */ - if (!rtw_is_hw_init_completed(padapter)) { - ret = -EPERM; - goto out; - } - + if (!rtw_is_hw_init_completed(padapter)) + return -EPERM; - /* if (p->length < sizeof(struct ieee_param) || !p->pointer){ */ - if (!p->pointer) { - ret = -EINVAL; - goto out; - } + if (!p->pointer || p->length != (sizeof(struct ieee_param) + 100)) + return -EINVAL; param = (struct ieee_param *)rtw_malloc(p->length); - if (param == NULL) { - ret = -ENOMEM; - goto out; - } + if (param == NULL) + return -ENOMEM; if (copy_from_user(param, p->pointer, p->length)) { rtw_mfree((u8 *)param, p->length); - ret = -EFAULT; - goto out; + return -EFAULT; } - /* RTW_INFO("%s, cmd=%d\n", __FUNCTION__, param->cmd); */ - switch (param->cmd) { case RTL871X_HOSTAPD_FLUSH: @@ -7839,10 +7819,7 @@ static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) rtw_mfree((u8 *)param, p->length); -out: - return ret; - } #endif @@ -12022,6 +11999,7 @@ static int rtw_test( return 0; } +#ifdef CONFIG_WIRELESS_EXT static iw_handler rtw_handlers[] = { NULL, /* SIOCSIWCOMMIT */ rtw_wx_get_name, /* SIOCGIWNAME */ @@ -12345,7 +12323,9 @@ static iw_handler rtw_private_handler[] = { rtw_widi_set_probe_request, /* 0x1F */ #endif /* CONFIG_INTEL_WIDI */ }; +#endif +#ifdef CONFIG_WIRELESS_EXT #if WIRELESS_EXT >= 17 static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) { @@ -12355,12 +12335,16 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) int tmp_qual = 0; int tmp_noise = 0; +#ifndef CONFIG_ALLOW_UNLINKED_NOISE_MONITOR if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) != _TRUE) { piwstats->qual.qual = 0; piwstats->qual.level = 0; piwstats->qual.noise = 0; /* RTW_INFO("No link level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise); */ - } else { + } + else +#endif + { #ifdef CONFIG_SIGNAL_DISPLAY_DBM tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); #else @@ -12401,6 +12385,7 @@ static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) return &padapter->iwstats; } #endif +#endif #ifdef CONFIG_WIRELESS_EXT struct iw_handler_def rtw_handlers_def = { @@ -12416,7 +12401,6 @@ struct iw_handler_def rtw_handlers_def = { .get_wireless_stats = rtw_get_wireless_stats, #endif }; -#endif /* copy from net/wireless/wext.c start * ---------------------------------------------------------------- @@ -12794,6 +12778,7 @@ static int _rtw_ioctl_wext_private(struct net_device *dev, union iwreq_data *wrq return err; } +#endif #ifdef CONFIG_COMPAT static int rtw_ioctl_compat_wext_private(struct net_device *dev, struct ifreq *rq) @@ -12821,6 +12806,7 @@ static int rtw_ioctl_compat_wext_private(struct net_device *dev, struct ifreq *r } #endif /* CONFIG_COMPAT */ +#ifdef CONFIG_WIRELESS_EXT static int rtw_ioctl_standard_wext_private(struct net_device *dev, struct ifreq *rq) { struct iw_point *iwp; @@ -12852,6 +12838,8 @@ static int rtw_ioctl_wext_private(struct net_device *dev, struct ifreq *rq) #endif /* CONFIG_COMPAT */ return rtw_ioctl_standard_wext_private(dev, rq); } +#endif /* CONFIG_WIRELESS_EXT */ +#endif /* also CONFIG_WIRELESS_EXT */ int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { @@ -12859,6 +12847,7 @@ int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) int ret = 0; switch (cmd) { +#ifdef CONFIG_WIRELESS_EXT case RTL_IOCTL_WPA_SUPPLICANT: ret = wpa_supplicant_ioctl(dev, &wrq->u.data); break; @@ -12866,11 +12855,9 @@ int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) case RTL_IOCTL_HOSTAPD: ret = rtw_hostapd_ioctl(dev, &wrq->u.data); break; -#ifdef CONFIG_WIRELESS_EXT case SIOCSIWMODE: ret = rtw_wx_set_mode(dev, NULL, &wrq->u, NULL); break; -#endif #endif /* CONFIG_AP_MODE */ case SIOCDEVPRIVATE: ret = rtw_ioctl_wext_private(dev, rq); @@ -12878,6 +12865,7 @@ int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) case (SIOCDEVPRIVATE+1): ret = rtw_android_priv_cmd(dev, rq, cmd); break; +#endif default: ret = -EOPNOTSUPP; break; @@ -12885,3 +12873,4 @@ int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) return ret; } + diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_mp.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_mp.c index 06233dc9f25598..a459afb11717d4 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_mp.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/ioctl_mp.c @@ -14,16 +14,16 @@ *****************************************************************************/ #if defined(CONFIG_MP_INCLUDED) +#ifdef MARK_KERNEL_PFU + #include + #include +#endif + #include #include #include #include "../../hal/phydm/phydm_precomp.h" - -#if defined(CONFIG_RTL8723B) - #include -#endif - /* * Input Format: %s,%d,%d * %s is width, could be @@ -113,7 +113,6 @@ int rtw_mp_write_reg(struct net_device *dev, return ret; } - /* * Input Format: %s,%d * %s is width, could be @@ -248,7 +247,6 @@ int rtw_mp_read_reg(struct net_device *dev, return ret; } - /* * Input Format: %d,%x,%x * %d is RF path, should be smaller than MAX_RF_PATH_NUMS @@ -265,12 +263,10 @@ int rtw_mp_write_rf(struct net_device *dev, PADAPTER padapter = rtw_netdev_priv(dev); char input[wrqu->length]; - _rtw_memset(input, 0, wrqu->length); if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; - ret = sscanf(input, "%d,%x,%x", &path, &addr, &data); if (ret < 3) return -EINVAL; @@ -292,7 +288,6 @@ int rtw_mp_write_rf(struct net_device *dev, return 0; } - /* * Input Format: %d,%x * %d is RF path, should be smaller than MAX_RF_PATH_NUMS @@ -361,7 +356,6 @@ int rtw_mp_read_rf(struct net_device *dev, return 0; } - int rtw_mp_start(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -385,8 +379,6 @@ int rtw_mp_start(struct net_device *dev, return ret; } - - int rtw_mp_stop(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -404,7 +396,6 @@ int rtw_mp_stop(struct net_device *dev, return ret; } - int rtw_mp_rate(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -452,7 +443,6 @@ int rtw_mp_rate(struct net_device *dev, return 0; } - int rtw_mp_channel(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -480,7 +470,6 @@ int rtw_mp_channel(struct net_device *dev, return 0; } - int rtw_mp_ch_offset(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -506,7 +495,6 @@ int rtw_mp_ch_offset(struct net_device *dev, return 0; } - int rtw_mp_bandwidth(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -540,7 +528,6 @@ int rtw_mp_bandwidth(struct net_device *dev, return 0; } - int rtw_mp_txpower_index(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -586,7 +573,6 @@ int rtw_mp_txpower_index(struct net_device *dev, return 0; } - int rtw_mp_txpower(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -625,7 +611,6 @@ int rtw_mp_txpower(struct net_device *dev, return 0; } - int rtw_mp_ant_tx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -672,7 +657,6 @@ int rtw_mp_ant_tx(struct net_device *dev, return 0; } - int rtw_mp_ant_rx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -721,7 +705,6 @@ int rtw_mp_ant_rx(struct net_device *dev, return 0; } - int rtw_set_ctx_destAddr(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -746,8 +729,6 @@ int rtw_set_ctx_destAddr(struct net_device *dev, return 0; } - - int rtw_mp_ctx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -849,8 +830,6 @@ int rtw_mp_ctx(struct net_device *dev, return status; } - - int rtw_mp_disable_bt_coexist(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -890,7 +869,6 @@ int rtw_mp_disable_bt_coexist(struct net_device *dev, return 0; } - int rtw_mp_arx(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1044,7 +1022,6 @@ int rtw_mp_arx(struct net_device *dev, return 0; } - int rtw_mp_trx_query(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1073,7 +1050,6 @@ int rtw_mp_trx_query(struct net_device *dev, return 0; } - int rtw_mp_pwrtrk(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1113,8 +1089,6 @@ int rtw_mp_pwrtrk(struct net_device *dev, return 0; } - - int rtw_mp_psd(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1134,7 +1108,6 @@ int rtw_mp_psd(struct net_device *dev, return 0; } - int rtw_mp_thermal(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1147,36 +1120,6 @@ int rtw_mp_thermal(struct net_device *dev, #endif #if defined(CONFIG_RTL8812A) || defined(CONFIG_RTL8821A) || defined(CONFIG_RTL8814A) u16 addr = EEPROM_THERMAL_METER_8812; -#endif -#ifdef CONFIG_RTL8192E - u16 addr = EEPROM_THERMAL_METER_8192E; -#endif -#ifdef CONFIG_RTL8192F - u16 addr = EEPROM_THERMAL_METER_8192F; -#endif -#ifdef CONFIG_RTL8723B - u16 addr = EEPROM_THERMAL_METER_8723B; -#endif -#ifdef CONFIG_RTL8703B - u16 addr = EEPROM_THERMAL_METER_8703B; -#endif -#ifdef CONFIG_RTL8723D - u16 addr = EEPROM_THERMAL_METER_8723D; -#endif -#ifdef CONFIG_RTL8188F - u16 addr = EEPROM_THERMAL_METER_8188F; -#endif -#ifdef CONFIG_RTL8188GTV - u16 addr = EEPROM_THERMAL_METER_8188GTV; -#endif -#ifdef CONFIG_RTL8822B - u16 addr = EEPROM_THERMAL_METER_8822B; -#endif -#ifdef CONFIG_RTL8821C - u16 addr = EEPROM_THERMAL_METER_8821C; -#endif -#ifdef CONFIG_RTL8710B - u16 addr = EEPROM_THERMAL_METER_8710B; #endif u16 cnt = 1; u16 max_available_size = 0; @@ -1209,7 +1152,6 @@ int rtw_mp_thermal(struct net_device *dev, } - int rtw_mp_reset_stats(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1235,7 +1177,6 @@ int rtw_mp_reset_stats(struct net_device *dev, return 0; } - int rtw_mp_dump(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1257,7 +1198,6 @@ int rtw_mp_dump(struct net_device *dev, return 0; } - int rtw_mp_phypara(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1285,7 +1225,6 @@ int rtw_mp_phypara(struct net_device *dev, } - int rtw_mp_SetRFPath(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1335,7 +1274,6 @@ int rtw_mp_SetRFPath(struct net_device *dev, return 0; } - int rtw_mp_switch_rf_path(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1346,7 +1284,6 @@ int rtw_mp_switch_rf_path(struct net_device *dev, int bwlg = 1, bwla = 1, btg = 1, bbt=1; u8 ret = 0; - if (copy_from_user(input, wrqu->pointer, wrqu->length)) return -EFAULT; @@ -1414,7 +1351,6 @@ int rtw_mp_QueryDrv(struct net_device *dev, return 0; } - int rtw_mp_PwrCtlDM(struct net_device *dev, struct iw_request_info *info, struct iw_point *wrqu, char *extra) @@ -1478,7 +1414,6 @@ int rtw_mp_getver(struct net_device *dev, return 0; } - int rtw_mp_mon(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -1615,7 +1550,6 @@ int rtw_mp_pretx_proc(PADAPTER padapter, u8 bStartTest, char *extra) return 0; } - int rtw_mp_tx(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -1716,6 +1650,9 @@ int rtw_mp_tx(struct net_device *dev, _rtw_memset(pMptCtx->PMacTxInfo.MacAddress, 0xFF, ETH_ALEN); + #ifdef MARK_KERNEL_PFU + kernel_fpu_begin(); + #endif PMAC_Get_Pkt_Param(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); if (MPT_IS_CCK_RATE(pMptCtx->PMacTxInfo.TX_RATE)) @@ -1726,6 +1663,9 @@ int rtw_mp_tx(struct net_device *dev, /* 24 BIT*/ L_SIG_generator(pMptCtx->PMacPktInfo.N_sym, &pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); } + #ifdef MARK_KERNEL_PFU + kernel_fpu_end(); + #endif /* 48BIT*/ if (MPT_IS_HT_RATE(pMptCtx->PMacTxInfo.TX_RATE)) HT_SIG_generator(&pMptCtx->PMacTxInfo, &pMptCtx->PMacPktInfo); @@ -1739,7 +1679,6 @@ int rtw_mp_tx(struct net_device *dev, /* 32 BIT*/ VHT_Delimiter_generator(&pMptCtx->PMacTxInfo); } - mpt_ProSetPMacTx(padapter); } else if (strncmp(extra, "pmact,mode=", 11) == 0) { @@ -1938,7 +1877,6 @@ int rtw_mp_tx(struct net_device *dev, return status; } - int rtw_mp_rx(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -2060,7 +1998,6 @@ int rtw_mp_rx(struct net_device *dev, return 0; } - int rtw_mp_hwtx(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -2069,7 +2006,7 @@ int rtw_mp_hwtx(struct net_device *dev, struct mp_priv *pmp_priv = &padapter->mppriv; PMPT_CONTEXT pMptCtx = &(padapter->mppriv.mpt_ctx); -#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8821B) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) +#if defined(CONFIG_MP_VHT_HW_TX_MODE) u8 input[wrqu->data.length]; if (copy_from_user(input, wrqu->data.pointer, wrqu->data.length)) @@ -2237,7 +2174,6 @@ int rtw_efuse_mask_file(struct net_device *dev, return 0; } - int rtw_efuse_file_map(struct net_device *dev, struct iw_request_info *info, union iwreq_data *wrqu, char *extra) @@ -2455,9 +2391,6 @@ int rtw_mp_SetBT(struct net_device *dev, #endif RTW_INFO(" FirmwareDownload!\n"); -#if defined(CONFIG_RTL8723B) - status = rtl8723b_FirmwareDownload(padapter, _FALSE); -#endif RTW_INFO("Wait for FirmwareDownloadBT fw boot!\n"); rtw_msleep_os(1000); #ifdef CONFIG_BT_COEXIST diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/os_intfs.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/os_intfs.c index 42622922430f00..1085d6cde030f6 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/os_intfs.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/os_intfs.c @@ -17,13 +17,6 @@ #include #include -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) - - #error "Shall be Linux or Windows, but not both!\n" - -#endif - - MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); MODULE_AUTHOR("Realtek Semiconductor Corp."); @@ -46,7 +39,7 @@ int rtw_vrtl_carrier_sense = AUTO_VCS; int rtw_vcs_type = RTS_CTS; int rtw_rts_thresh = 2347; int rtw_frag_thresh = 2346; -int rtw_preamble = PREAMBLE_LONG;/* long, short, auto */ +int rtw_preamble = PREAMBLE_AUTO;/* long, short, auto */ int rtw_scan_mode = 1;/* active, passive */ /* int smart_ps = 1; */ #ifdef CONFIG_POWER_SAVING @@ -79,6 +72,17 @@ int rtw_scan_mode = 1;/* active, passive */ int rtw_lps_chk_by_tp = 0; #endif /* CONFIG_POWER_SAVING */ +int rtw_monitor_overwrite_seqnum = 0; +module_param(rtw_monitor_overwrite_seqnum, int, 0644); +MODULE_PARM_DESC(rtw_monitor_overwrite_seqnum, "Overwrite the sequence number of injected frames"); + +int rtw_monitor_retransmit = 0; +module_param(rtw_monitor_retransmit, int, 0644); +MODULE_PARM_DESC(rtw_monitor_retransmit, "Retransmit injected frames"); + +int rtw_monitor_disable_1m = 0; +module_param(rtw_monitor_disable_1m, int, 0644); +MODULE_PARM_DESC(rtw_monitor_disable_1m, "Disable default 1Mbps rate for monitor injected frames"); module_param(rtw_ips_mode, int, 0644); MODULE_PARM_DESC(rtw_ips_mode, "The default IPS mode"); @@ -93,7 +97,7 @@ module_param(rtw_lps_chk_by_tp, int, 0644); * rtw_smart_ps = 1 => TX: pwr bit = 0, RX: PS_Poll * rtw_smart_ps = 2 => TX: pwr bit = 0, RX: NullData with pwr bit = 0 */ -int rtw_smart_ps = 2; +int rtw_smart_ps = 0; int rtw_max_bss_cnt = 0; module_param(rtw_max_bss_cnt, int, 0644); @@ -103,7 +107,7 @@ module_param(rtw_max_bss_cnt, int, 0644); * rtw_smart_ps = 1 => Refer to Beacon's TIM Bitmap * rtw_smart_ps = 2 => Don't refer to Beacon's TIM Bitmap */ -int rtw_wmm_smart_ps = 2; +int rtw_wmm_smart_ps = 1; #endif /* CONFIG_WMMPS_STA */ int rtw_check_fw_ps = 1; @@ -112,6 +116,10 @@ int rtw_check_fw_ps = 1; int rtw_early_mode = 1; #endif +#ifdef CONFIG_RTW_SW_LED +int rtw_led_ctrl = 1; // default to normal blink +#endif + int rtw_usb_rxagg_mode = 2;/* RX_AGG_DMA=1, RX_AGG_USB=2 */ module_param(rtw_usb_rxagg_mode, int, 0644); @@ -122,13 +130,9 @@ module_param(rtw_dynamic_agg_enable, int, 0644); * please refer to "How_to_set_driver_debug_log_level.doc" to set the available level. */ #ifdef CONFIG_RTW_DEBUG -#ifdef RTW_LOG_LEVEL - uint rtw_drv_log_level = (uint)RTW_LOG_LEVEL; /* from Makefile */ -#else - uint rtw_drv_log_level = _DRV_INFO_; -#endif +uint rtw_drv_log_level = _DRV_NONE_; module_param(rtw_drv_log_level, uint, 0644); -MODULE_PARM_DESC(rtw_drv_log_level, "set log level when insert driver module, default log level is _DRV_INFO_ = 4"); +MODULE_PARM_DESC(rtw_drv_log_level, "set log level when insert driver module, default log level is _DRV_NONE_ = 0"); #endif int rtw_radio_enable = 1; int rtw_long_retry_lmt = 7; @@ -189,7 +193,7 @@ int rtw_bw_mode = CONFIG_RTW_CUSTOMIZE_BWMODE; int rtw_bw_mode = 0x21; #endif int rtw_ampdu_enable = 1;/* for enable tx_ampdu , */ /* 0: disable, 0x1:enable */ -int rtw_rx_stbc = 1;/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */ +int rtw_rx_stbc = 3;/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */ #if (defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B)) && defined(CONFIG_PCI_HCI) int rtw_rx_ampdu_amsdu = 2;/* 0: disabled, 1:enabled, 2:auto . There is an IOT issu with DLINK DIR-629 when the flag turn on */ #elif (defined(CONFIG_RTL8822B) && defined(CONFIG_SDIO_HCI)) @@ -296,7 +300,7 @@ But Softap must be SHUT DOWN once P2P decide to set up connection and become a G #endif #ifdef CONFIG_BT_COEXIST -int rtw_btcoex_enable = 2; +int rtw_btcoex_enable = 0; module_param(rtw_btcoex_enable, int, 0644); MODULE_PARM_DESC(rtw_btcoex_enable, "BT co-existence on/off, 0:off, 1:on, 2:by efuse"); @@ -471,6 +475,12 @@ module_param(rtw_pci_aspm_enable, int, 0644); #ifdef CONFIG_TX_EARLY_MODE module_param(rtw_early_mode, int, 0644); #endif + +#ifdef CONFIG_RTW_SW_LED +module_param(rtw_led_ctrl, int, 0644); +MODULE_PARM_DESC(rtw_led_ctrl,"Led Control: 0=Always off, 1=Normal blink, 2=Always on"); +#endif + #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE char *rtw_adaptor_info_caching_file_path = "/data/misc/wifi/rtw_cache"; module_param(rtw_adaptor_info_caching_file_path, charp, 0644); @@ -1015,6 +1025,9 @@ uint loadparam(_adapter *padapter) #ifdef CONFIG_TX_EARLY_MODE registry_par->early_mode = (u8)rtw_early_mode; +#endif +#ifdef CONFIG_RTW_SW_LED + registry_par->led_ctrl = (u8)rtw_led_ctrl; #endif registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit; registry_par->rf_config = (u8)rtw_rf_config; @@ -1218,6 +1231,10 @@ uint loadparam(_adapter *padapter) registry_par->fw_tbtt_rpt = rtw_tbtt_rpt; #endif + registry_par->monitor_overwrite_seqnum = (u8)rtw_monitor_overwrite_seqnum; + registry_par->monitor_retransmit = (u8)rtw_monitor_retransmit; + registry_par->monitor_disable_1m = (u8)rtw_monitor_disable_1m; + return status; } @@ -1359,7 +1376,7 @@ unsigned int rtw_classify8021d(struct sk_buff *skb) static u16 rtw_select_queue(struct net_device *dev, struct sk_buff *skb #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 13, 0) - #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0) + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 0) || RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0) , struct net_device *sb_dev #else , void *accel_priv @@ -1426,6 +1443,7 @@ static u8 is_rtw_ndev(struct net_device *ndev) static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state, void *ptr) { struct net_device *ndev; + _adapter *adapter; if (ptr == NULL) return NOTIFY_DONE; @@ -1439,6 +1457,8 @@ static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state if (ndev == NULL) return NOTIFY_DONE; + adapter = rtw_netdev_priv(ndev); + if (!is_rtw_ndev(ndev)) return NOTIFY_DONE; @@ -1447,6 +1467,8 @@ static int rtw_ndev_notifier_call(struct notifier_block *nb, unsigned long state switch (state) { case NETDEV_CHANGENAME: rtw_adapter_proc_replace(ndev); + strncpy(adapter->old_ifname, ndev->name, IFNAMSIZ); + adapter->old_ifname[IFNAMSIZ-1] = 0; break; #ifdef CONFIG_NEW_NETDEV_HDL case NETDEV_PRE_UP : @@ -1510,7 +1532,9 @@ static const struct net_device_ops rtw_netdev_ops = { #endif .ndo_set_mac_address = rtw_net_set_mac_address, .ndo_get_stats = rtw_net_get_stats, +#ifdef CONFIG_WIRELESS_EXT .ndo_do_ioctl = rtw_ioctl, +#endif }; #endif @@ -1578,6 +1602,9 @@ void rtw_hook_if_ops(struct net_device *ndev) #ifdef CONFIG_CONCURRENT_MODE static void rtw_hook_vir_if_ops(struct net_device *ndev); #endif +static const struct device_type wlan_type = { + .name = "wlan", +}; struct net_device *rtw_init_netdev(_adapter *old_padapter) { _adapter *padapter; @@ -1592,6 +1619,13 @@ struct net_device *rtw_init_netdev(_adapter *old_padapter) if (!pnetdev) return NULL; + pnetdev->mtu = WLAN_DATA_MAXLEN; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) + pnetdev->min_mtu = WLAN_MIN_ETHFRM_LEN; + pnetdev->max_mtu = WLAN_DATA_MAXLEN; +#endif + + pnetdev->dev.type = &wlan_type; padapter = rtw_netdev_priv(pnetdev); padapter->pnetdev = pnetdev; @@ -1720,9 +1754,11 @@ int rtw_os_ndev_register(_adapter *adapter, const char *name) rtw_init_netdev_name(ndev, name); _rtw_memcpy(ndev->dev_addr, adapter_mac_addr(adapter), ETH_ALEN); +#if defined(CONFIG_NET_NS) + dev_net_set(ndev, wiphy_net(adapter_to_wiphy(adapter))); +#endif //defined(CONFIG_NET_NS) /* Tell the network stack we exist */ - if (rtnl_lock_needed) ret = (register_netdev(ndev) == 0) ? _SUCCESS : _FAIL; else @@ -1762,10 +1798,6 @@ void rtw_os_ndev_unregister(_adapter *adapter) netdev = adapter->pnetdev; -#if defined(CONFIG_IOCTL_CFG80211) - rtw_cfg80211_ndev_res_unregister(adapter); -#endif - if ((adapter->DriverState != DRIVER_DISAPPEAR) && netdev) { struct dvobj_priv *dvobj = adapter_to_dvobj(adapter); u8 rtnl_lock_needed = rtw_rtnl_lock_needed(dvobj); @@ -1775,6 +1807,9 @@ void rtw_os_ndev_unregister(_adapter *adapter) else unregister_netdevice(netdev); } +#if defined(CONFIG_IOCTL_CFG80211) + rtw_cfg80211_ndev_res_unregister(adapter); +#endif #if defined(CONFIG_IOCTL_CFG80211) && !defined(RTW_SINGLE_WIPHY) #ifdef CONFIG_RFKILL_POLL @@ -1959,7 +1994,6 @@ u32 rtw_start_drv_threads(_adapter *padapter) } } - #ifdef CONFIG_EVENT_THREAD_MODE if (padapter->evtThread == NULL) { RTW_INFO(FUNC_ADPT_FMT " start RTW_EVENT_THREAD\n", FUNC_ADPT_ARG(padapter)); @@ -2054,15 +2088,12 @@ u8 rtw_init_default_value(_adapter *padapter) psecuritypriv->dot118021x_bmc_cam_id = INVALID_SEC_MAC_CAM_ID; #endif - /* pwrctrl_priv */ - /* registry_priv */ rtw_init_registrypriv_dev_network(padapter); rtw_update_registrypriv_dev_network(padapter); - /* hal_priv */ rtw_hal_def_value_init(padapter); @@ -2197,7 +2228,6 @@ struct dvobj_priv *devobj_init(void) pdvobj->en_napi_dynamic = 0; #endif /* CONFIG_RTW_NAPI_DYNAMIC */ - #ifdef CONFIG_RTW_TPT_MODE pdvobj->tpt_mode = 0; pdvobj->edca_be_ul = 0x5ea42b; @@ -2512,8 +2542,6 @@ u8 rtw_init_drv_sw(_adapter *padapter) exit: - - return ret8; } @@ -2789,6 +2817,8 @@ static int netdev_vir_if_close(struct net_device *pnetdev) #endif #ifdef CONFIG_IOCTL_CFG80211 + wdev->iftype = NL80211_IFTYPE_MONITOR; + wdev->current_bss = NULL; rtw_scan_abort(padapter); rtw_cfg80211_wait_scan_req_empty(padapter, 200); adapter_wdev_data(padapter)->bandroid_scan = _FALSE; @@ -2812,7 +2842,9 @@ static const struct net_device_ops rtw_netdev_vir_if_ops = { .ndo_start_xmit = rtw_xmit_entry, .ndo_set_mac_address = rtw_net_set_mac_address, .ndo_get_stats = rtw_net_get_stats, +#ifdef CONFIG_WIRELESS_EXT .ndo_do_ioctl = rtw_ioctl, +#endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) .ndo_select_queue = rtw_select_queue, #endif @@ -2871,7 +2903,6 @@ _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, padapter->hw_port = HW_PORT1; #endif - /****** hook vir if into dvobj ******/ pdvobjpriv = adapter_to_dvobj(padapter); padapter->iface_id = pdvobjpriv->iface_nums; @@ -2889,7 +2920,6 @@ _adapter *rtw_drv_add_vir_if(_adapter *primary_padapter, if (rtw_init_drv_sw(padapter) != _SUCCESS) goto free_drv_sw; - /*get mac address from primary_padapter*/ _rtw_memcpy(mac, adapter_mac_addr(primary_padapter), ETH_ALEN); @@ -2984,7 +3014,6 @@ void rtw_drv_free_vir_if(_adapter *padapter) rtw_vmfree((u8 *)padapter, sizeof(_adapter)); } - void rtw_drv_stop_vir_ifaces(struct dvobj_priv *dvobj) { int i; @@ -3001,7 +3030,6 @@ void rtw_drv_free_vir_ifaces(struct dvobj_priv *dvobj) rtw_drv_free_vir_if(dvobj->padapters[i]); } - #endif /*end of CONFIG_CONCURRENT_MODE*/ /* IPv4, IPv6 IP addr notifier */ @@ -3371,7 +3399,7 @@ int _netdev_open(struct net_device *pnetdev) rtw_cfg80211_init_wiphy(padapter); rtw_cfg80211_init_wdev_data(padapter); #endif - /* rtw_netif_carrier_on(pnetdev); */ /* call this func when rtw_joinbss_event_callback return success */ + rtw_netif_carrier_on(pnetdev); /* call this func when rtw_joinbss_event_callback return success */ rtw_netif_wake_queue(pnetdev); #ifdef CONFIG_BR_EXT @@ -3379,14 +3407,12 @@ int _netdev_open(struct net_device *pnetdev) netdev_br_init(pnetdev); #endif /* CONFIG_BR_EXT */ - padapter->bup = _TRUE; padapter->net_closed = _FALSE; padapter->netif_up = _TRUE; pwrctrlpriv->bips_processing = _FALSE; } - netdev_open_normal_process: RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); return 0; @@ -3415,12 +3441,14 @@ int _netdev_open(struct net_device *pnetdev) { uint status; _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); +#ifdef CONFIG_IOCTL_CFG80211 + struct wireless_dev *wdev = padapter->rtw_wdev; +#endif struct pwrctrl_priv *pwrctrlpriv = adapter_to_pwrctl(padapter); #ifdef CONFIG_BT_COEXIST_SOCKET_TRX HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ - RTW_INFO(FUNC_NDEV_FMT" , bup=%d\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); padapter->netif_up = _TRUE; @@ -3502,7 +3530,7 @@ int _netdev_open(struct net_device *pnetdev) rtw_set_pwr_state_check_timer(pwrctrlpriv); #endif - /* rtw_netif_carrier_on(pnetdev); */ /* call this func when rtw_joinbss_event_callback return success */ + rtw_netif_carrier_on(pnetdev); /* call this func when rtw_joinbss_event_callback return success */ rtw_netif_wake_queue(pnetdev); #ifdef CONFIG_BR_EXT @@ -3518,7 +3546,6 @@ int _netdev_open(struct net_device *pnetdev) RTW_INFO("CONFIG_BT_COEXIST: VIRTUAL_ADAPTER\n"); #endif /* CONFIG_BT_COEXIST_SOCKET_TRX */ - netdev_open_normal_process: #ifdef CONFIG_CONCURRENT_MODE @@ -3589,7 +3616,6 @@ int netdev_open(struct net_device *pnetdev) #endif _exit_critical_mutex(&(adapter_to_dvobj(padapter)->hw_init_mutex), NULL); - #ifdef CONFIG_AUTO_AP_MODE if (padapter->iface_id == IFACE_ID2) rtw_start_auto_ap(padapter); @@ -3608,7 +3634,6 @@ int ips_netdrv_open(_adapter *padapter) RTW_INFO("===> %s.........\n", __FUNCTION__); - rtw_clr_drv_stopped(padapter); /* padapter->bup = _TRUE; */ #ifdef CONFIG_NEW_NETDEV_HDL @@ -3695,7 +3720,6 @@ void rtw_ips_dev_unload(_adapter *padapter) #endif /* defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) */ RTW_INFO("====> %s...\n", __FUNCTION__); - #if defined(CONFIG_SWLPS_IN_IPS) || defined(CONFIG_FWLPS_IN_IPS) #ifdef DBG_CONFIG_ERROR_DETECT if (psrtpriv->silent_reset_inprogress == _TRUE) @@ -3763,7 +3787,6 @@ int _pm_netdev_open(_adapter *padapter) pwrctrlpriv->bips_processing = _FALSE; } - netdev_open_normal_process: RTW_INFO(FUNC_NDEV_FMT" Success (bup=%d)\n", FUNC_NDEV_ARG(pnetdev), padapter->bup); return 0; @@ -3867,7 +3890,6 @@ static int netdev_close(struct net_device *pnetdev) if (pnetdev) rtw_netif_stop_queue(pnetdev); -#ifndef CONFIG_ANDROID /* s2. */ LeaveAllPowerSaveMode(padapter); rtw_disassoc_cmd(padapter, 500, RTW_CMDF_WAIT_ACK); @@ -3877,7 +3899,8 @@ static int netdev_close(struct net_device *pnetdev) rtw_free_assoc_resources_cmd(padapter, _TRUE, RTW_CMDF_WAIT_ACK); /* s2-4. */ rtw_free_network_queue(padapter, _TRUE); -#endif + // Close LED + rtw_led_control(padapter, LED_CTL_POWER_OFF); } #ifdef CONFIG_BR_EXT @@ -4396,7 +4419,6 @@ int rtw_suspend_wow(_adapter *padapter) RTW_INFO("==> "FUNC_ADPT_FMT" entry....\n", FUNC_ADPT_ARG(padapter)); - RTW_INFO("wowlan_mode: %d\n", pwrpriv->wowlan_mode); RTW_INFO("wowlan_pno_enable: %d\n", pwrpriv->wowlan_pno_enable); #ifdef CONFIG_P2P_WOWLAN @@ -4614,7 +4636,6 @@ int rtw_suspend_ap_wow(_adapter *padapter) } #endif /* #ifdef CONFIG_AP_WOWLAN */ - int rtw_suspend_normal(_adapter *padapter) { int ret = _SUCCESS; @@ -4634,7 +4655,6 @@ int rtw_suspend_normal(_adapter *padapter) || (adapter_to_pwrctl(padapter)->rf_pwrstate == rf_off)) RTW_PRINT("%s: ### ERROR #### driver in IPS ####ERROR###!!!\n", __FUNCTION__); - #ifdef CONFIG_CONCURRENT_MODE rtw_set_drv_stopped(padapter); /*for stop thread*/ rtw_stop_cmd_thread(padapter); @@ -4727,7 +4747,6 @@ int rtw_suspend_common(_adapter *padapter) #endif /*CONFIG_AP_WOWLAN*/ } - RTW_PRINT("rtw suspend success in %d ms\n", rtw_get_passing_time_ms(start_time)); @@ -4814,7 +4833,6 @@ int rtw_resume_process_wow(_adapter *padapter) if (psta) set_sta_rate(padapter, psta); - rtw_clr_drv_stopped(padapter); RTW_INFO("%s: wowmode resuming, DriverStopped:%s\n", __func__, rtw_is_drv_stopped(padapter) ? "True" : "False"); @@ -4925,7 +4943,6 @@ int rtw_resume_process_ap_wow(_adapter *padapter) goto exit; } - #ifdef CONFIG_LPS if (!(pwrpriv->wowlan_dis_lps)) { rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "AP-WOWLAN"); @@ -5163,7 +5180,6 @@ int rtw_resume_common(_adapter *padapter) RTW_PRINT("%s:%d in %d ms\n", __FUNCTION__ , ret, rtw_get_passing_time_ms(start_time)); - return ret; } diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/recv_linux.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/recv_linux.c index 6bd2e0946199ba..2f7b3e375f0b8a 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/recv_linux.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/recv_linux.c @@ -404,7 +404,7 @@ void dynamic_napi_th_chk (_adapter *adapter) if (adapter->registrypriv.en_napi) { struct dvobj_priv *dvobj; struct registry_priv *registry; - + dvobj = adapter_to_dvobj(adapter); registry = &adapter->registrypriv; if (dvobj->traffic_stat.cur_rx_tp > registry->napi_threshold) @@ -520,7 +520,7 @@ void rtw_os_recv_indicate_pkt(_adapter *padapter, _pkt *pkt, union recv_frame *r #ifdef CONFIG_RTW_NAPI #ifdef CONFIG_RTW_NAPI_DYNAMIC if (!skb_queue_empty(&precvpriv->rx_napi_skb_queue) - && !adapter_to_dvobj(padapter)->en_napi_dynamic + && !adapter_to_dvobj(padapter)->en_napi_dynamic ) napi_recv(padapter, RTL_NAPI_WEIGHT); #endif diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.c index 0163a4b07ec115..af9c9aec8a1e10 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.c @@ -1,844 +1,844 @@ -/* - * Resizable, Scalable, Concurrent Hash Table - * - * Copyright (c) 2015 Herbert Xu - * Copyright (c) 2014-2015 Thomas Graf - * Copyright (c) 2008-2014 Patrick McHardy - * - * Code partially derived from nft_hash - * Rewritten with rehash code from br_multicast plus single list - * pointer as suggested by Josh Triplett - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define HASH_DEFAULT_SIZE 64UL -#define HASH_MIN_SIZE 4U -#define BUCKET_LOCKS_PER_CPU 128UL - -static u32 head_hashfn(struct rhashtable *ht, - const struct bucket_table *tbl, - const struct rhash_head *he) -{ - return rht_head_hashfn(ht, tbl, he, ht->p); -} - -#ifdef CONFIG_PROVE_LOCKING -#define ASSERT_RHT_MUTEX(HT) BUG_ON(!lockdep_rht_mutex_is_held(HT)) - -int lockdep_rht_mutex_is_held(struct rhashtable *ht) -{ - return (debug_locks) ? lockdep_is_held(&ht->mutex) : 1; -} - -int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash) -{ - spinlock_t *lock = rht_bucket_lock(tbl, hash); - - return (debug_locks) ? lockdep_is_held(lock) : 1; -} -#else -#define ASSERT_RHT_MUTEX(HT) -#endif - - -static int alloc_bucket_locks(struct rhashtable *ht, struct bucket_table *tbl, - gfp_t gfp) -{ - unsigned int i, size; -#if defined(CONFIG_PROVE_LOCKING) - unsigned int nr_pcpus = 2; -#else - unsigned int nr_pcpus = num_possible_cpus(); -#endif - - nr_pcpus = min_t(unsigned int, nr_pcpus, 32UL); - size = roundup_pow_of_two(nr_pcpus * ht->p.locks_mul); - - /* Never allocate more than 0.5 locks per bucket */ - size = min_t(unsigned int, size, tbl->size >> 1); - - if (sizeof(spinlock_t) != 0) { -#ifdef CONFIG_NUMA - if (size * sizeof(spinlock_t) > PAGE_SIZE && - gfp == GFP_KERNEL) - tbl->locks = vmalloc(size * sizeof(spinlock_t)); - else -#endif - tbl->locks = kmalloc_array(size, sizeof(spinlock_t), - gfp); - if (!tbl->locks) - return -ENOMEM; - for (i = 0; i < size; i++) - spin_lock_init(&tbl->locks[i]); - } - tbl->locks_mask = size - 1; - - return 0; -} - -static void bucket_table_free(const struct bucket_table *tbl) -{ - if (tbl) - kvfree(tbl->locks); - - kvfree(tbl); -} - -static void bucket_table_free_rcu(struct rcu_head *head) -{ - bucket_table_free(container_of(head, struct bucket_table, rcu)); -} - -static struct bucket_table *bucket_table_alloc(struct rhashtable *ht, - size_t nbuckets, - gfp_t gfp) -{ - struct bucket_table *tbl = NULL; - size_t size; - int i; - - size = sizeof(*tbl) + nbuckets * sizeof(tbl->buckets[0]); - if (size <= (PAGE_SIZE << PAGE_ALLOC_COSTLY_ORDER) || - gfp != GFP_KERNEL) - tbl = kzalloc(size, gfp | __GFP_NOWARN | __GFP_NORETRY); - if (tbl == NULL && gfp == GFP_KERNEL) - tbl = vzalloc(size); - if (tbl == NULL) - return NULL; - - tbl->size = nbuckets; - - if (alloc_bucket_locks(ht, tbl, gfp) < 0) { - bucket_table_free(tbl); - return NULL; - } - - INIT_LIST_HEAD(&tbl->walkers); - - get_random_bytes(&tbl->hash_rnd, sizeof(tbl->hash_rnd)); - - for (i = 0; i < nbuckets; i++) - INIT_RHT_NULLS_HEAD(tbl->buckets[i], ht, i); - - return tbl; -} - -static struct bucket_table *rhashtable_last_table(struct rhashtable *ht, - struct bucket_table *tbl) -{ - struct bucket_table *new_tbl; - - do { - new_tbl = tbl; - tbl = rht_dereference_rcu(tbl->future_tbl, ht); - } while (tbl); - - return new_tbl; -} - -static int rhashtable_rehash_one(struct rhashtable *ht, unsigned int old_hash) -{ - struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); - struct bucket_table *new_tbl = rhashtable_last_table(ht, - rht_dereference_rcu(old_tbl->future_tbl, ht)); - struct rhash_head __rcu **pprev = &old_tbl->buckets[old_hash]; - int err = -ENOENT; - struct rhash_head *head, *next, *entry; - spinlock_t *new_bucket_lock; - unsigned int new_hash; - - rht_for_each(entry, old_tbl, old_hash) { - err = 0; - next = rht_dereference_bucket(entry->next, old_tbl, old_hash); - - if (rht_is_a_nulls(next)) - break; - - pprev = &entry->next; - } - - if (err) - goto out; - - new_hash = head_hashfn(ht, new_tbl, entry); - - new_bucket_lock = rht_bucket_lock(new_tbl, new_hash); - - spin_lock_nested(new_bucket_lock, SINGLE_DEPTH_NESTING); - head = rht_dereference_bucket(new_tbl->buckets[new_hash], - new_tbl, new_hash); - - RCU_INIT_POINTER(entry->next, head); - - rcu_assign_pointer(new_tbl->buckets[new_hash], entry); - spin_unlock(new_bucket_lock); - - rcu_assign_pointer(*pprev, next); - -out: - return err; -} - -static void rhashtable_rehash_chain(struct rhashtable *ht, - unsigned int old_hash) -{ - struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); - spinlock_t *old_bucket_lock; - - old_bucket_lock = rht_bucket_lock(old_tbl, old_hash); - - spin_lock_bh(old_bucket_lock); - while (!rhashtable_rehash_one(ht, old_hash)) - ; - old_tbl->rehash++; - spin_unlock_bh(old_bucket_lock); -} - -static int rhashtable_rehash_attach(struct rhashtable *ht, - struct bucket_table *old_tbl, - struct bucket_table *new_tbl) -{ - /* Protect future_tbl using the first bucket lock. */ - spin_lock_bh(old_tbl->locks); - - /* Did somebody beat us to it? */ - if (rcu_access_pointer(old_tbl->future_tbl)) { - spin_unlock_bh(old_tbl->locks); - return -EEXIST; - } - - /* Make insertions go into the new, empty table right away. Deletions - * and lookups will be attempted in both tables until we synchronize. - */ - rcu_assign_pointer(old_tbl->future_tbl, new_tbl); - - /* Ensure the new table is visible to readers. */ - smp_wmb(); - - spin_unlock_bh(old_tbl->locks); - - return 0; -} - -static int rhashtable_rehash_table(struct rhashtable *ht) -{ - struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); - struct bucket_table *new_tbl; - struct rhashtable_walker *walker; - unsigned int old_hash; - - new_tbl = rht_dereference(old_tbl->future_tbl, ht); - if (!new_tbl) - return 0; - - for (old_hash = 0; old_hash < old_tbl->size; old_hash++) - rhashtable_rehash_chain(ht, old_hash); - - /* Publish the new table pointer. */ - rcu_assign_pointer(ht->tbl, new_tbl); - - spin_lock(&ht->lock); - list_for_each_entry(walker, &old_tbl->walkers, list) - walker->tbl = NULL; - spin_unlock(&ht->lock); - - /* Wait for readers. All new readers will see the new - * table, and thus no references to the old table will - * remain. - */ - call_rcu(&old_tbl->rcu, bucket_table_free_rcu); - - return rht_dereference(new_tbl->future_tbl, ht) ? -EAGAIN : 0; -} - -/** - * rhashtable_expand - Expand hash table while allowing concurrent lookups - * @ht: the hash table to expand - * - * A secondary bucket array is allocated and the hash entries are migrated. - * - * This function may only be called in a context where it is safe to call - * synchronize_rcu(), e.g. not within a rcu_read_lock() section. - * - * The caller must ensure that no concurrent resizing occurs by holding - * ht->mutex. - * - * It is valid to have concurrent insertions and deletions protected by per - * bucket locks or concurrent RCU protected lookups and traversals. - */ -static int rhashtable_expand(struct rhashtable *ht) -{ - struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht); - int err; - - ASSERT_RHT_MUTEX(ht); - - old_tbl = rhashtable_last_table(ht, old_tbl); - - new_tbl = bucket_table_alloc(ht, old_tbl->size * 2, GFP_KERNEL); - if (new_tbl == NULL) - return -ENOMEM; - - err = rhashtable_rehash_attach(ht, old_tbl, new_tbl); - if (err) - bucket_table_free(new_tbl); - - return err; -} - -/** - * rhashtable_shrink - Shrink hash table while allowing concurrent lookups - * @ht: the hash table to shrink - * - * This function shrinks the hash table to fit, i.e., the smallest - * size would not cause it to expand right away automatically. - * - * The caller must ensure that no concurrent resizing occurs by holding - * ht->mutex. - * - * The caller must ensure that no concurrent table mutations take place. - * It is however valid to have concurrent lookups if they are RCU protected. - * - * It is valid to have concurrent insertions and deletions protected by per - * bucket locks or concurrent RCU protected lookups and traversals. - */ -static int rhashtable_shrink(struct rhashtable *ht) -{ - struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht); - unsigned int size; - int err; - - ASSERT_RHT_MUTEX(ht); - - size = roundup_pow_of_two(atomic_read(&ht->nelems) * 3 / 2); - if (size < ht->p.min_size) - size = ht->p.min_size; - - if (old_tbl->size <= size) - return 0; - - if (rht_dereference(old_tbl->future_tbl, ht)) - return -EEXIST; - - new_tbl = bucket_table_alloc(ht, size, GFP_KERNEL); - if (new_tbl == NULL) - return -ENOMEM; - - err = rhashtable_rehash_attach(ht, old_tbl, new_tbl); - if (err) - bucket_table_free(new_tbl); - - return err; -} - -static void rht_deferred_worker(struct work_struct *work) -{ - struct rhashtable *ht; - struct bucket_table *tbl; - int err = 0; - - ht = container_of(work, struct rhashtable, run_work); - mutex_lock(&ht->mutex); - - tbl = rht_dereference(ht->tbl, ht); - tbl = rhashtable_last_table(ht, tbl); - - if (rht_grow_above_75(ht, tbl)) - rhashtable_expand(ht); - else if (ht->p.automatic_shrinking && rht_shrink_below_30(ht, tbl)) - rhashtable_shrink(ht); - - err = rhashtable_rehash_table(ht); - - mutex_unlock(&ht->mutex); - - if (err) - schedule_work(&ht->run_work); -} - -static bool rhashtable_check_elasticity(struct rhashtable *ht, - struct bucket_table *tbl, - unsigned int hash) -{ - unsigned int elasticity = ht->elasticity; - struct rhash_head *head; - - rht_for_each(head, tbl, hash) - if (!--elasticity) - return true; - - return false; -} - -int rhashtable_insert_rehash(struct rhashtable *ht, - struct bucket_table *tbl) -{ - struct bucket_table *old_tbl; - struct bucket_table *new_tbl; - unsigned int size; - int err; - - old_tbl = rht_dereference_rcu(ht->tbl, ht); - - size = tbl->size; - - err = -EBUSY; - - if (rht_grow_above_75(ht, tbl)) - size *= 2; - /* Do not schedule more than one rehash */ - else if (old_tbl != tbl) - goto fail; - - err = -ENOMEM; - - new_tbl = bucket_table_alloc(ht, size, GFP_ATOMIC); - if (new_tbl == NULL) - goto fail; - - err = rhashtable_rehash_attach(ht, tbl, new_tbl); - if (err) { - bucket_table_free(new_tbl); - if (err == -EEXIST) - err = 0; - } else - schedule_work(&ht->run_work); - - return err; - -fail: - /* Do not fail the insert if someone else did a rehash. */ - if (likely(rcu_dereference_raw(tbl->future_tbl))) - return 0; - - /* Schedule async rehash to retry allocation in process context. */ - if (err == -ENOMEM) - schedule_work(&ht->run_work); - - return err; -} - -struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht, - const void *key, - struct rhash_head *obj, - struct bucket_table *tbl) -{ - struct rhash_head *head; - unsigned int hash; - int err; - - tbl = rhashtable_last_table(ht, tbl); - hash = head_hashfn(ht, tbl, obj); - spin_lock_nested(rht_bucket_lock(tbl, hash), SINGLE_DEPTH_NESTING); - - err = -EEXIST; - if (key && rhashtable_lookup_fast(ht, key, ht->p)) - goto exit; - - err = -E2BIG; - if (unlikely(rht_grow_above_max(ht, tbl))) - goto exit; - - err = -EAGAIN; - if (rhashtable_check_elasticity(ht, tbl, hash) || - rht_grow_above_100(ht, tbl)) - goto exit; - - err = 0; - - head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash); - - RCU_INIT_POINTER(obj->next, head); - - rcu_assign_pointer(tbl->buckets[hash], obj); - - atomic_inc(&ht->nelems); - -exit: - spin_unlock(rht_bucket_lock(tbl, hash)); - - if (err == 0) - return NULL; - else if (err == -EAGAIN) - return tbl; - else - return ERR_PTR(err); -} - -/** - * rhashtable_walk_init - Initialise an iterator - * @ht: Table to walk over - * @iter: Hash table Iterator - * - * This function prepares a hash table walk. - * - * Note that if you restart a walk after rhashtable_walk_stop you - * may see the same object twice. Also, you may miss objects if - * there are removals in between rhashtable_walk_stop and the next - * call to rhashtable_walk_start. - * - * For a completely stable walk you should construct your own data - * structure outside the hash table. - * - * This function may sleep so you must not call it from interrupt - * context or with spin locks held. - * - * You must call rhashtable_walk_exit if this function returns - * successfully. - */ -int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter) -{ - iter->ht = ht; - iter->p = NULL; - iter->slot = 0; - iter->skip = 0; - - iter->walker = kmalloc(sizeof(*iter->walker), GFP_KERNEL); - if (!iter->walker) - return -ENOMEM; - - spin_lock(&ht->lock); - iter->walker->tbl = - rcu_dereference_protected(ht->tbl, lockdep_is_held(&ht->lock)); - list_add(&iter->walker->list, &iter->walker->tbl->walkers); - spin_unlock(&ht->lock); - - return 0; -} - -/** - * rhashtable_walk_exit - Free an iterator - * @iter: Hash table Iterator - * - * This function frees resources allocated by rhashtable_walk_init. - */ -void rhashtable_walk_exit(struct rhashtable_iter *iter) -{ - spin_lock(&iter->ht->lock); - if (iter->walker->tbl) - list_del(&iter->walker->list); - spin_unlock(&iter->ht->lock); - kfree(iter->walker); -} - -/** - * rhashtable_walk_start - Start a hash table walk - * @iter: Hash table iterator - * - * Start a hash table walk. Note that we take the RCU lock in all - * cases including when we return an error. So you must always call - * rhashtable_walk_stop to clean up. - * - * Returns zero if successful. - * - * Returns -EAGAIN if resize event occured. Note that the iterator - * will rewind back to the beginning and you may use it immediately - * by calling rhashtable_walk_next. - */ -int rhashtable_walk_start(struct rhashtable_iter *iter) - __acquires(RCU) -{ - struct rhashtable *ht = iter->ht; - - rcu_read_lock(); - - spin_lock(&ht->lock); - if (iter->walker->tbl) - list_del(&iter->walker->list); - spin_unlock(&ht->lock); - - if (!iter->walker->tbl) { - iter->walker->tbl = rht_dereference_rcu(ht->tbl, ht); - return -EAGAIN; - } - - return 0; -} - -/** - * rhashtable_walk_next - Return the next object and advance the iterator - * @iter: Hash table iterator - * - * Note that you must call rhashtable_walk_stop when you are finished - * with the walk. - * - * Returns the next object or NULL when the end of the table is reached. - * - * Returns -EAGAIN if resize event occured. Note that the iterator - * will rewind back to the beginning and you may continue to use it. - */ -void *rhashtable_walk_next(struct rhashtable_iter *iter) -{ - struct bucket_table *tbl = iter->walker->tbl; - struct rhashtable *ht = iter->ht; - struct rhash_head *p = iter->p; - - if (p) { - p = rht_dereference_bucket_rcu(p->next, tbl, iter->slot); - goto next; - } - - for (; iter->slot < tbl->size; iter->slot++) { - int skip = iter->skip; - - rht_for_each_rcu(p, tbl, iter->slot) { - if (!skip) - break; - skip--; - } - -next: - if (!rht_is_a_nulls(p)) { - iter->skip++; - iter->p = p; - return rht_obj(ht, p); - } - - iter->skip = 0; - } - - iter->p = NULL; - - /* Ensure we see any new tables. */ - smp_rmb(); - - iter->walker->tbl = rht_dereference_rcu(tbl->future_tbl, ht); - if (iter->walker->tbl) { - iter->slot = 0; - iter->skip = 0; - return ERR_PTR(-EAGAIN); - } - - return NULL; -} - -/** - * rhashtable_walk_stop - Finish a hash table walk - * @iter: Hash table iterator - * - * Finish a hash table walk. - */ -void rhashtable_walk_stop(struct rhashtable_iter *iter) - __releases(RCU) -{ - struct rhashtable *ht; - struct bucket_table *tbl = iter->walker->tbl; - - if (!tbl) - goto out; - - ht = iter->ht; - - spin_lock(&ht->lock); - if (tbl->rehash < tbl->size) - list_add(&iter->walker->list, &tbl->walkers); - else - iter->walker->tbl = NULL; - spin_unlock(&ht->lock); - - iter->p = NULL; - -out: - rcu_read_unlock(); -} - -static size_t rounded_hashtable_size(const struct rhashtable_params *params) -{ - return max(roundup_pow_of_two(params->nelem_hint * 4 / 3), - (unsigned long)params->min_size); -} - -static u32 rhashtable_jhash2(const void *key, u32 length, u32 seed) -{ - return jhash2(key, length, seed); -} - -/** - * rhashtable_init - initialize a new hash table - * @ht: hash table to be initialized - * @params: configuration parameters - * - * Initializes a new hash table based on the provided configuration - * parameters. A table can be configured either with a variable or - * fixed length key: - * - * Configuration Example 1: Fixed length keys - * struct test_obj { - * int key; - * void * my_member; - * struct rhash_head node; - * }; - * - * struct rhashtable_params params = { - * .head_offset = offsetof(struct test_obj, node), - * .key_offset = offsetof(struct test_obj, key), - * .key_len = sizeof(int), - * .hashfn = jhash, - * .nulls_base = (1U << RHT_BASE_SHIFT), - * }; - * - * Configuration Example 2: Variable length keys - * struct test_obj { - * [...] - * struct rhash_head node; - * }; - * - * u32 my_hash_fn(const void *data, u32 len, u32 seed) - * { - * struct test_obj *obj = data; - * - * return [... hash ...]; - * } - * - * struct rhashtable_params params = { - * .head_offset = offsetof(struct test_obj, node), - * .hashfn = jhash, - * .obj_hashfn = my_hash_fn, - * }; - */ -int rhashtable_init(struct rhashtable *ht, - const struct rhashtable_params *params) -{ - struct bucket_table *tbl; - size_t size; - - size = HASH_DEFAULT_SIZE; - - if ((!params->key_len && !params->obj_hashfn) || - (params->obj_hashfn && !params->obj_cmpfn)) - return -EINVAL; - - if (params->nulls_base && params->nulls_base < (1U << RHT_BASE_SHIFT)) - return -EINVAL; - - memset(ht, 0, sizeof(*ht)); - mutex_init(&ht->mutex); - spin_lock_init(&ht->lock); - memcpy(&ht->p, params, sizeof(*params)); - - if (params->min_size) - ht->p.min_size = roundup_pow_of_two(params->min_size); - - if (params->max_size) - ht->p.max_size = rounddown_pow_of_two(params->max_size); - - if (params->insecure_max_entries) - ht->p.insecure_max_entries = - rounddown_pow_of_two(params->insecure_max_entries); - else - ht->p.insecure_max_entries = ht->p.max_size * 2; - - ht->p.min_size = max(ht->p.min_size, HASH_MIN_SIZE); - - if (params->nelem_hint) - size = rounded_hashtable_size(&ht->p); - - /* The maximum (not average) chain length grows with the - * size of the hash table, at a rate of (log N)/(log log N). - * The value of 16 is selected so that even if the hash - * table grew to 2^32 you would not expect the maximum - * chain length to exceed it unless we are under attack - * (or extremely unlucky). - * - * As this limit is only to detect attacks, we don't need - * to set it to a lower value as you'd need the chain - * length to vastly exceed 16 to have any real effect - * on the system. - */ - if (!params->insecure_elasticity) - ht->elasticity = 16; - - if (params->locks_mul) - ht->p.locks_mul = roundup_pow_of_two(params->locks_mul); - else - ht->p.locks_mul = BUCKET_LOCKS_PER_CPU; - - ht->key_len = ht->p.key_len; - if (!params->hashfn) { - ht->p.hashfn = jhash; - - if (!(ht->key_len & (sizeof(u32) - 1))) { - ht->key_len /= sizeof(u32); - ht->p.hashfn = rhashtable_jhash2; - } - } - - tbl = bucket_table_alloc(ht, size, GFP_KERNEL); - if (tbl == NULL) - return -ENOMEM; - - atomic_set(&ht->nelems, 0); - - RCU_INIT_POINTER(ht->tbl, tbl); - - INIT_WORK(&ht->run_work, rht_deferred_worker); - - return 0; -} - -/** - * rhashtable_free_and_destroy - free elements and destroy hash table - * @ht: the hash table to destroy - * @free_fn: callback to release resources of element - * @arg: pointer passed to free_fn - * - * Stops an eventual async resize. If defined, invokes free_fn for each - * element to releasal resources. Please note that RCU protected - * readers may still be accessing the elements. Releasing of resources - * must occur in a compatible manner. Then frees the bucket array. - * - * This function will eventually sleep to wait for an async resize - * to complete. The caller is responsible that no further write operations - * occurs in parallel. - */ -void rhashtable_free_and_destroy(struct rhashtable *ht, - void (*free_fn)(void *ptr, void *arg), - void *arg) -{ - const struct bucket_table *tbl; - unsigned int i; - - cancel_work_sync(&ht->run_work); - - mutex_lock(&ht->mutex); - tbl = rht_dereference(ht->tbl, ht); - if (free_fn) { - for (i = 0; i < tbl->size; i++) { - struct rhash_head *pos, *next; - - for (pos = rht_dereference(tbl->buckets[i], ht), - next = !rht_is_a_nulls(pos) ? - rht_dereference(pos->next, ht) : NULL; - !rht_is_a_nulls(pos); - pos = next, - next = !rht_is_a_nulls(pos) ? - rht_dereference(pos->next, ht) : NULL) - free_fn(rht_obj(ht, pos), arg); - } - } - - bucket_table_free(tbl); - mutex_unlock(&ht->mutex); -} - -void rhashtable_destroy(struct rhashtable *ht) -{ - return rhashtable_free_and_destroy(ht, NULL, NULL); -} - +/* + * Resizable, Scalable, Concurrent Hash Table + * + * Copyright (c) 2015 Herbert Xu + * Copyright (c) 2014-2015 Thomas Graf + * Copyright (c) 2008-2014 Patrick McHardy + * + * Code partially derived from nft_hash + * Rewritten with rehash code from br_multicast plus single list + * pointer as suggested by Josh Triplett + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HASH_DEFAULT_SIZE 64UL +#define HASH_MIN_SIZE 4U +#define BUCKET_LOCKS_PER_CPU 128UL + +static u32 head_hashfn(struct rhashtable *ht, + const struct bucket_table *tbl, + const struct rhash_head *he) +{ + return rht_head_hashfn(ht, tbl, he, ht->p); +} + +#ifdef CONFIG_PROVE_LOCKING +#define ASSERT_RHT_MUTEX(HT) BUG_ON(!lockdep_rht_mutex_is_held(HT)) + +int lockdep_rht_mutex_is_held(struct rhashtable *ht) +{ + return (debug_locks) ? lockdep_is_held(&ht->mutex) : 1; +} + +int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash) +{ + spinlock_t *lock = rht_bucket_lock(tbl, hash); + + return (debug_locks) ? lockdep_is_held(lock) : 1; +} +#else +#define ASSERT_RHT_MUTEX(HT) +#endif + + +static int alloc_bucket_locks(struct rhashtable *ht, struct bucket_table *tbl, + gfp_t gfp) +{ + unsigned int i, size; +#if defined(CONFIG_PROVE_LOCKING) + unsigned int nr_pcpus = 2; +#else + unsigned int nr_pcpus = num_possible_cpus(); +#endif + + nr_pcpus = min_t(unsigned int, nr_pcpus, 32UL); + size = roundup_pow_of_two(nr_pcpus * ht->p.locks_mul); + + /* Never allocate more than 0.5 locks per bucket */ + size = min_t(unsigned int, size, tbl->size >> 1); + + if (sizeof(spinlock_t) != 0) { +#ifdef CONFIG_NUMA + if (size * sizeof(spinlock_t) > PAGE_SIZE && + gfp == GFP_KERNEL) + tbl->locks = vmalloc(size * sizeof(spinlock_t)); + else +#endif + tbl->locks = kmalloc_array(size, sizeof(spinlock_t), + gfp); + if (!tbl->locks) + return -ENOMEM; + for (i = 0; i < size; i++) + spin_lock_init(&tbl->locks[i]); + } + tbl->locks_mask = size - 1; + + return 0; +} + +static void bucket_table_free(const struct bucket_table *tbl) +{ + if (tbl) + kvfree(tbl->locks); + + kvfree(tbl); +} + +static void bucket_table_free_rcu(struct rcu_head *head) +{ + bucket_table_free(container_of(head, struct bucket_table, rcu)); +} + +static struct bucket_table *bucket_table_alloc(struct rhashtable *ht, + size_t nbuckets, + gfp_t gfp) +{ + struct bucket_table *tbl = NULL; + size_t size; + int i; + + size = sizeof(*tbl) + nbuckets * sizeof(tbl->buckets[0]); + if (size <= (PAGE_SIZE << PAGE_ALLOC_COSTLY_ORDER) || + gfp != GFP_KERNEL) + tbl = kzalloc(size, gfp | __GFP_NOWARN | __GFP_NORETRY); + if (tbl == NULL && gfp == GFP_KERNEL) + tbl = vzalloc(size); + if (tbl == NULL) + return NULL; + + tbl->size = nbuckets; + + if (alloc_bucket_locks(ht, tbl, gfp) < 0) { + bucket_table_free(tbl); + return NULL; + } + + INIT_LIST_HEAD(&tbl->walkers); + + get_random_bytes(&tbl->hash_rnd, sizeof(tbl->hash_rnd)); + + for (i = 0; i < nbuckets; i++) + INIT_RHT_NULLS_HEAD(tbl->buckets[i], ht, i); + + return tbl; +} + +static struct bucket_table *rhashtable_last_table(struct rhashtable *ht, + struct bucket_table *tbl) +{ + struct bucket_table *new_tbl; + + do { + new_tbl = tbl; + tbl = rht_dereference_rcu(tbl->future_tbl, ht); + } while (tbl); + + return new_tbl; +} + +static int rhashtable_rehash_one(struct rhashtable *ht, unsigned int old_hash) +{ + struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); + struct bucket_table *new_tbl = rhashtable_last_table(ht, + rht_dereference_rcu(old_tbl->future_tbl, ht)); + struct rhash_head __rcu **pprev = &old_tbl->buckets[old_hash]; + int err = -ENOENT; + struct rhash_head *head, *next, *entry; + spinlock_t *new_bucket_lock; + unsigned int new_hash; + + rht_for_each(entry, old_tbl, old_hash) { + err = 0; + next = rht_dereference_bucket(entry->next, old_tbl, old_hash); + + if (rht_is_a_nulls(next)) + break; + + pprev = &entry->next; + } + + if (err) + goto out; + + new_hash = head_hashfn(ht, new_tbl, entry); + + new_bucket_lock = rht_bucket_lock(new_tbl, new_hash); + + spin_lock_nested(new_bucket_lock, SINGLE_DEPTH_NESTING); + head = rht_dereference_bucket(new_tbl->buckets[new_hash], + new_tbl, new_hash); + + RCU_INIT_POINTER(entry->next, head); + + rcu_assign_pointer(new_tbl->buckets[new_hash], entry); + spin_unlock(new_bucket_lock); + + rcu_assign_pointer(*pprev, next); + +out: + return err; +} + +static void rhashtable_rehash_chain(struct rhashtable *ht, + unsigned int old_hash) +{ + struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); + spinlock_t *old_bucket_lock; + + old_bucket_lock = rht_bucket_lock(old_tbl, old_hash); + + spin_lock_bh(old_bucket_lock); + while (!rhashtable_rehash_one(ht, old_hash)) + ; + old_tbl->rehash++; + spin_unlock_bh(old_bucket_lock); +} + +static int rhashtable_rehash_attach(struct rhashtable *ht, + struct bucket_table *old_tbl, + struct bucket_table *new_tbl) +{ + /* Protect future_tbl using the first bucket lock. */ + spin_lock_bh(old_tbl->locks); + + /* Did somebody beat us to it? */ + if (rcu_access_pointer(old_tbl->future_tbl)) { + spin_unlock_bh(old_tbl->locks); + return -EEXIST; + } + + /* Make insertions go into the new, empty table right away. Deletions + * and lookups will be attempted in both tables until we synchronize. + */ + rcu_assign_pointer(old_tbl->future_tbl, new_tbl); + + /* Ensure the new table is visible to readers. */ + smp_wmb(); + + spin_unlock_bh(old_tbl->locks); + + return 0; +} + +static int rhashtable_rehash_table(struct rhashtable *ht) +{ + struct bucket_table *old_tbl = rht_dereference(ht->tbl, ht); + struct bucket_table *new_tbl; + struct rhashtable_walker *walker; + unsigned int old_hash; + + new_tbl = rht_dereference(old_tbl->future_tbl, ht); + if (!new_tbl) + return 0; + + for (old_hash = 0; old_hash < old_tbl->size; old_hash++) + rhashtable_rehash_chain(ht, old_hash); + + /* Publish the new table pointer. */ + rcu_assign_pointer(ht->tbl, new_tbl); + + spin_lock(&ht->lock); + list_for_each_entry(walker, &old_tbl->walkers, list) + walker->tbl = NULL; + spin_unlock(&ht->lock); + + /* Wait for readers. All new readers will see the new + * table, and thus no references to the old table will + * remain. + */ + call_rcu(&old_tbl->rcu, bucket_table_free_rcu); + + return rht_dereference(new_tbl->future_tbl, ht) ? -EAGAIN : 0; +} + +/** + * rhashtable_expand - Expand hash table while allowing concurrent lookups + * @ht: the hash table to expand + * + * A secondary bucket array is allocated and the hash entries are migrated. + * + * This function may only be called in a context where it is safe to call + * synchronize_rcu(), e.g. not within a rcu_read_lock() section. + * + * The caller must ensure that no concurrent resizing occurs by holding + * ht->mutex. + * + * It is valid to have concurrent insertions and deletions protected by per + * bucket locks or concurrent RCU protected lookups and traversals. + */ +static int rhashtable_expand(struct rhashtable *ht) +{ + struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht); + int err; + + ASSERT_RHT_MUTEX(ht); + + old_tbl = rhashtable_last_table(ht, old_tbl); + + new_tbl = bucket_table_alloc(ht, old_tbl->size * 2, GFP_KERNEL); + if (new_tbl == NULL) + return -ENOMEM; + + err = rhashtable_rehash_attach(ht, old_tbl, new_tbl); + if (err) + bucket_table_free(new_tbl); + + return err; +} + +/** + * rhashtable_shrink - Shrink hash table while allowing concurrent lookups + * @ht: the hash table to shrink + * + * This function shrinks the hash table to fit, i.e., the smallest + * size would not cause it to expand right away automatically. + * + * The caller must ensure that no concurrent resizing occurs by holding + * ht->mutex. + * + * The caller must ensure that no concurrent table mutations take place. + * It is however valid to have concurrent lookups if they are RCU protected. + * + * It is valid to have concurrent insertions and deletions protected by per + * bucket locks or concurrent RCU protected lookups and traversals. + */ +static int rhashtable_shrink(struct rhashtable *ht) +{ + struct bucket_table *new_tbl, *old_tbl = rht_dereference(ht->tbl, ht); + unsigned int size; + int err; + + ASSERT_RHT_MUTEX(ht); + + size = roundup_pow_of_two(atomic_read(&ht->nelems) * 3 / 2); + if (size < ht->p.min_size) + size = ht->p.min_size; + + if (old_tbl->size <= size) + return 0; + + if (rht_dereference(old_tbl->future_tbl, ht)) + return -EEXIST; + + new_tbl = bucket_table_alloc(ht, size, GFP_KERNEL); + if (new_tbl == NULL) + return -ENOMEM; + + err = rhashtable_rehash_attach(ht, old_tbl, new_tbl); + if (err) + bucket_table_free(new_tbl); + + return err; +} + +static void rht_deferred_worker(struct work_struct *work) +{ + struct rhashtable *ht; + struct bucket_table *tbl; + int err = 0; + + ht = container_of(work, struct rhashtable, run_work); + mutex_lock(&ht->mutex); + + tbl = rht_dereference(ht->tbl, ht); + tbl = rhashtable_last_table(ht, tbl); + + if (rht_grow_above_75(ht, tbl)) + rhashtable_expand(ht); + else if (ht->p.automatic_shrinking && rht_shrink_below_30(ht, tbl)) + rhashtable_shrink(ht); + + err = rhashtable_rehash_table(ht); + + mutex_unlock(&ht->mutex); + + if (err) + schedule_work(&ht->run_work); +} + +static bool rhashtable_check_elasticity(struct rhashtable *ht, + struct bucket_table *tbl, + unsigned int hash) +{ + unsigned int elasticity = ht->elasticity; + struct rhash_head *head; + + rht_for_each(head, tbl, hash) + if (!--elasticity) + return true; + + return false; +} + +int rhashtable_insert_rehash(struct rhashtable *ht, + struct bucket_table *tbl) +{ + struct bucket_table *old_tbl; + struct bucket_table *new_tbl; + unsigned int size; + int err; + + old_tbl = rht_dereference_rcu(ht->tbl, ht); + + size = tbl->size; + + err = -EBUSY; + + if (rht_grow_above_75(ht, tbl)) + size *= 2; + /* Do not schedule more than one rehash */ + else if (old_tbl != tbl) + goto fail; + + err = -ENOMEM; + + new_tbl = bucket_table_alloc(ht, size, GFP_ATOMIC); + if (new_tbl == NULL) + goto fail; + + err = rhashtable_rehash_attach(ht, tbl, new_tbl); + if (err) { + bucket_table_free(new_tbl); + if (err == -EEXIST) + err = 0; + } else + schedule_work(&ht->run_work); + + return err; + +fail: + /* Do not fail the insert if someone else did a rehash. */ + if (likely(rcu_dereference_raw(tbl->future_tbl))) + return 0; + + /* Schedule async rehash to retry allocation in process context. */ + if (err == -ENOMEM) + schedule_work(&ht->run_work); + + return err; +} + +struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht, + const void *key, + struct rhash_head *obj, + struct bucket_table *tbl) +{ + struct rhash_head *head; + unsigned int hash; + int err; + + tbl = rhashtable_last_table(ht, tbl); + hash = head_hashfn(ht, tbl, obj); + spin_lock_nested(rht_bucket_lock(tbl, hash), SINGLE_DEPTH_NESTING); + + err = -EEXIST; + if (key && rhashtable_lookup_fast(ht, key, ht->p)) + goto exit; + + err = -E2BIG; + if (unlikely(rht_grow_above_max(ht, tbl))) + goto exit; + + err = -EAGAIN; + if (rhashtable_check_elasticity(ht, tbl, hash) || + rht_grow_above_100(ht, tbl)) + goto exit; + + err = 0; + + head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash); + + RCU_INIT_POINTER(obj->next, head); + + rcu_assign_pointer(tbl->buckets[hash], obj); + + atomic_inc(&ht->nelems); + +exit: + spin_unlock(rht_bucket_lock(tbl, hash)); + + if (err == 0) + return NULL; + else if (err == -EAGAIN) + return tbl; + else + return ERR_PTR(err); +} + +/** + * rhashtable_walk_init - Initialise an iterator + * @ht: Table to walk over + * @iter: Hash table Iterator + * + * This function prepares a hash table walk. + * + * Note that if you restart a walk after rhashtable_walk_stop you + * may see the same object twice. Also, you may miss objects if + * there are removals in between rhashtable_walk_stop and the next + * call to rhashtable_walk_start. + * + * For a completely stable walk you should construct your own data + * structure outside the hash table. + * + * This function may sleep so you must not call it from interrupt + * context or with spin locks held. + * + * You must call rhashtable_walk_exit if this function returns + * successfully. + */ +int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter) +{ + iter->ht = ht; + iter->p = NULL; + iter->slot = 0; + iter->skip = 0; + + iter->walker = kmalloc(sizeof(*iter->walker), GFP_KERNEL); + if (!iter->walker) + return -ENOMEM; + + spin_lock(&ht->lock); + iter->walker->tbl = + rcu_dereference_protected(ht->tbl, lockdep_is_held(&ht->lock)); + list_add(&iter->walker->list, &iter->walker->tbl->walkers); + spin_unlock(&ht->lock); + + return 0; +} + +/** + * rhashtable_walk_exit - Free an iterator + * @iter: Hash table Iterator + * + * This function frees resources allocated by rhashtable_walk_init. + */ +void rhashtable_walk_exit(struct rhashtable_iter *iter) +{ + spin_lock(&iter->ht->lock); + if (iter->walker->tbl) + list_del(&iter->walker->list); + spin_unlock(&iter->ht->lock); + kfree(iter->walker); +} + +/** + * rhashtable_walk_start - Start a hash table walk + * @iter: Hash table iterator + * + * Start a hash table walk. Note that we take the RCU lock in all + * cases including when we return an error. So you must always call + * rhashtable_walk_stop to clean up. + * + * Returns zero if successful. + * + * Returns -EAGAIN if resize event occured. Note that the iterator + * will rewind back to the beginning and you may use it immediately + * by calling rhashtable_walk_next. + */ +int rhashtable_walk_start(struct rhashtable_iter *iter) + __acquires(RCU) +{ + struct rhashtable *ht = iter->ht; + + rcu_read_lock(); + + spin_lock(&ht->lock); + if (iter->walker->tbl) + list_del(&iter->walker->list); + spin_unlock(&ht->lock); + + if (!iter->walker->tbl) { + iter->walker->tbl = rht_dereference_rcu(ht->tbl, ht); + return -EAGAIN; + } + + return 0; +} + +/** + * rhashtable_walk_next - Return the next object and advance the iterator + * @iter: Hash table iterator + * + * Note that you must call rhashtable_walk_stop when you are finished + * with the walk. + * + * Returns the next object or NULL when the end of the table is reached. + * + * Returns -EAGAIN if resize event occured. Note that the iterator + * will rewind back to the beginning and you may continue to use it. + */ +void *rhashtable_walk_next(struct rhashtable_iter *iter) +{ + struct bucket_table *tbl = iter->walker->tbl; + struct rhashtable *ht = iter->ht; + struct rhash_head *p = iter->p; + + if (p) { + p = rht_dereference_bucket_rcu(p->next, tbl, iter->slot); + goto next; + } + + for (; iter->slot < tbl->size; iter->slot++) { + int skip = iter->skip; + + rht_for_each_rcu(p, tbl, iter->slot) { + if (!skip) + break; + skip--; + } + +next: + if (!rht_is_a_nulls(p)) { + iter->skip++; + iter->p = p; + return rht_obj(ht, p); + } + + iter->skip = 0; + } + + iter->p = NULL; + + /* Ensure we see any new tables. */ + smp_rmb(); + + iter->walker->tbl = rht_dereference_rcu(tbl->future_tbl, ht); + if (iter->walker->tbl) { + iter->slot = 0; + iter->skip = 0; + return ERR_PTR(-EAGAIN); + } + + return NULL; +} + +/** + * rhashtable_walk_stop - Finish a hash table walk + * @iter: Hash table iterator + * + * Finish a hash table walk. + */ +void rhashtable_walk_stop(struct rhashtable_iter *iter) + __releases(RCU) +{ + struct rhashtable *ht; + struct bucket_table *tbl = iter->walker->tbl; + + if (!tbl) + goto out; + + ht = iter->ht; + + spin_lock(&ht->lock); + if (tbl->rehash < tbl->size) + list_add(&iter->walker->list, &tbl->walkers); + else + iter->walker->tbl = NULL; + spin_unlock(&ht->lock); + + iter->p = NULL; + +out: + rcu_read_unlock(); +} + +static size_t rounded_hashtable_size(const struct rhashtable_params *params) +{ + return max(roundup_pow_of_two(params->nelem_hint * 4 / 3), + (unsigned long)params->min_size); +} + +static u32 rhashtable_jhash2(const void *key, u32 length, u32 seed) +{ + return jhash2(key, length, seed); +} + +/** + * rhashtable_init - initialize a new hash table + * @ht: hash table to be initialized + * @params: configuration parameters + * + * Initializes a new hash table based on the provided configuration + * parameters. A table can be configured either with a variable or + * fixed length key: + * + * Configuration Example 1: Fixed length keys + * struct test_obj { + * int key; + * void * my_member; + * struct rhash_head node; + * }; + * + * struct rhashtable_params params = { + * .head_offset = offsetof(struct test_obj, node), + * .key_offset = offsetof(struct test_obj, key), + * .key_len = sizeof(int), + * .hashfn = jhash, + * .nulls_base = (1U << RHT_BASE_SHIFT), + * }; + * + * Configuration Example 2: Variable length keys + * struct test_obj { + * [...] + * struct rhash_head node; + * }; + * + * u32 my_hash_fn(const void *data, u32 len, u32 seed) + * { + * struct test_obj *obj = data; + * + * return [... hash ...]; + * } + * + * struct rhashtable_params params = { + * .head_offset = offsetof(struct test_obj, node), + * .hashfn = jhash, + * .obj_hashfn = my_hash_fn, + * }; + */ +int rhashtable_init(struct rhashtable *ht, + const struct rhashtable_params *params) +{ + struct bucket_table *tbl; + size_t size; + + size = HASH_DEFAULT_SIZE; + + if ((!params->key_len && !params->obj_hashfn) || + (params->obj_hashfn && !params->obj_cmpfn)) + return -EINVAL; + + if (params->nulls_base && params->nulls_base < (1U << RHT_BASE_SHIFT)) + return -EINVAL; + + memset(ht, 0, sizeof(*ht)); + mutex_init(&ht->mutex); + spin_lock_init(&ht->lock); + memcpy(&ht->p, params, sizeof(*params)); + + if (params->min_size) + ht->p.min_size = roundup_pow_of_two(params->min_size); + + if (params->max_size) + ht->p.max_size = rounddown_pow_of_two(params->max_size); + + if (params->insecure_max_entries) + ht->p.insecure_max_entries = + rounddown_pow_of_two(params->insecure_max_entries); + else + ht->p.insecure_max_entries = ht->p.max_size * 2; + + ht->p.min_size = max(ht->p.min_size, HASH_MIN_SIZE); + + if (params->nelem_hint) + size = rounded_hashtable_size(&ht->p); + + /* The maximum (not average) chain length grows with the + * size of the hash table, at a rate of (log N)/(log log N). + * The value of 16 is selected so that even if the hash + * table grew to 2^32 you would not expect the maximum + * chain length to exceed it unless we are under attack + * (or extremely unlucky). + * + * As this limit is only to detect attacks, we don't need + * to set it to a lower value as you'd need the chain + * length to vastly exceed 16 to have any real effect + * on the system. + */ + if (!params->insecure_elasticity) + ht->elasticity = 16; + + if (params->locks_mul) + ht->p.locks_mul = roundup_pow_of_two(params->locks_mul); + else + ht->p.locks_mul = BUCKET_LOCKS_PER_CPU; + + ht->key_len = ht->p.key_len; + if (!params->hashfn) { + ht->p.hashfn = jhash; + + if (!(ht->key_len & (sizeof(u32) - 1))) { + ht->key_len /= sizeof(u32); + ht->p.hashfn = rhashtable_jhash2; + } + } + + tbl = bucket_table_alloc(ht, size, GFP_KERNEL); + if (tbl == NULL) + return -ENOMEM; + + atomic_set(&ht->nelems, 0); + + RCU_INIT_POINTER(ht->tbl, tbl); + + INIT_WORK(&ht->run_work, rht_deferred_worker); + + return 0; +} + +/** + * rhashtable_free_and_destroy - free elements and destroy hash table + * @ht: the hash table to destroy + * @free_fn: callback to release resources of element + * @arg: pointer passed to free_fn + * + * Stops an eventual async resize. If defined, invokes free_fn for each + * element to releasal resources. Please note that RCU protected + * readers may still be accessing the elements. Releasing of resources + * must occur in a compatible manner. Then frees the bucket array. + * + * This function will eventually sleep to wait for an async resize + * to complete. The caller is responsible that no further write operations + * occurs in parallel. + */ +void rhashtable_free_and_destroy(struct rhashtable *ht, + void (*free_fn)(void *ptr, void *arg), + void *arg) +{ + const struct bucket_table *tbl; + unsigned int i; + + cancel_work_sync(&ht->run_work); + + mutex_lock(&ht->mutex); + tbl = rht_dereference(ht->tbl, ht); + if (free_fn) { + for (i = 0; i < tbl->size; i++) { + struct rhash_head *pos, *next; + + for (pos = rht_dereference(tbl->buckets[i], ht), + next = !rht_is_a_nulls(pos) ? + rht_dereference(pos->next, ht) : NULL; + !rht_is_a_nulls(pos); + pos = next, + next = !rht_is_a_nulls(pos) ? + rht_dereference(pos->next, ht) : NULL) + free_fn(rht_obj(ht, pos), arg); + } + } + + bucket_table_free(tbl); + mutex_unlock(&ht->mutex); +} + +void rhashtable_destroy(struct rhashtable *ht) +{ + return rhashtable_free_and_destroy(ht, NULL, NULL); +} + diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.h b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.h index b47107ff619fd8..a6db3257bc4860 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.h +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rhashtable.h @@ -1,827 +1,827 @@ -/* - * Resizable, Scalable, Concurrent Hash Table - * - * Copyright (c) 2015 Herbert Xu - * Copyright (c) 2014-2015 Thomas Graf - * Copyright (c) 2008-2014 Patrick McHardy - * - * Code partially derived from nft_hash - * Rewritten with rehash code from br_multicast plus single list - * pointer as suggested by Josh Triplett - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _LINUX_RHASHTABLE_H -#define _LINUX_RHASHTABLE_H - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * The end of the chain is marked with a special nulls marks which has - * the following format: - * - * +-------+-----------------------------------------------------+-+ - * | Base | Hash |1| - * +-------+-----------------------------------------------------+-+ - * - * Base (4 bits) : Reserved to distinguish between multiple tables. - * Specified via &struct rhashtable_params.nulls_base. - * Hash (27 bits): Full hash (unmasked) of first element added to bucket - * 1 (1 bit) : Nulls marker (always set) - * - * The remaining bits of the next pointer remain unused for now. - */ -#define RHT_BASE_BITS 4 -#define RHT_HASH_BITS 27 -#define RHT_BASE_SHIFT RHT_HASH_BITS - -/* Base bits plus 1 bit for nulls marker */ -#define RHT_HASH_RESERVED_SPACE (RHT_BASE_BITS + 1) - -struct rhash_head { - struct rhash_head __rcu *next; -}; - -/** - * struct bucket_table - Table of hash buckets - * @size: Number of hash buckets - * @rehash: Current bucket being rehashed - * @hash_rnd: Random seed to fold into hash - * @locks_mask: Mask to apply before accessing locks[] - * @locks: Array of spinlocks protecting individual buckets - * @walkers: List of active walkers - * @rcu: RCU structure for freeing the table - * @future_tbl: Table under construction during rehashing - * @buckets: size * hash buckets - */ -struct bucket_table { - unsigned int size; - unsigned int rehash; - u32 hash_rnd; - unsigned int locks_mask; - spinlock_t *locks; - struct list_head walkers; - struct rcu_head rcu; - - struct bucket_table __rcu *future_tbl; - - struct rhash_head __rcu *buckets[] ____cacheline_aligned_in_smp; -}; - -/** - * struct rhashtable_compare_arg - Key for the function rhashtable_compare - * @ht: Hash table - * @key: Key to compare against - */ -struct rhashtable_compare_arg { - struct rhashtable *ht; - const void *key; -}; - -typedef u32 (*rht_hashfn_t)(const void *data, u32 len, u32 seed); -typedef u32 (*rht_obj_hashfn_t)(const void *data, u32 len, u32 seed); -typedef int (*rht_obj_cmpfn_t)(struct rhashtable_compare_arg *arg, - const void *obj); - -struct rhashtable; - -/** - * struct rhashtable_params - Hash table construction parameters - * @nelem_hint: Hint on number of elements, should be 75% of desired size - * @key_len: Length of key - * @key_offset: Offset of key in struct to be hashed - * @head_offset: Offset of rhash_head in struct to be hashed - * @insecure_max_entries: Maximum number of entries (may be exceeded) - * @max_size: Maximum size while expanding - * @min_size: Minimum size while shrinking - * @nulls_base: Base value to generate nulls marker - * @insecure_elasticity: Set to true to disable chain length checks - * @automatic_shrinking: Enable automatic shrinking of tables - * @locks_mul: Number of bucket locks to allocate per cpu (default: 128) - * @hashfn: Hash function (default: jhash2 if !(key_len % 4), or jhash) - * @obj_hashfn: Function to hash object - * @obj_cmpfn: Function to compare key with object - */ -struct rhashtable_params { - size_t nelem_hint; - size_t key_len; - size_t key_offset; - size_t head_offset; - unsigned int insecure_max_entries; - unsigned int max_size; - unsigned int min_size; - u32 nulls_base; - bool insecure_elasticity; - bool automatic_shrinking; - size_t locks_mul; - rht_hashfn_t hashfn; - rht_obj_hashfn_t obj_hashfn; - rht_obj_cmpfn_t obj_cmpfn; -}; - -/** - * struct rhashtable - Hash table handle - * @tbl: Bucket table - * @nelems: Number of elements in table - * @key_len: Key length for hashfn - * @elasticity: Maximum chain length before rehash - * @p: Configuration parameters - * @run_work: Deferred worker to expand/shrink asynchronously - * @mutex: Mutex to protect current/future table swapping - * @lock: Spin lock to protect walker list - */ -struct rhashtable { - struct bucket_table __rcu *tbl; - atomic_t nelems; - unsigned int key_len; - unsigned int elasticity; - struct rhashtable_params p; - struct work_struct run_work; - struct mutex mutex; - spinlock_t lock; -}; - -/** - * struct rhashtable_walker - Hash table walker - * @list: List entry on list of walkers - * @tbl: The table that we were walking over - */ -struct rhashtable_walker { - struct list_head list; - struct bucket_table *tbl; -}; - -/** - * struct rhashtable_iter - Hash table iterator, fits into netlink cb - * @ht: Table to iterate through - * @p: Current pointer - * @walker: Associated rhashtable walker - * @slot: Current slot - * @skip: Number of entries to skip in slot - */ -struct rhashtable_iter { - struct rhashtable *ht; - struct rhash_head *p; - struct rhashtable_walker *walker; - unsigned int slot; - unsigned int skip; -}; - -static inline unsigned long rht_marker(const struct rhashtable *ht, u32 hash) -{ - return NULLS_MARKER(ht->p.nulls_base + hash); -} - -#define INIT_RHT_NULLS_HEAD(ptr, ht, hash) \ - ((ptr) = (typeof(ptr)) rht_marker(ht, hash)) - -static inline bool rht_is_a_nulls(const struct rhash_head *ptr) -{ - return ((unsigned long) ptr & 1); -} - -static inline unsigned long rht_get_nulls_value(const struct rhash_head *ptr) -{ - return ((unsigned long) ptr) >> 1; -} - -static inline void *rht_obj(const struct rhashtable *ht, - const struct rhash_head *he) -{ - return (char *)he - ht->p.head_offset; -} - -static inline unsigned int rht_bucket_index(const struct bucket_table *tbl, - unsigned int hash) -{ - return (hash >> RHT_HASH_RESERVED_SPACE) & (tbl->size - 1); -} - -static inline unsigned int rht_key_hashfn( - struct rhashtable *ht, const struct bucket_table *tbl, - const void *key, const struct rhashtable_params params) -{ - unsigned int hash; - - /* params must be equal to ht->p if it isn't constant. */ - if (!__builtin_constant_p(params.key_len)) - hash = ht->p.hashfn(key, ht->key_len, tbl->hash_rnd); - else if (params.key_len) { - unsigned int key_len = params.key_len; - - if (params.hashfn) - hash = params.hashfn(key, key_len, tbl->hash_rnd); - else if (key_len & (sizeof(u32) - 1)) - hash = jhash(key, key_len, tbl->hash_rnd); - else - hash = jhash2(key, key_len / sizeof(u32), - tbl->hash_rnd); - } else { - unsigned int key_len = ht->p.key_len; - - if (params.hashfn) - hash = params.hashfn(key, key_len, tbl->hash_rnd); - else - hash = jhash(key, key_len, tbl->hash_rnd); - } - - return rht_bucket_index(tbl, hash); -} - -static inline unsigned int rht_head_hashfn( - struct rhashtable *ht, const struct bucket_table *tbl, - const struct rhash_head *he, const struct rhashtable_params params) -{ - const char *ptr = rht_obj(ht, he); - - return likely(params.obj_hashfn) ? - rht_bucket_index(tbl, params.obj_hashfn(ptr, params.key_len ?: - ht->p.key_len, - tbl->hash_rnd)) : - rht_key_hashfn(ht, tbl, ptr + params.key_offset, params); -} - -/** - * rht_grow_above_75 - returns true if nelems > 0.75 * table-size - * @ht: hash table - * @tbl: current table - */ -static inline bool rht_grow_above_75(const struct rhashtable *ht, - const struct bucket_table *tbl) -{ - /* Expand table when exceeding 75% load */ - return atomic_read(&ht->nelems) > (tbl->size / 4 * 3) && - (!ht->p.max_size || tbl->size < ht->p.max_size); -} - -/** - * rht_shrink_below_30 - returns true if nelems < 0.3 * table-size - * @ht: hash table - * @tbl: current table - */ -static inline bool rht_shrink_below_30(const struct rhashtable *ht, - const struct bucket_table *tbl) -{ - /* Shrink table beneath 30% load */ - return atomic_read(&ht->nelems) < (tbl->size * 3 / 10) && - tbl->size > ht->p.min_size; -} - -/** - * rht_grow_above_100 - returns true if nelems > table-size - * @ht: hash table - * @tbl: current table - */ -static inline bool rht_grow_above_100(const struct rhashtable *ht, - const struct bucket_table *tbl) -{ - return atomic_read(&ht->nelems) > tbl->size && - (!ht->p.max_size || tbl->size < ht->p.max_size); -} - -/** - * rht_grow_above_max - returns true if table is above maximum - * @ht: hash table - * @tbl: current table - */ -static inline bool rht_grow_above_max(const struct rhashtable *ht, - const struct bucket_table *tbl) -{ - return ht->p.insecure_max_entries && - atomic_read(&ht->nelems) >= ht->p.insecure_max_entries; -} - -/* The bucket lock is selected based on the hash and protects mutations - * on a group of hash buckets. - * - * A maximum of tbl->size/2 bucket locks is allocated. This ensures that - * a single lock always covers both buckets which may both contains - * entries which link to the same bucket of the old table during resizing. - * This allows to simplify the locking as locking the bucket in both - * tables during resize always guarantee protection. - * - * IMPORTANT: When holding the bucket lock of both the old and new table - * during expansions and shrinking, the old bucket lock must always be - * acquired first. - */ -static inline spinlock_t *rht_bucket_lock(const struct bucket_table *tbl, - unsigned int hash) -{ - return &tbl->locks[hash & tbl->locks_mask]; -} - -#ifdef CONFIG_PROVE_LOCKING -int lockdep_rht_mutex_is_held(struct rhashtable *ht); -int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash); -#else -static inline int lockdep_rht_mutex_is_held(struct rhashtable *ht) -{ - return 1; -} - -static inline int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, - u32 hash) -{ - return 1; -} -#endif /* CONFIG_PROVE_LOCKING */ - -int rhashtable_init(struct rhashtable *ht, - const struct rhashtable_params *params); - -struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht, - const void *key, - struct rhash_head *obj, - struct bucket_table *old_tbl); -int rhashtable_insert_rehash(struct rhashtable *ht, struct bucket_table *tbl); - -int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter); -void rhashtable_walk_exit(struct rhashtable_iter *iter); -int rhashtable_walk_start(struct rhashtable_iter *iter) __acquires(RCU); -void *rhashtable_walk_next(struct rhashtable_iter *iter); -void rhashtable_walk_stop(struct rhashtable_iter *iter) __releases(RCU); - -void rhashtable_free_and_destroy(struct rhashtable *ht, - void (*free_fn)(void *ptr, void *arg), - void *arg); -void rhashtable_destroy(struct rhashtable *ht); - -#define rht_dereference(p, ht) \ - rcu_dereference_protected(p, lockdep_rht_mutex_is_held(ht)) - -#define rht_dereference_rcu(p, ht) \ - rcu_dereference_check(p, lockdep_rht_mutex_is_held(ht)) - -#define rht_dereference_bucket(p, tbl, hash) \ - rcu_dereference_protected(p, lockdep_rht_bucket_is_held(tbl, hash)) - -#define rht_dereference_bucket_rcu(p, tbl, hash) \ - rcu_dereference_check(p, lockdep_rht_bucket_is_held(tbl, hash)) - -#define rht_entry(tpos, pos, member) \ - ({ tpos = container_of(pos, typeof(*tpos), member); 1; }) - -/** - * rht_for_each_continue - continue iterating over hash chain - * @pos: the &struct rhash_head to use as a loop cursor. - * @head: the previous &struct rhash_head to continue from - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - */ -#define rht_for_each_continue(pos, head, tbl, hash) \ - for (pos = rht_dereference_bucket(head, tbl, hash); \ - !rht_is_a_nulls(pos); \ - pos = rht_dereference_bucket((pos)->next, tbl, hash)) - -/** - * rht_for_each - iterate over hash chain - * @pos: the &struct rhash_head to use as a loop cursor. - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - */ -#define rht_for_each(pos, tbl, hash) \ - rht_for_each_continue(pos, (tbl)->buckets[hash], tbl, hash) - -/** - * rht_for_each_entry_continue - continue iterating over hash chain - * @tpos: the type * to use as a loop cursor. - * @pos: the &struct rhash_head to use as a loop cursor. - * @head: the previous &struct rhash_head to continue from - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - * @member: name of the &struct rhash_head within the hashable struct. - */ -#define rht_for_each_entry_continue(tpos, pos, head, tbl, hash, member) \ - for (pos = rht_dereference_bucket(head, tbl, hash); \ - (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ - pos = rht_dereference_bucket((pos)->next, tbl, hash)) - -/** - * rht_for_each_entry - iterate over hash chain of given type - * @tpos: the type * to use as a loop cursor. - * @pos: the &struct rhash_head to use as a loop cursor. - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - * @member: name of the &struct rhash_head within the hashable struct. - */ -#define rht_for_each_entry(tpos, pos, tbl, hash, member) \ - rht_for_each_entry_continue(tpos, pos, (tbl)->buckets[hash], \ - tbl, hash, member) - -/** - * rht_for_each_entry_safe - safely iterate over hash chain of given type - * @tpos: the type * to use as a loop cursor. - * @pos: the &struct rhash_head to use as a loop cursor. - * @next: the &struct rhash_head to use as next in loop cursor. - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - * @member: name of the &struct rhash_head within the hashable struct. - * - * This hash chain list-traversal primitive allows for the looped code to - * remove the loop cursor from the list. - */ -#define rht_for_each_entry_safe(tpos, pos, next, tbl, hash, member) \ - for (pos = rht_dereference_bucket((tbl)->buckets[hash], tbl, hash), \ - next = !rht_is_a_nulls(pos) ? \ - rht_dereference_bucket(pos->next, tbl, hash) : NULL; \ - (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ - pos = next, \ - next = !rht_is_a_nulls(pos) ? \ - rht_dereference_bucket(pos->next, tbl, hash) : NULL) - -/** - * rht_for_each_rcu_continue - continue iterating over rcu hash chain - * @pos: the &struct rhash_head to use as a loop cursor. - * @head: the previous &struct rhash_head to continue from - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - * - * This hash chain list-traversal primitive may safely run concurrently with - * the _rcu mutation primitives such as rhashtable_insert() as long as the - * traversal is guarded by rcu_read_lock(). - */ -#define rht_for_each_rcu_continue(pos, head, tbl, hash) \ - for (({barrier(); }), \ - pos = rht_dereference_bucket_rcu(head, tbl, hash); \ - !rht_is_a_nulls(pos); \ - pos = rcu_dereference_raw(pos->next)) - -/** - * rht_for_each_rcu - iterate over rcu hash chain - * @pos: the &struct rhash_head to use as a loop cursor. - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - * - * This hash chain list-traversal primitive may safely run concurrently with - * the _rcu mutation primitives such as rhashtable_insert() as long as the - * traversal is guarded by rcu_read_lock(). - */ -#define rht_for_each_rcu(pos, tbl, hash) \ - rht_for_each_rcu_continue(pos, (tbl)->buckets[hash], tbl, hash) - -/** - * rht_for_each_entry_rcu_continue - continue iterating over rcu hash chain - * @tpos: the type * to use as a loop cursor. - * @pos: the &struct rhash_head to use as a loop cursor. - * @head: the previous &struct rhash_head to continue from - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - * @member: name of the &struct rhash_head within the hashable struct. - * - * This hash chain list-traversal primitive may safely run concurrently with - * the _rcu mutation primitives such as rhashtable_insert() as long as the - * traversal is guarded by rcu_read_lock(). - */ -#define rht_for_each_entry_rcu_continue(tpos, pos, head, tbl, hash, member) \ - for (({barrier(); }), \ - pos = rht_dereference_bucket_rcu(head, tbl, hash); \ - (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ - pos = rht_dereference_bucket_rcu(pos->next, tbl, hash)) - -/** - * rht_for_each_entry_rcu - iterate over rcu hash chain of given type - * @tpos: the type * to use as a loop cursor. - * @pos: the &struct rhash_head to use as a loop cursor. - * @tbl: the &struct bucket_table - * @hash: the hash value / bucket index - * @member: name of the &struct rhash_head within the hashable struct. - * - * This hash chain list-traversal primitive may safely run concurrently with - * the _rcu mutation primitives such as rhashtable_insert() as long as the - * traversal is guarded by rcu_read_lock(). - */ -#define rht_for_each_entry_rcu(tpos, pos, tbl, hash, member) \ - rht_for_each_entry_rcu_continue(tpos, pos, (tbl)->buckets[hash],\ - tbl, hash, member) - -static inline int rhashtable_compare(struct rhashtable_compare_arg *arg, - const void *obj) -{ - struct rhashtable *ht = arg->ht; - const char *ptr = obj; - - return memcmp(ptr + ht->p.key_offset, arg->key, ht->p.key_len); -} - -/** - * rhashtable_lookup_fast - search hash table, inlined version - * @ht: hash table - * @key: the pointer to the key - * @params: hash table parameters - * - * Computes the hash value for the key and traverses the bucket chain looking - * for a entry with an identical key. The first matching entry is returned. - * - * Returns the first entry on which the compare function returned true. - */ -static inline void *rhashtable_lookup_fast( - struct rhashtable *ht, const void *key, - const struct rhashtable_params params) -{ - struct rhashtable_compare_arg arg = { - .ht = ht, - .key = key, - }; - const struct bucket_table *tbl; - struct rhash_head *he; - unsigned int hash; - - rcu_read_lock(); - - tbl = rht_dereference_rcu(ht->tbl, ht); -restart: - hash = rht_key_hashfn(ht, tbl, key, params); - rht_for_each_rcu(he, tbl, hash) { - if (params.obj_cmpfn ? - params.obj_cmpfn(&arg, rht_obj(ht, he)) : - rhashtable_compare(&arg, rht_obj(ht, he))) - continue; - rcu_read_unlock(); - return rht_obj(ht, he); - } - - /* Ensure we see any new tables. */ - smp_rmb(); - - tbl = rht_dereference_rcu(tbl->future_tbl, ht); - if (unlikely(tbl)) - goto restart; - rcu_read_unlock(); - - return NULL; -} - -/* Internal function, please use rhashtable_insert_fast() instead */ -static inline int __rhashtable_insert_fast( - struct rhashtable *ht, const void *key, struct rhash_head *obj, - const struct rhashtable_params params) -{ - struct rhashtable_compare_arg arg = { - .ht = ht, - .key = key, - }; - struct bucket_table *tbl, *new_tbl; - struct rhash_head *head; - spinlock_t *lock; - unsigned int elasticity; - unsigned int hash; - int err; - -restart: - rcu_read_lock(); - - tbl = rht_dereference_rcu(ht->tbl, ht); - - /* All insertions must grab the oldest table containing - * the hashed bucket that is yet to be rehashed. - */ - for (;;) { - hash = rht_head_hashfn(ht, tbl, obj, params); - lock = rht_bucket_lock(tbl, hash); - spin_lock_bh(lock); - - if (tbl->rehash <= hash) - break; - - spin_unlock_bh(lock); - tbl = rht_dereference_rcu(tbl->future_tbl, ht); - } - - new_tbl = rht_dereference_rcu(tbl->future_tbl, ht); - if (unlikely(new_tbl)) { - tbl = rhashtable_insert_slow(ht, key, obj, new_tbl); - if (!IS_ERR_OR_NULL(tbl)) - goto slow_path; - - err = PTR_ERR(tbl); - goto out; - } - - err = -E2BIG; - if (unlikely(rht_grow_above_max(ht, tbl))) - goto out; - - if (unlikely(rht_grow_above_100(ht, tbl))) { -slow_path: - spin_unlock_bh(lock); - err = rhashtable_insert_rehash(ht, tbl); - rcu_read_unlock(); - if (err) - return err; - - goto restart; - } - - err = -EEXIST; - elasticity = ht->elasticity; - rht_for_each(head, tbl, hash) { - if (key && - unlikely(!(params.obj_cmpfn ? - params.obj_cmpfn(&arg, rht_obj(ht, head)) : - rhashtable_compare(&arg, rht_obj(ht, head))))) - goto out; - if (!--elasticity) - goto slow_path; - } - - err = 0; - - head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash); - - RCU_INIT_POINTER(obj->next, head); - - rcu_assign_pointer(tbl->buckets[hash], obj); - - atomic_inc(&ht->nelems); - if (rht_grow_above_75(ht, tbl)) - schedule_work(&ht->run_work); - -out: - spin_unlock_bh(lock); - rcu_read_unlock(); - - return err; -} - -/** - * rhashtable_insert_fast - insert object into hash table - * @ht: hash table - * @obj: pointer to hash head inside object - * @params: hash table parameters - * - * Will take a per bucket spinlock to protect against mutual mutations - * on the same bucket. Multiple insertions may occur in parallel unless - * they map to the same bucket lock. - * - * It is safe to call this function from atomic context. - * - * Will trigger an automatic deferred table resizing if the size grows - * beyond the watermark indicated by grow_decision() which can be passed - * to rhashtable_init(). - */ -static inline int rhashtable_insert_fast( - struct rhashtable *ht, struct rhash_head *obj, - const struct rhashtable_params params) -{ - return __rhashtable_insert_fast(ht, NULL, obj, params); -} - -/** - * rhashtable_lookup_insert_fast - lookup and insert object into hash table - * @ht: hash table - * @obj: pointer to hash head inside object - * @params: hash table parameters - * - * Locks down the bucket chain in both the old and new table if a resize - * is in progress to ensure that writers can't remove from the old table - * and can't insert to the new table during the atomic operation of search - * and insertion. Searches for duplicates in both the old and new table if - * a resize is in progress. - * - * This lookup function may only be used for fixed key hash table (key_len - * parameter set). It will BUG() if used inappropriately. - * - * It is safe to call this function from atomic context. - * - * Will trigger an automatic deferred table resizing if the size grows - * beyond the watermark indicated by grow_decision() which can be passed - * to rhashtable_init(). - */ -static inline int rhashtable_lookup_insert_fast( - struct rhashtable *ht, struct rhash_head *obj, - const struct rhashtable_params params) -{ - const char *key = rht_obj(ht, obj); - - BUG_ON(ht->p.obj_hashfn); - - return __rhashtable_insert_fast(ht, key + ht->p.key_offset, obj, - params); -} - -/** - * rhashtable_lookup_insert_key - search and insert object to hash table - * with explicit key - * @ht: hash table - * @key: key - * @obj: pointer to hash head inside object - * @params: hash table parameters - * - * Locks down the bucket chain in both the old and new table if a resize - * is in progress to ensure that writers can't remove from the old table - * and can't insert to the new table during the atomic operation of search - * and insertion. Searches for duplicates in both the old and new table if - * a resize is in progress. - * - * Lookups may occur in parallel with hashtable mutations and resizing. - * - * Will trigger an automatic deferred table resizing if the size grows - * beyond the watermark indicated by grow_decision() which can be passed - * to rhashtable_init(). - * - * Returns zero on success. - */ -static inline int rhashtable_lookup_insert_key( - struct rhashtable *ht, const void *key, struct rhash_head *obj, - const struct rhashtable_params params) -{ - BUG_ON(!ht->p.obj_hashfn || !key); - - return __rhashtable_insert_fast(ht, key, obj, params); -} - -/* Internal function, please use rhashtable_remove_fast() instead */ -static inline int __rhashtable_remove_fast( - struct rhashtable *ht, struct bucket_table *tbl, - struct rhash_head *obj, const struct rhashtable_params params) -{ - struct rhash_head __rcu **pprev; - struct rhash_head *he; - spinlock_t * lock; - unsigned int hash; - int err = -ENOENT; - - hash = rht_head_hashfn(ht, tbl, obj, params); - lock = rht_bucket_lock(tbl, hash); - - spin_lock_bh(lock); - - pprev = &tbl->buckets[hash]; - rht_for_each(he, tbl, hash) { - if (he != obj) { - pprev = &he->next; - continue; - } - - rcu_assign_pointer(*pprev, obj->next); - err = 0; - break; - } - - spin_unlock_bh(lock); - - return err; -} - -/** - * rhashtable_remove_fast - remove object from hash table - * @ht: hash table - * @obj: pointer to hash head inside object - * @params: hash table parameters - * - * Since the hash chain is single linked, the removal operation needs to - * walk the bucket chain upon removal. The removal operation is thus - * considerable slow if the hash table is not correctly sized. - * - * Will automatically shrink the table via rhashtable_expand() if the - * shrink_decision function specified at rhashtable_init() returns true. - * - * Returns zero on success, -ENOENT if the entry could not be found. - */ -static inline int rhashtable_remove_fast( - struct rhashtable *ht, struct rhash_head *obj, - const struct rhashtable_params params) -{ - struct bucket_table *tbl; - int err; - - rcu_read_lock(); - - tbl = rht_dereference_rcu(ht->tbl, ht); - - /* Because we have already taken (and released) the bucket - * lock in old_tbl, if we find that future_tbl is not yet - * visible then that guarantees the entry to still be in - * the old tbl if it exists. - */ - while ((err = __rhashtable_remove_fast(ht, tbl, obj, params)) && - (tbl = rht_dereference_rcu(tbl->future_tbl, ht))) - ; - - if (err) - goto out; - - atomic_dec(&ht->nelems); - if (unlikely(ht->p.automatic_shrinking && - rht_shrink_below_30(ht, tbl))) - schedule_work(&ht->run_work); - -out: - rcu_read_unlock(); - - return err; -} - -#endif /* _LINUX_RHASHTABLE_H */ - +/* + * Resizable, Scalable, Concurrent Hash Table + * + * Copyright (c) 2015 Herbert Xu + * Copyright (c) 2014-2015 Thomas Graf + * Copyright (c) 2008-2014 Patrick McHardy + * + * Code partially derived from nft_hash + * Rewritten with rehash code from br_multicast plus single list + * pointer as suggested by Josh Triplett + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef _LINUX_RHASHTABLE_H +#define _LINUX_RHASHTABLE_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * The end of the chain is marked with a special nulls marks which has + * the following format: + * + * +-------+-----------------------------------------------------+-+ + * | Base | Hash |1| + * +-------+-----------------------------------------------------+-+ + * + * Base (4 bits) : Reserved to distinguish between multiple tables. + * Specified via &struct rhashtable_params.nulls_base. + * Hash (27 bits): Full hash (unmasked) of first element added to bucket + * 1 (1 bit) : Nulls marker (always set) + * + * The remaining bits of the next pointer remain unused for now. + */ +#define RHT_BASE_BITS 4 +#define RHT_HASH_BITS 27 +#define RHT_BASE_SHIFT RHT_HASH_BITS + +/* Base bits plus 1 bit for nulls marker */ +#define RHT_HASH_RESERVED_SPACE (RHT_BASE_BITS + 1) + +struct rhash_head { + struct rhash_head __rcu *next; +}; + +/** + * struct bucket_table - Table of hash buckets + * @size: Number of hash buckets + * @rehash: Current bucket being rehashed + * @hash_rnd: Random seed to fold into hash + * @locks_mask: Mask to apply before accessing locks[] + * @locks: Array of spinlocks protecting individual buckets + * @walkers: List of active walkers + * @rcu: RCU structure for freeing the table + * @future_tbl: Table under construction during rehashing + * @buckets: size * hash buckets + */ +struct bucket_table { + unsigned int size; + unsigned int rehash; + u32 hash_rnd; + unsigned int locks_mask; + spinlock_t *locks; + struct list_head walkers; + struct rcu_head rcu; + + struct bucket_table __rcu *future_tbl; + + struct rhash_head __rcu *buckets[] ____cacheline_aligned_in_smp; +}; + +/** + * struct rhashtable_compare_arg - Key for the function rhashtable_compare + * @ht: Hash table + * @key: Key to compare against + */ +struct rhashtable_compare_arg { + struct rhashtable *ht; + const void *key; +}; + +typedef u32 (*rht_hashfn_t)(const void *data, u32 len, u32 seed); +typedef u32 (*rht_obj_hashfn_t)(const void *data, u32 len, u32 seed); +typedef int (*rht_obj_cmpfn_t)(struct rhashtable_compare_arg *arg, + const void *obj); + +struct rhashtable; + +/** + * struct rhashtable_params - Hash table construction parameters + * @nelem_hint: Hint on number of elements, should be 75% of desired size + * @key_len: Length of key + * @key_offset: Offset of key in struct to be hashed + * @head_offset: Offset of rhash_head in struct to be hashed + * @insecure_max_entries: Maximum number of entries (may be exceeded) + * @max_size: Maximum size while expanding + * @min_size: Minimum size while shrinking + * @nulls_base: Base value to generate nulls marker + * @insecure_elasticity: Set to true to disable chain length checks + * @automatic_shrinking: Enable automatic shrinking of tables + * @locks_mul: Number of bucket locks to allocate per cpu (default: 128) + * @hashfn: Hash function (default: jhash2 if !(key_len % 4), or jhash) + * @obj_hashfn: Function to hash object + * @obj_cmpfn: Function to compare key with object + */ +struct rhashtable_params { + size_t nelem_hint; + size_t key_len; + size_t key_offset; + size_t head_offset; + unsigned int insecure_max_entries; + unsigned int max_size; + unsigned int min_size; + u32 nulls_base; + bool insecure_elasticity; + bool automatic_shrinking; + size_t locks_mul; + rht_hashfn_t hashfn; + rht_obj_hashfn_t obj_hashfn; + rht_obj_cmpfn_t obj_cmpfn; +}; + +/** + * struct rhashtable - Hash table handle + * @tbl: Bucket table + * @nelems: Number of elements in table + * @key_len: Key length for hashfn + * @elasticity: Maximum chain length before rehash + * @p: Configuration parameters + * @run_work: Deferred worker to expand/shrink asynchronously + * @mutex: Mutex to protect current/future table swapping + * @lock: Spin lock to protect walker list + */ +struct rhashtable { + struct bucket_table __rcu *tbl; + atomic_t nelems; + unsigned int key_len; + unsigned int elasticity; + struct rhashtable_params p; + struct work_struct run_work; + struct mutex mutex; + spinlock_t lock; +}; + +/** + * struct rhashtable_walker - Hash table walker + * @list: List entry on list of walkers + * @tbl: The table that we were walking over + */ +struct rhashtable_walker { + struct list_head list; + struct bucket_table *tbl; +}; + +/** + * struct rhashtable_iter - Hash table iterator, fits into netlink cb + * @ht: Table to iterate through + * @p: Current pointer + * @walker: Associated rhashtable walker + * @slot: Current slot + * @skip: Number of entries to skip in slot + */ +struct rhashtable_iter { + struct rhashtable *ht; + struct rhash_head *p; + struct rhashtable_walker *walker; + unsigned int slot; + unsigned int skip; +}; + +static inline unsigned long rht_marker(const struct rhashtable *ht, u32 hash) +{ + return NULLS_MARKER(ht->p.nulls_base + hash); +} + +#define INIT_RHT_NULLS_HEAD(ptr, ht, hash) \ + ((ptr) = (typeof(ptr)) rht_marker(ht, hash)) + +static inline bool rht_is_a_nulls(const struct rhash_head *ptr) +{ + return ((unsigned long) ptr & 1); +} + +static inline unsigned long rht_get_nulls_value(const struct rhash_head *ptr) +{ + return ((unsigned long) ptr) >> 1; +} + +static inline void *rht_obj(const struct rhashtable *ht, + const struct rhash_head *he) +{ + return (char *)he - ht->p.head_offset; +} + +static inline unsigned int rht_bucket_index(const struct bucket_table *tbl, + unsigned int hash) +{ + return (hash >> RHT_HASH_RESERVED_SPACE) & (tbl->size - 1); +} + +static inline unsigned int rht_key_hashfn( + struct rhashtable *ht, const struct bucket_table *tbl, + const void *key, const struct rhashtable_params params) +{ + unsigned int hash; + + /* params must be equal to ht->p if it isn't constant. */ + if (!__builtin_constant_p(params.key_len)) + hash = ht->p.hashfn(key, ht->key_len, tbl->hash_rnd); + else if (params.key_len) { + unsigned int key_len = params.key_len; + + if (params.hashfn) + hash = params.hashfn(key, key_len, tbl->hash_rnd); + else if (key_len & (sizeof(u32) - 1)) + hash = jhash(key, key_len, tbl->hash_rnd); + else + hash = jhash2(key, key_len / sizeof(u32), + tbl->hash_rnd); + } else { + unsigned int key_len = ht->p.key_len; + + if (params.hashfn) + hash = params.hashfn(key, key_len, tbl->hash_rnd); + else + hash = jhash(key, key_len, tbl->hash_rnd); + } + + return rht_bucket_index(tbl, hash); +} + +static inline unsigned int rht_head_hashfn( + struct rhashtable *ht, const struct bucket_table *tbl, + const struct rhash_head *he, const struct rhashtable_params params) +{ + const char *ptr = rht_obj(ht, he); + + return likely(params.obj_hashfn) ? + rht_bucket_index(tbl, params.obj_hashfn(ptr, params.key_len ?: + ht->p.key_len, + tbl->hash_rnd)) : + rht_key_hashfn(ht, tbl, ptr + params.key_offset, params); +} + +/** + * rht_grow_above_75 - returns true if nelems > 0.75 * table-size + * @ht: hash table + * @tbl: current table + */ +static inline bool rht_grow_above_75(const struct rhashtable *ht, + const struct bucket_table *tbl) +{ + /* Expand table when exceeding 75% load */ + return atomic_read(&ht->nelems) > (tbl->size / 4 * 3) && + (!ht->p.max_size || tbl->size < ht->p.max_size); +} + +/** + * rht_shrink_below_30 - returns true if nelems < 0.3 * table-size + * @ht: hash table + * @tbl: current table + */ +static inline bool rht_shrink_below_30(const struct rhashtable *ht, + const struct bucket_table *tbl) +{ + /* Shrink table beneath 30% load */ + return atomic_read(&ht->nelems) < (tbl->size * 3 / 10) && + tbl->size > ht->p.min_size; +} + +/** + * rht_grow_above_100 - returns true if nelems > table-size + * @ht: hash table + * @tbl: current table + */ +static inline bool rht_grow_above_100(const struct rhashtable *ht, + const struct bucket_table *tbl) +{ + return atomic_read(&ht->nelems) > tbl->size && + (!ht->p.max_size || tbl->size < ht->p.max_size); +} + +/** + * rht_grow_above_max - returns true if table is above maximum + * @ht: hash table + * @tbl: current table + */ +static inline bool rht_grow_above_max(const struct rhashtable *ht, + const struct bucket_table *tbl) +{ + return ht->p.insecure_max_entries && + atomic_read(&ht->nelems) >= ht->p.insecure_max_entries; +} + +/* The bucket lock is selected based on the hash and protects mutations + * on a group of hash buckets. + * + * A maximum of tbl->size/2 bucket locks is allocated. This ensures that + * a single lock always covers both buckets which may both contains + * entries which link to the same bucket of the old table during resizing. + * This allows to simplify the locking as locking the bucket in both + * tables during resize always guarantee protection. + * + * IMPORTANT: When holding the bucket lock of both the old and new table + * during expansions and shrinking, the old bucket lock must always be + * acquired first. + */ +static inline spinlock_t *rht_bucket_lock(const struct bucket_table *tbl, + unsigned int hash) +{ + return &tbl->locks[hash & tbl->locks_mask]; +} + +#ifdef CONFIG_PROVE_LOCKING +int lockdep_rht_mutex_is_held(struct rhashtable *ht); +int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, u32 hash); +#else +static inline int lockdep_rht_mutex_is_held(struct rhashtable *ht) +{ + return 1; +} + +static inline int lockdep_rht_bucket_is_held(const struct bucket_table *tbl, + u32 hash) +{ + return 1; +} +#endif /* CONFIG_PROVE_LOCKING */ + +int rhashtable_init(struct rhashtable *ht, + const struct rhashtable_params *params); + +struct bucket_table *rhashtable_insert_slow(struct rhashtable *ht, + const void *key, + struct rhash_head *obj, + struct bucket_table *old_tbl); +int rhashtable_insert_rehash(struct rhashtable *ht, struct bucket_table *tbl); + +int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter); +void rhashtable_walk_exit(struct rhashtable_iter *iter); +int rhashtable_walk_start(struct rhashtable_iter *iter) __acquires(RCU); +void *rhashtable_walk_next(struct rhashtable_iter *iter); +void rhashtable_walk_stop(struct rhashtable_iter *iter) __releases(RCU); + +void rhashtable_free_and_destroy(struct rhashtable *ht, + void (*free_fn)(void *ptr, void *arg), + void *arg); +void rhashtable_destroy(struct rhashtable *ht); + +#define rht_dereference(p, ht) \ + rcu_dereference_protected(p, lockdep_rht_mutex_is_held(ht)) + +#define rht_dereference_rcu(p, ht) \ + rcu_dereference_check(p, lockdep_rht_mutex_is_held(ht)) + +#define rht_dereference_bucket(p, tbl, hash) \ + rcu_dereference_protected(p, lockdep_rht_bucket_is_held(tbl, hash)) + +#define rht_dereference_bucket_rcu(p, tbl, hash) \ + rcu_dereference_check(p, lockdep_rht_bucket_is_held(tbl, hash)) + +#define rht_entry(tpos, pos, member) \ + ({ tpos = container_of(pos, typeof(*tpos), member); 1; }) + +/** + * rht_for_each_continue - continue iterating over hash chain + * @pos: the &struct rhash_head to use as a loop cursor. + * @head: the previous &struct rhash_head to continue from + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + */ +#define rht_for_each_continue(pos, head, tbl, hash) \ + for (pos = rht_dereference_bucket(head, tbl, hash); \ + !rht_is_a_nulls(pos); \ + pos = rht_dereference_bucket((pos)->next, tbl, hash)) + +/** + * rht_for_each - iterate over hash chain + * @pos: the &struct rhash_head to use as a loop cursor. + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + */ +#define rht_for_each(pos, tbl, hash) \ + rht_for_each_continue(pos, (tbl)->buckets[hash], tbl, hash) + +/** + * rht_for_each_entry_continue - continue iterating over hash chain + * @tpos: the type * to use as a loop cursor. + * @pos: the &struct rhash_head to use as a loop cursor. + * @head: the previous &struct rhash_head to continue from + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + * @member: name of the &struct rhash_head within the hashable struct. + */ +#define rht_for_each_entry_continue(tpos, pos, head, tbl, hash, member) \ + for (pos = rht_dereference_bucket(head, tbl, hash); \ + (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ + pos = rht_dereference_bucket((pos)->next, tbl, hash)) + +/** + * rht_for_each_entry - iterate over hash chain of given type + * @tpos: the type * to use as a loop cursor. + * @pos: the &struct rhash_head to use as a loop cursor. + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + * @member: name of the &struct rhash_head within the hashable struct. + */ +#define rht_for_each_entry(tpos, pos, tbl, hash, member) \ + rht_for_each_entry_continue(tpos, pos, (tbl)->buckets[hash], \ + tbl, hash, member) + +/** + * rht_for_each_entry_safe - safely iterate over hash chain of given type + * @tpos: the type * to use as a loop cursor. + * @pos: the &struct rhash_head to use as a loop cursor. + * @next: the &struct rhash_head to use as next in loop cursor. + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + * @member: name of the &struct rhash_head within the hashable struct. + * + * This hash chain list-traversal primitive allows for the looped code to + * remove the loop cursor from the list. + */ +#define rht_for_each_entry_safe(tpos, pos, next, tbl, hash, member) \ + for (pos = rht_dereference_bucket((tbl)->buckets[hash], tbl, hash), \ + next = !rht_is_a_nulls(pos) ? \ + rht_dereference_bucket(pos->next, tbl, hash) : NULL; \ + (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ + pos = next, \ + next = !rht_is_a_nulls(pos) ? \ + rht_dereference_bucket(pos->next, tbl, hash) : NULL) + +/** + * rht_for_each_rcu_continue - continue iterating over rcu hash chain + * @pos: the &struct rhash_head to use as a loop cursor. + * @head: the previous &struct rhash_head to continue from + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + * + * This hash chain list-traversal primitive may safely run concurrently with + * the _rcu mutation primitives such as rhashtable_insert() as long as the + * traversal is guarded by rcu_read_lock(). + */ +#define rht_for_each_rcu_continue(pos, head, tbl, hash) \ + for (({barrier(); }), \ + pos = rht_dereference_bucket_rcu(head, tbl, hash); \ + !rht_is_a_nulls(pos); \ + pos = rcu_dereference_raw(pos->next)) + +/** + * rht_for_each_rcu - iterate over rcu hash chain + * @pos: the &struct rhash_head to use as a loop cursor. + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + * + * This hash chain list-traversal primitive may safely run concurrently with + * the _rcu mutation primitives such as rhashtable_insert() as long as the + * traversal is guarded by rcu_read_lock(). + */ +#define rht_for_each_rcu(pos, tbl, hash) \ + rht_for_each_rcu_continue(pos, (tbl)->buckets[hash], tbl, hash) + +/** + * rht_for_each_entry_rcu_continue - continue iterating over rcu hash chain + * @tpos: the type * to use as a loop cursor. + * @pos: the &struct rhash_head to use as a loop cursor. + * @head: the previous &struct rhash_head to continue from + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + * @member: name of the &struct rhash_head within the hashable struct. + * + * This hash chain list-traversal primitive may safely run concurrently with + * the _rcu mutation primitives such as rhashtable_insert() as long as the + * traversal is guarded by rcu_read_lock(). + */ +#define rht_for_each_entry_rcu_continue(tpos, pos, head, tbl, hash, member) \ + for (({barrier(); }), \ + pos = rht_dereference_bucket_rcu(head, tbl, hash); \ + (!rht_is_a_nulls(pos)) && rht_entry(tpos, pos, member); \ + pos = rht_dereference_bucket_rcu(pos->next, tbl, hash)) + +/** + * rht_for_each_entry_rcu - iterate over rcu hash chain of given type + * @tpos: the type * to use as a loop cursor. + * @pos: the &struct rhash_head to use as a loop cursor. + * @tbl: the &struct bucket_table + * @hash: the hash value / bucket index + * @member: name of the &struct rhash_head within the hashable struct. + * + * This hash chain list-traversal primitive may safely run concurrently with + * the _rcu mutation primitives such as rhashtable_insert() as long as the + * traversal is guarded by rcu_read_lock(). + */ +#define rht_for_each_entry_rcu(tpos, pos, tbl, hash, member) \ + rht_for_each_entry_rcu_continue(tpos, pos, (tbl)->buckets[hash],\ + tbl, hash, member) + +static inline int rhashtable_compare(struct rhashtable_compare_arg *arg, + const void *obj) +{ + struct rhashtable *ht = arg->ht; + const char *ptr = obj; + + return memcmp(ptr + ht->p.key_offset, arg->key, ht->p.key_len); +} + +/** + * rhashtable_lookup_fast - search hash table, inlined version + * @ht: hash table + * @key: the pointer to the key + * @params: hash table parameters + * + * Computes the hash value for the key and traverses the bucket chain looking + * for a entry with an identical key. The first matching entry is returned. + * + * Returns the first entry on which the compare function returned true. + */ +static inline void *rhashtable_lookup_fast( + struct rhashtable *ht, const void *key, + const struct rhashtable_params params) +{ + struct rhashtable_compare_arg arg = { + .ht = ht, + .key = key, + }; + const struct bucket_table *tbl; + struct rhash_head *he; + unsigned int hash; + + rcu_read_lock(); + + tbl = rht_dereference_rcu(ht->tbl, ht); +restart: + hash = rht_key_hashfn(ht, tbl, key, params); + rht_for_each_rcu(he, tbl, hash) { + if (params.obj_cmpfn ? + params.obj_cmpfn(&arg, rht_obj(ht, he)) : + rhashtable_compare(&arg, rht_obj(ht, he))) + continue; + rcu_read_unlock(); + return rht_obj(ht, he); + } + + /* Ensure we see any new tables. */ + smp_rmb(); + + tbl = rht_dereference_rcu(tbl->future_tbl, ht); + if (unlikely(tbl)) + goto restart; + rcu_read_unlock(); + + return NULL; +} + +/* Internal function, please use rhashtable_insert_fast() instead */ +static inline int __rhashtable_insert_fast( + struct rhashtable *ht, const void *key, struct rhash_head *obj, + const struct rhashtable_params params) +{ + struct rhashtable_compare_arg arg = { + .ht = ht, + .key = key, + }; + struct bucket_table *tbl, *new_tbl; + struct rhash_head *head; + spinlock_t *lock; + unsigned int elasticity; + unsigned int hash; + int err; + +restart: + rcu_read_lock(); + + tbl = rht_dereference_rcu(ht->tbl, ht); + + /* All insertions must grab the oldest table containing + * the hashed bucket that is yet to be rehashed. + */ + for (;;) { + hash = rht_head_hashfn(ht, tbl, obj, params); + lock = rht_bucket_lock(tbl, hash); + spin_lock_bh(lock); + + if (tbl->rehash <= hash) + break; + + spin_unlock_bh(lock); + tbl = rht_dereference_rcu(tbl->future_tbl, ht); + } + + new_tbl = rht_dereference_rcu(tbl->future_tbl, ht); + if (unlikely(new_tbl)) { + tbl = rhashtable_insert_slow(ht, key, obj, new_tbl); + if (!IS_ERR_OR_NULL(tbl)) + goto slow_path; + + err = PTR_ERR(tbl); + goto out; + } + + err = -E2BIG; + if (unlikely(rht_grow_above_max(ht, tbl))) + goto out; + + if (unlikely(rht_grow_above_100(ht, tbl))) { +slow_path: + spin_unlock_bh(lock); + err = rhashtable_insert_rehash(ht, tbl); + rcu_read_unlock(); + if (err) + return err; + + goto restart; + } + + err = -EEXIST; + elasticity = ht->elasticity; + rht_for_each(head, tbl, hash) { + if (key && + unlikely(!(params.obj_cmpfn ? + params.obj_cmpfn(&arg, rht_obj(ht, head)) : + rhashtable_compare(&arg, rht_obj(ht, head))))) + goto out; + if (!--elasticity) + goto slow_path; + } + + err = 0; + + head = rht_dereference_bucket(tbl->buckets[hash], tbl, hash); + + RCU_INIT_POINTER(obj->next, head); + + rcu_assign_pointer(tbl->buckets[hash], obj); + + atomic_inc(&ht->nelems); + if (rht_grow_above_75(ht, tbl)) + schedule_work(&ht->run_work); + +out: + spin_unlock_bh(lock); + rcu_read_unlock(); + + return err; +} + +/** + * rhashtable_insert_fast - insert object into hash table + * @ht: hash table + * @obj: pointer to hash head inside object + * @params: hash table parameters + * + * Will take a per bucket spinlock to protect against mutual mutations + * on the same bucket. Multiple insertions may occur in parallel unless + * they map to the same bucket lock. + * + * It is safe to call this function from atomic context. + * + * Will trigger an automatic deferred table resizing if the size grows + * beyond the watermark indicated by grow_decision() which can be passed + * to rhashtable_init(). + */ +static inline int rhashtable_insert_fast( + struct rhashtable *ht, struct rhash_head *obj, + const struct rhashtable_params params) +{ + return __rhashtable_insert_fast(ht, NULL, obj, params); +} + +/** + * rhashtable_lookup_insert_fast - lookup and insert object into hash table + * @ht: hash table + * @obj: pointer to hash head inside object + * @params: hash table parameters + * + * Locks down the bucket chain in both the old and new table if a resize + * is in progress to ensure that writers can't remove from the old table + * and can't insert to the new table during the atomic operation of search + * and insertion. Searches for duplicates in both the old and new table if + * a resize is in progress. + * + * This lookup function may only be used for fixed key hash table (key_len + * parameter set). It will BUG() if used inappropriately. + * + * It is safe to call this function from atomic context. + * + * Will trigger an automatic deferred table resizing if the size grows + * beyond the watermark indicated by grow_decision() which can be passed + * to rhashtable_init(). + */ +static inline int rhashtable_lookup_insert_fast( + struct rhashtable *ht, struct rhash_head *obj, + const struct rhashtable_params params) +{ + const char *key = rht_obj(ht, obj); + + BUG_ON(ht->p.obj_hashfn); + + return __rhashtable_insert_fast(ht, key + ht->p.key_offset, obj, + params); +} + +/** + * rhashtable_lookup_insert_key - search and insert object to hash table + * with explicit key + * @ht: hash table + * @key: key + * @obj: pointer to hash head inside object + * @params: hash table parameters + * + * Locks down the bucket chain in both the old and new table if a resize + * is in progress to ensure that writers can't remove from the old table + * and can't insert to the new table during the atomic operation of search + * and insertion. Searches for duplicates in both the old and new table if + * a resize is in progress. + * + * Lookups may occur in parallel with hashtable mutations and resizing. + * + * Will trigger an automatic deferred table resizing if the size grows + * beyond the watermark indicated by grow_decision() which can be passed + * to rhashtable_init(). + * + * Returns zero on success. + */ +static inline int rhashtable_lookup_insert_key( + struct rhashtable *ht, const void *key, struct rhash_head *obj, + const struct rhashtable_params params) +{ + BUG_ON(!ht->p.obj_hashfn || !key); + + return __rhashtable_insert_fast(ht, key, obj, params); +} + +/* Internal function, please use rhashtable_remove_fast() instead */ +static inline int __rhashtable_remove_fast( + struct rhashtable *ht, struct bucket_table *tbl, + struct rhash_head *obj, const struct rhashtable_params params) +{ + struct rhash_head __rcu **pprev; + struct rhash_head *he; + spinlock_t * lock; + unsigned int hash; + int err = -ENOENT; + + hash = rht_head_hashfn(ht, tbl, obj, params); + lock = rht_bucket_lock(tbl, hash); + + spin_lock_bh(lock); + + pprev = &tbl->buckets[hash]; + rht_for_each(he, tbl, hash) { + if (he != obj) { + pprev = &he->next; + continue; + } + + rcu_assign_pointer(*pprev, obj->next); + err = 0; + break; + } + + spin_unlock_bh(lock); + + return err; +} + +/** + * rhashtable_remove_fast - remove object from hash table + * @ht: hash table + * @obj: pointer to hash head inside object + * @params: hash table parameters + * + * Since the hash chain is single linked, the removal operation needs to + * walk the bucket chain upon removal. The removal operation is thus + * considerable slow if the hash table is not correctly sized. + * + * Will automatically shrink the table via rhashtable_expand() if the + * shrink_decision function specified at rhashtable_init() returns true. + * + * Returns zero on success, -ENOENT if the entry could not be found. + */ +static inline int rhashtable_remove_fast( + struct rhashtable *ht, struct rhash_head *obj, + const struct rhashtable_params params) +{ + struct bucket_table *tbl; + int err; + + rcu_read_lock(); + + tbl = rht_dereference_rcu(ht->tbl, ht); + + /* Because we have already taken (and released) the bucket + * lock in old_tbl, if we find that future_tbl is not yet + * visible then that guarantees the entry to still be in + * the old tbl if it exists. + */ + while ((err = __rhashtable_remove_fast(ht, tbl, obj, params)) && + (tbl = rht_dereference_rcu(tbl->future_tbl, ht))) + ; + + if (err) + goto out; + + atomic_dec(&ht->nelems); + if (unlikely(ht->p.automatic_shrinking && + rht_shrink_below_30(ht, tbl))) + schedule_work(&ht->run_work); + +out: + rcu_read_unlock(); + + return err; +} + +#endif /* _LINUX_RHASHTABLE_H */ + diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_android.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_android.c index 52ae5a62341f62..a373af75d46820 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_android.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_android.c @@ -663,7 +663,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) ret = -ENOMEM; goto exit; } - #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) + #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) || (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(8,0)) if (!access_ok(priv_cmd.buf, priv_cmd.total_len)) { #else if (!access_ok(VERIFY_READ, priv_cmd.buf, priv_cmd.total_len)) { @@ -935,7 +935,7 @@ int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) bytes_written = rtw_android_set_aek(net, command, priv_cmd.total_len); break; #endif - + case ANDROID_WIFI_CMD_EXT_AUTH_STATUS: { rtw_set_external_auth_status(padapter, command + strlen("EXT_AUTH_STATUS "), @@ -1080,7 +1080,7 @@ void *wifi_get_country_code(char *ccode) if (!ccode) return NULL; if (wifi_control_data && wifi_control_data->get_country_code) - return wifi_control_data->get_country_code(ccode); + return wifi_control_data->get_country_code(ccode, 0); return NULL; } #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) */ diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.c deleted file mode 100644 index 1e0e169b12a2d2..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.c +++ /dev/null @@ -1,2056 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ - -#include - -#ifdef CONFIG_IOCTL_CFG80211 - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) - -/* -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -*/ - -#include - -#ifdef DBG_MEM_ALLOC -extern bool match_mstat_sniff_rules(const enum mstat_f flags, const size_t size); -struct sk_buff *dbg_rtw_cfg80211_vendor_event_alloc(struct wiphy *wiphy, struct wireless_dev *wdev, int len, int event_id, gfp_t gfp - , const enum mstat_f flags, const char *func, const int line) -{ - struct sk_buff *skb; - unsigned int truesize = 0; - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) - skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp); -#else - skb = cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp); -#endif - - if (skb) - truesize = skb->truesize; - - if (!skb || truesize < len || match_mstat_sniff_rules(flags, truesize)) - RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, len, skb, truesize); - - rtw_mstat_update( - flags - , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL - , truesize - ); - - return skb; -} - -void dbg_rtw_cfg80211_vendor_event(struct sk_buff *skb, gfp_t gfp - , const enum mstat_f flags, const char *func, const int line) -{ - unsigned int truesize = skb->truesize; - - if (match_mstat_sniff_rules(flags, truesize)) - RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); - - cfg80211_vendor_event(skb, gfp); - - rtw_mstat_update( - flags - , MSTAT_FREE - , truesize - ); -} - -struct sk_buff *dbg_rtw_cfg80211_vendor_cmd_alloc_reply_skb(struct wiphy *wiphy, int len - , const enum mstat_f flags, const char *func, const int line) -{ - struct sk_buff *skb; - unsigned int truesize = 0; - - skb = cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len); - - if (skb) - truesize = skb->truesize; - - if (!skb || truesize < len || match_mstat_sniff_rules(flags, truesize)) - RTW_INFO("DBG_MEM_ALLOC %s:%d %s(%d), skb:%p, truesize=%u\n", func, line, __FUNCTION__, len, skb, truesize); - - rtw_mstat_update( - flags - , skb ? MSTAT_ALLOC_SUCCESS : MSTAT_ALLOC_FAIL - , truesize - ); - - return skb; -} - -int dbg_rtw_cfg80211_vendor_cmd_reply(struct sk_buff *skb - , const enum mstat_f flags, const char *func, const int line) -{ - unsigned int truesize = skb->truesize; - int ret; - - if (match_mstat_sniff_rules(flags, truesize)) - RTW_INFO("DBG_MEM_ALLOC %s:%d %s, truesize=%u\n", func, line, __FUNCTION__, truesize); - - ret = cfg80211_vendor_cmd_reply(skb); - - rtw_mstat_update( - flags - , MSTAT_FREE - , truesize - ); - - return ret; -} - -#define rtw_cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp) \ - dbg_rtw_cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) - -#define rtw_cfg80211_vendor_event(skb, gfp) \ - dbg_rtw_cfg80211_vendor_event(skb, gfp, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) - -#define rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) \ - dbg_rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) - -#define rtw_cfg80211_vendor_cmd_reply(skb) \ - dbg_rtw_cfg80211_vendor_cmd_reply(skb, MSTAT_FUNC_CFG_VENDOR | MSTAT_TYPE_SKB, __FUNCTION__, __LINE__) -#else - -struct sk_buff *rtw_cfg80211_vendor_event_alloc( - struct wiphy *wiphy, struct wireless_dev *wdev, int len, int event_id, gfp_t gfp) -{ - struct sk_buff *skb; - -#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 1, 0)) - skb = cfg80211_vendor_event_alloc(wiphy, len, event_id, gfp); -#else - skb = cfg80211_vendor_event_alloc(wiphy, wdev, len, event_id, gfp); -#endif - return skb; -} - -#define rtw_cfg80211_vendor_event(skb, gfp) \ - cfg80211_vendor_event(skb, gfp) - -#define rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) \ - cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len) - -#define rtw_cfg80211_vendor_cmd_reply(skb) \ - cfg80211_vendor_cmd_reply(skb) -#endif /* DBG_MEM_ALLOC */ - -/* - * This API is to be used for asynchronous vendor events. This - * shouldn't be used in response to a vendor command from its - * do_it handler context (instead rtw_cfgvendor_send_cmd_reply should - * be used). - */ -int rtw_cfgvendor_send_async_event(struct wiphy *wiphy, - struct net_device *dev, int event_id, const void *data, int len) -{ - u16 kflags; - struct sk_buff *skb; - - kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; - - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_event_alloc(wiphy, ndev_to_wdev(dev), len, event_id, kflags); - if (!skb) { - RTW_ERR(FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev)); - return -ENOMEM; - } - - /* Push the data to the skb */ - nla_put_nohdr(skb, len, data); - - rtw_cfg80211_vendor_event(skb, kflags); - - return 0; -} - -static int rtw_cfgvendor_send_cmd_reply(struct wiphy *wiphy, - struct net_device *dev, const void *data, int len) -{ - struct sk_buff *skb; - - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, len); - if (unlikely(!skb)) { - RTW_ERR(FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(dev)); - return -ENOMEM; - } - - /* Push the data to the skb */ - nla_put_nohdr(skb, len, data); - - return rtw_cfg80211_vendor_cmd_reply(skb); -} - -/* Feature enums */ -#define WIFI_FEATURE_INFRA 0x0001 // Basic infrastructure mode -#define WIFI_FEATURE_INFRA_5G 0x0002 // Support for 5 GHz Band -#define WIFI_FEATURE_HOTSPOT 0x0004 // Support for GAS/ANQP -#define WIFI_FEATURE_P2P 0x0008 // Wifi-Direct -#define WIFI_FEATURE_SOFT_AP 0x0010 // Soft AP -#define WIFI_FEATURE_GSCAN 0x0020 // Google-Scan APIs -#define WIFI_FEATURE_NAN 0x0040 // Neighbor Awareness Networking -#define WIFI_FEATURE_D2D_RTT 0x0080 // Device-to-device RTT -#define WIFI_FEATURE_D2AP_RTT 0x0100 // Device-to-AP RTT -#define WIFI_FEATURE_BATCH_SCAN 0x0200 // Batched Scan (legacy) -#define WIFI_FEATURE_PNO 0x0400 // Preferred network offload -#define WIFI_FEATURE_ADDITIONAL_STA 0x0800 // Support for two STAs -#define WIFI_FEATURE_TDLS 0x1000 // Tunnel directed link setup -#define WIFI_FEATURE_TDLS_OFFCHANNEL 0x2000 // Support for TDLS off channel -#define WIFI_FEATURE_EPR 0x4000 // Enhanced power reporting -#define WIFI_FEATURE_AP_STA 0x8000 // Support for AP STA Concurrency -#define WIFI_FEATURE_LINK_LAYER_STATS 0x10000 // Link layer stats collection -#define WIFI_FEATURE_LOGGER 0x20000 // WiFi Logger -#define WIFI_FEATURE_HAL_EPNO 0x40000 // WiFi PNO enhanced -#define WIFI_FEATURE_RSSI_MONITOR 0x80000 // RSSI Monitor -#define WIFI_FEATURE_MKEEP_ALIVE 0x100000 // WiFi mkeep_alive -#define WIFI_FEATURE_CONFIG_NDO 0x200000 // ND offload configure -#define WIFI_FEATURE_TX_TRANSMIT_POWER 0x400000 // Capture Tx transmit power levels -#define WIFI_FEATURE_CONTROL_ROAMING 0x800000 // Enable/Disable firmware roaming -#define WIFI_FEATURE_IE_WHITELIST 0x1000000 // Support Probe IE white listing -#define WIFI_FEATURE_SCAN_RAND 0x2000000 // Support MAC & Probe Sequence Number randomization -// Add more features here - -#define MAX_FEATURE_SET_CONCURRRENT_GROUPS 3 - -#include -int rtw_dev_get_feature_set(struct net_device *dev) -{ - _adapter *adapter = (_adapter *)rtw_netdev_priv(dev); - HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter); - HAL_VERSION *hal_ver = &HalData->version_id; - - int feature_set = 0; - - feature_set |= WIFI_FEATURE_INFRA; - -#ifdef CONFIG_IEEE80211_BAND_5GHZ - if (is_supported_5g(adapter_to_regsty(adapter)->wireless_mode)) - feature_set |= WIFI_FEATURE_INFRA_5G; -#endif - - feature_set |= WIFI_FEATURE_P2P; - feature_set |= WIFI_FEATURE_SOFT_AP; - - feature_set |= WIFI_FEATURE_ADDITIONAL_STA; -#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS - feature_set |= WIFI_FEATURE_LINK_LAYER_STATS; -#endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ - -#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR - feature_set |= WIFI_FEATURE_RSSI_MONITOR; -#endif - -#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER - feature_set |= WIFI_FEATURE_LOGGER; -#endif - -#ifdef CONFIG_RTW_WIFI_HAL - feature_set |= WIFI_FEATURE_CONFIG_NDO; - feature_set |= WIFI_FEATURE_SCAN_RAND; -#endif - - return feature_set; -} - -int *rtw_dev_get_feature_set_matrix(struct net_device *dev, int *num) -{ - int feature_set_full, mem_needed; - int *ret; - - *num = 0; - mem_needed = sizeof(int) * MAX_FEATURE_SET_CONCURRRENT_GROUPS; - ret = (int *)rtw_malloc(mem_needed); - - if (!ret) { - RTW_ERR(FUNC_NDEV_FMT" failed to allocate %d bytes\n" - , FUNC_NDEV_ARG(dev), mem_needed); - return ret; - } - - feature_set_full = rtw_dev_get_feature_set(dev); - - ret[0] = (feature_set_full & WIFI_FEATURE_INFRA) | - (feature_set_full & WIFI_FEATURE_INFRA_5G) | - (feature_set_full & WIFI_FEATURE_NAN) | - (feature_set_full & WIFI_FEATURE_D2D_RTT) | - (feature_set_full & WIFI_FEATURE_D2AP_RTT) | - (feature_set_full & WIFI_FEATURE_PNO) | - (feature_set_full & WIFI_FEATURE_BATCH_SCAN) | - (feature_set_full & WIFI_FEATURE_GSCAN) | - (feature_set_full & WIFI_FEATURE_HOTSPOT) | - (feature_set_full & WIFI_FEATURE_ADDITIONAL_STA) | - (feature_set_full & WIFI_FEATURE_EPR); - - ret[1] = (feature_set_full & WIFI_FEATURE_INFRA) | - (feature_set_full & WIFI_FEATURE_INFRA_5G) | - /* Not yet verified NAN with P2P */ - /* (feature_set_full & WIFI_FEATURE_NAN) | */ - (feature_set_full & WIFI_FEATURE_P2P) | - (feature_set_full & WIFI_FEATURE_D2AP_RTT) | - (feature_set_full & WIFI_FEATURE_D2D_RTT) | - (feature_set_full & WIFI_FEATURE_EPR); - - ret[2] = (feature_set_full & WIFI_FEATURE_INFRA) | - (feature_set_full & WIFI_FEATURE_INFRA_5G) | - (feature_set_full & WIFI_FEATURE_NAN) | - (feature_set_full & WIFI_FEATURE_D2D_RTT) | - (feature_set_full & WIFI_FEATURE_D2AP_RTT) | - (feature_set_full & WIFI_FEATURE_TDLS) | - (feature_set_full & WIFI_FEATURE_TDLS_OFFCHANNEL) | - (feature_set_full & WIFI_FEATURE_EPR); - *num = MAX_FEATURE_SET_CONCURRRENT_GROUPS; - - return ret; -} - -static int rtw_cfgvendor_get_feature_set(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - int reply; - - reply = rtw_dev_get_feature_set(wdev_to_ndev(wdev)); - - err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &reply, sizeof(int)); - - if (unlikely(err)) - RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n" - , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); - - return err; -} - -static int rtw_cfgvendor_get_feature_set_matrix(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct sk_buff *skb; - int *reply; - int num, mem_needed, i; - - reply = rtw_dev_get_feature_set_matrix(wdev_to_ndev(wdev), &num); - - if (!reply) { - RTW_ERR(FUNC_NDEV_FMT" Could not get feature list matrix\n" - , FUNC_NDEV_ARG(wdev_to_ndev(wdev))); - err = -EINVAL; - return err; - } - - mem_needed = VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * num) + - ATTRIBUTE_U32_LEN; - - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); - if (unlikely(!skb)) { - RTW_ERR(FUNC_NDEV_FMT" skb alloc failed", FUNC_NDEV_ARG(wdev_to_ndev(wdev))); - err = -ENOMEM; - goto exit; - } - - nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, num); - for (i = 0; i < num; i++) - nla_put_u32(skb, ANDR_WIFI_ATTRIBUTE_FEATURE_SET, reply[i]); - - err = rtw_cfg80211_vendor_cmd_reply(skb); - - if (unlikely(err)) - RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n" - , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); -exit: - rtw_mfree((u8 *)reply, sizeof(int) * num); - return err; -} - -#if defined(GSCAN_SUPPORT) && 0 -int rtw_cfgvendor_send_hotlist_event(struct wiphy *wiphy, - struct net_device *dev, void *data, int len, rtw_vendor_event_t event) -{ - u16 kflags; - const void *ptr; - struct sk_buff *skb; - int malloc_len, total, iter_cnt_to_send, cnt; - gscan_results_cache_t *cache = (gscan_results_cache_t *)data; - - total = len / sizeof(wifi_gscan_result_t); - while (total > 0) { - malloc_len = (total * sizeof(wifi_gscan_result_t)) + VENDOR_DATA_OVERHEAD; - if (malloc_len > NLMSG_DEFAULT_SIZE) - malloc_len = NLMSG_DEFAULT_SIZE; - iter_cnt_to_send = - (malloc_len - VENDOR_DATA_OVERHEAD) / sizeof(wifi_gscan_result_t); - total = total - iter_cnt_to_send; - - kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; - - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_event_alloc(wiphy, ndev_to_wdev(dev), malloc_len, event, kflags); - if (!skb) { - WL_ERR(("skb alloc failed")); - return -ENOMEM; - } - - while (cache && iter_cnt_to_send) { - ptr = (const void *) &cache->results[cache->tot_consumed]; - - if (iter_cnt_to_send < (cache->tot_count - cache->tot_consumed)) - cnt = iter_cnt_to_send; - else - cnt = (cache->tot_count - cache->tot_consumed); - - iter_cnt_to_send -= cnt; - cache->tot_consumed += cnt; - /* Push the data to the skb */ - nla_append(skb, cnt * sizeof(wifi_gscan_result_t), ptr); - if (cache->tot_consumed == cache->tot_count) - cache = cache->next; - - } - - rtw_cfg80211_vendor_event(skb, kflags); - } - - return 0; -} - - -static int rtw_cfgvendor_gscan_get_capabilities(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - dhd_pno_gscan_capabilities_t *reply = NULL; - uint32 reply_len = 0; - - - reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), - DHD_PNO_GET_CAPABILITIES, NULL, &reply_len); - if (!reply) { - WL_ERR(("Could not get capabilities\n")); - err = -EINVAL; - return err; - } - - err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), - reply, reply_len); - - if (unlikely(err)) - WL_ERR(("Vendor Command reply failed ret:%d\n", err)); - - kfree(reply); - return err; -} - -static int rtw_cfgvendor_gscan_get_channel_list(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0, type, band; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - uint16 *reply = NULL; - uint32 reply_len = 0, num_channels, mem_needed; - struct sk_buff *skb; - - type = nla_type(data); - - if (type == GSCAN_ATTRIBUTE_BAND) - band = nla_get_u32(data); - else - return -1; - - reply = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), - DHD_PNO_GET_CHANNEL_LIST, &band, &reply_len); - - if (!reply) { - WL_ERR(("Could not get channel list\n")); - err = -EINVAL; - return err; - } - num_channels = reply_len / sizeof(uint32); - mem_needed = reply_len + VENDOR_REPLY_OVERHEAD + (ATTRIBUTE_U32_LEN * 2); - - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); - if (unlikely(!skb)) { - WL_ERR(("skb alloc failed")); - err = -ENOMEM; - goto exit; - } - - nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_CHANNELS, num_channels); - nla_put(skb, GSCAN_ATTRIBUTE_CHANNEL_LIST, reply_len, reply); - - err = rtw_cfg80211_vendor_cmd_reply(skb); - - if (unlikely(err)) - WL_ERR(("Vendor Command reply failed ret:%d\n", err)); -exit: - kfree(reply); - return err; -} - -static int rtw_cfgvendor_gscan_get_batch_results(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - gscan_results_cache_t *results, *iter; - uint32 reply_len, complete = 0, num_results_iter; - int32 mem_needed; - wifi_gscan_result_t *ptr; - uint16 num_scan_ids, num_results; - struct sk_buff *skb; - struct nlattr *scan_hdr; - - dhd_dev_wait_batch_results_complete(bcmcfg_to_prmry_ndev(cfg)); - dhd_dev_pno_lock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); - results = dhd_dev_pno_get_gscan(bcmcfg_to_prmry_ndev(cfg), - DHD_PNO_GET_BATCH_RESULTS, NULL, &reply_len); - - if (!results) { - WL_ERR(("No results to send %d\n", err)); - err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), - results, 0); - - if (unlikely(err)) - WL_ERR(("Vendor Command reply failed ret:%d\n", err)); - dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); - return err; - } - num_scan_ids = reply_len & 0xFFFF; - num_results = (reply_len & 0xFFFF0000) >> 16; - mem_needed = (num_results * sizeof(wifi_gscan_result_t)) + - (num_scan_ids * GSCAN_BATCH_RESULT_HDR_LEN) + - VENDOR_REPLY_OVERHEAD + SCAN_RESULTS_COMPLETE_FLAG_LEN; - - if (mem_needed > (int32)NLMSG_DEFAULT_SIZE) { - mem_needed = (int32)NLMSG_DEFAULT_SIZE; - complete = 0; - } else - complete = 1; - - WL_TRACE(("complete %d mem_needed %d max_mem %d\n", complete, mem_needed, - (int)NLMSG_DEFAULT_SIZE)); - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_cmd_alloc_reply_skb(wiphy, mem_needed); - if (unlikely(!skb)) { - WL_ERR(("skb alloc failed")); - dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); - return -ENOMEM; - } - iter = results; - - nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE, complete); - - mem_needed = mem_needed - (SCAN_RESULTS_COMPLETE_FLAG_LEN + VENDOR_REPLY_OVERHEAD); - - while (iter && ((mem_needed - GSCAN_BATCH_RESULT_HDR_LEN) > 0)) { - scan_hdr = nla_nest_start(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS); - nla_put_u32(skb, GSCAN_ATTRIBUTE_SCAN_ID, iter->scan_id); - nla_put_u8(skb, GSCAN_ATTRIBUTE_SCAN_FLAGS, iter->flag); - num_results_iter = - (mem_needed - GSCAN_BATCH_RESULT_HDR_LEN) / sizeof(wifi_gscan_result_t); - - if ((iter->tot_count - iter->tot_consumed) < num_results_iter) - num_results_iter = iter->tot_count - iter->tot_consumed; - - nla_put_u32(skb, GSCAN_ATTRIBUTE_NUM_OF_RESULTS, num_results_iter); - if (num_results_iter) { - ptr = &iter->results[iter->tot_consumed]; - iter->tot_consumed += num_results_iter; - nla_put(skb, GSCAN_ATTRIBUTE_SCAN_RESULTS, - num_results_iter * sizeof(wifi_gscan_result_t), ptr); - } - nla_nest_end(skb, scan_hdr); - mem_needed -= GSCAN_BATCH_RESULT_HDR_LEN + - (num_results_iter * sizeof(wifi_gscan_result_t)); - iter = iter->next; - } - - dhd_dev_gscan_batch_cache_cleanup(bcmcfg_to_prmry_ndev(cfg)); - dhd_dev_pno_unlock_access_batch_results(bcmcfg_to_prmry_ndev(cfg)); - - return rtw_cfg80211_vendor_cmd_reply(skb); -} - -static int rtw_cfgvendor_initiate_gscan(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - int type, tmp = len; - int run = 0xFF; - int flush = 0; - const struct nlattr *iter; - - nla_for_each_attr(iter, data, len, tmp) { - type = nla_type(iter); - if (type == GSCAN_ATTRIBUTE_ENABLE_FEATURE) - run = nla_get_u32(iter); - else if (type == GSCAN_ATTRIBUTE_FLUSH_FEATURE) - flush = nla_get_u32(iter); - } - - if (run != 0xFF) { - err = dhd_dev_pno_run_gscan(bcmcfg_to_prmry_ndev(cfg), run, flush); - - if (unlikely(err)) - WL_ERR(("Could not run gscan:%d\n", err)); - return err; - } else - return -1; - - -} - -static int rtw_cfgvendor_enable_full_scan_result(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - int type; - bool real_time = FALSE; - - type = nla_type(data); - - if (type == GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS) { - real_time = nla_get_u32(data); - - err = dhd_dev_pno_enable_full_scan_result(bcmcfg_to_prmry_ndev(cfg), real_time); - - if (unlikely(err)) - WL_ERR(("Could not run gscan:%d\n", err)); - - } else - err = -1; - - return err; -} - -static int rtw_cfgvendor_set_scan_cfg(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - gscan_scan_params_t *scan_param; - int j = 0; - int type, tmp, tmp1, tmp2, k = 0; - const struct nlattr *iter, *iter1, *iter2; - struct dhd_pno_gscan_channel_bucket *ch_bucket; - - scan_param = kzalloc(sizeof(gscan_scan_params_t), GFP_KERNEL); - if (!scan_param) { - WL_ERR(("Could not set GSCAN scan cfg, mem alloc failure\n")); - err = -EINVAL; - return err; - - } - - scan_param->scan_fr = PNO_SCAN_MIN_FW_SEC; - nla_for_each_attr(iter, data, len, tmp) { - type = nla_type(iter); - - if (j >= GSCAN_MAX_CH_BUCKETS) - break; - - switch (type) { - case GSCAN_ATTRIBUTE_BASE_PERIOD: - scan_param->scan_fr = nla_get_u32(iter) / 1000; - break; - case GSCAN_ATTRIBUTE_NUM_BUCKETS: - scan_param->nchannel_buckets = nla_get_u32(iter); - break; - case GSCAN_ATTRIBUTE_CH_BUCKET_1: - case GSCAN_ATTRIBUTE_CH_BUCKET_2: - case GSCAN_ATTRIBUTE_CH_BUCKET_3: - case GSCAN_ATTRIBUTE_CH_BUCKET_4: - case GSCAN_ATTRIBUTE_CH_BUCKET_5: - case GSCAN_ATTRIBUTE_CH_BUCKET_6: - case GSCAN_ATTRIBUTE_CH_BUCKET_7: - nla_for_each_nested(iter1, iter, tmp1) { - type = nla_type(iter1); - ch_bucket = - scan_param->channel_bucket; - - switch (type) { - case GSCAN_ATTRIBUTE_BUCKET_ID: - break; - case GSCAN_ATTRIBUTE_BUCKET_PERIOD: - ch_bucket[j].bucket_freq_multiple = - nla_get_u32(iter1) / 1000; - break; - case GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS: - ch_bucket[j].num_channels = - nla_get_u32(iter1); - break; - case GSCAN_ATTRIBUTE_BUCKET_CHANNELS: - nla_for_each_nested(iter2, iter1, tmp2) { - if (k >= PFN_SWC_RSSI_WINDOW_MAX) - break; - ch_bucket[j].chan_list[k] = - nla_get_u32(iter2); - k++; - } - k = 0; - break; - case GSCAN_ATTRIBUTE_BUCKETS_BAND: - ch_bucket[j].band = (uint16) - nla_get_u32(iter1); - break; - case GSCAN_ATTRIBUTE_REPORT_EVENTS: - ch_bucket[j].report_flag = (uint8) - nla_get_u32(iter1); - break; - } - } - j++; - break; - } - } - - if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), - DHD_PNO_SCAN_CFG_ID, scan_param, 0) < 0) { - WL_ERR(("Could not set GSCAN scan cfg\n")); - err = -EINVAL; - } - - kfree(scan_param); - return err; - -} - -static int rtw_cfgvendor_hotlist_cfg(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - gscan_hotlist_scan_params_t *hotlist_params; - int tmp, tmp1, tmp2, type, j = 0, dummy; - const struct nlattr *outer, *inner, *iter; - uint8 flush = 0; - struct bssid_t *pbssid; - - hotlist_params = (gscan_hotlist_scan_params_t *)kzalloc(len, GFP_KERNEL); - if (!hotlist_params) { - WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes\n", len)); - return -1; - } - - hotlist_params->lost_ap_window = GSCAN_LOST_AP_WINDOW_DEFAULT; - - nla_for_each_attr(iter, data, len, tmp2) { - type = nla_type(iter); - switch (type) { - case GSCAN_ATTRIBUTE_HOTLIST_BSSIDS: - pbssid = hotlist_params->bssid; - nla_for_each_nested(outer, iter, tmp) { - nla_for_each_nested(inner, outer, tmp1) { - type = nla_type(inner); - - switch (type) { - case GSCAN_ATTRIBUTE_BSSID: - memcpy(&(pbssid[j].macaddr), - nla_data(inner), ETHER_ADDR_LEN); - break; - case GSCAN_ATTRIBUTE_RSSI_LOW: - pbssid[j].rssi_reporting_threshold = - (int8) nla_get_u8(inner); - break; - case GSCAN_ATTRIBUTE_RSSI_HIGH: - dummy = (int8) nla_get_u8(inner); - break; - } - } - j++; - } - hotlist_params->nbssid = j; - break; - case GSCAN_ATTRIBUTE_HOTLIST_FLUSH: - flush = nla_get_u8(iter); - break; - case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE: - hotlist_params->lost_ap_window = nla_get_u32(iter); - break; - } - - } - - if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), - DHD_PNO_GEOFENCE_SCAN_CFG_ID, hotlist_params, flush) < 0) { - WL_ERR(("Could not set GSCAN HOTLIST cfg\n")); - err = -EINVAL; - goto exit; - } -exit: - kfree(hotlist_params); - return err; -} -static int rtw_cfgvendor_set_batch_scan_cfg(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0, tmp, type; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - gscan_batch_params_t batch_param; - const struct nlattr *iter; - - batch_param.mscan = batch_param.bestn = 0; - batch_param.buffer_threshold = GSCAN_BATCH_NO_THR_SET; - - nla_for_each_attr(iter, data, len, tmp) { - type = nla_type(iter); - - switch (type) { - case GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN: - batch_param.bestn = nla_get_u32(iter); - break; - case GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE: - batch_param.mscan = nla_get_u32(iter); - break; - case GSCAN_ATTRIBUTE_REPORT_THRESHOLD: - batch_param.buffer_threshold = nla_get_u32(iter); - break; - } - } - - if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), - DHD_PNO_BATCH_SCAN_CFG_ID, &batch_param, 0) < 0) { - WL_ERR(("Could not set batch cfg\n")); - err = -EINVAL; - return err; - } - - return err; -} - -static int rtw_cfgvendor_significant_change_cfg(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - gscan_swc_params_t *significant_params; - int tmp, tmp1, tmp2, type, j = 0; - const struct nlattr *outer, *inner, *iter; - uint8 flush = 0; - wl_pfn_significant_bssid_t *pbssid; - - significant_params = (gscan_swc_params_t *) kzalloc(len, GFP_KERNEL); - if (!significant_params) { - WL_ERR(("Cannot Malloc mem to parse config commands size - %d bytes\n", len)); - return -1; - } - - - nla_for_each_attr(iter, data, len, tmp2) { - type = nla_type(iter); - - switch (type) { - case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH: - flush = nla_get_u8(iter); - break; - case GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE: - significant_params->rssi_window = nla_get_u16(iter); - break; - case GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE: - significant_params->lost_ap_window = nla_get_u16(iter); - break; - case GSCAN_ATTRIBUTE_MIN_BREACHING: - significant_params->swc_threshold = nla_get_u16(iter); - break; - case GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS: - pbssid = significant_params->bssid_elem_list; - nla_for_each_nested(outer, iter, tmp) { - nla_for_each_nested(inner, outer, tmp1) { - switch (nla_type(inner)) { - case GSCAN_ATTRIBUTE_BSSID: - memcpy(&(pbssid[j].macaddr), - nla_data(inner), - ETHER_ADDR_LEN); - break; - case GSCAN_ATTRIBUTE_RSSI_HIGH: - pbssid[j].rssi_high_threshold = - (int8) nla_get_u8(inner); - break; - case GSCAN_ATTRIBUTE_RSSI_LOW: - pbssid[j].rssi_low_threshold = - (int8) nla_get_u8(inner); - break; - } - } - j++; - } - break; - } - } - significant_params->nbssid = j; - - if (dhd_dev_pno_set_cfg_gscan(bcmcfg_to_prmry_ndev(cfg), - DHD_PNO_SIGNIFICANT_SCAN_CFG_ID, significant_params, flush) < 0) { - WL_ERR(("Could not set GSCAN significant cfg\n")); - err = -EINVAL; - goto exit; - } -exit: - kfree(significant_params); - return err; -} -#endif /* GSCAN_SUPPORT */ - -#if defined(RTT_SUPPORT) && 0 -void rtw_cfgvendor_rtt_evt(void *ctx, void *rtt_data) -{ - struct wireless_dev *wdev = (struct wireless_dev *)ctx; - struct wiphy *wiphy; - struct sk_buff *skb; - uint32 tot_len = NLMSG_DEFAULT_SIZE, entry_len = 0; - gfp_t kflags; - rtt_report_t *rtt_report = NULL; - rtt_result_t *rtt_result = NULL; - struct list_head *rtt_list; - wiphy = wdev->wiphy; - - WL_DBG(("In\n")); - /* Push the data to the skb */ - if (!rtt_data) { - WL_ERR(("rtt_data is NULL\n")); - goto exit; - } - rtt_list = (struct list_head *)rtt_data; - kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_event_alloc(wiphy, wdev, tot_len, GOOGLE_RTT_COMPLETE_EVENT, kflags); - if (!skb) { - WL_ERR(("skb alloc failed")); - goto exit; - } - /* fill in the rtt results on each entry */ - list_for_each_entry(rtt_result, rtt_list, list) { - entry_len = 0; - if (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) { - entry_len = sizeof(rtt_report_t); - rtt_report = kzalloc(entry_len, kflags); - if (!rtt_report) { - WL_ERR(("rtt_report alloc failed")); - goto exit; - } - rtt_report->addr = rtt_result->peer_mac; - rtt_report->num_measurement = 1; /* ONE SHOT */ - rtt_report->status = rtt_result->err_code; - rtt_report->type = (rtt_result->TOF_type == TOF_TYPE_ONE_WAY) ? RTT_ONE_WAY : RTT_TWO_WAY; - rtt_report->peer = rtt_result->target_info->peer; - rtt_report->channel = rtt_result->target_info->channel; - rtt_report->rssi = rtt_result->avg_rssi; - /* tx_rate */ - rtt_report->tx_rate = rtt_result->tx_rate; - /* RTT */ - rtt_report->rtt = rtt_result->meanrtt; - rtt_report->rtt_sd = rtt_result->sdrtt; - /* convert to centi meter */ - if (rtt_result->distance != 0xffffffff) - rtt_report->distance = (rtt_result->distance >> 2) * 25; - else /* invalid distance */ - rtt_report->distance = -1; - - rtt_report->ts = rtt_result->ts; - nla_append(skb, entry_len, rtt_report); - kfree(rtt_report); - } - } - rtw_cfg80211_vendor_event(skb, kflags); -exit: - return; -} - -static int rtw_cfgvendor_rtt_set_config(struct wiphy *wiphy, struct wireless_dev *wdev, - const void *data, int len) -{ - int err = 0, rem, rem1, rem2, type; - rtt_config_params_t rtt_param; - rtt_target_info_t *rtt_target = NULL; - const struct nlattr *iter, *iter1, *iter2; - int8 eabuf[ETHER_ADDR_STR_LEN]; - int8 chanbuf[CHANSPEC_STR_LEN]; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - - WL_DBG(("In\n")); - err = dhd_dev_rtt_register_noti_callback(wdev->netdev, wdev, wl_cfgvendor_rtt_evt); - if (err < 0) { - WL_ERR(("failed to register rtt_noti_callback\n")); - goto exit; - } - memset(&rtt_param, 0, sizeof(rtt_param)); - nla_for_each_attr(iter, data, len, rem) { - type = nla_type(iter); - switch (type) { - case RTT_ATTRIBUTE_TARGET_CNT: - rtt_param.rtt_target_cnt = nla_get_u8(iter); - if (rtt_param.rtt_target_cnt > RTT_MAX_TARGET_CNT) { - WL_ERR(("exceed max target count : %d\n", - rtt_param.rtt_target_cnt)); - err = BCME_RANGE; - } - break; - case RTT_ATTRIBUTE_TARGET_INFO: - rtt_target = rtt_param.target_info; - nla_for_each_nested(iter1, iter, rem1) { - nla_for_each_nested(iter2, iter1, rem2) { - type = nla_type(iter2); - switch (type) { - case RTT_ATTRIBUTE_TARGET_MAC: - memcpy(&rtt_target->addr, nla_data(iter2), ETHER_ADDR_LEN); - break; - case RTT_ATTRIBUTE_TARGET_TYPE: - rtt_target->type = nla_get_u8(iter2); - break; - case RTT_ATTRIBUTE_TARGET_PEER: - rtt_target->peer = nla_get_u8(iter2); - break; - case RTT_ATTRIBUTE_TARGET_CHAN: - memcpy(&rtt_target->channel, nla_data(iter2), - sizeof(rtt_target->channel)); - break; - case RTT_ATTRIBUTE_TARGET_MODE: - rtt_target->continuous = nla_get_u8(iter2); - break; - case RTT_ATTRIBUTE_TARGET_INTERVAL: - rtt_target->interval = nla_get_u32(iter2); - break; - case RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT: - rtt_target->measure_cnt = nla_get_u32(iter2); - break; - case RTT_ATTRIBUTE_TARGET_NUM_PKT: - rtt_target->ftm_cnt = nla_get_u32(iter2); - break; - case RTT_ATTRIBUTE_TARGET_NUM_RETRY: - rtt_target->retry_cnt = nla_get_u32(iter2); - } - } - /* convert to chanspec value */ - rtt_target->chanspec = dhd_rtt_convert_to_chspec(rtt_target->channel); - if (rtt_target->chanspec == 0) { - WL_ERR(("Channel is not valid\n")); - goto exit; - } - WL_INFORM(("Target addr %s, Channel : %s for RTT\n", - bcm_ether_ntoa((const struct ether_addr *)&rtt_target->addr, eabuf), - wf_chspec_ntoa(rtt_target->chanspec, chanbuf))); - rtt_target++; - } - break; - } - } - WL_DBG(("leave :target_cnt : %d\n", rtt_param.rtt_target_cnt)); - if (dhd_dev_rtt_set_cfg(bcmcfg_to_prmry_ndev(cfg), &rtt_param) < 0) { - WL_ERR(("Could not set RTT configuration\n")); - err = -EINVAL; - } -exit: - return err; -} - -static int rtw_cfgvendor_rtt_cancel_config(struct wiphy *wiphy, struct wireless_dev *wdev, - const void *data, int len) -{ - int err = 0, rem, type, target_cnt = 0; - const struct nlattr *iter; - struct ether_addr *mac_list = NULL, *mac_addr = NULL; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - - nla_for_each_attr(iter, data, len, rem) { - type = nla_type(iter); - switch (type) { - case RTT_ATTRIBUTE_TARGET_CNT: - target_cnt = nla_get_u8(iter); - mac_list = (struct ether_addr *)kzalloc(target_cnt * ETHER_ADDR_LEN , GFP_KERNEL); - if (mac_list == NULL) { - WL_ERR(("failed to allocate mem for mac list\n")); - goto exit; - } - mac_addr = &mac_list[0]; - break; - case RTT_ATTRIBUTE_TARGET_MAC: - if (mac_addr) - memcpy(mac_addr++, nla_data(iter), ETHER_ADDR_LEN); - else { - WL_ERR(("mac_list is NULL\n")); - goto exit; - } - break; - } - if (dhd_dev_rtt_cancel_cfg(bcmcfg_to_prmry_ndev(cfg), mac_list, target_cnt) < 0) { - WL_ERR(("Could not cancel RTT configuration\n")); - err = -EINVAL; - goto exit; - } - } -exit: - if (mac_list) - kfree(mac_list); - return err; -} -static int rtw_cfgvendor_rtt_get_capability(struct wiphy *wiphy, struct wireless_dev *wdev, - const void *data, int len) -{ - int err = 0; - struct bcm_cfg80211 *cfg = wiphy_priv(wiphy); - rtt_capabilities_t capability; - - err = dhd_dev_rtt_capability(bcmcfg_to_prmry_ndev(cfg), &capability); - if (unlikely(err)) { - WL_ERR(("Vendor Command reply failed ret:%d\n", err)); - goto exit; - } - err = rtw_cfgvendor_send_cmd_reply(wiphy, bcmcfg_to_prmry_ndev(cfg), - &capability, sizeof(capability)); - - if (unlikely(err)) - WL_ERR(("Vendor Command reply failed ret:%d\n", err)); -exit: - return err; -} - -#endif /* RTT_SUPPORT */ - -#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS -enum { - LSTATS_SUBCMD_GET_INFO = ANDROID_NL80211_SUBCMD_LSTATS_RANGE_START, - LSTATS_SUBCMD_SET_INFO, - LSTATS_SUBCMD_CLEAR_INFO, -}; -static void LinkLayerStats(_adapter *padapter) -{ - struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); - struct recv_priv *precvpriv = &(padapter->recvpriv); - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); - u32 ps_time, trx_total_time; - u64 tx_bytes, rx_bytes, trx_total_bytes = 0; - u64 tmp = 0; - - RTW_DBG("%s adapter type : %u\n", __func__, padapter->adapter_type); - - tx_bytes = 0; - rx_bytes = 0; - ps_time = 0; - trx_total_time = 0; - - if ( padapter->netif_up == _TRUE ) { - - pwrpriv->on_time = rtw_get_passing_time_ms(pwrpriv->radio_on_start_time); - - if (rtw_mi_check_fwstate(padapter, _FW_LINKED)) { - if ( pwrpriv->bpower_saving == _TRUE ) { - pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); - pwrpriv->pwr_saving_start_time = rtw_get_current_time(); - } - } else { -#ifdef CONFIG_IPS - if ( pwrpriv->bpower_saving == _TRUE ) { - pwrpriv->pwr_saving_time += rtw_get_passing_time_ms(pwrpriv->pwr_saving_start_time); - pwrpriv->pwr_saving_start_time = rtw_get_current_time(); - } -#else - pwrpriv->pwr_saving_time = pwrpriv->on_time; -#endif - } - - ps_time = pwrpriv->pwr_saving_time; - - /* Deviation caused by caculation start time */ - if ( ps_time > pwrpriv->on_time ) - ps_time = pwrpriv->on_time; - - tx_bytes = pdvobjpriv->traffic_stat.last_tx_bytes; - rx_bytes = pdvobjpriv->traffic_stat.last_rx_bytes; - trx_total_bytes = tx_bytes + rx_bytes; - - trx_total_time = pwrpriv->on_time - ps_time; - - if ( trx_total_bytes == 0) { - pwrpriv->tx_time = 0; - pwrpriv->rx_time = 0; - } else { - - /* tx_time = (trx_total_time * tx_total_bytes) / trx_total_bytes; */ - /* rx_time = (trx_total_time * rx_total_bytes) / trx_total_bytes; */ - - tmp = (tx_bytes * trx_total_time); - tmp = rtw_division64(tmp, trx_total_bytes); - pwrpriv->tx_time = tmp; - - tmp = (rx_bytes * trx_total_time); - tmp = rtw_division64(tmp, trx_total_bytes); - pwrpriv->rx_time = tmp; - - } - - } - else { - pwrpriv->on_time = 0; - pwrpriv->tx_time = 0; - pwrpriv->rx_time = 0; - } - -#ifdef CONFIG_RTW_WIFI_HAL_DEBUG - RTW_INFO("- tx_bytes : %llu rx_bytes : %llu total bytes : %llu\n", tx_bytes, rx_bytes, trx_total_bytes); - RTW_INFO("- netif_up = %s, on_time : %u ms\n", padapter->netif_up ? "1":"0", pwrpriv->on_time); - RTW_INFO("- pwr_saving_time : %u (%u) ms\n", pwrpriv->pwr_saving_time, ps_time); - RTW_INFO("- trx_total_time : %u ms\n", trx_total_time); - RTW_INFO("- tx_time : %u ms\n", pwrpriv->tx_time); - RTW_INFO("- rx_time : %u ms\n", pwrpriv->rx_time); -#endif /* CONFIG_RTW_WIFI_HAL_DEBUG */ - -} - -#define DUMMY_TIME_STATICS 99 -static int rtw_cfgvendor_lstats_get_info(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); - struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter); - wifi_radio_stat_internal *radio; - wifi_iface_stat *iface; - char *output; - - output = rtw_malloc(sizeof(wifi_radio_stat_internal) + sizeof(wifi_iface_stat)); - if (output == NULL) { - RTW_DBG("Allocate lstats info buffer fail!\n"); - } - - radio = (wifi_radio_stat_internal *)output; - - radio->num_channels = 0; - radio->radio = 1; - - /* to get on_time, tx_time, rx_time */ - LinkLayerStats(padapter); - - radio->on_time = pwrpriv->on_time; - radio->tx_time = pwrpriv->tx_time; - radio->rx_time = pwrpriv->rx_time; - radio->on_time_scan = 0; - radio->on_time_nbd = 0; - radio->on_time_gscan = 0; - radio->on_time_pno_scan = 0; - radio->on_time_hs20 = 0; - #ifdef CONFIG_RTW_WIFI_HAL_DEBUG - RTW_INFO("==== %s ====\n", __func__); - RTW_INFO("radio->radio : %d\n", (radio->radio)); - RTW_INFO("pwrpriv->on_time : %u ms\n", (pwrpriv->on_time)); - RTW_INFO("pwrpriv->tx_time : %u ms\n", (pwrpriv->tx_time)); - RTW_INFO("pwrpriv->rx_time : %u ms\n", (pwrpriv->rx_time)); - RTW_INFO("radio->on_time : %u ms\n", (radio->on_time)); - RTW_INFO("radio->tx_time : %u ms\n", (radio->tx_time)); - RTW_INFO("radio->rx_time : %u ms\n", (radio->rx_time)); - #endif /* CONFIG_RTW_WIFI_HAL_DEBUG */ - - RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); - err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), - output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal)); - if (unlikely(err)) - RTW_ERR(FUNC_NDEV_FMT"Vendor Command reply failed ret:%d \n" - , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); - rtw_mfree(output, sizeof(wifi_iface_stat) + sizeof(wifi_radio_stat_internal)); - return err; -} -static int rtw_cfgvendor_lstats_set_info(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - RTW_INFO("%s\n", __func__); - return err; -} -static int rtw_cfgvendor_lstats_clear_info(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - RTW_INFO("%s\n", __func__); - return err; -} -#endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ -#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR -static int rtw_cfgvendor_set_rssi_monitor(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); - struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); - - struct recv_priv *precvpriv = &padapter->recvpriv; - int err = 0, rem, type; - const struct nlattr *iter; - - RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); - - nla_for_each_attr(iter, data, len, rem) { - type = nla_type(iter); - - switch (type) { - case RSSI_MONITOR_ATTRIBUTE_MAX_RSSI: - pwdev_priv->rssi_monitor_max = (s8)nla_get_u32(iter);; - break; - case RSSI_MONITOR_ATTRIBUTE_MIN_RSSI: - pwdev_priv->rssi_monitor_min = (s8)nla_get_u32(iter); - break; - case RSSI_MONITOR_ATTRIBUTE_START: - pwdev_priv->rssi_monitor_enable = (u8)nla_get_u32(iter); - break; - } - } - - return err; -} - -void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter) { - struct wireless_dev *wdev = padapter->rtw_wdev; - struct wiphy *wiphy= wdev->wiphy; - struct recv_priv *precvpriv = &padapter->recvpriv; - struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); - struct wlan_network *pcur_network = &pmlmepriv->cur_network; - struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(padapter); - struct sk_buff *skb; - u32 tot_len = NLMSG_DEFAULT_SIZE; - gfp_t kflags; - rssi_monitor_evt data ; - s8 rssi = precvpriv->rssi; - - if (pwdev_priv->rssi_monitor_enable == 0 || check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) - return; - - if (rssi < pwdev_priv->rssi_monitor_max || rssi > pwdev_priv->rssi_monitor_min) - return; - - kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; - - /* Alloc the SKB for vendor_event */ - skb = rtw_cfg80211_vendor_event_alloc(wiphy, wdev, tot_len, GOOGLE_RSSI_MONITOR_EVENT, kflags); - if (!skb) { - goto exit; - } - - _rtw_memset(&data, 0, sizeof(data)); - - data.version = RSSI_MONITOR_EVT_VERSION; - data.cur_rssi = rssi; - _rtw_memcpy(data.BSSID, pcur_network->network.MacAddress, sizeof(mac_addr)); - - nla_append(skb, sizeof(data), &data); - - rtw_cfg80211_vendor_event(skb, kflags); -exit: - return; -} -#endif /* CONFIG_RTW_CFGVEDNOR_RSSIMONITR */ - -#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER -static int rtw_cfgvendor_logger_start_logging(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int ret = 0, rem, type; - char ring_name[32] = {0}; - int log_level = 0, flags = 0, time_intval = 0, threshold = 0; - const struct nlattr *iter; - - nla_for_each_attr(iter, data, len, rem) { - type = nla_type(iter); - switch (type) { - case LOGGER_ATTRIBUTE_RING_NAME: - strncpy(ring_name, nla_data(iter), - MIN(sizeof(ring_name) -1, nla_len(iter))); - break; - case LOGGER_ATTRIBUTE_LOG_LEVEL: - log_level = nla_get_u32(iter); - break; - case LOGGER_ATTRIBUTE_RING_FLAGS: - flags = nla_get_u32(iter); - break; - case LOGGER_ATTRIBUTE_LOG_TIME_INTVAL: - time_intval = nla_get_u32(iter); - break; - case LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE: - threshold = nla_get_u32(iter); - break; - default: - RTW_ERR("Unknown type: %d\n", type); - ret = WIFI_ERROR_INVALID_ARGS; - goto exit; - } - } - -exit: - return ret; -} -static int rtw_cfgvendor_logger_get_feature(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - u32 supported_features = 0; - - err = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), &supported_features, sizeof(supported_features)); - - if (unlikely(err)) - RTW_ERR(FUNC_NDEV_FMT" Vendor Command reply failed ret:%d\n" - , FUNC_NDEV_ARG(wdev_to_ndev(wdev)), err); - - return err; -} -static int rtw_cfgvendor_logger_get_version(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); - HAL_DATA_TYPE *hal = GET_HAL_DATA(padapter); - int ret = 0, rem, type; - int buf_len = 1024; - char *buf_ptr; - const struct nlattr *iter; - gfp_t kflags; - - kflags = in_atomic() ? GFP_ATOMIC : GFP_KERNEL; - buf_ptr = kzalloc(buf_len, kflags); - if (!buf_ptr) { - RTW_ERR("failed to allocate the buffer for version n"); - ret = -ENOMEM; - goto exit; - } - nla_for_each_attr(iter, data, len, rem) { - type = nla_type(iter); - switch (type) { - case LOGGER_ATTRIBUTE_GET_DRIVER: - memcpy(buf_ptr, DRIVERVERSION, strlen(DRIVERVERSION)+1); - break; - case LOGGER_ATTRIBUTE_GET_FW: - sprintf(buf_ptr, "v%d.%d", hal->firmware_version, hal->firmware_sub_version); - break; - default: - RTW_ERR("Unknown type: %d\n", type); - ret = -EINVAL; - goto exit; - } - } - if (ret < 0) { - RTW_ERR("failed to get the version %d\n", ret); - goto exit; - } - - - ret = rtw_cfgvendor_send_cmd_reply(wiphy, wdev_to_ndev(wdev), buf_ptr, strlen(buf_ptr)); -exit: - kfree(buf_ptr); - return ret; -} - -static int rtw_cfgvendor_logger_get_ring_status(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int ret = 0; - int ring_id; - char ring_buf_name[] = "RTW_RING_BUFFER"; - - struct sk_buff *skb; - wifi_ring_buffer_status ring_status; - - - _rtw_memcpy(ring_status.name, ring_buf_name, strlen(ring_buf_name)+1); - ring_status.ring_id = 1; - /* Alloc the SKB for vendor_event */ - skb = cfg80211_vendor_cmd_alloc_reply_skb(wiphy, - sizeof(wifi_ring_buffer_status)); - if (!skb) { - RTW_ERR("skb allocation is failed\n"); - ret = FAIL; - goto exit; - } - - nla_put_u32(skb, LOGGER_ATTRIBUTE_RING_NUM, 1); - nla_put(skb, LOGGER_ATTRIBUTE_RING_STATUS, sizeof(wifi_ring_buffer_status), - &ring_status); - ret = cfg80211_vendor_cmd_reply(skb); - - if (ret) { - RTW_ERR("Vendor Command reply failed ret:%d \n", ret); - } -exit: - return ret; -} - -static int rtw_cfgvendor_logger_get_ring_data(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int ret = 0, rem, type; - char ring_name[32] = {0}; - const struct nlattr *iter; - - nla_for_each_attr(iter, data, len, rem) { - type = nla_type(iter); - switch (type) { - case LOGGER_ATTRIBUTE_RING_NAME: - strncpy(ring_name, nla_data(iter), - MIN(sizeof(ring_name) -1, nla_len(iter))); - RTW_INFO(" %s LOGGER_ATTRIBUTE_RING_NAME : %s\n", __func__, ring_name); - break; - default: - RTW_ERR("Unknown type: %d\n", type); - return ret; - } - } - - - return ret; -} - -static int rtw_cfgvendor_logger_get_firmware_memory_dump(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int ret = WIFI_ERROR_NOT_SUPPORTED; - - return ret; -} - -static int rtw_cfgvendor_logger_start_pkt_fate_monitoring(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int ret = WIFI_SUCCESS; - - return ret; -} - -static int rtw_cfgvendor_logger_get_tx_pkt_fates(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int ret = WIFI_SUCCESS; - - return ret; -} - -static int rtw_cfgvendor_logger_get_rx_pkt_fates(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int ret = WIFI_SUCCESS; - - return ret; -} - -#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */ -#ifdef CONFIG_RTW_WIFI_HAL -#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI - -#ifndef ETHER_ISMULTI -#define ETHER_ISMULTI(ea) (((const u8 *)(ea))[0] & 1) -#endif - - -static u8 null_addr[ETH_ALEN] = {0}; -static void rtw_hal_random_gen_mac_addr(u8 *mac_addr) -{ - do { - get_random_bytes(&mac_addr[3], ETH_ALEN-3); - if (memcmp(mac_addr, null_addr, ETH_ALEN) != 0) - break; - } while(1); -} - -void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter) -{ - u8 mac_addr[ETH_ALEN]; - struct rtw_wdev_priv *pwdev_priv = adapter_wdev_data(adapter); - - memcpy(mac_addr, pwdev_priv->pno_mac_addr, ETH_ALEN); - if (mac_addr[0] == 0xFF) return; - rtw_hal_random_gen_mac_addr(mac_addr); - memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN); -#ifdef CONFIG_RTW_DEBUG - print_hex_dump(KERN_DEBUG, "pno_mac_addr: ", - DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr, - ETH_ALEN, 1); -#endif -} - -void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr) -{ - rtw_ps_deny(adapter, PS_DENY_IOCTL); - LeaveAllPowerSaveModeDirect(adapter); - - rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, mac_addr); -#ifdef CONFIG_RTW_DEBUG - rtw_hal_dump_macaddr(RTW_DBGDUMP, adapter); -#endif - rtw_ps_deny_cancel(adapter, PS_DENY_IOCTL); -} - -static int rtw_cfgvendor_set_rand_mac_oui(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - PADAPTER adapter; - void *devaddr; - struct net_device *netdev; - int type, mac_len; - u8 pno_random_mac_oui[3]; - u8 mac_addr[ETH_ALEN] = {0}; - struct pwrctrl_priv *pwrctl; - struct rtw_wdev_priv *pwdev_priv; - - type = nla_type(data); - mac_len = nla_len(data); - if (mac_len != 3) { - RTW_ERR("%s oui len error %d != 3\n", __func__, mac_len); - return -1; - } - - if (type == ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI) { - memcpy(pno_random_mac_oui, nla_data(data), 3); - print_hex_dump(KERN_DEBUG, "pno_random_mac_oui: ", - DUMP_PREFIX_OFFSET, 16, 1, pno_random_mac_oui, - 3, 1); - - if (ETHER_ISMULTI(pno_random_mac_oui)) { - pr_err("%s: oui is multicast address\n", __func__); - return -1; - } - - adapter = wiphy_to_adapter(wiphy); - if (adapter == NULL) { - pr_err("%s: wiphy_to_adapter == NULL\n", __func__); - return -1; - } - - pwdev_priv = adapter_wdev_data(adapter); - - memcpy(mac_addr, pno_random_mac_oui, 3); - rtw_hal_random_gen_mac_addr(mac_addr); - memcpy(pwdev_priv->pno_mac_addr, mac_addr, ETH_ALEN); -#ifdef CONFIG_RTW_DEBUG - print_hex_dump(KERN_DEBUG, "pno_mac_addr: ", - DUMP_PREFIX_OFFSET, 16, 1, pwdev_priv->pno_mac_addr, - ETH_ALEN, 1); -#endif - } else { - RTW_ERR("%s oui type error %x != 0x2\n", __func__, type); - err = -1; - } - - - return err; -} - -#endif - - -static int rtw_cfgvendor_set_nodfs_flag(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - int type; - u32 nodfs = 0; - _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); - - RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); - - type = nla_type(data); - if (type == ANDR_WIFI_ATTRIBUTE_NODFS_SET) { - nodfs = nla_get_u32(data); - adapter_to_dvobj(padapter)->nodfs = nodfs; - } else { - err = -EINVAL; - } - - RTW_INFO("%s nodfs=%d, err=%d\n", __func__, nodfs, err); - - return err; -} - -static int rtw_cfgvendor_set_country(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ -#define CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ - int err = 0, rem, type; - char country_code[CNTRY_BUF_SZ] = {0}; - const struct nlattr *iter; - _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); - - RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); - - nla_for_each_attr(iter, data, len, rem) { - type = nla_type(iter); - switch (type) { - case ANDR_WIFI_ATTRIBUTE_COUNTRY: - _rtw_memcpy(country_code, nla_data(iter), - MIN(nla_len(iter), CNTRY_BUF_SZ)); - break; - default: - RTW_ERR("Unknown type: %d\n", type); - return -EINVAL; - } - } - - RTW_INFO("%s country_code:\"%c%c\" \n", __func__, country_code[0], country_code[1]); - - rtw_set_country(padapter, country_code); - - return err; -} - -static int rtw_cfgvendor_set_nd_offload(struct wiphy *wiphy, - struct wireless_dev *wdev, const void *data, int len) -{ - int err = 0; - int type; - u8 nd_en = 0; - _adapter *padapter = GET_PRIMARY_ADAPTER(wiphy_to_adapter(wiphy)); - - RTW_DBG(FUNC_NDEV_FMT" %s\n", FUNC_NDEV_ARG(wdev_to_ndev(wdev)), (char*)data); - - type = nla_type(data); - if (type == ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE) { - nd_en = nla_get_u8(data); - /* ND has been enabled when wow is enabled */ - } else { - err = -EINVAL; - } - - RTW_INFO("%s nd_en=%d, err=%d\n", __func__, nd_en, err); - - return err; -} -#endif /* CONFIG_RTW_WIFI_HAL */ - -static const struct wiphy_vendor_command rtw_vendor_cmds[] = { -#if defined(GSCAN_SUPPORT) && 0 - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_GET_CAPABILITIES - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_gscan_get_capabilities - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_SET_CONFIG - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_set_scan_cfg - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_SET_SCAN_CONFIG - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_set_batch_scan_cfg - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_ENABLE_GSCAN - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_initiate_gscan - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_enable_full_scan_result - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_SET_HOTLIST - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_hotlist_cfg - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_significant_change_cfg - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_GET_SCAN_RESULTS - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_gscan_get_batch_results - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = GSCAN_SUBCMD_GET_CHANNEL_LIST - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_gscan_get_channel_list - }, -#endif /* GSCAN_SUPPORT */ -#if defined(RTT_SUPPORT) && 0 - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = RTT_SUBCMD_SET_CONFIG - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_rtt_set_config - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = RTT_SUBCMD_CANCEL_CONFIG - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_rtt_cancel_config - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = RTT_SUBCMD_GETCAPABILITY - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_rtt_get_capability - }, -#endif /* RTT_SUPPORT */ -#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LSTATS_SUBCMD_GET_INFO - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_lstats_get_info - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LSTATS_SUBCMD_SET_INFO - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_lstats_set_info - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LSTATS_SUBCMD_CLEAR_INFO - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_lstats_clear_info - }, -#endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ -#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = WIFI_SUBCMD_SET_RSSI_MONITOR - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_set_rssi_monitor - }, -#endif /* CONFIG_RTW_CFGVEDNOR_RSSIMONITOR */ -#ifdef CONFIG_RTW_CFGVENDOR_WIFI_LOGGER - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_START_LOGGING - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_start_logging - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_GET_FEATURE - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_get_feature - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_GET_VER - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_get_version - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_GET_RING_STATUS - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_get_ring_status - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_GET_RING_DATA - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_get_ring_data - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_TRIGGER_MEM_DUMP - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_get_firmware_memory_dump - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_START_PKT_FATE_MONITORING - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_start_pkt_fate_monitoring - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_GET_TX_PKT_FATES - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_get_tx_pkt_fates - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = LOGGER_GET_RX_PKT_FATES - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_logger_get_rx_pkt_fates - }, -#endif /* CONFIG_RTW_CFGVENDOR_WIFI_LOGGER */ -#ifdef CONFIG_RTW_WIFI_HAL -#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = WIFI_SUBCMD_SET_PNO_RANDOM_MAC_OUI - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_set_rand_mac_oui - }, -#endif - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = WIFI_SUBCMD_NODFS_SET - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_set_nodfs_flag - - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = WIFI_SUBCMD_SET_COUNTRY_CODE - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_set_country - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = WIFI_SUBCMD_CONFIG_ND_OFFLOAD - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_set_nd_offload - }, -#endif /* CONFIG_RTW_WIFI_HAL */ - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = WIFI_SUBCMD_GET_FEATURE_SET - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_get_feature_set - }, - { - { - .vendor_id = OUI_GOOGLE, - .subcmd = WIFI_SUBCMD_GET_FEATURE_SET_MATRIX - }, - .flags = WIPHY_VENDOR_CMD_NEED_WDEV | WIPHY_VENDOR_CMD_NEED_NETDEV, - .doit = rtw_cfgvendor_get_feature_set_matrix - } -}; - -static const struct nl80211_vendor_cmd_info rtw_vendor_events[] = { -#if defined(GSCAN_SUPPORT) && 0 - { OUI_GOOGLE, GSCAN_EVENT_SIGNIFICANT_CHANGE_RESULTS }, - { OUI_GOOGLE, GSCAN_EVENT_HOTLIST_RESULTS_FOUND }, - { OUI_GOOGLE, GSCAN_EVENT_SCAN_RESULTS_AVAILABLE }, - { OUI_GOOGLE, GSCAN_EVENT_FULL_SCAN_RESULTS }, -#endif /* GSCAN_SUPPORT */ -#if defined(RTT_SUPPORT) && 0 - { OUI_GOOGLE, RTT_EVENT_COMPLETE }, -#endif /* RTT_SUPPORT */ - -#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR - { OUI_GOOGLE, GOOGLE_RSSI_MONITOR_EVENT }, -#endif /* RTW_CFGVEDNOR_RSSIMONITR */ - -#if defined(GSCAN_SUPPORT) && 0 - { OUI_GOOGLE, GSCAN_EVENT_COMPLETE_SCAN }, - { OUI_GOOGLE, GSCAN_EVENT_HOTLIST_RESULTS_LOST } -#endif /* GSCAN_SUPPORT */ -}; - -int rtw_cfgvendor_attach(struct wiphy *wiphy) -{ - - RTW_INFO("Register RTW cfg80211 vendor cmd(0x%x) interface\n", NL80211_CMD_VENDOR); - - wiphy->vendor_commands = rtw_vendor_cmds; - wiphy->n_vendor_commands = ARRAY_SIZE(rtw_vendor_cmds); - wiphy->vendor_events = rtw_vendor_events; - wiphy->n_vendor_events = ARRAY_SIZE(rtw_vendor_events); - - return 0; -} - -int rtw_cfgvendor_detach(struct wiphy *wiphy) -{ - RTW_INFO("Vendor: Unregister RTW cfg80211 vendor interface\n"); - - wiphy->vendor_commands = NULL; - wiphy->vendor_events = NULL; - wiphy->n_vendor_commands = 0; - wiphy->n_vendor_events = 0; - - return 0; -} -#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */ - -#endif /* CONFIG_IOCTL_CFG80211 */ diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.h b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.h deleted file mode 100644 index ffb576e12a946b..00000000000000 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_cfgvendor.h +++ /dev/null @@ -1,633 +0,0 @@ -/****************************************************************************** - * - * Copyright(c) 2007 - 2017 Realtek Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - *****************************************************************************/ - -#ifndef _RTW_CFGVENDOR_H_ -#define _RTW_CFGVENDOR_H_ - -#define OUI_GOOGLE 0x001A11 -#define ATTRIBUTE_U32_LEN (NLA_HDRLEN + 4) -#define VENDOR_ID_OVERHEAD ATTRIBUTE_U32_LEN -#define VENDOR_SUBCMD_OVERHEAD ATTRIBUTE_U32_LEN -#define VENDOR_DATA_OVERHEAD (NLA_HDRLEN) - -#define SCAN_RESULTS_COMPLETE_FLAG_LEN ATTRIBUTE_U32_LEN -#define SCAN_INDEX_HDR_LEN (NLA_HDRLEN) -#define SCAN_ID_HDR_LEN ATTRIBUTE_U32_LEN -#define SCAN_FLAGS_HDR_LEN ATTRIBUTE_U32_LEN -#define GSCAN_NUM_RESULTS_HDR_LEN ATTRIBUTE_U32_LEN -#define GSCAN_RESULTS_HDR_LEN (NLA_HDRLEN) -#define GSCAN_BATCH_RESULT_HDR_LEN (SCAN_INDEX_HDR_LEN + SCAN_ID_HDR_LEN + \ - SCAN_FLAGS_HDR_LEN + \ - GSCAN_NUM_RESULTS_HDR_LEN + \ - GSCAN_RESULTS_HDR_LEN) - -#define VENDOR_REPLY_OVERHEAD (VENDOR_ID_OVERHEAD + \ - VENDOR_SUBCMD_OVERHEAD + \ - VENDOR_DATA_OVERHEAD) -typedef enum { - /* don't use 0 as a valid subcommand */ - VENDOR_NL80211_SUBCMD_UNSPECIFIED, - - /* define all vendor startup commands between 0x0 and 0x0FFF */ - VENDOR_NL80211_SUBCMD_RANGE_START = 0x0001, - VENDOR_NL80211_SUBCMD_RANGE_END = 0x0FFF, - - /* define all GScan related commands between 0x1000 and 0x10FF */ - ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START = 0x1000, - ANDROID_NL80211_SUBCMD_GSCAN_RANGE_END = 0x10FF, - - /* define all NearbyDiscovery related commands between 0x1100 and 0x11FF */ - ANDROID_NL80211_SUBCMD_NBD_RANGE_START = 0x1100, - ANDROID_NL80211_SUBCMD_NBD_RANGE_END = 0x11FF, - - /* define all RTT related commands between 0x1100 and 0x11FF */ - ANDROID_NL80211_SUBCMD_RTT_RANGE_START = 0x1100, - ANDROID_NL80211_SUBCMD_RTT_RANGE_END = 0x11FF, - - ANDROID_NL80211_SUBCMD_LSTATS_RANGE_START = 0x1200, - ANDROID_NL80211_SUBCMD_LSTATS_RANGE_END = 0x12FF, - - /* define all Logger related commands between 0x1400 and 0x14FF */ - ANDROID_NL80211_SUBCMD_DEBUG_RANGE_START = 0x1400, - ANDROID_NL80211_SUBCMD_DEBUG_RANGE_END = 0x14FF, - - /* define all wifi offload related commands between 0x1600 and 0x16FF */ - ANDROID_NL80211_SUBCMD_WIFI_OFFLOAD_RANGE_START = 0x1600, - ANDROID_NL80211_SUBCMD_WIFI_OFFLOAD_RANGE_END = 0x16FF, - - /* define all NAN related commands between 0x1700 and 0x17FF */ - ANDROID_NL80211_SUBCMD_NAN_RANGE_START = 0x1700, - ANDROID_NL80211_SUBCMD_NAN_RANGE_END = 0x17FF, - - /* define all Android Packet Filter related commands between 0x1800 and 0x18FF */ - ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_START = 0x1800, - ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_END = 0x18FF, - - /* This is reserved for future usage */ - -} ANDROID_VENDOR_SUB_COMMAND; - -enum rtw_vendor_subcmd { - GSCAN_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_GSCAN_RANGE_START, - - GSCAN_SUBCMD_SET_CONFIG, /* 0x1001 */ - - GSCAN_SUBCMD_SET_SCAN_CONFIG, /* 0x1002 */ - GSCAN_SUBCMD_ENABLE_GSCAN, /* 0x1003 */ - GSCAN_SUBCMD_GET_SCAN_RESULTS, /* 0x1004 */ - GSCAN_SUBCMD_SCAN_RESULTS, /* 0x1005 */ - - GSCAN_SUBCMD_SET_HOTLIST, /* 0x1006 */ - - GSCAN_SUBCMD_SET_SIGNIFICANT_CHANGE_CONFIG, /* 0x1007 */ - GSCAN_SUBCMD_ENABLE_FULL_SCAN_RESULTS, /* 0x1008 */ - GSCAN_SUBCMD_GET_CHANNEL_LIST, /* 0x1009 */ - - WIFI_SUBCMD_GET_FEATURE_SET, /* 0x100A */ - WIFI_SUBCMD_GET_FEATURE_SET_MATRIX, /* 0x100B */ - WIFI_SUBCMD_SET_PNO_RANDOM_MAC_OUI, /* 0x100C */ - WIFI_SUBCMD_NODFS_SET, /* 0x100D */ - WIFI_SUBCMD_SET_COUNTRY_CODE, /* 0x100E */ - /* Add more sub commands here */ - GSCAN_SUBCMD_SET_EPNO_SSID, /* 0x100F */ - - WIFI_SUBCMD_SET_SSID_WHITE_LIST, /* 0x1010 */ - WIFI_SUBCMD_SET_ROAM_PARAMS, /* 0x1011 */ - WIFI_SUBCMD_ENABLE_LAZY_ROAM, /* 0x1012 */ - WIFI_SUBCMD_SET_BSSID_PREF, /* 0x1013 */ - WIFI_SUBCMD_SET_BSSID_BLACKLIST, /* 0x1014 */ - - GSCAN_SUBCMD_ANQPO_CONFIG, /* 0x1015 */ - WIFI_SUBCMD_SET_RSSI_MONITOR, /* 0x1016 */ - WIFI_SUBCMD_CONFIG_ND_OFFLOAD, /* 0x1017 */ - /* Add more sub commands here */ - - GSCAN_SUBCMD_MAX, - - RTT_SUBCMD_SET_CONFIG = ANDROID_NL80211_SUBCMD_RTT_RANGE_START, - RTT_SUBCMD_CANCEL_CONFIG, - RTT_SUBCMD_GETCAPABILITY, - - APF_SUBCMD_GET_CAPABILITIES = ANDROID_NL80211_SUBCMD_PKT_FILTER_RANGE_START, - APF_SUBCMD_SET_FILTER, - - LOGGER_START_LOGGING = ANDROID_NL80211_SUBCMD_DEBUG_RANGE_START, - LOGGER_TRIGGER_MEM_DUMP, - LOGGER_GET_MEM_DUMP, - LOGGER_GET_VER, - LOGGER_GET_RING_STATUS, - LOGGER_GET_RING_DATA, - LOGGER_GET_FEATURE, - LOGGER_RESET_LOGGING, - LOGGER_TRIGGER_DRIVER_MEM_DUMP, - LOGGER_GET_DRIVER_MEM_DUMP, - LOGGER_START_PKT_FATE_MONITORING, - LOGGER_GET_TX_PKT_FATES, - LOGGER_GET_RX_PKT_FATES, - - VENDOR_SUBCMD_MAX -}; - -enum gscan_attributes { - GSCAN_ATTRIBUTE_NUM_BUCKETS = 10, - GSCAN_ATTRIBUTE_BASE_PERIOD, - GSCAN_ATTRIBUTE_BUCKETS_BAND, - GSCAN_ATTRIBUTE_BUCKET_ID, - GSCAN_ATTRIBUTE_BUCKET_PERIOD, - GSCAN_ATTRIBUTE_BUCKET_NUM_CHANNELS, - GSCAN_ATTRIBUTE_BUCKET_CHANNELS, - GSCAN_ATTRIBUTE_NUM_AP_PER_SCAN, - GSCAN_ATTRIBUTE_REPORT_THRESHOLD, - GSCAN_ATTRIBUTE_NUM_SCANS_TO_CACHE, - GSCAN_ATTRIBUTE_BAND = GSCAN_ATTRIBUTE_BUCKETS_BAND, - - GSCAN_ATTRIBUTE_ENABLE_FEATURE = 20, - GSCAN_ATTRIBUTE_SCAN_RESULTS_COMPLETE, - GSCAN_ATTRIBUTE_FLUSH_FEATURE, - GSCAN_ATTRIBUTE_ENABLE_FULL_SCAN_RESULTS, - GSCAN_ATTRIBUTE_REPORT_EVENTS, - /* remaining reserved for additional attributes */ - GSCAN_ATTRIBUTE_NUM_OF_RESULTS = 30, - GSCAN_ATTRIBUTE_FLUSH_RESULTS, - GSCAN_ATTRIBUTE_SCAN_RESULTS, /* flat array of wifi_scan_result */ - GSCAN_ATTRIBUTE_SCAN_ID, /* indicates scan number */ - GSCAN_ATTRIBUTE_SCAN_FLAGS, /* indicates if scan was aborted */ - GSCAN_ATTRIBUTE_AP_FLAGS, /* flags on significant change event */ - GSCAN_ATTRIBUTE_NUM_CHANNELS, - GSCAN_ATTRIBUTE_CHANNEL_LIST, - - /* remaining reserved for additional attributes */ - - GSCAN_ATTRIBUTE_SSID = 40, - GSCAN_ATTRIBUTE_BSSID, - GSCAN_ATTRIBUTE_CHANNEL, - GSCAN_ATTRIBUTE_RSSI, - GSCAN_ATTRIBUTE_TIMESTAMP, - GSCAN_ATTRIBUTE_RTT, - GSCAN_ATTRIBUTE_RTTSD, - - /* remaining reserved for additional attributes */ - - GSCAN_ATTRIBUTE_HOTLIST_BSSIDS = 50, - GSCAN_ATTRIBUTE_RSSI_LOW, - GSCAN_ATTRIBUTE_RSSI_HIGH, - GSCAN_ATTRIBUTE_HOSTLIST_BSSID_ELEM, - GSCAN_ATTRIBUTE_HOTLIST_FLUSH, - - /* remaining reserved for additional attributes */ - GSCAN_ATTRIBUTE_RSSI_SAMPLE_SIZE = 60, - GSCAN_ATTRIBUTE_LOST_AP_SAMPLE_SIZE, - GSCAN_ATTRIBUTE_MIN_BREACHING, - GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_BSSIDS, - GSCAN_ATTRIBUTE_SIGNIFICANT_CHANGE_FLUSH, - GSCAN_ATTRIBUTE_MAX -}; - -enum gscan_bucket_attributes { - GSCAN_ATTRIBUTE_CH_BUCKET_1, - GSCAN_ATTRIBUTE_CH_BUCKET_2, - GSCAN_ATTRIBUTE_CH_BUCKET_3, - GSCAN_ATTRIBUTE_CH_BUCKET_4, - GSCAN_ATTRIBUTE_CH_BUCKET_5, - GSCAN_ATTRIBUTE_CH_BUCKET_6, - GSCAN_ATTRIBUTE_CH_BUCKET_7 -}; - -enum gscan_ch_attributes { - GSCAN_ATTRIBUTE_CH_ID_1, - GSCAN_ATTRIBUTE_CH_ID_2, - GSCAN_ATTRIBUTE_CH_ID_3, - GSCAN_ATTRIBUTE_CH_ID_4, - GSCAN_ATTRIBUTE_CH_ID_5, - GSCAN_ATTRIBUTE_CH_ID_6, - GSCAN_ATTRIBUTE_CH_ID_7 -}; - -enum wifi_rssi_monitor_attr { - RSSI_MONITOR_ATTRIBUTE_MAX_RSSI, - RSSI_MONITOR_ATTRIBUTE_MIN_RSSI, - RSSI_MONITOR_ATTRIBUTE_START, -}; - - -enum rtt_attributes { - RTT_ATTRIBUTE_TARGET_CNT, - RTT_ATTRIBUTE_TARGET_INFO, - RTT_ATTRIBUTE_TARGET_MAC, - RTT_ATTRIBUTE_TARGET_TYPE, - RTT_ATTRIBUTE_TARGET_PEER, - RTT_ATTRIBUTE_TARGET_CHAN, - RTT_ATTRIBUTE_TARGET_MODE, - RTT_ATTRIBUTE_TARGET_INTERVAL, - RTT_ATTRIBUTE_TARGET_NUM_MEASUREMENT, - RTT_ATTRIBUTE_TARGET_NUM_PKT, - RTT_ATTRIBUTE_TARGET_NUM_RETRY -}; - -enum logger_attributes { - LOGGER_ATTRIBUTE_GET_DRIVER, - LOGGER_ATTRIBUTE_GET_FW, - LOGGER_ATTRIBUTE_RING_ID, - LOGGER_ATTRIBUTE_RING_NAME, - LOGGER_ATTRIBUTE_RING_FLAGS, - LOGGER_ATTRIBUTE_LOG_LEVEL, - LOGGER_ATTRIBUTE_LOG_TIME_INTVAL, - LOGGER_ATTRIBUTE_LOG_MIN_DATA_SIZE, - LOGGER_ATTRIBUTE_FW_DUMP_LEN, - LOGGER_ATTRIBUTE_FW_DUMP_DATA, - LOGGERG_ATTRIBUTE_RING_DATA, - LOGGER_ATTRIBUTE_RING_STATUS, - LOGGER_ATTRIBUTE_RING_NUM -}; -typedef enum rtw_vendor_event { - RTK_RESERVED1, - RTK_RESERVED2, - GSCAN_EVENT_SIGNIFICANT_CHANGE_RESULTS , - GSCAN_EVENT_HOTLIST_RESULTS_FOUND, - GSCAN_EVENT_SCAN_RESULTS_AVAILABLE, - GSCAN_EVENT_FULL_SCAN_RESULTS, - RTT_EVENT_COMPLETE, - GSCAN_EVENT_COMPLETE_SCAN, - GSCAN_EVENT_HOTLIST_RESULTS_LOST, - GSCAN_EVENT_EPNO_EVENT, - GOOGLE_DEBUG_RING_EVENT, - GOOGLE_DEBUG_MEM_DUMP_EVENT, - GSCAN_EVENT_ANQPO_HOTSPOT_MATCH, - GOOGLE_RSSI_MONITOR_EVENT -} rtw_vendor_event_t; - -enum andr_wifi_feature_set_attr { - ANDR_WIFI_ATTRIBUTE_NUM_FEATURE_SET, - ANDR_WIFI_ATTRIBUTE_FEATURE_SET, - ANDR_WIFI_ATTRIBUTE_RANDOM_MAC_OUI, - ANDR_WIFI_ATTRIBUTE_NODFS_SET, - ANDR_WIFI_ATTRIBUTE_COUNTRY, - ANDR_WIFI_ATTRIBUTE_ND_OFFLOAD_VALUE - // Add more attribute here -}; - -typedef enum rtw_vendor_gscan_attribute { - ATTR_START_GSCAN, - ATTR_STOP_GSCAN, - ATTR_SET_SCAN_BATCH_CFG_ID, /* set batch scan params */ - ATTR_SET_SCAN_GEOFENCE_CFG_ID, /* set list of bssids to track */ - ATTR_SET_SCAN_SIGNIFICANT_CFG_ID, /* set list of bssids, rssi threshold etc.. */ - ATTR_SET_SCAN_CFG_ID, /* set common scan config params here */ - ATTR_GET_GSCAN_CAPABILITIES_ID, - /* Add more sub commands here */ - ATTR_GSCAN_MAX -} rtw_vendor_gscan_attribute_t; - -typedef enum gscan_batch_attribute { - ATTR_GSCAN_BATCH_BESTN, - ATTR_GSCAN_BATCH_MSCAN, - ATTR_GSCAN_BATCH_BUFFER_THRESHOLD -} gscan_batch_attribute_t; - -typedef enum gscan_geofence_attribute { - ATTR_GSCAN_NUM_HOTLIST_BSSID, - ATTR_GSCAN_HOTLIST_BSSID -} gscan_geofence_attribute_t; - -typedef enum gscan_complete_event { - WIFI_SCAN_BUFFER_FULL, - WIFI_SCAN_COMPLETE -} gscan_complete_event_t; -/* wifi_hal.h */ -/* WiFi Common definitions */ -typedef unsigned char byte; -typedef int wifi_request_id; -typedef int wifi_channel; // indicates channel frequency in MHz -typedef int wifi_rssi; -typedef byte mac_addr[6]; -typedef byte oui[3]; -typedef int64_t wifi_timestamp; // In microseconds (us) -typedef int64_t wifi_timespan; // In picoseconds (ps) - -struct wifi_info; -struct wifi_interface_info; -typedef struct wifi_info *wifi_handle; -typedef struct wifi_interface_info *wifi_interface_handle; - -/* channel operating width */ -typedef enum { - WIFI_CHAN_WIDTH_20 = 0, - WIFI_CHAN_WIDTH_40 = 1, - WIFI_CHAN_WIDTH_80 = 2, - WIFI_CHAN_WIDTH_160 = 3, - WIFI_CHAN_WIDTH_80P80 = 4, - WIFI_CHAN_WIDTH_5 = 5, - WIFI_CHAN_WIDTH_10 = 6, - WIFI_CHAN_WIDTH_INVALID = -1 -} wifi_channel_width; - -typedef int wifi_radio; - -typedef struct { - wifi_channel_width width; - int center_frequency0; - int center_frequency1; - int primary_frequency; -} wifi_channel_spec; - -typedef enum { - WIFI_SUCCESS = 0, - WIFI_ERROR_NONE = 0, - WIFI_ERROR_UNKNOWN = -1, - WIFI_ERROR_UNINITIALIZED = -2, - WIFI_ERROR_NOT_SUPPORTED = -3, - WIFI_ERROR_NOT_AVAILABLE = -4, // Not available right now, but try later - WIFI_ERROR_INVALID_ARGS = -5, - WIFI_ERROR_INVALID_REQUEST_ID = -6, - WIFI_ERROR_TIMED_OUT = -7, - WIFI_ERROR_TOO_MANY_REQUESTS = -8, // Too many instances of this request - WIFI_ERROR_OUT_OF_MEMORY = -9, - WIFI_ERROR_BUSY = -10, -} wifi_error; - -typedef int wifi_ring_buffer_id; -/* ring buffer params */ -/** - * written_bytes and read_bytes implement a producer consumer API - * hence written_bytes >= read_bytes - * a modulo arithmetic of the buffer size has to be applied to those counters: - * actual offset into ring buffer = written_bytes % ring_buffer_byte_size - * - */ -typedef struct { - u8 name[32]; - u32 flags; - wifi_ring_buffer_id ring_id; // unique integer representing the ring - u32 ring_buffer_byte_size; // total memory size allocated for the buffer - u32 verbose_level; // verbose level for ring buffer - u32 written_bytes; // number of bytes that was written to the buffer by driver, - // monotonously increasing integer - u32 read_bytes; // number of bytes that was read from the buffer by user land, - // monotonously increasing integer - u32 written_records; // number of records that was written to the buffer by driver, - // monotonously increasing integer -} wifi_ring_buffer_status; - -#ifdef CONFIG_RTW_CFGVEDNOR_LLSTATS -#define STATS_MAJOR_VERSION 1 -#define STATS_MINOR_VERSION 0 -#define STATS_MICRO_VERSION 0 - -typedef enum { - WIFI_DISCONNECTED = 0, - WIFI_AUTHENTICATING = 1, - WIFI_ASSOCIATING = 2, - WIFI_ASSOCIATED = 3, - WIFI_EAPOL_STARTED = 4, // if done by firmware/driver - WIFI_EAPOL_COMPLETED = 5, // if done by firmware/driver -} wifi_connection_state; - -typedef enum { - WIFI_ROAMING_IDLE = 0, - WIFI_ROAMING_ACTIVE = 1, -} wifi_roam_state; - -typedef enum { - WIFI_INTERFACE_STA = 0, - WIFI_INTERFACE_SOFTAP = 1, - WIFI_INTERFACE_IBSS = 2, - WIFI_INTERFACE_P2P_CLIENT = 3, - WIFI_INTERFACE_P2P_GO = 4, - WIFI_INTERFACE_NAN = 5, - WIFI_INTERFACE_MESH = 6, - WIFI_INTERFACE_UNKNOWN = -1 - } wifi_interface_mode; - -#define WIFI_CAPABILITY_QOS 0x00000001 // set for QOS association -#define WIFI_CAPABILITY_PROTECTED 0x00000002 // set for protected association (802.11 beacon frame control protected bit set) -#define WIFI_CAPABILITY_INTERWORKING 0x00000004 // set if 802.11 Extended Capabilities element interworking bit is set -#define WIFI_CAPABILITY_HS20 0x00000008 // set for HS20 association -#define WIFI_CAPABILITY_SSID_UTF8 0x00000010 // set is 802.11 Extended Capabilities element UTF-8 SSID bit is set -#define WIFI_CAPABILITY_COUNTRY 0x00000020 // set is 802.11 Country Element is present - -typedef struct { - wifi_interface_mode mode; // interface mode - u8 mac_addr[6]; // interface mac address (self) - wifi_connection_state state; // connection state (valid for STA, CLI only) - wifi_roam_state roaming; // roaming state - u32 capabilities; // WIFI_CAPABILITY_XXX (self) - u8 ssid[33]; // null terminated SSID - u8 bssid[6]; // bssid - u8 ap_country_str[3]; // country string advertised by AP - u8 country_str[3]; // country string for this association -} wifi_interface_link_layer_info; - -/* channel information */ -typedef struct { - wifi_channel_width width; // channel width (20, 40, 80, 80+80, 160) - wifi_channel center_freq; // primary 20 MHz channel - wifi_channel center_freq0; // center frequency (MHz) first segment - wifi_channel center_freq1; // center frequency (MHz) second segment -} wifi_channel_info; - -/* wifi rate */ -typedef struct { - u32 preamble :3; // 0: OFDM, 1:CCK, 2:HT 3:VHT 4..7 reserved - u32 nss :2; // 0:1x1, 1:2x2, 3:3x3, 4:4x4 - u32 bw :3; // 0:20MHz, 1:40Mhz, 2:80Mhz, 3:160Mhz - u32 rateMcsIdx :8; // OFDM/CCK rate code would be as per ieee std in the units of 0.5mbps - // HT/VHT it would be mcs index - u32 reserved :16; // reserved - u32 bitrate; // units of 100 Kbps -} wifi_rate; - -/* channel statistics */ -typedef struct { - wifi_channel_info channel; // channel - u32 on_time; // msecs the radio is awake (32 bits number accruing over time) - u32 cca_busy_time; // msecs the CCA register is busy (32 bits number accruing over time) -} wifi_channel_stat; - -// Max number of tx power levels. The actual number vary per device and is specified by |num_tx_levels| -#define RADIO_STAT_MAX_TX_LEVELS 256 - -/* Internal radio statistics structure in the driver */ -typedef struct { - wifi_radio radio; // wifi radio (if multiple radio supported) - u32 on_time; // msecs the radio is awake (32 bits number accruing over time) - u32 tx_time; // msecs the radio is transmitting (32 bits number accruing over time) - u32 rx_time; // msecs the radio is in active receive (32 bits number accruing over time) - u32 on_time_scan; // msecs the radio is awake due to all scan (32 bits number accruing over time) - u32 on_time_nbd; // msecs the radio is awake due to NAN (32 bits number accruing over time) - u32 on_time_gscan; // msecs the radio is awake due to G?scan (32 bits number accruing over time) - u32 on_time_roam_scan; // msecs the radio is awake due to roam?scan (32 bits number accruing over time) - u32 on_time_pno_scan; // msecs the radio is awake due to PNO scan (32 bits number accruing over time) - u32 on_time_hs20; // msecs the radio is awake due to HS2.0 scans and GAS exchange (32 bits number accruing over time) - u32 num_channels; // number of channels - wifi_channel_stat channels[]; // channel statistics -} wifi_radio_stat_internal; - -/** - * Packet statistics reporting by firmware is performed on MPDU basi (i.e. counters increase by 1 for each MPDU) - * As well, "data packet" in associated comments, shall be interpreted as 802.11 data packet, - * that is, 802.11 frame control subtype == 2 and excluding management and control frames. - * - * As an example, in the case of transmission of an MSDU fragmented in 16 MPDUs which are transmitted - * OTA in a 16 units long a-mpdu, for which a block ack is received with 5 bits set: - * tx_mpdu : shall increase by 5 - * retries : shall increase by 16 - * tx_ampdu : shall increase by 1 - * data packet counters shall not increase regardless of the number of BAR potentially sent by device for this a-mpdu - * data packet counters shall not increase regardless of the number of BA received by device for this a-mpdu - * - * For each subsequent retransmission of the 11 remaining non ACK'ed mpdus - * (regardless of the fact that they are transmitted in a-mpdu or not) - * retries : shall increase by 1 - * - * If no subsequent BA or ACK are received from AP, until packet lifetime expires for those 11 packet that were not ACK'ed - * mpdu_lost : shall increase by 11 - */ - -/* per rate statistics */ -typedef struct { - wifi_rate rate; // rate information - u32 tx_mpdu; // number of successfully transmitted data pkts (ACK rcvd) - u32 rx_mpdu; // number of received data pkts - u32 mpdu_lost; // number of data packet losses (no ACK) - u32 retries; // total number of data pkt retries - u32 retries_short; // number of short data pkt retries - u32 retries_long; // number of long data pkt retries -} wifi_rate_stat; - -/* access categories */ -typedef enum { - WIFI_AC_VO = 0, - WIFI_AC_VI = 1, - WIFI_AC_BE = 2, - WIFI_AC_BK = 3, - WIFI_AC_MAX = 4, -} wifi_traffic_ac; - -/* wifi peer type */ -typedef enum -{ - WIFI_PEER_STA, - WIFI_PEER_AP, - WIFI_PEER_P2P_GO, - WIFI_PEER_P2P_CLIENT, - WIFI_PEER_NAN, - WIFI_PEER_TDLS, - WIFI_PEER_INVALID, -} wifi_peer_type; - -/* per peer statistics */ -typedef struct { - wifi_peer_type type; // peer type (AP, TDLS, GO etc.) - u8 peer_mac_address[6]; // mac address - u32 capabilities; // peer WIFI_CAPABILITY_XXX - u32 num_rate; // number of rates - wifi_rate_stat rate_stats[]; // per rate statistics, number of entries = num_rate -} wifi_peer_info; - -/* Per access category statistics */ -typedef struct { - wifi_traffic_ac ac; // access category (VI, VO, BE, BK) - u32 tx_mpdu; // number of successfully transmitted unicast data pkts (ACK rcvd) - u32 rx_mpdu; // number of received unicast data packets - u32 tx_mcast; // number of succesfully transmitted multicast data packets - // STA case: implies ACK received from AP for the unicast packet in which mcast pkt was sent - u32 rx_mcast; // number of received multicast data packets - u32 rx_ampdu; // number of received unicast a-mpdus; support of this counter is optional - u32 tx_ampdu; // number of transmitted unicast a-mpdus; support of this counter is optional - u32 mpdu_lost; // number of data pkt losses (no ACK) - u32 retries; // total number of data pkt retries - u32 retries_short; // number of short data pkt retries - u32 retries_long; // number of long data pkt retries - u32 contention_time_min; // data pkt min contention time (usecs) - u32 contention_time_max; // data pkt max contention time (usecs) - u32 contention_time_avg; // data pkt avg contention time (usecs) - u32 contention_num_samples; // num of data pkts used for contention statistics -} wifi_wmm_ac_stat; - -/* interface statistics */ -typedef struct { - wifi_interface_handle iface; // wifi interface - wifi_interface_link_layer_info info; // current state of the interface - u32 beacon_rx; // access point beacon received count from connected AP - u64 average_tsf_offset; // average beacon offset encountered (beacon_TSF - TBTT) - // The average_tsf_offset field is used so as to calculate the - // typical beacon contention time on the channel as well may be - // used to debug beacon synchronization and related power consumption issue - u32 leaky_ap_detected; // indicate that this AP typically leaks packets beyond the driver guard time. - u32 leaky_ap_avg_num_frames_leaked; // average number of frame leaked by AP after frame with PM bit set was ACK'ed by AP - u32 leaky_ap_guard_time; // guard time currently in force (when implementing IEEE power management based on - // frame control PM bit), How long driver waits before shutting down the radio and - // after receiving an ACK for a data frame with PM bit set) - u32 mgmt_rx; // access point mgmt frames received count from connected AP (including Beacon) - u32 mgmt_action_rx; // action frames received count - u32 mgmt_action_tx; // action frames transmit count - wifi_rssi rssi_mgmt; // access Point Beacon and Management frames RSSI (averaged) - wifi_rssi rssi_data; // access Point Data Frames RSSI (averaged) from connected AP - wifi_rssi rssi_ack; // access Point ACK RSSI (averaged) from connected AP - wifi_wmm_ac_stat ac[WIFI_AC_MAX]; // per ac data packet statistics - u32 num_peers; // number of peers - wifi_peer_info peer_info[]; // per peer statistics -} wifi_iface_stat; - -/* configuration params */ -typedef struct { - u32 mpdu_size_threshold; // threshold to classify the pkts as short or long - // packet size < mpdu_size_threshold => short - u32 aggressive_statistics_gathering; // set for field debug mode. Driver should collect all statistics regardless of performance impact. -} wifi_link_layer_params; - -#define RSSI_MONITOR_EVT_VERSION 1 -typedef struct { - u8 version; - s8 cur_rssi; - mac_addr BSSID; -} rssi_monitor_evt; - - -/* wifi statistics bitmap */ -#define WIFI_STATS_RADIO 0x00000001 // all radio statistics -#define WIFI_STATS_RADIO_CCA 0x00000002 // cca_busy_time (within radio statistics) -#define WIFI_STATS_RADIO_CHANNELS 0x00000004 // all channel statistics (within radio statistics) -#define WIFI_STATS_RADIO_SCAN 0x00000008 // all scan statistics (within radio statistics) -#define WIFI_STATS_IFACE 0x00000010 // all interface statistics -#define WIFI_STATS_IFACE_TXRATE 0x00000020 // all tx rate statistics (within interface statistics) -#define WIFI_STATS_IFACE_AC 0x00000040 // all ac statistics (within interface statistics) -#define WIFI_STATS_IFACE_CONTENTION 0x00000080 // all contention (min, max, avg) statistics (within ac statisctics) - -#endif /* CONFIG_RTW_CFGVEDNOR_LLSTATS */ - - -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) -extern int rtw_cfgvendor_attach(struct wiphy *wiphy); -extern int rtw_cfgvendor_detach(struct wiphy *wiphy); -extern int rtw_cfgvendor_send_async_event(struct wiphy *wiphy, - struct net_device *dev, int event_id, const void *data, int len); -#if defined(GSCAN_SUPPORT) && 0 -extern int rtw_cfgvendor_send_hotlist_event(struct wiphy *wiphy, - struct net_device *dev, void *data, int len, rtw_vendor_event_t event); -#endif -#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)) || defined(RTW_VENDOR_EXT_SUPPORT) */ - -#ifdef CONFIG_RTW_CFGVEDNOR_RSSIMONITOR -void rtw_cfgvendor_rssi_monitor_evt(_adapter *padapter); -#endif - -#ifdef CONFIG_RTW_CFGVENDOR_RANDOM_MAC_OUI -void rtw_hal_pno_random_gen_mac_addr(PADAPTER adapter); -void rtw_hal_set_hw_mac_addr(PADAPTER adapter, u8 *mac_addr); -#endif - - -#endif /* _RTW_CFGVENDOR_H_ */ diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_proc.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_proc.c index d6c08237dbd58b..f1016e1cc9bff6 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_proc.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/rtw_proc.c @@ -1058,15 +1058,15 @@ static int proc_get_turboedca_ctrl(struct seq_file *m, void *v) u32 edca_param; if (hal_data->dis_turboedca == 0) - RTW_PRINT_SEL(m, "Turbo-EDCA : %s\n", "Enable"); - else + RTW_PRINT_SEL(m, "Turbo-EDCA : %s\n", "Enable"); + else RTW_PRINT_SEL(m, "Turbo-EDCA : %s, mode=%d, edca_param_mode=0x%x\n", "Disable", hal_data->dis_turboedca, hal_data->edca_param_mode); rtw_hal_get_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&edca_param)); _RTW_PRINT_SEL(m, "PARAM_BE:0x%x\n", edca_param); - + } return 0; @@ -1097,28 +1097,28 @@ static ssize_t proc_set_turboedca_ctrl(struct file *file, const char __user *buf } /* 0: enable turboedca, - 1: disable turboedca, + 1: disable turboedca, 2: disable turboedca and setting EDCA parameter based on the input parameter - > 2 : currently reset to 0 */ - - if (mode > 2) + > 2 : currently reset to 0 */ + + if (mode > 2) mode = 0; hal_data->dis_turboedca = mode; - + hal_data->edca_param_mode = 0; /* init. value */ RTW_INFO("dis_turboedca mode = 0x%x\n", hal_data->dis_turboedca); - + if (num == 2) { - hal_data->edca_param_mode = param_mode; + hal_data->edca_param_mode = param_mode; RTW_INFO("param_mode = 0x%x\n", param_mode); } - + } - + return count; } @@ -1294,7 +1294,7 @@ ssize_t proc_set_macaddr_acl(struct file *file, const char __user *buffer, size_ #define MAC_ACL_CMD_DEL 2 #define MAC_ACL_CMD_CLR 3 #define MAC_ACL_CMD_NUM 4 - + static const char * const mac_acl_cmd_str[] = { "mode", "add", @@ -1396,7 +1396,7 @@ ssize_t proc_set_macaddr_acl(struct file *file, const char __user *buffer, size_ } else if (!is_bcast) rtw_acl_add_sta(adapter, period, addr); } - + c = strsep(&next, " \t"); } } @@ -2061,7 +2061,7 @@ static void rtw_set_tx_bw_mode(struct _ADAPTER *adapter, u8 bw_mode) ) { /* RA mask update needed */ update = _TRUE; - } + } adapter->driver_tx_bw_mode = bw_mode; if (update == _TRUE) { @@ -3118,7 +3118,7 @@ static ssize_t proc_set_napi_th(struct file *file, const char __user *buffer, si for (i = 0; i < dvobj->iface_nums; i++) { iface = dvobj->padapters[i]; - if (iface) { + if (iface) { if (buffer && !copy_from_user(tmp, buffer, count)) { registry = &iface->registrypriv; num = sscanf(tmp, "%d", &thrshld); @@ -3676,10 +3676,10 @@ static void rtw_tpt_mode(struct _ADAPTER *adapter) /* when enable each tpt mode 1. scan deny 2. disable LPS */ - + dvobj->scan_deny = _TRUE; -#ifdef CONFIG_LPS +#ifdef CONFIG_LPS rtw_pm_set_lps(adapter, PS_MODE_ACTIVE); #endif @@ -3690,9 +3690,9 @@ static void rtw_tpt_mode(struct _ADAPTER *adapter) tpt_mode_default(adapter); break; case 1: /* High TP*/ - /*tpt_mode1(adapter);*/ + /*tpt_mode1(adapter);*/ dvobj->edca_be_ul = 0x5e431c; - dvobj->edca_be_dl = 0x00431c; + dvobj->edca_be_dl = 0x00431c; break; case 2: /* noise */ /* tpt_mode2(adapter); */ @@ -3716,7 +3716,7 @@ static void rtw_tpt_mode(struct _ADAPTER *adapter) rtw_set_tx_bw_mode(adapter, 0x20); /* for 2.4g, fixed tx_bw_mode to 20Mhz */ break; default: /* default mode */ - tpt_mode_default(adapter); + tpt_mode_default(adapter); break; } @@ -3749,7 +3749,7 @@ static ssize_t proc_set_tpt_mode(struct file *file, const char __user *buffer, } if (mode > MAX_TPT_MODE_NUM ) - mode = 0; + mode = 0; RTW_PRINT("%s: previous mode = %d\n", __FUNCTION__, dvobj->tpt_mode); @@ -4019,7 +4019,7 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { RTW_PROC_HDL_SSEQ("ps_info", proc_get_ps_info, proc_set_ps_info), #ifdef CONFIG_WMMPS_STA RTW_PROC_HDL_SSEQ("wmmps_info", proc_get_wmmps_info, proc_set_wmmps_info), -#endif /* CONFIG_WMMPS_STA */ +#endif /* CONFIG_WMMPS_STA */ #endif #ifdef CONFIG_TDLS RTW_PROC_HDL_SSEQ("tdls_info", proc_get_tdls_info, NULL), @@ -4145,6 +4145,10 @@ const struct rtw_proc_hdl adapter_proc_hdls[] = { #endif RTW_PROC_HDL_SSEQ("cur_beacon_keys", proc_get_cur_beacon_keys, NULL), + +#ifdef CONFIG_RTW_SW_LED + RTW_PROC_HDL_SSEQ("led_ctrl", proc_get_led_ctrl, proc_set_led_ctrl), +#endif }; const int adapter_proc_hdls_num = sizeof(adapter_proc_hdls) / sizeof(struct rtw_proc_hdl); diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_intf.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_intf.c index 9cd0e6d5b20eda..8180403b341e50 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_intf.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_intf.c @@ -23,10 +23,6 @@ #error "CONFIG_USB_HCI shall be on!\n" #endif -#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) -#error "Shall be Linux or Windows, but not both!\n" -#endif - #ifdef CONFIG_80211N_HT extern int rtw_ht_enable; extern int rtw_bw_mode; @@ -37,12 +33,10 @@ extern int rtw_ampdu_enable;/* for enable tx_ampdu */ int ui_pid[3] = {0, 0, 0}; #endif - extern int pm_netdev_open(struct net_device *pnetdev, u8 bnormal); static int rtw_suspend(struct usb_interface *intf, pm_message_t message); static int rtw_resume(struct usb_interface *intf); - static int rtw_drv_init(struct usb_interface *pusb_intf, const struct usb_device_id *pdid); static void rtw_dev_remove(struct usb_interface *pusb_intf); @@ -98,13 +92,11 @@ static void rtw_dev_shutdown(struct device *dev) #define USB_DEVICE_ID_MATCH_INT_PROTOCOL 0x0200 #define USB_DEVICE_ID_MATCH_INT_NUMBER 0x0400 - #define USB_DEVICE_ID_MATCH_INT_INFO \ (USB_DEVICE_ID_MATCH_INT_CLASS | \ USB_DEVICE_ID_MATCH_INT_SUBCLASS | \ USB_DEVICE_ID_MATCH_INT_PROTOCOL) - #define USB_DEVICE_AND_INTERFACE_INFO(vend, prod, cl, sc, pr) \ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO \ | USB_DEVICE_ID_MATCH_DEVICE, \ @@ -138,10 +130,8 @@ static void rtw_dev_shutdown(struct device *dev) /* ----------------------------------------------------------------------- */ #endif - #define USB_VENDER_ID_REALTEK 0x0BDA - /* DID_USB_v916_20130116 */ static struct usb_device_id rtw_usb_id_tbl[] = { #ifdef CONFIG_RTL8188E @@ -160,39 +150,40 @@ static struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x881B), .driver_info = RTL8812}, /* Default ID */ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x881C), .driver_info = RTL8812}, /* Default ID */ /*=== Customer ID ===*/ - {USB_DEVICE(0x0409, 0x0408), .driver_info = RTL8812}, /* NEC - */ - {USB_DEVICE(0x0411, 0x025D), .driver_info = RTL8812}, /* Buffalo - WI-U3-866D */ - {USB_DEVICE(0x04BB, 0x0952), .driver_info = RTL8812}, /* I-O DATA - Edimax */ - {USB_DEVICE(0x050D, 0x1106), .driver_info = RTL8812}, /* Belkin - Sercomm */ - {USB_DEVICE(0x050D, 0x1109), .driver_info = RTL8812}, /* Belkin - SerComm F9L1109 */ - {USB_DEVICE(0x0586, 0x3426), .driver_info = RTL8812}, /* ZyXEL - */ - {USB_DEVICE(0x0789, 0x016E), .driver_info = RTL8812}, /* Logitec - Edimax */ - {USB_DEVICE(0x07B8, 0x8812), .driver_info = RTL8812}, /* Abocom - Abocom */ - {USB_DEVICE(0x0846, 0x9051), .driver_info = RTL8812}, /* Netgear A6200 v2 */ - {USB_DEVICE(0x0B05, 0x17D2), .driver_info = RTL8812}, /* ASUS - Edimax */ - {USB_DEVICE(0x0BDA, 0x8812), .driver_info = RTL8812}, /* KOOTEK */ - {USB_DEVICE(0x0BDA, 0x881A), .driver_info = RTL8812}, /* Unex DAUK-W8812 */ - {USB_DEVICE(0x0DF6, 0x0074), .driver_info = RTL8812}, /* Sitecom - Edimax */ - {USB_DEVICE(0x0E66, 0x0022), .driver_info = RTL8812}, /* HAWKING - Edimax */ - {USB_DEVICE(0x1058, 0x0632), .driver_info = RTL8812}, /* WD - Cybertan */ - {USB_DEVICE(0x13B1, 0x003F), .driver_info = RTL8812}, /* Linksys - WUSB6300 */ - {USB_DEVICE(0x148F, 0x9097), .driver_info = RTL8812}, /* Amped Wireless - ACA1 */ - {USB_DEVICE(0x1740, 0x0100), .driver_info = RTL8812}, /* EnGenius - EnGenius */ - {USB_DEVICE(0x2001, 0x330E), .driver_info = RTL8812}, /* D-Link - ALPHA */ - {USB_DEVICE(0x2001, 0x3313), .driver_info = RTL8812}, /* D-Link - ALPHA */ - {USB_DEVICE(0x2001, 0x3315), .driver_info = RTL8812}, /* D-Link - Cameo */ - {USB_DEVICE(0x2001, 0x3316), .driver_info = RTL8812}, /* D-Link - Cameo */ - {USB_DEVICE(0x2019, 0xAB30), .driver_info = RTL8812}, /* Planex - Abocom */ - {USB_DEVICE(0x20F4, 0x805B), .driver_info = RTL8812}, /* TRENDnet - Cameo */ - {USB_DEVICE(0x2357, 0x0101), .driver_info = RTL8812}, /* TP-Link - Archer T4U */ - {USB_DEVICE(0x2357, 0x0103), .driver_info = RTL8812}, /* TP-Link - Archer T4UH */ - {USB_DEVICE(0x2357, 0x010D), .driver_info = RTL8812}, /* TP-Link - Archer T4U AC1300 */ - {USB_DEVICE(0x2357, 0x010E), .driver_info = RTL8812}, /* TP-Link - Archer T4UH AC1300 */ - {USB_DEVICE(0x2357, 0x010F), .driver_info = RTL8812}, /* TP-Link - T4UHP */ - {USB_DEVICE(0x2357, 0x0122), .driver_info = RTL8812}, /* TP-Link - Archer T4UHP(US) v1 AC1300 */ - {USB_DEVICE(0x2604, 0x0012), .driver_info = RTL8812}, /* Tenda - U12 */ - {USB_DEVICE(0x7392, 0xA812), .driver_info = RTL8812}, /* Edimax - EW-7811UTC */ - {USB_DEVICE(0x7392, 0xA822), .driver_info = RTL8812}, /* Edimax - Edimax */ + {USB_DEVICE(0x050D, 0x1106), .driver_info = RTL8812}, /* Belkin - sercomm */ + {USB_DEVICE(0x7392, 0xA822), .driver_info = RTL8812}, /* Edimax - Edimax */ + {USB_DEVICE(0x0DF6, 0x0074), .driver_info = RTL8812}, /* Sitecom - Edimax */ + {USB_DEVICE(0x04BB, 0x0952), .driver_info = RTL8812}, /* I-O DATA - Edimax */ + {USB_DEVICE(0x0789, 0x016E), .driver_info = RTL8812}, /* Logitec - Edimax */ + {USB_DEVICE(0x0409, 0x0408), .driver_info = RTL8812}, /* NEC - */ + {USB_DEVICE(0x0B05, 0x17D2), .driver_info = RTL8812}, /* ASUS - Edimax */ + {USB_DEVICE(0x0E66, 0x0022), .driver_info = RTL8812}, /* HAWKING - Edimax */ + {USB_DEVICE(0x0586, 0x3426), .driver_info = RTL8812}, /* ZyXEL - */ + {USB_DEVICE(0x2001, 0x3313), .driver_info = RTL8812}, /* D-Link - ALPHA */ + {USB_DEVICE(0x1058, 0x0632), .driver_info = RTL8812}, /* WD - Cybertan */ + {USB_DEVICE(0x1740, 0x0100), .driver_info = RTL8812}, /* EnGenius - EnGenius */ + {USB_DEVICE(0x2019, 0xAB30), .driver_info = RTL8812}, /* Planex - Abocom */ + {USB_DEVICE(0x07B8, 0x8812), .driver_info = RTL8812}, /* Abocom - Abocom */ + {USB_DEVICE(0x0846, 0x9051), .driver_info = RTL8812}, /* Netgear A6200 v2 */ + {USB_DEVICE(0x2001, 0x330E), .driver_info = RTL8812}, /* D-Link - ALPHA */ + {USB_DEVICE(0x2001, 0x3313), .driver_info = RTL8812}, /* D-Link - ALPHA */ + {USB_DEVICE(0x2001, 0x3315), .driver_info = RTL8812}, /* D-Link - Cameo */ + {USB_DEVICE(0x2001, 0x3316), .driver_info = RTL8812}, /* D-Link - Cameo */ + {USB_DEVICE(0x13B1, 0x003F), .driver_info = RTL8812}, /* Linksys - WUSB6300 */ + {USB_DEVICE(0x2357, 0x0101), .driver_info = RTL8812}, /* TP-Link - Archer T4U AC1200 */ + {USB_DEVICE(0x2357, 0x0103), .driver_info = RTL8812}, /* TP-Link - T4UH */ + {USB_DEVICE(0x2357, 0x010D), .driver_info = RTL8812}, /* TP-Link - Archer T4U AC1300 */ + {USB_DEVICE(0x2357, 0x0115), .driver_info = RTL8812}, /* TP-Link - Archer T4U AC1300 */ + {USB_DEVICE(0x2357, 0x010E), .driver_info = RTL8812}, /* TP-Link - Archer T4UH AC1300 */ + {USB_DEVICE(0x2357, 0x010F), .driver_info = RTL8812}, /* TP-Link - T4UHP */ + {USB_DEVICE(0x2357, 0x0122), .driver_info = RTL8812}, /* TP-Link - T4UHP (other) */ + {USB_DEVICE(0x20F4, 0x805B), .driver_info = RTL8812}, /* TRENDnet - */ + {USB_DEVICE(0x0411, 0x025D), .driver_info = RTL8812}, /* Buffalo - WI-U3-866D */ + {USB_DEVICE(0x050D, 0x1109), .driver_info = RTL8812}, /* Belkin F9L1109 - SerComm */ + {USB_DEVICE(0x148F, 0x9097), .driver_info = RTL8812}, /* Amped Wireless ACA1 */ + {USB_DEVICE(0x0BDA, 0x8812), .driver_info = RTL8812}, /* Alfa - AWUS036AC, AWUS036ACH & AWUS036EAC */ + {USB_DEVICE(0x2604, 0x0012), .driver_info = RTL8812}, /* Tenda U12 */ + {USB_DEVICE(0x0BDA, 0x881A), .driver_info = RTL8812}, /* Unex DAUK-W8812 */ #endif #ifdef CONFIG_RTL8821A @@ -205,89 +196,46 @@ static struct usb_device_id rtw_usb_id_tbl[] = { {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x0823, 0xff, 0xff, 0xff), .driver_info = RTL8821}, /* 8821AU */ /*=== Customer ID ===*/ {USB_DEVICE(0x7392, 0xA811), .driver_info = RTL8821}, /* Edimax - Edimax */ + {USB_DEVICE(0x7392, 0xA812), .driver_info = RTL8821}, /* Edimax - EW-7811UTC */ + {USB_DEVICE(0x7392, 0xA813), .driver_info = RTL8821}, /* Edimax - EW-7811UAC */ + {USB_DEVICE(0x7392, 0xB611), .driver_info = RTL8821}, /* Edimax - EW-7811UCB */ {USB_DEVICE(0x04BB, 0x0953), .driver_info = RTL8821}, /* I-O DATA - Edimax */ {USB_DEVICE(0x2001, 0x3314), .driver_info = RTL8821}, /* D-Link - Cameo */ {USB_DEVICE(0x2001, 0x3318), .driver_info = RTL8821}, /* D-Link - Cameo */ {USB_DEVICE(0x0E66, 0x0023), .driver_info = RTL8821}, /* HAWKING - Edimax */ - {USB_DEVICE(0x056E, 0x400E) , .driver_info = RTL8821}, /* ELECOM - ELECOM */ - {USB_DEVICE(0x056E, 0x400F) , .driver_info = RTL8821}, /* ELECOM - ELECOM */ - {USB_DEVICE(0x20f4, 0x804b), .driver_info = RTL8821}, /* TRENDnet */ -#endif - -#ifdef CONFIG_RTL8192E - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x818B, 0xff, 0xff, 0xff), .driver_info = RTL8192E}, /* Default ID */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x818C, 0xff, 0xff, 0xff), .driver_info = RTL8192E}, /* Default ID */ -#endif - -#ifdef CONFIG_RTL8723B - /* === Realtek demoboard === */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB720, 0xff, 0xff, 0xff), .driver_info = RTL8723B}, /* 8723BU 1*1 */ - /* {USB_DEVICE(USB_VENDER_ID_REALTEK, 0xB720),.driver_info = RTL8723B}, 8723BU */ + {USB_DEVICE(0x056E, 0x400E), .driver_info = RTL8821}, /* ELECOM - ELECOM */ + {USB_DEVICE(0x056E, 0x400F), .driver_info = RTL8821}, /* ELECOM - ELECOM */ + {USB_DEVICE(0x0411, 0x0242), .driver_info = RTL8821}, /* ELECOM - WDC-433DU2H */ + {USB_DEVICE(0x2019, 0xAB32), .driver_info = RTL8821}, /* Planex - GW-450S */ + {USB_DEVICE(0x0846, 0x9052), .driver_info = RTL8821}, /* Netgear - A6100 */ + {USB_DEVICE(0x0411, 0x029B), .driver_info = RTL8821}, /* Buffalo - WI-U2-433DHP */ + {USB_DEVICE(0x056E, 0x4007), .driver_info = RTL8821}, /* Elecom - WDC-433DU2HBK */ + {USB_DEVICE(0x0BDA, 0xA811), .driver_info = RTL8821}, /* GMYLE - AC450 */ + {USB_DEVICE(0x3823, 0x6249), .driver_info = RTL8821}, /* Obihai - OBiWiFi */ + {USB_DEVICE(0x2357, 0x011E), .driver_info = RTL8821}, /* TP Link - T2U Nano */ + {USB_DEVICE(0x2357, 0x0122), .driver_info = RTL8821}, /* TP Link - T2U Nano */ + {USB_DEVICE(0x2357, 0x0120), .driver_info = RTL8821}, /* TP Link - T2U Plus */ + {USB_DEVICE(0x2357, 0x011F), .driver_info = RTL8821}, /* TP-Link - Archer AC600 T2U Nano */ #endif -#ifdef CONFIG_RTL8703B - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB703, 0xff, 0xff, 0xff), .driver_info = RTL8703B}, /* 8723CU 1*1 */ - /* {USB_DEVICE(USB_VENDER_ID_REALTEK, 0xB703), .driver_info = RTL723C}, */ /* 8723CU 1*1 */ -#endif /* CONFIG_RTL8703B */ - #ifdef CONFIG_RTL8814A - {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8813), .driver_info = RTL8814A}, - {USB_DEVICE(0x2001, 0x331a), .driver_info = RTL8814A}, /* D-Link - D-Link */ - {USB_DEVICE(0x0b05, 0x1817), .driver_info = RTL8814A}, /* ASUS - ASUSTeK */ + {USB_DEVICE(0x2001, 0x331A), .driver_info = RTL8814A}, /* D-Link - D-Link */ + {USB_DEVICE(0x0B05, 0x1817), .driver_info = RTL8814A}, /* ASUS - ASUSTeK */ + {USB_DEVICE(0x0B05, 0x1852), .driver_info = RTL8814A}, /* ASUS - ASUSTeK */ + {USB_DEVICE(0x0B05, 0x1853), .driver_info = RTL8814A}, /* ASUS - ASUSTeK */ {USB_DEVICE(0x056E, 0x400B), .driver_info = RTL8814A}, /* ELECOM - ELECOM */ {USB_DEVICE(0x056E, 0x400D), .driver_info = RTL8814A}, /* ELECOM - ELECOM */ {USB_DEVICE(0x7392, 0xA834), .driver_info = RTL8814A}, /* Edimax - Edimax */ + {USB_DEVICE(0x7392, 0xA833), .driver_info = RTL8814A}, /* Edimax - AC1750 */ + {USB_DEVICE(0x0BDA, 0x8813), .driver_info = RTL8814A}, /* Edimax - EDUP Adapters */ + {USB_DEVICE(0x0e66, 0x0026), .driver_info = RTL8814A}, /* Hawking Technologies - HW17ACU*/ + {USB_DEVICE(0x2357, 0x0106), .driver_info = RTL8814A}, /* TP-LINK Archer T9UH */ + {USB_DEVICE(0x20F4, 0x809A), .driver_info = RTL8814A}, /* TRENDnet - TRENDnet */ + {USB_DEVICE(0x20F4, 0x809B), .driver_info = RTL8814A}, /* TRENDnet TEW-809UB */ + {USB_DEVICE(0x0846, 0x9054), .driver_info = RTL8814A}, /* Netgear A7000 */ #endif /* CONFIG_RTL8814A */ -#ifdef CONFIG_RTL8188F - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xF179, 0xff, 0xff, 0xff), .driver_info = RTL8188F}, /* 8188FU 1*1 */ -#endif - -#ifdef CONFIG_RTL8188GTV - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x018C, 0xff, 0xff, 0xff), .driver_info = RTL8188GTV}, /* 8188GTV 1*1 */ -#endif - -#ifdef CONFIG_RTL8822B - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB82C, 0xff, 0xff, 0xff), .driver_info = RTL8822B}, /* Default ID for USB multi-function */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB812, 0xff, 0xff, 0xff), .driver_info = RTL8822B}, /* Default ID for USB Single-function, WiFi only */ - /*=== Customer ID ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), .driver_info = RTL8822B}, /* Alpha - Alpha*/ -#endif /* CONFIG_RTL8822B */ - -#ifdef CONFIG_RTL8723D - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xD723, 0xff, 0xff, 0xff), .driver_info = RTL8723D}, /* 8723DU 1*1 */ -#endif - -#ifdef CONFIG_RTL8192F - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xF192, 0xff, 0xff, 0xff), .driver_info = RTL8192F}, /* 8192FU 2*2 */ -#endif - -#ifdef CONFIG_RTL8821C - /*=== Realtek demoboard ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xb82b, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8821CU */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xb820, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8821CU */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xC821, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8821CU */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xC820, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8821CU */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xC82A, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8821CU */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xC82B, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8821CU */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xC811, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8811CU */ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0x8811, 0xff, 0xff, 0xff), .driver_info = RTL8821C}, /* 8811CU */ - /*=== Customer ID ===*/ -#endif - -#ifdef CONFIG_RTL8710B - /*=== Realtek dongle ===*/ - {USB_DEVICE_AND_INTERFACE_INFO(USB_VENDER_ID_REALTEK, 0xB711, 0xff, 0xff, 0xff), .driver_info = RTL8710B}, /* 8710B = 8188GU 1*1 */ -#endif - {} /* Terminating entry */ }; @@ -978,7 +926,6 @@ static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) PADAPTER padapter; int ret = 0; - dvobj = usb_get_intfdata(pusb_intf); pwrpriv = dvobj_to_pwrctl(dvobj); pdbgpriv = &dvobj->drv_dbg; @@ -1021,7 +968,6 @@ int rtw_resume_process(_adapter *padapter) struct dvobj_priv *pdvobj = padapter->dvobj; struct debug_priv *pdbgpriv = &pdvobj->drv_dbg; - if (pwrpriv->bInSuspend == _FALSE) { pdbgpriv->dbg_resume_error_cnt++; RTW_INFO("%s bInSuspend = %d\n", __FUNCTION__, pwrpriv->bInSuspend); @@ -1094,7 +1040,6 @@ static int rtw_resume(struct usb_interface *pusb_intf) struct mlme_ext_priv *pmlmeext; int ret = 0; - dvobj = usb_get_intfdata(pusb_intf); pwrpriv = dvobj_to_pwrctl(dvobj); pdbgpriv = &dvobj->drv_dbg; @@ -1107,7 +1052,7 @@ static int rtw_resume(struct usb_interface *pusb_intf) #ifdef CONFIG_AUTOSUSPEND if (pwrpriv->bInternalAutoSuspend) ret = rtw_resume_process(padapter); - else + else #endif { if (pwrpriv->wowlan_mode || pwrpriv->wowlan_ap_mode) { @@ -1137,7 +1082,6 @@ static int rtw_resume(struct usb_interface *pusb_intf) } - #ifdef CONFIG_AUTOSUSPEND void autosuspend_enter(_adapter *padapter) { @@ -1306,7 +1250,6 @@ _adapter *rtw_usb_primary_adapter_init(struct dvobj_priv *dvobj, if (rtw_set_hal_ops(padapter) == _FAIL) goto free_hal_data; - padapter->intf_start = &usb_intf_start; padapter->intf_stop = &usb_intf_stop; @@ -1703,7 +1646,6 @@ static void __exit rtw_drv_halt(void) rtw_mstat_dump(RTW_DBGDUMP); } - module_init(rtw_drv_entry); module_exit(rtw_drv_halt); diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_ops_linux.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_ops_linux.c index a05446e7ba581e..16fc944a10420c 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_ops_linux.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/usb_ops_linux.c @@ -631,9 +631,6 @@ u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) #endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX */ #ifdef USB_PACKET_OFFSET_SZ -#if (USB_PACKET_OFFSET_SZ == 0) - purb->transfer_flags |= URB_ZERO_PACKET; -#endif #endif #if 0 diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/wifi_regd.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/wifi_regd.c index 4c10f8467d45d7..5f2f9050667b00 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/wifi_regd.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/wifi_regd.c @@ -53,39 +53,42 @@ static struct country_code_to_enum_rd allCountries[] = { /* 5G chan 36 - chan 64 */ #define RTW_5GHZ_5150_5350 \ - REG_RULE(5150-10, 5350+10, 40, 0, 30, \ - NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS) + REG_RULE(5150-10, 5350+10, 80, 0, 30, \ + NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS) /* 5G chan 100 - chan 165 */ #define RTW_5GHZ_5470_5850 \ - REG_RULE(5470-10, 5850+10, 40, 0, 30, \ - NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS) + REG_RULE(5470-10, 5850+10, 80, 0, 30, \ + NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS) /* 5G chan 149 - chan 165 */ #define RTW_5GHZ_5725_5850 \ - REG_RULE(5725-10, 5850+10, 40, 0, 30, \ - NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS) + REG_RULE(5725-10, 5850+10, 80, 0, 30, \ + NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS) /* 5G chan 36 - chan 165 */ #define RTW_5GHZ_5150_5850 \ - REG_RULE(5150-10, 5850+10, 40, 0, 30, \ + REG_RULE(5150-10, 5850+10, 80, 0, 30, \ NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS) static const struct ieee80211_regdomain rtw_regdom_rd = { - .n_reg_rules = 3, + .n_reg_rules = 4, .alpha2 = "99", .reg_rules = { RTW_2GHZ_CH01_11, RTW_2GHZ_CH12_13, + RTW_2GHZ_CH14, RTW_5GHZ_5150_5850, } }; +#if 0 static const struct ieee80211_regdomain rtw_regdom_11 = { .n_reg_rules = 1, .alpha2 = "99", .reg_rules = { RTW_2GHZ_CH01_11, + RTW_2GHZ_CH12_13 } }; @@ -139,6 +142,7 @@ static const struct ieee80211_regdomain rtw_regdom_14 = { } }; +#endif #if 0 static struct rtw_regulatory *rtw_regd; #endif @@ -255,17 +259,17 @@ static void _rtw_reg_apply_active_scan_flags(struct wiphy *wiphy, void rtw_regd_apply_flags(struct wiphy *wiphy) { struct dvobj_priv *dvobj = wiphy_to_dvobj(wiphy); - struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); - RT_CHANNEL_INFO *channel_set = rfctl->channel_set; - u8 max_chan_nums = rfctl->max_chan_nums; + //struct rf_ctl_t *rfctl = dvobj_to_rfctl(dvobj); + //RT_CHANNEL_INFO *channel_set = rfctl->channel_set; + //u8 max_chan_nums = rfctl->max_chan_nums; struct ieee80211_supported_band *sband; struct ieee80211_channel *ch; unsigned int i, j; u16 channel; - u32 freq; + //u32 freq; - /* all channels disable */ + /* all channels enable */ for (i = 0; i < NUM_NL80211_BANDS; i++) { sband = wiphy->bands[i]; @@ -274,12 +278,20 @@ void rtw_regd_apply_flags(struct wiphy *wiphy) ch = &sband->channels[j]; if (ch) - ch->flags = IEEE80211_CHAN_DISABLED; + ch->flags &= ~(IEEE80211_CHAN_DISABLED|IEEE80211_CHAN_NO_HT40PLUS| + IEEE80211_CHAN_NO_HT40MINUS|IEEE80211_CHAN_NO_80MHZ| + IEEE80211_CHAN_NO_160MHZ| +#if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 14, 0)) + IEEE80211_CHAN_NO_IBSS|IEEE80211_CHAN_PASSIVE_SCAN); +#else + IEEE80211_CHAN_NO_IR); +#endif } } } /* channels apply by channel plans. */ + /* for (i = 0; i < max_chan_nums; i++) { channel = channel_set[i].ChannelNum; freq = rtw_ch2freq(channel); @@ -314,8 +326,9 @@ void rtw_regd_apply_flags(struct wiphy *wiphy) ch->flags |= IEEE80211_CHAN_NO_IR; #endif } - #endif /* CONFIG_DFS */ + #endif CONFIG_DFS } +*/ } static const struct ieee80211_regdomain *_rtw_regdomain_select(struct diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/xmit_linux.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/xmit_linux.c index 1872b5206a44fa..ebbf1f00ef7341 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/xmit_linux.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/linux/xmit_linux.c @@ -65,7 +65,7 @@ sint rtw_endofpktfile(struct pkt_file *pfile) void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib) { -#ifdef CONFIG_TX_CSUM_OFFLOAD +#ifdef CONFIG_TX_CSUM_OFFLOAD struct sk_buff *skb = (struct sk_buff *)pkt; struct iphdr *iph = NULL; struct ipv6hdr *i6ph = NULL; @@ -305,12 +305,12 @@ void rtw_os_xmit_schedule(_adapter *padapter) tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); _exit_critical_bh(&pxmitpriv->lock, &irqL); - + #if defined(CONFIG_PCI_HCI) && defined(CONFIG_XMIT_THREAD_MODE) if (_rtw_queue_empty(&padapter->xmitpriv.pending_xmitbuf_queue) == _FALSE) _rtw_up_sema(&padapter->xmitpriv.xmit_sema); #endif - + #endif } @@ -451,7 +451,7 @@ int _rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) #ifdef CONFIG_TX_MCAST2UNI extern int rtw_mc2u_disable; #endif /* CONFIG_TX_MCAST2UNI */ -#ifdef CONFIG_TX_CSUM_OFFLOAD +#ifdef CONFIG_TX_CSUM_OFFLOAD struct sk_buff *skb = pkt; struct sk_buff *segs, *nskb; netdev_features_t features = padapter->pnetdev->features; diff --git a/drivers/net/wireless/realtek/rtl8812au/os_dep/osdep_service.c b/drivers/net/wireless/realtek/rtl8812au/os_dep/osdep_service.c index 14f7b806104f0a..7c6d12088f50dd 100644 --- a/drivers/net/wireless/realtek/rtl8812au/os_dep/osdep_service.c +++ b/drivers/net/wireless/realtek/rtl8812au/os_dep/osdep_service.c @@ -13,7 +13,6 @@ * *****************************************************************************/ - #define _OSDEP_SERVICE_C_ #include @@ -27,7 +26,6 @@ atomic_t _malloc_size = ATOMIC_INIT(0); #endif #endif /* DBG_MEMORY_LEAK */ - #if defined(PLATFORM_LINUX) /* * Translate the OS dependent @param error_code to OS independent RTW_STATUS_CODE @@ -2390,6 +2388,13 @@ struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_p if (!pnetdev) goto RETURN; + + pnetdev->mtu = WLAN_MAX_ETHFRM_LEN; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) + pnetdev->min_mtu = WLAN_MIN_ETHFRM_LEN; + pnetdev->max_mtu = WLAN_DATA_MAXLEN; +#endif + pnpi = netdev_priv(pnetdev); pnpi->priv = old_priv; pnpi->sizeof_priv = sizeof_priv; @@ -2411,6 +2416,12 @@ struct net_device *rtw_alloc_etherdev(int sizeof_priv) if (!pnetdev) goto RETURN; + pnetdev->mtu = WLAN_MAX_ETHFRM_LEN; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 10, 0)) + pnetdev->min_mtu = WLAN_MIN_ETHFRM_LEN; + pnetdev->max_mtu = WLAN_DATA_MAXLEN; +#endif + pnpi = netdev_priv(pnetdev); pnpi->priv = rtw_zvmalloc(sizeof_priv); @@ -2817,7 +2828,7 @@ int map_readN(const struct map_t *map, u16 offset, u16 len, u8 *buf) else c_len = seg->sa + seg->len - offset; } - + _rtw_memcpy(c_dst, c_src, c_len); } @@ -3001,7 +3012,7 @@ void dump_blacklist(void *sel, _queue *blist, const char *title) if (rtw_end_of_queue_search(head, list) == _FALSE) { if (title) RTW_PRINT_SEL(sel, "%s:\n", title); - + while (rtw_end_of_queue_search(head, list) == _FALSE) { ent = LIST_CONTAINOR(list, struct blacklist_ent, list); list = get_next(list); diff --git a/drivers/net/wireless/realtek/rtl8812au/platform/platform_aml_s905_sdio.h b/drivers/net/wireless/realtek/rtl8812au/platform/platform_aml_s905_sdio.h index 2b87576dd62923..17d3cd73cc7948 100644 --- a/drivers/net/wireless/realtek/rtl8812au/platform/platform_aml_s905_sdio.h +++ b/drivers/net/wireless/realtek/rtl8812au/platform/platform_aml_s905_sdio.h @@ -16,6 +16,10 @@ #define __PLATFORM_AML_S905_SDIO_H__ #include /* Linux vresion */ +#ifndef RHEL_RELEASE_CODE +#define RHEL_RELEASE_VERSION(a,b) (((a) << 8) + (b)) +#define RHEL_RELEASE_CODE 0 +#endif extern void sdio_reinit(void); extern void extern_wifi_set_enable(int is_on); From c242608f460e8b359d1a076177a0a0ea3a3e2fa8 Mon Sep 17 00:00:00 2001 From: Harry ten Berge Date: Sat, 19 Sep 2020 09:04:35 +0200 Subject: [PATCH 2/3] switch from 8812au to 88XXau driver --- drivers/net/wireless/realtek/rtl8812au/README_ROPIEEE | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/wireless/realtek/rtl8812au/README_ROPIEEE b/drivers/net/wireless/realtek/rtl8812au/README_ROPIEEE index da236582a72731..6418d0f9f7b223 100644 --- a/drivers/net/wireless/realtek/rtl8812au/README_ROPIEEE +++ b/drivers/net/wireless/realtek/rtl8812au/README_ROPIEEE @@ -1,4 +1,4 @@ -This driver comes from: https://github.com/gordboy/rtl8812au-5.6.4.2 +This driver comes from: https://github.com/aircrack-ng/rtl8812au The 'Makefile' needs to be changed: From 56737006c292a05024e2eaba71abeab32c77e401 Mon Sep 17 00:00:00 2001 From: Harry ten Berge Date: Sat, 19 Sep 2020 09:09:06 +0200 Subject: [PATCH 3/3] update readme --- README_ROPIEEE | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README_ROPIEEE b/README_ROPIEEE index 5dd9ba5b3b1b66..c71a3a9d23998a 100644 --- a/README_ROPIEEE +++ b/README_ROPIEEE @@ -3,4 +3,4 @@ * Changes (besides USB quirks): - add support for 352k8 and 384k -- add Realtek drivers for: 8812AU, 8192EU +- add Realtek drivers for: 8812AU, 8192EU, 8723BU, 88X2BU