diff --git a/qiskit/transpiler/passes/layout/apply_layout.py b/qiskit/transpiler/passes/layout/apply_layout.py
index 7514ac6b421f..7bd4ab714d83 100644
--- a/qiskit/transpiler/passes/layout/apply_layout.py
+++ b/qiskit/transpiler/passes/layout/apply_layout.py
@@ -59,6 +59,7 @@ def run(self, dag):
         q = QuantumRegister(len(layout), "q")
 
         new_dag = DAGCircuit()
+        new_dag.name = dag.name
         new_dag.add_qreg(q)
         for var in dag.iter_input_vars():
             new_dag.add_input_var(var)
diff --git a/releasenotes/notes/fix-pm-name-36baa550ce5d9c2c.yaml b/releasenotes/notes/fix-pm-name-36baa550ce5d9c2c.yaml
new file mode 100644
index 000000000000..3259712b505d
--- /dev/null
+++ b/releasenotes/notes/fix-pm-name-36baa550ce5d9c2c.yaml
@@ -0,0 +1,6 @@
+---
+fixes:
+  - |
+    Circuits compiled using a preset passmanager constructed by :func:`.generate_preset_pass_manager`
+    will now correctly retain their :attr:`~.QuantumCircuit.name` attribute, as they do with
+    :func:`.transpile`.
diff --git a/test/python/compiler/test_transpiler.py b/test/python/compiler/test_transpiler.py
index 2722a1808101..4b7eabe29e4d 100644
--- a/test/python/compiler/test_transpiler.py
+++ b/test/python/compiler/test_transpiler.py
@@ -58,6 +58,8 @@
     CZGate,
     ECRGate,
     HGate,
+    IGate,
+    PhaseGate,
     RXGate,
     RYGate,
     RZGate,
@@ -1825,7 +1827,9 @@ def test_no_infinite_loop(self, optimization_level):
     @data(0, 1, 2, 3)
     def test_transpile_preserves_circuit_metadata(self, optimization_level):
         """Verify that transpile preserves circuit metadata in the output."""
-        circuit = QuantumCircuit(2, metadata={"experiment_id": "1234", "execution_number": 4})
+        metadata = {"experiment_id": "1234", "execution_number": 4}
+        name = "my circuit"
+        circuit = QuantumCircuit(2, metadata=metadata.copy(), name=name)
         circuit.h(0)
         circuit.cx(0, 1)
 
@@ -1857,7 +1861,22 @@ def test_transpile_preserves_circuit_metadata(self, optimization_level):
             optimization_level=optimization_level,
             seed_transpiler=42,
         )
-        self.assertEqual(circuit.metadata, res.metadata)
+        self.assertEqual(res.metadata, metadata)
+        self.assertEqual(res.name, name)
+
+        target = Target(14)
+        for inst in (IGate(), PhaseGate(Parameter("t")), SXGate()):
+            target.add_instruction(inst, {(i,): None for i in range(14)})
+        target.add_instruction(CXGate(), {tuple(pair): None for pair in cmap})
+
+        res = transpile(
+            circuit,
+            target=target,
+            optimization_level=optimization_level,
+            seed_transpiler=42,
+        )
+        self.assertEqual(res.metadata, metadata)
+        self.assertEqual(res.name, name)
 
     @data(0, 1, 2, 3)
     def test_transpile_optional_registers(self, optimization_level):
diff --git a/test/python/transpiler/test_preset_passmanagers.py b/test/python/transpiler/test_preset_passmanagers.py
index 1ecee97a5ed9..904f73a85c80 100644
--- a/test/python/transpiler/test_preset_passmanagers.py
+++ b/test/python/transpiler/test_preset_passmanagers.py
@@ -21,7 +21,7 @@
 import numpy as np
 
 from qiskit import QuantumCircuit, ClassicalRegister, QuantumRegister
-from qiskit.circuit import Qubit, Gate, ControlFlowOp, ForLoopOp
+from qiskit.circuit import Qubit, Gate, ControlFlowOp, ForLoopOp, library as lib, Parameter
 from qiskit.circuit.library import quantum_volume
 from qiskit.compiler import transpile
 from qiskit.transpiler import CouplingMap, Layout, PassManager, TranspilerError, Target
@@ -1576,6 +1576,28 @@ def test_parse_seed_transpiler_raises_value_error(self):
         ):
             generate_preset_pass_manager(seed_transpiler=0.1)
 
+    @data(0, 1, 2, 3)
+    def test_preserves_circuit_metadata(self, optimization_level):
+        """Test that basic metadata is preserved."""
+        metadata = {"experiment_id": "1234", "execution_number": 4}
+        name = "my circuit"
+        circuit = QuantumCircuit(4, metadata=metadata.copy(), name=name)
+        circuit.h(0)
+        circuit.cx(0, 3)
+
+        num_qubits = 10
+        target = Target(num_qubits)
+        for inst in (lib.IGate(), lib.PhaseGate(Parameter("t")), lib.SXGate()):
+            target.add_instruction(inst, {(i,): None for i in range(num_qubits)})
+        target.add_instruction(CXGate(), {pair: None for pair in CouplingMap.from_line(num_qubits)})
+
+        pm = generate_preset_pass_manager(
+            optimization_level=optimization_level, target=target, seed_transpiler=42
+        )
+        res = pm.run(circuit)
+        self.assertEqual(res.metadata, metadata)
+        self.assertEqual(res.name, name)
+
 
 @ddt
 class TestIntegrationControlFlow(QiskitTestCase):