Basis gate set with RXX gate converted with QASM3 and run with Aer simulator results in 'unknown instruction: rxx_139974866104288'

[ljkitt]

Environment

• Qiskit Terra version: 0.45.1
• Python version: 3.10.1

What is happening?

Creating a circuit that results in an RXX gate after being transpiled with a basis set of rx, ry, and rxx and then converting with QASM3 and running on an Aer simulator results in the following error:

Traceback (most recent call last):
  Cell In[79], line 18
    counts = simulator.run(qc, shots=100).result().get_counts(qc)
  File /opt/conda/lib/python3.10/site-packages/qiskit_aer/jobs/utils.py:42 in _wrapper
    return func(self, *args, **kwargs)
  File /opt/conda/lib/python3.10/site-packages/qiskit_aer/jobs/aerjob.py:114 in result
    return self._future.result(timeout=timeout)
  File /opt/conda/lib/python3.10/concurrent/futures/_base.py:458 in result
    return self.__get_result()
  File /opt/conda/lib/python3.10/concurrent/futures/_base.py:403 in __get_result
    raise self._exception
  File /opt/conda/lib/python3.10/concurrent/futures/thread.py:58 in run
    result = self.fn(*self.args, **self.kwargs)
  File /opt/conda/lib/python3.10/site-packages/qiskit_aer/backends/aerbackend.py:435 in _execute_circuits_job
    aer_circuits, idx_maps = assemble_circuits(circuits)
  File /opt/conda/lib/python3.10/site-packages/qiskit_aer/backends/aer_compiler.py:675 in assemble_circuits
    aer_circuits, idx_maps = zip(*[assemble_circuit(circuit) for circuit in circuits])
  File /opt/conda/lib/python3.10/site-packages/qiskit_aer/backends/aer_compiler.py:675 in <listcomp>
    aer_circuits, idx_maps = zip(*[assemble_circuit(circuit) for circuit in circuits])
  File /opt/conda/lib/python3.10/site-packages/qiskit_aer/backends/aer_compiler.py:530 in assemble_circuit
    num_of_aer_ops += _assemble_op(
  File /opt/conda/lib/python3.10/site-packages/qiskit_aer/backends/aer_compiler.py:646 in _assemble_op
    raise AerError(f"unknown instruction: {name}")
AerError: 'unknown instruction: rxx_139974866104288'

Having the basis gate set, the QASM3 conversion, and the aer simulator are all required to reproduce the bug in this manner.

How can we reproduce the issue?

Run the following:

import qiskit
from qiskit import QuantumCircuit, ClassicalRegister, QuantumRegister
from qiskit.circuit.library.standard_gates import *
qr = QuantumRegister(2, name='qr')
cr = ClassicalRegister(2, name='cr')
qc = QuantumCircuit(qr, cr, name='qc')
qc.append(RXXGate(3.1067098743999053), qargs=[qr[0], qr[1]], cargs=[])
qc.measure(qr, cr)

from qiskit import transpile
qc = transpile(qc, basis_gates=['rx', 'ry', 'rxx'])

from qiskit import qasm3
qc = qasm3.loads(qasm3.dumps(qc))

from qiskit_aer import AerSimulator
simulator = AerSimulator()
counts = simulator.run(qc, shots=100).result().get_counts(qc)

What should happen?

The circuit should be able to run without error.

Any suggestions?

No response

[Cryoris]

Yeah that's because the RXX gate gets reloaded as Gate and not as RXXGate. That may be because RXXGate is not explicitly listed in the Qiskit standard gates in the exporter and the importer. It would be good if we could automatically populate these using the qiskit.circuit.library.standard_gates.

You can prevent this by re-transpiling before the execution, but that of course takes additional time. Alternatively, you could use qpy to store the circuit, e.g.

form qiskit.qpy import load, dump

fname = "my_circuit.qpy"
with open(fname, "wb") as f:
    dump(qc, f)

with open(fname, "rb") as f:
    qc = load(f)[0]

[jakelishman]

The main issue here is, as Julien mentioned, that round-tripping through OpenQASM 3 is generally not lossless, and it's not typically possible to rely on an imported circuit being defined in exactly the set of standard gates it was exported with.

We can't just add Qiskit standard-library gates to the places linked in the comment above, because those are actually listings of the OpenQASM 3 header file stdgates.inc, which has a fixed form. We'd need something like #10737 to do that, which is still some ways off.

That said, #12776 will make it so that Qiskit standard-library gates (like the rxx used here) are exported in such a way that they will come out with a single parametric definition that will be re-imported into Qiskit in a way that Aer can still understand, so the code block as presented at the top will work.