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Introduction: Concurrency
Julian Oppermann edited this page Mar 5, 2021
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We envision CoreDSL 2 to be suitable for the modelling of ISAX that imply the presence of complex functional units executing independently of the core's main pipeline.
The code below presents an implementation of a zero-overhead loop mechanism using the spawn
keyword.
The spawned region represents logic to periodically check and reset the program counter, and will continue to execute even after the setup_ZOL
instruction is completed.
InstructionSet ZeroOverheadLoop extends RISCVBase {
architectural_state { unsigned<XLEN> count, start_PC, end_PC; }
instructions {
setup_ZOL {
encoding: offset[6:0] :: rs2[4:0] :: rs1[4:0] :: 3'b010 :: rd[4:0] :: 7'b0010111;
behavior: {
// set configuration registers
count = X[rs1];
start_PC = (unsigned<XLEN>) PC + 4;
end_PC = (unsigned<XLEN>) (start_PC + (signed) offset);
spawn { // this region will execute independently of setup_ZOL
for (; count > 0; --count) {
while (PC != end_PC) /* do nothing */ ;
PC = start_PC; // jump to loop start
}
}
// execution of setup_ZOL ends
}
}
}
}